# ! [ cfg_attr ( feature = "rt" , feature ( asm ) ) ] # ! [ cfg_attr ( feature = "rt" , feature ( core_intrinsics ) ) ] # ! [ cfg_attr ( feature = "rt" , feature ( linkage ) ) ] # ! [ cfg_attr ( feature = "rt" , feature ( macro_reexport ) ) ] # ! [ cfg_attr ( feature = "rt" , feature ( naked_functions ) ) ] # ! [ cfg_attr ( feature = "rt" , feature ( used ) ) ] # ! [ doc = "Peripheral access API for S32K144 microcontrollers (generated using svd2rust v0.11.1)\n\nYou can find an overview of the API [here].\n\n[here]: https://docs.rs/svd2rust/0.11.1/svd2rust/#peripheral-api" ] # ! [ deny ( missing_docs ) ] # ! [ allow ( non_camel_case_types ) ] # ! [ feature ( const_fn ) ] # ! [ no_std ]extern crate cortex_m ;
#[macro_reexport(default_handler, exception)]
#[cfg(feature = "rt")]
extern crate cortex_m_rt ;
extern crate bare_metal ;
extern crate vcell ;
use core::ops::Deref;
use bare_metal::Peripheral;
#[doc = r" Number available in the NVIC for configuring priority"]
pub const NVIC_PRIO_BITS: u8 = 4;
pub use interrupt::Interrupt;
#[doc(hidden)]
pub mod interrupt {
    use bare_metal::Nr;
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn DMA0() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn DMA1() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn DMA2() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn DMA3() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn DMA4() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn DMA5() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn DMA6() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn DMA7() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn DMA8() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn DMA9() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn DMA10() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn DMA11() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn DMA12() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn DMA13() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn DMA14() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn DMA15() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn DMA_ERROR() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn MCM() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn FTFC() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn READ_COLLISION() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn LVD_LVW() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn FTFC_FAULT() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn WDOG_EWM() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn RCM() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn LPI2C0_MASTER() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn LPI2C0_SLAVE() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn LPSPI0() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn LPSPI1() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn LPSPI2() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn LPUART0_RXTX() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn LPUART1_RXTX() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn LPUART2_RXTX() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn ADC0() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn ADC1() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn CMP0() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn ERM_SINGLE_FAULT() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn ERM_DOUBLE_FAULT() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn RTC() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn RTC_SECONDS() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn LPIT0_CH0() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn LPIT0_CH1() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn LPIT0_CH2() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn LPIT0_CH3() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn PDB0() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn SCG() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn LPTMR0() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn PORTA() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn PORTB() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn PORTC() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn PORTD() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn PORTE() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn PDB1() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn FLEXIO() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn CAN0_ORED() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn CAN0_ERROR() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn CAN0_WAKE_UP() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn CAN0_ORED_0_15_MB() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn CAN0_ORED_16_31_MB() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn CAN1_ORED() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn CAN1_ERROR() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn CAN1_ORED_0_15_MB() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn CAN2_ORED() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn CAN2_ERROR() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn CAN2_ORED_0_15_MB() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn FTM0_CH0_CH1() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn FTM0_CH2_CH3() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn FTM0_CH4_CH5() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn FTM0_CH6_CH7() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn FTM0_FAULT() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn FTM0_OVF_RELOAD() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn FTM1_CH0_CH1() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn FTM1_CH2_CH3() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn FTM1_CH4_CH5() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn FTM1_CH6_CH7() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn FTM1_FAULT() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn FTM1_OVF_RELOAD() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn FTM2_CH0_CH1() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn FTM2_CH2_CH3() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn FTM2_CH4_CH5() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn FTM2_CH6_CH7() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn FTM2_FAULT() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn FTM2_OVF_RELOAD() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn FTM3_CH0_CH1() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn FTM3_CH2_CH3() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn FTM3_CH4_CH5() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn FTM3_CH6_CH7() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn FTM3_FAULT() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(non_snake_case)]
    #[allow(private_no_mangle_fns)]
    #[cfg(feature = "rt")]
    #[linkage = "weak"]
    #[naked]
    #[no_mangle]
    extern "C" fn FTM3_OVF_RELOAD() {
        unsafe {
            asm ! ( "b DEFAULT_HANDLER" :: :: "volatile" );
            ::core::intrinsics::unreachable()
        }
    }
    #[allow(private_no_mangle_statics)]
    #[cfg(feature = "rt")]
    #[doc(hidden)]
    #[link_section = ".vector_table.interrupts"]
    #[no_mangle]
    #[used]
    pub static INTERRUPTS: [Option<extern "C" fn()>; 123] = [
        Some(DMA0),
        Some(DMA1),
        Some(DMA2),
        Some(DMA3),
        Some(DMA4),
        Some(DMA5),
        Some(DMA6),
        Some(DMA7),
        Some(DMA8),
        Some(DMA9),
        Some(DMA10),
        Some(DMA11),
        Some(DMA12),
        Some(DMA13),
        Some(DMA14),
        Some(DMA15),
        Some(DMA_ERROR),
        Some(MCM),
        Some(FTFC),
        Some(READ_COLLISION),
        Some(LVD_LVW),
        Some(FTFC_FAULT),
        Some(WDOG_EWM),
        Some(RCM),
        Some(LPI2C0_MASTER),
        Some(LPI2C0_SLAVE),
        Some(LPSPI0),
        Some(LPSPI1),
        Some(LPSPI2),
        None,
        None,
        Some(LPUART0_RXTX),
        None,
        Some(LPUART1_RXTX),
        None,
        Some(LPUART2_RXTX),
        None,
        None,
        None,
        Some(ADC0),
        Some(ADC1),
        Some(CMP0),
        None,
        None,
        Some(ERM_SINGLE_FAULT),
        Some(ERM_DOUBLE_FAULT),
        Some(RTC),
        Some(RTC_SECONDS),
        Some(LPIT0_CH0),
        Some(LPIT0_CH1),
        Some(LPIT0_CH2),
        Some(LPIT0_CH3),
        Some(PDB0),
        None,
        None,
        None,
        None,
        Some(SCG),
        Some(LPTMR0),
        Some(PORTA),
        Some(PORTB),
        Some(PORTC),
        Some(PORTD),
        Some(PORTE),
        None,
        None,
        None,
        None,
        Some(PDB1),
        Some(FLEXIO),
        None,
        None,
        None,
        None,
        None,
        None,
        None,
        None,
        Some(CAN0_ORED),
        Some(CAN0_ERROR),
        Some(CAN0_WAKE_UP),
        Some(CAN0_ORED_0_15_MB),
        Some(CAN0_ORED_16_31_MB),
        None,
        None,
        Some(CAN1_ORED),
        Some(CAN1_ERROR),
        None,
        Some(CAN1_ORED_0_15_MB),
        None,
        None,
        None,
        Some(CAN2_ORED),
        Some(CAN2_ERROR),
        None,
        Some(CAN2_ORED_0_15_MB),
        None,
        None,
        None,
        Some(FTM0_CH0_CH1),
        Some(FTM0_CH2_CH3),
        Some(FTM0_CH4_CH5),
        Some(FTM0_CH6_CH7),
        Some(FTM0_FAULT),
        Some(FTM0_OVF_RELOAD),
        Some(FTM1_CH0_CH1),
        Some(FTM1_CH2_CH3),
        Some(FTM1_CH4_CH5),
        Some(FTM1_CH6_CH7),
        Some(FTM1_FAULT),
        Some(FTM1_OVF_RELOAD),
        Some(FTM2_CH0_CH1),
        Some(FTM2_CH2_CH3),
        Some(FTM2_CH4_CH5),
        Some(FTM2_CH6_CH7),
        Some(FTM2_FAULT),
        Some(FTM2_OVF_RELOAD),
        Some(FTM3_CH0_CH1),
        Some(FTM3_CH2_CH3),
        Some(FTM3_CH4_CH5),
        Some(FTM3_CH6_CH7),
        Some(FTM3_FAULT),
        Some(FTM3_OVF_RELOAD),
    ];
    #[doc = r" Enumeration of all the interrupts"]
    pub enum Interrupt {
        #[doc = "0 - DMA0"]
        DMA0,
        #[doc = "1 - DMA1"]
        DMA1,
        #[doc = "2 - DMA2"]
        DMA2,
        #[doc = "3 - DMA3"]
        DMA3,
        #[doc = "4 - DMA4"]
        DMA4,
        #[doc = "5 - DMA5"]
        DMA5,
        #[doc = "6 - DMA6"]
        DMA6,
        #[doc = "7 - DMA7"]
        DMA7,
        #[doc = "8 - DMA8"]
        DMA8,
        #[doc = "9 - DMA9"]
        DMA9,
        #[doc = "10 - DMA10"]
        DMA10,
        #[doc = "11 - DMA11"]
        DMA11,
        #[doc = "12 - DMA12"]
        DMA12,
        #[doc = "13 - DMA13"]
        DMA13,
        #[doc = "14 - DMA14"]
        DMA14,
        #[doc = "15 - DMA15"]
        DMA15,
        #[doc = "16 - DMA_Error"]
        DMA_ERROR,
        #[doc = "17 - MCM"]
        MCM,
        #[doc = "18 - FTFC"]
        FTFC,
        #[doc = "19 - Read_Collision"]
        READ_COLLISION,
        #[doc = "20 - LVD_LVW"]
        LVD_LVW,
        #[doc = "21 - FTFC_Fault"]
        FTFC_FAULT,
        #[doc = "22 - WDOG_EWM"]
        WDOG_EWM,
        #[doc = "23 - RCM"]
        RCM,
        #[doc = "24 - LPI2C0_Master"]
        LPI2C0_MASTER,
        #[doc = "25 - LPI2C0_Slave"]
        LPI2C0_SLAVE,
        #[doc = "26 - LPSPI0"]
        LPSPI0,
        #[doc = "27 - LPSPI1"]
        LPSPI1,
        #[doc = "28 - LPSPI2"]
        LPSPI2,
        #[doc = "31 - LPUART0_RxTx"]
        LPUART0_RXTX,
        #[doc = "33 - LPUART1_RxTx"]
        LPUART1_RXTX,
        #[doc = "35 - LPUART2_RxTx"]
        LPUART2_RXTX,
        #[doc = "39 - ADC0"]
        ADC0,
        #[doc = "40 - ADC1"]
        ADC1,
        #[doc = "41 - CMP0"]
        CMP0,
        #[doc = "44 - ERM_single_fault"]
        ERM_SINGLE_FAULT,
        #[doc = "45 - ERM_double_fault"]
        ERM_DOUBLE_FAULT,
        #[doc = "46 - RTC"]
        RTC,
        #[doc = "47 - RTC_Seconds"]
        RTC_SECONDS,
        #[doc = "48 - LPIT0_Ch0"]
        LPIT0_CH0,
        #[doc = "49 - LPIT0_Ch1"]
        LPIT0_CH1,
        #[doc = "50 - LPIT0_Ch2"]
        LPIT0_CH2,
        #[doc = "51 - LPIT0_Ch3"]
        LPIT0_CH3,
        #[doc = "52 - PDB0"]
        PDB0,
        #[doc = "57 - SCG"]
        SCG,
        #[doc = "58 - LPTMR0"]
        LPTMR0,
        #[doc = "59 - PORTA"]
        PORTA,
        #[doc = "60 - PORTB"]
        PORTB,
        #[doc = "61 - PORTC"]
        PORTC,
        #[doc = "62 - PORTD"]
        PORTD,
        #[doc = "63 - PORTE"]
        PORTE,
        #[doc = "68 - PDB1"]
        PDB1,
        #[doc = "69 - FLEXIO"]
        FLEXIO,
        #[doc = "78 - CAN0_ORed"]
        CAN0_ORED,
        #[doc = "79 - CAN0_Error"]
        CAN0_ERROR,
        #[doc = "80 - CAN0_Wake_Up"]
        CAN0_WAKE_UP,
        #[doc = "81 - CAN0_ORed_0_15_MB"]
        CAN0_ORED_0_15_MB,
        #[doc = "82 - CAN0_ORed_16_31_MB"]
        CAN0_ORED_16_31_MB,
        #[doc = "85 - CAN1_ORed"]
        CAN1_ORED,
        #[doc = "86 - CAN1_Error"]
        CAN1_ERROR,
        #[doc = "88 - CAN1_ORed_0_15_MB"]
        CAN1_ORED_0_15_MB,
        #[doc = "92 - CAN2_ORed"]
        CAN2_ORED,
        #[doc = "93 - CAN2_Error"]
        CAN2_ERROR,
        #[doc = "95 - CAN2_ORed_0_15_MB"]
        CAN2_ORED_0_15_MB,
        #[doc = "99 - FTM0_Ch0_Ch1"]
        FTM0_CH0_CH1,
        #[doc = "100 - FTM0_Ch2_Ch3"]
        FTM0_CH2_CH3,
        #[doc = "101 - FTM0_Ch4_Ch5"]
        FTM0_CH4_CH5,
        #[doc = "102 - FTM0_Ch6_Ch7"]
        FTM0_CH6_CH7,
        #[doc = "103 - FTM0_Fault"]
        FTM0_FAULT,
        #[doc = "104 - FTM0_Ovf_Reload"]
        FTM0_OVF_RELOAD,
        #[doc = "105 - FTM1_Ch0_Ch1"]
        FTM1_CH0_CH1,
        #[doc = "106 - FTM1_Ch2_Ch3"]
        FTM1_CH2_CH3,
        #[doc = "107 - FTM1_Ch4_Ch5"]
        FTM1_CH4_CH5,
        #[doc = "108 - FTM1_Ch6_Ch7"]
        FTM1_CH6_CH7,
        #[doc = "109 - FTM1_Fault"]
        FTM1_FAULT,
        #[doc = "110 - FTM1_Ovf_Reload"]
        FTM1_OVF_RELOAD,
        #[doc = "111 - FTM2_Ch0_Ch1"]
        FTM2_CH0_CH1,
        #[doc = "112 - FTM2_Ch2_Ch3"]
        FTM2_CH2_CH3,
        #[doc = "113 - FTM2_Ch4_Ch5"]
        FTM2_CH4_CH5,
        #[doc = "114 - FTM2_Ch6_Ch7"]
        FTM2_CH6_CH7,
        #[doc = "115 - FTM2_Fault"]
        FTM2_FAULT,
        #[doc = "116 - FTM2_Ovf_Reload"]
        FTM2_OVF_RELOAD,
        #[doc = "117 - FTM3_Ch0_Ch1"]
        FTM3_CH0_CH1,
        #[doc = "118 - FTM3_Ch2_Ch3"]
        FTM3_CH2_CH3,
        #[doc = "119 - FTM3_Ch4_Ch5"]
        FTM3_CH4_CH5,
        #[doc = "120 - FTM3_Ch6_Ch7"]
        FTM3_CH6_CH7,
        #[doc = "121 - FTM3_Fault"]
        FTM3_FAULT,
        #[doc = "122 - FTM3_Ovf_Reload"]
        FTM3_OVF_RELOAD,
    }
    unsafe impl Nr for Interrupt {
        #[inline(always)]
        fn nr(&self) -> u8 {
            match *self {
                Interrupt::DMA0 => 0,
                Interrupt::DMA1 => 1,
                Interrupt::DMA2 => 2,
                Interrupt::DMA3 => 3,
                Interrupt::DMA4 => 4,
                Interrupt::DMA5 => 5,
                Interrupt::DMA6 => 6,
                Interrupt::DMA7 => 7,
                Interrupt::DMA8 => 8,
                Interrupt::DMA9 => 9,
                Interrupt::DMA10 => 10,
                Interrupt::DMA11 => 11,
                Interrupt::DMA12 => 12,
                Interrupt::DMA13 => 13,
                Interrupt::DMA14 => 14,
                Interrupt::DMA15 => 15,
                Interrupt::DMA_ERROR => 16,
                Interrupt::MCM => 17,
                Interrupt::FTFC => 18,
                Interrupt::READ_COLLISION => 19,
                Interrupt::LVD_LVW => 20,
                Interrupt::FTFC_FAULT => 21,
                Interrupt::WDOG_EWM => 22,
                Interrupt::RCM => 23,
                Interrupt::LPI2C0_MASTER => 24,
                Interrupt::LPI2C0_SLAVE => 25,
                Interrupt::LPSPI0 => 26,
                Interrupt::LPSPI1 => 27,
                Interrupt::LPSPI2 => 28,
                Interrupt::LPUART0_RXTX => 31,
                Interrupt::LPUART1_RXTX => 33,
                Interrupt::LPUART2_RXTX => 35,
                Interrupt::ADC0 => 39,
                Interrupt::ADC1 => 40,
                Interrupt::CMP0 => 41,
                Interrupt::ERM_SINGLE_FAULT => 44,
                Interrupt::ERM_DOUBLE_FAULT => 45,
                Interrupt::RTC => 46,
                Interrupt::RTC_SECONDS => 47,
                Interrupt::LPIT0_CH0 => 48,
                Interrupt::LPIT0_CH1 => 49,
                Interrupt::LPIT0_CH2 => 50,
                Interrupt::LPIT0_CH3 => 51,
                Interrupt::PDB0 => 52,
                Interrupt::SCG => 57,
                Interrupt::LPTMR0 => 58,
                Interrupt::PORTA => 59,
                Interrupt::PORTB => 60,
                Interrupt::PORTC => 61,
                Interrupt::PORTD => 62,
                Interrupt::PORTE => 63,
                Interrupt::PDB1 => 68,
                Interrupt::FLEXIO => 69,
                Interrupt::CAN0_ORED => 78,
                Interrupt::CAN0_ERROR => 79,
                Interrupt::CAN0_WAKE_UP => 80,
                Interrupt::CAN0_ORED_0_15_MB => 81,
                Interrupt::CAN0_ORED_16_31_MB => 82,
                Interrupt::CAN1_ORED => 85,
                Interrupt::CAN1_ERROR => 86,
                Interrupt::CAN1_ORED_0_15_MB => 88,
                Interrupt::CAN2_ORED => 92,
                Interrupt::CAN2_ERROR => 93,
                Interrupt::CAN2_ORED_0_15_MB => 95,
                Interrupt::FTM0_CH0_CH1 => 99,
                Interrupt::FTM0_CH2_CH3 => 100,
                Interrupt::FTM0_CH4_CH5 => 101,
                Interrupt::FTM0_CH6_CH7 => 102,
                Interrupt::FTM0_FAULT => 103,
                Interrupt::FTM0_OVF_RELOAD => 104,
                Interrupt::FTM1_CH0_CH1 => 105,
                Interrupt::FTM1_CH2_CH3 => 106,
                Interrupt::FTM1_CH4_CH5 => 107,
                Interrupt::FTM1_CH6_CH7 => 108,
                Interrupt::FTM1_FAULT => 109,
                Interrupt::FTM1_OVF_RELOAD => 110,
                Interrupt::FTM2_CH0_CH1 => 111,
                Interrupt::FTM2_CH2_CH3 => 112,
                Interrupt::FTM2_CH4_CH5 => 113,
                Interrupt::FTM2_CH6_CH7 => 114,
                Interrupt::FTM2_FAULT => 115,
                Interrupt::FTM2_OVF_RELOAD => 116,
                Interrupt::FTM3_CH0_CH1 => 117,
                Interrupt::FTM3_CH2_CH3 => 118,
                Interrupt::FTM3_CH4_CH5 => 119,
                Interrupt::FTM3_CH6_CH7 => 120,
                Interrupt::FTM3_FAULT => 121,
                Interrupt::FTM3_OVF_RELOAD => 122,
            }
        }
    }
    #[cfg(feature = "rt")]
    #[macro_export]
    macro_rules ! interrupt { ( $ NAME : ident , $ path : path , locals : { $ ( $ lvar : ident : $ lty : ident = $ lval : expr ; ) * } ) => { # [ allow ( non_snake_case ) ] mod $ NAME { pub struct Locals { $ ( pub $ lvar : $ lty , ) * } } # [ allow ( non_snake_case ) ] # [ no_mangle ] pub extern "C" fn $ NAME ( ) { let _ = $ crate :: interrupt :: Interrupt :: $ NAME ; static mut LOCALS : self :: $ NAME :: Locals = self :: $ NAME :: Locals { $ ( $ lvar : $ lval , ) * } ; let f : fn ( & mut self :: $ NAME :: Locals ) = $ path ; f ( unsafe { & mut LOCALS } ) ; } } ; ( $ NAME : ident , $ path : path ) => { # [ allow ( non_snake_case ) ] # [ no_mangle ] pub extern "C" fn $ NAME ( ) { let _ = $ crate :: interrupt :: Interrupt :: $ NAME ; let f : fn ( ) = $ path ; f ( ) ; } } }
}
pub use cortex_m::peripheral::CPUID;
pub use cortex_m::peripheral::DCB;
pub use cortex_m::peripheral::DWT;
pub use cortex_m::peripheral::FPB;
pub use cortex_m::peripheral::FPU;
pub use cortex_m::peripheral::ITM;
pub use cortex_m::peripheral::MPU;
pub use cortex_m::peripheral::NVIC;
pub use cortex_m::peripheral::SCB;
pub use cortex_m::peripheral::SYST;
pub use cortex_m::peripheral::TPIU;
#[doc = "CSE_PRAM"]
pub const CSE_PRAM: Peripheral<CSE_PRAM> = unsafe { Peripheral::new(335548416) };
#[doc = "CSE_PRAM"]
pub mod cse_pram {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - CSE PRAM 0 Register"]
        pub embedded_ram0: EMBEDDEDRAM0,
        #[doc = "0x04 - CSE PRAM 1 Register"]
        pub embedded_ram1: EMBEDDEDRAM1,
        #[doc = "0x08 - CSE PRAM 2 Register"]
        pub embedded_ram2: EMBEDDEDRAM2,
        #[doc = "0x0c - CSE PRAM 3 Register"]
        pub embedded_ram3: EMBEDDEDRAM3,
        #[doc = "0x10 - CSE PRAM 4 Register"]
        pub embedded_ram4: EMBEDDEDRAM4,
        #[doc = "0x14 - CSE PRAM 5 Register"]
        pub embedded_ram5: EMBEDDEDRAM5,
        #[doc = "0x18 - CSE PRAM 6 Register"]
        pub embedded_ram6: EMBEDDEDRAM6,
        #[doc = "0x1c - CSE PRAM 7 Register"]
        pub embedded_ram7: EMBEDDEDRAM7,
        #[doc = "0x20 - CSE PRAM 8 Register"]
        pub embedded_ram8: EMBEDDEDRAM8,
        #[doc = "0x24 - CSE PRAM 9 Register"]
        pub embedded_ram9: EMBEDDEDRAM9,
        #[doc = "0x28 - CSE PRAM 10 Register"]
        pub embedded_ram10: EMBEDDEDRAM10,
        #[doc = "0x2c - CSE PRAM 11 Register"]
        pub embedded_ram11: EMBEDDEDRAM11,
        #[doc = "0x30 - CSE PRAM 12 Register"]
        pub embedded_ram12: EMBEDDEDRAM12,
        #[doc = "0x34 - CSE PRAM 13 Register"]
        pub embedded_ram13: EMBEDDEDRAM13,
        #[doc = "0x38 - CSE PRAM 14 Register"]
        pub embedded_ram14: EMBEDDEDRAM14,
        #[doc = "0x3c - CSE PRAM 15 Register"]
        pub embedded_ram15: EMBEDDEDRAM15,
        #[doc = "0x40 - CSE PRAM 16 Register"]
        pub embedded_ram16: EMBEDDEDRAM16,
        #[doc = "0x44 - CSE PRAM 17 Register"]
        pub embedded_ram17: EMBEDDEDRAM17,
        #[doc = "0x48 - CSE PRAM 18 Register"]
        pub embedded_ram18: EMBEDDEDRAM18,
        #[doc = "0x4c - CSE PRAM 19 Register"]
        pub embedded_ram19: EMBEDDEDRAM19,
        #[doc = "0x50 - CSE PRAM 20 Register"]
        pub embedded_ram20: EMBEDDEDRAM20,
        #[doc = "0x54 - CSE PRAM 21 Register"]
        pub embedded_ram21: EMBEDDEDRAM21,
        #[doc = "0x58 - CSE PRAM 22 Register"]
        pub embedded_ram22: EMBEDDEDRAM22,
        #[doc = "0x5c - CSE PRAM 23 Register"]
        pub embedded_ram23: EMBEDDEDRAM23,
        #[doc = "0x60 - CSE PRAM 24 Register"]
        pub embedded_ram24: EMBEDDEDRAM24,
        #[doc = "0x64 - CSE PRAM 25 Register"]
        pub embedded_ram25: EMBEDDEDRAM25,
        #[doc = "0x68 - CSE PRAM 26 Register"]
        pub embedded_ram26: EMBEDDEDRAM26,
        #[doc = "0x6c - CSE PRAM 27 Register"]
        pub embedded_ram27: EMBEDDEDRAM27,
        #[doc = "0x70 - CSE PRAM 28 Register"]
        pub embedded_ram28: EMBEDDEDRAM28,
        #[doc = "0x74 - CSE PRAM 29 Register"]
        pub embedded_ram29: EMBEDDEDRAM29,
        #[doc = "0x78 - CSE PRAM 30 Register"]
        pub embedded_ram30: EMBEDDEDRAM30,
        #[doc = "0x7c - CSE PRAM 31 Register"]
        pub embedded_ram31: EMBEDDEDRAM31,
    }
    #[doc = "CSE PRAM 0 Register"]
    pub struct EMBEDDEDRAM0 {
        register: VolatileCell<u32>,
    }
    #[doc = "CSE PRAM 0 Register"]
    pub mod embedded_ram0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EMBEDDEDRAM0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_3R {
            bits: u8,
        }
        impl BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_2R {
            bits: u8,
        }
        impl BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_1R {
            bits: u8,
        }
        impl BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_0R {
            bits: u8,
        }
        impl BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&self) -> BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&self) -> BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&self) -> BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&self) -> BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&mut self) -> _BYTE_3W {
                _BYTE_3W { w: self }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&mut self) -> _BYTE_2W {
                _BYTE_2W { w: self }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&mut self) -> _BYTE_1W {
                _BYTE_1W { w: self }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&mut self) -> _BYTE_0W {
                _BYTE_0W { w: self }
            }
        }
    }
    #[doc = "CSE PRAM0LL register."]
    pub struct EMBEDDEDRAM0LL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM0LL register."]
    pub mod embedded_ram0ll {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM0LL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LLR {
            bits: u8,
        }
        impl RAM_LLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&self) -> RAM_LLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&mut self) -> _RAM_LLW {
                _RAM_LLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM0LU register."]
    pub struct EMBEDDEDRAM0LU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM0LU register."]
    pub mod embedded_ram0lu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM0LU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LUR {
            bits: u8,
        }
        impl RAM_LUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&self) -> RAM_LUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&mut self) -> _RAM_LUW {
                _RAM_LUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM0HL register."]
    pub struct EMBEDDEDRAM0HL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM0HL register."]
    pub mod embedded_ram0hl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM0HL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HLR {
            bits: u8,
        }
        impl RAM_HLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&self) -> RAM_HLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&mut self) -> _RAM_HLW {
                _RAM_HLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM0HU register."]
    pub struct EMBEDDEDRAM0HU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM0HU register."]
    pub mod embedded_ram0hu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM0HU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HUR {
            bits: u8,
        }
        impl RAM_HUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&self) -> RAM_HUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&mut self) -> _RAM_HUW {
                _RAM_HUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM 1 Register"]
    pub struct EMBEDDEDRAM1 {
        register: VolatileCell<u32>,
    }
    #[doc = "CSE PRAM 1 Register"]
    pub mod embedded_ram1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EMBEDDEDRAM1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_3R {
            bits: u8,
        }
        impl BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_2R {
            bits: u8,
        }
        impl BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_1R {
            bits: u8,
        }
        impl BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_0R {
            bits: u8,
        }
        impl BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&self) -> BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&self) -> BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&self) -> BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&self) -> BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&mut self) -> _BYTE_3W {
                _BYTE_3W { w: self }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&mut self) -> _BYTE_2W {
                _BYTE_2W { w: self }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&mut self) -> _BYTE_1W {
                _BYTE_1W { w: self }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&mut self) -> _BYTE_0W {
                _BYTE_0W { w: self }
            }
        }
    }
    #[doc = "CSE PRAM1LL register."]
    pub struct EMBEDDEDRAM1LL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM1LL register."]
    pub mod embedded_ram1ll {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM1LL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LLR {
            bits: u8,
        }
        impl RAM_LLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&self) -> RAM_LLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&mut self) -> _RAM_LLW {
                _RAM_LLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM1LU register."]
    pub struct EMBEDDEDRAM1LU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM1LU register."]
    pub mod embedded_ram1lu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM1LU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LUR {
            bits: u8,
        }
        impl RAM_LUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&self) -> RAM_LUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&mut self) -> _RAM_LUW {
                _RAM_LUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM1HL register."]
    pub struct EMBEDDEDRAM1HL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM1HL register."]
    pub mod embedded_ram1hl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM1HL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HLR {
            bits: u8,
        }
        impl RAM_HLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&self) -> RAM_HLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&mut self) -> _RAM_HLW {
                _RAM_HLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM1HU register."]
    pub struct EMBEDDEDRAM1HU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM1HU register."]
    pub mod embedded_ram1hu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM1HU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HUR {
            bits: u8,
        }
        impl RAM_HUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&self) -> RAM_HUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&mut self) -> _RAM_HUW {
                _RAM_HUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM 2 Register"]
    pub struct EMBEDDEDRAM2 {
        register: VolatileCell<u32>,
    }
    #[doc = "CSE PRAM 2 Register"]
    pub mod embedded_ram2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EMBEDDEDRAM2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_3R {
            bits: u8,
        }
        impl BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_2R {
            bits: u8,
        }
        impl BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_1R {
            bits: u8,
        }
        impl BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_0R {
            bits: u8,
        }
        impl BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&self) -> BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&self) -> BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&self) -> BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&self) -> BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&mut self) -> _BYTE_3W {
                _BYTE_3W { w: self }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&mut self) -> _BYTE_2W {
                _BYTE_2W { w: self }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&mut self) -> _BYTE_1W {
                _BYTE_1W { w: self }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&mut self) -> _BYTE_0W {
                _BYTE_0W { w: self }
            }
        }
    }
    #[doc = "CSE PRAM2LL register."]
    pub struct EMBEDDEDRAM2LL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM2LL register."]
    pub mod embedded_ram2ll {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM2LL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LLR {
            bits: u8,
        }
        impl RAM_LLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&self) -> RAM_LLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&mut self) -> _RAM_LLW {
                _RAM_LLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM2LU register."]
    pub struct EMBEDDEDRAM2LU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM2LU register."]
    pub mod embedded_ram2lu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM2LU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LUR {
            bits: u8,
        }
        impl RAM_LUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&self) -> RAM_LUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&mut self) -> _RAM_LUW {
                _RAM_LUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM2HL register."]
    pub struct EMBEDDEDRAM2HL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM2HL register."]
    pub mod embedded_ram2hl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM2HL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HLR {
            bits: u8,
        }
        impl RAM_HLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&self) -> RAM_HLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&mut self) -> _RAM_HLW {
                _RAM_HLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM2HU register."]
    pub struct EMBEDDEDRAM2HU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM2HU register."]
    pub mod embedded_ram2hu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM2HU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HUR {
            bits: u8,
        }
        impl RAM_HUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&self) -> RAM_HUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&mut self) -> _RAM_HUW {
                _RAM_HUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM 3 Register"]
    pub struct EMBEDDEDRAM3 {
        register: VolatileCell<u32>,
    }
    #[doc = "CSE PRAM 3 Register"]
    pub mod embedded_ram3 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EMBEDDEDRAM3 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_3R {
            bits: u8,
        }
        impl BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_2R {
            bits: u8,
        }
        impl BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_1R {
            bits: u8,
        }
        impl BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_0R {
            bits: u8,
        }
        impl BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&self) -> BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&self) -> BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&self) -> BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&self) -> BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&mut self) -> _BYTE_3W {
                _BYTE_3W { w: self }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&mut self) -> _BYTE_2W {
                _BYTE_2W { w: self }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&mut self) -> _BYTE_1W {
                _BYTE_1W { w: self }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&mut self) -> _BYTE_0W {
                _BYTE_0W { w: self }
            }
        }
    }
    #[doc = "CSE PRAM3LL register."]
    pub struct EMBEDDEDRAM3LL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM3LL register."]
    pub mod embedded_ram3ll {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM3LL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LLR {
            bits: u8,
        }
        impl RAM_LLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&self) -> RAM_LLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&mut self) -> _RAM_LLW {
                _RAM_LLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM3LU register."]
    pub struct EMBEDDEDRAM3LU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM3LU register."]
    pub mod embedded_ram3lu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM3LU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LUR {
            bits: u8,
        }
        impl RAM_LUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&self) -> RAM_LUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&mut self) -> _RAM_LUW {
                _RAM_LUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM3HL register."]
    pub struct EMBEDDEDRAM3HL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM3HL register."]
    pub mod embedded_ram3hl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM3HL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HLR {
            bits: u8,
        }
        impl RAM_HLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&self) -> RAM_HLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&mut self) -> _RAM_HLW {
                _RAM_HLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM3HU register."]
    pub struct EMBEDDEDRAM3HU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM3HU register."]
    pub mod embedded_ram3hu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM3HU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HUR {
            bits: u8,
        }
        impl RAM_HUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&self) -> RAM_HUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&mut self) -> _RAM_HUW {
                _RAM_HUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM 4 Register"]
    pub struct EMBEDDEDRAM4 {
        register: VolatileCell<u32>,
    }
    #[doc = "CSE PRAM 4 Register"]
    pub mod embedded_ram4 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EMBEDDEDRAM4 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_3R {
            bits: u8,
        }
        impl BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_2R {
            bits: u8,
        }
        impl BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_1R {
            bits: u8,
        }
        impl BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_0R {
            bits: u8,
        }
        impl BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&self) -> BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&self) -> BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&self) -> BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&self) -> BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&mut self) -> _BYTE_3W {
                _BYTE_3W { w: self }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&mut self) -> _BYTE_2W {
                _BYTE_2W { w: self }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&mut self) -> _BYTE_1W {
                _BYTE_1W { w: self }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&mut self) -> _BYTE_0W {
                _BYTE_0W { w: self }
            }
        }
    }
    #[doc = "CSE PRAM4LL register."]
    pub struct EMBEDDEDRAM4LL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM4LL register."]
    pub mod embedded_ram4ll {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM4LL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LLR {
            bits: u8,
        }
        impl RAM_LLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&self) -> RAM_LLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&mut self) -> _RAM_LLW {
                _RAM_LLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM4LU register."]
    pub struct EMBEDDEDRAM4LU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM4LU register."]
    pub mod embedded_ram4lu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM4LU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LUR {
            bits: u8,
        }
        impl RAM_LUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&self) -> RAM_LUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&mut self) -> _RAM_LUW {
                _RAM_LUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM4HL register."]
    pub struct EMBEDDEDRAM4HL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM4HL register."]
    pub mod embedded_ram4hl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM4HL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HLR {
            bits: u8,
        }
        impl RAM_HLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&self) -> RAM_HLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&mut self) -> _RAM_HLW {
                _RAM_HLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM4HU register."]
    pub struct EMBEDDEDRAM4HU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM4HU register."]
    pub mod embedded_ram4hu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM4HU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HUR {
            bits: u8,
        }
        impl RAM_HUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&self) -> RAM_HUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&mut self) -> _RAM_HUW {
                _RAM_HUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM 5 Register"]
    pub struct EMBEDDEDRAM5 {
        register: VolatileCell<u32>,
    }
    #[doc = "CSE PRAM 5 Register"]
    pub mod embedded_ram5 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EMBEDDEDRAM5 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_3R {
            bits: u8,
        }
        impl BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_2R {
            bits: u8,
        }
        impl BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_1R {
            bits: u8,
        }
        impl BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_0R {
            bits: u8,
        }
        impl BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&self) -> BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&self) -> BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&self) -> BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&self) -> BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&mut self) -> _BYTE_3W {
                _BYTE_3W { w: self }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&mut self) -> _BYTE_2W {
                _BYTE_2W { w: self }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&mut self) -> _BYTE_1W {
                _BYTE_1W { w: self }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&mut self) -> _BYTE_0W {
                _BYTE_0W { w: self }
            }
        }
    }
    #[doc = "CSE PRAM5LL register."]
    pub struct EMBEDDEDRAM5LL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM5LL register."]
    pub mod embedded_ram5ll {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM5LL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LLR {
            bits: u8,
        }
        impl RAM_LLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&self) -> RAM_LLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&mut self) -> _RAM_LLW {
                _RAM_LLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM5LU register."]
    pub struct EMBEDDEDRAM5LU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM5LU register."]
    pub mod embedded_ram5lu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM5LU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LUR {
            bits: u8,
        }
        impl RAM_LUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&self) -> RAM_LUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&mut self) -> _RAM_LUW {
                _RAM_LUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM5HL register."]
    pub struct EMBEDDEDRAM5HL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM5HL register."]
    pub mod embedded_ram5hl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM5HL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HLR {
            bits: u8,
        }
        impl RAM_HLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&self) -> RAM_HLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&mut self) -> _RAM_HLW {
                _RAM_HLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM5HU register."]
    pub struct EMBEDDEDRAM5HU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM5HU register."]
    pub mod embedded_ram5hu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM5HU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HUR {
            bits: u8,
        }
        impl RAM_HUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&self) -> RAM_HUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&mut self) -> _RAM_HUW {
                _RAM_HUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM 6 Register"]
    pub struct EMBEDDEDRAM6 {
        register: VolatileCell<u32>,
    }
    #[doc = "CSE PRAM 6 Register"]
    pub mod embedded_ram6 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EMBEDDEDRAM6 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_3R {
            bits: u8,
        }
        impl BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_2R {
            bits: u8,
        }
        impl BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_1R {
            bits: u8,
        }
        impl BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_0R {
            bits: u8,
        }
        impl BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&self) -> BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&self) -> BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&self) -> BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&self) -> BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&mut self) -> _BYTE_3W {
                _BYTE_3W { w: self }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&mut self) -> _BYTE_2W {
                _BYTE_2W { w: self }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&mut self) -> _BYTE_1W {
                _BYTE_1W { w: self }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&mut self) -> _BYTE_0W {
                _BYTE_0W { w: self }
            }
        }
    }
    #[doc = "CSE PRAM6LL register."]
    pub struct EMBEDDEDRAM6LL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM6LL register."]
    pub mod embedded_ram6ll {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM6LL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LLR {
            bits: u8,
        }
        impl RAM_LLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&self) -> RAM_LLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&mut self) -> _RAM_LLW {
                _RAM_LLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM6LU register."]
    pub struct EMBEDDEDRAM6LU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM6LU register."]
    pub mod embedded_ram6lu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM6LU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LUR {
            bits: u8,
        }
        impl RAM_LUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&self) -> RAM_LUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&mut self) -> _RAM_LUW {
                _RAM_LUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM6HL register."]
    pub struct EMBEDDEDRAM6HL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM6HL register."]
    pub mod embedded_ram6hl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM6HL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HLR {
            bits: u8,
        }
        impl RAM_HLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&self) -> RAM_HLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&mut self) -> _RAM_HLW {
                _RAM_HLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM6HU register."]
    pub struct EMBEDDEDRAM6HU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM6HU register."]
    pub mod embedded_ram6hu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM6HU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HUR {
            bits: u8,
        }
        impl RAM_HUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&self) -> RAM_HUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&mut self) -> _RAM_HUW {
                _RAM_HUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM 7 Register"]
    pub struct EMBEDDEDRAM7 {
        register: VolatileCell<u32>,
    }
    #[doc = "CSE PRAM 7 Register"]
    pub mod embedded_ram7 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EMBEDDEDRAM7 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_3R {
            bits: u8,
        }
        impl BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_2R {
            bits: u8,
        }
        impl BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_1R {
            bits: u8,
        }
        impl BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_0R {
            bits: u8,
        }
        impl BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&self) -> BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&self) -> BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&self) -> BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&self) -> BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&mut self) -> _BYTE_3W {
                _BYTE_3W { w: self }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&mut self) -> _BYTE_2W {
                _BYTE_2W { w: self }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&mut self) -> _BYTE_1W {
                _BYTE_1W { w: self }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&mut self) -> _BYTE_0W {
                _BYTE_0W { w: self }
            }
        }
    }
    #[doc = "CSE PRAM7LL register."]
    pub struct EMBEDDEDRAM7LL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM7LL register."]
    pub mod embedded_ram7ll {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM7LL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LLR {
            bits: u8,
        }
        impl RAM_LLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&self) -> RAM_LLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&mut self) -> _RAM_LLW {
                _RAM_LLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM7LU register."]
    pub struct EMBEDDEDRAM7LU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM7LU register."]
    pub mod embedded_ram7lu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM7LU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LUR {
            bits: u8,
        }
        impl RAM_LUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&self) -> RAM_LUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&mut self) -> _RAM_LUW {
                _RAM_LUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM7HL register."]
    pub struct EMBEDDEDRAM7HL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM7HL register."]
    pub mod embedded_ram7hl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM7HL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HLR {
            bits: u8,
        }
        impl RAM_HLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&self) -> RAM_HLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&mut self) -> _RAM_HLW {
                _RAM_HLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM7HU register."]
    pub struct EMBEDDEDRAM7HU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM7HU register."]
    pub mod embedded_ram7hu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM7HU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HUR {
            bits: u8,
        }
        impl RAM_HUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&self) -> RAM_HUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&mut self) -> _RAM_HUW {
                _RAM_HUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM 8 Register"]
    pub struct EMBEDDEDRAM8 {
        register: VolatileCell<u32>,
    }
    #[doc = "CSE PRAM 8 Register"]
    pub mod embedded_ram8 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EMBEDDEDRAM8 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_3R {
            bits: u8,
        }
        impl BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_2R {
            bits: u8,
        }
        impl BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_1R {
            bits: u8,
        }
        impl BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_0R {
            bits: u8,
        }
        impl BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&self) -> BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&self) -> BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&self) -> BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&self) -> BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&mut self) -> _BYTE_3W {
                _BYTE_3W { w: self }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&mut self) -> _BYTE_2W {
                _BYTE_2W { w: self }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&mut self) -> _BYTE_1W {
                _BYTE_1W { w: self }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&mut self) -> _BYTE_0W {
                _BYTE_0W { w: self }
            }
        }
    }
    #[doc = "CSE PRAM8LL register."]
    pub struct EMBEDDEDRAM8LL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM8LL register."]
    pub mod embedded_ram8ll {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM8LL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LLR {
            bits: u8,
        }
        impl RAM_LLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&self) -> RAM_LLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&mut self) -> _RAM_LLW {
                _RAM_LLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM8LU register."]
    pub struct EMBEDDEDRAM8LU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM8LU register."]
    pub mod embedded_ram8lu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM8LU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LUR {
            bits: u8,
        }
        impl RAM_LUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&self) -> RAM_LUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&mut self) -> _RAM_LUW {
                _RAM_LUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM8HL register."]
    pub struct EMBEDDEDRAM8HL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM8HL register."]
    pub mod embedded_ram8hl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM8HL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HLR {
            bits: u8,
        }
        impl RAM_HLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&self) -> RAM_HLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&mut self) -> _RAM_HLW {
                _RAM_HLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM8HU register."]
    pub struct EMBEDDEDRAM8HU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM8HU register."]
    pub mod embedded_ram8hu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM8HU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HUR {
            bits: u8,
        }
        impl RAM_HUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&self) -> RAM_HUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&mut self) -> _RAM_HUW {
                _RAM_HUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM 9 Register"]
    pub struct EMBEDDEDRAM9 {
        register: VolatileCell<u32>,
    }
    #[doc = "CSE PRAM 9 Register"]
    pub mod embedded_ram9 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EMBEDDEDRAM9 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_3R {
            bits: u8,
        }
        impl BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_2R {
            bits: u8,
        }
        impl BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_1R {
            bits: u8,
        }
        impl BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_0R {
            bits: u8,
        }
        impl BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&self) -> BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&self) -> BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&self) -> BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&self) -> BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&mut self) -> _BYTE_3W {
                _BYTE_3W { w: self }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&mut self) -> _BYTE_2W {
                _BYTE_2W { w: self }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&mut self) -> _BYTE_1W {
                _BYTE_1W { w: self }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&mut self) -> _BYTE_0W {
                _BYTE_0W { w: self }
            }
        }
    }
    #[doc = "CSE PRAM9LL register."]
    pub struct EMBEDDEDRAM9LL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM9LL register."]
    pub mod embedded_ram9ll {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM9LL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LLR {
            bits: u8,
        }
        impl RAM_LLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&self) -> RAM_LLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&mut self) -> _RAM_LLW {
                _RAM_LLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM9LU register."]
    pub struct EMBEDDEDRAM9LU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM9LU register."]
    pub mod embedded_ram9lu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM9LU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LUR {
            bits: u8,
        }
        impl RAM_LUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&self) -> RAM_LUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&mut self) -> _RAM_LUW {
                _RAM_LUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM9HL register."]
    pub struct EMBEDDEDRAM9HL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM9HL register."]
    pub mod embedded_ram9hl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM9HL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HLR {
            bits: u8,
        }
        impl RAM_HLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&self) -> RAM_HLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&mut self) -> _RAM_HLW {
                _RAM_HLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM9HU register."]
    pub struct EMBEDDEDRAM9HU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM9HU register."]
    pub mod embedded_ram9hu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM9HU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HUR {
            bits: u8,
        }
        impl RAM_HUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&self) -> RAM_HUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&mut self) -> _RAM_HUW {
                _RAM_HUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM 10 Register"]
    pub struct EMBEDDEDRAM10 {
        register: VolatileCell<u32>,
    }
    #[doc = "CSE PRAM 10 Register"]
    pub mod embedded_ram10 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EMBEDDEDRAM10 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_3R {
            bits: u8,
        }
        impl BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_2R {
            bits: u8,
        }
        impl BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_1R {
            bits: u8,
        }
        impl BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_0R {
            bits: u8,
        }
        impl BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&self) -> BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&self) -> BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&self) -> BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&self) -> BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&mut self) -> _BYTE_3W {
                _BYTE_3W { w: self }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&mut self) -> _BYTE_2W {
                _BYTE_2W { w: self }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&mut self) -> _BYTE_1W {
                _BYTE_1W { w: self }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&mut self) -> _BYTE_0W {
                _BYTE_0W { w: self }
            }
        }
    }
    #[doc = "CSE PRAM10LL register."]
    pub struct EMBEDDEDRAM10LL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM10LL register."]
    pub mod embedded_ram10ll {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM10LL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LLR {
            bits: u8,
        }
        impl RAM_LLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&self) -> RAM_LLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&mut self) -> _RAM_LLW {
                _RAM_LLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM10LU register."]
    pub struct EMBEDDEDRAM10LU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM10LU register."]
    pub mod embedded_ram10lu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM10LU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LUR {
            bits: u8,
        }
        impl RAM_LUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&self) -> RAM_LUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&mut self) -> _RAM_LUW {
                _RAM_LUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM10HL register."]
    pub struct EMBEDDEDRAM10HL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM10HL register."]
    pub mod embedded_ram10hl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM10HL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HLR {
            bits: u8,
        }
        impl RAM_HLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&self) -> RAM_HLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&mut self) -> _RAM_HLW {
                _RAM_HLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM10HU register."]
    pub struct EMBEDDEDRAM10HU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM10HU register."]
    pub mod embedded_ram10hu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM10HU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HUR {
            bits: u8,
        }
        impl RAM_HUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&self) -> RAM_HUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&mut self) -> _RAM_HUW {
                _RAM_HUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM 11 Register"]
    pub struct EMBEDDEDRAM11 {
        register: VolatileCell<u32>,
    }
    #[doc = "CSE PRAM 11 Register"]
    pub mod embedded_ram11 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EMBEDDEDRAM11 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_3R {
            bits: u8,
        }
        impl BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_2R {
            bits: u8,
        }
        impl BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_1R {
            bits: u8,
        }
        impl BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_0R {
            bits: u8,
        }
        impl BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&self) -> BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&self) -> BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&self) -> BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&self) -> BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&mut self) -> _BYTE_3W {
                _BYTE_3W { w: self }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&mut self) -> _BYTE_2W {
                _BYTE_2W { w: self }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&mut self) -> _BYTE_1W {
                _BYTE_1W { w: self }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&mut self) -> _BYTE_0W {
                _BYTE_0W { w: self }
            }
        }
    }
    #[doc = "CSE PRAM11LL register."]
    pub struct EMBEDDEDRAM11LL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM11LL register."]
    pub mod embedded_ram11ll {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM11LL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LLR {
            bits: u8,
        }
        impl RAM_LLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&self) -> RAM_LLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&mut self) -> _RAM_LLW {
                _RAM_LLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM11LU register."]
    pub struct EMBEDDEDRAM11LU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM11LU register."]
    pub mod embedded_ram11lu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM11LU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LUR {
            bits: u8,
        }
        impl RAM_LUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&self) -> RAM_LUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&mut self) -> _RAM_LUW {
                _RAM_LUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM11HL register."]
    pub struct EMBEDDEDRAM11HL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM11HL register."]
    pub mod embedded_ram11hl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM11HL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HLR {
            bits: u8,
        }
        impl RAM_HLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&self) -> RAM_HLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&mut self) -> _RAM_HLW {
                _RAM_HLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM11HU register."]
    pub struct EMBEDDEDRAM11HU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM11HU register."]
    pub mod embedded_ram11hu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM11HU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HUR {
            bits: u8,
        }
        impl RAM_HUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&self) -> RAM_HUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&mut self) -> _RAM_HUW {
                _RAM_HUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM 12 Register"]
    pub struct EMBEDDEDRAM12 {
        register: VolatileCell<u32>,
    }
    #[doc = "CSE PRAM 12 Register"]
    pub mod embedded_ram12 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EMBEDDEDRAM12 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_3R {
            bits: u8,
        }
        impl BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_2R {
            bits: u8,
        }
        impl BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_1R {
            bits: u8,
        }
        impl BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_0R {
            bits: u8,
        }
        impl BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&self) -> BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&self) -> BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&self) -> BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&self) -> BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&mut self) -> _BYTE_3W {
                _BYTE_3W { w: self }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&mut self) -> _BYTE_2W {
                _BYTE_2W { w: self }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&mut self) -> _BYTE_1W {
                _BYTE_1W { w: self }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&mut self) -> _BYTE_0W {
                _BYTE_0W { w: self }
            }
        }
    }
    #[doc = "CSE PRAM12LL register."]
    pub struct EMBEDDEDRAM12LL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM12LL register."]
    pub mod embedded_ram12ll {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM12LL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LLR {
            bits: u8,
        }
        impl RAM_LLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&self) -> RAM_LLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&mut self) -> _RAM_LLW {
                _RAM_LLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM12LU register."]
    pub struct EMBEDDEDRAM12LU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM12LU register."]
    pub mod embedded_ram12lu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM12LU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LUR {
            bits: u8,
        }
        impl RAM_LUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&self) -> RAM_LUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&mut self) -> _RAM_LUW {
                _RAM_LUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM12HL register."]
    pub struct EMBEDDEDRAM12HL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM12HL register."]
    pub mod embedded_ram12hl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM12HL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HLR {
            bits: u8,
        }
        impl RAM_HLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&self) -> RAM_HLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&mut self) -> _RAM_HLW {
                _RAM_HLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM12HU register."]
    pub struct EMBEDDEDRAM12HU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM12HU register."]
    pub mod embedded_ram12hu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM12HU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HUR {
            bits: u8,
        }
        impl RAM_HUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&self) -> RAM_HUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&mut self) -> _RAM_HUW {
                _RAM_HUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM 13 Register"]
    pub struct EMBEDDEDRAM13 {
        register: VolatileCell<u32>,
    }
    #[doc = "CSE PRAM 13 Register"]
    pub mod embedded_ram13 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EMBEDDEDRAM13 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_3R {
            bits: u8,
        }
        impl BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_2R {
            bits: u8,
        }
        impl BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_1R {
            bits: u8,
        }
        impl BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_0R {
            bits: u8,
        }
        impl BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&self) -> BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&self) -> BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&self) -> BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&self) -> BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&mut self) -> _BYTE_3W {
                _BYTE_3W { w: self }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&mut self) -> _BYTE_2W {
                _BYTE_2W { w: self }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&mut self) -> _BYTE_1W {
                _BYTE_1W { w: self }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&mut self) -> _BYTE_0W {
                _BYTE_0W { w: self }
            }
        }
    }
    #[doc = "CSE PRAM13LL register."]
    pub struct EMBEDDEDRAM13LL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM13LL register."]
    pub mod embedded_ram13ll {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM13LL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LLR {
            bits: u8,
        }
        impl RAM_LLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&self) -> RAM_LLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&mut self) -> _RAM_LLW {
                _RAM_LLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM13LU register."]
    pub struct EMBEDDEDRAM13LU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM13LU register."]
    pub mod embedded_ram13lu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM13LU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LUR {
            bits: u8,
        }
        impl RAM_LUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&self) -> RAM_LUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&mut self) -> _RAM_LUW {
                _RAM_LUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM13HL register."]
    pub struct EMBEDDEDRAM13HL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM13HL register."]
    pub mod embedded_ram13hl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM13HL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HLR {
            bits: u8,
        }
        impl RAM_HLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&self) -> RAM_HLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&mut self) -> _RAM_HLW {
                _RAM_HLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM13HU register."]
    pub struct EMBEDDEDRAM13HU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM13HU register."]
    pub mod embedded_ram13hu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM13HU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HUR {
            bits: u8,
        }
        impl RAM_HUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&self) -> RAM_HUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&mut self) -> _RAM_HUW {
                _RAM_HUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM 14 Register"]
    pub struct EMBEDDEDRAM14 {
        register: VolatileCell<u32>,
    }
    #[doc = "CSE PRAM 14 Register"]
    pub mod embedded_ram14 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EMBEDDEDRAM14 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_3R {
            bits: u8,
        }
        impl BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_2R {
            bits: u8,
        }
        impl BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_1R {
            bits: u8,
        }
        impl BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_0R {
            bits: u8,
        }
        impl BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&self) -> BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&self) -> BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&self) -> BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&self) -> BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&mut self) -> _BYTE_3W {
                _BYTE_3W { w: self }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&mut self) -> _BYTE_2W {
                _BYTE_2W { w: self }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&mut self) -> _BYTE_1W {
                _BYTE_1W { w: self }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&mut self) -> _BYTE_0W {
                _BYTE_0W { w: self }
            }
        }
    }
    #[doc = "CSE PRAM14LL register."]
    pub struct EMBEDDEDRAM14LL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM14LL register."]
    pub mod embedded_ram14ll {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM14LL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LLR {
            bits: u8,
        }
        impl RAM_LLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&self) -> RAM_LLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&mut self) -> _RAM_LLW {
                _RAM_LLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM14LU register."]
    pub struct EMBEDDEDRAM14LU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM14LU register."]
    pub mod embedded_ram14lu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM14LU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LUR {
            bits: u8,
        }
        impl RAM_LUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&self) -> RAM_LUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&mut self) -> _RAM_LUW {
                _RAM_LUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM14HL register."]
    pub struct EMBEDDEDRAM14HL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM14HL register."]
    pub mod embedded_ram14hl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM14HL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HLR {
            bits: u8,
        }
        impl RAM_HLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&self) -> RAM_HLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&mut self) -> _RAM_HLW {
                _RAM_HLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM14HU register."]
    pub struct EMBEDDEDRAM14HU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM14HU register."]
    pub mod embedded_ram14hu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM14HU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HUR {
            bits: u8,
        }
        impl RAM_HUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&self) -> RAM_HUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&mut self) -> _RAM_HUW {
                _RAM_HUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM 15 Register"]
    pub struct EMBEDDEDRAM15 {
        register: VolatileCell<u32>,
    }
    #[doc = "CSE PRAM 15 Register"]
    pub mod embedded_ram15 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EMBEDDEDRAM15 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_3R {
            bits: u8,
        }
        impl BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_2R {
            bits: u8,
        }
        impl BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_1R {
            bits: u8,
        }
        impl BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_0R {
            bits: u8,
        }
        impl BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&self) -> BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&self) -> BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&self) -> BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&self) -> BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&mut self) -> _BYTE_3W {
                _BYTE_3W { w: self }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&mut self) -> _BYTE_2W {
                _BYTE_2W { w: self }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&mut self) -> _BYTE_1W {
                _BYTE_1W { w: self }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&mut self) -> _BYTE_0W {
                _BYTE_0W { w: self }
            }
        }
    }
    #[doc = "CSE PRAM15LL register."]
    pub struct EMBEDDEDRAM15LL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM15LL register."]
    pub mod embedded_ram15ll {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM15LL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LLR {
            bits: u8,
        }
        impl RAM_LLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&self) -> RAM_LLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&mut self) -> _RAM_LLW {
                _RAM_LLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM15LU register."]
    pub struct EMBEDDEDRAM15LU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM15LU register."]
    pub mod embedded_ram15lu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM15LU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LUR {
            bits: u8,
        }
        impl RAM_LUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&self) -> RAM_LUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&mut self) -> _RAM_LUW {
                _RAM_LUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM15HL register."]
    pub struct EMBEDDEDRAM15HL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM15HL register."]
    pub mod embedded_ram15hl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM15HL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HLR {
            bits: u8,
        }
        impl RAM_HLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&self) -> RAM_HLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&mut self) -> _RAM_HLW {
                _RAM_HLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM15HU register."]
    pub struct EMBEDDEDRAM15HU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM15HU register."]
    pub mod embedded_ram15hu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM15HU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HUR {
            bits: u8,
        }
        impl RAM_HUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&self) -> RAM_HUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&mut self) -> _RAM_HUW {
                _RAM_HUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM 16 Register"]
    pub struct EMBEDDEDRAM16 {
        register: VolatileCell<u32>,
    }
    #[doc = "CSE PRAM 16 Register"]
    pub mod embedded_ram16 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EMBEDDEDRAM16 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_3R {
            bits: u8,
        }
        impl BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_2R {
            bits: u8,
        }
        impl BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_1R {
            bits: u8,
        }
        impl BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_0R {
            bits: u8,
        }
        impl BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&self) -> BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&self) -> BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&self) -> BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&self) -> BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&mut self) -> _BYTE_3W {
                _BYTE_3W { w: self }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&mut self) -> _BYTE_2W {
                _BYTE_2W { w: self }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&mut self) -> _BYTE_1W {
                _BYTE_1W { w: self }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&mut self) -> _BYTE_0W {
                _BYTE_0W { w: self }
            }
        }
    }
    #[doc = "CSE PRAM16LL register."]
    pub struct EMBEDDEDRAM16LL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM16LL register."]
    pub mod embedded_ram16ll {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM16LL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LLR {
            bits: u8,
        }
        impl RAM_LLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&self) -> RAM_LLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&mut self) -> _RAM_LLW {
                _RAM_LLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM16LU register."]
    pub struct EMBEDDEDRAM16LU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM16LU register."]
    pub mod embedded_ram16lu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM16LU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LUR {
            bits: u8,
        }
        impl RAM_LUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&self) -> RAM_LUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&mut self) -> _RAM_LUW {
                _RAM_LUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM16HL register."]
    pub struct EMBEDDEDRAM16HL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM16HL register."]
    pub mod embedded_ram16hl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM16HL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HLR {
            bits: u8,
        }
        impl RAM_HLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&self) -> RAM_HLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&mut self) -> _RAM_HLW {
                _RAM_HLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM16HU register."]
    pub struct EMBEDDEDRAM16HU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM16HU register."]
    pub mod embedded_ram16hu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM16HU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HUR {
            bits: u8,
        }
        impl RAM_HUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&self) -> RAM_HUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&mut self) -> _RAM_HUW {
                _RAM_HUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM 17 Register"]
    pub struct EMBEDDEDRAM17 {
        register: VolatileCell<u32>,
    }
    #[doc = "CSE PRAM 17 Register"]
    pub mod embedded_ram17 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EMBEDDEDRAM17 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_3R {
            bits: u8,
        }
        impl BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_2R {
            bits: u8,
        }
        impl BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_1R {
            bits: u8,
        }
        impl BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_0R {
            bits: u8,
        }
        impl BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&self) -> BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&self) -> BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&self) -> BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&self) -> BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&mut self) -> _BYTE_3W {
                _BYTE_3W { w: self }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&mut self) -> _BYTE_2W {
                _BYTE_2W { w: self }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&mut self) -> _BYTE_1W {
                _BYTE_1W { w: self }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&mut self) -> _BYTE_0W {
                _BYTE_0W { w: self }
            }
        }
    }
    #[doc = "CSE PRAM17LL register."]
    pub struct EMBEDDEDRAM17LL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM17LL register."]
    pub mod embedded_ram17ll {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM17LL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LLR {
            bits: u8,
        }
        impl RAM_LLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&self) -> RAM_LLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&mut self) -> _RAM_LLW {
                _RAM_LLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM17LU register."]
    pub struct EMBEDDEDRAM17LU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM17LU register."]
    pub mod embedded_ram17lu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM17LU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LUR {
            bits: u8,
        }
        impl RAM_LUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&self) -> RAM_LUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&mut self) -> _RAM_LUW {
                _RAM_LUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM17HL register."]
    pub struct EMBEDDEDRAM17HL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM17HL register."]
    pub mod embedded_ram17hl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM17HL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HLR {
            bits: u8,
        }
        impl RAM_HLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&self) -> RAM_HLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&mut self) -> _RAM_HLW {
                _RAM_HLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM17HU register."]
    pub struct EMBEDDEDRAM17HU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM17HU register."]
    pub mod embedded_ram17hu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM17HU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HUR {
            bits: u8,
        }
        impl RAM_HUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&self) -> RAM_HUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&mut self) -> _RAM_HUW {
                _RAM_HUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM 18 Register"]
    pub struct EMBEDDEDRAM18 {
        register: VolatileCell<u32>,
    }
    #[doc = "CSE PRAM 18 Register"]
    pub mod embedded_ram18 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EMBEDDEDRAM18 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_3R {
            bits: u8,
        }
        impl BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_2R {
            bits: u8,
        }
        impl BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_1R {
            bits: u8,
        }
        impl BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_0R {
            bits: u8,
        }
        impl BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&self) -> BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&self) -> BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&self) -> BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&self) -> BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&mut self) -> _BYTE_3W {
                _BYTE_3W { w: self }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&mut self) -> _BYTE_2W {
                _BYTE_2W { w: self }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&mut self) -> _BYTE_1W {
                _BYTE_1W { w: self }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&mut self) -> _BYTE_0W {
                _BYTE_0W { w: self }
            }
        }
    }
    #[doc = "CSE PRAM18LL register."]
    pub struct EMBEDDEDRAM18LL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM18LL register."]
    pub mod embedded_ram18ll {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM18LL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LLR {
            bits: u8,
        }
        impl RAM_LLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&self) -> RAM_LLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&mut self) -> _RAM_LLW {
                _RAM_LLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM18LU register."]
    pub struct EMBEDDEDRAM18LU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM18LU register."]
    pub mod embedded_ram18lu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM18LU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LUR {
            bits: u8,
        }
        impl RAM_LUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&self) -> RAM_LUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&mut self) -> _RAM_LUW {
                _RAM_LUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM18HL register."]
    pub struct EMBEDDEDRAM18HL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM18HL register."]
    pub mod embedded_ram18hl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM18HL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HLR {
            bits: u8,
        }
        impl RAM_HLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&self) -> RAM_HLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&mut self) -> _RAM_HLW {
                _RAM_HLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM18HU register."]
    pub struct EMBEDDEDRAM18HU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM18HU register."]
    pub mod embedded_ram18hu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM18HU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HUR {
            bits: u8,
        }
        impl RAM_HUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&self) -> RAM_HUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&mut self) -> _RAM_HUW {
                _RAM_HUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM 19 Register"]
    pub struct EMBEDDEDRAM19 {
        register: VolatileCell<u32>,
    }
    #[doc = "CSE PRAM 19 Register"]
    pub mod embedded_ram19 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EMBEDDEDRAM19 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_3R {
            bits: u8,
        }
        impl BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_2R {
            bits: u8,
        }
        impl BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_1R {
            bits: u8,
        }
        impl BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_0R {
            bits: u8,
        }
        impl BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&self) -> BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&self) -> BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&self) -> BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&self) -> BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&mut self) -> _BYTE_3W {
                _BYTE_3W { w: self }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&mut self) -> _BYTE_2W {
                _BYTE_2W { w: self }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&mut self) -> _BYTE_1W {
                _BYTE_1W { w: self }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&mut self) -> _BYTE_0W {
                _BYTE_0W { w: self }
            }
        }
    }
    #[doc = "CSE PRAM19LL register."]
    pub struct EMBEDDEDRAM19LL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM19LL register."]
    pub mod embedded_ram19ll {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM19LL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LLR {
            bits: u8,
        }
        impl RAM_LLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&self) -> RAM_LLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&mut self) -> _RAM_LLW {
                _RAM_LLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM19LU register."]
    pub struct EMBEDDEDRAM19LU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM19LU register."]
    pub mod embedded_ram19lu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM19LU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LUR {
            bits: u8,
        }
        impl RAM_LUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&self) -> RAM_LUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&mut self) -> _RAM_LUW {
                _RAM_LUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM19HL register."]
    pub struct EMBEDDEDRAM19HL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM19HL register."]
    pub mod embedded_ram19hl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM19HL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HLR {
            bits: u8,
        }
        impl RAM_HLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&self) -> RAM_HLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&mut self) -> _RAM_HLW {
                _RAM_HLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM19HU register."]
    pub struct EMBEDDEDRAM19HU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM19HU register."]
    pub mod embedded_ram19hu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM19HU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HUR {
            bits: u8,
        }
        impl RAM_HUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&self) -> RAM_HUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&mut self) -> _RAM_HUW {
                _RAM_HUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM 20 Register"]
    pub struct EMBEDDEDRAM20 {
        register: VolatileCell<u32>,
    }
    #[doc = "CSE PRAM 20 Register"]
    pub mod embedded_ram20 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EMBEDDEDRAM20 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_3R {
            bits: u8,
        }
        impl BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_2R {
            bits: u8,
        }
        impl BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_1R {
            bits: u8,
        }
        impl BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_0R {
            bits: u8,
        }
        impl BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&self) -> BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&self) -> BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&self) -> BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&self) -> BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&mut self) -> _BYTE_3W {
                _BYTE_3W { w: self }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&mut self) -> _BYTE_2W {
                _BYTE_2W { w: self }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&mut self) -> _BYTE_1W {
                _BYTE_1W { w: self }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&mut self) -> _BYTE_0W {
                _BYTE_0W { w: self }
            }
        }
    }
    #[doc = "CSE PRAM20LL register."]
    pub struct EMBEDDEDRAM20LL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM20LL register."]
    pub mod embedded_ram20ll {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM20LL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LLR {
            bits: u8,
        }
        impl RAM_LLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&self) -> RAM_LLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&mut self) -> _RAM_LLW {
                _RAM_LLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM20LU register."]
    pub struct EMBEDDEDRAM20LU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM20LU register."]
    pub mod embedded_ram20lu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM20LU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LUR {
            bits: u8,
        }
        impl RAM_LUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&self) -> RAM_LUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&mut self) -> _RAM_LUW {
                _RAM_LUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM20HL register."]
    pub struct EMBEDDEDRAM20HL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM20HL register."]
    pub mod embedded_ram20hl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM20HL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HLR {
            bits: u8,
        }
        impl RAM_HLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&self) -> RAM_HLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&mut self) -> _RAM_HLW {
                _RAM_HLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM20HU register."]
    pub struct EMBEDDEDRAM20HU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM20HU register."]
    pub mod embedded_ram20hu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM20HU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HUR {
            bits: u8,
        }
        impl RAM_HUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&self) -> RAM_HUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&mut self) -> _RAM_HUW {
                _RAM_HUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM 21 Register"]
    pub struct EMBEDDEDRAM21 {
        register: VolatileCell<u32>,
    }
    #[doc = "CSE PRAM 21 Register"]
    pub mod embedded_ram21 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EMBEDDEDRAM21 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_3R {
            bits: u8,
        }
        impl BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_2R {
            bits: u8,
        }
        impl BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_1R {
            bits: u8,
        }
        impl BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_0R {
            bits: u8,
        }
        impl BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&self) -> BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&self) -> BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&self) -> BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&self) -> BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&mut self) -> _BYTE_3W {
                _BYTE_3W { w: self }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&mut self) -> _BYTE_2W {
                _BYTE_2W { w: self }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&mut self) -> _BYTE_1W {
                _BYTE_1W { w: self }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&mut self) -> _BYTE_0W {
                _BYTE_0W { w: self }
            }
        }
    }
    #[doc = "CSE PRAM21LL register."]
    pub struct EMBEDDEDRAM21LL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM21LL register."]
    pub mod embedded_ram21ll {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM21LL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LLR {
            bits: u8,
        }
        impl RAM_LLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&self) -> RAM_LLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&mut self) -> _RAM_LLW {
                _RAM_LLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM21LU register."]
    pub struct EMBEDDEDRAM21LU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM21LU register."]
    pub mod embedded_ram21lu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM21LU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LUR {
            bits: u8,
        }
        impl RAM_LUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&self) -> RAM_LUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&mut self) -> _RAM_LUW {
                _RAM_LUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM21HL register."]
    pub struct EMBEDDEDRAM21HL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM21HL register."]
    pub mod embedded_ram21hl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM21HL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HLR {
            bits: u8,
        }
        impl RAM_HLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&self) -> RAM_HLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&mut self) -> _RAM_HLW {
                _RAM_HLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM21HU register."]
    pub struct EMBEDDEDRAM21HU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM21HU register."]
    pub mod embedded_ram21hu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM21HU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HUR {
            bits: u8,
        }
        impl RAM_HUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&self) -> RAM_HUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&mut self) -> _RAM_HUW {
                _RAM_HUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM 22 Register"]
    pub struct EMBEDDEDRAM22 {
        register: VolatileCell<u32>,
    }
    #[doc = "CSE PRAM 22 Register"]
    pub mod embedded_ram22 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EMBEDDEDRAM22 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_3R {
            bits: u8,
        }
        impl BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_2R {
            bits: u8,
        }
        impl BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_1R {
            bits: u8,
        }
        impl BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_0R {
            bits: u8,
        }
        impl BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&self) -> BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&self) -> BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&self) -> BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&self) -> BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&mut self) -> _BYTE_3W {
                _BYTE_3W { w: self }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&mut self) -> _BYTE_2W {
                _BYTE_2W { w: self }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&mut self) -> _BYTE_1W {
                _BYTE_1W { w: self }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&mut self) -> _BYTE_0W {
                _BYTE_0W { w: self }
            }
        }
    }
    #[doc = "CSE PRAM22LL register."]
    pub struct EMBEDDEDRAM22LL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM22LL register."]
    pub mod embedded_ram22ll {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM22LL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LLR {
            bits: u8,
        }
        impl RAM_LLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&self) -> RAM_LLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&mut self) -> _RAM_LLW {
                _RAM_LLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM22LU register."]
    pub struct EMBEDDEDRAM22LU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM22LU register."]
    pub mod embedded_ram22lu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM22LU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LUR {
            bits: u8,
        }
        impl RAM_LUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&self) -> RAM_LUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&mut self) -> _RAM_LUW {
                _RAM_LUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM22HL register."]
    pub struct EMBEDDEDRAM22HL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM22HL register."]
    pub mod embedded_ram22hl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM22HL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HLR {
            bits: u8,
        }
        impl RAM_HLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&self) -> RAM_HLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&mut self) -> _RAM_HLW {
                _RAM_HLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM22HU register."]
    pub struct EMBEDDEDRAM22HU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM22HU register."]
    pub mod embedded_ram22hu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM22HU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HUR {
            bits: u8,
        }
        impl RAM_HUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&self) -> RAM_HUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&mut self) -> _RAM_HUW {
                _RAM_HUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM 23 Register"]
    pub struct EMBEDDEDRAM23 {
        register: VolatileCell<u32>,
    }
    #[doc = "CSE PRAM 23 Register"]
    pub mod embedded_ram23 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EMBEDDEDRAM23 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_3R {
            bits: u8,
        }
        impl BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_2R {
            bits: u8,
        }
        impl BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_1R {
            bits: u8,
        }
        impl BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_0R {
            bits: u8,
        }
        impl BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&self) -> BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&self) -> BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&self) -> BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&self) -> BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&mut self) -> _BYTE_3W {
                _BYTE_3W { w: self }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&mut self) -> _BYTE_2W {
                _BYTE_2W { w: self }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&mut self) -> _BYTE_1W {
                _BYTE_1W { w: self }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&mut self) -> _BYTE_0W {
                _BYTE_0W { w: self }
            }
        }
    }
    #[doc = "CSE PRAM23LL register."]
    pub struct EMBEDDEDRAM23LL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM23LL register."]
    pub mod embedded_ram23ll {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM23LL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LLR {
            bits: u8,
        }
        impl RAM_LLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&self) -> RAM_LLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&mut self) -> _RAM_LLW {
                _RAM_LLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM23LU register."]
    pub struct EMBEDDEDRAM23LU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM23LU register."]
    pub mod embedded_ram23lu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM23LU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LUR {
            bits: u8,
        }
        impl RAM_LUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&self) -> RAM_LUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&mut self) -> _RAM_LUW {
                _RAM_LUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM23HL register."]
    pub struct EMBEDDEDRAM23HL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM23HL register."]
    pub mod embedded_ram23hl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM23HL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HLR {
            bits: u8,
        }
        impl RAM_HLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&self) -> RAM_HLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&mut self) -> _RAM_HLW {
                _RAM_HLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM23HU register."]
    pub struct EMBEDDEDRAM23HU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM23HU register."]
    pub mod embedded_ram23hu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM23HU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HUR {
            bits: u8,
        }
        impl RAM_HUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&self) -> RAM_HUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&mut self) -> _RAM_HUW {
                _RAM_HUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM 24 Register"]
    pub struct EMBEDDEDRAM24 {
        register: VolatileCell<u32>,
    }
    #[doc = "CSE PRAM 24 Register"]
    pub mod embedded_ram24 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EMBEDDEDRAM24 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_3R {
            bits: u8,
        }
        impl BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_2R {
            bits: u8,
        }
        impl BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_1R {
            bits: u8,
        }
        impl BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_0R {
            bits: u8,
        }
        impl BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&self) -> BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&self) -> BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&self) -> BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&self) -> BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&mut self) -> _BYTE_3W {
                _BYTE_3W { w: self }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&mut self) -> _BYTE_2W {
                _BYTE_2W { w: self }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&mut self) -> _BYTE_1W {
                _BYTE_1W { w: self }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&mut self) -> _BYTE_0W {
                _BYTE_0W { w: self }
            }
        }
    }
    #[doc = "CSE PRAM24LL register."]
    pub struct EMBEDDEDRAM24LL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM24LL register."]
    pub mod embedded_ram24ll {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM24LL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LLR {
            bits: u8,
        }
        impl RAM_LLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&self) -> RAM_LLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&mut self) -> _RAM_LLW {
                _RAM_LLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM24LU register."]
    pub struct EMBEDDEDRAM24LU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM24LU register."]
    pub mod embedded_ram24lu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM24LU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LUR {
            bits: u8,
        }
        impl RAM_LUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&self) -> RAM_LUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&mut self) -> _RAM_LUW {
                _RAM_LUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM24HL register."]
    pub struct EMBEDDEDRAM24HL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM24HL register."]
    pub mod embedded_ram24hl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM24HL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HLR {
            bits: u8,
        }
        impl RAM_HLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&self) -> RAM_HLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&mut self) -> _RAM_HLW {
                _RAM_HLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM24HU register."]
    pub struct EMBEDDEDRAM24HU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM24HU register."]
    pub mod embedded_ram24hu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM24HU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HUR {
            bits: u8,
        }
        impl RAM_HUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&self) -> RAM_HUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&mut self) -> _RAM_HUW {
                _RAM_HUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM 25 Register"]
    pub struct EMBEDDEDRAM25 {
        register: VolatileCell<u32>,
    }
    #[doc = "CSE PRAM 25 Register"]
    pub mod embedded_ram25 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EMBEDDEDRAM25 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_3R {
            bits: u8,
        }
        impl BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_2R {
            bits: u8,
        }
        impl BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_1R {
            bits: u8,
        }
        impl BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_0R {
            bits: u8,
        }
        impl BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&self) -> BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&self) -> BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&self) -> BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&self) -> BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&mut self) -> _BYTE_3W {
                _BYTE_3W { w: self }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&mut self) -> _BYTE_2W {
                _BYTE_2W { w: self }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&mut self) -> _BYTE_1W {
                _BYTE_1W { w: self }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&mut self) -> _BYTE_0W {
                _BYTE_0W { w: self }
            }
        }
    }
    #[doc = "CSE PRAM25LL register."]
    pub struct EMBEDDEDRAM25LL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM25LL register."]
    pub mod embedded_ram25ll {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM25LL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LLR {
            bits: u8,
        }
        impl RAM_LLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&self) -> RAM_LLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&mut self) -> _RAM_LLW {
                _RAM_LLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM25LU register."]
    pub struct EMBEDDEDRAM25LU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM25LU register."]
    pub mod embedded_ram25lu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM25LU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LUR {
            bits: u8,
        }
        impl RAM_LUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&self) -> RAM_LUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&mut self) -> _RAM_LUW {
                _RAM_LUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM25HL register."]
    pub struct EMBEDDEDRAM25HL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM25HL register."]
    pub mod embedded_ram25hl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM25HL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HLR {
            bits: u8,
        }
        impl RAM_HLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&self) -> RAM_HLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&mut self) -> _RAM_HLW {
                _RAM_HLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM25HU register."]
    pub struct EMBEDDEDRAM25HU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM25HU register."]
    pub mod embedded_ram25hu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM25HU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HUR {
            bits: u8,
        }
        impl RAM_HUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&self) -> RAM_HUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&mut self) -> _RAM_HUW {
                _RAM_HUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM 26 Register"]
    pub struct EMBEDDEDRAM26 {
        register: VolatileCell<u32>,
    }
    #[doc = "CSE PRAM 26 Register"]
    pub mod embedded_ram26 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EMBEDDEDRAM26 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_3R {
            bits: u8,
        }
        impl BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_2R {
            bits: u8,
        }
        impl BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_1R {
            bits: u8,
        }
        impl BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_0R {
            bits: u8,
        }
        impl BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&self) -> BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&self) -> BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&self) -> BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&self) -> BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&mut self) -> _BYTE_3W {
                _BYTE_3W { w: self }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&mut self) -> _BYTE_2W {
                _BYTE_2W { w: self }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&mut self) -> _BYTE_1W {
                _BYTE_1W { w: self }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&mut self) -> _BYTE_0W {
                _BYTE_0W { w: self }
            }
        }
    }
    #[doc = "CSE PRAM26LL register."]
    pub struct EMBEDDEDRAM26LL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM26LL register."]
    pub mod embedded_ram26ll {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM26LL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LLR {
            bits: u8,
        }
        impl RAM_LLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&self) -> RAM_LLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&mut self) -> _RAM_LLW {
                _RAM_LLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM26LU register."]
    pub struct EMBEDDEDRAM26LU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM26LU register."]
    pub mod embedded_ram26lu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM26LU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LUR {
            bits: u8,
        }
        impl RAM_LUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&self) -> RAM_LUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&mut self) -> _RAM_LUW {
                _RAM_LUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM26HL register."]
    pub struct EMBEDDEDRAM26HL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM26HL register."]
    pub mod embedded_ram26hl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM26HL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HLR {
            bits: u8,
        }
        impl RAM_HLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&self) -> RAM_HLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&mut self) -> _RAM_HLW {
                _RAM_HLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM26HU register."]
    pub struct EMBEDDEDRAM26HU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM26HU register."]
    pub mod embedded_ram26hu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM26HU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HUR {
            bits: u8,
        }
        impl RAM_HUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&self) -> RAM_HUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&mut self) -> _RAM_HUW {
                _RAM_HUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM 27 Register"]
    pub struct EMBEDDEDRAM27 {
        register: VolatileCell<u32>,
    }
    #[doc = "CSE PRAM 27 Register"]
    pub mod embedded_ram27 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EMBEDDEDRAM27 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_3R {
            bits: u8,
        }
        impl BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_2R {
            bits: u8,
        }
        impl BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_1R {
            bits: u8,
        }
        impl BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_0R {
            bits: u8,
        }
        impl BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&self) -> BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&self) -> BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&self) -> BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&self) -> BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&mut self) -> _BYTE_3W {
                _BYTE_3W { w: self }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&mut self) -> _BYTE_2W {
                _BYTE_2W { w: self }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&mut self) -> _BYTE_1W {
                _BYTE_1W { w: self }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&mut self) -> _BYTE_0W {
                _BYTE_0W { w: self }
            }
        }
    }
    #[doc = "CSE PRAM27LL register."]
    pub struct EMBEDDEDRAM27LL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM27LL register."]
    pub mod embedded_ram27ll {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM27LL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LLR {
            bits: u8,
        }
        impl RAM_LLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&self) -> RAM_LLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&mut self) -> _RAM_LLW {
                _RAM_LLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM27LU register."]
    pub struct EMBEDDEDRAM27LU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM27LU register."]
    pub mod embedded_ram27lu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM27LU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LUR {
            bits: u8,
        }
        impl RAM_LUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&self) -> RAM_LUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&mut self) -> _RAM_LUW {
                _RAM_LUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM27HL register."]
    pub struct EMBEDDEDRAM27HL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM27HL register."]
    pub mod embedded_ram27hl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM27HL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HLR {
            bits: u8,
        }
        impl RAM_HLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&self) -> RAM_HLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&mut self) -> _RAM_HLW {
                _RAM_HLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM27HU register."]
    pub struct EMBEDDEDRAM27HU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM27HU register."]
    pub mod embedded_ram27hu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM27HU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HUR {
            bits: u8,
        }
        impl RAM_HUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&self) -> RAM_HUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&mut self) -> _RAM_HUW {
                _RAM_HUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM 28 Register"]
    pub struct EMBEDDEDRAM28 {
        register: VolatileCell<u32>,
    }
    #[doc = "CSE PRAM 28 Register"]
    pub mod embedded_ram28 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EMBEDDEDRAM28 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_3R {
            bits: u8,
        }
        impl BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_2R {
            bits: u8,
        }
        impl BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_1R {
            bits: u8,
        }
        impl BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_0R {
            bits: u8,
        }
        impl BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&self) -> BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&self) -> BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&self) -> BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&self) -> BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&mut self) -> _BYTE_3W {
                _BYTE_3W { w: self }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&mut self) -> _BYTE_2W {
                _BYTE_2W { w: self }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&mut self) -> _BYTE_1W {
                _BYTE_1W { w: self }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&mut self) -> _BYTE_0W {
                _BYTE_0W { w: self }
            }
        }
    }
    #[doc = "CSE PRAM28LL register."]
    pub struct EMBEDDEDRAM28LL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM28LL register."]
    pub mod embedded_ram28ll {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM28LL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LLR {
            bits: u8,
        }
        impl RAM_LLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&self) -> RAM_LLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&mut self) -> _RAM_LLW {
                _RAM_LLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM28LU register."]
    pub struct EMBEDDEDRAM28LU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM28LU register."]
    pub mod embedded_ram28lu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM28LU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LUR {
            bits: u8,
        }
        impl RAM_LUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&self) -> RAM_LUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&mut self) -> _RAM_LUW {
                _RAM_LUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM28HL register."]
    pub struct EMBEDDEDRAM28HL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM28HL register."]
    pub mod embedded_ram28hl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM28HL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HLR {
            bits: u8,
        }
        impl RAM_HLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&self) -> RAM_HLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&mut self) -> _RAM_HLW {
                _RAM_HLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM28HU register."]
    pub struct EMBEDDEDRAM28HU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM28HU register."]
    pub mod embedded_ram28hu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM28HU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HUR {
            bits: u8,
        }
        impl RAM_HUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&self) -> RAM_HUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&mut self) -> _RAM_HUW {
                _RAM_HUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM 29 Register"]
    pub struct EMBEDDEDRAM29 {
        register: VolatileCell<u32>,
    }
    #[doc = "CSE PRAM 29 Register"]
    pub mod embedded_ram29 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EMBEDDEDRAM29 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_3R {
            bits: u8,
        }
        impl BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_2R {
            bits: u8,
        }
        impl BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_1R {
            bits: u8,
        }
        impl BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_0R {
            bits: u8,
        }
        impl BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&self) -> BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&self) -> BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&self) -> BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&self) -> BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&mut self) -> _BYTE_3W {
                _BYTE_3W { w: self }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&mut self) -> _BYTE_2W {
                _BYTE_2W { w: self }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&mut self) -> _BYTE_1W {
                _BYTE_1W { w: self }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&mut self) -> _BYTE_0W {
                _BYTE_0W { w: self }
            }
        }
    }
    #[doc = "CSE PRAM29LL register."]
    pub struct EMBEDDEDRAM29LL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM29LL register."]
    pub mod embedded_ram29ll {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM29LL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LLR {
            bits: u8,
        }
        impl RAM_LLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&self) -> RAM_LLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&mut self) -> _RAM_LLW {
                _RAM_LLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM29LU register."]
    pub struct EMBEDDEDRAM29LU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM29LU register."]
    pub mod embedded_ram29lu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM29LU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LUR {
            bits: u8,
        }
        impl RAM_LUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&self) -> RAM_LUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&mut self) -> _RAM_LUW {
                _RAM_LUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM29HL register."]
    pub struct EMBEDDEDRAM29HL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM29HL register."]
    pub mod embedded_ram29hl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM29HL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HLR {
            bits: u8,
        }
        impl RAM_HLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&self) -> RAM_HLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&mut self) -> _RAM_HLW {
                _RAM_HLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM29HU register."]
    pub struct EMBEDDEDRAM29HU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM29HU register."]
    pub mod embedded_ram29hu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM29HU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HUR {
            bits: u8,
        }
        impl RAM_HUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&self) -> RAM_HUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&mut self) -> _RAM_HUW {
                _RAM_HUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM 30 Register"]
    pub struct EMBEDDEDRAM30 {
        register: VolatileCell<u32>,
    }
    #[doc = "CSE PRAM 30 Register"]
    pub mod embedded_ram30 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EMBEDDEDRAM30 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_3R {
            bits: u8,
        }
        impl BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_2R {
            bits: u8,
        }
        impl BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_1R {
            bits: u8,
        }
        impl BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_0R {
            bits: u8,
        }
        impl BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&self) -> BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&self) -> BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&self) -> BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&self) -> BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&mut self) -> _BYTE_3W {
                _BYTE_3W { w: self }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&mut self) -> _BYTE_2W {
                _BYTE_2W { w: self }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&mut self) -> _BYTE_1W {
                _BYTE_1W { w: self }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&mut self) -> _BYTE_0W {
                _BYTE_0W { w: self }
            }
        }
    }
    #[doc = "CSE PRAM30LL register."]
    pub struct EMBEDDEDRAM30LL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM30LL register."]
    pub mod embedded_ram30ll {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM30LL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LLR {
            bits: u8,
        }
        impl RAM_LLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&self) -> RAM_LLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&mut self) -> _RAM_LLW {
                _RAM_LLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM30LU register."]
    pub struct EMBEDDEDRAM30LU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM30LU register."]
    pub mod embedded_ram30lu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM30LU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LUR {
            bits: u8,
        }
        impl RAM_LUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&self) -> RAM_LUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&mut self) -> _RAM_LUW {
                _RAM_LUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM30HL register."]
    pub struct EMBEDDEDRAM30HL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM30HL register."]
    pub mod embedded_ram30hl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM30HL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HLR {
            bits: u8,
        }
        impl RAM_HLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&self) -> RAM_HLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&mut self) -> _RAM_HLW {
                _RAM_HLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM30HU register."]
    pub struct EMBEDDEDRAM30HU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM30HU register."]
    pub mod embedded_ram30hu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM30HU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HUR {
            bits: u8,
        }
        impl RAM_HUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&self) -> RAM_HUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&mut self) -> _RAM_HUW {
                _RAM_HUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM 31 Register"]
    pub struct EMBEDDEDRAM31 {
        register: VolatileCell<u32>,
    }
    #[doc = "CSE PRAM 31 Register"]
    pub mod embedded_ram31 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EMBEDDEDRAM31 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_3R {
            bits: u8,
        }
        impl BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_2R {
            bits: u8,
        }
        impl BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_1R {
            bits: u8,
        }
        impl BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BYTE_0R {
            bits: u8,
        }
        impl BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYTE_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYTE_0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&self) -> BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&self) -> BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&self) -> BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&self) -> BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BYTE_0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_3(&mut self) -> _BYTE_3W {
                _BYTE_3W { w: self }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_2(&mut self) -> _BYTE_2W {
                _BYTE_2W { w: self }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_1(&mut self) -> _BYTE_1W {
                _BYTE_1W { w: self }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn byte_0(&mut self) -> _BYTE_0W {
                _BYTE_0W { w: self }
            }
        }
    }
    #[doc = "CSE PRAM31LL register."]
    pub struct EMBEDDEDRAM31LL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM31LL register."]
    pub mod embedded_ram31ll {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM31LL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LLR {
            bits: u8,
        }
        impl RAM_LLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&self) -> RAM_LLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit RAM_"]
            #[inline(always)]
            pub fn ram_ll(&mut self) -> _RAM_LLW {
                _RAM_LLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM31LU register."]
    pub struct EMBEDDEDRAM31LU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM31LU register."]
    pub mod embedded_ram31lu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM31LU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_LUR {
            bits: u8,
        }
        impl RAM_LUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_LUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_LUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&self) -> RAM_LUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_LUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_LL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_lu(&mut self) -> _RAM_LUW {
                _RAM_LUW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM31HL register."]
    pub struct EMBEDDEDRAM31HL {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM31HL register."]
    pub mod embedded_ram31hl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM31HL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HLR {
            bits: u8,
        }
        impl RAM_HLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&self) -> RAM_HLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hl(&mut self) -> _RAM_HLW {
                _RAM_HLW { w: self }
            }
        }
    }
    #[doc = "CSE PRAM31HU register."]
    pub struct EMBEDDEDRAM31HU {
        register: VolatileCell<u8>,
    }
    #[doc = "CSE PRAM31HU register."]
    pub mod embedded_ram31hu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::EMBEDDEDRAM31HU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAM_HUR {
            bits: u8,
        }
        impl RAM_HUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RAM_HUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RAM_HUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&self) -> RAM_HUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                RAM_HUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - RAM_HU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn ram_hu(&mut self) -> _RAM_HUW {
                _RAM_HUW { w: self }
            }
        }
    }
}
#[doc = "CSE_PRAM"]
pub struct CSE_PRAM {
    register_block: cse_pram::RegisterBlock,
}
impl Deref for CSE_PRAM {
    type Target = cse_pram::RegisterBlock;
    fn deref(&self) -> &cse_pram::RegisterBlock {
        &self.register_block
    }
}
#[doc = "AIPS-Lite Bridge"]
pub const AIPS: Peripheral<AIPS> = unsafe { Peripheral::new(1073741824) };
#[doc = "AIPS-Lite Bridge"]
pub mod aips {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - Master Privilege Register A"]
        pub mpra: MPRA,
        _reserved0: [u8; 28usize],
        #[doc = "0x20 - Peripheral Access Control Register"]
        pub pacra: PACRA,
        #[doc = "0x24 - Peripheral Access Control Register"]
        pub pacrb: PACRB,
        #[doc = "0x28 - Peripheral Access Control Register"]
        pub pacrc: PACRC,
        #[doc = "0x2c - Peripheral Access Control Register"]
        pub pacrd: PACRD,
        _reserved1: [u8; 16usize],
        #[doc = "0x40 - Off-Platform Peripheral Access Control Register"]
        pub opacra: OPACRA,
        #[doc = "0x44 - Off-Platform Peripheral Access Control Register"]
        pub opacrb: OPACRB,
        #[doc = "0x48 - Off-Platform Peripheral Access Control Register"]
        pub opacrc: OPACRC,
        #[doc = "0x4c - Off-Platform Peripheral Access Control Register"]
        pub opacrd: OPACRD,
        #[doc = "0x50 - Off-Platform Peripheral Access Control Register"]
        pub opacre: OPACRE,
        #[doc = "0x54 - Off-Platform Peripheral Access Control Register"]
        pub opacrf: OPACRF,
        #[doc = "0x58 - Off-Platform Peripheral Access Control Register"]
        pub opacrg: OPACRG,
        #[doc = "0x5c - Off-Platform Peripheral Access Control Register"]
        pub opacrh: OPACRH,
        #[doc = "0x60 - Off-Platform Peripheral Access Control Register"]
        pub opacri: OPACRI,
        #[doc = "0x64 - Off-Platform Peripheral Access Control Register"]
        pub opacrj: OPACRJ,
        #[doc = "0x68 - Off-Platform Peripheral Access Control Register"]
        pub opacrk: OPACRK,
        #[doc = "0x6c - Off-Platform Peripheral Access Control Register"]
        pub opacrl: OPACRL,
    }
    #[doc = "Master Privilege Register A"]
    pub struct MPRA {
        register: VolatileCell<u32>,
    }
    #[doc = "Master Privilege Register A"]
    pub mod mpra {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::MPRA {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `MPL2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MPL2R {
            #[doc = "Accesses from this master are forced to user-mode."]
            _0,
            #[doc = "Accesses from this master are not forced to user-mode."]
            _1,
        }
        impl MPL2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MPL2R::_0 => false,
                    MPL2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MPL2R {
                match value {
                    false => MPL2R::_0,
                    true => MPL2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MPL2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MPL2R::_1
            }
        }
        #[doc = "Possible values of the field `MTW2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MTW2R {
            #[doc = "This master is not trusted for write accesses."]
            _0,
            #[doc = "This master is trusted for write accesses."]
            _1,
        }
        impl MTW2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MTW2R::_0 => false,
                    MTW2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MTW2R {
                match value {
                    false => MTW2R::_0,
                    true => MTW2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MTW2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MTW2R::_1
            }
        }
        #[doc = "Possible values of the field `MTR2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MTR2R {
            #[doc = "This master is not trusted for read accesses."]
            _0,
            #[doc = "This master is trusted for read accesses."]
            _1,
        }
        impl MTR2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MTR2R::_0 => false,
                    MTR2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MTR2R {
                match value {
                    false => MTR2R::_0,
                    true => MTR2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MTR2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MTR2R::_1
            }
        }
        #[doc = "Possible values of the field `MPL1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MPL1R {
            #[doc = "Accesses from this master are forced to user-mode."]
            _0,
            #[doc = "Accesses from this master are not forced to user-mode."]
            _1,
        }
        impl MPL1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MPL1R::_0 => false,
                    MPL1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MPL1R {
                match value {
                    false => MPL1R::_0,
                    true => MPL1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MPL1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MPL1R::_1
            }
        }
        #[doc = "Possible values of the field `MTW1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MTW1R {
            #[doc = "This master is not trusted for write accesses."]
            _0,
            #[doc = "This master is trusted for write accesses."]
            _1,
        }
        impl MTW1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MTW1R::_0 => false,
                    MTW1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MTW1R {
                match value {
                    false => MTW1R::_0,
                    true => MTW1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MTW1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MTW1R::_1
            }
        }
        #[doc = "Possible values of the field `MTR1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MTR1R {
            #[doc = "This master is not trusted for read accesses."]
            _0,
            #[doc = "This master is trusted for read accesses."]
            _1,
        }
        impl MTR1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MTR1R::_0 => false,
                    MTR1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MTR1R {
                match value {
                    false => MTR1R::_0,
                    true => MTR1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MTR1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MTR1R::_1
            }
        }
        #[doc = "Possible values of the field `MPL0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MPL0R {
            #[doc = "Accesses from this master are forced to user-mode."]
            _0,
            #[doc = "Accesses from this master are not forced to user-mode."]
            _1,
        }
        impl MPL0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MPL0R::_0 => false,
                    MPL0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MPL0R {
                match value {
                    false => MPL0R::_0,
                    true => MPL0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MPL0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MPL0R::_1
            }
        }
        #[doc = "Possible values of the field `MTW0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MTW0R {
            #[doc = "This master is not trusted for write accesses."]
            _0,
            #[doc = "This master is trusted for write accesses."]
            _1,
        }
        impl MTW0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MTW0R::_0 => false,
                    MTW0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MTW0R {
                match value {
                    false => MTW0R::_0,
                    true => MTW0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MTW0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MTW0R::_1
            }
        }
        #[doc = "Possible values of the field `MTR0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MTR0R {
            #[doc = "This master is not trusted for read accesses."]
            _0,
            #[doc = "This master is trusted for read accesses."]
            _1,
        }
        impl MTR0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MTR0R::_0 => false,
                    MTR0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MTR0R {
                match value {
                    false => MTR0R::_0,
                    true => MTR0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MTR0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MTR0R::_1
            }
        }
        #[doc = "Values that can be written to the field `MPL2`"]
        pub enum MPL2W {
            #[doc = "Accesses from this master are forced to user-mode."]
            _0,
            #[doc = "Accesses from this master are not forced to user-mode."]
            _1,
        }
        impl MPL2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MPL2W::_0 => false,
                    MPL2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MPL2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MPL2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MPL2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from this master are forced to user-mode."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MPL2W::_0)
            }
            #[doc = "Accesses from this master are not forced to user-mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MPL2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MTW2`"]
        pub enum MTW2W {
            #[doc = "This master is not trusted for write accesses."]
            _0,
            #[doc = "This master is trusted for write accesses."]
            _1,
        }
        impl MTW2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MTW2W::_0 => false,
                    MTW2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MTW2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MTW2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MTW2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This master is not trusted for write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MTW2W::_0)
            }
            #[doc = "This master is trusted for write accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MTW2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 21;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MTR2`"]
        pub enum MTR2W {
            #[doc = "This master is not trusted for read accesses."]
            _0,
            #[doc = "This master is trusted for read accesses."]
            _1,
        }
        impl MTR2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MTR2W::_0 => false,
                    MTR2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MTR2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MTR2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MTR2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This master is not trusted for read accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MTR2W::_0)
            }
            #[doc = "This master is trusted for read accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MTR2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 22;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MPL1`"]
        pub enum MPL1W {
            #[doc = "Accesses from this master are forced to user-mode."]
            _0,
            #[doc = "Accesses from this master are not forced to user-mode."]
            _1,
        }
        impl MPL1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MPL1W::_0 => false,
                    MPL1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MPL1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MPL1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MPL1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from this master are forced to user-mode."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MPL1W::_0)
            }
            #[doc = "Accesses from this master are not forced to user-mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MPL1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MTW1`"]
        pub enum MTW1W {
            #[doc = "This master is not trusted for write accesses."]
            _0,
            #[doc = "This master is trusted for write accesses."]
            _1,
        }
        impl MTW1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MTW1W::_0 => false,
                    MTW1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MTW1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MTW1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MTW1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This master is not trusted for write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MTW1W::_0)
            }
            #[doc = "This master is trusted for write accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MTW1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 25;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MTR1`"]
        pub enum MTR1W {
            #[doc = "This master is not trusted for read accesses."]
            _0,
            #[doc = "This master is trusted for read accesses."]
            _1,
        }
        impl MTR1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MTR1W::_0 => false,
                    MTR1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MTR1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MTR1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MTR1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This master is not trusted for read accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MTR1W::_0)
            }
            #[doc = "This master is trusted for read accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MTR1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 26;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MPL0`"]
        pub enum MPL0W {
            #[doc = "Accesses from this master are forced to user-mode."]
            _0,
            #[doc = "Accesses from this master are not forced to user-mode."]
            _1,
        }
        impl MPL0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MPL0W::_0 => false,
                    MPL0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MPL0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MPL0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MPL0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from this master are forced to user-mode."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MPL0W::_0)
            }
            #[doc = "Accesses from this master are not forced to user-mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MPL0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 28;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MTW0`"]
        pub enum MTW0W {
            #[doc = "This master is not trusted for write accesses."]
            _0,
            #[doc = "This master is trusted for write accesses."]
            _1,
        }
        impl MTW0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MTW0W::_0 => false,
                    MTW0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MTW0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MTW0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MTW0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This master is not trusted for write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MTW0W::_0)
            }
            #[doc = "This master is trusted for write accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MTW0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 29;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MTR0`"]
        pub enum MTR0W {
            #[doc = "This master is not trusted for read accesses."]
            _0,
            #[doc = "This master is trusted for read accesses."]
            _1,
        }
        impl MTR0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MTR0W::_0 => false,
                    MTR0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MTR0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MTR0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MTR0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This master is not trusted for read accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MTR0W::_0)
            }
            #[doc = "This master is trusted for read accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MTR0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 20 - Master 2 Privilege Level"]
            #[inline(always)]
            pub fn mpl2(&self) -> MPL2R {
                MPL2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - Master 2 Trusted For Writes"]
            #[inline(always)]
            pub fn mtw2(&self) -> MTW2R {
                MTW2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 22 - Master 2 Trusted For Read"]
            #[inline(always)]
            pub fn mtr2(&self) -> MTR2R {
                MTR2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 24 - Master 1 Privilege Level"]
            #[inline(always)]
            pub fn mpl1(&self) -> MPL1R {
                MPL1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 25 - Master 1 Trusted for Writes"]
            #[inline(always)]
            pub fn mtw1(&self) -> MTW1R {
                MTW1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 25;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 26 - Master 1 Trusted for Read"]
            #[inline(always)]
            pub fn mtr1(&self) -> MTR1R {
                MTR1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 26;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 28 - Master 0 Privilege Level"]
            #[inline(always)]
            pub fn mpl0(&self) -> MPL0R {
                MPL0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 28;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 29 - Master 0 Trusted For Writes"]
            #[inline(always)]
            pub fn mtw0(&self) -> MTW0R {
                MTW0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 29;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 30 - Master 0 Trusted For Read"]
            #[inline(always)]
            pub fn mtr0(&self) -> MTR0R {
                MTR0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 2003828736 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 20 - Master 2 Privilege Level"]
            #[inline(always)]
            pub fn mpl2(&mut self) -> _MPL2W {
                _MPL2W { w: self }
            }
            #[doc = "Bit 21 - Master 2 Trusted For Writes"]
            #[inline(always)]
            pub fn mtw2(&mut self) -> _MTW2W {
                _MTW2W { w: self }
            }
            #[doc = "Bit 22 - Master 2 Trusted For Read"]
            #[inline(always)]
            pub fn mtr2(&mut self) -> _MTR2W {
                _MTR2W { w: self }
            }
            #[doc = "Bit 24 - Master 1 Privilege Level"]
            #[inline(always)]
            pub fn mpl1(&mut self) -> _MPL1W {
                _MPL1W { w: self }
            }
            #[doc = "Bit 25 - Master 1 Trusted for Writes"]
            #[inline(always)]
            pub fn mtw1(&mut self) -> _MTW1W {
                _MTW1W { w: self }
            }
            #[doc = "Bit 26 - Master 1 Trusted for Read"]
            #[inline(always)]
            pub fn mtr1(&mut self) -> _MTR1W {
                _MTR1W { w: self }
            }
            #[doc = "Bit 28 - Master 0 Privilege Level"]
            #[inline(always)]
            pub fn mpl0(&mut self) -> _MPL0W {
                _MPL0W { w: self }
            }
            #[doc = "Bit 29 - Master 0 Trusted For Writes"]
            #[inline(always)]
            pub fn mtw0(&mut self) -> _MTW0W {
                _MTW0W { w: self }
            }
            #[doc = "Bit 30 - Master 0 Trusted For Read"]
            #[inline(always)]
            pub fn mtr0(&mut self) -> _MTR0W {
                _MTR0W { w: self }
            }
        }
    }
    #[doc = "Peripheral Access Control Register"]
    pub struct PACRA {
        register: VolatileCell<u32>,
    }
    #[doc = "Peripheral Access Control Register"]
    pub mod pacra {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PACRA {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TP1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP1R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP1R::_0 => false,
                    TP1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP1R {
                match value {
                    false => TP1R::_0,
                    true => TP1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP1R::_1
            }
        }
        #[doc = "Possible values of the field `WP1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP1R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP1R::_0 => false,
                    WP1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP1R {
                match value {
                    false => WP1R::_0,
                    true => WP1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP1R::_1
            }
        }
        #[doc = "Possible values of the field `SP1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP1R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP1R::_0 => false,
                    SP1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP1R {
                match value {
                    false => SP1R::_0,
                    true => SP1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP1R::_1
            }
        }
        #[doc = "Possible values of the field `TP0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP0R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP0R::_0 => false,
                    TP0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP0R {
                match value {
                    false => TP0R::_0,
                    true => TP0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP0R::_1
            }
        }
        #[doc = "Possible values of the field `WP0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP0R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP0R::_0 => false,
                    WP0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP0R {
                match value {
                    false => WP0R::_0,
                    true => WP0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP0R::_1
            }
        }
        #[doc = "Possible values of the field `SP0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP0R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP0R::_0 => false,
                    SP0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP0R {
                match value {
                    false => SP0R::_0,
                    true => SP0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP0R::_1
            }
        }
        #[doc = "Values that can be written to the field `TP1`"]
        pub enum TP1W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP1W::_0 => false,
                    TP1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP1W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP1`"]
        pub enum WP1W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP1W::_0 => false,
                    WP1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP1W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 25;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP1`"]
        pub enum SP1W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP1W::_0 => false,
                    SP1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP1W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 26;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TP0`"]
        pub enum TP0W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP0W::_0 => false,
                    TP0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP0W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 28;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP0`"]
        pub enum WP0W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP0W::_0 => false,
                    WP0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP0W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 29;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP0`"]
        pub enum SP0W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP0W::_0 => false,
                    SP0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP0W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 24 - Trusted Protect"]
            #[inline(always)]
            pub fn tp1(&self) -> TP1R {
                TP1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 25 - Write Protect"]
            #[inline(always)]
            pub fn wp1(&self) -> WP1R {
                WP1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 25;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 26 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp1(&self) -> SP1R {
                SP1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 26;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 28 - Trusted Protect"]
            #[inline(always)]
            pub fn tp0(&self) -> TP0R {
                TP0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 28;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 29 - Write Protect"]
            #[inline(always)]
            pub fn wp0(&self) -> WP0R {
                WP0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 29;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 30 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp0(&self) -> SP0R {
                SP0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 1409286144 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 24 - Trusted Protect"]
            #[inline(always)]
            pub fn tp1(&mut self) -> _TP1W {
                _TP1W { w: self }
            }
            #[doc = "Bit 25 - Write Protect"]
            #[inline(always)]
            pub fn wp1(&mut self) -> _WP1W {
                _WP1W { w: self }
            }
            #[doc = "Bit 26 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp1(&mut self) -> _SP1W {
                _SP1W { w: self }
            }
            #[doc = "Bit 28 - Trusted Protect"]
            #[inline(always)]
            pub fn tp0(&mut self) -> _TP0W {
                _TP0W { w: self }
            }
            #[doc = "Bit 29 - Write Protect"]
            #[inline(always)]
            pub fn wp0(&mut self) -> _WP0W {
                _WP0W { w: self }
            }
            #[doc = "Bit 30 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp0(&mut self) -> _SP0W {
                _SP0W { w: self }
            }
        }
    }
    #[doc = "Peripheral Access Control Register"]
    pub struct PACRB {
        register: VolatileCell<u32>,
    }
    #[doc = "Peripheral Access Control Register"]
    pub mod pacrb {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PACRB {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TP5`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP5R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP5R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP5R::_0 => false,
                    TP5R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP5R {
                match value {
                    false => TP5R::_0,
                    true => TP5R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP5R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP5R::_1
            }
        }
        #[doc = "Possible values of the field `WP5`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP5R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP5R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP5R::_0 => false,
                    WP5R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP5R {
                match value {
                    false => WP5R::_0,
                    true => WP5R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP5R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP5R::_1
            }
        }
        #[doc = "Possible values of the field `SP5`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP5R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP5R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP5R::_0 => false,
                    SP5R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP5R {
                match value {
                    false => SP5R::_0,
                    true => SP5R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP5R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP5R::_1
            }
        }
        #[doc = "Possible values of the field `TP1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP1R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP1R::_0 => false,
                    TP1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP1R {
                match value {
                    false => TP1R::_0,
                    true => TP1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP1R::_1
            }
        }
        #[doc = "Possible values of the field `WP1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP1R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP1R::_0 => false,
                    WP1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP1R {
                match value {
                    false => WP1R::_0,
                    true => WP1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP1R::_1
            }
        }
        #[doc = "Possible values of the field `SP1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP1R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP1R::_0 => false,
                    SP1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP1R {
                match value {
                    false => SP1R::_0,
                    true => SP1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP1R::_1
            }
        }
        #[doc = "Possible values of the field `TP0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP0R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP0R::_0 => false,
                    TP0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP0R {
                match value {
                    false => TP0R::_0,
                    true => TP0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP0R::_1
            }
        }
        #[doc = "Possible values of the field `WP0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP0R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP0R::_0 => false,
                    WP0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP0R {
                match value {
                    false => WP0R::_0,
                    true => WP0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP0R::_1
            }
        }
        #[doc = "Possible values of the field `SP0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP0R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP0R::_0 => false,
                    SP0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP0R {
                match value {
                    false => SP0R::_0,
                    true => SP0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP0R::_1
            }
        }
        #[doc = "Values that can be written to the field `TP5`"]
        pub enum TP5W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP5W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP5W::_0 => false,
                    TP5W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP5W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP5W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP5W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP5W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP5`"]
        pub enum WP5W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP5W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP5W::_0 => false,
                    WP5W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP5W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP5W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP5W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP5W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP5`"]
        pub enum SP5W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP5W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP5W::_0 => false,
                    SP5W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP5W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP5W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP5W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP5W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TP1`"]
        pub enum TP1W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP1W::_0 => false,
                    TP1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP1W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP1`"]
        pub enum WP1W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP1W::_0 => false,
                    WP1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP1W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 25;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP1`"]
        pub enum SP1W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP1W::_0 => false,
                    SP1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP1W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 26;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TP0`"]
        pub enum TP0W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP0W::_0 => false,
                    TP0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP0W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 28;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP0`"]
        pub enum WP0W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP0W::_0 => false,
                    WP0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP0W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 29;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP0`"]
        pub enum SP0W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP0W::_0 => false,
                    SP0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP0W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 8 - Trusted Protect"]
            #[inline(always)]
            pub fn tp5(&self) -> TP5R {
                TP5R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Write Protect"]
            #[inline(always)]
            pub fn wp5(&self) -> WP5R {
                WP5R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp5(&self) -> SP5R {
                SP5R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 24 - Trusted Protect"]
            #[inline(always)]
            pub fn tp1(&self) -> TP1R {
                TP1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 25 - Write Protect"]
            #[inline(always)]
            pub fn wp1(&self) -> WP1R {
                WP1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 25;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 26 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp1(&self) -> SP1R {
                SP1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 26;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 28 - Trusted Protect"]
            #[inline(always)]
            pub fn tp0(&self) -> TP0R {
                TP0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 28;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 29 - Write Protect"]
            #[inline(always)]
            pub fn wp0(&self) -> WP0R {
                WP0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 29;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 30 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp0(&self) -> SP0R {
                SP0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 1140851712 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 8 - Trusted Protect"]
            #[inline(always)]
            pub fn tp5(&mut self) -> _TP5W {
                _TP5W { w: self }
            }
            #[doc = "Bit 9 - Write Protect"]
            #[inline(always)]
            pub fn wp5(&mut self) -> _WP5W {
                _WP5W { w: self }
            }
            #[doc = "Bit 10 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp5(&mut self) -> _SP5W {
                _SP5W { w: self }
            }
            #[doc = "Bit 24 - Trusted Protect"]
            #[inline(always)]
            pub fn tp1(&mut self) -> _TP1W {
                _TP1W { w: self }
            }
            #[doc = "Bit 25 - Write Protect"]
            #[inline(always)]
            pub fn wp1(&mut self) -> _WP1W {
                _WP1W { w: self }
            }
            #[doc = "Bit 26 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp1(&mut self) -> _SP1W {
                _SP1W { w: self }
            }
            #[doc = "Bit 28 - Trusted Protect"]
            #[inline(always)]
            pub fn tp0(&mut self) -> _TP0W {
                _TP0W { w: self }
            }
            #[doc = "Bit 29 - Write Protect"]
            #[inline(always)]
            pub fn wp0(&mut self) -> _WP0W {
                _WP0W { w: self }
            }
            #[doc = "Bit 30 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp0(&mut self) -> _SP0W {
                _SP0W { w: self }
            }
        }
    }
    #[doc = "Peripheral Access Control Register"]
    pub struct PACRC {
        register: VolatileCell<u32>,
    }
    #[doc = "Peripheral Access Control Register"]
    pub mod pacrc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::PACRC {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
    }
    #[doc = "Peripheral Access Control Register"]
    pub struct PACRD {
        register: VolatileCell<u32>,
    }
    #[doc = "Peripheral Access Control Register"]
    pub mod pacrd {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PACRD {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TP1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP1R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP1R::_0 => false,
                    TP1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP1R {
                match value {
                    false => TP1R::_0,
                    true => TP1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP1R::_1
            }
        }
        #[doc = "Possible values of the field `WP1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP1R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP1R::_0 => false,
                    WP1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP1R {
                match value {
                    false => WP1R::_0,
                    true => WP1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP1R::_1
            }
        }
        #[doc = "Possible values of the field `SP1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP1R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP1R::_0 => false,
                    SP1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP1R {
                match value {
                    false => SP1R::_0,
                    true => SP1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP1R::_1
            }
        }
        #[doc = "Possible values of the field `TP0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP0R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP0R::_0 => false,
                    TP0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP0R {
                match value {
                    false => TP0R::_0,
                    true => TP0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP0R::_1
            }
        }
        #[doc = "Possible values of the field `WP0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP0R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP0R::_0 => false,
                    WP0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP0R {
                match value {
                    false => WP0R::_0,
                    true => WP0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP0R::_1
            }
        }
        #[doc = "Possible values of the field `SP0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP0R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP0R::_0 => false,
                    SP0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP0R {
                match value {
                    false => SP0R::_0,
                    true => SP0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP0R::_1
            }
        }
        #[doc = "Values that can be written to the field `TP1`"]
        pub enum TP1W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP1W::_0 => false,
                    TP1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP1W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP1`"]
        pub enum WP1W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP1W::_0 => false,
                    WP1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP1W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 25;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP1`"]
        pub enum SP1W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP1W::_0 => false,
                    SP1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP1W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 26;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TP0`"]
        pub enum TP0W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP0W::_0 => false,
                    TP0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP0W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 28;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP0`"]
        pub enum WP0W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP0W::_0 => false,
                    WP0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP0W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 29;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP0`"]
        pub enum SP0W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP0W::_0 => false,
                    SP0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP0W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 24 - Trusted Protect"]
            #[inline(always)]
            pub fn tp1(&self) -> TP1R {
                TP1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 25 - Write Protect"]
            #[inline(always)]
            pub fn wp1(&self) -> WP1R {
                WP1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 25;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 26 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp1(&self) -> SP1R {
                SP1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 26;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 28 - Trusted Protect"]
            #[inline(always)]
            pub fn tp0(&self) -> TP0R {
                TP0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 28;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 29 - Write Protect"]
            #[inline(always)]
            pub fn wp0(&self) -> WP0R {
                WP0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 29;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 30 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp0(&self) -> SP0R {
                SP0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 1140850688 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 24 - Trusted Protect"]
            #[inline(always)]
            pub fn tp1(&mut self) -> _TP1W {
                _TP1W { w: self }
            }
            #[doc = "Bit 25 - Write Protect"]
            #[inline(always)]
            pub fn wp1(&mut self) -> _WP1W {
                _WP1W { w: self }
            }
            #[doc = "Bit 26 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp1(&mut self) -> _SP1W {
                _SP1W { w: self }
            }
            #[doc = "Bit 28 - Trusted Protect"]
            #[inline(always)]
            pub fn tp0(&mut self) -> _TP0W {
                _TP0W { w: self }
            }
            #[doc = "Bit 29 - Write Protect"]
            #[inline(always)]
            pub fn wp0(&mut self) -> _WP0W {
                _WP0W { w: self }
            }
            #[doc = "Bit 30 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp0(&mut self) -> _SP0W {
                _SP0W { w: self }
            }
        }
    }
    #[doc = "Off-Platform Peripheral Access Control Register"]
    pub struct OPACRA {
        register: VolatileCell<u32>,
    }
    #[doc = "Off-Platform Peripheral Access Control Register"]
    pub mod opacra {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::OPACRA {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TP7`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP7R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP7R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP7R::_0 => false,
                    TP7R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP7R {
                match value {
                    false => TP7R::_0,
                    true => TP7R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP7R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP7R::_1
            }
        }
        #[doc = "Possible values of the field `WP7`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP7R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP7R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP7R::_0 => false,
                    WP7R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP7R {
                match value {
                    false => WP7R::_0,
                    true => WP7R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP7R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP7R::_1
            }
        }
        #[doc = "Possible values of the field `SP7`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP7R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP7R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP7R::_0 => false,
                    SP7R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP7R {
                match value {
                    false => SP7R::_0,
                    true => SP7R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP7R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP7R::_1
            }
        }
        #[doc = "Possible values of the field `TP6`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP6R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP6R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP6R::_0 => false,
                    TP6R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP6R {
                match value {
                    false => TP6R::_0,
                    true => TP6R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP6R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP6R::_1
            }
        }
        #[doc = "Possible values of the field `WP6`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP6R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP6R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP6R::_0 => false,
                    WP6R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP6R {
                match value {
                    false => WP6R::_0,
                    true => WP6R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP6R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP6R::_1
            }
        }
        #[doc = "Possible values of the field `SP6`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP6R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP6R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP6R::_0 => false,
                    SP6R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP6R {
                match value {
                    false => SP6R::_0,
                    true => SP6R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP6R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP6R::_1
            }
        }
        #[doc = "Possible values of the field `TP5`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP5R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP5R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP5R::_0 => false,
                    TP5R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP5R {
                match value {
                    false => TP5R::_0,
                    true => TP5R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP5R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP5R::_1
            }
        }
        #[doc = "Possible values of the field `WP5`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP5R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP5R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP5R::_0 => false,
                    WP5R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP5R {
                match value {
                    false => WP5R::_0,
                    true => WP5R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP5R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP5R::_1
            }
        }
        #[doc = "Possible values of the field `SP5`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP5R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP5R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP5R::_0 => false,
                    SP5R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP5R {
                match value {
                    false => SP5R::_0,
                    true => SP5R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP5R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP5R::_1
            }
        }
        #[doc = "Possible values of the field `TP4`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP4R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP4R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP4R::_0 => false,
                    TP4R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP4R {
                match value {
                    false => TP4R::_0,
                    true => TP4R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP4R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP4R::_1
            }
        }
        #[doc = "Possible values of the field `WP4`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP4R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP4R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP4R::_0 => false,
                    WP4R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP4R {
                match value {
                    false => WP4R::_0,
                    true => WP4R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP4R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP4R::_1
            }
        }
        #[doc = "Possible values of the field `SP4`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP4R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP4R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP4R::_0 => false,
                    SP4R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP4R {
                match value {
                    false => SP4R::_0,
                    true => SP4R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP4R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP4R::_1
            }
        }
        #[doc = "Possible values of the field `TP1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP1R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP1R::_0 => false,
                    TP1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP1R {
                match value {
                    false => TP1R::_0,
                    true => TP1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP1R::_1
            }
        }
        #[doc = "Possible values of the field `WP1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP1R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP1R::_0 => false,
                    WP1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP1R {
                match value {
                    false => WP1R::_0,
                    true => WP1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP1R::_1
            }
        }
        #[doc = "Possible values of the field `SP1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP1R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP1R::_0 => false,
                    SP1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP1R {
                match value {
                    false => SP1R::_0,
                    true => SP1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP1R::_1
            }
        }
        #[doc = "Possible values of the field `TP0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP0R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP0R::_0 => false,
                    TP0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP0R {
                match value {
                    false => TP0R::_0,
                    true => TP0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP0R::_1
            }
        }
        #[doc = "Possible values of the field `WP0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP0R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP0R::_0 => false,
                    WP0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP0R {
                match value {
                    false => WP0R::_0,
                    true => WP0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP0R::_1
            }
        }
        #[doc = "Possible values of the field `SP0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP0R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP0R::_0 => false,
                    SP0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP0R {
                match value {
                    false => SP0R::_0,
                    true => SP0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP0R::_1
            }
        }
        #[doc = "Values that can be written to the field `TP7`"]
        pub enum TP7W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP7W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP7W::_0 => false,
                    TP7W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP7W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP7W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP7W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP7W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP7W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP7`"]
        pub enum WP7W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP7W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP7W::_0 => false,
                    WP7W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP7W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP7W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP7W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP7W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP7W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP7`"]
        pub enum SP7W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP7W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP7W::_0 => false,
                    SP7W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP7W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP7W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP7W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP7W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP7W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TP6`"]
        pub enum TP6W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP6W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP6W::_0 => false,
                    TP6W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP6W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP6W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP6W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP6W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP6W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP6`"]
        pub enum WP6W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP6W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP6W::_0 => false,
                    WP6W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP6W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP6W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP6W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP6W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP6W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP6`"]
        pub enum SP6W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP6W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP6W::_0 => false,
                    SP6W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP6W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP6W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP6W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP6W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP6W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TP5`"]
        pub enum TP5W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP5W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP5W::_0 => false,
                    TP5W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP5W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP5W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP5W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP5W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP5`"]
        pub enum WP5W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP5W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP5W::_0 => false,
                    WP5W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP5W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP5W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP5W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP5W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP5`"]
        pub enum SP5W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP5W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP5W::_0 => false,
                    SP5W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP5W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP5W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP5W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP5W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TP4`"]
        pub enum TP4W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP4W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP4W::_0 => false,
                    TP4W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP4W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP4W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP4W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP4W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP4W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP4`"]
        pub enum WP4W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP4W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP4W::_0 => false,
                    WP4W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP4W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP4W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP4W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP4W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP4W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP4`"]
        pub enum SP4W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP4W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP4W::_0 => false,
                    SP4W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP4W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP4W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP4W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP4W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP4W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TP1`"]
        pub enum TP1W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP1W::_0 => false,
                    TP1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP1W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP1`"]
        pub enum WP1W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP1W::_0 => false,
                    WP1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP1W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 25;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP1`"]
        pub enum SP1W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP1W::_0 => false,
                    SP1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP1W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 26;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TP0`"]
        pub enum TP0W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP0W::_0 => false,
                    TP0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP0W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 28;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP0`"]
        pub enum WP0W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP0W::_0 => false,
                    WP0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP0W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 29;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP0`"]
        pub enum SP0W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP0W::_0 => false,
                    SP0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP0W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Trusted Protect"]
            #[inline(always)]
            pub fn tp7(&self) -> TP7R {
                TP7R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Write Protect"]
            #[inline(always)]
            pub fn wp7(&self) -> WP7R {
                WP7R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp7(&self) -> SP7R {
                SP7R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Trusted Protect"]
            #[inline(always)]
            pub fn tp6(&self) -> TP6R {
                TP6R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Write Protect"]
            #[inline(always)]
            pub fn wp6(&self) -> WP6R {
                WP6R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp6(&self) -> SP6R {
                SP6R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Trusted Protect"]
            #[inline(always)]
            pub fn tp5(&self) -> TP5R {
                TP5R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Write Protect"]
            #[inline(always)]
            pub fn wp5(&self) -> WP5R {
                WP5R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp5(&self) -> SP5R {
                SP5R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Trusted Protect"]
            #[inline(always)]
            pub fn tp4(&self) -> TP4R {
                TP4R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Write Protect"]
            #[inline(always)]
            pub fn wp4(&self) -> WP4R {
                WP4R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp4(&self) -> SP4R {
                SP4R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 24 - Trusted Protect"]
            #[inline(always)]
            pub fn tp1(&self) -> TP1R {
                TP1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 25 - Write Protect"]
            #[inline(always)]
            pub fn wp1(&self) -> WP1R {
                WP1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 25;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 26 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp1(&self) -> SP1R {
                SP1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 26;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 28 - Trusted Protect"]
            #[inline(always)]
            pub fn tp0(&self) -> TP0R {
                TP0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 28;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 29 - Write Protect"]
            #[inline(always)]
            pub fn wp0(&self) -> WP0R {
                WP0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 29;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 30 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp0(&self) -> SP0R {
                SP0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 1140868164 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Trusted Protect"]
            #[inline(always)]
            pub fn tp7(&mut self) -> _TP7W {
                _TP7W { w: self }
            }
            #[doc = "Bit 1 - Write Protect"]
            #[inline(always)]
            pub fn wp7(&mut self) -> _WP7W {
                _WP7W { w: self }
            }
            #[doc = "Bit 2 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp7(&mut self) -> _SP7W {
                _SP7W { w: self }
            }
            #[doc = "Bit 4 - Trusted Protect"]
            #[inline(always)]
            pub fn tp6(&mut self) -> _TP6W {
                _TP6W { w: self }
            }
            #[doc = "Bit 5 - Write Protect"]
            #[inline(always)]
            pub fn wp6(&mut self) -> _WP6W {
                _WP6W { w: self }
            }
            #[doc = "Bit 6 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp6(&mut self) -> _SP6W {
                _SP6W { w: self }
            }
            #[doc = "Bit 8 - Trusted Protect"]
            #[inline(always)]
            pub fn tp5(&mut self) -> _TP5W {
                _TP5W { w: self }
            }
            #[doc = "Bit 9 - Write Protect"]
            #[inline(always)]
            pub fn wp5(&mut self) -> _WP5W {
                _WP5W { w: self }
            }
            #[doc = "Bit 10 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp5(&mut self) -> _SP5W {
                _SP5W { w: self }
            }
            #[doc = "Bit 12 - Trusted Protect"]
            #[inline(always)]
            pub fn tp4(&mut self) -> _TP4W {
                _TP4W { w: self }
            }
            #[doc = "Bit 13 - Write Protect"]
            #[inline(always)]
            pub fn wp4(&mut self) -> _WP4W {
                _WP4W { w: self }
            }
            #[doc = "Bit 14 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp4(&mut self) -> _SP4W {
                _SP4W { w: self }
            }
            #[doc = "Bit 24 - Trusted Protect"]
            #[inline(always)]
            pub fn tp1(&mut self) -> _TP1W {
                _TP1W { w: self }
            }
            #[doc = "Bit 25 - Write Protect"]
            #[inline(always)]
            pub fn wp1(&mut self) -> _WP1W {
                _WP1W { w: self }
            }
            #[doc = "Bit 26 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp1(&mut self) -> _SP1W {
                _SP1W { w: self }
            }
            #[doc = "Bit 28 - Trusted Protect"]
            #[inline(always)]
            pub fn tp0(&mut self) -> _TP0W {
                _TP0W { w: self }
            }
            #[doc = "Bit 29 - Write Protect"]
            #[inline(always)]
            pub fn wp0(&mut self) -> _WP0W {
                _WP0W { w: self }
            }
            #[doc = "Bit 30 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp0(&mut self) -> _SP0W {
                _SP0W { w: self }
            }
        }
    }
    #[doc = "Off-Platform Peripheral Access Control Register"]
    pub struct OPACRB {
        register: VolatileCell<u32>,
    }
    #[doc = "Off-Platform Peripheral Access Control Register"]
    pub mod opacrb {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::OPACRB {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TP6`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP6R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP6R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP6R::_0 => false,
                    TP6R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP6R {
                match value {
                    false => TP6R::_0,
                    true => TP6R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP6R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP6R::_1
            }
        }
        #[doc = "Possible values of the field `WP6`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP6R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP6R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP6R::_0 => false,
                    WP6R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP6R {
                match value {
                    false => WP6R::_0,
                    true => WP6R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP6R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP6R::_1
            }
        }
        #[doc = "Possible values of the field `SP6`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP6R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP6R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP6R::_0 => false,
                    SP6R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP6R {
                match value {
                    false => SP6R::_0,
                    true => SP6R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP6R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP6R::_1
            }
        }
        #[doc = "Possible values of the field `TP5`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP5R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP5R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP5R::_0 => false,
                    TP5R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP5R {
                match value {
                    false => TP5R::_0,
                    true => TP5R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP5R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP5R::_1
            }
        }
        #[doc = "Possible values of the field `WP5`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP5R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP5R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP5R::_0 => false,
                    WP5R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP5R {
                match value {
                    false => WP5R::_0,
                    true => WP5R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP5R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP5R::_1
            }
        }
        #[doc = "Possible values of the field `SP5`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP5R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP5R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP5R::_0 => false,
                    SP5R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP5R {
                match value {
                    false => SP5R::_0,
                    true => SP5R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP5R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP5R::_1
            }
        }
        #[doc = "Possible values of the field `TP4`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP4R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP4R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP4R::_0 => false,
                    TP4R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP4R {
                match value {
                    false => TP4R::_0,
                    true => TP4R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP4R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP4R::_1
            }
        }
        #[doc = "Possible values of the field `WP4`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP4R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP4R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP4R::_0 => false,
                    WP4R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP4R {
                match value {
                    false => WP4R::_0,
                    true => WP4R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP4R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP4R::_1
            }
        }
        #[doc = "Possible values of the field `SP4`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP4R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP4R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP4R::_0 => false,
                    SP4R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP4R {
                match value {
                    false => SP4R::_0,
                    true => SP4R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP4R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP4R::_1
            }
        }
        #[doc = "Possible values of the field `TP3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP3R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP3R::_0 => false,
                    TP3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP3R {
                match value {
                    false => TP3R::_0,
                    true => TP3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP3R::_1
            }
        }
        #[doc = "Possible values of the field `WP3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP3R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP3R::_0 => false,
                    WP3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP3R {
                match value {
                    false => WP3R::_0,
                    true => WP3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP3R::_1
            }
        }
        #[doc = "Possible values of the field `SP3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP3R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP3R::_0 => false,
                    SP3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP3R {
                match value {
                    false => SP3R::_0,
                    true => SP3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP3R::_1
            }
        }
        #[doc = "Values that can be written to the field `TP6`"]
        pub enum TP6W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP6W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP6W::_0 => false,
                    TP6W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP6W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP6W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP6W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP6W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP6W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP6`"]
        pub enum WP6W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP6W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP6W::_0 => false,
                    WP6W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP6W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP6W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP6W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP6W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP6W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP6`"]
        pub enum SP6W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP6W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP6W::_0 => false,
                    SP6W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP6W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP6W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP6W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP6W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP6W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TP5`"]
        pub enum TP5W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP5W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP5W::_0 => false,
                    TP5W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP5W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP5W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP5W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP5W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP5`"]
        pub enum WP5W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP5W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP5W::_0 => false,
                    WP5W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP5W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP5W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP5W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP5W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP5`"]
        pub enum SP5W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP5W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP5W::_0 => false,
                    SP5W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP5W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP5W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP5W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP5W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TP4`"]
        pub enum TP4W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP4W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP4W::_0 => false,
                    TP4W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP4W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP4W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP4W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP4W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP4W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP4`"]
        pub enum WP4W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP4W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP4W::_0 => false,
                    WP4W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP4W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP4W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP4W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP4W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP4W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP4`"]
        pub enum SP4W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP4W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP4W::_0 => false,
                    SP4W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP4W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP4W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP4W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP4W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP4W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TP3`"]
        pub enum TP3W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP3W::_0 => false,
                    TP3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP3W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP3`"]
        pub enum WP3W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP3W::_0 => false,
                    WP3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP3W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP3`"]
        pub enum SP3W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP3W::_0 => false,
                    SP3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP3W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 4 - Trusted Protect"]
            #[inline(always)]
            pub fn tp6(&self) -> TP6R {
                TP6R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Write Protect"]
            #[inline(always)]
            pub fn wp6(&self) -> WP6R {
                WP6R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp6(&self) -> SP6R {
                SP6R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Trusted Protect"]
            #[inline(always)]
            pub fn tp5(&self) -> TP5R {
                TP5R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Write Protect"]
            #[inline(always)]
            pub fn wp5(&self) -> WP5R {
                WP5R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp5(&self) -> SP5R {
                SP5R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Trusted Protect"]
            #[inline(always)]
            pub fn tp4(&self) -> TP4R {
                TP4R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Write Protect"]
            #[inline(always)]
            pub fn wp4(&self) -> WP4R {
                WP4R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp4(&self) -> SP4R {
                SP4R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 16 - Trusted Protect"]
            #[inline(always)]
            pub fn tp3(&self) -> TP3R {
                TP3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - Write Protect"]
            #[inline(always)]
            pub fn wp3(&self) -> WP3R {
                WP3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 18 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp3(&self) -> SP3R {
                SP3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 279616 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 4 - Trusted Protect"]
            #[inline(always)]
            pub fn tp6(&mut self) -> _TP6W {
                _TP6W { w: self }
            }
            #[doc = "Bit 5 - Write Protect"]
            #[inline(always)]
            pub fn wp6(&mut self) -> _WP6W {
                _WP6W { w: self }
            }
            #[doc = "Bit 6 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp6(&mut self) -> _SP6W {
                _SP6W { w: self }
            }
            #[doc = "Bit 8 - Trusted Protect"]
            #[inline(always)]
            pub fn tp5(&mut self) -> _TP5W {
                _TP5W { w: self }
            }
            #[doc = "Bit 9 - Write Protect"]
            #[inline(always)]
            pub fn wp5(&mut self) -> _WP5W {
                _WP5W { w: self }
            }
            #[doc = "Bit 10 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp5(&mut self) -> _SP5W {
                _SP5W { w: self }
            }
            #[doc = "Bit 12 - Trusted Protect"]
            #[inline(always)]
            pub fn tp4(&mut self) -> _TP4W {
                _TP4W { w: self }
            }
            #[doc = "Bit 13 - Write Protect"]
            #[inline(always)]
            pub fn wp4(&mut self) -> _WP4W {
                _WP4W { w: self }
            }
            #[doc = "Bit 14 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp4(&mut self) -> _SP4W {
                _SP4W { w: self }
            }
            #[doc = "Bit 16 - Trusted Protect"]
            #[inline(always)]
            pub fn tp3(&mut self) -> _TP3W {
                _TP3W { w: self }
            }
            #[doc = "Bit 17 - Write Protect"]
            #[inline(always)]
            pub fn wp3(&mut self) -> _WP3W {
                _WP3W { w: self }
            }
            #[doc = "Bit 18 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp3(&mut self) -> _SP3W {
                _SP3W { w: self }
            }
        }
    }
    #[doc = "Off-Platform Peripheral Access Control Register"]
    pub struct OPACRC {
        register: VolatileCell<u32>,
    }
    #[doc = "Off-Platform Peripheral Access Control Register"]
    pub mod opacrc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::OPACRC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TP7`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP7R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP7R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP7R::_0 => false,
                    TP7R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP7R {
                match value {
                    false => TP7R::_0,
                    true => TP7R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP7R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP7R::_1
            }
        }
        #[doc = "Possible values of the field `WP7`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP7R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP7R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP7R::_0 => false,
                    WP7R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP7R {
                match value {
                    false => WP7R::_0,
                    true => WP7R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP7R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP7R::_1
            }
        }
        #[doc = "Possible values of the field `SP7`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP7R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP7R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP7R::_0 => false,
                    SP7R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP7R {
                match value {
                    false => SP7R::_0,
                    true => SP7R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP7R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP7R::_1
            }
        }
        #[doc = "Possible values of the field `TP6`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP6R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP6R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP6R::_0 => false,
                    TP6R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP6R {
                match value {
                    false => TP6R::_0,
                    true => TP6R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP6R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP6R::_1
            }
        }
        #[doc = "Possible values of the field `WP6`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP6R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP6R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP6R::_0 => false,
                    WP6R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP6R {
                match value {
                    false => WP6R::_0,
                    true => WP6R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP6R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP6R::_1
            }
        }
        #[doc = "Possible values of the field `SP6`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP6R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP6R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP6R::_0 => false,
                    SP6R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP6R {
                match value {
                    false => SP6R::_0,
                    true => SP6R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP6R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP6R::_1
            }
        }
        #[doc = "Possible values of the field `TP2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP2R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP2R::_0 => false,
                    TP2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP2R {
                match value {
                    false => TP2R::_0,
                    true => TP2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP2R::_1
            }
        }
        #[doc = "Possible values of the field `WP2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP2R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP2R::_0 => false,
                    WP2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP2R {
                match value {
                    false => WP2R::_0,
                    true => WP2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP2R::_1
            }
        }
        #[doc = "Possible values of the field `SP2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP2R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP2R::_0 => false,
                    SP2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP2R {
                match value {
                    false => SP2R::_0,
                    true => SP2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP2R::_1
            }
        }
        #[doc = "Possible values of the field `TP1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP1R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP1R::_0 => false,
                    TP1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP1R {
                match value {
                    false => TP1R::_0,
                    true => TP1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP1R::_1
            }
        }
        #[doc = "Possible values of the field `WP1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP1R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP1R::_0 => false,
                    WP1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP1R {
                match value {
                    false => WP1R::_0,
                    true => WP1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP1R::_1
            }
        }
        #[doc = "Possible values of the field `SP1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP1R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP1R::_0 => false,
                    SP1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP1R {
                match value {
                    false => SP1R::_0,
                    true => SP1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP1R::_1
            }
        }
        #[doc = "Values that can be written to the field `TP7`"]
        pub enum TP7W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP7W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP7W::_0 => false,
                    TP7W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP7W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP7W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP7W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP7W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP7W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP7`"]
        pub enum WP7W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP7W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP7W::_0 => false,
                    WP7W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP7W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP7W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP7W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP7W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP7W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP7`"]
        pub enum SP7W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP7W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP7W::_0 => false,
                    SP7W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP7W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP7W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP7W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP7W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP7W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TP6`"]
        pub enum TP6W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP6W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP6W::_0 => false,
                    TP6W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP6W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP6W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP6W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP6W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP6W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP6`"]
        pub enum WP6W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP6W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP6W::_0 => false,
                    WP6W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP6W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP6W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP6W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP6W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP6W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP6`"]
        pub enum SP6W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP6W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP6W::_0 => false,
                    SP6W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP6W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP6W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP6W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP6W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP6W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TP2`"]
        pub enum TP2W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP2W::_0 => false,
                    TP2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP2W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP2`"]
        pub enum WP2W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP2W::_0 => false,
                    WP2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP2W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 21;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP2`"]
        pub enum SP2W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP2W::_0 => false,
                    SP2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP2W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 22;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TP1`"]
        pub enum TP1W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP1W::_0 => false,
                    TP1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP1W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP1`"]
        pub enum WP1W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP1W::_0 => false,
                    WP1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP1W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 25;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP1`"]
        pub enum SP1W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP1W::_0 => false,
                    SP1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP1W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 26;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Trusted Protect"]
            #[inline(always)]
            pub fn tp7(&self) -> TP7R {
                TP7R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Write Protect"]
            #[inline(always)]
            pub fn wp7(&self) -> WP7R {
                WP7R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp7(&self) -> SP7R {
                SP7R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Trusted Protect"]
            #[inline(always)]
            pub fn tp6(&self) -> TP6R {
                TP6R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Write Protect"]
            #[inline(always)]
            pub fn wp6(&self) -> WP6R {
                WP6R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp6(&self) -> SP6R {
                SP6R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 20 - Trusted Protect"]
            #[inline(always)]
            pub fn tp2(&self) -> TP2R {
                TP2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - Write Protect"]
            #[inline(always)]
            pub fn wp2(&self) -> WP2R {
                WP2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 22 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp2(&self) -> SP2R {
                SP2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 24 - Trusted Protect"]
            #[inline(always)]
            pub fn tp1(&self) -> TP1R {
                TP1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 25 - Write Protect"]
            #[inline(always)]
            pub fn wp1(&self) -> WP1R {
                WP1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 25;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 26 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp1(&self) -> SP1R {
                SP1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 26;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 71303236 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Trusted Protect"]
            #[inline(always)]
            pub fn tp7(&mut self) -> _TP7W {
                _TP7W { w: self }
            }
            #[doc = "Bit 1 - Write Protect"]
            #[inline(always)]
            pub fn wp7(&mut self) -> _WP7W {
                _WP7W { w: self }
            }
            #[doc = "Bit 2 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp7(&mut self) -> _SP7W {
                _SP7W { w: self }
            }
            #[doc = "Bit 4 - Trusted Protect"]
            #[inline(always)]
            pub fn tp6(&mut self) -> _TP6W {
                _TP6W { w: self }
            }
            #[doc = "Bit 5 - Write Protect"]
            #[inline(always)]
            pub fn wp6(&mut self) -> _WP6W {
                _WP6W { w: self }
            }
            #[doc = "Bit 6 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp6(&mut self) -> _SP6W {
                _SP6W { w: self }
            }
            #[doc = "Bit 20 - Trusted Protect"]
            #[inline(always)]
            pub fn tp2(&mut self) -> _TP2W {
                _TP2W { w: self }
            }
            #[doc = "Bit 21 - Write Protect"]
            #[inline(always)]
            pub fn wp2(&mut self) -> _WP2W {
                _WP2W { w: self }
            }
            #[doc = "Bit 22 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp2(&mut self) -> _SP2W {
                _SP2W { w: self }
            }
            #[doc = "Bit 24 - Trusted Protect"]
            #[inline(always)]
            pub fn tp1(&mut self) -> _TP1W {
                _TP1W { w: self }
            }
            #[doc = "Bit 25 - Write Protect"]
            #[inline(always)]
            pub fn wp1(&mut self) -> _WP1W {
                _WP1W { w: self }
            }
            #[doc = "Bit 26 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp1(&mut self) -> _SP1W {
                _SP1W { w: self }
            }
        }
    }
    #[doc = "Off-Platform Peripheral Access Control Register"]
    pub struct OPACRD {
        register: VolatileCell<u32>,
    }
    #[doc = "Off-Platform Peripheral Access Control Register"]
    pub mod opacrd {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::OPACRD {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TP5`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP5R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP5R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP5R::_0 => false,
                    TP5R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP5R {
                match value {
                    false => TP5R::_0,
                    true => TP5R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP5R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP5R::_1
            }
        }
        #[doc = "Possible values of the field `WP5`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP5R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP5R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP5R::_0 => false,
                    WP5R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP5R {
                match value {
                    false => WP5R::_0,
                    true => WP5R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP5R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP5R::_1
            }
        }
        #[doc = "Possible values of the field `SP5`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP5R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP5R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP5R::_0 => false,
                    SP5R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP5R {
                match value {
                    false => SP5R::_0,
                    true => SP5R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP5R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP5R::_1
            }
        }
        #[doc = "Possible values of the field `TP3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP3R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP3R::_0 => false,
                    TP3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP3R {
                match value {
                    false => TP3R::_0,
                    true => TP3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP3R::_1
            }
        }
        #[doc = "Possible values of the field `WP3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP3R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP3R::_0 => false,
                    WP3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP3R {
                match value {
                    false => WP3R::_0,
                    true => WP3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP3R::_1
            }
        }
        #[doc = "Possible values of the field `SP3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP3R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP3R::_0 => false,
                    SP3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP3R {
                match value {
                    false => SP3R::_0,
                    true => SP3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP3R::_1
            }
        }
        #[doc = "Possible values of the field `TP2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP2R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP2R::_0 => false,
                    TP2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP2R {
                match value {
                    false => TP2R::_0,
                    true => TP2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP2R::_1
            }
        }
        #[doc = "Possible values of the field `WP2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP2R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP2R::_0 => false,
                    WP2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP2R {
                match value {
                    false => WP2R::_0,
                    true => WP2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP2R::_1
            }
        }
        #[doc = "Possible values of the field `SP2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP2R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP2R::_0 => false,
                    SP2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP2R {
                match value {
                    false => SP2R::_0,
                    true => SP2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP2R::_1
            }
        }
        #[doc = "Possible values of the field `TP1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP1R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP1R::_0 => false,
                    TP1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP1R {
                match value {
                    false => TP1R::_0,
                    true => TP1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP1R::_1
            }
        }
        #[doc = "Possible values of the field `WP1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP1R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP1R::_0 => false,
                    WP1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP1R {
                match value {
                    false => WP1R::_0,
                    true => WP1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP1R::_1
            }
        }
        #[doc = "Possible values of the field `SP1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP1R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP1R::_0 => false,
                    SP1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP1R {
                match value {
                    false => SP1R::_0,
                    true => SP1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP1R::_1
            }
        }
        #[doc = "Possible values of the field `TP0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP0R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP0R::_0 => false,
                    TP0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP0R {
                match value {
                    false => TP0R::_0,
                    true => TP0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP0R::_1
            }
        }
        #[doc = "Possible values of the field `WP0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP0R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP0R::_0 => false,
                    WP0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP0R {
                match value {
                    false => WP0R::_0,
                    true => WP0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP0R::_1
            }
        }
        #[doc = "Possible values of the field `SP0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP0R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP0R::_0 => false,
                    SP0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP0R {
                match value {
                    false => SP0R::_0,
                    true => SP0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP0R::_1
            }
        }
        #[doc = "Values that can be written to the field `TP5`"]
        pub enum TP5W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP5W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP5W::_0 => false,
                    TP5W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP5W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP5W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP5W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP5W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP5`"]
        pub enum WP5W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP5W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP5W::_0 => false,
                    WP5W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP5W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP5W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP5W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP5W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP5`"]
        pub enum SP5W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP5W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP5W::_0 => false,
                    SP5W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP5W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP5W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP5W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP5W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TP3`"]
        pub enum TP3W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP3W::_0 => false,
                    TP3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP3W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP3`"]
        pub enum WP3W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP3W::_0 => false,
                    WP3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP3W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP3`"]
        pub enum SP3W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP3W::_0 => false,
                    SP3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP3W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TP2`"]
        pub enum TP2W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP2W::_0 => false,
                    TP2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP2W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP2`"]
        pub enum WP2W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP2W::_0 => false,
                    WP2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP2W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 21;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP2`"]
        pub enum SP2W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP2W::_0 => false,
                    SP2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP2W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 22;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TP1`"]
        pub enum TP1W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP1W::_0 => false,
                    TP1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP1W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP1`"]
        pub enum WP1W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP1W::_0 => false,
                    WP1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP1W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 25;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP1`"]
        pub enum SP1W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP1W::_0 => false,
                    SP1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP1W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 26;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TP0`"]
        pub enum TP0W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP0W::_0 => false,
                    TP0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP0W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 28;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP0`"]
        pub enum WP0W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP0W::_0 => false,
                    WP0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP0W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 29;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP0`"]
        pub enum SP0W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP0W::_0 => false,
                    SP0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP0W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 8 - Trusted Protect"]
            #[inline(always)]
            pub fn tp5(&self) -> TP5R {
                TP5R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Write Protect"]
            #[inline(always)]
            pub fn wp5(&self) -> WP5R {
                WP5R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp5(&self) -> SP5R {
                SP5R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 16 - Trusted Protect"]
            #[inline(always)]
            pub fn tp3(&self) -> TP3R {
                TP3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - Write Protect"]
            #[inline(always)]
            pub fn wp3(&self) -> WP3R {
                WP3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 18 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp3(&self) -> SP3R {
                SP3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 20 - Trusted Protect"]
            #[inline(always)]
            pub fn tp2(&self) -> TP2R {
                TP2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - Write Protect"]
            #[inline(always)]
            pub fn wp2(&self) -> WP2R {
                WP2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 22 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp2(&self) -> SP2R {
                SP2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 24 - Trusted Protect"]
            #[inline(always)]
            pub fn tp1(&self) -> TP1R {
                TP1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 25 - Write Protect"]
            #[inline(always)]
            pub fn wp1(&self) -> WP1R {
                WP1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 25;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 26 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp1(&self) -> SP1R {
                SP1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 26;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 28 - Trusted Protect"]
            #[inline(always)]
            pub fn tp0(&self) -> TP0R {
                TP0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 28;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 29 - Write Protect"]
            #[inline(always)]
            pub fn wp0(&self) -> WP0R {
                WP0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 29;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 30 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp0(&self) -> SP0R {
                SP0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 1145308160 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 8 - Trusted Protect"]
            #[inline(always)]
            pub fn tp5(&mut self) -> _TP5W {
                _TP5W { w: self }
            }
            #[doc = "Bit 9 - Write Protect"]
            #[inline(always)]
            pub fn wp5(&mut self) -> _WP5W {
                _WP5W { w: self }
            }
            #[doc = "Bit 10 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp5(&mut self) -> _SP5W {
                _SP5W { w: self }
            }
            #[doc = "Bit 16 - Trusted Protect"]
            #[inline(always)]
            pub fn tp3(&mut self) -> _TP3W {
                _TP3W { w: self }
            }
            #[doc = "Bit 17 - Write Protect"]
            #[inline(always)]
            pub fn wp3(&mut self) -> _WP3W {
                _WP3W { w: self }
            }
            #[doc = "Bit 18 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp3(&mut self) -> _SP3W {
                _SP3W { w: self }
            }
            #[doc = "Bit 20 - Trusted Protect"]
            #[inline(always)]
            pub fn tp2(&mut self) -> _TP2W {
                _TP2W { w: self }
            }
            #[doc = "Bit 21 - Write Protect"]
            #[inline(always)]
            pub fn wp2(&mut self) -> _WP2W {
                _WP2W { w: self }
            }
            #[doc = "Bit 22 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp2(&mut self) -> _SP2W {
                _SP2W { w: self }
            }
            #[doc = "Bit 24 - Trusted Protect"]
            #[inline(always)]
            pub fn tp1(&mut self) -> _TP1W {
                _TP1W { w: self }
            }
            #[doc = "Bit 25 - Write Protect"]
            #[inline(always)]
            pub fn wp1(&mut self) -> _WP1W {
                _WP1W { w: self }
            }
            #[doc = "Bit 26 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp1(&mut self) -> _SP1W {
                _SP1W { w: self }
            }
            #[doc = "Bit 28 - Trusted Protect"]
            #[inline(always)]
            pub fn tp0(&mut self) -> _TP0W {
                _TP0W { w: self }
            }
            #[doc = "Bit 29 - Write Protect"]
            #[inline(always)]
            pub fn wp0(&mut self) -> _WP0W {
                _WP0W { w: self }
            }
            #[doc = "Bit 30 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp0(&mut self) -> _SP0W {
                _SP0W { w: self }
            }
        }
    }
    #[doc = "Off-Platform Peripheral Access Control Register"]
    pub struct OPACRE {
        register: VolatileCell<u32>,
    }
    #[doc = "Off-Platform Peripheral Access Control Register"]
    pub mod opacre {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::OPACRE {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TP6`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP6R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP6R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP6R::_0 => false,
                    TP6R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP6R {
                match value {
                    false => TP6R::_0,
                    true => TP6R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP6R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP6R::_1
            }
        }
        #[doc = "Possible values of the field `WP6`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP6R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP6R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP6R::_0 => false,
                    WP6R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP6R {
                match value {
                    false => WP6R::_0,
                    true => WP6R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP6R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP6R::_1
            }
        }
        #[doc = "Possible values of the field `SP6`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP6R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP6R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP6R::_0 => false,
                    SP6R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP6R {
                match value {
                    false => SP6R::_0,
                    true => SP6R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP6R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP6R::_1
            }
        }
        #[doc = "Possible values of the field `TP0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP0R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP0R::_0 => false,
                    TP0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP0R {
                match value {
                    false => TP0R::_0,
                    true => TP0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP0R::_1
            }
        }
        #[doc = "Possible values of the field `WP0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP0R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP0R::_0 => false,
                    WP0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP0R {
                match value {
                    false => WP0R::_0,
                    true => WP0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP0R::_1
            }
        }
        #[doc = "Possible values of the field `SP0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP0R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP0R::_0 => false,
                    SP0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP0R {
                match value {
                    false => SP0R::_0,
                    true => SP0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP0R::_1
            }
        }
        #[doc = "Values that can be written to the field `TP6`"]
        pub enum TP6W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP6W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP6W::_0 => false,
                    TP6W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP6W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP6W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP6W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP6W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP6W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP6`"]
        pub enum WP6W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP6W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP6W::_0 => false,
                    WP6W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP6W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP6W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP6W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP6W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP6W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP6`"]
        pub enum SP6W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP6W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP6W::_0 => false,
                    SP6W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP6W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP6W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP6W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP6W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP6W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TP0`"]
        pub enum TP0W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP0W::_0 => false,
                    TP0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP0W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 28;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP0`"]
        pub enum WP0W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP0W::_0 => false,
                    WP0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP0W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 29;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP0`"]
        pub enum SP0W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP0W::_0 => false,
                    SP0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP0W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 4 - Trusted Protect"]
            #[inline(always)]
            pub fn tp6(&self) -> TP6R {
                TP6R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Write Protect"]
            #[inline(always)]
            pub fn wp6(&self) -> WP6R {
                WP6R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp6(&self) -> SP6R {
                SP6R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 28 - Trusted Protect"]
            #[inline(always)]
            pub fn tp0(&self) -> TP0R {
                TP0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 28;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 29 - Write Protect"]
            #[inline(always)]
            pub fn wp0(&self) -> WP0R {
                WP0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 29;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 30 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp0(&self) -> SP0R {
                SP0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 1073741888 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 4 - Trusted Protect"]
            #[inline(always)]
            pub fn tp6(&mut self) -> _TP6W {
                _TP6W { w: self }
            }
            #[doc = "Bit 5 - Write Protect"]
            #[inline(always)]
            pub fn wp6(&mut self) -> _WP6W {
                _WP6W { w: self }
            }
            #[doc = "Bit 6 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp6(&mut self) -> _SP6W {
                _SP6W { w: self }
            }
            #[doc = "Bit 28 - Trusted Protect"]
            #[inline(always)]
            pub fn tp0(&mut self) -> _TP0W {
                _TP0W { w: self }
            }
            #[doc = "Bit 29 - Write Protect"]
            #[inline(always)]
            pub fn wp0(&mut self) -> _WP0W {
                _WP0W { w: self }
            }
            #[doc = "Bit 30 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp0(&mut self) -> _SP0W {
                _SP0W { w: self }
            }
        }
    }
    #[doc = "Off-Platform Peripheral Access Control Register"]
    pub struct OPACRF {
        register: VolatileCell<u32>,
    }
    #[doc = "Off-Platform Peripheral Access Control Register"]
    pub mod opacrf {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::OPACRF {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TP5`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP5R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP5R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP5R::_0 => false,
                    TP5R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP5R {
                match value {
                    false => TP5R::_0,
                    true => TP5R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP5R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP5R::_1
            }
        }
        #[doc = "Possible values of the field `WP5`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP5R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP5R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP5R::_0 => false,
                    WP5R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP5R {
                match value {
                    false => WP5R::_0,
                    true => WP5R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP5R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP5R::_1
            }
        }
        #[doc = "Possible values of the field `SP5`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP5R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP5R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP5R::_0 => false,
                    SP5R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP5R {
                match value {
                    false => SP5R::_0,
                    true => SP5R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP5R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP5R::_1
            }
        }
        #[doc = "Possible values of the field `TP4`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP4R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP4R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP4R::_0 => false,
                    TP4R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP4R {
                match value {
                    false => TP4R::_0,
                    true => TP4R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP4R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP4R::_1
            }
        }
        #[doc = "Possible values of the field `WP4`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP4R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP4R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP4R::_0 => false,
                    WP4R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP4R {
                match value {
                    false => WP4R::_0,
                    true => WP4R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP4R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP4R::_1
            }
        }
        #[doc = "Possible values of the field `SP4`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP4R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP4R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP4R::_0 => false,
                    SP4R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP4R {
                match value {
                    false => SP4R::_0,
                    true => SP4R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP4R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP4R::_1
            }
        }
        #[doc = "Possible values of the field `TP3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP3R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP3R::_0 => false,
                    TP3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP3R {
                match value {
                    false => TP3R::_0,
                    true => TP3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP3R::_1
            }
        }
        #[doc = "Possible values of the field `WP3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP3R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP3R::_0 => false,
                    WP3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP3R {
                match value {
                    false => WP3R::_0,
                    true => WP3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP3R::_1
            }
        }
        #[doc = "Possible values of the field `SP3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP3R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP3R::_0 => false,
                    SP3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP3R {
                match value {
                    false => SP3R::_0,
                    true => SP3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP3R::_1
            }
        }
        #[doc = "Possible values of the field `TP2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP2R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP2R::_0 => false,
                    TP2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP2R {
                match value {
                    false => TP2R::_0,
                    true => TP2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP2R::_1
            }
        }
        #[doc = "Possible values of the field `WP2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP2R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP2R::_0 => false,
                    WP2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP2R {
                match value {
                    false => WP2R::_0,
                    true => WP2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP2R::_1
            }
        }
        #[doc = "Possible values of the field `SP2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP2R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP2R::_0 => false,
                    SP2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP2R {
                match value {
                    false => SP2R::_0,
                    true => SP2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP2R::_1
            }
        }
        #[doc = "Possible values of the field `TP1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP1R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP1R::_0 => false,
                    TP1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP1R {
                match value {
                    false => TP1R::_0,
                    true => TP1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP1R::_1
            }
        }
        #[doc = "Possible values of the field `WP1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP1R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP1R::_0 => false,
                    WP1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP1R {
                match value {
                    false => WP1R::_0,
                    true => WP1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP1R::_1
            }
        }
        #[doc = "Possible values of the field `SP1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP1R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP1R::_0 => false,
                    SP1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP1R {
                match value {
                    false => SP1R::_0,
                    true => SP1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP1R::_1
            }
        }
        #[doc = "Possible values of the field `TP0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP0R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP0R::_0 => false,
                    TP0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP0R {
                match value {
                    false => TP0R::_0,
                    true => TP0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP0R::_1
            }
        }
        #[doc = "Possible values of the field `WP0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP0R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP0R::_0 => false,
                    WP0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP0R {
                match value {
                    false => WP0R::_0,
                    true => WP0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP0R::_1
            }
        }
        #[doc = "Possible values of the field `SP0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP0R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP0R::_0 => false,
                    SP0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP0R {
                match value {
                    false => SP0R::_0,
                    true => SP0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP0R::_1
            }
        }
        #[doc = "Values that can be written to the field `TP5`"]
        pub enum TP5W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP5W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP5W::_0 => false,
                    TP5W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP5W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP5W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP5W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP5W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP5`"]
        pub enum WP5W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP5W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP5W::_0 => false,
                    WP5W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP5W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP5W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP5W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP5W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP5`"]
        pub enum SP5W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP5W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP5W::_0 => false,
                    SP5W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP5W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP5W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP5W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP5W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TP4`"]
        pub enum TP4W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP4W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP4W::_0 => false,
                    TP4W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP4W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP4W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP4W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP4W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP4W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP4`"]
        pub enum WP4W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP4W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP4W::_0 => false,
                    WP4W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP4W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP4W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP4W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP4W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP4W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP4`"]
        pub enum SP4W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP4W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP4W::_0 => false,
                    SP4W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP4W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP4W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP4W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP4W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP4W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TP3`"]
        pub enum TP3W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP3W::_0 => false,
                    TP3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP3W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP3`"]
        pub enum WP3W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP3W::_0 => false,
                    WP3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP3W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP3`"]
        pub enum SP3W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP3W::_0 => false,
                    SP3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP3W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TP2`"]
        pub enum TP2W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP2W::_0 => false,
                    TP2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP2W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP2`"]
        pub enum WP2W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP2W::_0 => false,
                    WP2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP2W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 21;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP2`"]
        pub enum SP2W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP2W::_0 => false,
                    SP2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP2W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 22;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TP1`"]
        pub enum TP1W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP1W::_0 => false,
                    TP1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP1W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP1`"]
        pub enum WP1W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP1W::_0 => false,
                    WP1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP1W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 25;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP1`"]
        pub enum SP1W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP1W::_0 => false,
                    SP1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP1W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 26;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TP0`"]
        pub enum TP0W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP0W::_0 => false,
                    TP0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP0W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 28;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP0`"]
        pub enum WP0W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP0W::_0 => false,
                    WP0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP0W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 29;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP0`"]
        pub enum SP0W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP0W::_0 => false,
                    SP0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP0W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 8 - Trusted Protect"]
            #[inline(always)]
            pub fn tp5(&self) -> TP5R {
                TP5R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Write Protect"]
            #[inline(always)]
            pub fn wp5(&self) -> WP5R {
                WP5R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp5(&self) -> SP5R {
                SP5R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Trusted Protect"]
            #[inline(always)]
            pub fn tp4(&self) -> TP4R {
                TP4R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Write Protect"]
            #[inline(always)]
            pub fn wp4(&self) -> WP4R {
                WP4R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp4(&self) -> SP4R {
                SP4R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 16 - Trusted Protect"]
            #[inline(always)]
            pub fn tp3(&self) -> TP3R {
                TP3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - Write Protect"]
            #[inline(always)]
            pub fn wp3(&self) -> WP3R {
                WP3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 18 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp3(&self) -> SP3R {
                SP3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 20 - Trusted Protect"]
            #[inline(always)]
            pub fn tp2(&self) -> TP2R {
                TP2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - Write Protect"]
            #[inline(always)]
            pub fn wp2(&self) -> WP2R {
                WP2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 22 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp2(&self) -> SP2R {
                SP2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 24 - Trusted Protect"]
            #[inline(always)]
            pub fn tp1(&self) -> TP1R {
                TP1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 25 - Write Protect"]
            #[inline(always)]
            pub fn wp1(&self) -> WP1R {
                WP1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 25;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 26 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp1(&self) -> SP1R {
                SP1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 26;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 28 - Trusted Protect"]
            #[inline(always)]
            pub fn tp0(&self) -> TP0R {
                TP0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 28;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 29 - Write Protect"]
            #[inline(always)]
            pub fn wp0(&self) -> WP0R {
                WP0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 29;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 30 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp0(&self) -> SP0R {
                SP0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 1145324544 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 8 - Trusted Protect"]
            #[inline(always)]
            pub fn tp5(&mut self) -> _TP5W {
                _TP5W { w: self }
            }
            #[doc = "Bit 9 - Write Protect"]
            #[inline(always)]
            pub fn wp5(&mut self) -> _WP5W {
                _WP5W { w: self }
            }
            #[doc = "Bit 10 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp5(&mut self) -> _SP5W {
                _SP5W { w: self }
            }
            #[doc = "Bit 12 - Trusted Protect"]
            #[inline(always)]
            pub fn tp4(&mut self) -> _TP4W {
                _TP4W { w: self }
            }
            #[doc = "Bit 13 - Write Protect"]
            #[inline(always)]
            pub fn wp4(&mut self) -> _WP4W {
                _WP4W { w: self }
            }
            #[doc = "Bit 14 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp4(&mut self) -> _SP4W {
                _SP4W { w: self }
            }
            #[doc = "Bit 16 - Trusted Protect"]
            #[inline(always)]
            pub fn tp3(&mut self) -> _TP3W {
                _TP3W { w: self }
            }
            #[doc = "Bit 17 - Write Protect"]
            #[inline(always)]
            pub fn wp3(&mut self) -> _WP3W {
                _WP3W { w: self }
            }
            #[doc = "Bit 18 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp3(&mut self) -> _SP3W {
                _SP3W { w: self }
            }
            #[doc = "Bit 20 - Trusted Protect"]
            #[inline(always)]
            pub fn tp2(&mut self) -> _TP2W {
                _TP2W { w: self }
            }
            #[doc = "Bit 21 - Write Protect"]
            #[inline(always)]
            pub fn wp2(&mut self) -> _WP2W {
                _WP2W { w: self }
            }
            #[doc = "Bit 22 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp2(&mut self) -> _SP2W {
                _SP2W { w: self }
            }
            #[doc = "Bit 24 - Trusted Protect"]
            #[inline(always)]
            pub fn tp1(&mut self) -> _TP1W {
                _TP1W { w: self }
            }
            #[doc = "Bit 25 - Write Protect"]
            #[inline(always)]
            pub fn wp1(&mut self) -> _WP1W {
                _WP1W { w: self }
            }
            #[doc = "Bit 26 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp1(&mut self) -> _SP1W {
                _SP1W { w: self }
            }
            #[doc = "Bit 28 - Trusted Protect"]
            #[inline(always)]
            pub fn tp0(&mut self) -> _TP0W {
                _TP0W { w: self }
            }
            #[doc = "Bit 29 - Write Protect"]
            #[inline(always)]
            pub fn wp0(&mut self) -> _WP0W {
                _WP0W { w: self }
            }
            #[doc = "Bit 30 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp0(&mut self) -> _SP0W {
                _SP0W { w: self }
            }
        }
    }
    #[doc = "Off-Platform Peripheral Access Control Register"]
    pub struct OPACRG {
        register: VolatileCell<u32>,
    }
    #[doc = "Off-Platform Peripheral Access Control Register"]
    pub mod opacrg {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::OPACRG {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TP2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP2R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP2R::_0 => false,
                    TP2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP2R {
                match value {
                    false => TP2R::_0,
                    true => TP2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP2R::_1
            }
        }
        #[doc = "Possible values of the field `WP2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP2R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP2R::_0 => false,
                    WP2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP2R {
                match value {
                    false => WP2R::_0,
                    true => WP2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP2R::_1
            }
        }
        #[doc = "Possible values of the field `SP2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP2R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP2R::_0 => false,
                    SP2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP2R {
                match value {
                    false => SP2R::_0,
                    true => SP2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP2R::_1
            }
        }
        #[doc = "Values that can be written to the field `TP2`"]
        pub enum TP2W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP2W::_0 => false,
                    TP2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP2W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP2`"]
        pub enum WP2W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP2W::_0 => false,
                    WP2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP2W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 21;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP2`"]
        pub enum SP2W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP2W::_0 => false,
                    SP2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP2W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 22;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 20 - Trusted Protect"]
            #[inline(always)]
            pub fn tp2(&self) -> TP2R {
                TP2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - Write Protect"]
            #[inline(always)]
            pub fn wp2(&self) -> WP2R {
                WP2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 22 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp2(&self) -> SP2R {
                SP2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 4194304 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 20 - Trusted Protect"]
            #[inline(always)]
            pub fn tp2(&mut self) -> _TP2W {
                _TP2W { w: self }
            }
            #[doc = "Bit 21 - Write Protect"]
            #[inline(always)]
            pub fn wp2(&mut self) -> _WP2W {
                _WP2W { w: self }
            }
            #[doc = "Bit 22 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp2(&mut self) -> _SP2W {
                _SP2W { w: self }
            }
        }
    }
    #[doc = "Off-Platform Peripheral Access Control Register"]
    pub struct OPACRH {
        register: VolatileCell<u32>,
    }
    #[doc = "Off-Platform Peripheral Access Control Register"]
    pub mod opacrh {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::OPACRH {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TP2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP2R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP2R::_0 => false,
                    TP2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP2R {
                match value {
                    false => TP2R::_0,
                    true => TP2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP2R::_1
            }
        }
        #[doc = "Possible values of the field `WP2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP2R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP2R::_0 => false,
                    WP2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP2R {
                match value {
                    false => WP2R::_0,
                    true => WP2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP2R::_1
            }
        }
        #[doc = "Possible values of the field `SP2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP2R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP2R::_0 => false,
                    SP2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP2R {
                match value {
                    false => SP2R::_0,
                    true => SP2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP2R::_1
            }
        }
        #[doc = "Values that can be written to the field `TP2`"]
        pub enum TP2W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP2W::_0 => false,
                    TP2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP2W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP2`"]
        pub enum WP2W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP2W::_0 => false,
                    WP2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP2W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 21;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP2`"]
        pub enum SP2W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP2W::_0 => false,
                    SP2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP2W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 22;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 20 - Trusted Protect"]
            #[inline(always)]
            pub fn tp2(&self) -> TP2R {
                TP2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - Write Protect"]
            #[inline(always)]
            pub fn wp2(&self) -> WP2R {
                WP2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 22 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp2(&self) -> SP2R {
                SP2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 4194304 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 20 - Trusted Protect"]
            #[inline(always)]
            pub fn tp2(&mut self) -> _TP2W {
                _TP2W { w: self }
            }
            #[doc = "Bit 21 - Write Protect"]
            #[inline(always)]
            pub fn wp2(&mut self) -> _WP2W {
                _WP2W { w: self }
            }
            #[doc = "Bit 22 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp2(&mut self) -> _SP2W {
                _SP2W { w: self }
            }
        }
    }
    #[doc = "Off-Platform Peripheral Access Control Register"]
    pub struct OPACRI {
        register: VolatileCell<u32>,
    }
    #[doc = "Off-Platform Peripheral Access Control Register"]
    pub mod opacri {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::OPACRI {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TP6`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP6R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP6R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP6R::_0 => false,
                    TP6R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP6R {
                match value {
                    false => TP6R::_0,
                    true => TP6R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP6R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP6R::_1
            }
        }
        #[doc = "Possible values of the field `WP6`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP6R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP6R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP6R::_0 => false,
                    WP6R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP6R {
                match value {
                    false => WP6R::_0,
                    true => WP6R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP6R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP6R::_1
            }
        }
        #[doc = "Possible values of the field `SP6`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP6R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP6R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP6R::_0 => false,
                    SP6R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP6R {
                match value {
                    false => SP6R::_0,
                    true => SP6R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP6R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP6R::_1
            }
        }
        #[doc = "Possible values of the field `TP5`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP5R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP5R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP5R::_0 => false,
                    TP5R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP5R {
                match value {
                    false => TP5R::_0,
                    true => TP5R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP5R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP5R::_1
            }
        }
        #[doc = "Possible values of the field `WP5`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP5R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP5R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP5R::_0 => false,
                    WP5R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP5R {
                match value {
                    false => WP5R::_0,
                    true => WP5R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP5R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP5R::_1
            }
        }
        #[doc = "Possible values of the field `SP5`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP5R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP5R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP5R::_0 => false,
                    SP5R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP5R {
                match value {
                    false => SP5R::_0,
                    true => SP5R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP5R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP5R::_1
            }
        }
        #[doc = "Possible values of the field `TP4`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP4R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP4R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP4R::_0 => false,
                    TP4R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP4R {
                match value {
                    false => TP4R::_0,
                    true => TP4R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP4R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP4R::_1
            }
        }
        #[doc = "Possible values of the field `WP4`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP4R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP4R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP4R::_0 => false,
                    WP4R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP4R {
                match value {
                    false => WP4R::_0,
                    true => WP4R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP4R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP4R::_1
            }
        }
        #[doc = "Possible values of the field `SP4`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP4R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP4R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP4R::_0 => false,
                    SP4R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP4R {
                match value {
                    false => SP4R::_0,
                    true => SP4R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP4R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP4R::_1
            }
        }
        #[doc = "Possible values of the field `TP3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP3R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP3R::_0 => false,
                    TP3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP3R {
                match value {
                    false => TP3R::_0,
                    true => TP3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP3R::_1
            }
        }
        #[doc = "Possible values of the field `WP3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP3R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP3R::_0 => false,
                    WP3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP3R {
                match value {
                    false => WP3R::_0,
                    true => WP3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP3R::_1
            }
        }
        #[doc = "Possible values of the field `SP3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP3R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP3R::_0 => false,
                    SP3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP3R {
                match value {
                    false => SP3R::_0,
                    true => SP3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP3R::_1
            }
        }
        #[doc = "Possible values of the field `TP1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP1R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP1R::_0 => false,
                    TP1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP1R {
                match value {
                    false => TP1R::_0,
                    true => TP1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP1R::_1
            }
        }
        #[doc = "Possible values of the field `WP1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP1R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP1R::_0 => false,
                    WP1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP1R {
                match value {
                    false => WP1R::_0,
                    true => WP1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP1R::_1
            }
        }
        #[doc = "Possible values of the field `SP1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP1R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP1R::_0 => false,
                    SP1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP1R {
                match value {
                    false => SP1R::_0,
                    true => SP1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP1R::_1
            }
        }
        #[doc = "Values that can be written to the field `TP6`"]
        pub enum TP6W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP6W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP6W::_0 => false,
                    TP6W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP6W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP6W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP6W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP6W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP6W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP6`"]
        pub enum WP6W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP6W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP6W::_0 => false,
                    WP6W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP6W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP6W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP6W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP6W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP6W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP6`"]
        pub enum SP6W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP6W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP6W::_0 => false,
                    SP6W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP6W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP6W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP6W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP6W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP6W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TP5`"]
        pub enum TP5W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP5W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP5W::_0 => false,
                    TP5W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP5W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP5W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP5W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP5W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP5`"]
        pub enum WP5W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP5W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP5W::_0 => false,
                    WP5W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP5W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP5W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP5W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP5W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP5`"]
        pub enum SP5W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP5W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP5W::_0 => false,
                    SP5W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP5W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP5W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP5W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP5W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TP4`"]
        pub enum TP4W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP4W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP4W::_0 => false,
                    TP4W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP4W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP4W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP4W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP4W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP4W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP4`"]
        pub enum WP4W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP4W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP4W::_0 => false,
                    WP4W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP4W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP4W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP4W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP4W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP4W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP4`"]
        pub enum SP4W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP4W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP4W::_0 => false,
                    SP4W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP4W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP4W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP4W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP4W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP4W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TP3`"]
        pub enum TP3W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP3W::_0 => false,
                    TP3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP3W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP3`"]
        pub enum WP3W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP3W::_0 => false,
                    WP3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP3W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP3`"]
        pub enum SP3W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP3W::_0 => false,
                    SP3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP3W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TP1`"]
        pub enum TP1W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP1W::_0 => false,
                    TP1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP1W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP1`"]
        pub enum WP1W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP1W::_0 => false,
                    WP1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP1W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 25;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP1`"]
        pub enum SP1W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP1W::_0 => false,
                    SP1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP1W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 26;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 4 - Trusted Protect"]
            #[inline(always)]
            pub fn tp6(&self) -> TP6R {
                TP6R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Write Protect"]
            #[inline(always)]
            pub fn wp6(&self) -> WP6R {
                WP6R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp6(&self) -> SP6R {
                SP6R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Trusted Protect"]
            #[inline(always)]
            pub fn tp5(&self) -> TP5R {
                TP5R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Write Protect"]
            #[inline(always)]
            pub fn wp5(&self) -> WP5R {
                WP5R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp5(&self) -> SP5R {
                SP5R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Trusted Protect"]
            #[inline(always)]
            pub fn tp4(&self) -> TP4R {
                TP4R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Write Protect"]
            #[inline(always)]
            pub fn wp4(&self) -> WP4R {
                WP4R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp4(&self) -> SP4R {
                SP4R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 16 - Trusted Protect"]
            #[inline(always)]
            pub fn tp3(&self) -> TP3R {
                TP3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - Write Protect"]
            #[inline(always)]
            pub fn wp3(&self) -> WP3R {
                WP3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 18 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp3(&self) -> SP3R {
                SP3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 24 - Trusted Protect"]
            #[inline(always)]
            pub fn tp1(&self) -> TP1R {
                TP1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 25 - Write Protect"]
            #[inline(always)]
            pub fn wp1(&self) -> WP1R {
                WP1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 25;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 26 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp1(&self) -> SP1R {
                SP1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 26;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 67388480 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 4 - Trusted Protect"]
            #[inline(always)]
            pub fn tp6(&mut self) -> _TP6W {
                _TP6W { w: self }
            }
            #[doc = "Bit 5 - Write Protect"]
            #[inline(always)]
            pub fn wp6(&mut self) -> _WP6W {
                _WP6W { w: self }
            }
            #[doc = "Bit 6 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp6(&mut self) -> _SP6W {
                _SP6W { w: self }
            }
            #[doc = "Bit 8 - Trusted Protect"]
            #[inline(always)]
            pub fn tp5(&mut self) -> _TP5W {
                _TP5W { w: self }
            }
            #[doc = "Bit 9 - Write Protect"]
            #[inline(always)]
            pub fn wp5(&mut self) -> _WP5W {
                _WP5W { w: self }
            }
            #[doc = "Bit 10 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp5(&mut self) -> _SP5W {
                _SP5W { w: self }
            }
            #[doc = "Bit 12 - Trusted Protect"]
            #[inline(always)]
            pub fn tp4(&mut self) -> _TP4W {
                _TP4W { w: self }
            }
            #[doc = "Bit 13 - Write Protect"]
            #[inline(always)]
            pub fn wp4(&mut self) -> _WP4W {
                _WP4W { w: self }
            }
            #[doc = "Bit 14 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp4(&mut self) -> _SP4W {
                _SP4W { w: self }
            }
            #[doc = "Bit 16 - Trusted Protect"]
            #[inline(always)]
            pub fn tp3(&mut self) -> _TP3W {
                _TP3W { w: self }
            }
            #[doc = "Bit 17 - Write Protect"]
            #[inline(always)]
            pub fn wp3(&mut self) -> _WP3W {
                _WP3W { w: self }
            }
            #[doc = "Bit 18 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp3(&mut self) -> _SP3W {
                _SP3W { w: self }
            }
            #[doc = "Bit 24 - Trusted Protect"]
            #[inline(always)]
            pub fn tp1(&mut self) -> _TP1W {
                _TP1W { w: self }
            }
            #[doc = "Bit 25 - Write Protect"]
            #[inline(always)]
            pub fn wp1(&mut self) -> _WP1W {
                _WP1W { w: self }
            }
            #[doc = "Bit 26 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp1(&mut self) -> _SP1W {
                _SP1W { w: self }
            }
        }
    }
    #[doc = "Off-Platform Peripheral Access Control Register"]
    pub struct OPACRJ {
        register: VolatileCell<u32>,
    }
    #[doc = "Off-Platform Peripheral Access Control Register"]
    pub mod opacrj {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::OPACRJ {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TP4`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP4R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP4R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP4R::_0 => false,
                    TP4R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP4R {
                match value {
                    false => TP4R::_0,
                    true => TP4R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP4R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP4R::_1
            }
        }
        #[doc = "Possible values of the field `WP4`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP4R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP4R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP4R::_0 => false,
                    WP4R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP4R {
                match value {
                    false => WP4R::_0,
                    true => WP4R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP4R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP4R::_1
            }
        }
        #[doc = "Possible values of the field `SP4`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP4R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP4R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP4R::_0 => false,
                    SP4R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP4R {
                match value {
                    false => SP4R::_0,
                    true => SP4R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP4R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP4R::_1
            }
        }
        #[doc = "Possible values of the field `TP3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP3R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP3R::_0 => false,
                    TP3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP3R {
                match value {
                    false => TP3R::_0,
                    true => TP3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP3R::_1
            }
        }
        #[doc = "Possible values of the field `WP3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP3R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP3R::_0 => false,
                    WP3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP3R {
                match value {
                    false => WP3R::_0,
                    true => WP3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP3R::_1
            }
        }
        #[doc = "Possible values of the field `SP3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP3R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP3R::_0 => false,
                    SP3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP3R {
                match value {
                    false => SP3R::_0,
                    true => SP3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP3R::_1
            }
        }
        #[doc = "Possible values of the field `TP2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP2R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP2R::_0 => false,
                    TP2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP2R {
                match value {
                    false => TP2R::_0,
                    true => TP2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP2R::_1
            }
        }
        #[doc = "Possible values of the field `WP2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP2R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP2R::_0 => false,
                    WP2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP2R {
                match value {
                    false => WP2R::_0,
                    true => WP2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP2R::_1
            }
        }
        #[doc = "Possible values of the field `SP2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP2R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP2R::_0 => false,
                    SP2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP2R {
                match value {
                    false => SP2R::_0,
                    true => SP2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP2R::_1
            }
        }
        #[doc = "Values that can be written to the field `TP4`"]
        pub enum TP4W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP4W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP4W::_0 => false,
                    TP4W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP4W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP4W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP4W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP4W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP4W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP4`"]
        pub enum WP4W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP4W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP4W::_0 => false,
                    WP4W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP4W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP4W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP4W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP4W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP4W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP4`"]
        pub enum SP4W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP4W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP4W::_0 => false,
                    SP4W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP4W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP4W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP4W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP4W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP4W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TP3`"]
        pub enum TP3W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP3W::_0 => false,
                    TP3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP3W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP3`"]
        pub enum WP3W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP3W::_0 => false,
                    WP3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP3W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP3`"]
        pub enum SP3W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP3W::_0 => false,
                    SP3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP3W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TP2`"]
        pub enum TP2W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP2W::_0 => false,
                    TP2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP2W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP2`"]
        pub enum WP2W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP2W::_0 => false,
                    WP2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP2W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 21;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP2`"]
        pub enum SP2W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP2W::_0 => false,
                    SP2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP2W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 22;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 12 - Trusted Protect"]
            #[inline(always)]
            pub fn tp4(&self) -> TP4R {
                TP4R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Write Protect"]
            #[inline(always)]
            pub fn wp4(&self) -> WP4R {
                WP4R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp4(&self) -> SP4R {
                SP4R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 16 - Trusted Protect"]
            #[inline(always)]
            pub fn tp3(&self) -> TP3R {
                TP3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - Write Protect"]
            #[inline(always)]
            pub fn wp3(&self) -> WP3R {
                WP3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 18 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp3(&self) -> SP3R {
                SP3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 20 - Trusted Protect"]
            #[inline(always)]
            pub fn tp2(&self) -> TP2R {
                TP2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - Write Protect"]
            #[inline(always)]
            pub fn wp2(&self) -> WP2R {
                WP2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 22 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp2(&self) -> SP2R {
                SP2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 4472832 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 12 - Trusted Protect"]
            #[inline(always)]
            pub fn tp4(&mut self) -> _TP4W {
                _TP4W { w: self }
            }
            #[doc = "Bit 13 - Write Protect"]
            #[inline(always)]
            pub fn wp4(&mut self) -> _WP4W {
                _WP4W { w: self }
            }
            #[doc = "Bit 14 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp4(&mut self) -> _SP4W {
                _SP4W { w: self }
            }
            #[doc = "Bit 16 - Trusted Protect"]
            #[inline(always)]
            pub fn tp3(&mut self) -> _TP3W {
                _TP3W { w: self }
            }
            #[doc = "Bit 17 - Write Protect"]
            #[inline(always)]
            pub fn wp3(&mut self) -> _WP3W {
                _WP3W { w: self }
            }
            #[doc = "Bit 18 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp3(&mut self) -> _SP3W {
                _SP3W { w: self }
            }
            #[doc = "Bit 20 - Trusted Protect"]
            #[inline(always)]
            pub fn tp2(&mut self) -> _TP2W {
                _TP2W { w: self }
            }
            #[doc = "Bit 21 - Write Protect"]
            #[inline(always)]
            pub fn wp2(&mut self) -> _WP2W {
                _WP2W { w: self }
            }
            #[doc = "Bit 22 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp2(&mut self) -> _SP2W {
                _SP2W { w: self }
            }
        }
    }
    #[doc = "Off-Platform Peripheral Access Control Register"]
    pub struct OPACRK {
        register: VolatileCell<u32>,
    }
    #[doc = "Off-Platform Peripheral Access Control Register"]
    pub mod opacrk {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::OPACRK {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TP3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP3R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP3R::_0 => false,
                    TP3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP3R {
                match value {
                    false => TP3R::_0,
                    true => TP3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP3R::_1
            }
        }
        #[doc = "Possible values of the field `WP3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP3R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP3R::_0 => false,
                    WP3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP3R {
                match value {
                    false => WP3R::_0,
                    true => WP3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP3R::_1
            }
        }
        #[doc = "Possible values of the field `SP3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP3R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP3R::_0 => false,
                    SP3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP3R {
                match value {
                    false => SP3R::_0,
                    true => SP3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP3R::_1
            }
        }
        #[doc = "Values that can be written to the field `TP3`"]
        pub enum TP3W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP3W::_0 => false,
                    TP3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP3W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP3`"]
        pub enum WP3W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP3W::_0 => false,
                    WP3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP3W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP3`"]
        pub enum SP3W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP3W::_0 => false,
                    SP3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP3W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 16 - Trusted Protect"]
            #[inline(always)]
            pub fn tp3(&self) -> TP3R {
                TP3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - Write Protect"]
            #[inline(always)]
            pub fn wp3(&self) -> WP3R {
                WP3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 18 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp3(&self) -> SP3R {
                SP3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 262144 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 16 - Trusted Protect"]
            #[inline(always)]
            pub fn tp3(&mut self) -> _TP3W {
                _TP3W { w: self }
            }
            #[doc = "Bit 17 - Write Protect"]
            #[inline(always)]
            pub fn wp3(&mut self) -> _WP3W {
                _WP3W { w: self }
            }
            #[doc = "Bit 18 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp3(&mut self) -> _SP3W {
                _SP3W { w: self }
            }
        }
    }
    #[doc = "Off-Platform Peripheral Access Control Register"]
    pub struct OPACRL {
        register: VolatileCell<u32>,
    }
    #[doc = "Off-Platform Peripheral Access Control Register"]
    pub mod opacrl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::OPACRL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TP7`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP7R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP7R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP7R::_0 => false,
                    TP7R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP7R {
                match value {
                    false => TP7R::_0,
                    true => TP7R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP7R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP7R::_1
            }
        }
        #[doc = "Possible values of the field `WP7`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP7R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP7R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP7R::_0 => false,
                    WP7R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP7R {
                match value {
                    false => WP7R::_0,
                    true => WP7R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP7R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP7R::_1
            }
        }
        #[doc = "Possible values of the field `SP7`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP7R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP7R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP7R::_0 => false,
                    SP7R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP7R {
                match value {
                    false => SP7R::_0,
                    true => SP7R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP7R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP7R::_1
            }
        }
        #[doc = "Possible values of the field `TP6`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP6R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP6R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP6R::_0 => false,
                    TP6R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP6R {
                match value {
                    false => TP6R::_0,
                    true => TP6R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP6R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP6R::_1
            }
        }
        #[doc = "Possible values of the field `WP6`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP6R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP6R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP6R::_0 => false,
                    WP6R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP6R {
                match value {
                    false => WP6R::_0,
                    true => WP6R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP6R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP6R::_1
            }
        }
        #[doc = "Possible values of the field `SP6`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP6R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP6R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP6R::_0 => false,
                    SP6R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP6R {
                match value {
                    false => SP6R::_0,
                    true => SP6R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP6R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP6R::_1
            }
        }
        #[doc = "Possible values of the field `TP5`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TP5R {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP5R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TP5R::_0 => false,
                    TP5R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TP5R {
                match value {
                    false => TP5R::_0,
                    true => TP5R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TP5R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TP5R::_1
            }
        }
        #[doc = "Possible values of the field `WP5`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WP5R {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP5R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WP5R::_0 => false,
                    WP5R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WP5R {
                match value {
                    false => WP5R::_0,
                    true => WP5R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WP5R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WP5R::_1
            }
        }
        #[doc = "Possible values of the field `SP5`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SP5R {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP5R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SP5R::_0 => false,
                    SP5R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SP5R {
                match value {
                    false => SP5R::_0,
                    true => SP5R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SP5R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SP5R::_1
            }
        }
        #[doc = "Values that can be written to the field `TP7`"]
        pub enum TP7W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP7W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP7W::_0 => false,
                    TP7W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP7W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP7W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP7W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP7W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP7W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP7`"]
        pub enum WP7W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP7W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP7W::_0 => false,
                    WP7W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP7W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP7W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP7W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP7W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP7W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP7`"]
        pub enum SP7W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP7W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP7W::_0 => false,
                    SP7W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP7W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP7W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP7W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP7W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP7W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TP6`"]
        pub enum TP6W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP6W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP6W::_0 => false,
                    TP6W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP6W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP6W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP6W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP6W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP6W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP6`"]
        pub enum WP6W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP6W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP6W::_0 => false,
                    WP6W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP6W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP6W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP6W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP6W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP6W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP6`"]
        pub enum SP6W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP6W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP6W::_0 => false,
                    SP6W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP6W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP6W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP6W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP6W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP6W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TP5`"]
        pub enum TP5W {
            #[doc = "Accesses from an untrusted master are allowed."]
            _0,
            #[doc = "Accesses from an untrusted master are not allowed."]
            _1,
        }
        impl TP5W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TP5W::_0 => false,
                    TP5W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TP5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TP5W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TP5W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accesses from an untrusted master are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TP5W::_0)
            }
            #[doc = "Accesses from an untrusted master are not allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TP5W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WP5`"]
        pub enum WP5W {
            #[doc = "This peripheral allows write accesses."]
            _0,
            #[doc = "This peripheral is write protected."]
            _1,
        }
        impl WP5W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WP5W::_0 => false,
                    WP5W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WP5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _WP5W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WP5W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral allows write accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WP5W::_0)
            }
            #[doc = "This peripheral is write protected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WP5W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SP5`"]
        pub enum SP5W {
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            _0,
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            _1,
        }
        impl SP5W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SP5W::_0 => false,
                    SP5W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SP5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SP5W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SP5W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This peripheral does not require supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SP5W::_0)
            }
            #[doc = "This peripheral requires supervisor privilege level for accesses."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SP5W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Trusted Protect"]
            #[inline(always)]
            pub fn tp7(&self) -> TP7R {
                TP7R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Write Protect"]
            #[inline(always)]
            pub fn wp7(&self) -> WP7R {
                WP7R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp7(&self) -> SP7R {
                SP7R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Trusted Protect"]
            #[inline(always)]
            pub fn tp6(&self) -> TP6R {
                TP6R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Write Protect"]
            #[inline(always)]
            pub fn wp6(&self) -> WP6R {
                WP6R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp6(&self) -> SP6R {
                SP6R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Trusted Protect"]
            #[inline(always)]
            pub fn tp5(&self) -> TP5R {
                TP5R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Write Protect"]
            #[inline(always)]
            pub fn wp5(&self) -> WP5R {
                WP5R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp5(&self) -> SP5R {
                SP5R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 1092 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Trusted Protect"]
            #[inline(always)]
            pub fn tp7(&mut self) -> _TP7W {
                _TP7W { w: self }
            }
            #[doc = "Bit 1 - Write Protect"]
            #[inline(always)]
            pub fn wp7(&mut self) -> _WP7W {
                _WP7W { w: self }
            }
            #[doc = "Bit 2 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp7(&mut self) -> _SP7W {
                _SP7W { w: self }
            }
            #[doc = "Bit 4 - Trusted Protect"]
            #[inline(always)]
            pub fn tp6(&mut self) -> _TP6W {
                _TP6W { w: self }
            }
            #[doc = "Bit 5 - Write Protect"]
            #[inline(always)]
            pub fn wp6(&mut self) -> _WP6W {
                _WP6W { w: self }
            }
            #[doc = "Bit 6 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp6(&mut self) -> _SP6W {
                _SP6W { w: self }
            }
            #[doc = "Bit 8 - Trusted Protect"]
            #[inline(always)]
            pub fn tp5(&mut self) -> _TP5W {
                _TP5W { w: self }
            }
            #[doc = "Bit 9 - Write Protect"]
            #[inline(always)]
            pub fn wp5(&mut self) -> _WP5W {
                _WP5W { w: self }
            }
            #[doc = "Bit 10 - Supervisor Protect"]
            #[inline(always)]
            pub fn sp5(&mut self) -> _SP5W {
                _SP5W { w: self }
            }
        }
    }
}
#[doc = "AIPS-Lite Bridge"]
pub struct AIPS {
    register_block: aips::RegisterBlock,
}
impl Deref for AIPS {
    type Target = aips::RegisterBlock;
    fn deref(&self) -> &aips::RegisterBlock {
        &self.register_block
    }
}
#[doc = "MSCM"]
pub const MSCM: Peripheral<MSCM> = unsafe { Peripheral::new(1073745920) };
#[doc = "MSCM"]
pub mod mscm {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - Processor X Type Register"]
        pub cpx_type: CPXTYPE,
        #[doc = "0x04 - Processor X Number Register"]
        pub cpx_num: CPXNUM,
        #[doc = "0x08 - Processor X Master Register"]
        pub cpx_master: CPXMASTER,
        #[doc = "0x0c - Processor X Count Register"]
        pub cpx_count: CPXCOUNT,
        #[doc = "0x10 - Processor X Configuration Register 0"]
        pub cpx_cfg0: CPXCFG0,
        #[doc = "0x14 - Processor X Configuration Register 1"]
        pub cpx_cfg1: CPXCFG1,
        #[doc = "0x18 - Processor X Configuration Register 2"]
        pub cpx_cfg2: CPXCFG2,
        #[doc = "0x1c - Processor X Configuration Register 3"]
        pub cpx_cfg3: CPXCFG3,
        #[doc = "0x20 - Processor 0 Type Register"]
        pub cp0type: CP0TYPE,
        #[doc = "0x24 - Processor 0 Number Register"]
        pub cp0num: CP0NUM,
        #[doc = "0x28 - Processor 0 Master Register"]
        pub cp0master: CP0MASTER,
        #[doc = "0x2c - Processor 0 Count Register"]
        pub cp0count: CP0COUNT,
        #[doc = "0x30 - Processor 0 Configuration Register 0"]
        pub cp0cfg0: CP0CFG0,
        #[doc = "0x34 - Processor 0 Configuration Register 1"]
        pub cp0cfg1: CP0CFG1,
        #[doc = "0x38 - Processor 0 Configuration Register 2"]
        pub cp0cfg2: CP0CFG2,
        #[doc = "0x3c - Processor 0 Configuration Register 3"]
        pub cp0cfg3: CP0CFG3,
        _reserved0: [u8; 960usize],
        #[doc = "0x400 - On-Chip Memory Descriptor Register"]
        pub ocmdr0: OCMDR0,
        #[doc = "0x404 - On-Chip Memory Descriptor Register"]
        pub ocmdr1: OCMDR1,
        #[doc = "0x408 - On-Chip Memory Descriptor Register"]
        pub ocmdr2: OCMDR2,
        #[doc = "0x40c - On-Chip Memory Descriptor Register"]
        pub ocmdr3: OCMDR3,
    }
    #[doc = "Processor X Type Register"]
    pub struct CPXTYPE {
        register: VolatileCell<u32>,
    }
    #[doc = "Processor X Type Register"]
    pub mod cpx_type {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::CPXTYPE {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct RYPZR {
            bits: u8,
        }
        impl RYPZR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct PERSONALITYR {
            bits: u32,
        }
        impl PERSONALITYR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Processor x Revision"]
            #[inline(always)]
            pub fn rypz(&self) -> RYPZR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                RYPZR { bits }
            }
            #[doc = "Bits 8:31 - Processor x Personality"]
            #[inline(always)]
            pub fn personality(&self) -> PERSONALITYR {
                let bits = {
                    const MASK: u32 = 16777215;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                PERSONALITYR { bits }
            }
        }
    }
    #[doc = "Processor X Number Register"]
    pub struct CPXNUM {
        register: VolatileCell<u32>,
    }
    #[doc = "Processor X Number Register"]
    pub mod cpx_num {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::CPXNUM {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct CPNR {
            bits: bool,
        }
        impl CPNR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Processor x Number"]
            #[inline(always)]
            pub fn cpn(&self) -> CPNR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                CPNR { bits }
            }
        }
    }
    #[doc = "Processor X Master Register"]
    pub struct CPXMASTER {
        register: VolatileCell<u32>,
    }
    #[doc = "Processor X Master Register"]
    pub mod cpx_master {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::CPXMASTER {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct PPMNR {
            bits: u8,
        }
        impl PPMNR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Processor x Physical Master Number"]
            #[inline(always)]
            pub fn ppmn(&self) -> PPMNR {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                PPMNR { bits }
            }
        }
    }
    #[doc = "Processor X Count Register"]
    pub struct CPXCOUNT {
        register: VolatileCell<u32>,
    }
    #[doc = "Processor X Count Register"]
    pub mod cpx_count {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::CPXCOUNT {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct PCNTR {
            bits: u8,
        }
        impl PCNTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:1 - Processor Count"]
            #[inline(always)]
            pub fn pcnt(&self) -> PCNTR {
                let bits = {
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                PCNTR { bits }
            }
        }
    }
    #[doc = "Processor X Configuration Register 0"]
    pub struct CPXCFG0 {
        register: VolatileCell<u32>,
    }
    #[doc = "Processor X Configuration Register 0"]
    pub mod cpx_cfg0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::CPXCFG0 {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DCWYR {
            bits: u8,
        }
        impl DCWYR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DCSZR {
            bits: u8,
        }
        impl DCSZR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct ICWYR {
            bits: u8,
        }
        impl ICWYR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct ICSZR {
            bits: u8,
        }
        impl ICSZR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Level 1 Data Cache Ways"]
            #[inline(always)]
            pub fn dcwy(&self) -> DCWYR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DCWYR { bits }
            }
            #[doc = "Bits 8:15 - Level 1 Data Cache Size"]
            #[inline(always)]
            pub fn dcsz(&self) -> DCSZR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DCSZR { bits }
            }
            #[doc = "Bits 16:23 - Level 1 Instruction Cache Ways"]
            #[inline(always)]
            pub fn icwy(&self) -> ICWYR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                ICWYR { bits }
            }
            #[doc = "Bits 24:31 - Level 1 Instruction Cache Size"]
            #[inline(always)]
            pub fn icsz(&self) -> ICSZR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                ICSZR { bits }
            }
        }
    }
    #[doc = "Processor X Configuration Register 1"]
    pub struct CPXCFG1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Processor X Configuration Register 1"]
    pub mod cpx_cfg1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::CPXCFG1 {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct L2WYR {
            bits: u8,
        }
        impl L2WYR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct L2SZR {
            bits: u8,
        }
        impl L2SZR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 16:23 - Level 2 Instruction Cache Ways"]
            #[inline(always)]
            pub fn l2wy(&self) -> L2WYR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                L2WYR { bits }
            }
            #[doc = "Bits 24:31 - Level 2 Instruction Cache Size"]
            #[inline(always)]
            pub fn l2sz(&self) -> L2SZR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                L2SZR { bits }
            }
        }
    }
    #[doc = "Processor X Configuration Register 2"]
    pub struct CPXCFG2 {
        register: VolatileCell<u32>,
    }
    #[doc = "Processor X Configuration Register 2"]
    pub mod cpx_cfg2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::CPXCFG2 {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct TMUSZR {
            bits: u8,
        }
        impl TMUSZR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct TMLSZR {
            bits: u8,
        }
        impl TMLSZR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 8:15 - Tightly-coupled Memory Upper Size"]
            #[inline(always)]
            pub fn tmusz(&self) -> TMUSZR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TMUSZR { bits }
            }
            #[doc = "Bits 24:31 - Tightly-coupled Memory Lower Size"]
            #[inline(always)]
            pub fn tmlsz(&self) -> TMLSZR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TMLSZR { bits }
            }
        }
    }
    #[doc = "Processor X Configuration Register 3"]
    pub struct CPXCFG3 {
        register: VolatileCell<u32>,
    }
    #[doc = "Processor X Configuration Register 3"]
    pub mod cpx_cfg3 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::CPXCFG3 {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = "Possible values of the field `FPU`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FPUR {
            #[doc = "FPU support is not included."]
            _0,
            #[doc = "FPU support is included."]
            _1,
        }
        impl FPUR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FPUR::_0 => false,
                    FPUR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FPUR {
                match value {
                    false => FPUR::_0,
                    true => FPUR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FPUR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FPUR::_1
            }
        }
        #[doc = "Possible values of the field `SIMD`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SIMDR {
            #[doc = "SIMD/NEON support is not included."]
            _0,
            #[doc = "SIMD/NEON support is included."]
            _1,
        }
        impl SIMDR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SIMDR::_0 => false,
                    SIMDR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SIMDR {
                match value {
                    false => SIMDR::_0,
                    true => SIMDR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SIMDR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SIMDR::_1
            }
        }
        #[doc = "Possible values of the field `JAZ`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum JAZR {
            #[doc = "Jazelle support is not included."]
            _0,
            #[doc = "Jazelle support is included."]
            _1,
        }
        impl JAZR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    JAZR::_0 => false,
                    JAZR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> JAZR {
                match value {
                    false => JAZR::_0,
                    true => JAZR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == JAZR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == JAZR::_1
            }
        }
        #[doc = "Possible values of the field `MMU`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MMUR {
            #[doc = "MMU support is not included."]
            _0,
            #[doc = "MMU support is included."]
            _1,
        }
        impl MMUR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MMUR::_0 => false,
                    MMUR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MMUR {
                match value {
                    false => MMUR::_0,
                    true => MMUR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MMUR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MMUR::_1
            }
        }
        #[doc = "Possible values of the field `TZ`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TZR {
            #[doc = "Trust Zone support is not included."]
            _0,
            #[doc = "Trust Zone support is included."]
            _1,
        }
        impl TZR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TZR::_0 => false,
                    TZR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TZR {
                match value {
                    false => TZR::_0,
                    true => TZR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TZR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TZR::_1
            }
        }
        #[doc = "Possible values of the field `CMP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CMPR {
            #[doc = "Core Memory Protection is not included."]
            _0,
            #[doc = "Core Memory Protection is included."]
            _1,
        }
        impl CMPR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CMPR::_0 => false,
                    CMPR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CMPR {
                match value {
                    false => CMPR::_0,
                    true => CMPR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CMPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CMPR::_1
            }
        }
        #[doc = "Possible values of the field `BB`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BBR {
            #[doc = "Bit Banding is not supported."]
            _0,
            #[doc = "Bit Banding is supported."]
            _1,
        }
        impl BBR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BBR::_0 => false,
                    BBR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BBR {
                match value {
                    false => BBR::_0,
                    true => BBR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BBR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BBR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct SBPR {
            bits: u8,
        }
        impl SBPR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Floating Point Unit"]
            #[inline(always)]
            pub fn fpu(&self) -> FPUR {
                FPUR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - SIMD/NEON instruction support"]
            #[inline(always)]
            pub fn simd(&self) -> SIMDR {
                SIMDR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Jazelle support"]
            #[inline(always)]
            pub fn jaz(&self) -> JAZR {
                JAZR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Memory Management Unit"]
            #[inline(always)]
            pub fn mmu(&self) -> MMUR {
                MMUR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Trust Zone"]
            #[inline(always)]
            pub fn tz(&self) -> TZR {
                TZR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Core Memory Protection unit"]
            #[inline(always)]
            pub fn cmp(&self) -> CMPR {
                CMPR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Bit Banding"]
            #[inline(always)]
            pub fn bb(&self) -> BBR {
                BBR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:9 - System Bus Ports"]
            #[inline(always)]
            pub fn sbp(&self) -> SBPR {
                let bits = {
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SBPR { bits }
            }
        }
    }
    #[doc = "Processor 0 Type Register"]
    pub struct CP0TYPE {
        register: VolatileCell<u32>,
    }
    #[doc = "Processor 0 Type Register"]
    pub mod cp0type {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::CP0TYPE {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct RYPZR {
            bits: u8,
        }
        impl RYPZR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct PERSONALITYR {
            bits: u32,
        }
        impl PERSONALITYR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Processor 0 Revision"]
            #[inline(always)]
            pub fn rypz(&self) -> RYPZR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                RYPZR { bits }
            }
            #[doc = "Bits 8:31 - Processor 0 Personality"]
            #[inline(always)]
            pub fn personality(&self) -> PERSONALITYR {
                let bits = {
                    const MASK: u32 = 16777215;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                PERSONALITYR { bits }
            }
        }
    }
    #[doc = "Processor 0 Number Register"]
    pub struct CP0NUM {
        register: VolatileCell<u32>,
    }
    #[doc = "Processor 0 Number Register"]
    pub mod cp0num {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::CP0NUM {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct CPNR {
            bits: bool,
        }
        impl CPNR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Processor 0 Number"]
            #[inline(always)]
            pub fn cpn(&self) -> CPNR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                CPNR { bits }
            }
        }
    }
    #[doc = "Processor 0 Master Register"]
    pub struct CP0MASTER {
        register: VolatileCell<u32>,
    }
    #[doc = "Processor 0 Master Register"]
    pub mod cp0master {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::CP0MASTER {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct PPMNR {
            bits: u8,
        }
        impl PPMNR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Processor 0 Physical Master Number"]
            #[inline(always)]
            pub fn ppmn(&self) -> PPMNR {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                PPMNR { bits }
            }
        }
    }
    #[doc = "Processor 0 Count Register"]
    pub struct CP0COUNT {
        register: VolatileCell<u32>,
    }
    #[doc = "Processor 0 Count Register"]
    pub mod cp0count {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::CP0COUNT {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct PCNTR {
            bits: u8,
        }
        impl PCNTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:1 - Processor Count"]
            #[inline(always)]
            pub fn pcnt(&self) -> PCNTR {
                let bits = {
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                PCNTR { bits }
            }
        }
    }
    #[doc = "Processor 0 Configuration Register 0"]
    pub struct CP0CFG0 {
        register: VolatileCell<u32>,
    }
    #[doc = "Processor 0 Configuration Register 0"]
    pub mod cp0cfg0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::CP0CFG0 {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DCWYR {
            bits: u8,
        }
        impl DCWYR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DCSZR {
            bits: u8,
        }
        impl DCSZR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct ICWYR {
            bits: u8,
        }
        impl ICWYR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct ICSZR {
            bits: u8,
        }
        impl ICSZR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Level 1 Data Cache Ways"]
            #[inline(always)]
            pub fn dcwy(&self) -> DCWYR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DCWYR { bits }
            }
            #[doc = "Bits 8:15 - Level 1 Data Cache Size"]
            #[inline(always)]
            pub fn dcsz(&self) -> DCSZR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DCSZR { bits }
            }
            #[doc = "Bits 16:23 - Level 1 Instruction Cache Ways"]
            #[inline(always)]
            pub fn icwy(&self) -> ICWYR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                ICWYR { bits }
            }
            #[doc = "Bits 24:31 - Level 1 Instruction Cache Size"]
            #[inline(always)]
            pub fn icsz(&self) -> ICSZR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                ICSZR { bits }
            }
        }
    }
    #[doc = "Processor 0 Configuration Register 1"]
    pub struct CP0CFG1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Processor 0 Configuration Register 1"]
    pub mod cp0cfg1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::CP0CFG1 {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct L2WYR {
            bits: u8,
        }
        impl L2WYR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct L2SZR {
            bits: u8,
        }
        impl L2SZR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 16:23 - Level 2 Instruction Cache Ways"]
            #[inline(always)]
            pub fn l2wy(&self) -> L2WYR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                L2WYR { bits }
            }
            #[doc = "Bits 24:31 - Level 2 Instruction Cache Size"]
            #[inline(always)]
            pub fn l2sz(&self) -> L2SZR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                L2SZR { bits }
            }
        }
    }
    #[doc = "Processor 0 Configuration Register 2"]
    pub struct CP0CFG2 {
        register: VolatileCell<u32>,
    }
    #[doc = "Processor 0 Configuration Register 2"]
    pub mod cp0cfg2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::CP0CFG2 {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct TMUSZR {
            bits: u8,
        }
        impl TMUSZR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct TMLSZR {
            bits: u8,
        }
        impl TMLSZR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 8:15 - Tightly-coupled Memory Upper Size"]
            #[inline(always)]
            pub fn tmusz(&self) -> TMUSZR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TMUSZR { bits }
            }
            #[doc = "Bits 24:31 - Tightly-coupled Memory Lower Size"]
            #[inline(always)]
            pub fn tmlsz(&self) -> TMLSZR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TMLSZR { bits }
            }
        }
    }
    #[doc = "Processor 0 Configuration Register 3"]
    pub struct CP0CFG3 {
        register: VolatileCell<u32>,
    }
    #[doc = "Processor 0 Configuration Register 3"]
    pub mod cp0cfg3 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::CP0CFG3 {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = "Possible values of the field `FPU`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FPUR {
            #[doc = "FPU support is not included."]
            _0,
            #[doc = "FPU support is included."]
            _1,
        }
        impl FPUR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FPUR::_0 => false,
                    FPUR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FPUR {
                match value {
                    false => FPUR::_0,
                    true => FPUR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FPUR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FPUR::_1
            }
        }
        #[doc = "Possible values of the field `SIMD`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SIMDR {
            #[doc = "SIMD/NEON support is not included."]
            _0,
            #[doc = "SIMD/NEON support is included."]
            _1,
        }
        impl SIMDR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SIMDR::_0 => false,
                    SIMDR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SIMDR {
                match value {
                    false => SIMDR::_0,
                    true => SIMDR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SIMDR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SIMDR::_1
            }
        }
        #[doc = "Possible values of the field `JAZ`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum JAZR {
            #[doc = "Jazelle support is not included."]
            _0,
            #[doc = "Jazelle support is included."]
            _1,
        }
        impl JAZR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    JAZR::_0 => false,
                    JAZR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> JAZR {
                match value {
                    false => JAZR::_0,
                    true => JAZR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == JAZR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == JAZR::_1
            }
        }
        #[doc = "Possible values of the field `MMU`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MMUR {
            #[doc = "MMU support is not included."]
            _0,
            #[doc = "MMU support is included."]
            _1,
        }
        impl MMUR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MMUR::_0 => false,
                    MMUR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MMUR {
                match value {
                    false => MMUR::_0,
                    true => MMUR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MMUR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MMUR::_1
            }
        }
        #[doc = "Possible values of the field `TZ`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TZR {
            #[doc = "Trust Zone support is not included."]
            _0,
            #[doc = "Trust Zone support is included."]
            _1,
        }
        impl TZR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TZR::_0 => false,
                    TZR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TZR {
                match value {
                    false => TZR::_0,
                    true => TZR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TZR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TZR::_1
            }
        }
        #[doc = "Possible values of the field `CMP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CMPR {
            #[doc = "Core Memory Protection is not included."]
            _0,
            #[doc = "Core Memory Protection is included."]
            _1,
        }
        impl CMPR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CMPR::_0 => false,
                    CMPR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CMPR {
                match value {
                    false => CMPR::_0,
                    true => CMPR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CMPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CMPR::_1
            }
        }
        #[doc = "Possible values of the field `BB`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BBR {
            #[doc = "Bit Banding is not supported."]
            _0,
            #[doc = "Bit Banding is supported."]
            _1,
        }
        impl BBR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BBR::_0 => false,
                    BBR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BBR {
                match value {
                    false => BBR::_0,
                    true => BBR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BBR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BBR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct SBPR {
            bits: u8,
        }
        impl SBPR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Floating Point Unit"]
            #[inline(always)]
            pub fn fpu(&self) -> FPUR {
                FPUR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - SIMD/NEON instruction support"]
            #[inline(always)]
            pub fn simd(&self) -> SIMDR {
                SIMDR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Jazelle support"]
            #[inline(always)]
            pub fn jaz(&self) -> JAZR {
                JAZR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Memory Management Unit"]
            #[inline(always)]
            pub fn mmu(&self) -> MMUR {
                MMUR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Trust Zone"]
            #[inline(always)]
            pub fn tz(&self) -> TZR {
                TZR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Core Memory Protection unit"]
            #[inline(always)]
            pub fn cmp(&self) -> CMPR {
                CMPR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Bit Banding"]
            #[inline(always)]
            pub fn bb(&self) -> BBR {
                BBR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:9 - System Bus Ports"]
            #[inline(always)]
            pub fn sbp(&self) -> SBPR {
                let bits = {
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SBPR { bits }
            }
        }
    }
    #[doc = "On-Chip Memory Descriptor Register"]
    pub struct OCMDR0 {
        register: VolatileCell<u32>,
    }
    #[doc = "On-Chip Memory Descriptor Register"]
    pub mod ocmdr0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::OCMDR0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct OCM0R {
            bits: u8,
        }
        impl OCM0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct OCM1R {
            bits: u8,
        }
        impl OCM1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct OCM2R {
            bits: u8,
        }
        impl OCM2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct OCMPUR {
            bits: bool,
        }
        impl OCMPUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `OCMT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum OCMTR {
            #[doc = "OCMEMn is a System RAM."]
            _000,
            #[doc = "OCMEMn is a Graphics RAM."]
            _001,
            #[doc = "OCMEMn is a ROM."]
            _011,
            #[doc = "OCMEMn is a Program Flash."]
            _100,
            #[doc = "OCMEMn is a Data Flash."]
            _101,
            #[doc = "OCMEMn is an EEE."]
            _110,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl OCMTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    OCMTR::_000 => 0,
                    OCMTR::_001 => 1,
                    OCMTR::_011 => 3,
                    OCMTR::_100 => 4,
                    OCMTR::_101 => 5,
                    OCMTR::_110 => 6,
                    OCMTR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> OCMTR {
                match value {
                    0 => OCMTR::_000,
                    1 => OCMTR::_001,
                    3 => OCMTR::_011,
                    4 => OCMTR::_100,
                    5 => OCMTR::_101,
                    6 => OCMTR::_110,
                    i => OCMTR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == OCMTR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == OCMTR::_001
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == OCMTR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == OCMTR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == OCMTR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == OCMTR::_110
            }
        }
        #[doc = "Possible values of the field `RO`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ROR {
            #[doc = "Writes to the OCMDRn[11:0] are allowed"]
            _0,
            #[doc = "Writes to the OCMDRn[11:0] are ignored"]
            _1,
        }
        impl ROR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ROR::_0 => false,
                    ROR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ROR {
                match value {
                    false => ROR::_0,
                    true => ROR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ROR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ROR::_1
            }
        }
        #[doc = "Possible values of the field `OCMW`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum OCMWR {
            #[doc = "OCMEMn 32-bits wide"]
            _010,
            #[doc = "OCMEMn 64-bits wide"]
            _011,
            #[doc = "OCMEMn 128-bits wide"]
            _100,
            #[doc = "OCMEMn 256-bits wide"]
            _101,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl OCMWR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    OCMWR::_010 => 2,
                    OCMWR::_011 => 3,
                    OCMWR::_100 => 4,
                    OCMWR::_101 => 5,
                    OCMWR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> OCMWR {
                match value {
                    2 => OCMWR::_010,
                    3 => OCMWR::_011,
                    4 => OCMWR::_100,
                    5 => OCMWR::_101,
                    i => OCMWR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == OCMWR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == OCMWR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == OCMWR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == OCMWR::_101
            }
        }
        #[doc = "Possible values of the field `OCMSZ`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum OCMSZR {
            #[doc = "no OCMEMn"]
            _0000,
            #[doc = "1KB OCMEMn"]
            _0001,
            #[doc = "2KB OCMEMn"]
            _0010,
            #[doc = "4KB OCMEMn"]
            _0011,
            #[doc = "8KB OCMEMn"]
            _0100,
            #[doc = "16KB OCMEMn"]
            _0101,
            #[doc = "32KB OCMEMn"]
            _0110,
            #[doc = "64KB OCMEMn"]
            _0111,
            #[doc = "128KB OCMEMn"]
            _1000,
            #[doc = "256KB OCMEMn"]
            _1001,
            #[doc = "512KB OCMEMn"]
            _1010,
            #[doc = "1MB OCMEMn"]
            _1011,
            #[doc = "2MB OCMEMn"]
            _1100,
            #[doc = "4MB OCMEMn"]
            _1101,
            #[doc = "8MB OCMEMn"]
            _1110,
            #[doc = "16MB OCMEMn"]
            _1111,
        }
        impl OCMSZR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    OCMSZR::_0000 => 0,
                    OCMSZR::_0001 => 1,
                    OCMSZR::_0010 => 2,
                    OCMSZR::_0011 => 3,
                    OCMSZR::_0100 => 4,
                    OCMSZR::_0101 => 5,
                    OCMSZR::_0110 => 6,
                    OCMSZR::_0111 => 7,
                    OCMSZR::_1000 => 8,
                    OCMSZR::_1001 => 9,
                    OCMSZR::_1010 => 10,
                    OCMSZR::_1011 => 11,
                    OCMSZR::_1100 => 12,
                    OCMSZR::_1101 => 13,
                    OCMSZR::_1110 => 14,
                    OCMSZR::_1111 => 15,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> OCMSZR {
                match value {
                    0 => OCMSZR::_0000,
                    1 => OCMSZR::_0001,
                    2 => OCMSZR::_0010,
                    3 => OCMSZR::_0011,
                    4 => OCMSZR::_0100,
                    5 => OCMSZR::_0101,
                    6 => OCMSZR::_0110,
                    7 => OCMSZR::_0111,
                    8 => OCMSZR::_1000,
                    9 => OCMSZR::_1001,
                    10 => OCMSZR::_1010,
                    11 => OCMSZR::_1011,
                    12 => OCMSZR::_1100,
                    13 => OCMSZR::_1101,
                    14 => OCMSZR::_1110,
                    15 => OCMSZR::_1111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == OCMSZR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == OCMSZR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == OCMSZR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == OCMSZR::_0011
            }
            #[doc = "Checks if the value of the field is `_0100`"]
            #[inline(always)]
            pub fn is_0100(&self) -> bool {
                *self == OCMSZR::_0100
            }
            #[doc = "Checks if the value of the field is `_0101`"]
            #[inline(always)]
            pub fn is_0101(&self) -> bool {
                *self == OCMSZR::_0101
            }
            #[doc = "Checks if the value of the field is `_0110`"]
            #[inline(always)]
            pub fn is_0110(&self) -> bool {
                *self == OCMSZR::_0110
            }
            #[doc = "Checks if the value of the field is `_0111`"]
            #[inline(always)]
            pub fn is_0111(&self) -> bool {
                *self == OCMSZR::_0111
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == OCMSZR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == OCMSZR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == OCMSZR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == OCMSZR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == OCMSZR::_1100
            }
            #[doc = "Checks if the value of the field is `_1101`"]
            #[inline(always)]
            pub fn is_1101(&self) -> bool {
                *self == OCMSZR::_1101
            }
            #[doc = "Checks if the value of the field is `_1110`"]
            #[inline(always)]
            pub fn is_1110(&self) -> bool {
                *self == OCMSZR::_1110
            }
            #[doc = "Checks if the value of the field is `_1111`"]
            #[inline(always)]
            pub fn is_1111(&self) -> bool {
                *self == OCMSZR::_1111
            }
        }
        #[doc = "Possible values of the field `OCMSZH`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum OCMSZHR {
            #[doc = "OCMEMn is a power-of-2 capacity."]
            _0,
            #[doc = "OCMEMn is not a power-of-2, with a capacity is 0.75 * OCMSZ."]
            _1,
        }
        impl OCMSZHR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    OCMSZHR::_0 => false,
                    OCMSZHR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> OCMSZHR {
                match value {
                    false => OCMSZHR::_0,
                    true => OCMSZHR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == OCMSZHR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == OCMSZHR::_1
            }
        }
        #[doc = "Possible values of the field `V`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum VR {
            #[doc = "OCMEMn is not present."]
            _0,
            #[doc = "OCMEMn is present."]
            _1,
        }
        impl VR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    VR::_0 => false,
                    VR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> VR {
                match value {
                    false => VR::_0,
                    true => VR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == VR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == VR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _OCM0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _OCM0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _OCM1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _OCM1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _OCM2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _OCM2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RO`"]
        pub enum ROW {
            #[doc = "Writes to the OCMDRn[11:0] are allowed"]
            _0,
            #[doc = "Writes to the OCMDRn[11:0] are ignored"]
            _1,
        }
        impl ROW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ROW::_0 => false,
                    ROW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ROW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ROW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ROW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Writes to the OCMDRn[11:0] are allowed"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ROW::_0)
            }
            #[doc = "Writes to the OCMDRn[11:0] are ignored"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ROW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:3 - OCMEM Control Field 0"]
            #[inline(always)]
            pub fn ocm0(&self) -> OCM0R {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                OCM0R { bits }
            }
            #[doc = "Bits 4:7 - OCMEM Control Field 1"]
            #[inline(always)]
            pub fn ocm1(&self) -> OCM1R {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                OCM1R { bits }
            }
            #[doc = "Bits 8:11 - OCMEM Control Field 2"]
            #[inline(always)]
            pub fn ocm2(&self) -> OCM2R {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                OCM2R { bits }
            }
            #[doc = "Bit 12 - OCMPU"]
            #[inline(always)]
            pub fn ocmpu(&self) -> OCMPUR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                OCMPUR { bits }
            }
            #[doc = "Bits 13:15 - OCMT"]
            #[inline(always)]
            pub fn ocmt(&self) -> OCMTR {
                OCMTR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 16 - RO"]
            #[inline(always)]
            pub fn ro(&self) -> ROR {
                ROR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 17:19 - OCMW"]
            #[inline(always)]
            pub fn ocmw(&self) -> OCMWR {
                OCMWR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 24:27 - OCMSZ"]
            #[inline(always)]
            pub fn ocmsz(&self) -> OCMSZR {
                OCMSZR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 28 - OCMSZH"]
            #[inline(always)]
            pub fn ocmszh(&self) -> OCMSZHR {
                OCMSZHR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 28;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - V"]
            #[inline(always)]
            pub fn v(&self) -> VR {
                VR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 1073741824 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - OCMEM Control Field 0"]
            #[inline(always)]
            pub fn ocm0(&mut self) -> _OCM0W {
                _OCM0W { w: self }
            }
            #[doc = "Bits 4:7 - OCMEM Control Field 1"]
            #[inline(always)]
            pub fn ocm1(&mut self) -> _OCM1W {
                _OCM1W { w: self }
            }
            #[doc = "Bits 8:11 - OCMEM Control Field 2"]
            #[inline(always)]
            pub fn ocm2(&mut self) -> _OCM2W {
                _OCM2W { w: self }
            }
            #[doc = "Bit 16 - RO"]
            #[inline(always)]
            pub fn ro(&mut self) -> _ROW {
                _ROW { w: self }
            }
        }
    }
    #[doc = "On-Chip Memory Descriptor Register"]
    pub struct OCMDR1 {
        register: VolatileCell<u32>,
    }
    #[doc = "On-Chip Memory Descriptor Register"]
    pub mod ocmdr1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::OCMDR1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct OCM0R {
            bits: u8,
        }
        impl OCM0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct OCM1R {
            bits: u8,
        }
        impl OCM1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct OCM2R {
            bits: u8,
        }
        impl OCM2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct OCMPUR {
            bits: bool,
        }
        impl OCMPUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `OCMT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum OCMTR {
            #[doc = "OCMEMn is a System RAM."]
            _000,
            #[doc = "OCMEMn is a Graphics RAM."]
            _001,
            #[doc = "OCMEMn is a ROM."]
            _011,
            #[doc = "OCMEMn is a Program Flash."]
            _100,
            #[doc = "OCMEMn is a Data Flash."]
            _101,
            #[doc = "OCMEMn is an EEE."]
            _110,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl OCMTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    OCMTR::_000 => 0,
                    OCMTR::_001 => 1,
                    OCMTR::_011 => 3,
                    OCMTR::_100 => 4,
                    OCMTR::_101 => 5,
                    OCMTR::_110 => 6,
                    OCMTR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> OCMTR {
                match value {
                    0 => OCMTR::_000,
                    1 => OCMTR::_001,
                    3 => OCMTR::_011,
                    4 => OCMTR::_100,
                    5 => OCMTR::_101,
                    6 => OCMTR::_110,
                    i => OCMTR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == OCMTR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == OCMTR::_001
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == OCMTR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == OCMTR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == OCMTR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == OCMTR::_110
            }
        }
        #[doc = "Possible values of the field `RO`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ROR {
            #[doc = "Writes to the OCMDRn[11:0] are allowed"]
            _0,
            #[doc = "Writes to the OCMDRn[11:0] are ignored"]
            _1,
        }
        impl ROR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ROR::_0 => false,
                    ROR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ROR {
                match value {
                    false => ROR::_0,
                    true => ROR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ROR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ROR::_1
            }
        }
        #[doc = "Possible values of the field `OCMW`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum OCMWR {
            #[doc = "OCMEMn 32-bits wide"]
            _010,
            #[doc = "OCMEMn 64-bits wide"]
            _011,
            #[doc = "OCMEMn 128-bits wide"]
            _100,
            #[doc = "OCMEMn 256-bits wide"]
            _101,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl OCMWR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    OCMWR::_010 => 2,
                    OCMWR::_011 => 3,
                    OCMWR::_100 => 4,
                    OCMWR::_101 => 5,
                    OCMWR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> OCMWR {
                match value {
                    2 => OCMWR::_010,
                    3 => OCMWR::_011,
                    4 => OCMWR::_100,
                    5 => OCMWR::_101,
                    i => OCMWR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == OCMWR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == OCMWR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == OCMWR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == OCMWR::_101
            }
        }
        #[doc = "Possible values of the field `OCMSZ`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum OCMSZR {
            #[doc = "no OCMEMn"]
            _0000,
            #[doc = "1KB OCMEMn"]
            _0001,
            #[doc = "2KB OCMEMn"]
            _0010,
            #[doc = "4KB OCMEMn"]
            _0011,
            #[doc = "8KB OCMEMn"]
            _0100,
            #[doc = "16KB OCMEMn"]
            _0101,
            #[doc = "32KB OCMEMn"]
            _0110,
            #[doc = "64KB OCMEMn"]
            _0111,
            #[doc = "128KB OCMEMn"]
            _1000,
            #[doc = "256KB OCMEMn"]
            _1001,
            #[doc = "512KB OCMEMn"]
            _1010,
            #[doc = "1MB OCMEMn"]
            _1011,
            #[doc = "2MB OCMEMn"]
            _1100,
            #[doc = "4MB OCMEMn"]
            _1101,
            #[doc = "8MB OCMEMn"]
            _1110,
            #[doc = "16MB OCMEMn"]
            _1111,
        }
        impl OCMSZR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    OCMSZR::_0000 => 0,
                    OCMSZR::_0001 => 1,
                    OCMSZR::_0010 => 2,
                    OCMSZR::_0011 => 3,
                    OCMSZR::_0100 => 4,
                    OCMSZR::_0101 => 5,
                    OCMSZR::_0110 => 6,
                    OCMSZR::_0111 => 7,
                    OCMSZR::_1000 => 8,
                    OCMSZR::_1001 => 9,
                    OCMSZR::_1010 => 10,
                    OCMSZR::_1011 => 11,
                    OCMSZR::_1100 => 12,
                    OCMSZR::_1101 => 13,
                    OCMSZR::_1110 => 14,
                    OCMSZR::_1111 => 15,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> OCMSZR {
                match value {
                    0 => OCMSZR::_0000,
                    1 => OCMSZR::_0001,
                    2 => OCMSZR::_0010,
                    3 => OCMSZR::_0011,
                    4 => OCMSZR::_0100,
                    5 => OCMSZR::_0101,
                    6 => OCMSZR::_0110,
                    7 => OCMSZR::_0111,
                    8 => OCMSZR::_1000,
                    9 => OCMSZR::_1001,
                    10 => OCMSZR::_1010,
                    11 => OCMSZR::_1011,
                    12 => OCMSZR::_1100,
                    13 => OCMSZR::_1101,
                    14 => OCMSZR::_1110,
                    15 => OCMSZR::_1111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == OCMSZR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == OCMSZR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == OCMSZR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == OCMSZR::_0011
            }
            #[doc = "Checks if the value of the field is `_0100`"]
            #[inline(always)]
            pub fn is_0100(&self) -> bool {
                *self == OCMSZR::_0100
            }
            #[doc = "Checks if the value of the field is `_0101`"]
            #[inline(always)]
            pub fn is_0101(&self) -> bool {
                *self == OCMSZR::_0101
            }
            #[doc = "Checks if the value of the field is `_0110`"]
            #[inline(always)]
            pub fn is_0110(&self) -> bool {
                *self == OCMSZR::_0110
            }
            #[doc = "Checks if the value of the field is `_0111`"]
            #[inline(always)]
            pub fn is_0111(&self) -> bool {
                *self == OCMSZR::_0111
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == OCMSZR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == OCMSZR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == OCMSZR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == OCMSZR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == OCMSZR::_1100
            }
            #[doc = "Checks if the value of the field is `_1101`"]
            #[inline(always)]
            pub fn is_1101(&self) -> bool {
                *self == OCMSZR::_1101
            }
            #[doc = "Checks if the value of the field is `_1110`"]
            #[inline(always)]
            pub fn is_1110(&self) -> bool {
                *self == OCMSZR::_1110
            }
            #[doc = "Checks if the value of the field is `_1111`"]
            #[inline(always)]
            pub fn is_1111(&self) -> bool {
                *self == OCMSZR::_1111
            }
        }
        #[doc = "Possible values of the field `OCMSZH`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum OCMSZHR {
            #[doc = "OCMEMn is a power-of-2 capacity."]
            _0,
            #[doc = "OCMEMn is not a power-of-2, with a capacity is 0.75 * OCMSZ."]
            _1,
        }
        impl OCMSZHR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    OCMSZHR::_0 => false,
                    OCMSZHR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> OCMSZHR {
                match value {
                    false => OCMSZHR::_0,
                    true => OCMSZHR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == OCMSZHR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == OCMSZHR::_1
            }
        }
        #[doc = "Possible values of the field `V`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum VR {
            #[doc = "OCMEMn is not present."]
            _0,
            #[doc = "OCMEMn is present."]
            _1,
        }
        impl VR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    VR::_0 => false,
                    VR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> VR {
                match value {
                    false => VR::_0,
                    true => VR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == VR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == VR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _OCM0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _OCM0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _OCM1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _OCM1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _OCM2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _OCM2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RO`"]
        pub enum ROW {
            #[doc = "Writes to the OCMDRn[11:0] are allowed"]
            _0,
            #[doc = "Writes to the OCMDRn[11:0] are ignored"]
            _1,
        }
        impl ROW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ROW::_0 => false,
                    ROW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ROW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ROW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ROW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Writes to the OCMDRn[11:0] are allowed"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ROW::_0)
            }
            #[doc = "Writes to the OCMDRn[11:0] are ignored"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ROW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:3 - OCMEM Control Field 0"]
            #[inline(always)]
            pub fn ocm0(&self) -> OCM0R {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                OCM0R { bits }
            }
            #[doc = "Bits 4:7 - OCMEM Control Field 1"]
            #[inline(always)]
            pub fn ocm1(&self) -> OCM1R {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                OCM1R { bits }
            }
            #[doc = "Bits 8:11 - OCMEM Control Field 2"]
            #[inline(always)]
            pub fn ocm2(&self) -> OCM2R {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                OCM2R { bits }
            }
            #[doc = "Bit 12 - OCMPU"]
            #[inline(always)]
            pub fn ocmpu(&self) -> OCMPUR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                OCMPUR { bits }
            }
            #[doc = "Bits 13:15 - OCMT"]
            #[inline(always)]
            pub fn ocmt(&self) -> OCMTR {
                OCMTR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 16 - RO"]
            #[inline(always)]
            pub fn ro(&self) -> ROR {
                ROR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 17:19 - OCMW"]
            #[inline(always)]
            pub fn ocmw(&self) -> OCMWR {
                OCMWR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 24:27 - OCMSZ"]
            #[inline(always)]
            pub fn ocmsz(&self) -> OCMSZR {
                OCMSZR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 28 - OCMSZH"]
            #[inline(always)]
            pub fn ocmszh(&self) -> OCMSZHR {
                OCMSZHR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 28;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - V"]
            #[inline(always)]
            pub fn v(&self) -> VR {
                VR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 1073741824 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - OCMEM Control Field 0"]
            #[inline(always)]
            pub fn ocm0(&mut self) -> _OCM0W {
                _OCM0W { w: self }
            }
            #[doc = "Bits 4:7 - OCMEM Control Field 1"]
            #[inline(always)]
            pub fn ocm1(&mut self) -> _OCM1W {
                _OCM1W { w: self }
            }
            #[doc = "Bits 8:11 - OCMEM Control Field 2"]
            #[inline(always)]
            pub fn ocm2(&mut self) -> _OCM2W {
                _OCM2W { w: self }
            }
            #[doc = "Bit 16 - RO"]
            #[inline(always)]
            pub fn ro(&mut self) -> _ROW {
                _ROW { w: self }
            }
        }
    }
    #[doc = "On-Chip Memory Descriptor Register"]
    pub struct OCMDR2 {
        register: VolatileCell<u32>,
    }
    #[doc = "On-Chip Memory Descriptor Register"]
    pub mod ocmdr2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::OCMDR2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct OCM0R {
            bits: u8,
        }
        impl OCM0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct OCM1R {
            bits: u8,
        }
        impl OCM1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct OCM2R {
            bits: u8,
        }
        impl OCM2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct OCMPUR {
            bits: bool,
        }
        impl OCMPUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `OCMT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum OCMTR {
            #[doc = "OCMEMn is a System RAM."]
            _000,
            #[doc = "OCMEMn is a Graphics RAM."]
            _001,
            #[doc = "OCMEMn is a ROM."]
            _011,
            #[doc = "OCMEMn is a Program Flash."]
            _100,
            #[doc = "OCMEMn is a Data Flash."]
            _101,
            #[doc = "OCMEMn is an EEE."]
            _110,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl OCMTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    OCMTR::_000 => 0,
                    OCMTR::_001 => 1,
                    OCMTR::_011 => 3,
                    OCMTR::_100 => 4,
                    OCMTR::_101 => 5,
                    OCMTR::_110 => 6,
                    OCMTR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> OCMTR {
                match value {
                    0 => OCMTR::_000,
                    1 => OCMTR::_001,
                    3 => OCMTR::_011,
                    4 => OCMTR::_100,
                    5 => OCMTR::_101,
                    6 => OCMTR::_110,
                    i => OCMTR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == OCMTR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == OCMTR::_001
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == OCMTR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == OCMTR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == OCMTR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == OCMTR::_110
            }
        }
        #[doc = "Possible values of the field `RO`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ROR {
            #[doc = "Writes to the OCMDRn[11:0] are allowed"]
            _0,
            #[doc = "Writes to the OCMDRn[11:0] are ignored"]
            _1,
        }
        impl ROR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ROR::_0 => false,
                    ROR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ROR {
                match value {
                    false => ROR::_0,
                    true => ROR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ROR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ROR::_1
            }
        }
        #[doc = "Possible values of the field `OCMW`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum OCMWR {
            #[doc = "OCMEMn 32-bits wide"]
            _010,
            #[doc = "OCMEMn 64-bits wide"]
            _011,
            #[doc = "OCMEMn 128-bits wide"]
            _100,
            #[doc = "OCMEMn 256-bits wide"]
            _101,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl OCMWR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    OCMWR::_010 => 2,
                    OCMWR::_011 => 3,
                    OCMWR::_100 => 4,
                    OCMWR::_101 => 5,
                    OCMWR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> OCMWR {
                match value {
                    2 => OCMWR::_010,
                    3 => OCMWR::_011,
                    4 => OCMWR::_100,
                    5 => OCMWR::_101,
                    i => OCMWR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == OCMWR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == OCMWR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == OCMWR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == OCMWR::_101
            }
        }
        #[doc = "Possible values of the field `OCMSZ`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum OCMSZR {
            #[doc = "no OCMEMn"]
            _0000,
            #[doc = "1KB OCMEMn"]
            _0001,
            #[doc = "2KB OCMEMn"]
            _0010,
            #[doc = "4KB OCMEMn"]
            _0011,
            #[doc = "8KB OCMEMn"]
            _0100,
            #[doc = "16KB OCMEMn"]
            _0101,
            #[doc = "32KB OCMEMn"]
            _0110,
            #[doc = "64KB OCMEMn"]
            _0111,
            #[doc = "128KB OCMEMn"]
            _1000,
            #[doc = "256KB OCMEMn"]
            _1001,
            #[doc = "512KB OCMEMn"]
            _1010,
            #[doc = "1MB OCMEMn"]
            _1011,
            #[doc = "2MB OCMEMn"]
            _1100,
            #[doc = "4MB OCMEMn"]
            _1101,
            #[doc = "8MB OCMEMn"]
            _1110,
            #[doc = "16MB OCMEMn"]
            _1111,
        }
        impl OCMSZR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    OCMSZR::_0000 => 0,
                    OCMSZR::_0001 => 1,
                    OCMSZR::_0010 => 2,
                    OCMSZR::_0011 => 3,
                    OCMSZR::_0100 => 4,
                    OCMSZR::_0101 => 5,
                    OCMSZR::_0110 => 6,
                    OCMSZR::_0111 => 7,
                    OCMSZR::_1000 => 8,
                    OCMSZR::_1001 => 9,
                    OCMSZR::_1010 => 10,
                    OCMSZR::_1011 => 11,
                    OCMSZR::_1100 => 12,
                    OCMSZR::_1101 => 13,
                    OCMSZR::_1110 => 14,
                    OCMSZR::_1111 => 15,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> OCMSZR {
                match value {
                    0 => OCMSZR::_0000,
                    1 => OCMSZR::_0001,
                    2 => OCMSZR::_0010,
                    3 => OCMSZR::_0011,
                    4 => OCMSZR::_0100,
                    5 => OCMSZR::_0101,
                    6 => OCMSZR::_0110,
                    7 => OCMSZR::_0111,
                    8 => OCMSZR::_1000,
                    9 => OCMSZR::_1001,
                    10 => OCMSZR::_1010,
                    11 => OCMSZR::_1011,
                    12 => OCMSZR::_1100,
                    13 => OCMSZR::_1101,
                    14 => OCMSZR::_1110,
                    15 => OCMSZR::_1111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == OCMSZR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == OCMSZR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == OCMSZR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == OCMSZR::_0011
            }
            #[doc = "Checks if the value of the field is `_0100`"]
            #[inline(always)]
            pub fn is_0100(&self) -> bool {
                *self == OCMSZR::_0100
            }
            #[doc = "Checks if the value of the field is `_0101`"]
            #[inline(always)]
            pub fn is_0101(&self) -> bool {
                *self == OCMSZR::_0101
            }
            #[doc = "Checks if the value of the field is `_0110`"]
            #[inline(always)]
            pub fn is_0110(&self) -> bool {
                *self == OCMSZR::_0110
            }
            #[doc = "Checks if the value of the field is `_0111`"]
            #[inline(always)]
            pub fn is_0111(&self) -> bool {
                *self == OCMSZR::_0111
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == OCMSZR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == OCMSZR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == OCMSZR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == OCMSZR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == OCMSZR::_1100
            }
            #[doc = "Checks if the value of the field is `_1101`"]
            #[inline(always)]
            pub fn is_1101(&self) -> bool {
                *self == OCMSZR::_1101
            }
            #[doc = "Checks if the value of the field is `_1110`"]
            #[inline(always)]
            pub fn is_1110(&self) -> bool {
                *self == OCMSZR::_1110
            }
            #[doc = "Checks if the value of the field is `_1111`"]
            #[inline(always)]
            pub fn is_1111(&self) -> bool {
                *self == OCMSZR::_1111
            }
        }
        #[doc = "Possible values of the field `OCMSZH`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum OCMSZHR {
            #[doc = "OCMEMn is a power-of-2 capacity."]
            _0,
            #[doc = "OCMEMn is not a power-of-2, with a capacity is 0.75 * OCMSZ."]
            _1,
        }
        impl OCMSZHR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    OCMSZHR::_0 => false,
                    OCMSZHR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> OCMSZHR {
                match value {
                    false => OCMSZHR::_0,
                    true => OCMSZHR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == OCMSZHR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == OCMSZHR::_1
            }
        }
        #[doc = "Possible values of the field `V`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum VR {
            #[doc = "OCMEMn is not present."]
            _0,
            #[doc = "OCMEMn is present."]
            _1,
        }
        impl VR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    VR::_0 => false,
                    VR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> VR {
                match value {
                    false => VR::_0,
                    true => VR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == VR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == VR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _OCM0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _OCM0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _OCM1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _OCM1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _OCM2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _OCM2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RO`"]
        pub enum ROW {
            #[doc = "Writes to the OCMDRn[11:0] are allowed"]
            _0,
            #[doc = "Writes to the OCMDRn[11:0] are ignored"]
            _1,
        }
        impl ROW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ROW::_0 => false,
                    ROW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ROW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ROW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ROW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Writes to the OCMDRn[11:0] are allowed"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ROW::_0)
            }
            #[doc = "Writes to the OCMDRn[11:0] are ignored"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ROW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:3 - OCMEM Control Field 0"]
            #[inline(always)]
            pub fn ocm0(&self) -> OCM0R {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                OCM0R { bits }
            }
            #[doc = "Bits 4:7 - OCMEM Control Field 1"]
            #[inline(always)]
            pub fn ocm1(&self) -> OCM1R {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                OCM1R { bits }
            }
            #[doc = "Bits 8:11 - OCMEM Control Field 2"]
            #[inline(always)]
            pub fn ocm2(&self) -> OCM2R {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                OCM2R { bits }
            }
            #[doc = "Bit 12 - OCMPU"]
            #[inline(always)]
            pub fn ocmpu(&self) -> OCMPUR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                OCMPUR { bits }
            }
            #[doc = "Bits 13:15 - OCMT"]
            #[inline(always)]
            pub fn ocmt(&self) -> OCMTR {
                OCMTR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 16 - RO"]
            #[inline(always)]
            pub fn ro(&self) -> ROR {
                ROR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 17:19 - OCMW"]
            #[inline(always)]
            pub fn ocmw(&self) -> OCMWR {
                OCMWR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 24:27 - OCMSZ"]
            #[inline(always)]
            pub fn ocmsz(&self) -> OCMSZR {
                OCMSZR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 28 - OCMSZH"]
            #[inline(always)]
            pub fn ocmszh(&self) -> OCMSZHR {
                OCMSZHR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 28;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - V"]
            #[inline(always)]
            pub fn v(&self) -> VR {
                VR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 1073741824 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - OCMEM Control Field 0"]
            #[inline(always)]
            pub fn ocm0(&mut self) -> _OCM0W {
                _OCM0W { w: self }
            }
            #[doc = "Bits 4:7 - OCMEM Control Field 1"]
            #[inline(always)]
            pub fn ocm1(&mut self) -> _OCM1W {
                _OCM1W { w: self }
            }
            #[doc = "Bits 8:11 - OCMEM Control Field 2"]
            #[inline(always)]
            pub fn ocm2(&mut self) -> _OCM2W {
                _OCM2W { w: self }
            }
            #[doc = "Bit 16 - RO"]
            #[inline(always)]
            pub fn ro(&mut self) -> _ROW {
                _ROW { w: self }
            }
        }
    }
    #[doc = "On-Chip Memory Descriptor Register"]
    pub struct OCMDR3 {
        register: VolatileCell<u32>,
    }
    #[doc = "On-Chip Memory Descriptor Register"]
    pub mod ocmdr3 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::OCMDR3 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct OCM0R {
            bits: u8,
        }
        impl OCM0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct OCM1R {
            bits: u8,
        }
        impl OCM1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct OCM2R {
            bits: u8,
        }
        impl OCM2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct OCMPUR {
            bits: bool,
        }
        impl OCMPUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `OCMT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum OCMTR {
            #[doc = "OCMEMn is a System RAM."]
            _000,
            #[doc = "OCMEMn is a Graphics RAM."]
            _001,
            #[doc = "OCMEMn is a ROM."]
            _011,
            #[doc = "OCMEMn is a Program Flash."]
            _100,
            #[doc = "OCMEMn is a Data Flash."]
            _101,
            #[doc = "OCMEMn is an EEE."]
            _110,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl OCMTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    OCMTR::_000 => 0,
                    OCMTR::_001 => 1,
                    OCMTR::_011 => 3,
                    OCMTR::_100 => 4,
                    OCMTR::_101 => 5,
                    OCMTR::_110 => 6,
                    OCMTR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> OCMTR {
                match value {
                    0 => OCMTR::_000,
                    1 => OCMTR::_001,
                    3 => OCMTR::_011,
                    4 => OCMTR::_100,
                    5 => OCMTR::_101,
                    6 => OCMTR::_110,
                    i => OCMTR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == OCMTR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == OCMTR::_001
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == OCMTR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == OCMTR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == OCMTR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == OCMTR::_110
            }
        }
        #[doc = "Possible values of the field `RO`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ROR {
            #[doc = "Writes to the OCMDRn[11:0] are allowed"]
            _0,
            #[doc = "Writes to the OCMDRn[11:0] are ignored"]
            _1,
        }
        impl ROR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ROR::_0 => false,
                    ROR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ROR {
                match value {
                    false => ROR::_0,
                    true => ROR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ROR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ROR::_1
            }
        }
        #[doc = "Possible values of the field `OCMW`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum OCMWR {
            #[doc = "OCMEMn 32-bits wide"]
            _010,
            #[doc = "OCMEMn 64-bits wide"]
            _011,
            #[doc = "OCMEMn 128-bits wide"]
            _100,
            #[doc = "OCMEMn 256-bits wide"]
            _101,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl OCMWR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    OCMWR::_010 => 2,
                    OCMWR::_011 => 3,
                    OCMWR::_100 => 4,
                    OCMWR::_101 => 5,
                    OCMWR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> OCMWR {
                match value {
                    2 => OCMWR::_010,
                    3 => OCMWR::_011,
                    4 => OCMWR::_100,
                    5 => OCMWR::_101,
                    i => OCMWR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == OCMWR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == OCMWR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == OCMWR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == OCMWR::_101
            }
        }
        #[doc = "Possible values of the field `OCMSZ`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum OCMSZR {
            #[doc = "no OCMEMn"]
            _0000,
            #[doc = "1KB OCMEMn"]
            _0001,
            #[doc = "2KB OCMEMn"]
            _0010,
            #[doc = "4KB OCMEMn"]
            _0011,
            #[doc = "8KB OCMEMn"]
            _0100,
            #[doc = "16KB OCMEMn"]
            _0101,
            #[doc = "32KB OCMEMn"]
            _0110,
            #[doc = "64KB OCMEMn"]
            _0111,
            #[doc = "128KB OCMEMn"]
            _1000,
            #[doc = "256KB OCMEMn"]
            _1001,
            #[doc = "512KB OCMEMn"]
            _1010,
            #[doc = "1MB OCMEMn"]
            _1011,
            #[doc = "2MB OCMEMn"]
            _1100,
            #[doc = "4MB OCMEMn"]
            _1101,
            #[doc = "8MB OCMEMn"]
            _1110,
            #[doc = "16MB OCMEMn"]
            _1111,
        }
        impl OCMSZR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    OCMSZR::_0000 => 0,
                    OCMSZR::_0001 => 1,
                    OCMSZR::_0010 => 2,
                    OCMSZR::_0011 => 3,
                    OCMSZR::_0100 => 4,
                    OCMSZR::_0101 => 5,
                    OCMSZR::_0110 => 6,
                    OCMSZR::_0111 => 7,
                    OCMSZR::_1000 => 8,
                    OCMSZR::_1001 => 9,
                    OCMSZR::_1010 => 10,
                    OCMSZR::_1011 => 11,
                    OCMSZR::_1100 => 12,
                    OCMSZR::_1101 => 13,
                    OCMSZR::_1110 => 14,
                    OCMSZR::_1111 => 15,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> OCMSZR {
                match value {
                    0 => OCMSZR::_0000,
                    1 => OCMSZR::_0001,
                    2 => OCMSZR::_0010,
                    3 => OCMSZR::_0011,
                    4 => OCMSZR::_0100,
                    5 => OCMSZR::_0101,
                    6 => OCMSZR::_0110,
                    7 => OCMSZR::_0111,
                    8 => OCMSZR::_1000,
                    9 => OCMSZR::_1001,
                    10 => OCMSZR::_1010,
                    11 => OCMSZR::_1011,
                    12 => OCMSZR::_1100,
                    13 => OCMSZR::_1101,
                    14 => OCMSZR::_1110,
                    15 => OCMSZR::_1111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == OCMSZR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == OCMSZR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == OCMSZR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == OCMSZR::_0011
            }
            #[doc = "Checks if the value of the field is `_0100`"]
            #[inline(always)]
            pub fn is_0100(&self) -> bool {
                *self == OCMSZR::_0100
            }
            #[doc = "Checks if the value of the field is `_0101`"]
            #[inline(always)]
            pub fn is_0101(&self) -> bool {
                *self == OCMSZR::_0101
            }
            #[doc = "Checks if the value of the field is `_0110`"]
            #[inline(always)]
            pub fn is_0110(&self) -> bool {
                *self == OCMSZR::_0110
            }
            #[doc = "Checks if the value of the field is `_0111`"]
            #[inline(always)]
            pub fn is_0111(&self) -> bool {
                *self == OCMSZR::_0111
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == OCMSZR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == OCMSZR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == OCMSZR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == OCMSZR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == OCMSZR::_1100
            }
            #[doc = "Checks if the value of the field is `_1101`"]
            #[inline(always)]
            pub fn is_1101(&self) -> bool {
                *self == OCMSZR::_1101
            }
            #[doc = "Checks if the value of the field is `_1110`"]
            #[inline(always)]
            pub fn is_1110(&self) -> bool {
                *self == OCMSZR::_1110
            }
            #[doc = "Checks if the value of the field is `_1111`"]
            #[inline(always)]
            pub fn is_1111(&self) -> bool {
                *self == OCMSZR::_1111
            }
        }
        #[doc = "Possible values of the field `OCMSZH`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum OCMSZHR {
            #[doc = "OCMEMn is a power-of-2 capacity."]
            _0,
            #[doc = "OCMEMn is not a power-of-2, with a capacity is 0.75 * OCMSZ."]
            _1,
        }
        impl OCMSZHR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    OCMSZHR::_0 => false,
                    OCMSZHR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> OCMSZHR {
                match value {
                    false => OCMSZHR::_0,
                    true => OCMSZHR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == OCMSZHR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == OCMSZHR::_1
            }
        }
        #[doc = "Possible values of the field `V`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum VR {
            #[doc = "OCMEMn is not present."]
            _0,
            #[doc = "OCMEMn is present."]
            _1,
        }
        impl VR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    VR::_0 => false,
                    VR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> VR {
                match value {
                    false => VR::_0,
                    true => VR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == VR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == VR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _OCM0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _OCM0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _OCM1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _OCM1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _OCM2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _OCM2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RO`"]
        pub enum ROW {
            #[doc = "Writes to the OCMDRn[11:0] are allowed"]
            _0,
            #[doc = "Writes to the OCMDRn[11:0] are ignored"]
            _1,
        }
        impl ROW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ROW::_0 => false,
                    ROW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ROW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ROW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ROW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Writes to the OCMDRn[11:0] are allowed"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ROW::_0)
            }
            #[doc = "Writes to the OCMDRn[11:0] are ignored"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ROW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:3 - OCMEM Control Field 0"]
            #[inline(always)]
            pub fn ocm0(&self) -> OCM0R {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                OCM0R { bits }
            }
            #[doc = "Bits 4:7 - OCMEM Control Field 1"]
            #[inline(always)]
            pub fn ocm1(&self) -> OCM1R {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                OCM1R { bits }
            }
            #[doc = "Bits 8:11 - OCMEM Control Field 2"]
            #[inline(always)]
            pub fn ocm2(&self) -> OCM2R {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                OCM2R { bits }
            }
            #[doc = "Bit 12 - OCMPU"]
            #[inline(always)]
            pub fn ocmpu(&self) -> OCMPUR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                OCMPUR { bits }
            }
            #[doc = "Bits 13:15 - OCMT"]
            #[inline(always)]
            pub fn ocmt(&self) -> OCMTR {
                OCMTR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 16 - RO"]
            #[inline(always)]
            pub fn ro(&self) -> ROR {
                ROR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 17:19 - OCMW"]
            #[inline(always)]
            pub fn ocmw(&self) -> OCMWR {
                OCMWR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 24:27 - OCMSZ"]
            #[inline(always)]
            pub fn ocmsz(&self) -> OCMSZR {
                OCMSZR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 28 - OCMSZH"]
            #[inline(always)]
            pub fn ocmszh(&self) -> OCMSZHR {
                OCMSZHR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 28;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - V"]
            #[inline(always)]
            pub fn v(&self) -> VR {
                VR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 1073741824 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - OCMEM Control Field 0"]
            #[inline(always)]
            pub fn ocm0(&mut self) -> _OCM0W {
                _OCM0W { w: self }
            }
            #[doc = "Bits 4:7 - OCMEM Control Field 1"]
            #[inline(always)]
            pub fn ocm1(&mut self) -> _OCM1W {
                _OCM1W { w: self }
            }
            #[doc = "Bits 8:11 - OCMEM Control Field 2"]
            #[inline(always)]
            pub fn ocm2(&mut self) -> _OCM2W {
                _OCM2W { w: self }
            }
            #[doc = "Bit 16 - RO"]
            #[inline(always)]
            pub fn ro(&mut self) -> _ROW {
                _ROW { w: self }
            }
        }
    }
}
#[doc = "MSCM"]
pub struct MSCM {
    register_block: mscm::RegisterBlock,
}
impl Deref for MSCM {
    type Target = mscm::RegisterBlock;
    fn deref(&self) -> &mscm::RegisterBlock {
        &self.register_block
    }
}
#[doc = "Enhanced Direct Memory Access"]
pub const DMA: Peripheral<DMA> = unsafe { Peripheral::new(1073774592) };
#[doc = "Enhanced Direct Memory Access"]
pub mod dma {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - Control Register"]
        pub cr: CR,
        #[doc = "0x04 - Error Status Register"]
        pub es: ES,
        _reserved0: [u8; 4usize],
        #[doc = "0x0c - Enable Request Register"]
        pub erq: ERQ,
        _reserved1: [u8; 4usize],
        #[doc = "0x14 - Enable Error Interrupt Register"]
        pub eei: EEI,
        #[doc = "0x18 - Clear Enable Error Interrupt Register"]
        pub ceei: CEEI,
        #[doc = "0x19 - Set Enable Error Interrupt Register"]
        pub seei: SEEI,
        #[doc = "0x1a - Clear Enable Request Register"]
        pub cerq: CERQ,
        #[doc = "0x1b - Set Enable Request Register"]
        pub serq: SERQ,
        #[doc = "0x1c - Clear DONE Status Bit Register"]
        pub cdne: CDNE,
        #[doc = "0x1d - Set START Bit Register"]
        pub ssrt: SSRT,
        #[doc = "0x1e - Clear Error Register"]
        pub cerr: CERR,
        #[doc = "0x1f - Clear Interrupt Request Register"]
        pub cint: CINT,
        _reserved2: [u8; 4usize],
        #[doc = "0x24 - Interrupt Request Register"]
        pub int: INT,
        _reserved3: [u8; 4usize],
        #[doc = "0x2c - Error Register"]
        pub err: ERR,
        _reserved4: [u8; 4usize],
        #[doc = "0x34 - Hardware Request Status Register"]
        pub hrs: HRS,
        _reserved5: [u8; 12usize],
        #[doc = "0x44 - Enable Asynchronous Request in Stop Register"]
        pub ears: EARS,
        _reserved6: [u8; 184usize],
        #[doc = "0x100 - Channel n Priority Register"]
        pub dchpri3: DCHPRI3,
        #[doc = "0x101 - Channel n Priority Register"]
        pub dchpri2: DCHPRI2,
        #[doc = "0x102 - Channel n Priority Register"]
        pub dchpri1: DCHPRI1,
        #[doc = "0x103 - Channel n Priority Register"]
        pub dchpri0: DCHPRI0,
        #[doc = "0x104 - Channel n Priority Register"]
        pub dchpri7: DCHPRI7,
        #[doc = "0x105 - Channel n Priority Register"]
        pub dchpri6: DCHPRI6,
        #[doc = "0x106 - Channel n Priority Register"]
        pub dchpri5: DCHPRI5,
        #[doc = "0x107 - Channel n Priority Register"]
        pub dchpri4: DCHPRI4,
        #[doc = "0x108 - Channel n Priority Register"]
        pub dchpri11: DCHPRI11,
        #[doc = "0x109 - Channel n Priority Register"]
        pub dchpri10: DCHPRI10,
        #[doc = "0x10a - Channel n Priority Register"]
        pub dchpri9: DCHPRI9,
        #[doc = "0x10b - Channel n Priority Register"]
        pub dchpri8: DCHPRI8,
        #[doc = "0x10c - Channel n Priority Register"]
        pub dchpri15: DCHPRI15,
        #[doc = "0x10d - Channel n Priority Register"]
        pub dchpri14: DCHPRI14,
        #[doc = "0x10e - Channel n Priority Register"]
        pub dchpri13: DCHPRI13,
        #[doc = "0x10f - Channel n Priority Register"]
        pub dchpri12: DCHPRI12,
        _reserved7: [u8; 3824usize],
        #[doc = "0x1000 - TCD Source Address"]
        pub tcd0_saddr: TCD0_SADDR,
        #[doc = "0x1004 - TCD Signed Source Address Offset"]
        pub tcd0_soff: TCD0_SOFF,
        #[doc = "0x1006 - TCD Transfer Attributes"]
        pub tcd0_attr: TCD0_ATTR,
        #[doc = "0x1008 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
        pub tcd0_nbytes_mlno: TCD0_NBYTES_MLNO,
        #[doc = "0x100c - TCD Last Source Address Adjustment"]
        pub tcd0_slast: TCD0_SLAST,
        #[doc = "0x1010 - TCD Destination Address"]
        pub tcd0_daddr: TCD0_DADDR,
        #[doc = "0x1014 - TCD Signed Destination Address Offset"]
        pub tcd0_doff: TCD0_DOFF,
        #[doc = "0x1016 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
        pub tcd0_citer_elinkno: TCD0_CITER_ELINKNO,
        #[doc = "0x1018 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
        pub tcd0_dlastsga: TCD0_DLASTSGA,
        #[doc = "0x101c - TCD Control and Status"]
        pub tcd0_csr: TCD0_CSR,
        #[doc = "0x101e - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
        pub tcd0_biter_elinkno: TCD0_BITER_ELINKNO,
        #[doc = "0x1020 - TCD Source Address"]
        pub tcd1_saddr: TCD1_SADDR,
        #[doc = "0x1024 - TCD Signed Source Address Offset"]
        pub tcd1_soff: TCD1_SOFF,
        #[doc = "0x1026 - TCD Transfer Attributes"]
        pub tcd1_attr: TCD1_ATTR,
        #[doc = "0x1028 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
        pub tcd1_nbytes_mlno: TCD1_NBYTES_MLNO,
        #[doc = "0x102c - TCD Last Source Address Adjustment"]
        pub tcd1_slast: TCD1_SLAST,
        #[doc = "0x1030 - TCD Destination Address"]
        pub tcd1_daddr: TCD1_DADDR,
        #[doc = "0x1034 - TCD Signed Destination Address Offset"]
        pub tcd1_doff: TCD1_DOFF,
        #[doc = "0x1036 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
        pub tcd1_citer_elinkno: TCD1_CITER_ELINKNO,
        #[doc = "0x1038 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
        pub tcd1_dlastsga: TCD1_DLASTSGA,
        #[doc = "0x103c - TCD Control and Status"]
        pub tcd1_csr: TCD1_CSR,
        #[doc = "0x103e - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
        pub tcd1_biter_elinkno: TCD1_BITER_ELINKNO,
        #[doc = "0x1040 - TCD Source Address"]
        pub tcd2_saddr: TCD2_SADDR,
        #[doc = "0x1044 - TCD Signed Source Address Offset"]
        pub tcd2_soff: TCD2_SOFF,
        #[doc = "0x1046 - TCD Transfer Attributes"]
        pub tcd2_attr: TCD2_ATTR,
        #[doc = "0x1048 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
        pub tcd2_nbytes_mlno: TCD2_NBYTES_MLNO,
        #[doc = "0x104c - TCD Last Source Address Adjustment"]
        pub tcd2_slast: TCD2_SLAST,
        #[doc = "0x1050 - TCD Destination Address"]
        pub tcd2_daddr: TCD2_DADDR,
        #[doc = "0x1054 - TCD Signed Destination Address Offset"]
        pub tcd2_doff: TCD2_DOFF,
        #[doc = "0x1056 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
        pub tcd2_citer_elinkno: TCD2_CITER_ELINKNO,
        #[doc = "0x1058 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
        pub tcd2_dlastsga: TCD2_DLASTSGA,
        #[doc = "0x105c - TCD Control and Status"]
        pub tcd2_csr: TCD2_CSR,
        #[doc = "0x105e - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
        pub tcd2_biter_elinkno: TCD2_BITER_ELINKNO,
        #[doc = "0x1060 - TCD Source Address"]
        pub tcd3_saddr: TCD3_SADDR,
        #[doc = "0x1064 - TCD Signed Source Address Offset"]
        pub tcd3_soff: TCD3_SOFF,
        #[doc = "0x1066 - TCD Transfer Attributes"]
        pub tcd3_attr: TCD3_ATTR,
        #[doc = "0x1068 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
        pub tcd3_nbytes_mlno: TCD3_NBYTES_MLNO,
        #[doc = "0x106c - TCD Last Source Address Adjustment"]
        pub tcd3_slast: TCD3_SLAST,
        #[doc = "0x1070 - TCD Destination Address"]
        pub tcd3_daddr: TCD3_DADDR,
        #[doc = "0x1074 - TCD Signed Destination Address Offset"]
        pub tcd3_doff: TCD3_DOFF,
        #[doc = "0x1076 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
        pub tcd3_citer_elinkno: TCD3_CITER_ELINKNO,
        #[doc = "0x1078 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
        pub tcd3_dlastsga: TCD3_DLASTSGA,
        #[doc = "0x107c - TCD Control and Status"]
        pub tcd3_csr: TCD3_CSR,
        #[doc = "0x107e - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
        pub tcd3_biter_elinkno: TCD3_BITER_ELINKNO,
        #[doc = "0x1080 - TCD Source Address"]
        pub tcd4_saddr: TCD4_SADDR,
        #[doc = "0x1084 - TCD Signed Source Address Offset"]
        pub tcd4_soff: TCD4_SOFF,
        #[doc = "0x1086 - TCD Transfer Attributes"]
        pub tcd4_attr: TCD4_ATTR,
        #[doc = "0x1088 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
        pub tcd4_nbytes_mlno: TCD4_NBYTES_MLNO,
        #[doc = "0x108c - TCD Last Source Address Adjustment"]
        pub tcd4_slast: TCD4_SLAST,
        #[doc = "0x1090 - TCD Destination Address"]
        pub tcd4_daddr: TCD4_DADDR,
        #[doc = "0x1094 - TCD Signed Destination Address Offset"]
        pub tcd4_doff: TCD4_DOFF,
        #[doc = "0x1096 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
        pub tcd4_citer_elinkno: TCD4_CITER_ELINKNO,
        #[doc = "0x1098 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
        pub tcd4_dlastsga: TCD4_DLASTSGA,
        #[doc = "0x109c - TCD Control and Status"]
        pub tcd4_csr: TCD4_CSR,
        #[doc = "0x109e - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
        pub tcd4_biter_elinkno: TCD4_BITER_ELINKNO,
        #[doc = "0x10a0 - TCD Source Address"]
        pub tcd5_saddr: TCD5_SADDR,
        #[doc = "0x10a4 - TCD Signed Source Address Offset"]
        pub tcd5_soff: TCD5_SOFF,
        #[doc = "0x10a6 - TCD Transfer Attributes"]
        pub tcd5_attr: TCD5_ATTR,
        #[doc = "0x10a8 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
        pub tcd5_nbytes_mlno: TCD5_NBYTES_MLNO,
        #[doc = "0x10ac - TCD Last Source Address Adjustment"]
        pub tcd5_slast: TCD5_SLAST,
        #[doc = "0x10b0 - TCD Destination Address"]
        pub tcd5_daddr: TCD5_DADDR,
        #[doc = "0x10b4 - TCD Signed Destination Address Offset"]
        pub tcd5_doff: TCD5_DOFF,
        #[doc = "0x10b6 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
        pub tcd5_citer_elinkno: TCD5_CITER_ELINKNO,
        #[doc = "0x10b8 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
        pub tcd5_dlastsga: TCD5_DLASTSGA,
        #[doc = "0x10bc - TCD Control and Status"]
        pub tcd5_csr: TCD5_CSR,
        #[doc = "0x10be - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
        pub tcd5_biter_elinkno: TCD5_BITER_ELINKNO,
        #[doc = "0x10c0 - TCD Source Address"]
        pub tcd6_saddr: TCD6_SADDR,
        #[doc = "0x10c4 - TCD Signed Source Address Offset"]
        pub tcd6_soff: TCD6_SOFF,
        #[doc = "0x10c6 - TCD Transfer Attributes"]
        pub tcd6_attr: TCD6_ATTR,
        #[doc = "0x10c8 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
        pub tcd6_nbytes_mlno: TCD6_NBYTES_MLNO,
        #[doc = "0x10cc - TCD Last Source Address Adjustment"]
        pub tcd6_slast: TCD6_SLAST,
        #[doc = "0x10d0 - TCD Destination Address"]
        pub tcd6_daddr: TCD6_DADDR,
        #[doc = "0x10d4 - TCD Signed Destination Address Offset"]
        pub tcd6_doff: TCD6_DOFF,
        #[doc = "0x10d6 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
        pub tcd6_citer_elinkno: TCD6_CITER_ELINKNO,
        #[doc = "0x10d8 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
        pub tcd6_dlastsga: TCD6_DLASTSGA,
        #[doc = "0x10dc - TCD Control and Status"]
        pub tcd6_csr: TCD6_CSR,
        #[doc = "0x10de - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
        pub tcd6_biter_elinkno: TCD6_BITER_ELINKNO,
        #[doc = "0x10e0 - TCD Source Address"]
        pub tcd7_saddr: TCD7_SADDR,
        #[doc = "0x10e4 - TCD Signed Source Address Offset"]
        pub tcd7_soff: TCD7_SOFF,
        #[doc = "0x10e6 - TCD Transfer Attributes"]
        pub tcd7_attr: TCD7_ATTR,
        #[doc = "0x10e8 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
        pub tcd7_nbytes_mlno: TCD7_NBYTES_MLNO,
        #[doc = "0x10ec - TCD Last Source Address Adjustment"]
        pub tcd7_slast: TCD7_SLAST,
        #[doc = "0x10f0 - TCD Destination Address"]
        pub tcd7_daddr: TCD7_DADDR,
        #[doc = "0x10f4 - TCD Signed Destination Address Offset"]
        pub tcd7_doff: TCD7_DOFF,
        #[doc = "0x10f6 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
        pub tcd7_citer_elinkno: TCD7_CITER_ELINKNO,
        #[doc = "0x10f8 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
        pub tcd7_dlastsga: TCD7_DLASTSGA,
        #[doc = "0x10fc - TCD Control and Status"]
        pub tcd7_csr: TCD7_CSR,
        #[doc = "0x10fe - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
        pub tcd7_biter_elinkno: TCD7_BITER_ELINKNO,
        #[doc = "0x1100 - TCD Source Address"]
        pub tcd8_saddr: TCD8_SADDR,
        #[doc = "0x1104 - TCD Signed Source Address Offset"]
        pub tcd8_soff: TCD8_SOFF,
        #[doc = "0x1106 - TCD Transfer Attributes"]
        pub tcd8_attr: TCD8_ATTR,
        #[doc = "0x1108 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
        pub tcd8_nbytes_mlno: TCD8_NBYTES_MLNO,
        #[doc = "0x110c - TCD Last Source Address Adjustment"]
        pub tcd8_slast: TCD8_SLAST,
        #[doc = "0x1110 - TCD Destination Address"]
        pub tcd8_daddr: TCD8_DADDR,
        #[doc = "0x1114 - TCD Signed Destination Address Offset"]
        pub tcd8_doff: TCD8_DOFF,
        #[doc = "0x1116 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
        pub tcd8_citer_elinkno: TCD8_CITER_ELINKNO,
        #[doc = "0x1118 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
        pub tcd8_dlastsga: TCD8_DLASTSGA,
        #[doc = "0x111c - TCD Control and Status"]
        pub tcd8_csr: TCD8_CSR,
        #[doc = "0x111e - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
        pub tcd8_biter_elinkno: TCD8_BITER_ELINKNO,
        #[doc = "0x1120 - TCD Source Address"]
        pub tcd9_saddr: TCD9_SADDR,
        #[doc = "0x1124 - TCD Signed Source Address Offset"]
        pub tcd9_soff: TCD9_SOFF,
        #[doc = "0x1126 - TCD Transfer Attributes"]
        pub tcd9_attr: TCD9_ATTR,
        #[doc = "0x1128 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
        pub tcd9_nbytes_mlno: TCD9_NBYTES_MLNO,
        #[doc = "0x112c - TCD Last Source Address Adjustment"]
        pub tcd9_slast: TCD9_SLAST,
        #[doc = "0x1130 - TCD Destination Address"]
        pub tcd9_daddr: TCD9_DADDR,
        #[doc = "0x1134 - TCD Signed Destination Address Offset"]
        pub tcd9_doff: TCD9_DOFF,
        #[doc = "0x1136 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
        pub tcd9_citer_elinkno: TCD9_CITER_ELINKNO,
        #[doc = "0x1138 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
        pub tcd9_dlastsga: TCD9_DLASTSGA,
        #[doc = "0x113c - TCD Control and Status"]
        pub tcd9_csr: TCD9_CSR,
        #[doc = "0x113e - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
        pub tcd9_biter_elinkno: TCD9_BITER_ELINKNO,
        #[doc = "0x1140 - TCD Source Address"]
        pub tcd10_saddr: TCD10_SADDR,
        #[doc = "0x1144 - TCD Signed Source Address Offset"]
        pub tcd10_soff: TCD10_SOFF,
        #[doc = "0x1146 - TCD Transfer Attributes"]
        pub tcd10_attr: TCD10_ATTR,
        #[doc = "0x1148 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
        pub tcd10_nbytes_mlno: TCD10_NBYTES_MLNO,
        #[doc = "0x114c - TCD Last Source Address Adjustment"]
        pub tcd10_slast: TCD10_SLAST,
        #[doc = "0x1150 - TCD Destination Address"]
        pub tcd10_daddr: TCD10_DADDR,
        #[doc = "0x1154 - TCD Signed Destination Address Offset"]
        pub tcd10_doff: TCD10_DOFF,
        #[doc = "0x1156 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
        pub tcd10_citer_elinkno: TCD10_CITER_ELINKNO,
        #[doc = "0x1158 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
        pub tcd10_dlastsga: TCD10_DLASTSGA,
        #[doc = "0x115c - TCD Control and Status"]
        pub tcd10_csr: TCD10_CSR,
        #[doc = "0x115e - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
        pub tcd10_biter_elinkno: TCD10_BITER_ELINKNO,
        #[doc = "0x1160 - TCD Source Address"]
        pub tcd11_saddr: TCD11_SADDR,
        #[doc = "0x1164 - TCD Signed Source Address Offset"]
        pub tcd11_soff: TCD11_SOFF,
        #[doc = "0x1166 - TCD Transfer Attributes"]
        pub tcd11_attr: TCD11_ATTR,
        #[doc = "0x1168 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
        pub tcd11_nbytes_mlno: TCD11_NBYTES_MLNO,
        #[doc = "0x116c - TCD Last Source Address Adjustment"]
        pub tcd11_slast: TCD11_SLAST,
        #[doc = "0x1170 - TCD Destination Address"]
        pub tcd11_daddr: TCD11_DADDR,
        #[doc = "0x1174 - TCD Signed Destination Address Offset"]
        pub tcd11_doff: TCD11_DOFF,
        #[doc = "0x1176 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
        pub tcd11_citer_elinkno: TCD11_CITER_ELINKNO,
        #[doc = "0x1178 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
        pub tcd11_dlastsga: TCD11_DLASTSGA,
        #[doc = "0x117c - TCD Control and Status"]
        pub tcd11_csr: TCD11_CSR,
        #[doc = "0x117e - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
        pub tcd11_biter_elinkno: TCD11_BITER_ELINKNO,
        #[doc = "0x1180 - TCD Source Address"]
        pub tcd12_saddr: TCD12_SADDR,
        #[doc = "0x1184 - TCD Signed Source Address Offset"]
        pub tcd12_soff: TCD12_SOFF,
        #[doc = "0x1186 - TCD Transfer Attributes"]
        pub tcd12_attr: TCD12_ATTR,
        #[doc = "0x1188 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
        pub tcd12_nbytes_mlno: TCD12_NBYTES_MLNO,
        #[doc = "0x118c - TCD Last Source Address Adjustment"]
        pub tcd12_slast: TCD12_SLAST,
        #[doc = "0x1190 - TCD Destination Address"]
        pub tcd12_daddr: TCD12_DADDR,
        #[doc = "0x1194 - TCD Signed Destination Address Offset"]
        pub tcd12_doff: TCD12_DOFF,
        #[doc = "0x1196 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
        pub tcd12_citer_elinkno: TCD12_CITER_ELINKNO,
        #[doc = "0x1198 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
        pub tcd12_dlastsga: TCD12_DLASTSGA,
        #[doc = "0x119c - TCD Control and Status"]
        pub tcd12_csr: TCD12_CSR,
        #[doc = "0x119e - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
        pub tcd12_biter_elinkno: TCD12_BITER_ELINKNO,
        #[doc = "0x11a0 - TCD Source Address"]
        pub tcd13_saddr: TCD13_SADDR,
        #[doc = "0x11a4 - TCD Signed Source Address Offset"]
        pub tcd13_soff: TCD13_SOFF,
        #[doc = "0x11a6 - TCD Transfer Attributes"]
        pub tcd13_attr: TCD13_ATTR,
        #[doc = "0x11a8 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
        pub tcd13_nbytes_mlno: TCD13_NBYTES_MLNO,
        #[doc = "0x11ac - TCD Last Source Address Adjustment"]
        pub tcd13_slast: TCD13_SLAST,
        #[doc = "0x11b0 - TCD Destination Address"]
        pub tcd13_daddr: TCD13_DADDR,
        #[doc = "0x11b4 - TCD Signed Destination Address Offset"]
        pub tcd13_doff: TCD13_DOFF,
        #[doc = "0x11b6 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
        pub tcd13_citer_elinkno: TCD13_CITER_ELINKNO,
        #[doc = "0x11b8 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
        pub tcd13_dlastsga: TCD13_DLASTSGA,
        #[doc = "0x11bc - TCD Control and Status"]
        pub tcd13_csr: TCD13_CSR,
        #[doc = "0x11be - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
        pub tcd13_biter_elinkno: TCD13_BITER_ELINKNO,
        #[doc = "0x11c0 - TCD Source Address"]
        pub tcd14_saddr: TCD14_SADDR,
        #[doc = "0x11c4 - TCD Signed Source Address Offset"]
        pub tcd14_soff: TCD14_SOFF,
        #[doc = "0x11c6 - TCD Transfer Attributes"]
        pub tcd14_attr: TCD14_ATTR,
        #[doc = "0x11c8 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
        pub tcd14_nbytes_mlno: TCD14_NBYTES_MLNO,
        #[doc = "0x11cc - TCD Last Source Address Adjustment"]
        pub tcd14_slast: TCD14_SLAST,
        #[doc = "0x11d0 - TCD Destination Address"]
        pub tcd14_daddr: TCD14_DADDR,
        #[doc = "0x11d4 - TCD Signed Destination Address Offset"]
        pub tcd14_doff: TCD14_DOFF,
        #[doc = "0x11d6 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
        pub tcd14_citer_elinkno: TCD14_CITER_ELINKNO,
        #[doc = "0x11d8 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
        pub tcd14_dlastsga: TCD14_DLASTSGA,
        #[doc = "0x11dc - TCD Control and Status"]
        pub tcd14_csr: TCD14_CSR,
        #[doc = "0x11de - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
        pub tcd14_biter_elinkno: TCD14_BITER_ELINKNO,
        #[doc = "0x11e0 - TCD Source Address"]
        pub tcd15_saddr: TCD15_SADDR,
        #[doc = "0x11e4 - TCD Signed Source Address Offset"]
        pub tcd15_soff: TCD15_SOFF,
        #[doc = "0x11e6 - TCD Transfer Attributes"]
        pub tcd15_attr: TCD15_ATTR,
        #[doc = "0x11e8 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
        pub tcd15_nbytes_mlno: TCD15_NBYTES_MLNO,
        #[doc = "0x11ec - TCD Last Source Address Adjustment"]
        pub tcd15_slast: TCD15_SLAST,
        #[doc = "0x11f0 - TCD Destination Address"]
        pub tcd15_daddr: TCD15_DADDR,
        #[doc = "0x11f4 - TCD Signed Destination Address Offset"]
        pub tcd15_doff: TCD15_DOFF,
        #[doc = "0x11f6 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
        pub tcd15_citer_elinkno: TCD15_CITER_ELINKNO,
        #[doc = "0x11f8 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
        pub tcd15_dlastsga: TCD15_DLASTSGA,
        #[doc = "0x11fc - TCD Control and Status"]
        pub tcd15_csr: TCD15_CSR,
        #[doc = "0x11fe - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
        pub tcd15_biter_elinkno: TCD15_BITER_ELINKNO,
    }
    #[doc = "Control Register"]
    pub struct CR {
        register: VolatileCell<u32>,
    }
    #[doc = "Control Register"]
    pub mod cr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct EDBGR {
            bits: bool,
        }
        impl EDBGR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct ERCAR {
            bits: bool,
        }
        impl ERCAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `HOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HOER {
            #[doc = "Normal operation"]
            _0,
            #[doc = "Any error causes the HALT bit to set. Subsequently, all service requests are ignored until the HALT bit is cleared."]
            _1,
        }
        impl HOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HOER::_0 => false,
                    HOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HOER {
                match value {
                    false => HOER::_0,
                    true => HOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HOER::_1
            }
        }
        #[doc = "Possible values of the field `HALT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HALTR {
            #[doc = "Normal operation"]
            _0,
            #[doc = "Stall the start of any new channels. Executing channels are allowed to complete. Channel execution resumes when this bit is cleared."]
            _1,
        }
        impl HALTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HALTR::_0 => false,
                    HALTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HALTR {
                match value {
                    false => HALTR::_0,
                    true => HALTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HALTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HALTR::_1
            }
        }
        #[doc = "Possible values of the field `CLM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CLMR {
            #[doc = "A minor loop channel link made to itself goes through channel arbitration before being activated again."]
            _0,
            #[doc = "A minor loop channel link made to itself does not go through channel arbitration before being activated again. Upon minor loop completion, the channel activates again if that channel has a minor loop channel link enabled and the link channel is itself. This effectively applies the minor loop offsets and restarts the next minor loop."]
            _1,
        }
        impl CLMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CLMR::_0 => false,
                    CLMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CLMR {
                match value {
                    false => CLMR::_0,
                    true => CLMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CLMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CLMR::_1
            }
        }
        #[doc = "Possible values of the field `EMLM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EMLMR {
            #[doc = "Disabled. TCDn.word2 is defined as a 32-bit NBYTES field."]
            _0,
            #[doc = "Enabled. TCDn.word2 is redefined to include individual enable fields, an offset field, and the NBYTES field. The individual enable fields allow the minor loop offset to be applied to the source address, the destination address, or both. The NBYTES field is reduced when either offset is enabled."]
            _1,
        }
        impl EMLMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EMLMR::_0 => false,
                    EMLMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EMLMR {
                match value {
                    false => EMLMR::_0,
                    true => EMLMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EMLMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EMLMR::_1
            }
        }
        #[doc = "Possible values of the field `ECX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ECXR {
            #[doc = "Normal operation"]
            _0,
            #[doc = "Cancel the remaining data transfer in the same fashion as the CX bit. Stop the executing channel and force the minor loop to finish. The cancel takes effect after the last write of the current read/write sequence. The ECX bit clears itself after the cancel is honored. In addition to cancelling the transfer, ECX treats the cancel as an error condition, thus updating the Error Status register (DMAx_ES) and generating an optional error interrupt."]
            _1,
        }
        impl ECXR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ECXR::_0 => false,
                    ECXR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ECXR {
                match value {
                    false => ECXR::_0,
                    true => ECXR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ECXR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ECXR::_1
            }
        }
        #[doc = "Possible values of the field `CX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CXR {
            #[doc = "Normal operation"]
            _0,
            #[doc = "Cancel the remaining data transfer. Stop the executing channel and force the minor loop to finish. The cancel takes effect after the last write of the current read/write sequence. The CX bit clears itself after the cancel has been honored. This cancel retires the channel normally as if the minor loop was completed."]
            _1,
        }
        impl CXR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CXR::_0 => false,
                    CXR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CXR {
                match value {
                    false => CXR::_0,
                    true => CXR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CXR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CXR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _EDBGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _EDBGW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERCAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERCAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `HOE`"]
        pub enum HOEW {
            #[doc = "Normal operation"]
            _0,
            #[doc = "Any error causes the HALT bit to set. Subsequently, all service requests are ignored until the HALT bit is cleared."]
            _1,
        }
        impl HOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HOEW::_0 => false,
                    HOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Normal operation"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HOEW::_0)
            }
            #[doc = "Any error causes the HALT bit to set. Subsequently, all service requests are ignored until the HALT bit is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `HALT`"]
        pub enum HALTW {
            #[doc = "Normal operation"]
            _0,
            #[doc = "Stall the start of any new channels. Executing channels are allowed to complete. Channel execution resumes when this bit is cleared."]
            _1,
        }
        impl HALTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HALTW::_0 => false,
                    HALTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HALTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HALTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HALTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Normal operation"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HALTW::_0)
            }
            #[doc = "Stall the start of any new channels. Executing channels are allowed to complete. Channel execution resumes when this bit is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HALTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CLM`"]
        pub enum CLMW {
            #[doc = "A minor loop channel link made to itself goes through channel arbitration before being activated again."]
            _0,
            #[doc = "A minor loop channel link made to itself does not go through channel arbitration before being activated again. Upon minor loop completion, the channel activates again if that channel has a minor loop channel link enabled and the link channel is itself. This effectively applies the minor loop offsets and restarts the next minor loop."]
            _1,
        }
        impl CLMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CLMW::_0 => false,
                    CLMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CLMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "A minor loop channel link made to itself goes through channel arbitration before being activated again."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CLMW::_0)
            }
            #[doc = "A minor loop channel link made to itself does not go through channel arbitration before being activated again. Upon minor loop completion, the channel activates again if that channel has a minor loop channel link enabled and the link channel is itself. This effectively applies the minor loop offsets and restarts the next minor loop."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CLMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `EMLM`"]
        pub enum EMLMW {
            #[doc = "Disabled. TCDn.word2 is defined as a 32-bit NBYTES field."]
            _0,
            #[doc = "Enabled. TCDn.word2 is redefined to include individual enable fields, an offset field, and the NBYTES field. The individual enable fields allow the minor loop offset to be applied to the source address, the destination address, or both. The NBYTES field is reduced when either offset is enabled."]
            _1,
        }
        impl EMLMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EMLMW::_0 => false,
                    EMLMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EMLMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _EMLMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EMLMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disabled. TCDn.word2 is defined as a 32-bit NBYTES field."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EMLMW::_0)
            }
            #[doc = "Enabled. TCDn.word2 is redefined to include individual enable fields, an offset field, and the NBYTES field. The individual enable fields allow the minor loop offset to be applied to the source address, the destination address, or both. The NBYTES field is reduced when either offset is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EMLMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ECX`"]
        pub enum ECXW {
            #[doc = "Normal operation"]
            _0,
            #[doc = "Cancel the remaining data transfer in the same fashion as the CX bit. Stop the executing channel and force the minor loop to finish. The cancel takes effect after the last write of the current read/write sequence. The ECX bit clears itself after the cancel is honored. In addition to cancelling the transfer, ECX treats the cancel as an error condition, thus updating the Error Status register (DMAx_ES) and generating an optional error interrupt."]
            _1,
        }
        impl ECXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ECXW::_0 => false,
                    ECXW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ECXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ECXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ECXW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Normal operation"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ECXW::_0)
            }
            #[doc = "Cancel the remaining data transfer in the same fashion as the CX bit. Stop the executing channel and force the minor loop to finish. The cancel takes effect after the last write of the current read/write sequence. The ECX bit clears itself after the cancel is honored. In addition to cancelling the transfer, ECX treats the cancel as an error condition, thus updating the Error Status register (DMAx_ES) and generating an optional error interrupt."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ECXW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CX`"]
        pub enum CXW {
            #[doc = "Normal operation"]
            _0,
            #[doc = "Cancel the remaining data transfer. Stop the executing channel and force the minor loop to finish. The cancel takes effect after the last write of the current read/write sequence. The CX bit clears itself after the cancel has been honored. This cancel retires the channel normally as if the minor loop was completed."]
            _1,
        }
        impl CXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CXW::_0 => false,
                    CXW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CXW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Normal operation"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CXW::_0)
            }
            #[doc = "Cancel the remaining data transfer. Stop the executing channel and force the minor loop to finish. The cancel takes effect after the last write of the current read/write sequence. The CX bit clears itself after the cancel has been honored. This cancel retires the channel normally as if the minor loop was completed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CXW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 1 - Enable Debug"]
            #[inline(always)]
            pub fn edbg(&self) -> EDBGR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                EDBGR { bits }
            }
            #[doc = "Bit 2 - Enable Round Robin Channel Arbitration"]
            #[inline(always)]
            pub fn erca(&self) -> ERCAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ERCAR { bits }
            }
            #[doc = "Bit 4 - Halt On Error"]
            #[inline(always)]
            pub fn hoe(&self) -> HOER {
                HOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Halt DMA Operations"]
            #[inline(always)]
            pub fn halt(&self) -> HALTR {
                HALTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Continuous Link Mode"]
            #[inline(always)]
            pub fn clm(&self) -> CLMR {
                CLMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Enable Minor Loop Mapping"]
            #[inline(always)]
            pub fn emlm(&self) -> EMLMR {
                EMLMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 16 - Error Cancel Transfer"]
            #[inline(always)]
            pub fn ecx(&self) -> ECXR {
                ECXR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - Cancel Transfer"]
            #[inline(always)]
            pub fn cx(&self) -> CXR {
                CXR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 1 - Enable Debug"]
            #[inline(always)]
            pub fn edbg(&mut self) -> _EDBGW {
                _EDBGW { w: self }
            }
            #[doc = "Bit 2 - Enable Round Robin Channel Arbitration"]
            #[inline(always)]
            pub fn erca(&mut self) -> _ERCAW {
                _ERCAW { w: self }
            }
            #[doc = "Bit 4 - Halt On Error"]
            #[inline(always)]
            pub fn hoe(&mut self) -> _HOEW {
                _HOEW { w: self }
            }
            #[doc = "Bit 5 - Halt DMA Operations"]
            #[inline(always)]
            pub fn halt(&mut self) -> _HALTW {
                _HALTW { w: self }
            }
            #[doc = "Bit 6 - Continuous Link Mode"]
            #[inline(always)]
            pub fn clm(&mut self) -> _CLMW {
                _CLMW { w: self }
            }
            #[doc = "Bit 7 - Enable Minor Loop Mapping"]
            #[inline(always)]
            pub fn emlm(&mut self) -> _EMLMW {
                _EMLMW { w: self }
            }
            #[doc = "Bit 16 - Error Cancel Transfer"]
            #[inline(always)]
            pub fn ecx(&mut self) -> _ECXW {
                _ECXW { w: self }
            }
            #[doc = "Bit 17 - Cancel Transfer"]
            #[inline(always)]
            pub fn cx(&mut self) -> _CXW {
                _CXW { w: self }
            }
        }
    }
    #[doc = "Error Status Register"]
    pub struct ES {
        register: VolatileCell<u32>,
    }
    #[doc = "Error Status Register"]
    pub mod es {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::ES {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = "Possible values of the field `DBE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DBER {
            #[doc = "No destination bus error"]
            _0,
            #[doc = "The last recorded error was a bus error on a destination write"]
            _1,
        }
        impl DBER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DBER::_0 => false,
                    DBER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DBER {
                match value {
                    false => DBER::_0,
                    true => DBER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DBER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DBER::_1
            }
        }
        #[doc = "Possible values of the field `SBE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SBER {
            #[doc = "No source bus error"]
            _0,
            #[doc = "The last recorded error was a bus error on a source read"]
            _1,
        }
        impl SBER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SBER::_0 => false,
                    SBER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SBER {
                match value {
                    false => SBER::_0,
                    true => SBER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SBER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SBER::_1
            }
        }
        #[doc = "Possible values of the field `SGE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SGER {
            #[doc = "No scatter/gather configuration error"]
            _0,
            #[doc = "The last recorded error was a configuration error detected in the TCDn_DLASTSGA field. This field is checked at the beginning of a scatter/gather operation after major loop completion if TCDn_CSR[ESG] is enabled. TCDn_DLASTSGA is not on a 32 byte boundary."]
            _1,
        }
        impl SGER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SGER::_0 => false,
                    SGER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SGER {
                match value {
                    false => SGER::_0,
                    true => SGER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SGER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SGER::_1
            }
        }
        #[doc = "Possible values of the field `NCE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum NCER {
            #[doc = "No NBYTES/CITER configuration error"]
            _0,
            #[doc = r" Reserved"]
            _Reserved(bool),
        }
        impl NCER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    NCER::_0 => false,
                    NCER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> NCER {
                match value {
                    false => NCER::_0,
                    i => NCER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == NCER::_0
            }
        }
        #[doc = "Possible values of the field `DOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DOER {
            #[doc = "No destination offset configuration error"]
            _0,
            #[doc = "The last recorded error was a configuration error detected in the TCDn_DOFF field. TCDn_DOFF is inconsistent with TCDn_ATTR[DSIZE]."]
            _1,
        }
        impl DOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DOER::_0 => false,
                    DOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DOER {
                match value {
                    false => DOER::_0,
                    true => DOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DOER::_1
            }
        }
        #[doc = "Possible values of the field `DAE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DAER {
            #[doc = "No destination address configuration error"]
            _0,
            #[doc = "The last recorded error was a configuration error detected in the TCDn_DADDR field. TCDn_DADDR is inconsistent with TCDn_ATTR[DSIZE]."]
            _1,
        }
        impl DAER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DAER::_0 => false,
                    DAER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DAER {
                match value {
                    false => DAER::_0,
                    true => DAER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DAER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DAER::_1
            }
        }
        #[doc = "Possible values of the field `SOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SOER {
            #[doc = "No source offset configuration error"]
            _0,
            #[doc = "The last recorded error was a configuration error detected in the TCDn_SOFF field. TCDn_SOFF is inconsistent with TCDn_ATTR[SSIZE]."]
            _1,
        }
        impl SOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SOER::_0 => false,
                    SOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SOER {
                match value {
                    false => SOER::_0,
                    true => SOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SOER::_1
            }
        }
        #[doc = "Possible values of the field `SAE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SAER {
            #[doc = "No source address configuration error."]
            _0,
            #[doc = "The last recorded error was a configuration error detected in the TCDn_SADDR field. TCDn_SADDR is inconsistent with TCDn_ATTR[SSIZE]."]
            _1,
        }
        impl SAER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SAER::_0 => false,
                    SAER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SAER {
                match value {
                    false => SAER::_0,
                    true => SAER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SAER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SAER::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ERRCHNR {
            bits: u8,
        }
        impl ERRCHNR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `CPE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CPER {
            #[doc = "No channel priority error"]
            _0,
            #[doc = r" Reserved"]
            _Reserved(bool),
        }
        impl CPER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CPER::_0 => false,
                    CPER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CPER {
                match value {
                    false => CPER::_0,
                    i => CPER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CPER::_0
            }
        }
        #[doc = "Possible values of the field `ECX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ECXR {
            #[doc = "No canceled transfers"]
            _0,
            #[doc = "The last recorded entry was a canceled transfer by the error cancel transfer input"]
            _1,
        }
        impl ECXR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ECXR::_0 => false,
                    ECXR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ECXR {
                match value {
                    false => ECXR::_0,
                    true => ECXR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ECXR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ECXR::_1
            }
        }
        #[doc = "Possible values of the field `VLD`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum VLDR {
            #[doc = "No ERR bits are set."]
            _0,
            #[doc = "At least one ERR bit is set indicating a valid error exists that has not been cleared."]
            _1,
        }
        impl VLDR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    VLDR::_0 => false,
                    VLDR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> VLDR {
                match value {
                    false => VLDR::_0,
                    true => VLDR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == VLDR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == VLDR::_1
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Destination Bus Error"]
            #[inline(always)]
            pub fn dbe(&self) -> DBER {
                DBER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Source Bus Error"]
            #[inline(always)]
            pub fn sbe(&self) -> SBER {
                SBER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Scatter/Gather Configuration Error"]
            #[inline(always)]
            pub fn sge(&self) -> SGER {
                SGER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - NBYTES/CITER Configuration Error"]
            #[inline(always)]
            pub fn nce(&self) -> NCER {
                NCER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Destination Offset Error"]
            #[inline(always)]
            pub fn doe(&self) -> DOER {
                DOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Destination Address Error"]
            #[inline(always)]
            pub fn dae(&self) -> DAER {
                DAER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Source Offset Error"]
            #[inline(always)]
            pub fn soe(&self) -> SOER {
                SOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Source Address Error"]
            #[inline(always)]
            pub fn sae(&self) -> SAER {
                SAER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:11 - Error Channel Number or Canceled Channel Number"]
            #[inline(always)]
            pub fn errchn(&self) -> ERRCHNR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                ERRCHNR { bits }
            }
            #[doc = "Bit 14 - Channel Priority Error"]
            #[inline(always)]
            pub fn cpe(&self) -> CPER {
                CPER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 16 - Transfer Canceled"]
            #[inline(always)]
            pub fn ecx(&self) -> ECXR {
                ECXR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - VLD"]
            #[inline(always)]
            pub fn vld(&self) -> VLDR {
                VLDR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
    }
    #[doc = "Enable Request Register"]
    pub struct ERQ {
        register: VolatileCell<u32>,
    }
    #[doc = "Enable Request Register"]
    pub mod erq {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::ERQ {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `ERQ0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERQ0R {
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            _0,
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            _1,
        }
        impl ERQ0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERQ0R::_0 => false,
                    ERQ0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERQ0R {
                match value {
                    false => ERQ0R::_0,
                    true => ERQ0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERQ0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERQ0R::_1
            }
        }
        #[doc = "Possible values of the field `ERQ1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERQ1R {
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            _0,
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            _1,
        }
        impl ERQ1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERQ1R::_0 => false,
                    ERQ1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERQ1R {
                match value {
                    false => ERQ1R::_0,
                    true => ERQ1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERQ1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERQ1R::_1
            }
        }
        #[doc = "Possible values of the field `ERQ2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERQ2R {
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            _0,
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            _1,
        }
        impl ERQ2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERQ2R::_0 => false,
                    ERQ2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERQ2R {
                match value {
                    false => ERQ2R::_0,
                    true => ERQ2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERQ2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERQ2R::_1
            }
        }
        #[doc = "Possible values of the field `ERQ3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERQ3R {
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            _0,
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            _1,
        }
        impl ERQ3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERQ3R::_0 => false,
                    ERQ3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERQ3R {
                match value {
                    false => ERQ3R::_0,
                    true => ERQ3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERQ3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERQ3R::_1
            }
        }
        #[doc = "Possible values of the field `ERQ4`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERQ4R {
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            _0,
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            _1,
        }
        impl ERQ4R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERQ4R::_0 => false,
                    ERQ4R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERQ4R {
                match value {
                    false => ERQ4R::_0,
                    true => ERQ4R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERQ4R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERQ4R::_1
            }
        }
        #[doc = "Possible values of the field `ERQ5`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERQ5R {
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            _0,
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            _1,
        }
        impl ERQ5R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERQ5R::_0 => false,
                    ERQ5R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERQ5R {
                match value {
                    false => ERQ5R::_0,
                    true => ERQ5R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERQ5R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERQ5R::_1
            }
        }
        #[doc = "Possible values of the field `ERQ6`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERQ6R {
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            _0,
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            _1,
        }
        impl ERQ6R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERQ6R::_0 => false,
                    ERQ6R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERQ6R {
                match value {
                    false => ERQ6R::_0,
                    true => ERQ6R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERQ6R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERQ6R::_1
            }
        }
        #[doc = "Possible values of the field `ERQ7`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERQ7R {
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            _0,
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            _1,
        }
        impl ERQ7R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERQ7R::_0 => false,
                    ERQ7R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERQ7R {
                match value {
                    false => ERQ7R::_0,
                    true => ERQ7R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERQ7R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERQ7R::_1
            }
        }
        #[doc = "Possible values of the field `ERQ8`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERQ8R {
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            _0,
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            _1,
        }
        impl ERQ8R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERQ8R::_0 => false,
                    ERQ8R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERQ8R {
                match value {
                    false => ERQ8R::_0,
                    true => ERQ8R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERQ8R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERQ8R::_1
            }
        }
        #[doc = "Possible values of the field `ERQ9`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERQ9R {
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            _0,
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            _1,
        }
        impl ERQ9R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERQ9R::_0 => false,
                    ERQ9R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERQ9R {
                match value {
                    false => ERQ9R::_0,
                    true => ERQ9R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERQ9R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERQ9R::_1
            }
        }
        #[doc = "Possible values of the field `ERQ10`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERQ10R {
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            _0,
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            _1,
        }
        impl ERQ10R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERQ10R::_0 => false,
                    ERQ10R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERQ10R {
                match value {
                    false => ERQ10R::_0,
                    true => ERQ10R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERQ10R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERQ10R::_1
            }
        }
        #[doc = "Possible values of the field `ERQ11`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERQ11R {
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            _0,
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            _1,
        }
        impl ERQ11R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERQ11R::_0 => false,
                    ERQ11R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERQ11R {
                match value {
                    false => ERQ11R::_0,
                    true => ERQ11R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERQ11R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERQ11R::_1
            }
        }
        #[doc = "Possible values of the field `ERQ12`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERQ12R {
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            _0,
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            _1,
        }
        impl ERQ12R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERQ12R::_0 => false,
                    ERQ12R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERQ12R {
                match value {
                    false => ERQ12R::_0,
                    true => ERQ12R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERQ12R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERQ12R::_1
            }
        }
        #[doc = "Possible values of the field `ERQ13`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERQ13R {
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            _0,
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            _1,
        }
        impl ERQ13R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERQ13R::_0 => false,
                    ERQ13R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERQ13R {
                match value {
                    false => ERQ13R::_0,
                    true => ERQ13R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERQ13R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERQ13R::_1
            }
        }
        #[doc = "Possible values of the field `ERQ14`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERQ14R {
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            _0,
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            _1,
        }
        impl ERQ14R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERQ14R::_0 => false,
                    ERQ14R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERQ14R {
                match value {
                    false => ERQ14R::_0,
                    true => ERQ14R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERQ14R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERQ14R::_1
            }
        }
        #[doc = "Possible values of the field `ERQ15`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERQ15R {
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            _0,
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            _1,
        }
        impl ERQ15R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERQ15R::_0 => false,
                    ERQ15R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERQ15R {
                match value {
                    false => ERQ15R::_0,
                    true => ERQ15R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERQ15R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERQ15R::_1
            }
        }
        #[doc = "Values that can be written to the field `ERQ0`"]
        pub enum ERQ0W {
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            _0,
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            _1,
        }
        impl ERQ0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERQ0W::_0 => false,
                    ERQ0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERQ0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERQ0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERQ0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERQ0W::_0)
            }
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERQ0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ERQ1`"]
        pub enum ERQ1W {
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            _0,
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            _1,
        }
        impl ERQ1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERQ1W::_0 => false,
                    ERQ1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERQ1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERQ1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERQ1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERQ1W::_0)
            }
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERQ1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ERQ2`"]
        pub enum ERQ2W {
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            _0,
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            _1,
        }
        impl ERQ2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERQ2W::_0 => false,
                    ERQ2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERQ2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERQ2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERQ2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERQ2W::_0)
            }
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERQ2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ERQ3`"]
        pub enum ERQ3W {
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            _0,
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            _1,
        }
        impl ERQ3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERQ3W::_0 => false,
                    ERQ3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERQ3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERQ3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERQ3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERQ3W::_0)
            }
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERQ3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ERQ4`"]
        pub enum ERQ4W {
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            _0,
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            _1,
        }
        impl ERQ4W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERQ4W::_0 => false,
                    ERQ4W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERQ4W<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERQ4W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERQ4W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERQ4W::_0)
            }
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERQ4W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ERQ5`"]
        pub enum ERQ5W {
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            _0,
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            _1,
        }
        impl ERQ5W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERQ5W::_0 => false,
                    ERQ5W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERQ5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERQ5W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERQ5W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERQ5W::_0)
            }
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERQ5W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ERQ6`"]
        pub enum ERQ6W {
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            _0,
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            _1,
        }
        impl ERQ6W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERQ6W::_0 => false,
                    ERQ6W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERQ6W<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERQ6W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERQ6W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERQ6W::_0)
            }
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERQ6W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ERQ7`"]
        pub enum ERQ7W {
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            _0,
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            _1,
        }
        impl ERQ7W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERQ7W::_0 => false,
                    ERQ7W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERQ7W<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERQ7W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERQ7W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERQ7W::_0)
            }
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERQ7W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ERQ8`"]
        pub enum ERQ8W {
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            _0,
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            _1,
        }
        impl ERQ8W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERQ8W::_0 => false,
                    ERQ8W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERQ8W<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERQ8W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERQ8W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERQ8W::_0)
            }
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERQ8W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ERQ9`"]
        pub enum ERQ9W {
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            _0,
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            _1,
        }
        impl ERQ9W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERQ9W::_0 => false,
                    ERQ9W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERQ9W<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERQ9W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERQ9W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERQ9W::_0)
            }
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERQ9W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ERQ10`"]
        pub enum ERQ10W {
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            _0,
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            _1,
        }
        impl ERQ10W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERQ10W::_0 => false,
                    ERQ10W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERQ10W<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERQ10W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERQ10W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERQ10W::_0)
            }
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERQ10W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ERQ11`"]
        pub enum ERQ11W {
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            _0,
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            _1,
        }
        impl ERQ11W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERQ11W::_0 => false,
                    ERQ11W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERQ11W<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERQ11W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERQ11W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERQ11W::_0)
            }
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERQ11W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ERQ12`"]
        pub enum ERQ12W {
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            _0,
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            _1,
        }
        impl ERQ12W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERQ12W::_0 => false,
                    ERQ12W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERQ12W<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERQ12W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERQ12W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERQ12W::_0)
            }
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERQ12W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ERQ13`"]
        pub enum ERQ13W {
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            _0,
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            _1,
        }
        impl ERQ13W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERQ13W::_0 => false,
                    ERQ13W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERQ13W<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERQ13W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERQ13W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERQ13W::_0)
            }
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERQ13W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ERQ14`"]
        pub enum ERQ14W {
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            _0,
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            _1,
        }
        impl ERQ14W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERQ14W::_0 => false,
                    ERQ14W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERQ14W<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERQ14W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERQ14W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERQ14W::_0)
            }
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERQ14W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ERQ15`"]
        pub enum ERQ15W {
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            _0,
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            _1,
        }
        impl ERQ15W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERQ15W::_0 => false,
                    ERQ15W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERQ15W<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERQ15W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERQ15W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The DMA request signal for the corresponding channel is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERQ15W::_0)
            }
            #[doc = "The DMA request signal for the corresponding channel is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERQ15W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Enable DMA Request 0"]
            #[inline(always)]
            pub fn erq0(&self) -> ERQ0R {
                ERQ0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Enable DMA Request 1"]
            #[inline(always)]
            pub fn erq1(&self) -> ERQ1R {
                ERQ1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Enable DMA Request 2"]
            #[inline(always)]
            pub fn erq2(&self) -> ERQ2R {
                ERQ2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Enable DMA Request 3"]
            #[inline(always)]
            pub fn erq3(&self) -> ERQ3R {
                ERQ3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Enable DMA Request 4"]
            #[inline(always)]
            pub fn erq4(&self) -> ERQ4R {
                ERQ4R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Enable DMA Request 5"]
            #[inline(always)]
            pub fn erq5(&self) -> ERQ5R {
                ERQ5R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Enable DMA Request 6"]
            #[inline(always)]
            pub fn erq6(&self) -> ERQ6R {
                ERQ6R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Enable DMA Request 7"]
            #[inline(always)]
            pub fn erq7(&self) -> ERQ7R {
                ERQ7R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Enable DMA Request 8"]
            #[inline(always)]
            pub fn erq8(&self) -> ERQ8R {
                ERQ8R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Enable DMA Request 9"]
            #[inline(always)]
            pub fn erq9(&self) -> ERQ9R {
                ERQ9R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Enable DMA Request 10"]
            #[inline(always)]
            pub fn erq10(&self) -> ERQ10R {
                ERQ10R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 11 - Enable DMA Request 11"]
            #[inline(always)]
            pub fn erq11(&self) -> ERQ11R {
                ERQ11R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Enable DMA Request 12"]
            #[inline(always)]
            pub fn erq12(&self) -> ERQ12R {
                ERQ12R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Enable DMA Request 13"]
            #[inline(always)]
            pub fn erq13(&self) -> ERQ13R {
                ERQ13R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - Enable DMA Request 14"]
            #[inline(always)]
            pub fn erq14(&self) -> ERQ14R {
                ERQ14R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - Enable DMA Request 15"]
            #[inline(always)]
            pub fn erq15(&self) -> ERQ15R {
                ERQ15R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Enable DMA Request 0"]
            #[inline(always)]
            pub fn erq0(&mut self) -> _ERQ0W {
                _ERQ0W { w: self }
            }
            #[doc = "Bit 1 - Enable DMA Request 1"]
            #[inline(always)]
            pub fn erq1(&mut self) -> _ERQ1W {
                _ERQ1W { w: self }
            }
            #[doc = "Bit 2 - Enable DMA Request 2"]
            #[inline(always)]
            pub fn erq2(&mut self) -> _ERQ2W {
                _ERQ2W { w: self }
            }
            #[doc = "Bit 3 - Enable DMA Request 3"]
            #[inline(always)]
            pub fn erq3(&mut self) -> _ERQ3W {
                _ERQ3W { w: self }
            }
            #[doc = "Bit 4 - Enable DMA Request 4"]
            #[inline(always)]
            pub fn erq4(&mut self) -> _ERQ4W {
                _ERQ4W { w: self }
            }
            #[doc = "Bit 5 - Enable DMA Request 5"]
            #[inline(always)]
            pub fn erq5(&mut self) -> _ERQ5W {
                _ERQ5W { w: self }
            }
            #[doc = "Bit 6 - Enable DMA Request 6"]
            #[inline(always)]
            pub fn erq6(&mut self) -> _ERQ6W {
                _ERQ6W { w: self }
            }
            #[doc = "Bit 7 - Enable DMA Request 7"]
            #[inline(always)]
            pub fn erq7(&mut self) -> _ERQ7W {
                _ERQ7W { w: self }
            }
            #[doc = "Bit 8 - Enable DMA Request 8"]
            #[inline(always)]
            pub fn erq8(&mut self) -> _ERQ8W {
                _ERQ8W { w: self }
            }
            #[doc = "Bit 9 - Enable DMA Request 9"]
            #[inline(always)]
            pub fn erq9(&mut self) -> _ERQ9W {
                _ERQ9W { w: self }
            }
            #[doc = "Bit 10 - Enable DMA Request 10"]
            #[inline(always)]
            pub fn erq10(&mut self) -> _ERQ10W {
                _ERQ10W { w: self }
            }
            #[doc = "Bit 11 - Enable DMA Request 11"]
            #[inline(always)]
            pub fn erq11(&mut self) -> _ERQ11W {
                _ERQ11W { w: self }
            }
            #[doc = "Bit 12 - Enable DMA Request 12"]
            #[inline(always)]
            pub fn erq12(&mut self) -> _ERQ12W {
                _ERQ12W { w: self }
            }
            #[doc = "Bit 13 - Enable DMA Request 13"]
            #[inline(always)]
            pub fn erq13(&mut self) -> _ERQ13W {
                _ERQ13W { w: self }
            }
            #[doc = "Bit 14 - Enable DMA Request 14"]
            #[inline(always)]
            pub fn erq14(&mut self) -> _ERQ14W {
                _ERQ14W { w: self }
            }
            #[doc = "Bit 15 - Enable DMA Request 15"]
            #[inline(always)]
            pub fn erq15(&mut self) -> _ERQ15W {
                _ERQ15W { w: self }
            }
        }
    }
    #[doc = "Enable Error Interrupt Register"]
    pub struct EEI {
        register: VolatileCell<u32>,
    }
    #[doc = "Enable Error Interrupt Register"]
    pub mod eei {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EEI {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `EEI0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EEI0R {
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            _0,
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            _1,
        }
        impl EEI0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EEI0R::_0 => false,
                    EEI0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EEI0R {
                match value {
                    false => EEI0R::_0,
                    true => EEI0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EEI0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EEI0R::_1
            }
        }
        #[doc = "Possible values of the field `EEI1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EEI1R {
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            _0,
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            _1,
        }
        impl EEI1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EEI1R::_0 => false,
                    EEI1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EEI1R {
                match value {
                    false => EEI1R::_0,
                    true => EEI1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EEI1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EEI1R::_1
            }
        }
        #[doc = "Possible values of the field `EEI2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EEI2R {
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            _0,
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            _1,
        }
        impl EEI2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EEI2R::_0 => false,
                    EEI2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EEI2R {
                match value {
                    false => EEI2R::_0,
                    true => EEI2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EEI2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EEI2R::_1
            }
        }
        #[doc = "Possible values of the field `EEI3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EEI3R {
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            _0,
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            _1,
        }
        impl EEI3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EEI3R::_0 => false,
                    EEI3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EEI3R {
                match value {
                    false => EEI3R::_0,
                    true => EEI3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EEI3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EEI3R::_1
            }
        }
        #[doc = "Possible values of the field `EEI4`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EEI4R {
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            _0,
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            _1,
        }
        impl EEI4R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EEI4R::_0 => false,
                    EEI4R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EEI4R {
                match value {
                    false => EEI4R::_0,
                    true => EEI4R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EEI4R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EEI4R::_1
            }
        }
        #[doc = "Possible values of the field `EEI5`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EEI5R {
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            _0,
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            _1,
        }
        impl EEI5R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EEI5R::_0 => false,
                    EEI5R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EEI5R {
                match value {
                    false => EEI5R::_0,
                    true => EEI5R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EEI5R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EEI5R::_1
            }
        }
        #[doc = "Possible values of the field `EEI6`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EEI6R {
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            _0,
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            _1,
        }
        impl EEI6R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EEI6R::_0 => false,
                    EEI6R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EEI6R {
                match value {
                    false => EEI6R::_0,
                    true => EEI6R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EEI6R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EEI6R::_1
            }
        }
        #[doc = "Possible values of the field `EEI7`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EEI7R {
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            _0,
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            _1,
        }
        impl EEI7R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EEI7R::_0 => false,
                    EEI7R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EEI7R {
                match value {
                    false => EEI7R::_0,
                    true => EEI7R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EEI7R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EEI7R::_1
            }
        }
        #[doc = "Possible values of the field `EEI8`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EEI8R {
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            _0,
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            _1,
        }
        impl EEI8R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EEI8R::_0 => false,
                    EEI8R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EEI8R {
                match value {
                    false => EEI8R::_0,
                    true => EEI8R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EEI8R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EEI8R::_1
            }
        }
        #[doc = "Possible values of the field `EEI9`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EEI9R {
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            _0,
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            _1,
        }
        impl EEI9R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EEI9R::_0 => false,
                    EEI9R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EEI9R {
                match value {
                    false => EEI9R::_0,
                    true => EEI9R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EEI9R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EEI9R::_1
            }
        }
        #[doc = "Possible values of the field `EEI10`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EEI10R {
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            _0,
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            _1,
        }
        impl EEI10R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EEI10R::_0 => false,
                    EEI10R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EEI10R {
                match value {
                    false => EEI10R::_0,
                    true => EEI10R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EEI10R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EEI10R::_1
            }
        }
        #[doc = "Possible values of the field `EEI11`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EEI11R {
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            _0,
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            _1,
        }
        impl EEI11R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EEI11R::_0 => false,
                    EEI11R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EEI11R {
                match value {
                    false => EEI11R::_0,
                    true => EEI11R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EEI11R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EEI11R::_1
            }
        }
        #[doc = "Possible values of the field `EEI12`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EEI12R {
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            _0,
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            _1,
        }
        impl EEI12R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EEI12R::_0 => false,
                    EEI12R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EEI12R {
                match value {
                    false => EEI12R::_0,
                    true => EEI12R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EEI12R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EEI12R::_1
            }
        }
        #[doc = "Possible values of the field `EEI13`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EEI13R {
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            _0,
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            _1,
        }
        impl EEI13R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EEI13R::_0 => false,
                    EEI13R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EEI13R {
                match value {
                    false => EEI13R::_0,
                    true => EEI13R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EEI13R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EEI13R::_1
            }
        }
        #[doc = "Possible values of the field `EEI14`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EEI14R {
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            _0,
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            _1,
        }
        impl EEI14R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EEI14R::_0 => false,
                    EEI14R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EEI14R {
                match value {
                    false => EEI14R::_0,
                    true => EEI14R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EEI14R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EEI14R::_1
            }
        }
        #[doc = "Possible values of the field `EEI15`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EEI15R {
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            _0,
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            _1,
        }
        impl EEI15R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EEI15R::_0 => false,
                    EEI15R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EEI15R {
                match value {
                    false => EEI15R::_0,
                    true => EEI15R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EEI15R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EEI15R::_1
            }
        }
        #[doc = "Values that can be written to the field `EEI0`"]
        pub enum EEI0W {
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            _0,
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            _1,
        }
        impl EEI0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EEI0W::_0 => false,
                    EEI0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EEI0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _EEI0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EEI0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EEI0W::_0)
            }
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EEI0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `EEI1`"]
        pub enum EEI1W {
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            _0,
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            _1,
        }
        impl EEI1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EEI1W::_0 => false,
                    EEI1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EEI1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _EEI1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EEI1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EEI1W::_0)
            }
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EEI1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `EEI2`"]
        pub enum EEI2W {
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            _0,
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            _1,
        }
        impl EEI2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EEI2W::_0 => false,
                    EEI2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EEI2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _EEI2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EEI2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EEI2W::_0)
            }
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EEI2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `EEI3`"]
        pub enum EEI3W {
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            _0,
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            _1,
        }
        impl EEI3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EEI3W::_0 => false,
                    EEI3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EEI3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _EEI3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EEI3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EEI3W::_0)
            }
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EEI3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `EEI4`"]
        pub enum EEI4W {
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            _0,
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            _1,
        }
        impl EEI4W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EEI4W::_0 => false,
                    EEI4W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EEI4W<'a> {
            w: &'a mut W,
        }
        impl<'a> _EEI4W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EEI4W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EEI4W::_0)
            }
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EEI4W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `EEI5`"]
        pub enum EEI5W {
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            _0,
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            _1,
        }
        impl EEI5W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EEI5W::_0 => false,
                    EEI5W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EEI5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _EEI5W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EEI5W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EEI5W::_0)
            }
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EEI5W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `EEI6`"]
        pub enum EEI6W {
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            _0,
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            _1,
        }
        impl EEI6W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EEI6W::_0 => false,
                    EEI6W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EEI6W<'a> {
            w: &'a mut W,
        }
        impl<'a> _EEI6W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EEI6W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EEI6W::_0)
            }
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EEI6W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `EEI7`"]
        pub enum EEI7W {
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            _0,
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            _1,
        }
        impl EEI7W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EEI7W::_0 => false,
                    EEI7W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EEI7W<'a> {
            w: &'a mut W,
        }
        impl<'a> _EEI7W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EEI7W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EEI7W::_0)
            }
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EEI7W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `EEI8`"]
        pub enum EEI8W {
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            _0,
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            _1,
        }
        impl EEI8W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EEI8W::_0 => false,
                    EEI8W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EEI8W<'a> {
            w: &'a mut W,
        }
        impl<'a> _EEI8W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EEI8W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EEI8W::_0)
            }
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EEI8W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `EEI9`"]
        pub enum EEI9W {
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            _0,
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            _1,
        }
        impl EEI9W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EEI9W::_0 => false,
                    EEI9W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EEI9W<'a> {
            w: &'a mut W,
        }
        impl<'a> _EEI9W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EEI9W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EEI9W::_0)
            }
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EEI9W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `EEI10`"]
        pub enum EEI10W {
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            _0,
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            _1,
        }
        impl EEI10W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EEI10W::_0 => false,
                    EEI10W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EEI10W<'a> {
            w: &'a mut W,
        }
        impl<'a> _EEI10W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EEI10W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EEI10W::_0)
            }
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EEI10W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `EEI11`"]
        pub enum EEI11W {
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            _0,
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            _1,
        }
        impl EEI11W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EEI11W::_0 => false,
                    EEI11W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EEI11W<'a> {
            w: &'a mut W,
        }
        impl<'a> _EEI11W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EEI11W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EEI11W::_0)
            }
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EEI11W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `EEI12`"]
        pub enum EEI12W {
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            _0,
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            _1,
        }
        impl EEI12W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EEI12W::_0 => false,
                    EEI12W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EEI12W<'a> {
            w: &'a mut W,
        }
        impl<'a> _EEI12W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EEI12W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EEI12W::_0)
            }
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EEI12W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `EEI13`"]
        pub enum EEI13W {
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            _0,
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            _1,
        }
        impl EEI13W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EEI13W::_0 => false,
                    EEI13W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EEI13W<'a> {
            w: &'a mut W,
        }
        impl<'a> _EEI13W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EEI13W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EEI13W::_0)
            }
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EEI13W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `EEI14`"]
        pub enum EEI14W {
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            _0,
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            _1,
        }
        impl EEI14W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EEI14W::_0 => false,
                    EEI14W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EEI14W<'a> {
            w: &'a mut W,
        }
        impl<'a> _EEI14W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EEI14W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EEI14W::_0)
            }
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EEI14W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `EEI15`"]
        pub enum EEI15W {
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            _0,
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            _1,
        }
        impl EEI15W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EEI15W::_0 => false,
                    EEI15W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EEI15W<'a> {
            w: &'a mut W,
        }
        impl<'a> _EEI15W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EEI15W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The error signal for corresponding channel does not generate an error interrupt"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EEI15W::_0)
            }
            #[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EEI15W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Enable Error Interrupt 0"]
            #[inline(always)]
            pub fn eei0(&self) -> EEI0R {
                EEI0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Enable Error Interrupt 1"]
            #[inline(always)]
            pub fn eei1(&self) -> EEI1R {
                EEI1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Enable Error Interrupt 2"]
            #[inline(always)]
            pub fn eei2(&self) -> EEI2R {
                EEI2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Enable Error Interrupt 3"]
            #[inline(always)]
            pub fn eei3(&self) -> EEI3R {
                EEI3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Enable Error Interrupt 4"]
            #[inline(always)]
            pub fn eei4(&self) -> EEI4R {
                EEI4R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Enable Error Interrupt 5"]
            #[inline(always)]
            pub fn eei5(&self) -> EEI5R {
                EEI5R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Enable Error Interrupt 6"]
            #[inline(always)]
            pub fn eei6(&self) -> EEI6R {
                EEI6R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Enable Error Interrupt 7"]
            #[inline(always)]
            pub fn eei7(&self) -> EEI7R {
                EEI7R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Enable Error Interrupt 8"]
            #[inline(always)]
            pub fn eei8(&self) -> EEI8R {
                EEI8R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Enable Error Interrupt 9"]
            #[inline(always)]
            pub fn eei9(&self) -> EEI9R {
                EEI9R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Enable Error Interrupt 10"]
            #[inline(always)]
            pub fn eei10(&self) -> EEI10R {
                EEI10R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 11 - Enable Error Interrupt 11"]
            #[inline(always)]
            pub fn eei11(&self) -> EEI11R {
                EEI11R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Enable Error Interrupt 12"]
            #[inline(always)]
            pub fn eei12(&self) -> EEI12R {
                EEI12R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Enable Error Interrupt 13"]
            #[inline(always)]
            pub fn eei13(&self) -> EEI13R {
                EEI13R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - Enable Error Interrupt 14"]
            #[inline(always)]
            pub fn eei14(&self) -> EEI14R {
                EEI14R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - Enable Error Interrupt 15"]
            #[inline(always)]
            pub fn eei15(&self) -> EEI15R {
                EEI15R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Enable Error Interrupt 0"]
            #[inline(always)]
            pub fn eei0(&mut self) -> _EEI0W {
                _EEI0W { w: self }
            }
            #[doc = "Bit 1 - Enable Error Interrupt 1"]
            #[inline(always)]
            pub fn eei1(&mut self) -> _EEI1W {
                _EEI1W { w: self }
            }
            #[doc = "Bit 2 - Enable Error Interrupt 2"]
            #[inline(always)]
            pub fn eei2(&mut self) -> _EEI2W {
                _EEI2W { w: self }
            }
            #[doc = "Bit 3 - Enable Error Interrupt 3"]
            #[inline(always)]
            pub fn eei3(&mut self) -> _EEI3W {
                _EEI3W { w: self }
            }
            #[doc = "Bit 4 - Enable Error Interrupt 4"]
            #[inline(always)]
            pub fn eei4(&mut self) -> _EEI4W {
                _EEI4W { w: self }
            }
            #[doc = "Bit 5 - Enable Error Interrupt 5"]
            #[inline(always)]
            pub fn eei5(&mut self) -> _EEI5W {
                _EEI5W { w: self }
            }
            #[doc = "Bit 6 - Enable Error Interrupt 6"]
            #[inline(always)]
            pub fn eei6(&mut self) -> _EEI6W {
                _EEI6W { w: self }
            }
            #[doc = "Bit 7 - Enable Error Interrupt 7"]
            #[inline(always)]
            pub fn eei7(&mut self) -> _EEI7W {
                _EEI7W { w: self }
            }
            #[doc = "Bit 8 - Enable Error Interrupt 8"]
            #[inline(always)]
            pub fn eei8(&mut self) -> _EEI8W {
                _EEI8W { w: self }
            }
            #[doc = "Bit 9 - Enable Error Interrupt 9"]
            #[inline(always)]
            pub fn eei9(&mut self) -> _EEI9W {
                _EEI9W { w: self }
            }
            #[doc = "Bit 10 - Enable Error Interrupt 10"]
            #[inline(always)]
            pub fn eei10(&mut self) -> _EEI10W {
                _EEI10W { w: self }
            }
            #[doc = "Bit 11 - Enable Error Interrupt 11"]
            #[inline(always)]
            pub fn eei11(&mut self) -> _EEI11W {
                _EEI11W { w: self }
            }
            #[doc = "Bit 12 - Enable Error Interrupt 12"]
            #[inline(always)]
            pub fn eei12(&mut self) -> _EEI12W {
                _EEI12W { w: self }
            }
            #[doc = "Bit 13 - Enable Error Interrupt 13"]
            #[inline(always)]
            pub fn eei13(&mut self) -> _EEI13W {
                _EEI13W { w: self }
            }
            #[doc = "Bit 14 - Enable Error Interrupt 14"]
            #[inline(always)]
            pub fn eei14(&mut self) -> _EEI14W {
                _EEI14W { w: self }
            }
            #[doc = "Bit 15 - Enable Error Interrupt 15"]
            #[inline(always)]
            pub fn eei15(&mut self) -> _EEI15W {
                _EEI15W { w: self }
            }
        }
    }
    #[doc = "Clear Enable Error Interrupt Register"]
    pub struct CEEI {
        register: VolatileCell<u8>,
    }
    #[doc = "Clear Enable Error Interrupt Register"]
    pub mod ceei {
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::CEEI {
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
        }
        #[doc = r" Proxy"]
        pub struct _CEEIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CEEIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CAEEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CAEEW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `NOP`"]
        pub enum NOPW {
            #[doc = "Normal operation"]
            _0,
            #[doc = "No operation, ignore the other bits in this register"]
            _1,
        }
        impl NOPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    NOPW::_0 => false,
                    NOPW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _NOPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NOPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: NOPW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Normal operation"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(NOPW::_0)
            }
            #[doc = "No operation, ignore the other bits in this register"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(NOPW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Clear Enable Error Interrupt"]
            #[inline(always)]
            pub fn ceei(&mut self) -> _CEEIW {
                _CEEIW { w: self }
            }
            #[doc = "Bit 6 - Clear All Enable Error Interrupts"]
            #[inline(always)]
            pub fn caee(&mut self) -> _CAEEW {
                _CAEEW { w: self }
            }
            #[doc = "Bit 7 - No Op enable"]
            #[inline(always)]
            pub fn nop(&mut self) -> _NOPW {
                _NOPW { w: self }
            }
        }
    }
    #[doc = "Set Enable Error Interrupt Register"]
    pub struct SEEI {
        register: VolatileCell<u8>,
    }
    #[doc = "Set Enable Error Interrupt Register"]
    pub mod seei {
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::SEEI {
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEEIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEEIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SAEEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SAEEW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `NOP`"]
        pub enum NOPW {
            #[doc = "Normal operation"]
            _0,
            #[doc = "No operation, ignore the other bits in this register"]
            _1,
        }
        impl NOPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    NOPW::_0 => false,
                    NOPW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _NOPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NOPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: NOPW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Normal operation"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(NOPW::_0)
            }
            #[doc = "No operation, ignore the other bits in this register"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(NOPW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Set Enable Error Interrupt"]
            #[inline(always)]
            pub fn seei(&mut self) -> _SEEIW {
                _SEEIW { w: self }
            }
            #[doc = "Bit 6 - Sets All Enable Error Interrupts"]
            #[inline(always)]
            pub fn saee(&mut self) -> _SAEEW {
                _SAEEW { w: self }
            }
            #[doc = "Bit 7 - No Op enable"]
            #[inline(always)]
            pub fn nop(&mut self) -> _NOPW {
                _NOPW { w: self }
            }
        }
    }
    #[doc = "Clear Enable Request Register"]
    pub struct CERQ {
        register: VolatileCell<u8>,
    }
    #[doc = "Clear Enable Request Register"]
    pub mod cerq {
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::CERQ {
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
        }
        #[doc = r" Proxy"]
        pub struct _CERQW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CERQW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CAERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CAERW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `NOP`"]
        pub enum NOPW {
            #[doc = "Normal operation"]
            _0,
            #[doc = "No operation, ignore the other bits in this register"]
            _1,
        }
        impl NOPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    NOPW::_0 => false,
                    NOPW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _NOPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NOPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: NOPW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Normal operation"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(NOPW::_0)
            }
            #[doc = "No operation, ignore the other bits in this register"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(NOPW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Clear Enable Request"]
            #[inline(always)]
            pub fn cerq(&mut self) -> _CERQW {
                _CERQW { w: self }
            }
            #[doc = "Bit 6 - Clear All Enable Requests"]
            #[inline(always)]
            pub fn caer(&mut self) -> _CAERW {
                _CAERW { w: self }
            }
            #[doc = "Bit 7 - No Op enable"]
            #[inline(always)]
            pub fn nop(&mut self) -> _NOPW {
                _NOPW { w: self }
            }
        }
    }
    #[doc = "Set Enable Request Register"]
    pub struct SERQ {
        register: VolatileCell<u8>,
    }
    #[doc = "Set Enable Request Register"]
    pub mod serq {
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::SERQ {
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
        }
        #[doc = r" Proxy"]
        pub struct _SERQW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SERQW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SAERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SAERW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `NOP`"]
        pub enum NOPW {
            #[doc = "Normal operation"]
            _0,
            #[doc = "No operation, ignore the other bits in this register"]
            _1,
        }
        impl NOPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    NOPW::_0 => false,
                    NOPW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _NOPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NOPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: NOPW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Normal operation"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(NOPW::_0)
            }
            #[doc = "No operation, ignore the other bits in this register"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(NOPW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Set Enable Request"]
            #[inline(always)]
            pub fn serq(&mut self) -> _SERQW {
                _SERQW { w: self }
            }
            #[doc = "Bit 6 - Set All Enable Requests"]
            #[inline(always)]
            pub fn saer(&mut self) -> _SAERW {
                _SAERW { w: self }
            }
            #[doc = "Bit 7 - No Op enable"]
            #[inline(always)]
            pub fn nop(&mut self) -> _NOPW {
                _NOPW { w: self }
            }
        }
    }
    #[doc = "Clear DONE Status Bit Register"]
    pub struct CDNE {
        register: VolatileCell<u8>,
    }
    #[doc = "Clear DONE Status Bit Register"]
    pub mod cdne {
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::CDNE {
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
        }
        #[doc = r" Proxy"]
        pub struct _CDNEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CDNEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CADN`"]
        pub enum CADNW {
            #[doc = "Clears only the TCDn_CSR[DONE] bit specified in the CDNE field"]
            _0,
            #[doc = "Clears all bits in TCDn_CSR[DONE]"]
            _1,
        }
        impl CADNW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CADNW::_0 => false,
                    CADNW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CADNW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CADNW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CADNW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clears only the TCDn_CSR[DONE] bit specified in the CDNE field"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CADNW::_0)
            }
            #[doc = "Clears all bits in TCDn_CSR[DONE]"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CADNW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `NOP`"]
        pub enum NOPW {
            #[doc = "Normal operation"]
            _0,
            #[doc = "No operation, ignore the other bits in this register"]
            _1,
        }
        impl NOPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    NOPW::_0 => false,
                    NOPW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _NOPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NOPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: NOPW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Normal operation"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(NOPW::_0)
            }
            #[doc = "No operation, ignore the other bits in this register"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(NOPW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Clear DONE Bit"]
            #[inline(always)]
            pub fn cdne(&mut self) -> _CDNEW {
                _CDNEW { w: self }
            }
            #[doc = "Bit 6 - Clears All DONE Bits"]
            #[inline(always)]
            pub fn cadn(&mut self) -> _CADNW {
                _CADNW { w: self }
            }
            #[doc = "Bit 7 - No Op enable"]
            #[inline(always)]
            pub fn nop(&mut self) -> _NOPW {
                _NOPW { w: self }
            }
        }
    }
    #[doc = "Set START Bit Register"]
    pub struct SSRT {
        register: VolatileCell<u8>,
    }
    #[doc = "Set START Bit Register"]
    pub mod ssrt {
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::SSRT {
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
        }
        #[doc = r" Proxy"]
        pub struct _SSRTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SSRTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SAST`"]
        pub enum SASTW {
            #[doc = "Set only the TCDn_CSR[START] bit specified in the SSRT field"]
            _0,
            #[doc = "Set all bits in TCDn_CSR[START]"]
            _1,
        }
        impl SASTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SASTW::_0 => false,
                    SASTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SASTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SASTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SASTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Set only the TCDn_CSR[START] bit specified in the SSRT field"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SASTW::_0)
            }
            #[doc = "Set all bits in TCDn_CSR[START]"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SASTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `NOP`"]
        pub enum NOPW {
            #[doc = "Normal operation"]
            _0,
            #[doc = "No operation, ignore the other bits in this register"]
            _1,
        }
        impl NOPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    NOPW::_0 => false,
                    NOPW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _NOPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NOPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: NOPW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Normal operation"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(NOPW::_0)
            }
            #[doc = "No operation, ignore the other bits in this register"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(NOPW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Set START Bit"]
            #[inline(always)]
            pub fn ssrt(&mut self) -> _SSRTW {
                _SSRTW { w: self }
            }
            #[doc = "Bit 6 - Set All START Bits (activates all channels)"]
            #[inline(always)]
            pub fn sast(&mut self) -> _SASTW {
                _SASTW { w: self }
            }
            #[doc = "Bit 7 - No Op enable"]
            #[inline(always)]
            pub fn nop(&mut self) -> _NOPW {
                _NOPW { w: self }
            }
        }
    }
    #[doc = "Clear Error Register"]
    pub struct CERR {
        register: VolatileCell<u8>,
    }
    #[doc = "Clear Error Register"]
    pub mod cerr {
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::CERR {
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
        }
        #[doc = r" Proxy"]
        pub struct _CERRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CERRW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CAEIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CAEIW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `NOP`"]
        pub enum NOPW {
            #[doc = "Normal operation"]
            _0,
            #[doc = "No operation, ignore the other bits in this register"]
            _1,
        }
        impl NOPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    NOPW::_0 => false,
                    NOPW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _NOPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NOPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: NOPW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Normal operation"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(NOPW::_0)
            }
            #[doc = "No operation, ignore the other bits in this register"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(NOPW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Clear Error Indicator"]
            #[inline(always)]
            pub fn cerr(&mut self) -> _CERRW {
                _CERRW { w: self }
            }
            #[doc = "Bit 6 - Clear All Error Indicators"]
            #[inline(always)]
            pub fn caei(&mut self) -> _CAEIW {
                _CAEIW { w: self }
            }
            #[doc = "Bit 7 - No Op enable"]
            #[inline(always)]
            pub fn nop(&mut self) -> _NOPW {
                _NOPW { w: self }
            }
        }
    }
    #[doc = "Clear Interrupt Request Register"]
    pub struct CINT {
        register: VolatileCell<u8>,
    }
    #[doc = "Clear Interrupt Request Register"]
    pub mod cint {
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::CINT {
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
        }
        #[doc = r" Proxy"]
        pub struct _CINTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CINTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CAIRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CAIRW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `NOP`"]
        pub enum NOPW {
            #[doc = "Normal operation"]
            _0,
            #[doc = "No operation, ignore the other bits in this register"]
            _1,
        }
        impl NOPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    NOPW::_0 => false,
                    NOPW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _NOPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NOPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: NOPW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Normal operation"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(NOPW::_0)
            }
            #[doc = "No operation, ignore the other bits in this register"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(NOPW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Clear Interrupt Request"]
            #[inline(always)]
            pub fn cint(&mut self) -> _CINTW {
                _CINTW { w: self }
            }
            #[doc = "Bit 6 - Clear All Interrupt Requests"]
            #[inline(always)]
            pub fn cair(&mut self) -> _CAIRW {
                _CAIRW { w: self }
            }
            #[doc = "Bit 7 - No Op enable"]
            #[inline(always)]
            pub fn nop(&mut self) -> _NOPW {
                _NOPW { w: self }
            }
        }
    }
    #[doc = "Interrupt Request Register"]
    pub struct INT {
        register: VolatileCell<u32>,
    }
    #[doc = "Interrupt Request Register"]
    pub mod int {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::INT {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `INT0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INT0R {
            #[doc = "The interrupt request for corresponding channel is cleared"]
            _0,
            #[doc = "The interrupt request for corresponding channel is active"]
            _1,
        }
        impl INT0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INT0R::_0 => false,
                    INT0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INT0R {
                match value {
                    false => INT0R::_0,
                    true => INT0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INT0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INT0R::_1
            }
        }
        #[doc = "Possible values of the field `INT1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INT1R {
            #[doc = "The interrupt request for corresponding channel is cleared"]
            _0,
            #[doc = "The interrupt request for corresponding channel is active"]
            _1,
        }
        impl INT1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INT1R::_0 => false,
                    INT1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INT1R {
                match value {
                    false => INT1R::_0,
                    true => INT1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INT1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INT1R::_1
            }
        }
        #[doc = "Possible values of the field `INT2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INT2R {
            #[doc = "The interrupt request for corresponding channel is cleared"]
            _0,
            #[doc = "The interrupt request for corresponding channel is active"]
            _1,
        }
        impl INT2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INT2R::_0 => false,
                    INT2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INT2R {
                match value {
                    false => INT2R::_0,
                    true => INT2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INT2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INT2R::_1
            }
        }
        #[doc = "Possible values of the field `INT3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INT3R {
            #[doc = "The interrupt request for corresponding channel is cleared"]
            _0,
            #[doc = "The interrupt request for corresponding channel is active"]
            _1,
        }
        impl INT3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INT3R::_0 => false,
                    INT3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INT3R {
                match value {
                    false => INT3R::_0,
                    true => INT3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INT3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INT3R::_1
            }
        }
        #[doc = "Possible values of the field `INT4`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INT4R {
            #[doc = "The interrupt request for corresponding channel is cleared"]
            _0,
            #[doc = "The interrupt request for corresponding channel is active"]
            _1,
        }
        impl INT4R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INT4R::_0 => false,
                    INT4R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INT4R {
                match value {
                    false => INT4R::_0,
                    true => INT4R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INT4R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INT4R::_1
            }
        }
        #[doc = "Possible values of the field `INT5`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INT5R {
            #[doc = "The interrupt request for corresponding channel is cleared"]
            _0,
            #[doc = "The interrupt request for corresponding channel is active"]
            _1,
        }
        impl INT5R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INT5R::_0 => false,
                    INT5R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INT5R {
                match value {
                    false => INT5R::_0,
                    true => INT5R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INT5R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INT5R::_1
            }
        }
        #[doc = "Possible values of the field `INT6`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INT6R {
            #[doc = "The interrupt request for corresponding channel is cleared"]
            _0,
            #[doc = "The interrupt request for corresponding channel is active"]
            _1,
        }
        impl INT6R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INT6R::_0 => false,
                    INT6R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INT6R {
                match value {
                    false => INT6R::_0,
                    true => INT6R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INT6R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INT6R::_1
            }
        }
        #[doc = "Possible values of the field `INT7`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INT7R {
            #[doc = "The interrupt request for corresponding channel is cleared"]
            _0,
            #[doc = "The interrupt request for corresponding channel is active"]
            _1,
        }
        impl INT7R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INT7R::_0 => false,
                    INT7R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INT7R {
                match value {
                    false => INT7R::_0,
                    true => INT7R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INT7R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INT7R::_1
            }
        }
        #[doc = "Possible values of the field `INT8`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INT8R {
            #[doc = "The interrupt request for corresponding channel is cleared"]
            _0,
            #[doc = "The interrupt request for corresponding channel is active"]
            _1,
        }
        impl INT8R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INT8R::_0 => false,
                    INT8R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INT8R {
                match value {
                    false => INT8R::_0,
                    true => INT8R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INT8R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INT8R::_1
            }
        }
        #[doc = "Possible values of the field `INT9`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INT9R {
            #[doc = "The interrupt request for corresponding channel is cleared"]
            _0,
            #[doc = "The interrupt request for corresponding channel is active"]
            _1,
        }
        impl INT9R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INT9R::_0 => false,
                    INT9R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INT9R {
                match value {
                    false => INT9R::_0,
                    true => INT9R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INT9R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INT9R::_1
            }
        }
        #[doc = "Possible values of the field `INT10`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INT10R {
            #[doc = "The interrupt request for corresponding channel is cleared"]
            _0,
            #[doc = "The interrupt request for corresponding channel is active"]
            _1,
        }
        impl INT10R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INT10R::_0 => false,
                    INT10R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INT10R {
                match value {
                    false => INT10R::_0,
                    true => INT10R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INT10R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INT10R::_1
            }
        }
        #[doc = "Possible values of the field `INT11`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INT11R {
            #[doc = "The interrupt request for corresponding channel is cleared"]
            _0,
            #[doc = "The interrupt request for corresponding channel is active"]
            _1,
        }
        impl INT11R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INT11R::_0 => false,
                    INT11R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INT11R {
                match value {
                    false => INT11R::_0,
                    true => INT11R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INT11R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INT11R::_1
            }
        }
        #[doc = "Possible values of the field `INT12`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INT12R {
            #[doc = "The interrupt request for corresponding channel is cleared"]
            _0,
            #[doc = "The interrupt request for corresponding channel is active"]
            _1,
        }
        impl INT12R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INT12R::_0 => false,
                    INT12R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INT12R {
                match value {
                    false => INT12R::_0,
                    true => INT12R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INT12R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INT12R::_1
            }
        }
        #[doc = "Possible values of the field `INT13`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INT13R {
            #[doc = "The interrupt request for corresponding channel is cleared"]
            _0,
            #[doc = "The interrupt request for corresponding channel is active"]
            _1,
        }
        impl INT13R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INT13R::_0 => false,
                    INT13R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INT13R {
                match value {
                    false => INT13R::_0,
                    true => INT13R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INT13R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INT13R::_1
            }
        }
        #[doc = "Possible values of the field `INT14`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INT14R {
            #[doc = "The interrupt request for corresponding channel is cleared"]
            _0,
            #[doc = "The interrupt request for corresponding channel is active"]
            _1,
        }
        impl INT14R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INT14R::_0 => false,
                    INT14R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INT14R {
                match value {
                    false => INT14R::_0,
                    true => INT14R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INT14R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INT14R::_1
            }
        }
        #[doc = "Possible values of the field `INT15`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INT15R {
            #[doc = "The interrupt request for corresponding channel is cleared"]
            _0,
            #[doc = "The interrupt request for corresponding channel is active"]
            _1,
        }
        impl INT15R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INT15R::_0 => false,
                    INT15R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INT15R {
                match value {
                    false => INT15R::_0,
                    true => INT15R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INT15R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INT15R::_1
            }
        }
        #[doc = "Values that can be written to the field `INT0`"]
        pub enum INT0W {
            #[doc = "The interrupt request for corresponding channel is cleared"]
            _0,
            #[doc = "The interrupt request for corresponding channel is active"]
            _1,
        }
        impl INT0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INT0W::_0 => false,
                    INT0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INT0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _INT0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INT0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The interrupt request for corresponding channel is cleared"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INT0W::_0)
            }
            #[doc = "The interrupt request for corresponding channel is active"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INT0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INT1`"]
        pub enum INT1W {
            #[doc = "The interrupt request for corresponding channel is cleared"]
            _0,
            #[doc = "The interrupt request for corresponding channel is active"]
            _1,
        }
        impl INT1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INT1W::_0 => false,
                    INT1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INT1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _INT1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INT1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The interrupt request for corresponding channel is cleared"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INT1W::_0)
            }
            #[doc = "The interrupt request for corresponding channel is active"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INT1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INT2`"]
        pub enum INT2W {
            #[doc = "The interrupt request for corresponding channel is cleared"]
            _0,
            #[doc = "The interrupt request for corresponding channel is active"]
            _1,
        }
        impl INT2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INT2W::_0 => false,
                    INT2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INT2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _INT2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INT2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The interrupt request for corresponding channel is cleared"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INT2W::_0)
            }
            #[doc = "The interrupt request for corresponding channel is active"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INT2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INT3`"]
        pub enum INT3W {
            #[doc = "The interrupt request for corresponding channel is cleared"]
            _0,
            #[doc = "The interrupt request for corresponding channel is active"]
            _1,
        }
        impl INT3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INT3W::_0 => false,
                    INT3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INT3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _INT3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INT3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The interrupt request for corresponding channel is cleared"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INT3W::_0)
            }
            #[doc = "The interrupt request for corresponding channel is active"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INT3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INT4`"]
        pub enum INT4W {
            #[doc = "The interrupt request for corresponding channel is cleared"]
            _0,
            #[doc = "The interrupt request for corresponding channel is active"]
            _1,
        }
        impl INT4W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INT4W::_0 => false,
                    INT4W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INT4W<'a> {
            w: &'a mut W,
        }
        impl<'a> _INT4W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INT4W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The interrupt request for corresponding channel is cleared"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INT4W::_0)
            }
            #[doc = "The interrupt request for corresponding channel is active"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INT4W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INT5`"]
        pub enum INT5W {
            #[doc = "The interrupt request for corresponding channel is cleared"]
            _0,
            #[doc = "The interrupt request for corresponding channel is active"]
            _1,
        }
        impl INT5W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INT5W::_0 => false,
                    INT5W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INT5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _INT5W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INT5W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The interrupt request for corresponding channel is cleared"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INT5W::_0)
            }
            #[doc = "The interrupt request for corresponding channel is active"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INT5W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INT6`"]
        pub enum INT6W {
            #[doc = "The interrupt request for corresponding channel is cleared"]
            _0,
            #[doc = "The interrupt request for corresponding channel is active"]
            _1,
        }
        impl INT6W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INT6W::_0 => false,
                    INT6W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INT6W<'a> {
            w: &'a mut W,
        }
        impl<'a> _INT6W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INT6W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The interrupt request for corresponding channel is cleared"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INT6W::_0)
            }
            #[doc = "The interrupt request for corresponding channel is active"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INT6W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INT7`"]
        pub enum INT7W {
            #[doc = "The interrupt request for corresponding channel is cleared"]
            _0,
            #[doc = "The interrupt request for corresponding channel is active"]
            _1,
        }
        impl INT7W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INT7W::_0 => false,
                    INT7W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INT7W<'a> {
            w: &'a mut W,
        }
        impl<'a> _INT7W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INT7W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The interrupt request for corresponding channel is cleared"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INT7W::_0)
            }
            #[doc = "The interrupt request for corresponding channel is active"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INT7W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INT8`"]
        pub enum INT8W {
            #[doc = "The interrupt request for corresponding channel is cleared"]
            _0,
            #[doc = "The interrupt request for corresponding channel is active"]
            _1,
        }
        impl INT8W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INT8W::_0 => false,
                    INT8W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INT8W<'a> {
            w: &'a mut W,
        }
        impl<'a> _INT8W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INT8W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The interrupt request for corresponding channel is cleared"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INT8W::_0)
            }
            #[doc = "The interrupt request for corresponding channel is active"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INT8W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INT9`"]
        pub enum INT9W {
            #[doc = "The interrupt request for corresponding channel is cleared"]
            _0,
            #[doc = "The interrupt request for corresponding channel is active"]
            _1,
        }
        impl INT9W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INT9W::_0 => false,
                    INT9W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INT9W<'a> {
            w: &'a mut W,
        }
        impl<'a> _INT9W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INT9W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The interrupt request for corresponding channel is cleared"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INT9W::_0)
            }
            #[doc = "The interrupt request for corresponding channel is active"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INT9W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INT10`"]
        pub enum INT10W {
            #[doc = "The interrupt request for corresponding channel is cleared"]
            _0,
            #[doc = "The interrupt request for corresponding channel is active"]
            _1,
        }
        impl INT10W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INT10W::_0 => false,
                    INT10W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INT10W<'a> {
            w: &'a mut W,
        }
        impl<'a> _INT10W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INT10W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The interrupt request for corresponding channel is cleared"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INT10W::_0)
            }
            #[doc = "The interrupt request for corresponding channel is active"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INT10W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INT11`"]
        pub enum INT11W {
            #[doc = "The interrupt request for corresponding channel is cleared"]
            _0,
            #[doc = "The interrupt request for corresponding channel is active"]
            _1,
        }
        impl INT11W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INT11W::_0 => false,
                    INT11W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INT11W<'a> {
            w: &'a mut W,
        }
        impl<'a> _INT11W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INT11W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The interrupt request for corresponding channel is cleared"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INT11W::_0)
            }
            #[doc = "The interrupt request for corresponding channel is active"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INT11W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INT12`"]
        pub enum INT12W {
            #[doc = "The interrupt request for corresponding channel is cleared"]
            _0,
            #[doc = "The interrupt request for corresponding channel is active"]
            _1,
        }
        impl INT12W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INT12W::_0 => false,
                    INT12W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INT12W<'a> {
            w: &'a mut W,
        }
        impl<'a> _INT12W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INT12W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The interrupt request for corresponding channel is cleared"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INT12W::_0)
            }
            #[doc = "The interrupt request for corresponding channel is active"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INT12W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INT13`"]
        pub enum INT13W {
            #[doc = "The interrupt request for corresponding channel is cleared"]
            _0,
            #[doc = "The interrupt request for corresponding channel is active"]
            _1,
        }
        impl INT13W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INT13W::_0 => false,
                    INT13W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INT13W<'a> {
            w: &'a mut W,
        }
        impl<'a> _INT13W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INT13W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The interrupt request for corresponding channel is cleared"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INT13W::_0)
            }
            #[doc = "The interrupt request for corresponding channel is active"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INT13W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INT14`"]
        pub enum INT14W {
            #[doc = "The interrupt request for corresponding channel is cleared"]
            _0,
            #[doc = "The interrupt request for corresponding channel is active"]
            _1,
        }
        impl INT14W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INT14W::_0 => false,
                    INT14W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INT14W<'a> {
            w: &'a mut W,
        }
        impl<'a> _INT14W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INT14W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The interrupt request for corresponding channel is cleared"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INT14W::_0)
            }
            #[doc = "The interrupt request for corresponding channel is active"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INT14W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INT15`"]
        pub enum INT15W {
            #[doc = "The interrupt request for corresponding channel is cleared"]
            _0,
            #[doc = "The interrupt request for corresponding channel is active"]
            _1,
        }
        impl INT15W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INT15W::_0 => false,
                    INT15W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INT15W<'a> {
            w: &'a mut W,
        }
        impl<'a> _INT15W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INT15W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The interrupt request for corresponding channel is cleared"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INT15W::_0)
            }
            #[doc = "The interrupt request for corresponding channel is active"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INT15W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Interrupt Request 0"]
            #[inline(always)]
            pub fn int0(&self) -> INT0R {
                INT0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Interrupt Request 1"]
            #[inline(always)]
            pub fn int1(&self) -> INT1R {
                INT1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Interrupt Request 2"]
            #[inline(always)]
            pub fn int2(&self) -> INT2R {
                INT2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Interrupt Request 3"]
            #[inline(always)]
            pub fn int3(&self) -> INT3R {
                INT3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Interrupt Request 4"]
            #[inline(always)]
            pub fn int4(&self) -> INT4R {
                INT4R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Interrupt Request 5"]
            #[inline(always)]
            pub fn int5(&self) -> INT5R {
                INT5R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Interrupt Request 6"]
            #[inline(always)]
            pub fn int6(&self) -> INT6R {
                INT6R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Interrupt Request 7"]
            #[inline(always)]
            pub fn int7(&self) -> INT7R {
                INT7R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Interrupt Request 8"]
            #[inline(always)]
            pub fn int8(&self) -> INT8R {
                INT8R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Interrupt Request 9"]
            #[inline(always)]
            pub fn int9(&self) -> INT9R {
                INT9R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Interrupt Request 10"]
            #[inline(always)]
            pub fn int10(&self) -> INT10R {
                INT10R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 11 - Interrupt Request 11"]
            #[inline(always)]
            pub fn int11(&self) -> INT11R {
                INT11R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Interrupt Request 12"]
            #[inline(always)]
            pub fn int12(&self) -> INT12R {
                INT12R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Interrupt Request 13"]
            #[inline(always)]
            pub fn int13(&self) -> INT13R {
                INT13R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - Interrupt Request 14"]
            #[inline(always)]
            pub fn int14(&self) -> INT14R {
                INT14R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - Interrupt Request 15"]
            #[inline(always)]
            pub fn int15(&self) -> INT15R {
                INT15R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Interrupt Request 0"]
            #[inline(always)]
            pub fn int0(&mut self) -> _INT0W {
                _INT0W { w: self }
            }
            #[doc = "Bit 1 - Interrupt Request 1"]
            #[inline(always)]
            pub fn int1(&mut self) -> _INT1W {
                _INT1W { w: self }
            }
            #[doc = "Bit 2 - Interrupt Request 2"]
            #[inline(always)]
            pub fn int2(&mut self) -> _INT2W {
                _INT2W { w: self }
            }
            #[doc = "Bit 3 - Interrupt Request 3"]
            #[inline(always)]
            pub fn int3(&mut self) -> _INT3W {
                _INT3W { w: self }
            }
            #[doc = "Bit 4 - Interrupt Request 4"]
            #[inline(always)]
            pub fn int4(&mut self) -> _INT4W {
                _INT4W { w: self }
            }
            #[doc = "Bit 5 - Interrupt Request 5"]
            #[inline(always)]
            pub fn int5(&mut self) -> _INT5W {
                _INT5W { w: self }
            }
            #[doc = "Bit 6 - Interrupt Request 6"]
            #[inline(always)]
            pub fn int6(&mut self) -> _INT6W {
                _INT6W { w: self }
            }
            #[doc = "Bit 7 - Interrupt Request 7"]
            #[inline(always)]
            pub fn int7(&mut self) -> _INT7W {
                _INT7W { w: self }
            }
            #[doc = "Bit 8 - Interrupt Request 8"]
            #[inline(always)]
            pub fn int8(&mut self) -> _INT8W {
                _INT8W { w: self }
            }
            #[doc = "Bit 9 - Interrupt Request 9"]
            #[inline(always)]
            pub fn int9(&mut self) -> _INT9W {
                _INT9W { w: self }
            }
            #[doc = "Bit 10 - Interrupt Request 10"]
            #[inline(always)]
            pub fn int10(&mut self) -> _INT10W {
                _INT10W { w: self }
            }
            #[doc = "Bit 11 - Interrupt Request 11"]
            #[inline(always)]
            pub fn int11(&mut self) -> _INT11W {
                _INT11W { w: self }
            }
            #[doc = "Bit 12 - Interrupt Request 12"]
            #[inline(always)]
            pub fn int12(&mut self) -> _INT12W {
                _INT12W { w: self }
            }
            #[doc = "Bit 13 - Interrupt Request 13"]
            #[inline(always)]
            pub fn int13(&mut self) -> _INT13W {
                _INT13W { w: self }
            }
            #[doc = "Bit 14 - Interrupt Request 14"]
            #[inline(always)]
            pub fn int14(&mut self) -> _INT14W {
                _INT14W { w: self }
            }
            #[doc = "Bit 15 - Interrupt Request 15"]
            #[inline(always)]
            pub fn int15(&mut self) -> _INT15W {
                _INT15W { w: self }
            }
        }
    }
    #[doc = "Error Register"]
    pub struct ERR {
        register: VolatileCell<u32>,
    }
    #[doc = "Error Register"]
    pub mod err {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::ERR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `ERR0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERR0R {
            #[doc = "An error in this channel has not occurred"]
            _0,
            #[doc = "An error in this channel has occurred"]
            _1,
        }
        impl ERR0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERR0R::_0 => false,
                    ERR0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERR0R {
                match value {
                    false => ERR0R::_0,
                    true => ERR0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERR0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERR0R::_1
            }
        }
        #[doc = "Possible values of the field `ERR1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERR1R {
            #[doc = "An error in this channel has not occurred"]
            _0,
            #[doc = "An error in this channel has occurred"]
            _1,
        }
        impl ERR1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERR1R::_0 => false,
                    ERR1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERR1R {
                match value {
                    false => ERR1R::_0,
                    true => ERR1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERR1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERR1R::_1
            }
        }
        #[doc = "Possible values of the field `ERR2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERR2R {
            #[doc = "An error in this channel has not occurred"]
            _0,
            #[doc = "An error in this channel has occurred"]
            _1,
        }
        impl ERR2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERR2R::_0 => false,
                    ERR2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERR2R {
                match value {
                    false => ERR2R::_0,
                    true => ERR2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERR2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERR2R::_1
            }
        }
        #[doc = "Possible values of the field `ERR3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERR3R {
            #[doc = "An error in this channel has not occurred"]
            _0,
            #[doc = "An error in this channel has occurred"]
            _1,
        }
        impl ERR3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERR3R::_0 => false,
                    ERR3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERR3R {
                match value {
                    false => ERR3R::_0,
                    true => ERR3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERR3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERR3R::_1
            }
        }
        #[doc = "Possible values of the field `ERR4`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERR4R {
            #[doc = "An error in this channel has not occurred"]
            _0,
            #[doc = "An error in this channel has occurred"]
            _1,
        }
        impl ERR4R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERR4R::_0 => false,
                    ERR4R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERR4R {
                match value {
                    false => ERR4R::_0,
                    true => ERR4R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERR4R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERR4R::_1
            }
        }
        #[doc = "Possible values of the field `ERR5`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERR5R {
            #[doc = "An error in this channel has not occurred"]
            _0,
            #[doc = "An error in this channel has occurred"]
            _1,
        }
        impl ERR5R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERR5R::_0 => false,
                    ERR5R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERR5R {
                match value {
                    false => ERR5R::_0,
                    true => ERR5R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERR5R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERR5R::_1
            }
        }
        #[doc = "Possible values of the field `ERR6`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERR6R {
            #[doc = "An error in this channel has not occurred"]
            _0,
            #[doc = "An error in this channel has occurred"]
            _1,
        }
        impl ERR6R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERR6R::_0 => false,
                    ERR6R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERR6R {
                match value {
                    false => ERR6R::_0,
                    true => ERR6R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERR6R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERR6R::_1
            }
        }
        #[doc = "Possible values of the field `ERR7`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERR7R {
            #[doc = "An error in this channel has not occurred"]
            _0,
            #[doc = "An error in this channel has occurred"]
            _1,
        }
        impl ERR7R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERR7R::_0 => false,
                    ERR7R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERR7R {
                match value {
                    false => ERR7R::_0,
                    true => ERR7R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERR7R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERR7R::_1
            }
        }
        #[doc = "Possible values of the field `ERR8`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERR8R {
            #[doc = "An error in this channel has not occurred"]
            _0,
            #[doc = "An error in this channel has occurred"]
            _1,
        }
        impl ERR8R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERR8R::_0 => false,
                    ERR8R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERR8R {
                match value {
                    false => ERR8R::_0,
                    true => ERR8R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERR8R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERR8R::_1
            }
        }
        #[doc = "Possible values of the field `ERR9`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERR9R {
            #[doc = "An error in this channel has not occurred"]
            _0,
            #[doc = "An error in this channel has occurred"]
            _1,
        }
        impl ERR9R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERR9R::_0 => false,
                    ERR9R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERR9R {
                match value {
                    false => ERR9R::_0,
                    true => ERR9R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERR9R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERR9R::_1
            }
        }
        #[doc = "Possible values of the field `ERR10`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERR10R {
            #[doc = "An error in this channel has not occurred"]
            _0,
            #[doc = "An error in this channel has occurred"]
            _1,
        }
        impl ERR10R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERR10R::_0 => false,
                    ERR10R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERR10R {
                match value {
                    false => ERR10R::_0,
                    true => ERR10R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERR10R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERR10R::_1
            }
        }
        #[doc = "Possible values of the field `ERR11`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERR11R {
            #[doc = "An error in this channel has not occurred"]
            _0,
            #[doc = "An error in this channel has occurred"]
            _1,
        }
        impl ERR11R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERR11R::_0 => false,
                    ERR11R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERR11R {
                match value {
                    false => ERR11R::_0,
                    true => ERR11R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERR11R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERR11R::_1
            }
        }
        #[doc = "Possible values of the field `ERR12`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERR12R {
            #[doc = "An error in this channel has not occurred"]
            _0,
            #[doc = "An error in this channel has occurred"]
            _1,
        }
        impl ERR12R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERR12R::_0 => false,
                    ERR12R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERR12R {
                match value {
                    false => ERR12R::_0,
                    true => ERR12R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERR12R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERR12R::_1
            }
        }
        #[doc = "Possible values of the field `ERR13`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERR13R {
            #[doc = "An error in this channel has not occurred"]
            _0,
            #[doc = "An error in this channel has occurred"]
            _1,
        }
        impl ERR13R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERR13R::_0 => false,
                    ERR13R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERR13R {
                match value {
                    false => ERR13R::_0,
                    true => ERR13R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERR13R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERR13R::_1
            }
        }
        #[doc = "Possible values of the field `ERR14`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERR14R {
            #[doc = "An error in this channel has not occurred"]
            _0,
            #[doc = "An error in this channel has occurred"]
            _1,
        }
        impl ERR14R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERR14R::_0 => false,
                    ERR14R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERR14R {
                match value {
                    false => ERR14R::_0,
                    true => ERR14R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERR14R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERR14R::_1
            }
        }
        #[doc = "Possible values of the field `ERR15`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERR15R {
            #[doc = "An error in this channel has not occurred"]
            _0,
            #[doc = "An error in this channel has occurred"]
            _1,
        }
        impl ERR15R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERR15R::_0 => false,
                    ERR15R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERR15R {
                match value {
                    false => ERR15R::_0,
                    true => ERR15R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERR15R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERR15R::_1
            }
        }
        #[doc = "Values that can be written to the field `ERR0`"]
        pub enum ERR0W {
            #[doc = "An error in this channel has not occurred"]
            _0,
            #[doc = "An error in this channel has occurred"]
            _1,
        }
        impl ERR0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERR0W::_0 => false,
                    ERR0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERR0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERR0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERR0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "An error in this channel has not occurred"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERR0W::_0)
            }
            #[doc = "An error in this channel has occurred"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERR0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ERR1`"]
        pub enum ERR1W {
            #[doc = "An error in this channel has not occurred"]
            _0,
            #[doc = "An error in this channel has occurred"]
            _1,
        }
        impl ERR1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERR1W::_0 => false,
                    ERR1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERR1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERR1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERR1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "An error in this channel has not occurred"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERR1W::_0)
            }
            #[doc = "An error in this channel has occurred"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERR1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ERR2`"]
        pub enum ERR2W {
            #[doc = "An error in this channel has not occurred"]
            _0,
            #[doc = "An error in this channel has occurred"]
            _1,
        }
        impl ERR2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERR2W::_0 => false,
                    ERR2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERR2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERR2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERR2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "An error in this channel has not occurred"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERR2W::_0)
            }
            #[doc = "An error in this channel has occurred"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERR2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ERR3`"]
        pub enum ERR3W {
            #[doc = "An error in this channel has not occurred"]
            _0,
            #[doc = "An error in this channel has occurred"]
            _1,
        }
        impl ERR3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERR3W::_0 => false,
                    ERR3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERR3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERR3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERR3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "An error in this channel has not occurred"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERR3W::_0)
            }
            #[doc = "An error in this channel has occurred"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERR3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ERR4`"]
        pub enum ERR4W {
            #[doc = "An error in this channel has not occurred"]
            _0,
            #[doc = "An error in this channel has occurred"]
            _1,
        }
        impl ERR4W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERR4W::_0 => false,
                    ERR4W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERR4W<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERR4W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERR4W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "An error in this channel has not occurred"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERR4W::_0)
            }
            #[doc = "An error in this channel has occurred"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERR4W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ERR5`"]
        pub enum ERR5W {
            #[doc = "An error in this channel has not occurred"]
            _0,
            #[doc = "An error in this channel has occurred"]
            _1,
        }
        impl ERR5W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERR5W::_0 => false,
                    ERR5W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERR5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERR5W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERR5W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "An error in this channel has not occurred"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERR5W::_0)
            }
            #[doc = "An error in this channel has occurred"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERR5W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ERR6`"]
        pub enum ERR6W {
            #[doc = "An error in this channel has not occurred"]
            _0,
            #[doc = "An error in this channel has occurred"]
            _1,
        }
        impl ERR6W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERR6W::_0 => false,
                    ERR6W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERR6W<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERR6W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERR6W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "An error in this channel has not occurred"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERR6W::_0)
            }
            #[doc = "An error in this channel has occurred"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERR6W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ERR7`"]
        pub enum ERR7W {
            #[doc = "An error in this channel has not occurred"]
            _0,
            #[doc = "An error in this channel has occurred"]
            _1,
        }
        impl ERR7W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERR7W::_0 => false,
                    ERR7W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERR7W<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERR7W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERR7W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "An error in this channel has not occurred"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERR7W::_0)
            }
            #[doc = "An error in this channel has occurred"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERR7W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ERR8`"]
        pub enum ERR8W {
            #[doc = "An error in this channel has not occurred"]
            _0,
            #[doc = "An error in this channel has occurred"]
            _1,
        }
        impl ERR8W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERR8W::_0 => false,
                    ERR8W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERR8W<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERR8W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERR8W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "An error in this channel has not occurred"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERR8W::_0)
            }
            #[doc = "An error in this channel has occurred"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERR8W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ERR9`"]
        pub enum ERR9W {
            #[doc = "An error in this channel has not occurred"]
            _0,
            #[doc = "An error in this channel has occurred"]
            _1,
        }
        impl ERR9W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERR9W::_0 => false,
                    ERR9W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERR9W<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERR9W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERR9W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "An error in this channel has not occurred"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERR9W::_0)
            }
            #[doc = "An error in this channel has occurred"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERR9W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ERR10`"]
        pub enum ERR10W {
            #[doc = "An error in this channel has not occurred"]
            _0,
            #[doc = "An error in this channel has occurred"]
            _1,
        }
        impl ERR10W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERR10W::_0 => false,
                    ERR10W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERR10W<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERR10W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERR10W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "An error in this channel has not occurred"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERR10W::_0)
            }
            #[doc = "An error in this channel has occurred"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERR10W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ERR11`"]
        pub enum ERR11W {
            #[doc = "An error in this channel has not occurred"]
            _0,
            #[doc = "An error in this channel has occurred"]
            _1,
        }
        impl ERR11W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERR11W::_0 => false,
                    ERR11W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERR11W<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERR11W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERR11W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "An error in this channel has not occurred"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERR11W::_0)
            }
            #[doc = "An error in this channel has occurred"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERR11W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ERR12`"]
        pub enum ERR12W {
            #[doc = "An error in this channel has not occurred"]
            _0,
            #[doc = "An error in this channel has occurred"]
            _1,
        }
        impl ERR12W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERR12W::_0 => false,
                    ERR12W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERR12W<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERR12W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERR12W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "An error in this channel has not occurred"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERR12W::_0)
            }
            #[doc = "An error in this channel has occurred"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERR12W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ERR13`"]
        pub enum ERR13W {
            #[doc = "An error in this channel has not occurred"]
            _0,
            #[doc = "An error in this channel has occurred"]
            _1,
        }
        impl ERR13W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERR13W::_0 => false,
                    ERR13W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERR13W<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERR13W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERR13W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "An error in this channel has not occurred"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERR13W::_0)
            }
            #[doc = "An error in this channel has occurred"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERR13W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ERR14`"]
        pub enum ERR14W {
            #[doc = "An error in this channel has not occurred"]
            _0,
            #[doc = "An error in this channel has occurred"]
            _1,
        }
        impl ERR14W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERR14W::_0 => false,
                    ERR14W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERR14W<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERR14W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERR14W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "An error in this channel has not occurred"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERR14W::_0)
            }
            #[doc = "An error in this channel has occurred"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERR14W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ERR15`"]
        pub enum ERR15W {
            #[doc = "An error in this channel has not occurred"]
            _0,
            #[doc = "An error in this channel has occurred"]
            _1,
        }
        impl ERR15W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERR15W::_0 => false,
                    ERR15W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERR15W<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERR15W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERR15W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "An error in this channel has not occurred"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERR15W::_0)
            }
            #[doc = "An error in this channel has occurred"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERR15W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Error In Channel 0"]
            #[inline(always)]
            pub fn err0(&self) -> ERR0R {
                ERR0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Error In Channel 1"]
            #[inline(always)]
            pub fn err1(&self) -> ERR1R {
                ERR1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Error In Channel 2"]
            #[inline(always)]
            pub fn err2(&self) -> ERR2R {
                ERR2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Error In Channel 3"]
            #[inline(always)]
            pub fn err3(&self) -> ERR3R {
                ERR3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Error In Channel 4"]
            #[inline(always)]
            pub fn err4(&self) -> ERR4R {
                ERR4R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Error In Channel 5"]
            #[inline(always)]
            pub fn err5(&self) -> ERR5R {
                ERR5R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Error In Channel 6"]
            #[inline(always)]
            pub fn err6(&self) -> ERR6R {
                ERR6R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Error In Channel 7"]
            #[inline(always)]
            pub fn err7(&self) -> ERR7R {
                ERR7R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Error In Channel 8"]
            #[inline(always)]
            pub fn err8(&self) -> ERR8R {
                ERR8R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Error In Channel 9"]
            #[inline(always)]
            pub fn err9(&self) -> ERR9R {
                ERR9R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Error In Channel 10"]
            #[inline(always)]
            pub fn err10(&self) -> ERR10R {
                ERR10R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 11 - Error In Channel 11"]
            #[inline(always)]
            pub fn err11(&self) -> ERR11R {
                ERR11R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Error In Channel 12"]
            #[inline(always)]
            pub fn err12(&self) -> ERR12R {
                ERR12R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Error In Channel 13"]
            #[inline(always)]
            pub fn err13(&self) -> ERR13R {
                ERR13R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - Error In Channel 14"]
            #[inline(always)]
            pub fn err14(&self) -> ERR14R {
                ERR14R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - Error In Channel 15"]
            #[inline(always)]
            pub fn err15(&self) -> ERR15R {
                ERR15R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Error In Channel 0"]
            #[inline(always)]
            pub fn err0(&mut self) -> _ERR0W {
                _ERR0W { w: self }
            }
            #[doc = "Bit 1 - Error In Channel 1"]
            #[inline(always)]
            pub fn err1(&mut self) -> _ERR1W {
                _ERR1W { w: self }
            }
            #[doc = "Bit 2 - Error In Channel 2"]
            #[inline(always)]
            pub fn err2(&mut self) -> _ERR2W {
                _ERR2W { w: self }
            }
            #[doc = "Bit 3 - Error In Channel 3"]
            #[inline(always)]
            pub fn err3(&mut self) -> _ERR3W {
                _ERR3W { w: self }
            }
            #[doc = "Bit 4 - Error In Channel 4"]
            #[inline(always)]
            pub fn err4(&mut self) -> _ERR4W {
                _ERR4W { w: self }
            }
            #[doc = "Bit 5 - Error In Channel 5"]
            #[inline(always)]
            pub fn err5(&mut self) -> _ERR5W {
                _ERR5W { w: self }
            }
            #[doc = "Bit 6 - Error In Channel 6"]
            #[inline(always)]
            pub fn err6(&mut self) -> _ERR6W {
                _ERR6W { w: self }
            }
            #[doc = "Bit 7 - Error In Channel 7"]
            #[inline(always)]
            pub fn err7(&mut self) -> _ERR7W {
                _ERR7W { w: self }
            }
            #[doc = "Bit 8 - Error In Channel 8"]
            #[inline(always)]
            pub fn err8(&mut self) -> _ERR8W {
                _ERR8W { w: self }
            }
            #[doc = "Bit 9 - Error In Channel 9"]
            #[inline(always)]
            pub fn err9(&mut self) -> _ERR9W {
                _ERR9W { w: self }
            }
            #[doc = "Bit 10 - Error In Channel 10"]
            #[inline(always)]
            pub fn err10(&mut self) -> _ERR10W {
                _ERR10W { w: self }
            }
            #[doc = "Bit 11 - Error In Channel 11"]
            #[inline(always)]
            pub fn err11(&mut self) -> _ERR11W {
                _ERR11W { w: self }
            }
            #[doc = "Bit 12 - Error In Channel 12"]
            #[inline(always)]
            pub fn err12(&mut self) -> _ERR12W {
                _ERR12W { w: self }
            }
            #[doc = "Bit 13 - Error In Channel 13"]
            #[inline(always)]
            pub fn err13(&mut self) -> _ERR13W {
                _ERR13W { w: self }
            }
            #[doc = "Bit 14 - Error In Channel 14"]
            #[inline(always)]
            pub fn err14(&mut self) -> _ERR14W {
                _ERR14W { w: self }
            }
            #[doc = "Bit 15 - Error In Channel 15"]
            #[inline(always)]
            pub fn err15(&mut self) -> _ERR15W {
                _ERR15W { w: self }
            }
        }
    }
    #[doc = "Hardware Request Status Register"]
    pub struct HRS {
        register: VolatileCell<u32>,
    }
    #[doc = "Hardware Request Status Register"]
    pub mod hrs {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::HRS {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = "Possible values of the field `HRS0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HRS0R {
            #[doc = "A hardware service request for channel 0 is not present"]
            _0,
            #[doc = "A hardware service request for channel 0 is present"]
            _1,
        }
        impl HRS0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HRS0R::_0 => false,
                    HRS0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HRS0R {
                match value {
                    false => HRS0R::_0,
                    true => HRS0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HRS0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HRS0R::_1
            }
        }
        #[doc = "Possible values of the field `HRS1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HRS1R {
            #[doc = "A hardware service request for channel 1 is not present"]
            _0,
            #[doc = "A hardware service request for channel 1 is present"]
            _1,
        }
        impl HRS1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HRS1R::_0 => false,
                    HRS1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HRS1R {
                match value {
                    false => HRS1R::_0,
                    true => HRS1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HRS1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HRS1R::_1
            }
        }
        #[doc = "Possible values of the field `HRS2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HRS2R {
            #[doc = "A hardware service request for channel 2 is not present"]
            _0,
            #[doc = "A hardware service request for channel 2 is present"]
            _1,
        }
        impl HRS2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HRS2R::_0 => false,
                    HRS2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HRS2R {
                match value {
                    false => HRS2R::_0,
                    true => HRS2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HRS2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HRS2R::_1
            }
        }
        #[doc = "Possible values of the field `HRS3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HRS3R {
            #[doc = "A hardware service request for channel 3 is not present"]
            _0,
            #[doc = "A hardware service request for channel 3 is present"]
            _1,
        }
        impl HRS3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HRS3R::_0 => false,
                    HRS3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HRS3R {
                match value {
                    false => HRS3R::_0,
                    true => HRS3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HRS3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HRS3R::_1
            }
        }
        #[doc = "Possible values of the field `HRS4`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HRS4R {
            #[doc = "A hardware service request for channel 4 is not present"]
            _0,
            #[doc = "A hardware service request for channel 4 is present"]
            _1,
        }
        impl HRS4R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HRS4R::_0 => false,
                    HRS4R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HRS4R {
                match value {
                    false => HRS4R::_0,
                    true => HRS4R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HRS4R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HRS4R::_1
            }
        }
        #[doc = "Possible values of the field `HRS5`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HRS5R {
            #[doc = "A hardware service request for channel 5 is not present"]
            _0,
            #[doc = "A hardware service request for channel 5 is present"]
            _1,
        }
        impl HRS5R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HRS5R::_0 => false,
                    HRS5R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HRS5R {
                match value {
                    false => HRS5R::_0,
                    true => HRS5R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HRS5R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HRS5R::_1
            }
        }
        #[doc = "Possible values of the field `HRS6`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HRS6R {
            #[doc = "A hardware service request for channel 6 is not present"]
            _0,
            #[doc = "A hardware service request for channel 6 is present"]
            _1,
        }
        impl HRS6R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HRS6R::_0 => false,
                    HRS6R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HRS6R {
                match value {
                    false => HRS6R::_0,
                    true => HRS6R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HRS6R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HRS6R::_1
            }
        }
        #[doc = "Possible values of the field `HRS7`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HRS7R {
            #[doc = "A hardware service request for channel 7 is not present"]
            _0,
            #[doc = "A hardware service request for channel 7 is present"]
            _1,
        }
        impl HRS7R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HRS7R::_0 => false,
                    HRS7R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HRS7R {
                match value {
                    false => HRS7R::_0,
                    true => HRS7R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HRS7R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HRS7R::_1
            }
        }
        #[doc = "Possible values of the field `HRS8`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HRS8R {
            #[doc = "A hardware service request for channel 8 is not present"]
            _0,
            #[doc = "A hardware service request for channel 8 is present"]
            _1,
        }
        impl HRS8R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HRS8R::_0 => false,
                    HRS8R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HRS8R {
                match value {
                    false => HRS8R::_0,
                    true => HRS8R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HRS8R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HRS8R::_1
            }
        }
        #[doc = "Possible values of the field `HRS9`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HRS9R {
            #[doc = "A hardware service request for channel 9 is not present"]
            _0,
            #[doc = "A hardware service request for channel 9 is present"]
            _1,
        }
        impl HRS9R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HRS9R::_0 => false,
                    HRS9R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HRS9R {
                match value {
                    false => HRS9R::_0,
                    true => HRS9R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HRS9R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HRS9R::_1
            }
        }
        #[doc = "Possible values of the field `HRS10`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HRS10R {
            #[doc = "A hardware service request for channel 10 is not present"]
            _0,
            #[doc = "A hardware service request for channel 10 is present"]
            _1,
        }
        impl HRS10R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HRS10R::_0 => false,
                    HRS10R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HRS10R {
                match value {
                    false => HRS10R::_0,
                    true => HRS10R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HRS10R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HRS10R::_1
            }
        }
        #[doc = "Possible values of the field `HRS11`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HRS11R {
            #[doc = "A hardware service request for channel 11 is not present"]
            _0,
            #[doc = "A hardware service request for channel 11 is present"]
            _1,
        }
        impl HRS11R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HRS11R::_0 => false,
                    HRS11R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HRS11R {
                match value {
                    false => HRS11R::_0,
                    true => HRS11R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HRS11R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HRS11R::_1
            }
        }
        #[doc = "Possible values of the field `HRS12`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HRS12R {
            #[doc = "A hardware service request for channel 12 is not present"]
            _0,
            #[doc = "A hardware service request for channel 12 is present"]
            _1,
        }
        impl HRS12R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HRS12R::_0 => false,
                    HRS12R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HRS12R {
                match value {
                    false => HRS12R::_0,
                    true => HRS12R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HRS12R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HRS12R::_1
            }
        }
        #[doc = "Possible values of the field `HRS13`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HRS13R {
            #[doc = "A hardware service request for channel 13 is not present"]
            _0,
            #[doc = "A hardware service request for channel 13 is present"]
            _1,
        }
        impl HRS13R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HRS13R::_0 => false,
                    HRS13R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HRS13R {
                match value {
                    false => HRS13R::_0,
                    true => HRS13R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HRS13R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HRS13R::_1
            }
        }
        #[doc = "Possible values of the field `HRS14`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HRS14R {
            #[doc = "A hardware service request for channel 14 is not present"]
            _0,
            #[doc = "A hardware service request for channel 14 is present"]
            _1,
        }
        impl HRS14R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HRS14R::_0 => false,
                    HRS14R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HRS14R {
                match value {
                    false => HRS14R::_0,
                    true => HRS14R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HRS14R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HRS14R::_1
            }
        }
        #[doc = "Possible values of the field `HRS15`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HRS15R {
            #[doc = "A hardware service request for channel 15 is not present"]
            _0,
            #[doc = "A hardware service request for channel 15 is present"]
            _1,
        }
        impl HRS15R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HRS15R::_0 => false,
                    HRS15R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HRS15R {
                match value {
                    false => HRS15R::_0,
                    true => HRS15R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HRS15R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HRS15R::_1
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Hardware Request Status Channel 0"]
            #[inline(always)]
            pub fn hrs0(&self) -> HRS0R {
                HRS0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Hardware Request Status Channel 1"]
            #[inline(always)]
            pub fn hrs1(&self) -> HRS1R {
                HRS1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Hardware Request Status Channel 2"]
            #[inline(always)]
            pub fn hrs2(&self) -> HRS2R {
                HRS2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Hardware Request Status Channel 3"]
            #[inline(always)]
            pub fn hrs3(&self) -> HRS3R {
                HRS3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Hardware Request Status Channel 4"]
            #[inline(always)]
            pub fn hrs4(&self) -> HRS4R {
                HRS4R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Hardware Request Status Channel 5"]
            #[inline(always)]
            pub fn hrs5(&self) -> HRS5R {
                HRS5R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Hardware Request Status Channel 6"]
            #[inline(always)]
            pub fn hrs6(&self) -> HRS6R {
                HRS6R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Hardware Request Status Channel 7"]
            #[inline(always)]
            pub fn hrs7(&self) -> HRS7R {
                HRS7R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Hardware Request Status Channel 8"]
            #[inline(always)]
            pub fn hrs8(&self) -> HRS8R {
                HRS8R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Hardware Request Status Channel 9"]
            #[inline(always)]
            pub fn hrs9(&self) -> HRS9R {
                HRS9R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Hardware Request Status Channel 10"]
            #[inline(always)]
            pub fn hrs10(&self) -> HRS10R {
                HRS10R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 11 - Hardware Request Status Channel 11"]
            #[inline(always)]
            pub fn hrs11(&self) -> HRS11R {
                HRS11R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Hardware Request Status Channel 12"]
            #[inline(always)]
            pub fn hrs12(&self) -> HRS12R {
                HRS12R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Hardware Request Status Channel 13"]
            #[inline(always)]
            pub fn hrs13(&self) -> HRS13R {
                HRS13R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - Hardware Request Status Channel 14"]
            #[inline(always)]
            pub fn hrs14(&self) -> HRS14R {
                HRS14R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - Hardware Request Status Channel 15"]
            #[inline(always)]
            pub fn hrs15(&self) -> HRS15R {
                HRS15R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
    }
    #[doc = "Enable Asynchronous Request in Stop Register"]
    pub struct EARS {
        register: VolatileCell<u32>,
    }
    #[doc = "Enable Asynchronous Request in Stop Register"]
    pub mod ears {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EARS {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `EDREQ_0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EDREQ_0R {
            #[doc = "Disable asynchronous DMA request for channel 0."]
            _0,
            #[doc = "Enable asynchronous DMA request for channel 0."]
            _1,
        }
        impl EDREQ_0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EDREQ_0R::_0 => false,
                    EDREQ_0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EDREQ_0R {
                match value {
                    false => EDREQ_0R::_0,
                    true => EDREQ_0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EDREQ_0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EDREQ_0R::_1
            }
        }
        #[doc = "Possible values of the field `EDREQ_1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EDREQ_1R {
            #[doc = "Disable asynchronous DMA request for channel 1"]
            _0,
            #[doc = "Enable asynchronous DMA request for channel 1."]
            _1,
        }
        impl EDREQ_1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EDREQ_1R::_0 => false,
                    EDREQ_1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EDREQ_1R {
                match value {
                    false => EDREQ_1R::_0,
                    true => EDREQ_1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EDREQ_1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EDREQ_1R::_1
            }
        }
        #[doc = "Possible values of the field `EDREQ_2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EDREQ_2R {
            #[doc = "Disable asynchronous DMA request for channel 2."]
            _0,
            #[doc = "Enable asynchronous DMA request for channel 2."]
            _1,
        }
        impl EDREQ_2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EDREQ_2R::_0 => false,
                    EDREQ_2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EDREQ_2R {
                match value {
                    false => EDREQ_2R::_0,
                    true => EDREQ_2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EDREQ_2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EDREQ_2R::_1
            }
        }
        #[doc = "Possible values of the field `EDREQ_3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EDREQ_3R {
            #[doc = "Disable asynchronous DMA request for channel 3."]
            _0,
            #[doc = "Enable asynchronous DMA request for channel 3."]
            _1,
        }
        impl EDREQ_3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EDREQ_3R::_0 => false,
                    EDREQ_3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EDREQ_3R {
                match value {
                    false => EDREQ_3R::_0,
                    true => EDREQ_3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EDREQ_3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EDREQ_3R::_1
            }
        }
        #[doc = "Possible values of the field `EDREQ_4`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EDREQ_4R {
            #[doc = "Disable asynchronous DMA request for channel 4."]
            _0,
            #[doc = "Enable asynchronous DMA request for channel 4."]
            _1,
        }
        impl EDREQ_4R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EDREQ_4R::_0 => false,
                    EDREQ_4R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EDREQ_4R {
                match value {
                    false => EDREQ_4R::_0,
                    true => EDREQ_4R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EDREQ_4R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EDREQ_4R::_1
            }
        }
        #[doc = "Possible values of the field `EDREQ_5`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EDREQ_5R {
            #[doc = "Disable asynchronous DMA request for channel 5."]
            _0,
            #[doc = "Enable asynchronous DMA request for channel 5."]
            _1,
        }
        impl EDREQ_5R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EDREQ_5R::_0 => false,
                    EDREQ_5R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EDREQ_5R {
                match value {
                    false => EDREQ_5R::_0,
                    true => EDREQ_5R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EDREQ_5R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EDREQ_5R::_1
            }
        }
        #[doc = "Possible values of the field `EDREQ_6`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EDREQ_6R {
            #[doc = "Disable asynchronous DMA request for channel 6."]
            _0,
            #[doc = "Enable asynchronous DMA request for channel 6."]
            _1,
        }
        impl EDREQ_6R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EDREQ_6R::_0 => false,
                    EDREQ_6R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EDREQ_6R {
                match value {
                    false => EDREQ_6R::_0,
                    true => EDREQ_6R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EDREQ_6R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EDREQ_6R::_1
            }
        }
        #[doc = "Possible values of the field `EDREQ_7`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EDREQ_7R {
            #[doc = "Disable asynchronous DMA request for channel 7."]
            _0,
            #[doc = "Enable asynchronous DMA request for channel 7."]
            _1,
        }
        impl EDREQ_7R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EDREQ_7R::_0 => false,
                    EDREQ_7R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EDREQ_7R {
                match value {
                    false => EDREQ_7R::_0,
                    true => EDREQ_7R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EDREQ_7R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EDREQ_7R::_1
            }
        }
        #[doc = "Possible values of the field `EDREQ_8`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EDREQ_8R {
            #[doc = "Disable asynchronous DMA request for channel 8."]
            _0,
            #[doc = "Enable asynchronous DMA request for channel 8."]
            _1,
        }
        impl EDREQ_8R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EDREQ_8R::_0 => false,
                    EDREQ_8R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EDREQ_8R {
                match value {
                    false => EDREQ_8R::_0,
                    true => EDREQ_8R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EDREQ_8R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EDREQ_8R::_1
            }
        }
        #[doc = "Possible values of the field `EDREQ_9`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EDREQ_9R {
            #[doc = "Disable asynchronous DMA request for channel 9."]
            _0,
            #[doc = "Enable asynchronous DMA request for channel 9."]
            _1,
        }
        impl EDREQ_9R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EDREQ_9R::_0 => false,
                    EDREQ_9R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EDREQ_9R {
                match value {
                    false => EDREQ_9R::_0,
                    true => EDREQ_9R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EDREQ_9R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EDREQ_9R::_1
            }
        }
        #[doc = "Possible values of the field `EDREQ_10`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EDREQ_10R {
            #[doc = "Disable asynchronous DMA request for channel 10."]
            _0,
            #[doc = "Enable asynchronous DMA request for channel 10."]
            _1,
        }
        impl EDREQ_10R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EDREQ_10R::_0 => false,
                    EDREQ_10R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EDREQ_10R {
                match value {
                    false => EDREQ_10R::_0,
                    true => EDREQ_10R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EDREQ_10R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EDREQ_10R::_1
            }
        }
        #[doc = "Possible values of the field `EDREQ_11`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EDREQ_11R {
            #[doc = "Disable asynchronous DMA request for channel 11."]
            _0,
            #[doc = "Enable asynchronous DMA request for channel 11."]
            _1,
        }
        impl EDREQ_11R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EDREQ_11R::_0 => false,
                    EDREQ_11R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EDREQ_11R {
                match value {
                    false => EDREQ_11R::_0,
                    true => EDREQ_11R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EDREQ_11R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EDREQ_11R::_1
            }
        }
        #[doc = "Possible values of the field `EDREQ_12`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EDREQ_12R {
            #[doc = "Disable asynchronous DMA request for channel 12."]
            _0,
            #[doc = "Enable asynchronous DMA request for channel 12."]
            _1,
        }
        impl EDREQ_12R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EDREQ_12R::_0 => false,
                    EDREQ_12R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EDREQ_12R {
                match value {
                    false => EDREQ_12R::_0,
                    true => EDREQ_12R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EDREQ_12R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EDREQ_12R::_1
            }
        }
        #[doc = "Possible values of the field `EDREQ_13`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EDREQ_13R {
            #[doc = "Disable asynchronous DMA request for channel 13."]
            _0,
            #[doc = "Enable asynchronous DMA request for channel 13."]
            _1,
        }
        impl EDREQ_13R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EDREQ_13R::_0 => false,
                    EDREQ_13R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EDREQ_13R {
                match value {
                    false => EDREQ_13R::_0,
                    true => EDREQ_13R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EDREQ_13R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EDREQ_13R::_1
            }
        }
        #[doc = "Possible values of the field `EDREQ_14`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EDREQ_14R {
            #[doc = "Disable asynchronous DMA request for channel 14."]
            _0,
            #[doc = "Enable asynchronous DMA request for channel 14."]
            _1,
        }
        impl EDREQ_14R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EDREQ_14R::_0 => false,
                    EDREQ_14R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EDREQ_14R {
                match value {
                    false => EDREQ_14R::_0,
                    true => EDREQ_14R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EDREQ_14R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EDREQ_14R::_1
            }
        }
        #[doc = "Possible values of the field `EDREQ_15`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EDREQ_15R {
            #[doc = "Disable asynchronous DMA request for channel 15."]
            _0,
            #[doc = "Enable asynchronous DMA request for channel 15."]
            _1,
        }
        impl EDREQ_15R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EDREQ_15R::_0 => false,
                    EDREQ_15R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EDREQ_15R {
                match value {
                    false => EDREQ_15R::_0,
                    true => EDREQ_15R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EDREQ_15R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EDREQ_15R::_1
            }
        }
        #[doc = "Values that can be written to the field `EDREQ_0`"]
        pub enum EDREQ_0W {
            #[doc = "Disable asynchronous DMA request for channel 0."]
            _0,
            #[doc = "Enable asynchronous DMA request for channel 0."]
            _1,
        }
        impl EDREQ_0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EDREQ_0W::_0 => false,
                    EDREQ_0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EDREQ_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _EDREQ_0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EDREQ_0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable asynchronous DMA request for channel 0."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EDREQ_0W::_0)
            }
            #[doc = "Enable asynchronous DMA request for channel 0."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EDREQ_0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `EDREQ_1`"]
        pub enum EDREQ_1W {
            #[doc = "Disable asynchronous DMA request for channel 1"]
            _0,
            #[doc = "Enable asynchronous DMA request for channel 1."]
            _1,
        }
        impl EDREQ_1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EDREQ_1W::_0 => false,
                    EDREQ_1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EDREQ_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _EDREQ_1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EDREQ_1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable asynchronous DMA request for channel 1"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EDREQ_1W::_0)
            }
            #[doc = "Enable asynchronous DMA request for channel 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EDREQ_1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `EDREQ_2`"]
        pub enum EDREQ_2W {
            #[doc = "Disable asynchronous DMA request for channel 2."]
            _0,
            #[doc = "Enable asynchronous DMA request for channel 2."]
            _1,
        }
        impl EDREQ_2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EDREQ_2W::_0 => false,
                    EDREQ_2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EDREQ_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _EDREQ_2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EDREQ_2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable asynchronous DMA request for channel 2."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EDREQ_2W::_0)
            }
            #[doc = "Enable asynchronous DMA request for channel 2."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EDREQ_2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `EDREQ_3`"]
        pub enum EDREQ_3W {
            #[doc = "Disable asynchronous DMA request for channel 3."]
            _0,
            #[doc = "Enable asynchronous DMA request for channel 3."]
            _1,
        }
        impl EDREQ_3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EDREQ_3W::_0 => false,
                    EDREQ_3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EDREQ_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _EDREQ_3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EDREQ_3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable asynchronous DMA request for channel 3."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EDREQ_3W::_0)
            }
            #[doc = "Enable asynchronous DMA request for channel 3."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EDREQ_3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `EDREQ_4`"]
        pub enum EDREQ_4W {
            #[doc = "Disable asynchronous DMA request for channel 4."]
            _0,
            #[doc = "Enable asynchronous DMA request for channel 4."]
            _1,
        }
        impl EDREQ_4W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EDREQ_4W::_0 => false,
                    EDREQ_4W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EDREQ_4W<'a> {
            w: &'a mut W,
        }
        impl<'a> _EDREQ_4W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EDREQ_4W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable asynchronous DMA request for channel 4."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EDREQ_4W::_0)
            }
            #[doc = "Enable asynchronous DMA request for channel 4."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EDREQ_4W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `EDREQ_5`"]
        pub enum EDREQ_5W {
            #[doc = "Disable asynchronous DMA request for channel 5."]
            _0,
            #[doc = "Enable asynchronous DMA request for channel 5."]
            _1,
        }
        impl EDREQ_5W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EDREQ_5W::_0 => false,
                    EDREQ_5W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EDREQ_5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _EDREQ_5W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EDREQ_5W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable asynchronous DMA request for channel 5."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EDREQ_5W::_0)
            }
            #[doc = "Enable asynchronous DMA request for channel 5."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EDREQ_5W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `EDREQ_6`"]
        pub enum EDREQ_6W {
            #[doc = "Disable asynchronous DMA request for channel 6."]
            _0,
            #[doc = "Enable asynchronous DMA request for channel 6."]
            _1,
        }
        impl EDREQ_6W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EDREQ_6W::_0 => false,
                    EDREQ_6W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EDREQ_6W<'a> {
            w: &'a mut W,
        }
        impl<'a> _EDREQ_6W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EDREQ_6W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable asynchronous DMA request for channel 6."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EDREQ_6W::_0)
            }
            #[doc = "Enable asynchronous DMA request for channel 6."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EDREQ_6W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `EDREQ_7`"]
        pub enum EDREQ_7W {
            #[doc = "Disable asynchronous DMA request for channel 7."]
            _0,
            #[doc = "Enable asynchronous DMA request for channel 7."]
            _1,
        }
        impl EDREQ_7W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EDREQ_7W::_0 => false,
                    EDREQ_7W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EDREQ_7W<'a> {
            w: &'a mut W,
        }
        impl<'a> _EDREQ_7W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EDREQ_7W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable asynchronous DMA request for channel 7."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EDREQ_7W::_0)
            }
            #[doc = "Enable asynchronous DMA request for channel 7."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EDREQ_7W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `EDREQ_8`"]
        pub enum EDREQ_8W {
            #[doc = "Disable asynchronous DMA request for channel 8."]
            _0,
            #[doc = "Enable asynchronous DMA request for channel 8."]
            _1,
        }
        impl EDREQ_8W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EDREQ_8W::_0 => false,
                    EDREQ_8W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EDREQ_8W<'a> {
            w: &'a mut W,
        }
        impl<'a> _EDREQ_8W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EDREQ_8W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable asynchronous DMA request for channel 8."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EDREQ_8W::_0)
            }
            #[doc = "Enable asynchronous DMA request for channel 8."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EDREQ_8W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `EDREQ_9`"]
        pub enum EDREQ_9W {
            #[doc = "Disable asynchronous DMA request for channel 9."]
            _0,
            #[doc = "Enable asynchronous DMA request for channel 9."]
            _1,
        }
        impl EDREQ_9W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EDREQ_9W::_0 => false,
                    EDREQ_9W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EDREQ_9W<'a> {
            w: &'a mut W,
        }
        impl<'a> _EDREQ_9W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EDREQ_9W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable asynchronous DMA request for channel 9."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EDREQ_9W::_0)
            }
            #[doc = "Enable asynchronous DMA request for channel 9."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EDREQ_9W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `EDREQ_10`"]
        pub enum EDREQ_10W {
            #[doc = "Disable asynchronous DMA request for channel 10."]
            _0,
            #[doc = "Enable asynchronous DMA request for channel 10."]
            _1,
        }
        impl EDREQ_10W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EDREQ_10W::_0 => false,
                    EDREQ_10W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EDREQ_10W<'a> {
            w: &'a mut W,
        }
        impl<'a> _EDREQ_10W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EDREQ_10W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable asynchronous DMA request for channel 10."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EDREQ_10W::_0)
            }
            #[doc = "Enable asynchronous DMA request for channel 10."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EDREQ_10W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `EDREQ_11`"]
        pub enum EDREQ_11W {
            #[doc = "Disable asynchronous DMA request for channel 11."]
            _0,
            #[doc = "Enable asynchronous DMA request for channel 11."]
            _1,
        }
        impl EDREQ_11W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EDREQ_11W::_0 => false,
                    EDREQ_11W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EDREQ_11W<'a> {
            w: &'a mut W,
        }
        impl<'a> _EDREQ_11W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EDREQ_11W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable asynchronous DMA request for channel 11."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EDREQ_11W::_0)
            }
            #[doc = "Enable asynchronous DMA request for channel 11."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EDREQ_11W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `EDREQ_12`"]
        pub enum EDREQ_12W {
            #[doc = "Disable asynchronous DMA request for channel 12."]
            _0,
            #[doc = "Enable asynchronous DMA request for channel 12."]
            _1,
        }
        impl EDREQ_12W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EDREQ_12W::_0 => false,
                    EDREQ_12W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EDREQ_12W<'a> {
            w: &'a mut W,
        }
        impl<'a> _EDREQ_12W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EDREQ_12W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable asynchronous DMA request for channel 12."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EDREQ_12W::_0)
            }
            #[doc = "Enable asynchronous DMA request for channel 12."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EDREQ_12W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `EDREQ_13`"]
        pub enum EDREQ_13W {
            #[doc = "Disable asynchronous DMA request for channel 13."]
            _0,
            #[doc = "Enable asynchronous DMA request for channel 13."]
            _1,
        }
        impl EDREQ_13W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EDREQ_13W::_0 => false,
                    EDREQ_13W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EDREQ_13W<'a> {
            w: &'a mut W,
        }
        impl<'a> _EDREQ_13W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EDREQ_13W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable asynchronous DMA request for channel 13."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EDREQ_13W::_0)
            }
            #[doc = "Enable asynchronous DMA request for channel 13."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EDREQ_13W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `EDREQ_14`"]
        pub enum EDREQ_14W {
            #[doc = "Disable asynchronous DMA request for channel 14."]
            _0,
            #[doc = "Enable asynchronous DMA request for channel 14."]
            _1,
        }
        impl EDREQ_14W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EDREQ_14W::_0 => false,
                    EDREQ_14W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EDREQ_14W<'a> {
            w: &'a mut W,
        }
        impl<'a> _EDREQ_14W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EDREQ_14W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable asynchronous DMA request for channel 14."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EDREQ_14W::_0)
            }
            #[doc = "Enable asynchronous DMA request for channel 14."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EDREQ_14W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `EDREQ_15`"]
        pub enum EDREQ_15W {
            #[doc = "Disable asynchronous DMA request for channel 15."]
            _0,
            #[doc = "Enable asynchronous DMA request for channel 15."]
            _1,
        }
        impl EDREQ_15W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EDREQ_15W::_0 => false,
                    EDREQ_15W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EDREQ_15W<'a> {
            w: &'a mut W,
        }
        impl<'a> _EDREQ_15W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EDREQ_15W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable asynchronous DMA request for channel 15."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EDREQ_15W::_0)
            }
            #[doc = "Enable asynchronous DMA request for channel 15."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EDREQ_15W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Enable asynchronous DMA request in stop mode for channel 0."]
            #[inline(always)]
            pub fn edreq_0(&self) -> EDREQ_0R {
                EDREQ_0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Enable asynchronous DMA request in stop mode for channel 1."]
            #[inline(always)]
            pub fn edreq_1(&self) -> EDREQ_1R {
                EDREQ_1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Enable asynchronous DMA request in stop mode for channel 2."]
            #[inline(always)]
            pub fn edreq_2(&self) -> EDREQ_2R {
                EDREQ_2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Enable asynchronous DMA request in stop mode for channel 3."]
            #[inline(always)]
            pub fn edreq_3(&self) -> EDREQ_3R {
                EDREQ_3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Enable asynchronous DMA request in stop mode for channel 4"]
            #[inline(always)]
            pub fn edreq_4(&self) -> EDREQ_4R {
                EDREQ_4R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Enable asynchronous DMA request in stop mode for channel 5"]
            #[inline(always)]
            pub fn edreq_5(&self) -> EDREQ_5R {
                EDREQ_5R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Enable asynchronous DMA request in stop mode for channel 6"]
            #[inline(always)]
            pub fn edreq_6(&self) -> EDREQ_6R {
                EDREQ_6R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Enable asynchronous DMA request in stop mode for channel 7"]
            #[inline(always)]
            pub fn edreq_7(&self) -> EDREQ_7R {
                EDREQ_7R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Enable asynchronous DMA request in stop mode for channel 8"]
            #[inline(always)]
            pub fn edreq_8(&self) -> EDREQ_8R {
                EDREQ_8R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Enable asynchronous DMA request in stop mode for channel 9"]
            #[inline(always)]
            pub fn edreq_9(&self) -> EDREQ_9R {
                EDREQ_9R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Enable asynchronous DMA request in stop mode for channel 10"]
            #[inline(always)]
            pub fn edreq_10(&self) -> EDREQ_10R {
                EDREQ_10R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 11 - Enable asynchronous DMA request in stop mode for channel 11"]
            #[inline(always)]
            pub fn edreq_11(&self) -> EDREQ_11R {
                EDREQ_11R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Enable asynchronous DMA request in stop mode for channel 12"]
            #[inline(always)]
            pub fn edreq_12(&self) -> EDREQ_12R {
                EDREQ_12R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Enable asynchronous DMA request in stop mode for channel 13"]
            #[inline(always)]
            pub fn edreq_13(&self) -> EDREQ_13R {
                EDREQ_13R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - Enable asynchronous DMA request in stop mode for channel 14"]
            #[inline(always)]
            pub fn edreq_14(&self) -> EDREQ_14R {
                EDREQ_14R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - Enable asynchronous DMA request in stop mode for channel 15"]
            #[inline(always)]
            pub fn edreq_15(&self) -> EDREQ_15R {
                EDREQ_15R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Enable asynchronous DMA request in stop mode for channel 0."]
            #[inline(always)]
            pub fn edreq_0(&mut self) -> _EDREQ_0W {
                _EDREQ_0W { w: self }
            }
            #[doc = "Bit 1 - Enable asynchronous DMA request in stop mode for channel 1."]
            #[inline(always)]
            pub fn edreq_1(&mut self) -> _EDREQ_1W {
                _EDREQ_1W { w: self }
            }
            #[doc = "Bit 2 - Enable asynchronous DMA request in stop mode for channel 2."]
            #[inline(always)]
            pub fn edreq_2(&mut self) -> _EDREQ_2W {
                _EDREQ_2W { w: self }
            }
            #[doc = "Bit 3 - Enable asynchronous DMA request in stop mode for channel 3."]
            #[inline(always)]
            pub fn edreq_3(&mut self) -> _EDREQ_3W {
                _EDREQ_3W { w: self }
            }
            #[doc = "Bit 4 - Enable asynchronous DMA request in stop mode for channel 4"]
            #[inline(always)]
            pub fn edreq_4(&mut self) -> _EDREQ_4W {
                _EDREQ_4W { w: self }
            }
            #[doc = "Bit 5 - Enable asynchronous DMA request in stop mode for channel 5"]
            #[inline(always)]
            pub fn edreq_5(&mut self) -> _EDREQ_5W {
                _EDREQ_5W { w: self }
            }
            #[doc = "Bit 6 - Enable asynchronous DMA request in stop mode for channel 6"]
            #[inline(always)]
            pub fn edreq_6(&mut self) -> _EDREQ_6W {
                _EDREQ_6W { w: self }
            }
            #[doc = "Bit 7 - Enable asynchronous DMA request in stop mode for channel 7"]
            #[inline(always)]
            pub fn edreq_7(&mut self) -> _EDREQ_7W {
                _EDREQ_7W { w: self }
            }
            #[doc = "Bit 8 - Enable asynchronous DMA request in stop mode for channel 8"]
            #[inline(always)]
            pub fn edreq_8(&mut self) -> _EDREQ_8W {
                _EDREQ_8W { w: self }
            }
            #[doc = "Bit 9 - Enable asynchronous DMA request in stop mode for channel 9"]
            #[inline(always)]
            pub fn edreq_9(&mut self) -> _EDREQ_9W {
                _EDREQ_9W { w: self }
            }
            #[doc = "Bit 10 - Enable asynchronous DMA request in stop mode for channel 10"]
            #[inline(always)]
            pub fn edreq_10(&mut self) -> _EDREQ_10W {
                _EDREQ_10W { w: self }
            }
            #[doc = "Bit 11 - Enable asynchronous DMA request in stop mode for channel 11"]
            #[inline(always)]
            pub fn edreq_11(&mut self) -> _EDREQ_11W {
                _EDREQ_11W { w: self }
            }
            #[doc = "Bit 12 - Enable asynchronous DMA request in stop mode for channel 12"]
            #[inline(always)]
            pub fn edreq_12(&mut self) -> _EDREQ_12W {
                _EDREQ_12W { w: self }
            }
            #[doc = "Bit 13 - Enable asynchronous DMA request in stop mode for channel 13"]
            #[inline(always)]
            pub fn edreq_13(&mut self) -> _EDREQ_13W {
                _EDREQ_13W { w: self }
            }
            #[doc = "Bit 14 - Enable asynchronous DMA request in stop mode for channel 14"]
            #[inline(always)]
            pub fn edreq_14(&mut self) -> _EDREQ_14W {
                _EDREQ_14W { w: self }
            }
            #[doc = "Bit 15 - Enable asynchronous DMA request in stop mode for channel 15"]
            #[inline(always)]
            pub fn edreq_15(&mut self) -> _EDREQ_15W {
                _EDREQ_15W { w: self }
            }
        }
    }
    #[doc = "Channel n Priority Register"]
    pub struct DCHPRI3 {
        register: VolatileCell<u8>,
    }
    #[doc = "Channel n Priority Register"]
    pub mod dchpri3 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::DCHPRI3 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CHPRIR {
            bits: u8,
        }
        impl CHPRIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DPA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DPAR {
            #[doc = "Channel n can suspend a lower priority channel."]
            _0,
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            _1,
        }
        impl DPAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DPAR::_0 => false,
                    DPAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DPAR {
                match value {
                    false => DPAR::_0,
                    true => DPAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DPAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DPAR::_1
            }
        }
        #[doc = "Possible values of the field `ECP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ECPR {
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            _0,
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            _1,
        }
        impl ECPR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ECPR::_0 => false,
                    ECPR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ECPR {
                match value {
                    false => ECPR::_0,
                    true => ECPR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ECPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ECPR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHPRIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHPRIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DPA`"]
        pub enum DPAW {
            #[doc = "Channel n can suspend a lower priority channel."]
            _0,
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            _1,
        }
        impl DPAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DPAW::_0 => false,
                    DPAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DPAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DPAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DPAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel n can suspend a lower priority channel."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DPAW::_0)
            }
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DPAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ECP`"]
        pub enum ECPW {
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            _0,
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            _1,
        }
        impl ECPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ECPW::_0 => false,
                    ECPW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ECPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ECPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ECPW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ECPW::_0)
            }
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ECPW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:3 - Channel n Arbitration Priority"]
            #[inline(always)]
            pub fn chpri(&self) -> CHPRIR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                CHPRIR { bits }
            }
            #[doc = "Bit 6 - Disable Preempt Ability. This field resets to 0."]
            #[inline(always)]
            pub fn dpa(&self) -> DPAR {
                DPAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 7 - Enable Channel Preemption. This field resets to 0."]
            #[inline(always)]
            pub fn ecp(&self) -> ECPR {
                ECPR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 3 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Channel n Arbitration Priority"]
            #[inline(always)]
            pub fn chpri(&mut self) -> _CHPRIW {
                _CHPRIW { w: self }
            }
            #[doc = "Bit 6 - Disable Preempt Ability. This field resets to 0."]
            #[inline(always)]
            pub fn dpa(&mut self) -> _DPAW {
                _DPAW { w: self }
            }
            #[doc = "Bit 7 - Enable Channel Preemption. This field resets to 0."]
            #[inline(always)]
            pub fn ecp(&mut self) -> _ECPW {
                _ECPW { w: self }
            }
        }
    }
    #[doc = "Channel n Priority Register"]
    pub struct DCHPRI2 {
        register: VolatileCell<u8>,
    }
    #[doc = "Channel n Priority Register"]
    pub mod dchpri2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::DCHPRI2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CHPRIR {
            bits: u8,
        }
        impl CHPRIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DPA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DPAR {
            #[doc = "Channel n can suspend a lower priority channel."]
            _0,
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            _1,
        }
        impl DPAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DPAR::_0 => false,
                    DPAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DPAR {
                match value {
                    false => DPAR::_0,
                    true => DPAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DPAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DPAR::_1
            }
        }
        #[doc = "Possible values of the field `ECP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ECPR {
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            _0,
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            _1,
        }
        impl ECPR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ECPR::_0 => false,
                    ECPR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ECPR {
                match value {
                    false => ECPR::_0,
                    true => ECPR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ECPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ECPR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHPRIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHPRIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DPA`"]
        pub enum DPAW {
            #[doc = "Channel n can suspend a lower priority channel."]
            _0,
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            _1,
        }
        impl DPAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DPAW::_0 => false,
                    DPAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DPAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DPAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DPAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel n can suspend a lower priority channel."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DPAW::_0)
            }
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DPAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ECP`"]
        pub enum ECPW {
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            _0,
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            _1,
        }
        impl ECPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ECPW::_0 => false,
                    ECPW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ECPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ECPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ECPW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ECPW::_0)
            }
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ECPW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:3 - Channel n Arbitration Priority"]
            #[inline(always)]
            pub fn chpri(&self) -> CHPRIR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                CHPRIR { bits }
            }
            #[doc = "Bit 6 - Disable Preempt Ability. This field resets to 0."]
            #[inline(always)]
            pub fn dpa(&self) -> DPAR {
                DPAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 7 - Enable Channel Preemption. This field resets to 0."]
            #[inline(always)]
            pub fn ecp(&self) -> ECPR {
                ECPR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 2 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Channel n Arbitration Priority"]
            #[inline(always)]
            pub fn chpri(&mut self) -> _CHPRIW {
                _CHPRIW { w: self }
            }
            #[doc = "Bit 6 - Disable Preempt Ability. This field resets to 0."]
            #[inline(always)]
            pub fn dpa(&mut self) -> _DPAW {
                _DPAW { w: self }
            }
            #[doc = "Bit 7 - Enable Channel Preemption. This field resets to 0."]
            #[inline(always)]
            pub fn ecp(&mut self) -> _ECPW {
                _ECPW { w: self }
            }
        }
    }
    #[doc = "Channel n Priority Register"]
    pub struct DCHPRI1 {
        register: VolatileCell<u8>,
    }
    #[doc = "Channel n Priority Register"]
    pub mod dchpri1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::DCHPRI1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CHPRIR {
            bits: u8,
        }
        impl CHPRIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DPA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DPAR {
            #[doc = "Channel n can suspend a lower priority channel."]
            _0,
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            _1,
        }
        impl DPAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DPAR::_0 => false,
                    DPAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DPAR {
                match value {
                    false => DPAR::_0,
                    true => DPAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DPAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DPAR::_1
            }
        }
        #[doc = "Possible values of the field `ECP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ECPR {
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            _0,
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            _1,
        }
        impl ECPR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ECPR::_0 => false,
                    ECPR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ECPR {
                match value {
                    false => ECPR::_0,
                    true => ECPR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ECPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ECPR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHPRIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHPRIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DPA`"]
        pub enum DPAW {
            #[doc = "Channel n can suspend a lower priority channel."]
            _0,
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            _1,
        }
        impl DPAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DPAW::_0 => false,
                    DPAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DPAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DPAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DPAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel n can suspend a lower priority channel."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DPAW::_0)
            }
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DPAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ECP`"]
        pub enum ECPW {
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            _0,
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            _1,
        }
        impl ECPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ECPW::_0 => false,
                    ECPW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ECPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ECPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ECPW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ECPW::_0)
            }
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ECPW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:3 - Channel n Arbitration Priority"]
            #[inline(always)]
            pub fn chpri(&self) -> CHPRIR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                CHPRIR { bits }
            }
            #[doc = "Bit 6 - Disable Preempt Ability. This field resets to 0."]
            #[inline(always)]
            pub fn dpa(&self) -> DPAR {
                DPAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 7 - Enable Channel Preemption. This field resets to 0."]
            #[inline(always)]
            pub fn ecp(&self) -> ECPR {
                ECPR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 1 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Channel n Arbitration Priority"]
            #[inline(always)]
            pub fn chpri(&mut self) -> _CHPRIW {
                _CHPRIW { w: self }
            }
            #[doc = "Bit 6 - Disable Preempt Ability. This field resets to 0."]
            #[inline(always)]
            pub fn dpa(&mut self) -> _DPAW {
                _DPAW { w: self }
            }
            #[doc = "Bit 7 - Enable Channel Preemption. This field resets to 0."]
            #[inline(always)]
            pub fn ecp(&mut self) -> _ECPW {
                _ECPW { w: self }
            }
        }
    }
    #[doc = "Channel n Priority Register"]
    pub struct DCHPRI0 {
        register: VolatileCell<u8>,
    }
    #[doc = "Channel n Priority Register"]
    pub mod dchpri0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::DCHPRI0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CHPRIR {
            bits: u8,
        }
        impl CHPRIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DPA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DPAR {
            #[doc = "Channel n can suspend a lower priority channel."]
            _0,
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            _1,
        }
        impl DPAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DPAR::_0 => false,
                    DPAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DPAR {
                match value {
                    false => DPAR::_0,
                    true => DPAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DPAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DPAR::_1
            }
        }
        #[doc = "Possible values of the field `ECP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ECPR {
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            _0,
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            _1,
        }
        impl ECPR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ECPR::_0 => false,
                    ECPR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ECPR {
                match value {
                    false => ECPR::_0,
                    true => ECPR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ECPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ECPR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHPRIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHPRIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DPA`"]
        pub enum DPAW {
            #[doc = "Channel n can suspend a lower priority channel."]
            _0,
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            _1,
        }
        impl DPAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DPAW::_0 => false,
                    DPAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DPAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DPAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DPAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel n can suspend a lower priority channel."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DPAW::_0)
            }
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DPAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ECP`"]
        pub enum ECPW {
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            _0,
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            _1,
        }
        impl ECPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ECPW::_0 => false,
                    ECPW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ECPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ECPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ECPW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ECPW::_0)
            }
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ECPW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:3 - Channel n Arbitration Priority"]
            #[inline(always)]
            pub fn chpri(&self) -> CHPRIR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                CHPRIR { bits }
            }
            #[doc = "Bit 6 - Disable Preempt Ability. This field resets to 0."]
            #[inline(always)]
            pub fn dpa(&self) -> DPAR {
                DPAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 7 - Enable Channel Preemption. This field resets to 0."]
            #[inline(always)]
            pub fn ecp(&self) -> ECPR {
                ECPR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Channel n Arbitration Priority"]
            #[inline(always)]
            pub fn chpri(&mut self) -> _CHPRIW {
                _CHPRIW { w: self }
            }
            #[doc = "Bit 6 - Disable Preempt Ability. This field resets to 0."]
            #[inline(always)]
            pub fn dpa(&mut self) -> _DPAW {
                _DPAW { w: self }
            }
            #[doc = "Bit 7 - Enable Channel Preemption. This field resets to 0."]
            #[inline(always)]
            pub fn ecp(&mut self) -> _ECPW {
                _ECPW { w: self }
            }
        }
    }
    #[doc = "Channel n Priority Register"]
    pub struct DCHPRI7 {
        register: VolatileCell<u8>,
    }
    #[doc = "Channel n Priority Register"]
    pub mod dchpri7 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::DCHPRI7 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CHPRIR {
            bits: u8,
        }
        impl CHPRIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DPA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DPAR {
            #[doc = "Channel n can suspend a lower priority channel."]
            _0,
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            _1,
        }
        impl DPAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DPAR::_0 => false,
                    DPAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DPAR {
                match value {
                    false => DPAR::_0,
                    true => DPAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DPAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DPAR::_1
            }
        }
        #[doc = "Possible values of the field `ECP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ECPR {
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            _0,
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            _1,
        }
        impl ECPR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ECPR::_0 => false,
                    ECPR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ECPR {
                match value {
                    false => ECPR::_0,
                    true => ECPR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ECPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ECPR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHPRIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHPRIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DPA`"]
        pub enum DPAW {
            #[doc = "Channel n can suspend a lower priority channel."]
            _0,
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            _1,
        }
        impl DPAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DPAW::_0 => false,
                    DPAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DPAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DPAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DPAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel n can suspend a lower priority channel."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DPAW::_0)
            }
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DPAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ECP`"]
        pub enum ECPW {
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            _0,
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            _1,
        }
        impl ECPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ECPW::_0 => false,
                    ECPW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ECPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ECPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ECPW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ECPW::_0)
            }
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ECPW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:3 - Channel n Arbitration Priority"]
            #[inline(always)]
            pub fn chpri(&self) -> CHPRIR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                CHPRIR { bits }
            }
            #[doc = "Bit 6 - Disable Preempt Ability. This field resets to 0."]
            #[inline(always)]
            pub fn dpa(&self) -> DPAR {
                DPAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 7 - Enable Channel Preemption. This field resets to 0."]
            #[inline(always)]
            pub fn ecp(&self) -> ECPR {
                ECPR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 7 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Channel n Arbitration Priority"]
            #[inline(always)]
            pub fn chpri(&mut self) -> _CHPRIW {
                _CHPRIW { w: self }
            }
            #[doc = "Bit 6 - Disable Preempt Ability. This field resets to 0."]
            #[inline(always)]
            pub fn dpa(&mut self) -> _DPAW {
                _DPAW { w: self }
            }
            #[doc = "Bit 7 - Enable Channel Preemption. This field resets to 0."]
            #[inline(always)]
            pub fn ecp(&mut self) -> _ECPW {
                _ECPW { w: self }
            }
        }
    }
    #[doc = "Channel n Priority Register"]
    pub struct DCHPRI6 {
        register: VolatileCell<u8>,
    }
    #[doc = "Channel n Priority Register"]
    pub mod dchpri6 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::DCHPRI6 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CHPRIR {
            bits: u8,
        }
        impl CHPRIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DPA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DPAR {
            #[doc = "Channel n can suspend a lower priority channel."]
            _0,
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            _1,
        }
        impl DPAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DPAR::_0 => false,
                    DPAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DPAR {
                match value {
                    false => DPAR::_0,
                    true => DPAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DPAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DPAR::_1
            }
        }
        #[doc = "Possible values of the field `ECP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ECPR {
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            _0,
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            _1,
        }
        impl ECPR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ECPR::_0 => false,
                    ECPR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ECPR {
                match value {
                    false => ECPR::_0,
                    true => ECPR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ECPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ECPR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHPRIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHPRIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DPA`"]
        pub enum DPAW {
            #[doc = "Channel n can suspend a lower priority channel."]
            _0,
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            _1,
        }
        impl DPAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DPAW::_0 => false,
                    DPAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DPAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DPAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DPAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel n can suspend a lower priority channel."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DPAW::_0)
            }
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DPAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ECP`"]
        pub enum ECPW {
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            _0,
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            _1,
        }
        impl ECPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ECPW::_0 => false,
                    ECPW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ECPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ECPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ECPW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ECPW::_0)
            }
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ECPW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:3 - Channel n Arbitration Priority"]
            #[inline(always)]
            pub fn chpri(&self) -> CHPRIR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                CHPRIR { bits }
            }
            #[doc = "Bit 6 - Disable Preempt Ability. This field resets to 0."]
            #[inline(always)]
            pub fn dpa(&self) -> DPAR {
                DPAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 7 - Enable Channel Preemption. This field resets to 0."]
            #[inline(always)]
            pub fn ecp(&self) -> ECPR {
                ECPR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 6 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Channel n Arbitration Priority"]
            #[inline(always)]
            pub fn chpri(&mut self) -> _CHPRIW {
                _CHPRIW { w: self }
            }
            #[doc = "Bit 6 - Disable Preempt Ability. This field resets to 0."]
            #[inline(always)]
            pub fn dpa(&mut self) -> _DPAW {
                _DPAW { w: self }
            }
            #[doc = "Bit 7 - Enable Channel Preemption. This field resets to 0."]
            #[inline(always)]
            pub fn ecp(&mut self) -> _ECPW {
                _ECPW { w: self }
            }
        }
    }
    #[doc = "Channel n Priority Register"]
    pub struct DCHPRI5 {
        register: VolatileCell<u8>,
    }
    #[doc = "Channel n Priority Register"]
    pub mod dchpri5 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::DCHPRI5 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CHPRIR {
            bits: u8,
        }
        impl CHPRIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DPA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DPAR {
            #[doc = "Channel n can suspend a lower priority channel."]
            _0,
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            _1,
        }
        impl DPAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DPAR::_0 => false,
                    DPAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DPAR {
                match value {
                    false => DPAR::_0,
                    true => DPAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DPAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DPAR::_1
            }
        }
        #[doc = "Possible values of the field `ECP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ECPR {
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            _0,
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            _1,
        }
        impl ECPR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ECPR::_0 => false,
                    ECPR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ECPR {
                match value {
                    false => ECPR::_0,
                    true => ECPR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ECPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ECPR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHPRIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHPRIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DPA`"]
        pub enum DPAW {
            #[doc = "Channel n can suspend a lower priority channel."]
            _0,
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            _1,
        }
        impl DPAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DPAW::_0 => false,
                    DPAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DPAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DPAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DPAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel n can suspend a lower priority channel."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DPAW::_0)
            }
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DPAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ECP`"]
        pub enum ECPW {
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            _0,
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            _1,
        }
        impl ECPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ECPW::_0 => false,
                    ECPW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ECPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ECPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ECPW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ECPW::_0)
            }
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ECPW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:3 - Channel n Arbitration Priority"]
            #[inline(always)]
            pub fn chpri(&self) -> CHPRIR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                CHPRIR { bits }
            }
            #[doc = "Bit 6 - Disable Preempt Ability. This field resets to 0."]
            #[inline(always)]
            pub fn dpa(&self) -> DPAR {
                DPAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 7 - Enable Channel Preemption. This field resets to 0."]
            #[inline(always)]
            pub fn ecp(&self) -> ECPR {
                ECPR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 5 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Channel n Arbitration Priority"]
            #[inline(always)]
            pub fn chpri(&mut self) -> _CHPRIW {
                _CHPRIW { w: self }
            }
            #[doc = "Bit 6 - Disable Preempt Ability. This field resets to 0."]
            #[inline(always)]
            pub fn dpa(&mut self) -> _DPAW {
                _DPAW { w: self }
            }
            #[doc = "Bit 7 - Enable Channel Preemption. This field resets to 0."]
            #[inline(always)]
            pub fn ecp(&mut self) -> _ECPW {
                _ECPW { w: self }
            }
        }
    }
    #[doc = "Channel n Priority Register"]
    pub struct DCHPRI4 {
        register: VolatileCell<u8>,
    }
    #[doc = "Channel n Priority Register"]
    pub mod dchpri4 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::DCHPRI4 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CHPRIR {
            bits: u8,
        }
        impl CHPRIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DPA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DPAR {
            #[doc = "Channel n can suspend a lower priority channel."]
            _0,
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            _1,
        }
        impl DPAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DPAR::_0 => false,
                    DPAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DPAR {
                match value {
                    false => DPAR::_0,
                    true => DPAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DPAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DPAR::_1
            }
        }
        #[doc = "Possible values of the field `ECP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ECPR {
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            _0,
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            _1,
        }
        impl ECPR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ECPR::_0 => false,
                    ECPR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ECPR {
                match value {
                    false => ECPR::_0,
                    true => ECPR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ECPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ECPR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHPRIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHPRIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DPA`"]
        pub enum DPAW {
            #[doc = "Channel n can suspend a lower priority channel."]
            _0,
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            _1,
        }
        impl DPAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DPAW::_0 => false,
                    DPAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DPAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DPAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DPAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel n can suspend a lower priority channel."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DPAW::_0)
            }
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DPAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ECP`"]
        pub enum ECPW {
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            _0,
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            _1,
        }
        impl ECPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ECPW::_0 => false,
                    ECPW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ECPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ECPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ECPW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ECPW::_0)
            }
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ECPW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:3 - Channel n Arbitration Priority"]
            #[inline(always)]
            pub fn chpri(&self) -> CHPRIR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                CHPRIR { bits }
            }
            #[doc = "Bit 6 - Disable Preempt Ability. This field resets to 0."]
            #[inline(always)]
            pub fn dpa(&self) -> DPAR {
                DPAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 7 - Enable Channel Preemption. This field resets to 0."]
            #[inline(always)]
            pub fn ecp(&self) -> ECPR {
                ECPR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 4 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Channel n Arbitration Priority"]
            #[inline(always)]
            pub fn chpri(&mut self) -> _CHPRIW {
                _CHPRIW { w: self }
            }
            #[doc = "Bit 6 - Disable Preempt Ability. This field resets to 0."]
            #[inline(always)]
            pub fn dpa(&mut self) -> _DPAW {
                _DPAW { w: self }
            }
            #[doc = "Bit 7 - Enable Channel Preemption. This field resets to 0."]
            #[inline(always)]
            pub fn ecp(&mut self) -> _ECPW {
                _ECPW { w: self }
            }
        }
    }
    #[doc = "Channel n Priority Register"]
    pub struct DCHPRI11 {
        register: VolatileCell<u8>,
    }
    #[doc = "Channel n Priority Register"]
    pub mod dchpri11 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::DCHPRI11 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CHPRIR {
            bits: u8,
        }
        impl CHPRIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DPA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DPAR {
            #[doc = "Channel n can suspend a lower priority channel."]
            _0,
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            _1,
        }
        impl DPAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DPAR::_0 => false,
                    DPAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DPAR {
                match value {
                    false => DPAR::_0,
                    true => DPAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DPAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DPAR::_1
            }
        }
        #[doc = "Possible values of the field `ECP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ECPR {
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            _0,
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            _1,
        }
        impl ECPR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ECPR::_0 => false,
                    ECPR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ECPR {
                match value {
                    false => ECPR::_0,
                    true => ECPR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ECPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ECPR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHPRIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHPRIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DPA`"]
        pub enum DPAW {
            #[doc = "Channel n can suspend a lower priority channel."]
            _0,
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            _1,
        }
        impl DPAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DPAW::_0 => false,
                    DPAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DPAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DPAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DPAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel n can suspend a lower priority channel."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DPAW::_0)
            }
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DPAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ECP`"]
        pub enum ECPW {
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            _0,
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            _1,
        }
        impl ECPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ECPW::_0 => false,
                    ECPW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ECPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ECPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ECPW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ECPW::_0)
            }
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ECPW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:3 - Channel n Arbitration Priority"]
            #[inline(always)]
            pub fn chpri(&self) -> CHPRIR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                CHPRIR { bits }
            }
            #[doc = "Bit 6 - Disable Preempt Ability. This field resets to 0."]
            #[inline(always)]
            pub fn dpa(&self) -> DPAR {
                DPAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 7 - Enable Channel Preemption. This field resets to 0."]
            #[inline(always)]
            pub fn ecp(&self) -> ECPR {
                ECPR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 11 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Channel n Arbitration Priority"]
            #[inline(always)]
            pub fn chpri(&mut self) -> _CHPRIW {
                _CHPRIW { w: self }
            }
            #[doc = "Bit 6 - Disable Preempt Ability. This field resets to 0."]
            #[inline(always)]
            pub fn dpa(&mut self) -> _DPAW {
                _DPAW { w: self }
            }
            #[doc = "Bit 7 - Enable Channel Preemption. This field resets to 0."]
            #[inline(always)]
            pub fn ecp(&mut self) -> _ECPW {
                _ECPW { w: self }
            }
        }
    }
    #[doc = "Channel n Priority Register"]
    pub struct DCHPRI10 {
        register: VolatileCell<u8>,
    }
    #[doc = "Channel n Priority Register"]
    pub mod dchpri10 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::DCHPRI10 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CHPRIR {
            bits: u8,
        }
        impl CHPRIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DPA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DPAR {
            #[doc = "Channel n can suspend a lower priority channel."]
            _0,
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            _1,
        }
        impl DPAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DPAR::_0 => false,
                    DPAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DPAR {
                match value {
                    false => DPAR::_0,
                    true => DPAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DPAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DPAR::_1
            }
        }
        #[doc = "Possible values of the field `ECP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ECPR {
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            _0,
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            _1,
        }
        impl ECPR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ECPR::_0 => false,
                    ECPR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ECPR {
                match value {
                    false => ECPR::_0,
                    true => ECPR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ECPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ECPR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHPRIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHPRIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DPA`"]
        pub enum DPAW {
            #[doc = "Channel n can suspend a lower priority channel."]
            _0,
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            _1,
        }
        impl DPAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DPAW::_0 => false,
                    DPAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DPAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DPAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DPAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel n can suspend a lower priority channel."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DPAW::_0)
            }
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DPAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ECP`"]
        pub enum ECPW {
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            _0,
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            _1,
        }
        impl ECPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ECPW::_0 => false,
                    ECPW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ECPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ECPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ECPW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ECPW::_0)
            }
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ECPW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:3 - Channel n Arbitration Priority"]
            #[inline(always)]
            pub fn chpri(&self) -> CHPRIR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                CHPRIR { bits }
            }
            #[doc = "Bit 6 - Disable Preempt Ability. This field resets to 0."]
            #[inline(always)]
            pub fn dpa(&self) -> DPAR {
                DPAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 7 - Enable Channel Preemption. This field resets to 0."]
            #[inline(always)]
            pub fn ecp(&self) -> ECPR {
                ECPR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 10 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Channel n Arbitration Priority"]
            #[inline(always)]
            pub fn chpri(&mut self) -> _CHPRIW {
                _CHPRIW { w: self }
            }
            #[doc = "Bit 6 - Disable Preempt Ability. This field resets to 0."]
            #[inline(always)]
            pub fn dpa(&mut self) -> _DPAW {
                _DPAW { w: self }
            }
            #[doc = "Bit 7 - Enable Channel Preemption. This field resets to 0."]
            #[inline(always)]
            pub fn ecp(&mut self) -> _ECPW {
                _ECPW { w: self }
            }
        }
    }
    #[doc = "Channel n Priority Register"]
    pub struct DCHPRI9 {
        register: VolatileCell<u8>,
    }
    #[doc = "Channel n Priority Register"]
    pub mod dchpri9 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::DCHPRI9 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CHPRIR {
            bits: u8,
        }
        impl CHPRIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DPA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DPAR {
            #[doc = "Channel n can suspend a lower priority channel."]
            _0,
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            _1,
        }
        impl DPAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DPAR::_0 => false,
                    DPAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DPAR {
                match value {
                    false => DPAR::_0,
                    true => DPAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DPAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DPAR::_1
            }
        }
        #[doc = "Possible values of the field `ECP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ECPR {
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            _0,
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            _1,
        }
        impl ECPR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ECPR::_0 => false,
                    ECPR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ECPR {
                match value {
                    false => ECPR::_0,
                    true => ECPR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ECPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ECPR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHPRIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHPRIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DPA`"]
        pub enum DPAW {
            #[doc = "Channel n can suspend a lower priority channel."]
            _0,
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            _1,
        }
        impl DPAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DPAW::_0 => false,
                    DPAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DPAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DPAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DPAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel n can suspend a lower priority channel."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DPAW::_0)
            }
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DPAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ECP`"]
        pub enum ECPW {
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            _0,
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            _1,
        }
        impl ECPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ECPW::_0 => false,
                    ECPW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ECPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ECPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ECPW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ECPW::_0)
            }
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ECPW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:3 - Channel n Arbitration Priority"]
            #[inline(always)]
            pub fn chpri(&self) -> CHPRIR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                CHPRIR { bits }
            }
            #[doc = "Bit 6 - Disable Preempt Ability. This field resets to 0."]
            #[inline(always)]
            pub fn dpa(&self) -> DPAR {
                DPAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 7 - Enable Channel Preemption. This field resets to 0."]
            #[inline(always)]
            pub fn ecp(&self) -> ECPR {
                ECPR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 9 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Channel n Arbitration Priority"]
            #[inline(always)]
            pub fn chpri(&mut self) -> _CHPRIW {
                _CHPRIW { w: self }
            }
            #[doc = "Bit 6 - Disable Preempt Ability. This field resets to 0."]
            #[inline(always)]
            pub fn dpa(&mut self) -> _DPAW {
                _DPAW { w: self }
            }
            #[doc = "Bit 7 - Enable Channel Preemption. This field resets to 0."]
            #[inline(always)]
            pub fn ecp(&mut self) -> _ECPW {
                _ECPW { w: self }
            }
        }
    }
    #[doc = "Channel n Priority Register"]
    pub struct DCHPRI8 {
        register: VolatileCell<u8>,
    }
    #[doc = "Channel n Priority Register"]
    pub mod dchpri8 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::DCHPRI8 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CHPRIR {
            bits: u8,
        }
        impl CHPRIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DPA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DPAR {
            #[doc = "Channel n can suspend a lower priority channel."]
            _0,
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            _1,
        }
        impl DPAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DPAR::_0 => false,
                    DPAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DPAR {
                match value {
                    false => DPAR::_0,
                    true => DPAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DPAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DPAR::_1
            }
        }
        #[doc = "Possible values of the field `ECP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ECPR {
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            _0,
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            _1,
        }
        impl ECPR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ECPR::_0 => false,
                    ECPR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ECPR {
                match value {
                    false => ECPR::_0,
                    true => ECPR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ECPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ECPR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHPRIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHPRIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DPA`"]
        pub enum DPAW {
            #[doc = "Channel n can suspend a lower priority channel."]
            _0,
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            _1,
        }
        impl DPAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DPAW::_0 => false,
                    DPAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DPAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DPAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DPAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel n can suspend a lower priority channel."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DPAW::_0)
            }
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DPAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ECP`"]
        pub enum ECPW {
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            _0,
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            _1,
        }
        impl ECPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ECPW::_0 => false,
                    ECPW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ECPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ECPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ECPW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ECPW::_0)
            }
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ECPW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:3 - Channel n Arbitration Priority"]
            #[inline(always)]
            pub fn chpri(&self) -> CHPRIR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                CHPRIR { bits }
            }
            #[doc = "Bit 6 - Disable Preempt Ability. This field resets to 0."]
            #[inline(always)]
            pub fn dpa(&self) -> DPAR {
                DPAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 7 - Enable Channel Preemption. This field resets to 0."]
            #[inline(always)]
            pub fn ecp(&self) -> ECPR {
                ECPR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 8 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Channel n Arbitration Priority"]
            #[inline(always)]
            pub fn chpri(&mut self) -> _CHPRIW {
                _CHPRIW { w: self }
            }
            #[doc = "Bit 6 - Disable Preempt Ability. This field resets to 0."]
            #[inline(always)]
            pub fn dpa(&mut self) -> _DPAW {
                _DPAW { w: self }
            }
            #[doc = "Bit 7 - Enable Channel Preemption. This field resets to 0."]
            #[inline(always)]
            pub fn ecp(&mut self) -> _ECPW {
                _ECPW { w: self }
            }
        }
    }
    #[doc = "Channel n Priority Register"]
    pub struct DCHPRI15 {
        register: VolatileCell<u8>,
    }
    #[doc = "Channel n Priority Register"]
    pub mod dchpri15 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::DCHPRI15 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CHPRIR {
            bits: u8,
        }
        impl CHPRIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DPA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DPAR {
            #[doc = "Channel n can suspend a lower priority channel."]
            _0,
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            _1,
        }
        impl DPAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DPAR::_0 => false,
                    DPAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DPAR {
                match value {
                    false => DPAR::_0,
                    true => DPAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DPAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DPAR::_1
            }
        }
        #[doc = "Possible values of the field `ECP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ECPR {
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            _0,
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            _1,
        }
        impl ECPR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ECPR::_0 => false,
                    ECPR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ECPR {
                match value {
                    false => ECPR::_0,
                    true => ECPR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ECPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ECPR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHPRIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHPRIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DPA`"]
        pub enum DPAW {
            #[doc = "Channel n can suspend a lower priority channel."]
            _0,
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            _1,
        }
        impl DPAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DPAW::_0 => false,
                    DPAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DPAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DPAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DPAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel n can suspend a lower priority channel."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DPAW::_0)
            }
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DPAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ECP`"]
        pub enum ECPW {
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            _0,
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            _1,
        }
        impl ECPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ECPW::_0 => false,
                    ECPW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ECPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ECPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ECPW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ECPW::_0)
            }
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ECPW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:3 - Channel n Arbitration Priority"]
            #[inline(always)]
            pub fn chpri(&self) -> CHPRIR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                CHPRIR { bits }
            }
            #[doc = "Bit 6 - Disable Preempt Ability. This field resets to 0."]
            #[inline(always)]
            pub fn dpa(&self) -> DPAR {
                DPAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 7 - Enable Channel Preemption. This field resets to 0."]
            #[inline(always)]
            pub fn ecp(&self) -> ECPR {
                ECPR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 15 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Channel n Arbitration Priority"]
            #[inline(always)]
            pub fn chpri(&mut self) -> _CHPRIW {
                _CHPRIW { w: self }
            }
            #[doc = "Bit 6 - Disable Preempt Ability. This field resets to 0."]
            #[inline(always)]
            pub fn dpa(&mut self) -> _DPAW {
                _DPAW { w: self }
            }
            #[doc = "Bit 7 - Enable Channel Preemption. This field resets to 0."]
            #[inline(always)]
            pub fn ecp(&mut self) -> _ECPW {
                _ECPW { w: self }
            }
        }
    }
    #[doc = "Channel n Priority Register"]
    pub struct DCHPRI14 {
        register: VolatileCell<u8>,
    }
    #[doc = "Channel n Priority Register"]
    pub mod dchpri14 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::DCHPRI14 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CHPRIR {
            bits: u8,
        }
        impl CHPRIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DPA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DPAR {
            #[doc = "Channel n can suspend a lower priority channel."]
            _0,
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            _1,
        }
        impl DPAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DPAR::_0 => false,
                    DPAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DPAR {
                match value {
                    false => DPAR::_0,
                    true => DPAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DPAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DPAR::_1
            }
        }
        #[doc = "Possible values of the field `ECP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ECPR {
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            _0,
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            _1,
        }
        impl ECPR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ECPR::_0 => false,
                    ECPR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ECPR {
                match value {
                    false => ECPR::_0,
                    true => ECPR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ECPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ECPR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHPRIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHPRIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DPA`"]
        pub enum DPAW {
            #[doc = "Channel n can suspend a lower priority channel."]
            _0,
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            _1,
        }
        impl DPAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DPAW::_0 => false,
                    DPAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DPAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DPAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DPAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel n can suspend a lower priority channel."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DPAW::_0)
            }
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DPAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ECP`"]
        pub enum ECPW {
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            _0,
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            _1,
        }
        impl ECPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ECPW::_0 => false,
                    ECPW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ECPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ECPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ECPW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ECPW::_0)
            }
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ECPW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:3 - Channel n Arbitration Priority"]
            #[inline(always)]
            pub fn chpri(&self) -> CHPRIR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                CHPRIR { bits }
            }
            #[doc = "Bit 6 - Disable Preempt Ability. This field resets to 0."]
            #[inline(always)]
            pub fn dpa(&self) -> DPAR {
                DPAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 7 - Enable Channel Preemption. This field resets to 0."]
            #[inline(always)]
            pub fn ecp(&self) -> ECPR {
                ECPR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 14 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Channel n Arbitration Priority"]
            #[inline(always)]
            pub fn chpri(&mut self) -> _CHPRIW {
                _CHPRIW { w: self }
            }
            #[doc = "Bit 6 - Disable Preempt Ability. This field resets to 0."]
            #[inline(always)]
            pub fn dpa(&mut self) -> _DPAW {
                _DPAW { w: self }
            }
            #[doc = "Bit 7 - Enable Channel Preemption. This field resets to 0."]
            #[inline(always)]
            pub fn ecp(&mut self) -> _ECPW {
                _ECPW { w: self }
            }
        }
    }
    #[doc = "Channel n Priority Register"]
    pub struct DCHPRI13 {
        register: VolatileCell<u8>,
    }
    #[doc = "Channel n Priority Register"]
    pub mod dchpri13 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::DCHPRI13 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CHPRIR {
            bits: u8,
        }
        impl CHPRIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DPA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DPAR {
            #[doc = "Channel n can suspend a lower priority channel."]
            _0,
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            _1,
        }
        impl DPAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DPAR::_0 => false,
                    DPAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DPAR {
                match value {
                    false => DPAR::_0,
                    true => DPAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DPAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DPAR::_1
            }
        }
        #[doc = "Possible values of the field `ECP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ECPR {
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            _0,
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            _1,
        }
        impl ECPR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ECPR::_0 => false,
                    ECPR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ECPR {
                match value {
                    false => ECPR::_0,
                    true => ECPR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ECPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ECPR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHPRIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHPRIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DPA`"]
        pub enum DPAW {
            #[doc = "Channel n can suspend a lower priority channel."]
            _0,
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            _1,
        }
        impl DPAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DPAW::_0 => false,
                    DPAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DPAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DPAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DPAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel n can suspend a lower priority channel."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DPAW::_0)
            }
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DPAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ECP`"]
        pub enum ECPW {
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            _0,
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            _1,
        }
        impl ECPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ECPW::_0 => false,
                    ECPW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ECPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ECPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ECPW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ECPW::_0)
            }
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ECPW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:3 - Channel n Arbitration Priority"]
            #[inline(always)]
            pub fn chpri(&self) -> CHPRIR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                CHPRIR { bits }
            }
            #[doc = "Bit 6 - Disable Preempt Ability. This field resets to 0."]
            #[inline(always)]
            pub fn dpa(&self) -> DPAR {
                DPAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 7 - Enable Channel Preemption. This field resets to 0."]
            #[inline(always)]
            pub fn ecp(&self) -> ECPR {
                ECPR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 13 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Channel n Arbitration Priority"]
            #[inline(always)]
            pub fn chpri(&mut self) -> _CHPRIW {
                _CHPRIW { w: self }
            }
            #[doc = "Bit 6 - Disable Preempt Ability. This field resets to 0."]
            #[inline(always)]
            pub fn dpa(&mut self) -> _DPAW {
                _DPAW { w: self }
            }
            #[doc = "Bit 7 - Enable Channel Preemption. This field resets to 0."]
            #[inline(always)]
            pub fn ecp(&mut self) -> _ECPW {
                _ECPW { w: self }
            }
        }
    }
    #[doc = "Channel n Priority Register"]
    pub struct DCHPRI12 {
        register: VolatileCell<u8>,
    }
    #[doc = "Channel n Priority Register"]
    pub mod dchpri12 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::DCHPRI12 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CHPRIR {
            bits: u8,
        }
        impl CHPRIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DPA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DPAR {
            #[doc = "Channel n can suspend a lower priority channel."]
            _0,
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            _1,
        }
        impl DPAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DPAR::_0 => false,
                    DPAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DPAR {
                match value {
                    false => DPAR::_0,
                    true => DPAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DPAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DPAR::_1
            }
        }
        #[doc = "Possible values of the field `ECP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ECPR {
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            _0,
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            _1,
        }
        impl ECPR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ECPR::_0 => false,
                    ECPR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ECPR {
                match value {
                    false => ECPR::_0,
                    true => ECPR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ECPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ECPR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHPRIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHPRIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DPA`"]
        pub enum DPAW {
            #[doc = "Channel n can suspend a lower priority channel."]
            _0,
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            _1,
        }
        impl DPAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DPAW::_0 => false,
                    DPAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DPAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DPAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DPAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel n can suspend a lower priority channel."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DPAW::_0)
            }
            #[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DPAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ECP`"]
        pub enum ECPW {
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            _0,
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            _1,
        }
        impl ECPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ECPW::_0 => false,
                    ECPW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ECPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ECPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ECPW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ECPW::_0)
            }
            #[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ECPW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:3 - Channel n Arbitration Priority"]
            #[inline(always)]
            pub fn chpri(&self) -> CHPRIR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                CHPRIR { bits }
            }
            #[doc = "Bit 6 - Disable Preempt Ability. This field resets to 0."]
            #[inline(always)]
            pub fn dpa(&self) -> DPAR {
                DPAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 7 - Enable Channel Preemption. This field resets to 0."]
            #[inline(always)]
            pub fn ecp(&self) -> ECPR {
                ECPR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 12 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Channel n Arbitration Priority"]
            #[inline(always)]
            pub fn chpri(&mut self) -> _CHPRIW {
                _CHPRIW { w: self }
            }
            #[doc = "Bit 6 - Disable Preempt Ability. This field resets to 0."]
            #[inline(always)]
            pub fn dpa(&mut self) -> _DPAW {
                _DPAW { w: self }
            }
            #[doc = "Bit 7 - Enable Channel Preemption. This field resets to 0."]
            #[inline(always)]
            pub fn ecp(&mut self) -> _ECPW {
                _ECPW { w: self }
            }
        }
    }
    #[doc = "TCD Source Address"]
    pub struct TCD0_SADDR {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Source Address"]
    pub mod tcd0_saddr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD0_SADDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SADDRR {
            bits: u32,
        }
        impl SADDRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SADDRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SADDRW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Source Address"]
            #[inline(always)]
            pub fn saddr(&self) -> SADDRR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SADDRR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Source Address"]
            #[inline(always)]
            pub fn saddr(&mut self) -> _SADDRW {
                _SADDRW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Source Address Offset"]
    pub struct TCD0_SOFF {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Signed Source Address Offset"]
    pub mod tcd0_soff {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD0_SOFF {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SOFFR {
            bits: u16,
        }
        impl SOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:15 - Source address signed offset"]
            #[inline(always)]
            pub fn soff(&self) -> SOFFR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                SOFFR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Source address signed offset"]
            #[inline(always)]
            pub fn soff(&mut self) -> _SOFFW {
                _SOFFW { w: self }
            }
        }
    }
    #[doc = "TCD Transfer Attributes"]
    pub struct TCD0_ATTR {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Transfer Attributes"]
    pub mod tcd0_attr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD0_ATTR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DSIZER {
            bits: u8,
        }
        impl DSIZER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DMODR {
            bits: u8,
        }
        impl DMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `SSIZE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SSIZER {
            #[doc = "8-bit"]
            _0,
            #[doc = "16-bit"]
            _1,
            #[doc = "32-bit"]
            _10,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl SSIZER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SSIZER::_0 => 0,
                    SSIZER::_1 => 1,
                    SSIZER::_10 => 2,
                    SSIZER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SSIZER {
                match value {
                    0 => SSIZER::_0,
                    1 => SSIZER::_1,
                    2 => SSIZER::_10,
                    i => SSIZER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SSIZER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SSIZER::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == SSIZER::_10
            }
        }
        #[doc = "Possible values of the field `SMOD`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMODR {
            #[doc = "Source address modulo feature is disabled"]
            _0,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl SMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SMODR::_0 => 0,
                    SMODR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SMODR {
                match value {
                    0 => SMODR::_0,
                    i => SMODR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMODR::_0
            }
        }
        #[doc = r" Proxy"]
        pub struct _DSIZEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DSIZEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMODW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SSIZE`"]
        pub enum SSIZEW {
            #[doc = "8-bit"]
            _0,
            #[doc = "16-bit"]
            _1,
            #[doc = "32-bit"]
            _10,
        }
        impl SSIZEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SSIZEW::_0 => 0,
                    SSIZEW::_1 => 1,
                    SSIZEW::_10 => 2,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SSIZEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SSIZEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SSIZEW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "8-bit"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SSIZEW::_0)
            }
            #[doc = "16-bit"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SSIZEW::_1)
            }
            #[doc = "32-bit"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(SSIZEW::_10)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMOD`"]
        pub enum SMODW {
            #[doc = "Source address modulo feature is disabled"]
            _0,
        }
        impl SMODW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SMODW::_0 => 0,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMODW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMODW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Source address modulo feature is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMODW::_0)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:2 - Destination data transfer size"]
            #[inline(always)]
            pub fn dsize(&self) -> DSIZER {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                DSIZER { bits }
            }
            #[doc = "Bits 3:7 - Destination Address Modulo"]
            #[inline(always)]
            pub fn dmod(&self) -> DMODR {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                DMODR { bits }
            }
            #[doc = "Bits 8:10 - Source data transfer size"]
            #[inline(always)]
            pub fn ssize(&self) -> SSIZER {
                SSIZER::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
            #[doc = "Bits 11:15 - Source Address Modulo"]
            #[inline(always)]
            pub fn smod(&self) -> SMODR {
                SMODR::_from({
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:2 - Destination data transfer size"]
            #[inline(always)]
            pub fn dsize(&mut self) -> _DSIZEW {
                _DSIZEW { w: self }
            }
            #[doc = "Bits 3:7 - Destination Address Modulo"]
            #[inline(always)]
            pub fn dmod(&mut self) -> _DMODW {
                _DMODW { w: self }
            }
            #[doc = "Bits 8:10 - Source data transfer size"]
            #[inline(always)]
            pub fn ssize(&mut self) -> _SSIZEW {
                _SSIZEW { w: self }
            }
            #[doc = "Bits 11:15 - Source Address Modulo"]
            #[inline(always)]
            pub fn smod(&mut self) -> _SMODW {
                _SMODW { w: self }
            }
        }
    }
    #[doc = "TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
    pub struct TCD0_NBYTES_MLNO {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
    pub mod tcd0_nbytes_mlno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD0_NBYTES_MLNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u32,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                NBYTESR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"]
    pub struct TCD0_NBYTES_MLOFFNO {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"]
    pub mod tcd0_nbytes_mloffno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD0_NBYTES_MLOFFNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u32,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMLOER {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMLOER::_0 => false,
                    DMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMLOER {
                match value {
                    false => DMLOER::_0,
                    true => DMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMLOER::_1
            }
        }
        #[doc = "Possible values of the field `SMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMLOER {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SMLOER::_0 => false,
                    SMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SMLOER {
                match value {
                    false => SMLOER::_0,
                    true => SMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SMLOER::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 1073741823;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMLOE`"]
        pub enum DMLOEW {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMLOEW::_0 => false,
                    DMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the DADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the DADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMLOE`"]
        pub enum SMLOEW {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SMLOEW::_0 => false,
                    SMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the SADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the SADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:29 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u32 = 1073741823;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                NBYTESR { bits }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&self) -> DMLOER {
                DMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&self) -> SMLOER {
                SMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:29 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&mut self) -> _DMLOEW {
                _DMLOEW { w: self }
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&mut self) -> _SMLOEW {
                _SMLOEW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"]
    pub struct TCD0_NBYTES_MLOFFYES {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"]
    pub mod tcd0_nbytes_mloffyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD0_NBYTES_MLOFFYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u16,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct MLOFFR {
            bits: u32,
        }
        impl MLOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMLOER {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMLOER::_0 => false,
                    DMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMLOER {
                match value {
                    false => DMLOER::_0,
                    true => DMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMLOER::_1
            }
        }
        #[doc = "Possible values of the field `SMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMLOER {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SMLOER::_0 => false,
                    SMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SMLOER {
                match value {
                    false => SMLOER::_0,
                    true => SMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SMLOER::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 1023;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MLOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MLOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 1048575;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMLOE`"]
        pub enum DMLOEW {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMLOEW::_0 => false,
                    DMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the DADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the DADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMLOE`"]
        pub enum SMLOEW {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SMLOEW::_0 => false,
                    SMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the SADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the SADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:9 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u16 = 1023;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                NBYTESR { bits }
            }
            #[doc = "Bits 10:29 - If SMLOE or DMLOE is set, this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."]
            #[inline(always)]
            pub fn mloff(&self) -> MLOFFR {
                let bits = {
                    const MASK: u32 = 1048575;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MLOFFR { bits }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&self) -> DMLOER {
                DMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&self) -> SMLOER {
                SMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:9 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
            #[doc = "Bits 10:29 - If SMLOE or DMLOE is set, this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."]
            #[inline(always)]
            pub fn mloff(&mut self) -> _MLOFFW {
                _MLOFFW { w: self }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&mut self) -> _DMLOEW {
                _DMLOEW { w: self }
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&mut self) -> _SMLOEW {
                _SMLOEW { w: self }
            }
        }
    }
    #[doc = "TCD Last Source Address Adjustment"]
    pub struct TCD0_SLAST {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Last Source Address Adjustment"]
    pub mod tcd0_slast {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD0_SLAST {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SLASTR {
            bits: u32,
        }
        impl SLASTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SLASTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SLASTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Last Source Address Adjustment"]
            #[inline(always)]
            pub fn slast(&self) -> SLASTR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SLASTR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Last Source Address Adjustment"]
            #[inline(always)]
            pub fn slast(&mut self) -> _SLASTW {
                _SLASTW { w: self }
            }
        }
    }
    #[doc = "TCD Destination Address"]
    pub struct TCD0_DADDR {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Destination Address"]
    pub mod tcd0_daddr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD0_DADDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DADDRR {
            bits: u32,
        }
        impl DADDRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DADDRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DADDRW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Destination Address"]
            #[inline(always)]
            pub fn daddr(&self) -> DADDRR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                DADDRR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Destination Address"]
            #[inline(always)]
            pub fn daddr(&mut self) -> _DADDRW {
                _DADDRW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Destination Address Offset"]
    pub struct TCD0_DOFF {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Signed Destination Address Offset"]
    pub mod tcd0_doff {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD0_DOFF {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DOFFR {
            bits: u16,
        }
        impl DOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:15 - Destination Address Signed Offset"]
            #[inline(always)]
            pub fn doff(&self) -> DOFFR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                DOFFR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Destination Address Signed Offset"]
            #[inline(always)]
            pub fn doff(&mut self) -> _DOFFW {
                _DOFFW { w: self }
            }
        }
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub struct TCD0_CITER_ELINKNO {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub mod tcd0_citer_elinkno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD0_CITER_ELINKNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CITERR {
            bits: u16,
        }
        impl CITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 32767;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:14 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer(&self) -> CITERR {
                let bits = {
                    const MASK: u16 = 32767;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                CITERR { bits }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:14 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer(&mut self) -> _CITERW {
                _CITERW { w: self }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub struct TCD0_CITER_ELINKYES {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub mod tcd0_citer_elinkyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD0_CITER_ELINKYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CITER_LER {
            bits: u16,
        }
        impl CITER_LER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct LINKCHR {
            bits: u8,
        }
        impl LINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CITER_LEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CITER_LEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 511;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _LINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:8 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer_le(&self) -> CITER_LER {
                let bits = {
                    const MASK: u16 = 511;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                CITER_LER { bits }
            }
            #[doc = "Bits 9:12 - Minor Loop Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&self) -> LINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                LINKCHR { bits }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:8 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer_le(&mut self) -> _CITER_LEW {
                _CITER_LEW { w: self }
            }
            #[doc = "Bits 9:12 - Minor Loop Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&mut self) -> _LINKCHW {
                _LINKCHW { w: self }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Last Destination Address Adjustment/Scatter Gather Address"]
    pub struct TCD0_DLASTSGA {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Last Destination Address Adjustment/Scatter Gather Address"]
    pub mod tcd0_dlastsga {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD0_DLASTSGA {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLASTSGAR {
            bits: u32,
        }
        impl DLASTSGAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DLASTSGAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DLASTSGAW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - DLASTSGA"]
            #[inline(always)]
            pub fn dlastsga(&self) -> DLASTSGAR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                DLASTSGAR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - DLASTSGA"]
            #[inline(always)]
            pub fn dlastsga(&mut self) -> _DLASTSGAW {
                _DLASTSGAW { w: self }
            }
        }
    }
    #[doc = "TCD Control and Status"]
    pub struct TCD0_CSR {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Control and Status"]
    pub mod tcd0_csr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD0_CSR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `START`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum STARTR {
            #[doc = "The channel is not explicitly started."]
            _0,
            #[doc = "The channel is explicitly started via a software initiated service request."]
            _1,
        }
        impl STARTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    STARTR::_0 => false,
                    STARTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> STARTR {
                match value {
                    false => STARTR::_0,
                    true => STARTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == STARTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == STARTR::_1
            }
        }
        #[doc = "Possible values of the field `INTMAJOR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INTMAJORR {
            #[doc = "The end-of-major loop interrupt is disabled."]
            _0,
            #[doc = "The end-of-major loop interrupt is enabled."]
            _1,
        }
        impl INTMAJORR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INTMAJORR::_0 => false,
                    INTMAJORR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INTMAJORR {
                match value {
                    false => INTMAJORR::_0,
                    true => INTMAJORR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INTMAJORR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INTMAJORR::_1
            }
        }
        #[doc = "Possible values of the field `INTHALF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INTHALFR {
            #[doc = "The half-point interrupt is disabled."]
            _0,
            #[doc = "The half-point interrupt is enabled."]
            _1,
        }
        impl INTHALFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INTHALFR::_0 => false,
                    INTHALFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INTHALFR {
                match value {
                    false => INTHALFR::_0,
                    true => INTHALFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INTHALFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INTHALFR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct DREQR {
            bits: bool,
        }
        impl DREQR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `ESG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ESGR {
            #[doc = "The current channel's TCD is normal format."]
            _0,
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            _1,
        }
        impl ESGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ESGR::_0 => false,
                    ESGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ESGR {
                match value {
                    false => ESGR::_0,
                    true => ESGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ESGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ESGR::_1
            }
        }
        #[doc = "Possible values of the field `MAJORELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MAJORELINKR {
            #[doc = "The channel-to-channel linking is disabled."]
            _0,
            #[doc = "The channel-to-channel linking is enabled."]
            _1,
        }
        impl MAJORELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MAJORELINKR::_0 => false,
                    MAJORELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MAJORELINKR {
                match value {
                    false => MAJORELINKR::_0,
                    true => MAJORELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MAJORELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MAJORELINKR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ACTIVER {
            bits: bool,
        }
        impl ACTIVER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct DONER {
            bits: bool,
        }
        impl DONER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MAJORLINKCHR {
            bits: u8,
        }
        impl MAJORLINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `BWC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BWCR {
            #[doc = "No eDMA engine stalls."]
            _0,
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            _10,
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            _11,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl BWCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    BWCR::_0 => 0,
                    BWCR::_10 => 2,
                    BWCR::_11 => 3,
                    BWCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> BWCR {
                match value {
                    0 => BWCR::_0,
                    2 => BWCR::_10,
                    3 => BWCR::_11,
                    i => BWCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BWCR::_0
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == BWCR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == BWCR::_11
            }
        }
        #[doc = "Values that can be written to the field `START`"]
        pub enum STARTW {
            #[doc = "The channel is not explicitly started."]
            _0,
            #[doc = "The channel is explicitly started via a software initiated service request."]
            _1,
        }
        impl STARTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    STARTW::_0 => false,
                    STARTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _STARTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _STARTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: STARTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel is not explicitly started."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(STARTW::_0)
            }
            #[doc = "The channel is explicitly started via a software initiated service request."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(STARTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INTMAJOR`"]
        pub enum INTMAJORW {
            #[doc = "The end-of-major loop interrupt is disabled."]
            _0,
            #[doc = "The end-of-major loop interrupt is enabled."]
            _1,
        }
        impl INTMAJORW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INTMAJORW::_0 => false,
                    INTMAJORW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INTMAJORW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INTMAJORW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INTMAJORW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The end-of-major loop interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INTMAJORW::_0)
            }
            #[doc = "The end-of-major loop interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INTMAJORW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INTHALF`"]
        pub enum INTHALFW {
            #[doc = "The half-point interrupt is disabled."]
            _0,
            #[doc = "The half-point interrupt is enabled."]
            _1,
        }
        impl INTHALFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INTHALFW::_0 => false,
                    INTHALFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INTHALFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INTHALFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INTHALFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The half-point interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INTHALFW::_0)
            }
            #[doc = "The half-point interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INTHALFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DREQW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DREQW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ESG`"]
        pub enum ESGW {
            #[doc = "The current channel's TCD is normal format."]
            _0,
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            _1,
        }
        impl ESGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ESGW::_0 => false,
                    ESGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ESGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ESGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ESGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The current channel's TCD is normal format."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ESGW::_0)
            }
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ESGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MAJORELINK`"]
        pub enum MAJORELINKW {
            #[doc = "The channel-to-channel linking is disabled."]
            _0,
            #[doc = "The channel-to-channel linking is enabled."]
            _1,
        }
        impl MAJORELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MAJORELINKW::_0 => false,
                    MAJORELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MAJORELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MAJORELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MAJORELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MAJORELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MAJORELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ACTIVEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ACTIVEW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DONEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DONEW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MAJORLINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MAJORLINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BWC`"]
        pub enum BWCW {
            #[doc = "No eDMA engine stalls."]
            _0,
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            _10,
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            _11,
        }
        impl BWCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    BWCW::_0 => 0,
                    BWCW::_10 => 2,
                    BWCW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BWCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BWCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BWCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "No eDMA engine stalls."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BWCW::_0)
            }
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(BWCW::_10)
            }
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(BWCW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bit 0 - Channel Start"]
            #[inline(always)]
            pub fn start(&self) -> STARTR {
                STARTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 1 - Enable an interrupt when major iteration count completes."]
            #[inline(always)]
            pub fn intmajor(&self) -> INTMAJORR {
                INTMAJORR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 2 - Enable an interrupt when major counter is half complete."]
            #[inline(always)]
            pub fn inthalf(&self) -> INTHALFR {
                INTHALFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 3 - Disable Request"]
            #[inline(always)]
            pub fn dreq(&self) -> DREQR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                DREQR { bits }
            }
            #[doc = "Bit 4 - Enable Scatter/Gather Processing"]
            #[inline(always)]
            pub fn esg(&self) -> ESGR {
                ESGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 5 - Enable channel-to-channel linking on major loop complete"]
            #[inline(always)]
            pub fn majorelink(&self) -> MAJORELINKR {
                MAJORELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 6 - Channel Active"]
            #[inline(always)]
            pub fn active(&self) -> ACTIVER {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                ACTIVER { bits }
            }
            #[doc = "Bit 7 - Channel Done"]
            #[inline(always)]
            pub fn done(&self) -> DONER {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                DONER { bits }
            }
            #[doc = "Bits 8:11 - Major Loop Link Channel Number"]
            #[inline(always)]
            pub fn majorlinkch(&self) -> MAJORLINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                MAJORLINKCHR { bits }
            }
            #[doc = "Bits 14:15 - Bandwidth Control"]
            #[inline(always)]
            pub fn bwc(&self) -> BWCR {
                BWCR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Channel Start"]
            #[inline(always)]
            pub fn start(&mut self) -> _STARTW {
                _STARTW { w: self }
            }
            #[doc = "Bit 1 - Enable an interrupt when major iteration count completes."]
            #[inline(always)]
            pub fn intmajor(&mut self) -> _INTMAJORW {
                _INTMAJORW { w: self }
            }
            #[doc = "Bit 2 - Enable an interrupt when major counter is half complete."]
            #[inline(always)]
            pub fn inthalf(&mut self) -> _INTHALFW {
                _INTHALFW { w: self }
            }
            #[doc = "Bit 3 - Disable Request"]
            #[inline(always)]
            pub fn dreq(&mut self) -> _DREQW {
                _DREQW { w: self }
            }
            #[doc = "Bit 4 - Enable Scatter/Gather Processing"]
            #[inline(always)]
            pub fn esg(&mut self) -> _ESGW {
                _ESGW { w: self }
            }
            #[doc = "Bit 5 - Enable channel-to-channel linking on major loop complete"]
            #[inline(always)]
            pub fn majorelink(&mut self) -> _MAJORELINKW {
                _MAJORELINKW { w: self }
            }
            #[doc = "Bit 6 - Channel Active"]
            #[inline(always)]
            pub fn active(&mut self) -> _ACTIVEW {
                _ACTIVEW { w: self }
            }
            #[doc = "Bit 7 - Channel Done"]
            #[inline(always)]
            pub fn done(&mut self) -> _DONEW {
                _DONEW { w: self }
            }
            #[doc = "Bits 8:11 - Major Loop Link Channel Number"]
            #[inline(always)]
            pub fn majorlinkch(&mut self) -> _MAJORLINKCHW {
                _MAJORLINKCHW { w: self }
            }
            #[doc = "Bits 14:15 - Bandwidth Control"]
            #[inline(always)]
            pub fn bwc(&mut self) -> _BWCW {
                _BWCW { w: self }
            }
        }
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub struct TCD0_BITER_ELINKNO {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub mod tcd0_biter_elinkno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD0_BITER_ELINKNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BITERR {
            bits: u16,
        }
        impl BITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _BITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 32767;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:14 - Starting Major Iteration Count"]
            #[inline(always)]
            pub fn biter(&self) -> BITERR {
                let bits = {
                    const MASK: u16 = 32767;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                BITERR { bits }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:14 - Starting Major Iteration Count"]
            #[inline(always)]
            pub fn biter(&mut self) -> _BITERW {
                _BITERW { w: self }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub struct TCD0_BITER_ELINKYES {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub mod tcd0_biter_elinkyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD0_BITER_ELINKYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BITERR {
            bits: u16,
        }
        impl BITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct LINKCHR {
            bits: u8,
        }
        impl LINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _BITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 511;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _LINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:8 - Starting major iteration count"]
            #[inline(always)]
            pub fn biter(&self) -> BITERR {
                let bits = {
                    const MASK: u16 = 511;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                BITERR { bits }
            }
            #[doc = "Bits 9:12 - Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&self) -> LINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                LINKCHR { bits }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:8 - Starting major iteration count"]
            #[inline(always)]
            pub fn biter(&mut self) -> _BITERW {
                _BITERW { w: self }
            }
            #[doc = "Bits 9:12 - Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&mut self) -> _LINKCHW {
                _LINKCHW { w: self }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Source Address"]
    pub struct TCD1_SADDR {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Source Address"]
    pub mod tcd1_saddr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD1_SADDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SADDRR {
            bits: u32,
        }
        impl SADDRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SADDRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SADDRW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Source Address"]
            #[inline(always)]
            pub fn saddr(&self) -> SADDRR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SADDRR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Source Address"]
            #[inline(always)]
            pub fn saddr(&mut self) -> _SADDRW {
                _SADDRW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Source Address Offset"]
    pub struct TCD1_SOFF {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Signed Source Address Offset"]
    pub mod tcd1_soff {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD1_SOFF {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SOFFR {
            bits: u16,
        }
        impl SOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:15 - Source address signed offset"]
            #[inline(always)]
            pub fn soff(&self) -> SOFFR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                SOFFR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Source address signed offset"]
            #[inline(always)]
            pub fn soff(&mut self) -> _SOFFW {
                _SOFFW { w: self }
            }
        }
    }
    #[doc = "TCD Transfer Attributes"]
    pub struct TCD1_ATTR {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Transfer Attributes"]
    pub mod tcd1_attr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD1_ATTR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DSIZER {
            bits: u8,
        }
        impl DSIZER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DMODR {
            bits: u8,
        }
        impl DMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `SSIZE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SSIZER {
            #[doc = "8-bit"]
            _0,
            #[doc = "16-bit"]
            _1,
            #[doc = "32-bit"]
            _10,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl SSIZER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SSIZER::_0 => 0,
                    SSIZER::_1 => 1,
                    SSIZER::_10 => 2,
                    SSIZER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SSIZER {
                match value {
                    0 => SSIZER::_0,
                    1 => SSIZER::_1,
                    2 => SSIZER::_10,
                    i => SSIZER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SSIZER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SSIZER::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == SSIZER::_10
            }
        }
        #[doc = "Possible values of the field `SMOD`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMODR {
            #[doc = "Source address modulo feature is disabled"]
            _0,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl SMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SMODR::_0 => 0,
                    SMODR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SMODR {
                match value {
                    0 => SMODR::_0,
                    i => SMODR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMODR::_0
            }
        }
        #[doc = r" Proxy"]
        pub struct _DSIZEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DSIZEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMODW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SSIZE`"]
        pub enum SSIZEW {
            #[doc = "8-bit"]
            _0,
            #[doc = "16-bit"]
            _1,
            #[doc = "32-bit"]
            _10,
        }
        impl SSIZEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SSIZEW::_0 => 0,
                    SSIZEW::_1 => 1,
                    SSIZEW::_10 => 2,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SSIZEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SSIZEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SSIZEW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "8-bit"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SSIZEW::_0)
            }
            #[doc = "16-bit"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SSIZEW::_1)
            }
            #[doc = "32-bit"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(SSIZEW::_10)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMOD`"]
        pub enum SMODW {
            #[doc = "Source address modulo feature is disabled"]
            _0,
        }
        impl SMODW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SMODW::_0 => 0,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMODW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMODW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Source address modulo feature is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMODW::_0)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:2 - Destination data transfer size"]
            #[inline(always)]
            pub fn dsize(&self) -> DSIZER {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                DSIZER { bits }
            }
            #[doc = "Bits 3:7 - Destination Address Modulo"]
            #[inline(always)]
            pub fn dmod(&self) -> DMODR {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                DMODR { bits }
            }
            #[doc = "Bits 8:10 - Source data transfer size"]
            #[inline(always)]
            pub fn ssize(&self) -> SSIZER {
                SSIZER::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
            #[doc = "Bits 11:15 - Source Address Modulo"]
            #[inline(always)]
            pub fn smod(&self) -> SMODR {
                SMODR::_from({
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:2 - Destination data transfer size"]
            #[inline(always)]
            pub fn dsize(&mut self) -> _DSIZEW {
                _DSIZEW { w: self }
            }
            #[doc = "Bits 3:7 - Destination Address Modulo"]
            #[inline(always)]
            pub fn dmod(&mut self) -> _DMODW {
                _DMODW { w: self }
            }
            #[doc = "Bits 8:10 - Source data transfer size"]
            #[inline(always)]
            pub fn ssize(&mut self) -> _SSIZEW {
                _SSIZEW { w: self }
            }
            #[doc = "Bits 11:15 - Source Address Modulo"]
            #[inline(always)]
            pub fn smod(&mut self) -> _SMODW {
                _SMODW { w: self }
            }
        }
    }
    #[doc = "TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
    pub struct TCD1_NBYTES_MLNO {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
    pub mod tcd1_nbytes_mlno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD1_NBYTES_MLNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u32,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                NBYTESR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"]
    pub struct TCD1_NBYTES_MLOFFNO {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"]
    pub mod tcd1_nbytes_mloffno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD1_NBYTES_MLOFFNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u32,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMLOER {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMLOER::_0 => false,
                    DMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMLOER {
                match value {
                    false => DMLOER::_0,
                    true => DMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMLOER::_1
            }
        }
        #[doc = "Possible values of the field `SMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMLOER {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SMLOER::_0 => false,
                    SMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SMLOER {
                match value {
                    false => SMLOER::_0,
                    true => SMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SMLOER::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 1073741823;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMLOE`"]
        pub enum DMLOEW {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMLOEW::_0 => false,
                    DMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the DADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the DADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMLOE`"]
        pub enum SMLOEW {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SMLOEW::_0 => false,
                    SMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the SADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the SADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:29 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u32 = 1073741823;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                NBYTESR { bits }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&self) -> DMLOER {
                DMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&self) -> SMLOER {
                SMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:29 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&mut self) -> _DMLOEW {
                _DMLOEW { w: self }
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&mut self) -> _SMLOEW {
                _SMLOEW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"]
    pub struct TCD1_NBYTES_MLOFFYES {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"]
    pub mod tcd1_nbytes_mloffyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD1_NBYTES_MLOFFYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u16,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct MLOFFR {
            bits: u32,
        }
        impl MLOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMLOER {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMLOER::_0 => false,
                    DMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMLOER {
                match value {
                    false => DMLOER::_0,
                    true => DMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMLOER::_1
            }
        }
        #[doc = "Possible values of the field `SMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMLOER {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SMLOER::_0 => false,
                    SMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SMLOER {
                match value {
                    false => SMLOER::_0,
                    true => SMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SMLOER::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 1023;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MLOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MLOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 1048575;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMLOE`"]
        pub enum DMLOEW {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMLOEW::_0 => false,
                    DMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the DADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the DADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMLOE`"]
        pub enum SMLOEW {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SMLOEW::_0 => false,
                    SMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the SADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the SADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:9 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u16 = 1023;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                NBYTESR { bits }
            }
            #[doc = "Bits 10:29 - If SMLOE or DMLOE is set, this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."]
            #[inline(always)]
            pub fn mloff(&self) -> MLOFFR {
                let bits = {
                    const MASK: u32 = 1048575;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MLOFFR { bits }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&self) -> DMLOER {
                DMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&self) -> SMLOER {
                SMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:9 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
            #[doc = "Bits 10:29 - If SMLOE or DMLOE is set, this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."]
            #[inline(always)]
            pub fn mloff(&mut self) -> _MLOFFW {
                _MLOFFW { w: self }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&mut self) -> _DMLOEW {
                _DMLOEW { w: self }
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&mut self) -> _SMLOEW {
                _SMLOEW { w: self }
            }
        }
    }
    #[doc = "TCD Last Source Address Adjustment"]
    pub struct TCD1_SLAST {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Last Source Address Adjustment"]
    pub mod tcd1_slast {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD1_SLAST {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SLASTR {
            bits: u32,
        }
        impl SLASTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SLASTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SLASTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Last Source Address Adjustment"]
            #[inline(always)]
            pub fn slast(&self) -> SLASTR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SLASTR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Last Source Address Adjustment"]
            #[inline(always)]
            pub fn slast(&mut self) -> _SLASTW {
                _SLASTW { w: self }
            }
        }
    }
    #[doc = "TCD Destination Address"]
    pub struct TCD1_DADDR {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Destination Address"]
    pub mod tcd1_daddr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD1_DADDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DADDRR {
            bits: u32,
        }
        impl DADDRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DADDRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DADDRW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Destination Address"]
            #[inline(always)]
            pub fn daddr(&self) -> DADDRR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                DADDRR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Destination Address"]
            #[inline(always)]
            pub fn daddr(&mut self) -> _DADDRW {
                _DADDRW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Destination Address Offset"]
    pub struct TCD1_DOFF {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Signed Destination Address Offset"]
    pub mod tcd1_doff {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD1_DOFF {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DOFFR {
            bits: u16,
        }
        impl DOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:15 - Destination Address Signed Offset"]
            #[inline(always)]
            pub fn doff(&self) -> DOFFR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                DOFFR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Destination Address Signed Offset"]
            #[inline(always)]
            pub fn doff(&mut self) -> _DOFFW {
                _DOFFW { w: self }
            }
        }
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub struct TCD1_CITER_ELINKNO {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub mod tcd1_citer_elinkno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD1_CITER_ELINKNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CITERR {
            bits: u16,
        }
        impl CITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 32767;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:14 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer(&self) -> CITERR {
                let bits = {
                    const MASK: u16 = 32767;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                CITERR { bits }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:14 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer(&mut self) -> _CITERW {
                _CITERW { w: self }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub struct TCD1_CITER_ELINKYES {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub mod tcd1_citer_elinkyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD1_CITER_ELINKYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CITER_LER {
            bits: u16,
        }
        impl CITER_LER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct LINKCHR {
            bits: u8,
        }
        impl LINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CITER_LEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CITER_LEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 511;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _LINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:8 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer_le(&self) -> CITER_LER {
                let bits = {
                    const MASK: u16 = 511;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                CITER_LER { bits }
            }
            #[doc = "Bits 9:12 - Minor Loop Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&self) -> LINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                LINKCHR { bits }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:8 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer_le(&mut self) -> _CITER_LEW {
                _CITER_LEW { w: self }
            }
            #[doc = "Bits 9:12 - Minor Loop Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&mut self) -> _LINKCHW {
                _LINKCHW { w: self }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Last Destination Address Adjustment/Scatter Gather Address"]
    pub struct TCD1_DLASTSGA {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Last Destination Address Adjustment/Scatter Gather Address"]
    pub mod tcd1_dlastsga {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD1_DLASTSGA {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLASTSGAR {
            bits: u32,
        }
        impl DLASTSGAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DLASTSGAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DLASTSGAW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - DLASTSGA"]
            #[inline(always)]
            pub fn dlastsga(&self) -> DLASTSGAR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                DLASTSGAR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - DLASTSGA"]
            #[inline(always)]
            pub fn dlastsga(&mut self) -> _DLASTSGAW {
                _DLASTSGAW { w: self }
            }
        }
    }
    #[doc = "TCD Control and Status"]
    pub struct TCD1_CSR {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Control and Status"]
    pub mod tcd1_csr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD1_CSR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `START`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum STARTR {
            #[doc = "The channel is not explicitly started."]
            _0,
            #[doc = "The channel is explicitly started via a software initiated service request."]
            _1,
        }
        impl STARTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    STARTR::_0 => false,
                    STARTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> STARTR {
                match value {
                    false => STARTR::_0,
                    true => STARTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == STARTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == STARTR::_1
            }
        }
        #[doc = "Possible values of the field `INTMAJOR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INTMAJORR {
            #[doc = "The end-of-major loop interrupt is disabled."]
            _0,
            #[doc = "The end-of-major loop interrupt is enabled."]
            _1,
        }
        impl INTMAJORR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INTMAJORR::_0 => false,
                    INTMAJORR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INTMAJORR {
                match value {
                    false => INTMAJORR::_0,
                    true => INTMAJORR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INTMAJORR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INTMAJORR::_1
            }
        }
        #[doc = "Possible values of the field `INTHALF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INTHALFR {
            #[doc = "The half-point interrupt is disabled."]
            _0,
            #[doc = "The half-point interrupt is enabled."]
            _1,
        }
        impl INTHALFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INTHALFR::_0 => false,
                    INTHALFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INTHALFR {
                match value {
                    false => INTHALFR::_0,
                    true => INTHALFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INTHALFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INTHALFR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct DREQR {
            bits: bool,
        }
        impl DREQR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `ESG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ESGR {
            #[doc = "The current channel's TCD is normal format."]
            _0,
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            _1,
        }
        impl ESGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ESGR::_0 => false,
                    ESGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ESGR {
                match value {
                    false => ESGR::_0,
                    true => ESGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ESGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ESGR::_1
            }
        }
        #[doc = "Possible values of the field `MAJORELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MAJORELINKR {
            #[doc = "The channel-to-channel linking is disabled."]
            _0,
            #[doc = "The channel-to-channel linking is enabled."]
            _1,
        }
        impl MAJORELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MAJORELINKR::_0 => false,
                    MAJORELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MAJORELINKR {
                match value {
                    false => MAJORELINKR::_0,
                    true => MAJORELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MAJORELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MAJORELINKR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ACTIVER {
            bits: bool,
        }
        impl ACTIVER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct DONER {
            bits: bool,
        }
        impl DONER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MAJORLINKCHR {
            bits: u8,
        }
        impl MAJORLINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `BWC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BWCR {
            #[doc = "No eDMA engine stalls."]
            _0,
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            _10,
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            _11,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl BWCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    BWCR::_0 => 0,
                    BWCR::_10 => 2,
                    BWCR::_11 => 3,
                    BWCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> BWCR {
                match value {
                    0 => BWCR::_0,
                    2 => BWCR::_10,
                    3 => BWCR::_11,
                    i => BWCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BWCR::_0
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == BWCR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == BWCR::_11
            }
        }
        #[doc = "Values that can be written to the field `START`"]
        pub enum STARTW {
            #[doc = "The channel is not explicitly started."]
            _0,
            #[doc = "The channel is explicitly started via a software initiated service request."]
            _1,
        }
        impl STARTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    STARTW::_0 => false,
                    STARTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _STARTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _STARTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: STARTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel is not explicitly started."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(STARTW::_0)
            }
            #[doc = "The channel is explicitly started via a software initiated service request."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(STARTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INTMAJOR`"]
        pub enum INTMAJORW {
            #[doc = "The end-of-major loop interrupt is disabled."]
            _0,
            #[doc = "The end-of-major loop interrupt is enabled."]
            _1,
        }
        impl INTMAJORW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INTMAJORW::_0 => false,
                    INTMAJORW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INTMAJORW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INTMAJORW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INTMAJORW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The end-of-major loop interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INTMAJORW::_0)
            }
            #[doc = "The end-of-major loop interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INTMAJORW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INTHALF`"]
        pub enum INTHALFW {
            #[doc = "The half-point interrupt is disabled."]
            _0,
            #[doc = "The half-point interrupt is enabled."]
            _1,
        }
        impl INTHALFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INTHALFW::_0 => false,
                    INTHALFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INTHALFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INTHALFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INTHALFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The half-point interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INTHALFW::_0)
            }
            #[doc = "The half-point interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INTHALFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DREQW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DREQW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ESG`"]
        pub enum ESGW {
            #[doc = "The current channel's TCD is normal format."]
            _0,
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            _1,
        }
        impl ESGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ESGW::_0 => false,
                    ESGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ESGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ESGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ESGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The current channel's TCD is normal format."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ESGW::_0)
            }
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ESGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MAJORELINK`"]
        pub enum MAJORELINKW {
            #[doc = "The channel-to-channel linking is disabled."]
            _0,
            #[doc = "The channel-to-channel linking is enabled."]
            _1,
        }
        impl MAJORELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MAJORELINKW::_0 => false,
                    MAJORELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MAJORELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MAJORELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MAJORELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MAJORELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MAJORELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ACTIVEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ACTIVEW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DONEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DONEW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MAJORLINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MAJORLINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BWC`"]
        pub enum BWCW {
            #[doc = "No eDMA engine stalls."]
            _0,
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            _10,
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            _11,
        }
        impl BWCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    BWCW::_0 => 0,
                    BWCW::_10 => 2,
                    BWCW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BWCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BWCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BWCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "No eDMA engine stalls."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BWCW::_0)
            }
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(BWCW::_10)
            }
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(BWCW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bit 0 - Channel Start"]
            #[inline(always)]
            pub fn start(&self) -> STARTR {
                STARTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 1 - Enable an interrupt when major iteration count completes."]
            #[inline(always)]
            pub fn intmajor(&self) -> INTMAJORR {
                INTMAJORR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 2 - Enable an interrupt when major counter is half complete."]
            #[inline(always)]
            pub fn inthalf(&self) -> INTHALFR {
                INTHALFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 3 - Disable Request"]
            #[inline(always)]
            pub fn dreq(&self) -> DREQR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                DREQR { bits }
            }
            #[doc = "Bit 4 - Enable Scatter/Gather Processing"]
            #[inline(always)]
            pub fn esg(&self) -> ESGR {
                ESGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 5 - Enable channel-to-channel linking on major loop complete"]
            #[inline(always)]
            pub fn majorelink(&self) -> MAJORELINKR {
                MAJORELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 6 - Channel Active"]
            #[inline(always)]
            pub fn active(&self) -> ACTIVER {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                ACTIVER { bits }
            }
            #[doc = "Bit 7 - Channel Done"]
            #[inline(always)]
            pub fn done(&self) -> DONER {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                DONER { bits }
            }
            #[doc = "Bits 8:11 - Major Loop Link Channel Number"]
            #[inline(always)]
            pub fn majorlinkch(&self) -> MAJORLINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                MAJORLINKCHR { bits }
            }
            #[doc = "Bits 14:15 - Bandwidth Control"]
            #[inline(always)]
            pub fn bwc(&self) -> BWCR {
                BWCR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Channel Start"]
            #[inline(always)]
            pub fn start(&mut self) -> _STARTW {
                _STARTW { w: self }
            }
            #[doc = "Bit 1 - Enable an interrupt when major iteration count completes."]
            #[inline(always)]
            pub fn intmajor(&mut self) -> _INTMAJORW {
                _INTMAJORW { w: self }
            }
            #[doc = "Bit 2 - Enable an interrupt when major counter is half complete."]
            #[inline(always)]
            pub fn inthalf(&mut self) -> _INTHALFW {
                _INTHALFW { w: self }
            }
            #[doc = "Bit 3 - Disable Request"]
            #[inline(always)]
            pub fn dreq(&mut self) -> _DREQW {
                _DREQW { w: self }
            }
            #[doc = "Bit 4 - Enable Scatter/Gather Processing"]
            #[inline(always)]
            pub fn esg(&mut self) -> _ESGW {
                _ESGW { w: self }
            }
            #[doc = "Bit 5 - Enable channel-to-channel linking on major loop complete"]
            #[inline(always)]
            pub fn majorelink(&mut self) -> _MAJORELINKW {
                _MAJORELINKW { w: self }
            }
            #[doc = "Bit 6 - Channel Active"]
            #[inline(always)]
            pub fn active(&mut self) -> _ACTIVEW {
                _ACTIVEW { w: self }
            }
            #[doc = "Bit 7 - Channel Done"]
            #[inline(always)]
            pub fn done(&mut self) -> _DONEW {
                _DONEW { w: self }
            }
            #[doc = "Bits 8:11 - Major Loop Link Channel Number"]
            #[inline(always)]
            pub fn majorlinkch(&mut self) -> _MAJORLINKCHW {
                _MAJORLINKCHW { w: self }
            }
            #[doc = "Bits 14:15 - Bandwidth Control"]
            #[inline(always)]
            pub fn bwc(&mut self) -> _BWCW {
                _BWCW { w: self }
            }
        }
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub struct TCD1_BITER_ELINKNO {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub mod tcd1_biter_elinkno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD1_BITER_ELINKNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BITERR {
            bits: u16,
        }
        impl BITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _BITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 32767;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:14 - Starting Major Iteration Count"]
            #[inline(always)]
            pub fn biter(&self) -> BITERR {
                let bits = {
                    const MASK: u16 = 32767;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                BITERR { bits }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:14 - Starting Major Iteration Count"]
            #[inline(always)]
            pub fn biter(&mut self) -> _BITERW {
                _BITERW { w: self }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub struct TCD1_BITER_ELINKYES {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub mod tcd1_biter_elinkyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD1_BITER_ELINKYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BITERR {
            bits: u16,
        }
        impl BITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct LINKCHR {
            bits: u8,
        }
        impl LINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _BITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 511;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _LINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:8 - Starting major iteration count"]
            #[inline(always)]
            pub fn biter(&self) -> BITERR {
                let bits = {
                    const MASK: u16 = 511;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                BITERR { bits }
            }
            #[doc = "Bits 9:12 - Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&self) -> LINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                LINKCHR { bits }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:8 - Starting major iteration count"]
            #[inline(always)]
            pub fn biter(&mut self) -> _BITERW {
                _BITERW { w: self }
            }
            #[doc = "Bits 9:12 - Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&mut self) -> _LINKCHW {
                _LINKCHW { w: self }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Source Address"]
    pub struct TCD2_SADDR {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Source Address"]
    pub mod tcd2_saddr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD2_SADDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SADDRR {
            bits: u32,
        }
        impl SADDRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SADDRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SADDRW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Source Address"]
            #[inline(always)]
            pub fn saddr(&self) -> SADDRR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SADDRR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Source Address"]
            #[inline(always)]
            pub fn saddr(&mut self) -> _SADDRW {
                _SADDRW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Source Address Offset"]
    pub struct TCD2_SOFF {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Signed Source Address Offset"]
    pub mod tcd2_soff {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD2_SOFF {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SOFFR {
            bits: u16,
        }
        impl SOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:15 - Source address signed offset"]
            #[inline(always)]
            pub fn soff(&self) -> SOFFR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                SOFFR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Source address signed offset"]
            #[inline(always)]
            pub fn soff(&mut self) -> _SOFFW {
                _SOFFW { w: self }
            }
        }
    }
    #[doc = "TCD Transfer Attributes"]
    pub struct TCD2_ATTR {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Transfer Attributes"]
    pub mod tcd2_attr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD2_ATTR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DSIZER {
            bits: u8,
        }
        impl DSIZER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DMODR {
            bits: u8,
        }
        impl DMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `SSIZE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SSIZER {
            #[doc = "8-bit"]
            _0,
            #[doc = "16-bit"]
            _1,
            #[doc = "32-bit"]
            _10,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl SSIZER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SSIZER::_0 => 0,
                    SSIZER::_1 => 1,
                    SSIZER::_10 => 2,
                    SSIZER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SSIZER {
                match value {
                    0 => SSIZER::_0,
                    1 => SSIZER::_1,
                    2 => SSIZER::_10,
                    i => SSIZER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SSIZER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SSIZER::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == SSIZER::_10
            }
        }
        #[doc = "Possible values of the field `SMOD`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMODR {
            #[doc = "Source address modulo feature is disabled"]
            _0,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl SMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SMODR::_0 => 0,
                    SMODR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SMODR {
                match value {
                    0 => SMODR::_0,
                    i => SMODR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMODR::_0
            }
        }
        #[doc = r" Proxy"]
        pub struct _DSIZEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DSIZEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMODW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SSIZE`"]
        pub enum SSIZEW {
            #[doc = "8-bit"]
            _0,
            #[doc = "16-bit"]
            _1,
            #[doc = "32-bit"]
            _10,
        }
        impl SSIZEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SSIZEW::_0 => 0,
                    SSIZEW::_1 => 1,
                    SSIZEW::_10 => 2,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SSIZEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SSIZEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SSIZEW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "8-bit"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SSIZEW::_0)
            }
            #[doc = "16-bit"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SSIZEW::_1)
            }
            #[doc = "32-bit"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(SSIZEW::_10)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMOD`"]
        pub enum SMODW {
            #[doc = "Source address modulo feature is disabled"]
            _0,
        }
        impl SMODW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SMODW::_0 => 0,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMODW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMODW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Source address modulo feature is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMODW::_0)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:2 - Destination data transfer size"]
            #[inline(always)]
            pub fn dsize(&self) -> DSIZER {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                DSIZER { bits }
            }
            #[doc = "Bits 3:7 - Destination Address Modulo"]
            #[inline(always)]
            pub fn dmod(&self) -> DMODR {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                DMODR { bits }
            }
            #[doc = "Bits 8:10 - Source data transfer size"]
            #[inline(always)]
            pub fn ssize(&self) -> SSIZER {
                SSIZER::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
            #[doc = "Bits 11:15 - Source Address Modulo"]
            #[inline(always)]
            pub fn smod(&self) -> SMODR {
                SMODR::_from({
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:2 - Destination data transfer size"]
            #[inline(always)]
            pub fn dsize(&mut self) -> _DSIZEW {
                _DSIZEW { w: self }
            }
            #[doc = "Bits 3:7 - Destination Address Modulo"]
            #[inline(always)]
            pub fn dmod(&mut self) -> _DMODW {
                _DMODW { w: self }
            }
            #[doc = "Bits 8:10 - Source data transfer size"]
            #[inline(always)]
            pub fn ssize(&mut self) -> _SSIZEW {
                _SSIZEW { w: self }
            }
            #[doc = "Bits 11:15 - Source Address Modulo"]
            #[inline(always)]
            pub fn smod(&mut self) -> _SMODW {
                _SMODW { w: self }
            }
        }
    }
    #[doc = "TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
    pub struct TCD2_NBYTES_MLNO {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
    pub mod tcd2_nbytes_mlno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD2_NBYTES_MLNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u32,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                NBYTESR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"]
    pub struct TCD2_NBYTES_MLOFFNO {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"]
    pub mod tcd2_nbytes_mloffno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD2_NBYTES_MLOFFNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u32,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMLOER {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMLOER::_0 => false,
                    DMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMLOER {
                match value {
                    false => DMLOER::_0,
                    true => DMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMLOER::_1
            }
        }
        #[doc = "Possible values of the field `SMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMLOER {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SMLOER::_0 => false,
                    SMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SMLOER {
                match value {
                    false => SMLOER::_0,
                    true => SMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SMLOER::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 1073741823;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMLOE`"]
        pub enum DMLOEW {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMLOEW::_0 => false,
                    DMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the DADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the DADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMLOE`"]
        pub enum SMLOEW {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SMLOEW::_0 => false,
                    SMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the SADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the SADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:29 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u32 = 1073741823;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                NBYTESR { bits }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&self) -> DMLOER {
                DMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&self) -> SMLOER {
                SMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:29 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&mut self) -> _DMLOEW {
                _DMLOEW { w: self }
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&mut self) -> _SMLOEW {
                _SMLOEW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"]
    pub struct TCD2_NBYTES_MLOFFYES {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"]
    pub mod tcd2_nbytes_mloffyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD2_NBYTES_MLOFFYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u16,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct MLOFFR {
            bits: u32,
        }
        impl MLOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMLOER {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMLOER::_0 => false,
                    DMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMLOER {
                match value {
                    false => DMLOER::_0,
                    true => DMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMLOER::_1
            }
        }
        #[doc = "Possible values of the field `SMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMLOER {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SMLOER::_0 => false,
                    SMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SMLOER {
                match value {
                    false => SMLOER::_0,
                    true => SMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SMLOER::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 1023;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MLOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MLOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 1048575;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMLOE`"]
        pub enum DMLOEW {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMLOEW::_0 => false,
                    DMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the DADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the DADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMLOE`"]
        pub enum SMLOEW {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SMLOEW::_0 => false,
                    SMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the SADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the SADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:9 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u16 = 1023;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                NBYTESR { bits }
            }
            #[doc = "Bits 10:29 - If SMLOE or DMLOE is set, this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."]
            #[inline(always)]
            pub fn mloff(&self) -> MLOFFR {
                let bits = {
                    const MASK: u32 = 1048575;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MLOFFR { bits }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&self) -> DMLOER {
                DMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&self) -> SMLOER {
                SMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:9 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
            #[doc = "Bits 10:29 - If SMLOE or DMLOE is set, this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."]
            #[inline(always)]
            pub fn mloff(&mut self) -> _MLOFFW {
                _MLOFFW { w: self }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&mut self) -> _DMLOEW {
                _DMLOEW { w: self }
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&mut self) -> _SMLOEW {
                _SMLOEW { w: self }
            }
        }
    }
    #[doc = "TCD Last Source Address Adjustment"]
    pub struct TCD2_SLAST {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Last Source Address Adjustment"]
    pub mod tcd2_slast {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD2_SLAST {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SLASTR {
            bits: u32,
        }
        impl SLASTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SLASTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SLASTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Last Source Address Adjustment"]
            #[inline(always)]
            pub fn slast(&self) -> SLASTR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SLASTR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Last Source Address Adjustment"]
            #[inline(always)]
            pub fn slast(&mut self) -> _SLASTW {
                _SLASTW { w: self }
            }
        }
    }
    #[doc = "TCD Destination Address"]
    pub struct TCD2_DADDR {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Destination Address"]
    pub mod tcd2_daddr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD2_DADDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DADDRR {
            bits: u32,
        }
        impl DADDRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DADDRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DADDRW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Destination Address"]
            #[inline(always)]
            pub fn daddr(&self) -> DADDRR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                DADDRR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Destination Address"]
            #[inline(always)]
            pub fn daddr(&mut self) -> _DADDRW {
                _DADDRW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Destination Address Offset"]
    pub struct TCD2_DOFF {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Signed Destination Address Offset"]
    pub mod tcd2_doff {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD2_DOFF {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DOFFR {
            bits: u16,
        }
        impl DOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:15 - Destination Address Signed Offset"]
            #[inline(always)]
            pub fn doff(&self) -> DOFFR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                DOFFR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Destination Address Signed Offset"]
            #[inline(always)]
            pub fn doff(&mut self) -> _DOFFW {
                _DOFFW { w: self }
            }
        }
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub struct TCD2_CITER_ELINKNO {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub mod tcd2_citer_elinkno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD2_CITER_ELINKNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CITERR {
            bits: u16,
        }
        impl CITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 32767;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:14 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer(&self) -> CITERR {
                let bits = {
                    const MASK: u16 = 32767;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                CITERR { bits }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:14 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer(&mut self) -> _CITERW {
                _CITERW { w: self }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub struct TCD2_CITER_ELINKYES {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub mod tcd2_citer_elinkyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD2_CITER_ELINKYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CITER_LER {
            bits: u16,
        }
        impl CITER_LER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct LINKCHR {
            bits: u8,
        }
        impl LINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CITER_LEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CITER_LEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 511;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _LINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:8 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer_le(&self) -> CITER_LER {
                let bits = {
                    const MASK: u16 = 511;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                CITER_LER { bits }
            }
            #[doc = "Bits 9:12 - Minor Loop Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&self) -> LINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                LINKCHR { bits }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:8 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer_le(&mut self) -> _CITER_LEW {
                _CITER_LEW { w: self }
            }
            #[doc = "Bits 9:12 - Minor Loop Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&mut self) -> _LINKCHW {
                _LINKCHW { w: self }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Last Destination Address Adjustment/Scatter Gather Address"]
    pub struct TCD2_DLASTSGA {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Last Destination Address Adjustment/Scatter Gather Address"]
    pub mod tcd2_dlastsga {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD2_DLASTSGA {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLASTSGAR {
            bits: u32,
        }
        impl DLASTSGAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DLASTSGAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DLASTSGAW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - DLASTSGA"]
            #[inline(always)]
            pub fn dlastsga(&self) -> DLASTSGAR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                DLASTSGAR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - DLASTSGA"]
            #[inline(always)]
            pub fn dlastsga(&mut self) -> _DLASTSGAW {
                _DLASTSGAW { w: self }
            }
        }
    }
    #[doc = "TCD Control and Status"]
    pub struct TCD2_CSR {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Control and Status"]
    pub mod tcd2_csr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD2_CSR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `START`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum STARTR {
            #[doc = "The channel is not explicitly started."]
            _0,
            #[doc = "The channel is explicitly started via a software initiated service request."]
            _1,
        }
        impl STARTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    STARTR::_0 => false,
                    STARTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> STARTR {
                match value {
                    false => STARTR::_0,
                    true => STARTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == STARTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == STARTR::_1
            }
        }
        #[doc = "Possible values of the field `INTMAJOR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INTMAJORR {
            #[doc = "The end-of-major loop interrupt is disabled."]
            _0,
            #[doc = "The end-of-major loop interrupt is enabled."]
            _1,
        }
        impl INTMAJORR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INTMAJORR::_0 => false,
                    INTMAJORR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INTMAJORR {
                match value {
                    false => INTMAJORR::_0,
                    true => INTMAJORR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INTMAJORR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INTMAJORR::_1
            }
        }
        #[doc = "Possible values of the field `INTHALF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INTHALFR {
            #[doc = "The half-point interrupt is disabled."]
            _0,
            #[doc = "The half-point interrupt is enabled."]
            _1,
        }
        impl INTHALFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INTHALFR::_0 => false,
                    INTHALFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INTHALFR {
                match value {
                    false => INTHALFR::_0,
                    true => INTHALFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INTHALFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INTHALFR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct DREQR {
            bits: bool,
        }
        impl DREQR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `ESG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ESGR {
            #[doc = "The current channel's TCD is normal format."]
            _0,
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            _1,
        }
        impl ESGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ESGR::_0 => false,
                    ESGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ESGR {
                match value {
                    false => ESGR::_0,
                    true => ESGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ESGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ESGR::_1
            }
        }
        #[doc = "Possible values of the field `MAJORELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MAJORELINKR {
            #[doc = "The channel-to-channel linking is disabled."]
            _0,
            #[doc = "The channel-to-channel linking is enabled."]
            _1,
        }
        impl MAJORELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MAJORELINKR::_0 => false,
                    MAJORELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MAJORELINKR {
                match value {
                    false => MAJORELINKR::_0,
                    true => MAJORELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MAJORELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MAJORELINKR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ACTIVER {
            bits: bool,
        }
        impl ACTIVER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct DONER {
            bits: bool,
        }
        impl DONER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MAJORLINKCHR {
            bits: u8,
        }
        impl MAJORLINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `BWC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BWCR {
            #[doc = "No eDMA engine stalls."]
            _0,
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            _10,
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            _11,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl BWCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    BWCR::_0 => 0,
                    BWCR::_10 => 2,
                    BWCR::_11 => 3,
                    BWCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> BWCR {
                match value {
                    0 => BWCR::_0,
                    2 => BWCR::_10,
                    3 => BWCR::_11,
                    i => BWCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BWCR::_0
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == BWCR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == BWCR::_11
            }
        }
        #[doc = "Values that can be written to the field `START`"]
        pub enum STARTW {
            #[doc = "The channel is not explicitly started."]
            _0,
            #[doc = "The channel is explicitly started via a software initiated service request."]
            _1,
        }
        impl STARTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    STARTW::_0 => false,
                    STARTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _STARTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _STARTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: STARTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel is not explicitly started."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(STARTW::_0)
            }
            #[doc = "The channel is explicitly started via a software initiated service request."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(STARTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INTMAJOR`"]
        pub enum INTMAJORW {
            #[doc = "The end-of-major loop interrupt is disabled."]
            _0,
            #[doc = "The end-of-major loop interrupt is enabled."]
            _1,
        }
        impl INTMAJORW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INTMAJORW::_0 => false,
                    INTMAJORW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INTMAJORW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INTMAJORW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INTMAJORW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The end-of-major loop interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INTMAJORW::_0)
            }
            #[doc = "The end-of-major loop interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INTMAJORW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INTHALF`"]
        pub enum INTHALFW {
            #[doc = "The half-point interrupt is disabled."]
            _0,
            #[doc = "The half-point interrupt is enabled."]
            _1,
        }
        impl INTHALFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INTHALFW::_0 => false,
                    INTHALFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INTHALFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INTHALFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INTHALFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The half-point interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INTHALFW::_0)
            }
            #[doc = "The half-point interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INTHALFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DREQW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DREQW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ESG`"]
        pub enum ESGW {
            #[doc = "The current channel's TCD is normal format."]
            _0,
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            _1,
        }
        impl ESGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ESGW::_0 => false,
                    ESGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ESGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ESGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ESGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The current channel's TCD is normal format."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ESGW::_0)
            }
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ESGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MAJORELINK`"]
        pub enum MAJORELINKW {
            #[doc = "The channel-to-channel linking is disabled."]
            _0,
            #[doc = "The channel-to-channel linking is enabled."]
            _1,
        }
        impl MAJORELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MAJORELINKW::_0 => false,
                    MAJORELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MAJORELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MAJORELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MAJORELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MAJORELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MAJORELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ACTIVEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ACTIVEW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DONEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DONEW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MAJORLINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MAJORLINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BWC`"]
        pub enum BWCW {
            #[doc = "No eDMA engine stalls."]
            _0,
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            _10,
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            _11,
        }
        impl BWCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    BWCW::_0 => 0,
                    BWCW::_10 => 2,
                    BWCW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BWCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BWCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BWCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "No eDMA engine stalls."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BWCW::_0)
            }
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(BWCW::_10)
            }
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(BWCW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bit 0 - Channel Start"]
            #[inline(always)]
            pub fn start(&self) -> STARTR {
                STARTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 1 - Enable an interrupt when major iteration count completes."]
            #[inline(always)]
            pub fn intmajor(&self) -> INTMAJORR {
                INTMAJORR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 2 - Enable an interrupt when major counter is half complete."]
            #[inline(always)]
            pub fn inthalf(&self) -> INTHALFR {
                INTHALFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 3 - Disable Request"]
            #[inline(always)]
            pub fn dreq(&self) -> DREQR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                DREQR { bits }
            }
            #[doc = "Bit 4 - Enable Scatter/Gather Processing"]
            #[inline(always)]
            pub fn esg(&self) -> ESGR {
                ESGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 5 - Enable channel-to-channel linking on major loop complete"]
            #[inline(always)]
            pub fn majorelink(&self) -> MAJORELINKR {
                MAJORELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 6 - Channel Active"]
            #[inline(always)]
            pub fn active(&self) -> ACTIVER {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                ACTIVER { bits }
            }
            #[doc = "Bit 7 - Channel Done"]
            #[inline(always)]
            pub fn done(&self) -> DONER {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                DONER { bits }
            }
            #[doc = "Bits 8:11 - Major Loop Link Channel Number"]
            #[inline(always)]
            pub fn majorlinkch(&self) -> MAJORLINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                MAJORLINKCHR { bits }
            }
            #[doc = "Bits 14:15 - Bandwidth Control"]
            #[inline(always)]
            pub fn bwc(&self) -> BWCR {
                BWCR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Channel Start"]
            #[inline(always)]
            pub fn start(&mut self) -> _STARTW {
                _STARTW { w: self }
            }
            #[doc = "Bit 1 - Enable an interrupt when major iteration count completes."]
            #[inline(always)]
            pub fn intmajor(&mut self) -> _INTMAJORW {
                _INTMAJORW { w: self }
            }
            #[doc = "Bit 2 - Enable an interrupt when major counter is half complete."]
            #[inline(always)]
            pub fn inthalf(&mut self) -> _INTHALFW {
                _INTHALFW { w: self }
            }
            #[doc = "Bit 3 - Disable Request"]
            #[inline(always)]
            pub fn dreq(&mut self) -> _DREQW {
                _DREQW { w: self }
            }
            #[doc = "Bit 4 - Enable Scatter/Gather Processing"]
            #[inline(always)]
            pub fn esg(&mut self) -> _ESGW {
                _ESGW { w: self }
            }
            #[doc = "Bit 5 - Enable channel-to-channel linking on major loop complete"]
            #[inline(always)]
            pub fn majorelink(&mut self) -> _MAJORELINKW {
                _MAJORELINKW { w: self }
            }
            #[doc = "Bit 6 - Channel Active"]
            #[inline(always)]
            pub fn active(&mut self) -> _ACTIVEW {
                _ACTIVEW { w: self }
            }
            #[doc = "Bit 7 - Channel Done"]
            #[inline(always)]
            pub fn done(&mut self) -> _DONEW {
                _DONEW { w: self }
            }
            #[doc = "Bits 8:11 - Major Loop Link Channel Number"]
            #[inline(always)]
            pub fn majorlinkch(&mut self) -> _MAJORLINKCHW {
                _MAJORLINKCHW { w: self }
            }
            #[doc = "Bits 14:15 - Bandwidth Control"]
            #[inline(always)]
            pub fn bwc(&mut self) -> _BWCW {
                _BWCW { w: self }
            }
        }
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub struct TCD2_BITER_ELINKNO {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub mod tcd2_biter_elinkno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD2_BITER_ELINKNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BITERR {
            bits: u16,
        }
        impl BITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _BITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 32767;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:14 - Starting Major Iteration Count"]
            #[inline(always)]
            pub fn biter(&self) -> BITERR {
                let bits = {
                    const MASK: u16 = 32767;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                BITERR { bits }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:14 - Starting Major Iteration Count"]
            #[inline(always)]
            pub fn biter(&mut self) -> _BITERW {
                _BITERW { w: self }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub struct TCD2_BITER_ELINKYES {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub mod tcd2_biter_elinkyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD2_BITER_ELINKYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BITERR {
            bits: u16,
        }
        impl BITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct LINKCHR {
            bits: u8,
        }
        impl LINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _BITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 511;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _LINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:8 - Starting major iteration count"]
            #[inline(always)]
            pub fn biter(&self) -> BITERR {
                let bits = {
                    const MASK: u16 = 511;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                BITERR { bits }
            }
            #[doc = "Bits 9:12 - Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&self) -> LINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                LINKCHR { bits }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:8 - Starting major iteration count"]
            #[inline(always)]
            pub fn biter(&mut self) -> _BITERW {
                _BITERW { w: self }
            }
            #[doc = "Bits 9:12 - Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&mut self) -> _LINKCHW {
                _LINKCHW { w: self }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Source Address"]
    pub struct TCD3_SADDR {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Source Address"]
    pub mod tcd3_saddr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD3_SADDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SADDRR {
            bits: u32,
        }
        impl SADDRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SADDRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SADDRW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Source Address"]
            #[inline(always)]
            pub fn saddr(&self) -> SADDRR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SADDRR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Source Address"]
            #[inline(always)]
            pub fn saddr(&mut self) -> _SADDRW {
                _SADDRW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Source Address Offset"]
    pub struct TCD3_SOFF {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Signed Source Address Offset"]
    pub mod tcd3_soff {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD3_SOFF {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SOFFR {
            bits: u16,
        }
        impl SOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:15 - Source address signed offset"]
            #[inline(always)]
            pub fn soff(&self) -> SOFFR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                SOFFR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Source address signed offset"]
            #[inline(always)]
            pub fn soff(&mut self) -> _SOFFW {
                _SOFFW { w: self }
            }
        }
    }
    #[doc = "TCD Transfer Attributes"]
    pub struct TCD3_ATTR {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Transfer Attributes"]
    pub mod tcd3_attr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD3_ATTR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DSIZER {
            bits: u8,
        }
        impl DSIZER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DMODR {
            bits: u8,
        }
        impl DMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `SSIZE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SSIZER {
            #[doc = "8-bit"]
            _0,
            #[doc = "16-bit"]
            _1,
            #[doc = "32-bit"]
            _10,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl SSIZER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SSIZER::_0 => 0,
                    SSIZER::_1 => 1,
                    SSIZER::_10 => 2,
                    SSIZER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SSIZER {
                match value {
                    0 => SSIZER::_0,
                    1 => SSIZER::_1,
                    2 => SSIZER::_10,
                    i => SSIZER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SSIZER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SSIZER::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == SSIZER::_10
            }
        }
        #[doc = "Possible values of the field `SMOD`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMODR {
            #[doc = "Source address modulo feature is disabled"]
            _0,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl SMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SMODR::_0 => 0,
                    SMODR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SMODR {
                match value {
                    0 => SMODR::_0,
                    i => SMODR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMODR::_0
            }
        }
        #[doc = r" Proxy"]
        pub struct _DSIZEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DSIZEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMODW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SSIZE`"]
        pub enum SSIZEW {
            #[doc = "8-bit"]
            _0,
            #[doc = "16-bit"]
            _1,
            #[doc = "32-bit"]
            _10,
        }
        impl SSIZEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SSIZEW::_0 => 0,
                    SSIZEW::_1 => 1,
                    SSIZEW::_10 => 2,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SSIZEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SSIZEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SSIZEW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "8-bit"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SSIZEW::_0)
            }
            #[doc = "16-bit"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SSIZEW::_1)
            }
            #[doc = "32-bit"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(SSIZEW::_10)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMOD`"]
        pub enum SMODW {
            #[doc = "Source address modulo feature is disabled"]
            _0,
        }
        impl SMODW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SMODW::_0 => 0,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMODW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMODW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Source address modulo feature is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMODW::_0)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:2 - Destination data transfer size"]
            #[inline(always)]
            pub fn dsize(&self) -> DSIZER {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                DSIZER { bits }
            }
            #[doc = "Bits 3:7 - Destination Address Modulo"]
            #[inline(always)]
            pub fn dmod(&self) -> DMODR {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                DMODR { bits }
            }
            #[doc = "Bits 8:10 - Source data transfer size"]
            #[inline(always)]
            pub fn ssize(&self) -> SSIZER {
                SSIZER::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
            #[doc = "Bits 11:15 - Source Address Modulo"]
            #[inline(always)]
            pub fn smod(&self) -> SMODR {
                SMODR::_from({
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:2 - Destination data transfer size"]
            #[inline(always)]
            pub fn dsize(&mut self) -> _DSIZEW {
                _DSIZEW { w: self }
            }
            #[doc = "Bits 3:7 - Destination Address Modulo"]
            #[inline(always)]
            pub fn dmod(&mut self) -> _DMODW {
                _DMODW { w: self }
            }
            #[doc = "Bits 8:10 - Source data transfer size"]
            #[inline(always)]
            pub fn ssize(&mut self) -> _SSIZEW {
                _SSIZEW { w: self }
            }
            #[doc = "Bits 11:15 - Source Address Modulo"]
            #[inline(always)]
            pub fn smod(&mut self) -> _SMODW {
                _SMODW { w: self }
            }
        }
    }
    #[doc = "TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
    pub struct TCD3_NBYTES_MLNO {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
    pub mod tcd3_nbytes_mlno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD3_NBYTES_MLNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u32,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                NBYTESR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"]
    pub struct TCD3_NBYTES_MLOFFNO {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"]
    pub mod tcd3_nbytes_mloffno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD3_NBYTES_MLOFFNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u32,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMLOER {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMLOER::_0 => false,
                    DMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMLOER {
                match value {
                    false => DMLOER::_0,
                    true => DMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMLOER::_1
            }
        }
        #[doc = "Possible values of the field `SMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMLOER {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SMLOER::_0 => false,
                    SMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SMLOER {
                match value {
                    false => SMLOER::_0,
                    true => SMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SMLOER::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 1073741823;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMLOE`"]
        pub enum DMLOEW {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMLOEW::_0 => false,
                    DMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the DADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the DADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMLOE`"]
        pub enum SMLOEW {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SMLOEW::_0 => false,
                    SMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the SADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the SADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:29 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u32 = 1073741823;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                NBYTESR { bits }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&self) -> DMLOER {
                DMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&self) -> SMLOER {
                SMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:29 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&mut self) -> _DMLOEW {
                _DMLOEW { w: self }
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&mut self) -> _SMLOEW {
                _SMLOEW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"]
    pub struct TCD3_NBYTES_MLOFFYES {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"]
    pub mod tcd3_nbytes_mloffyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD3_NBYTES_MLOFFYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u16,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct MLOFFR {
            bits: u32,
        }
        impl MLOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMLOER {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMLOER::_0 => false,
                    DMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMLOER {
                match value {
                    false => DMLOER::_0,
                    true => DMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMLOER::_1
            }
        }
        #[doc = "Possible values of the field `SMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMLOER {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SMLOER::_0 => false,
                    SMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SMLOER {
                match value {
                    false => SMLOER::_0,
                    true => SMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SMLOER::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 1023;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MLOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MLOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 1048575;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMLOE`"]
        pub enum DMLOEW {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMLOEW::_0 => false,
                    DMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the DADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the DADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMLOE`"]
        pub enum SMLOEW {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SMLOEW::_0 => false,
                    SMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the SADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the SADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:9 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u16 = 1023;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                NBYTESR { bits }
            }
            #[doc = "Bits 10:29 - If SMLOE or DMLOE is set, this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."]
            #[inline(always)]
            pub fn mloff(&self) -> MLOFFR {
                let bits = {
                    const MASK: u32 = 1048575;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MLOFFR { bits }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&self) -> DMLOER {
                DMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&self) -> SMLOER {
                SMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:9 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
            #[doc = "Bits 10:29 - If SMLOE or DMLOE is set, this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."]
            #[inline(always)]
            pub fn mloff(&mut self) -> _MLOFFW {
                _MLOFFW { w: self }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&mut self) -> _DMLOEW {
                _DMLOEW { w: self }
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&mut self) -> _SMLOEW {
                _SMLOEW { w: self }
            }
        }
    }
    #[doc = "TCD Last Source Address Adjustment"]
    pub struct TCD3_SLAST {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Last Source Address Adjustment"]
    pub mod tcd3_slast {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD3_SLAST {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SLASTR {
            bits: u32,
        }
        impl SLASTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SLASTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SLASTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Last Source Address Adjustment"]
            #[inline(always)]
            pub fn slast(&self) -> SLASTR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SLASTR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Last Source Address Adjustment"]
            #[inline(always)]
            pub fn slast(&mut self) -> _SLASTW {
                _SLASTW { w: self }
            }
        }
    }
    #[doc = "TCD Destination Address"]
    pub struct TCD3_DADDR {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Destination Address"]
    pub mod tcd3_daddr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD3_DADDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DADDRR {
            bits: u32,
        }
        impl DADDRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DADDRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DADDRW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Destination Address"]
            #[inline(always)]
            pub fn daddr(&self) -> DADDRR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                DADDRR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Destination Address"]
            #[inline(always)]
            pub fn daddr(&mut self) -> _DADDRW {
                _DADDRW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Destination Address Offset"]
    pub struct TCD3_DOFF {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Signed Destination Address Offset"]
    pub mod tcd3_doff {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD3_DOFF {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DOFFR {
            bits: u16,
        }
        impl DOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:15 - Destination Address Signed Offset"]
            #[inline(always)]
            pub fn doff(&self) -> DOFFR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                DOFFR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Destination Address Signed Offset"]
            #[inline(always)]
            pub fn doff(&mut self) -> _DOFFW {
                _DOFFW { w: self }
            }
        }
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub struct TCD3_CITER_ELINKNO {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub mod tcd3_citer_elinkno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD3_CITER_ELINKNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CITERR {
            bits: u16,
        }
        impl CITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 32767;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:14 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer(&self) -> CITERR {
                let bits = {
                    const MASK: u16 = 32767;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                CITERR { bits }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:14 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer(&mut self) -> _CITERW {
                _CITERW { w: self }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub struct TCD3_CITER_ELINKYES {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub mod tcd3_citer_elinkyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD3_CITER_ELINKYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CITER_LER {
            bits: u16,
        }
        impl CITER_LER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct LINKCHR {
            bits: u8,
        }
        impl LINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CITER_LEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CITER_LEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 511;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _LINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:8 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer_le(&self) -> CITER_LER {
                let bits = {
                    const MASK: u16 = 511;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                CITER_LER { bits }
            }
            #[doc = "Bits 9:12 - Minor Loop Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&self) -> LINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                LINKCHR { bits }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:8 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer_le(&mut self) -> _CITER_LEW {
                _CITER_LEW { w: self }
            }
            #[doc = "Bits 9:12 - Minor Loop Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&mut self) -> _LINKCHW {
                _LINKCHW { w: self }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Last Destination Address Adjustment/Scatter Gather Address"]
    pub struct TCD3_DLASTSGA {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Last Destination Address Adjustment/Scatter Gather Address"]
    pub mod tcd3_dlastsga {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD3_DLASTSGA {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLASTSGAR {
            bits: u32,
        }
        impl DLASTSGAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DLASTSGAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DLASTSGAW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - DLASTSGA"]
            #[inline(always)]
            pub fn dlastsga(&self) -> DLASTSGAR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                DLASTSGAR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - DLASTSGA"]
            #[inline(always)]
            pub fn dlastsga(&mut self) -> _DLASTSGAW {
                _DLASTSGAW { w: self }
            }
        }
    }
    #[doc = "TCD Control and Status"]
    pub struct TCD3_CSR {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Control and Status"]
    pub mod tcd3_csr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD3_CSR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `START`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum STARTR {
            #[doc = "The channel is not explicitly started."]
            _0,
            #[doc = "The channel is explicitly started via a software initiated service request."]
            _1,
        }
        impl STARTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    STARTR::_0 => false,
                    STARTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> STARTR {
                match value {
                    false => STARTR::_0,
                    true => STARTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == STARTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == STARTR::_1
            }
        }
        #[doc = "Possible values of the field `INTMAJOR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INTMAJORR {
            #[doc = "The end-of-major loop interrupt is disabled."]
            _0,
            #[doc = "The end-of-major loop interrupt is enabled."]
            _1,
        }
        impl INTMAJORR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INTMAJORR::_0 => false,
                    INTMAJORR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INTMAJORR {
                match value {
                    false => INTMAJORR::_0,
                    true => INTMAJORR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INTMAJORR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INTMAJORR::_1
            }
        }
        #[doc = "Possible values of the field `INTHALF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INTHALFR {
            #[doc = "The half-point interrupt is disabled."]
            _0,
            #[doc = "The half-point interrupt is enabled."]
            _1,
        }
        impl INTHALFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INTHALFR::_0 => false,
                    INTHALFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INTHALFR {
                match value {
                    false => INTHALFR::_0,
                    true => INTHALFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INTHALFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INTHALFR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct DREQR {
            bits: bool,
        }
        impl DREQR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `ESG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ESGR {
            #[doc = "The current channel's TCD is normal format."]
            _0,
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            _1,
        }
        impl ESGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ESGR::_0 => false,
                    ESGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ESGR {
                match value {
                    false => ESGR::_0,
                    true => ESGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ESGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ESGR::_1
            }
        }
        #[doc = "Possible values of the field `MAJORELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MAJORELINKR {
            #[doc = "The channel-to-channel linking is disabled."]
            _0,
            #[doc = "The channel-to-channel linking is enabled."]
            _1,
        }
        impl MAJORELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MAJORELINKR::_0 => false,
                    MAJORELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MAJORELINKR {
                match value {
                    false => MAJORELINKR::_0,
                    true => MAJORELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MAJORELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MAJORELINKR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ACTIVER {
            bits: bool,
        }
        impl ACTIVER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct DONER {
            bits: bool,
        }
        impl DONER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MAJORLINKCHR {
            bits: u8,
        }
        impl MAJORLINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `BWC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BWCR {
            #[doc = "No eDMA engine stalls."]
            _0,
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            _10,
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            _11,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl BWCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    BWCR::_0 => 0,
                    BWCR::_10 => 2,
                    BWCR::_11 => 3,
                    BWCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> BWCR {
                match value {
                    0 => BWCR::_0,
                    2 => BWCR::_10,
                    3 => BWCR::_11,
                    i => BWCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BWCR::_0
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == BWCR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == BWCR::_11
            }
        }
        #[doc = "Values that can be written to the field `START`"]
        pub enum STARTW {
            #[doc = "The channel is not explicitly started."]
            _0,
            #[doc = "The channel is explicitly started via a software initiated service request."]
            _1,
        }
        impl STARTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    STARTW::_0 => false,
                    STARTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _STARTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _STARTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: STARTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel is not explicitly started."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(STARTW::_0)
            }
            #[doc = "The channel is explicitly started via a software initiated service request."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(STARTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INTMAJOR`"]
        pub enum INTMAJORW {
            #[doc = "The end-of-major loop interrupt is disabled."]
            _0,
            #[doc = "The end-of-major loop interrupt is enabled."]
            _1,
        }
        impl INTMAJORW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INTMAJORW::_0 => false,
                    INTMAJORW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INTMAJORW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INTMAJORW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INTMAJORW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The end-of-major loop interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INTMAJORW::_0)
            }
            #[doc = "The end-of-major loop interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INTMAJORW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INTHALF`"]
        pub enum INTHALFW {
            #[doc = "The half-point interrupt is disabled."]
            _0,
            #[doc = "The half-point interrupt is enabled."]
            _1,
        }
        impl INTHALFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INTHALFW::_0 => false,
                    INTHALFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INTHALFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INTHALFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INTHALFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The half-point interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INTHALFW::_0)
            }
            #[doc = "The half-point interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INTHALFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DREQW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DREQW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ESG`"]
        pub enum ESGW {
            #[doc = "The current channel's TCD is normal format."]
            _0,
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            _1,
        }
        impl ESGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ESGW::_0 => false,
                    ESGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ESGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ESGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ESGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The current channel's TCD is normal format."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ESGW::_0)
            }
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ESGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MAJORELINK`"]
        pub enum MAJORELINKW {
            #[doc = "The channel-to-channel linking is disabled."]
            _0,
            #[doc = "The channel-to-channel linking is enabled."]
            _1,
        }
        impl MAJORELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MAJORELINKW::_0 => false,
                    MAJORELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MAJORELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MAJORELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MAJORELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MAJORELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MAJORELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ACTIVEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ACTIVEW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DONEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DONEW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MAJORLINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MAJORLINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BWC`"]
        pub enum BWCW {
            #[doc = "No eDMA engine stalls."]
            _0,
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            _10,
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            _11,
        }
        impl BWCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    BWCW::_0 => 0,
                    BWCW::_10 => 2,
                    BWCW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BWCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BWCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BWCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "No eDMA engine stalls."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BWCW::_0)
            }
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(BWCW::_10)
            }
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(BWCW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bit 0 - Channel Start"]
            #[inline(always)]
            pub fn start(&self) -> STARTR {
                STARTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 1 - Enable an interrupt when major iteration count completes."]
            #[inline(always)]
            pub fn intmajor(&self) -> INTMAJORR {
                INTMAJORR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 2 - Enable an interrupt when major counter is half complete."]
            #[inline(always)]
            pub fn inthalf(&self) -> INTHALFR {
                INTHALFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 3 - Disable Request"]
            #[inline(always)]
            pub fn dreq(&self) -> DREQR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                DREQR { bits }
            }
            #[doc = "Bit 4 - Enable Scatter/Gather Processing"]
            #[inline(always)]
            pub fn esg(&self) -> ESGR {
                ESGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 5 - Enable channel-to-channel linking on major loop complete"]
            #[inline(always)]
            pub fn majorelink(&self) -> MAJORELINKR {
                MAJORELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 6 - Channel Active"]
            #[inline(always)]
            pub fn active(&self) -> ACTIVER {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                ACTIVER { bits }
            }
            #[doc = "Bit 7 - Channel Done"]
            #[inline(always)]
            pub fn done(&self) -> DONER {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                DONER { bits }
            }
            #[doc = "Bits 8:11 - Major Loop Link Channel Number"]
            #[inline(always)]
            pub fn majorlinkch(&self) -> MAJORLINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                MAJORLINKCHR { bits }
            }
            #[doc = "Bits 14:15 - Bandwidth Control"]
            #[inline(always)]
            pub fn bwc(&self) -> BWCR {
                BWCR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Channel Start"]
            #[inline(always)]
            pub fn start(&mut self) -> _STARTW {
                _STARTW { w: self }
            }
            #[doc = "Bit 1 - Enable an interrupt when major iteration count completes."]
            #[inline(always)]
            pub fn intmajor(&mut self) -> _INTMAJORW {
                _INTMAJORW { w: self }
            }
            #[doc = "Bit 2 - Enable an interrupt when major counter is half complete."]
            #[inline(always)]
            pub fn inthalf(&mut self) -> _INTHALFW {
                _INTHALFW { w: self }
            }
            #[doc = "Bit 3 - Disable Request"]
            #[inline(always)]
            pub fn dreq(&mut self) -> _DREQW {
                _DREQW { w: self }
            }
            #[doc = "Bit 4 - Enable Scatter/Gather Processing"]
            #[inline(always)]
            pub fn esg(&mut self) -> _ESGW {
                _ESGW { w: self }
            }
            #[doc = "Bit 5 - Enable channel-to-channel linking on major loop complete"]
            #[inline(always)]
            pub fn majorelink(&mut self) -> _MAJORELINKW {
                _MAJORELINKW { w: self }
            }
            #[doc = "Bit 6 - Channel Active"]
            #[inline(always)]
            pub fn active(&mut self) -> _ACTIVEW {
                _ACTIVEW { w: self }
            }
            #[doc = "Bit 7 - Channel Done"]
            #[inline(always)]
            pub fn done(&mut self) -> _DONEW {
                _DONEW { w: self }
            }
            #[doc = "Bits 8:11 - Major Loop Link Channel Number"]
            #[inline(always)]
            pub fn majorlinkch(&mut self) -> _MAJORLINKCHW {
                _MAJORLINKCHW { w: self }
            }
            #[doc = "Bits 14:15 - Bandwidth Control"]
            #[inline(always)]
            pub fn bwc(&mut self) -> _BWCW {
                _BWCW { w: self }
            }
        }
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub struct TCD3_BITER_ELINKNO {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub mod tcd3_biter_elinkno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD3_BITER_ELINKNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BITERR {
            bits: u16,
        }
        impl BITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _BITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 32767;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:14 - Starting Major Iteration Count"]
            #[inline(always)]
            pub fn biter(&self) -> BITERR {
                let bits = {
                    const MASK: u16 = 32767;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                BITERR { bits }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:14 - Starting Major Iteration Count"]
            #[inline(always)]
            pub fn biter(&mut self) -> _BITERW {
                _BITERW { w: self }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub struct TCD3_BITER_ELINKYES {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub mod tcd3_biter_elinkyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD3_BITER_ELINKYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BITERR {
            bits: u16,
        }
        impl BITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct LINKCHR {
            bits: u8,
        }
        impl LINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _BITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 511;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _LINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:8 - Starting major iteration count"]
            #[inline(always)]
            pub fn biter(&self) -> BITERR {
                let bits = {
                    const MASK: u16 = 511;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                BITERR { bits }
            }
            #[doc = "Bits 9:12 - Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&self) -> LINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                LINKCHR { bits }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:8 - Starting major iteration count"]
            #[inline(always)]
            pub fn biter(&mut self) -> _BITERW {
                _BITERW { w: self }
            }
            #[doc = "Bits 9:12 - Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&mut self) -> _LINKCHW {
                _LINKCHW { w: self }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Source Address"]
    pub struct TCD4_SADDR {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Source Address"]
    pub mod tcd4_saddr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD4_SADDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SADDRR {
            bits: u32,
        }
        impl SADDRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SADDRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SADDRW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Source Address"]
            #[inline(always)]
            pub fn saddr(&self) -> SADDRR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SADDRR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Source Address"]
            #[inline(always)]
            pub fn saddr(&mut self) -> _SADDRW {
                _SADDRW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Source Address Offset"]
    pub struct TCD4_SOFF {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Signed Source Address Offset"]
    pub mod tcd4_soff {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD4_SOFF {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SOFFR {
            bits: u16,
        }
        impl SOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:15 - Source address signed offset"]
            #[inline(always)]
            pub fn soff(&self) -> SOFFR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                SOFFR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Source address signed offset"]
            #[inline(always)]
            pub fn soff(&mut self) -> _SOFFW {
                _SOFFW { w: self }
            }
        }
    }
    #[doc = "TCD Transfer Attributes"]
    pub struct TCD4_ATTR {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Transfer Attributes"]
    pub mod tcd4_attr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD4_ATTR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DSIZER {
            bits: u8,
        }
        impl DSIZER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DMODR {
            bits: u8,
        }
        impl DMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `SSIZE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SSIZER {
            #[doc = "8-bit"]
            _0,
            #[doc = "16-bit"]
            _1,
            #[doc = "32-bit"]
            _10,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl SSIZER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SSIZER::_0 => 0,
                    SSIZER::_1 => 1,
                    SSIZER::_10 => 2,
                    SSIZER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SSIZER {
                match value {
                    0 => SSIZER::_0,
                    1 => SSIZER::_1,
                    2 => SSIZER::_10,
                    i => SSIZER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SSIZER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SSIZER::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == SSIZER::_10
            }
        }
        #[doc = "Possible values of the field `SMOD`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMODR {
            #[doc = "Source address modulo feature is disabled"]
            _0,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl SMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SMODR::_0 => 0,
                    SMODR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SMODR {
                match value {
                    0 => SMODR::_0,
                    i => SMODR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMODR::_0
            }
        }
        #[doc = r" Proxy"]
        pub struct _DSIZEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DSIZEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMODW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SSIZE`"]
        pub enum SSIZEW {
            #[doc = "8-bit"]
            _0,
            #[doc = "16-bit"]
            _1,
            #[doc = "32-bit"]
            _10,
        }
        impl SSIZEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SSIZEW::_0 => 0,
                    SSIZEW::_1 => 1,
                    SSIZEW::_10 => 2,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SSIZEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SSIZEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SSIZEW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "8-bit"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SSIZEW::_0)
            }
            #[doc = "16-bit"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SSIZEW::_1)
            }
            #[doc = "32-bit"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(SSIZEW::_10)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMOD`"]
        pub enum SMODW {
            #[doc = "Source address modulo feature is disabled"]
            _0,
        }
        impl SMODW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SMODW::_0 => 0,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMODW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMODW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Source address modulo feature is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMODW::_0)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:2 - Destination data transfer size"]
            #[inline(always)]
            pub fn dsize(&self) -> DSIZER {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                DSIZER { bits }
            }
            #[doc = "Bits 3:7 - Destination Address Modulo"]
            #[inline(always)]
            pub fn dmod(&self) -> DMODR {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                DMODR { bits }
            }
            #[doc = "Bits 8:10 - Source data transfer size"]
            #[inline(always)]
            pub fn ssize(&self) -> SSIZER {
                SSIZER::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
            #[doc = "Bits 11:15 - Source Address Modulo"]
            #[inline(always)]
            pub fn smod(&self) -> SMODR {
                SMODR::_from({
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:2 - Destination data transfer size"]
            #[inline(always)]
            pub fn dsize(&mut self) -> _DSIZEW {
                _DSIZEW { w: self }
            }
            #[doc = "Bits 3:7 - Destination Address Modulo"]
            #[inline(always)]
            pub fn dmod(&mut self) -> _DMODW {
                _DMODW { w: self }
            }
            #[doc = "Bits 8:10 - Source data transfer size"]
            #[inline(always)]
            pub fn ssize(&mut self) -> _SSIZEW {
                _SSIZEW { w: self }
            }
            #[doc = "Bits 11:15 - Source Address Modulo"]
            #[inline(always)]
            pub fn smod(&mut self) -> _SMODW {
                _SMODW { w: self }
            }
        }
    }
    #[doc = "TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
    pub struct TCD4_NBYTES_MLNO {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
    pub mod tcd4_nbytes_mlno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD4_NBYTES_MLNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u32,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                NBYTESR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"]
    pub struct TCD4_NBYTES_MLOFFNO {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"]
    pub mod tcd4_nbytes_mloffno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD4_NBYTES_MLOFFNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u32,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMLOER {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMLOER::_0 => false,
                    DMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMLOER {
                match value {
                    false => DMLOER::_0,
                    true => DMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMLOER::_1
            }
        }
        #[doc = "Possible values of the field `SMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMLOER {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SMLOER::_0 => false,
                    SMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SMLOER {
                match value {
                    false => SMLOER::_0,
                    true => SMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SMLOER::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 1073741823;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMLOE`"]
        pub enum DMLOEW {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMLOEW::_0 => false,
                    DMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the DADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the DADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMLOE`"]
        pub enum SMLOEW {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SMLOEW::_0 => false,
                    SMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the SADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the SADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:29 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u32 = 1073741823;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                NBYTESR { bits }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&self) -> DMLOER {
                DMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&self) -> SMLOER {
                SMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:29 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&mut self) -> _DMLOEW {
                _DMLOEW { w: self }
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&mut self) -> _SMLOEW {
                _SMLOEW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"]
    pub struct TCD4_NBYTES_MLOFFYES {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"]
    pub mod tcd4_nbytes_mloffyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD4_NBYTES_MLOFFYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u16,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct MLOFFR {
            bits: u32,
        }
        impl MLOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMLOER {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMLOER::_0 => false,
                    DMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMLOER {
                match value {
                    false => DMLOER::_0,
                    true => DMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMLOER::_1
            }
        }
        #[doc = "Possible values of the field `SMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMLOER {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SMLOER::_0 => false,
                    SMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SMLOER {
                match value {
                    false => SMLOER::_0,
                    true => SMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SMLOER::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 1023;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MLOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MLOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 1048575;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMLOE`"]
        pub enum DMLOEW {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMLOEW::_0 => false,
                    DMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the DADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the DADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMLOE`"]
        pub enum SMLOEW {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SMLOEW::_0 => false,
                    SMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the SADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the SADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:9 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u16 = 1023;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                NBYTESR { bits }
            }
            #[doc = "Bits 10:29 - If SMLOE or DMLOE is set, this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."]
            #[inline(always)]
            pub fn mloff(&self) -> MLOFFR {
                let bits = {
                    const MASK: u32 = 1048575;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MLOFFR { bits }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&self) -> DMLOER {
                DMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&self) -> SMLOER {
                SMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:9 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
            #[doc = "Bits 10:29 - If SMLOE or DMLOE is set, this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."]
            #[inline(always)]
            pub fn mloff(&mut self) -> _MLOFFW {
                _MLOFFW { w: self }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&mut self) -> _DMLOEW {
                _DMLOEW { w: self }
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&mut self) -> _SMLOEW {
                _SMLOEW { w: self }
            }
        }
    }
    #[doc = "TCD Last Source Address Adjustment"]
    pub struct TCD4_SLAST {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Last Source Address Adjustment"]
    pub mod tcd4_slast {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD4_SLAST {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SLASTR {
            bits: u32,
        }
        impl SLASTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SLASTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SLASTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Last Source Address Adjustment"]
            #[inline(always)]
            pub fn slast(&self) -> SLASTR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SLASTR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Last Source Address Adjustment"]
            #[inline(always)]
            pub fn slast(&mut self) -> _SLASTW {
                _SLASTW { w: self }
            }
        }
    }
    #[doc = "TCD Destination Address"]
    pub struct TCD4_DADDR {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Destination Address"]
    pub mod tcd4_daddr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD4_DADDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DADDRR {
            bits: u32,
        }
        impl DADDRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DADDRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DADDRW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Destination Address"]
            #[inline(always)]
            pub fn daddr(&self) -> DADDRR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                DADDRR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Destination Address"]
            #[inline(always)]
            pub fn daddr(&mut self) -> _DADDRW {
                _DADDRW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Destination Address Offset"]
    pub struct TCD4_DOFF {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Signed Destination Address Offset"]
    pub mod tcd4_doff {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD4_DOFF {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DOFFR {
            bits: u16,
        }
        impl DOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:15 - Destination Address Signed Offset"]
            #[inline(always)]
            pub fn doff(&self) -> DOFFR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                DOFFR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Destination Address Signed Offset"]
            #[inline(always)]
            pub fn doff(&mut self) -> _DOFFW {
                _DOFFW { w: self }
            }
        }
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub struct TCD4_CITER_ELINKNO {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub mod tcd4_citer_elinkno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD4_CITER_ELINKNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CITERR {
            bits: u16,
        }
        impl CITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 32767;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:14 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer(&self) -> CITERR {
                let bits = {
                    const MASK: u16 = 32767;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                CITERR { bits }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:14 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer(&mut self) -> _CITERW {
                _CITERW { w: self }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub struct TCD4_CITER_ELINKYES {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub mod tcd4_citer_elinkyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD4_CITER_ELINKYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CITER_LER {
            bits: u16,
        }
        impl CITER_LER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct LINKCHR {
            bits: u8,
        }
        impl LINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CITER_LEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CITER_LEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 511;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _LINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:8 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer_le(&self) -> CITER_LER {
                let bits = {
                    const MASK: u16 = 511;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                CITER_LER { bits }
            }
            #[doc = "Bits 9:12 - Minor Loop Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&self) -> LINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                LINKCHR { bits }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:8 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer_le(&mut self) -> _CITER_LEW {
                _CITER_LEW { w: self }
            }
            #[doc = "Bits 9:12 - Minor Loop Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&mut self) -> _LINKCHW {
                _LINKCHW { w: self }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Last Destination Address Adjustment/Scatter Gather Address"]
    pub struct TCD4_DLASTSGA {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Last Destination Address Adjustment/Scatter Gather Address"]
    pub mod tcd4_dlastsga {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD4_DLASTSGA {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLASTSGAR {
            bits: u32,
        }
        impl DLASTSGAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DLASTSGAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DLASTSGAW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - DLASTSGA"]
            #[inline(always)]
            pub fn dlastsga(&self) -> DLASTSGAR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                DLASTSGAR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - DLASTSGA"]
            #[inline(always)]
            pub fn dlastsga(&mut self) -> _DLASTSGAW {
                _DLASTSGAW { w: self }
            }
        }
    }
    #[doc = "TCD Control and Status"]
    pub struct TCD4_CSR {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Control and Status"]
    pub mod tcd4_csr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD4_CSR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `START`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum STARTR {
            #[doc = "The channel is not explicitly started."]
            _0,
            #[doc = "The channel is explicitly started via a software initiated service request."]
            _1,
        }
        impl STARTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    STARTR::_0 => false,
                    STARTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> STARTR {
                match value {
                    false => STARTR::_0,
                    true => STARTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == STARTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == STARTR::_1
            }
        }
        #[doc = "Possible values of the field `INTMAJOR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INTMAJORR {
            #[doc = "The end-of-major loop interrupt is disabled."]
            _0,
            #[doc = "The end-of-major loop interrupt is enabled."]
            _1,
        }
        impl INTMAJORR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INTMAJORR::_0 => false,
                    INTMAJORR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INTMAJORR {
                match value {
                    false => INTMAJORR::_0,
                    true => INTMAJORR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INTMAJORR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INTMAJORR::_1
            }
        }
        #[doc = "Possible values of the field `INTHALF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INTHALFR {
            #[doc = "The half-point interrupt is disabled."]
            _0,
            #[doc = "The half-point interrupt is enabled."]
            _1,
        }
        impl INTHALFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INTHALFR::_0 => false,
                    INTHALFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INTHALFR {
                match value {
                    false => INTHALFR::_0,
                    true => INTHALFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INTHALFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INTHALFR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct DREQR {
            bits: bool,
        }
        impl DREQR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `ESG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ESGR {
            #[doc = "The current channel's TCD is normal format."]
            _0,
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            _1,
        }
        impl ESGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ESGR::_0 => false,
                    ESGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ESGR {
                match value {
                    false => ESGR::_0,
                    true => ESGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ESGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ESGR::_1
            }
        }
        #[doc = "Possible values of the field `MAJORELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MAJORELINKR {
            #[doc = "The channel-to-channel linking is disabled."]
            _0,
            #[doc = "The channel-to-channel linking is enabled."]
            _1,
        }
        impl MAJORELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MAJORELINKR::_0 => false,
                    MAJORELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MAJORELINKR {
                match value {
                    false => MAJORELINKR::_0,
                    true => MAJORELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MAJORELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MAJORELINKR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ACTIVER {
            bits: bool,
        }
        impl ACTIVER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct DONER {
            bits: bool,
        }
        impl DONER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MAJORLINKCHR {
            bits: u8,
        }
        impl MAJORLINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `BWC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BWCR {
            #[doc = "No eDMA engine stalls."]
            _0,
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            _10,
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            _11,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl BWCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    BWCR::_0 => 0,
                    BWCR::_10 => 2,
                    BWCR::_11 => 3,
                    BWCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> BWCR {
                match value {
                    0 => BWCR::_0,
                    2 => BWCR::_10,
                    3 => BWCR::_11,
                    i => BWCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BWCR::_0
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == BWCR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == BWCR::_11
            }
        }
        #[doc = "Values that can be written to the field `START`"]
        pub enum STARTW {
            #[doc = "The channel is not explicitly started."]
            _0,
            #[doc = "The channel is explicitly started via a software initiated service request."]
            _1,
        }
        impl STARTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    STARTW::_0 => false,
                    STARTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _STARTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _STARTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: STARTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel is not explicitly started."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(STARTW::_0)
            }
            #[doc = "The channel is explicitly started via a software initiated service request."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(STARTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INTMAJOR`"]
        pub enum INTMAJORW {
            #[doc = "The end-of-major loop interrupt is disabled."]
            _0,
            #[doc = "The end-of-major loop interrupt is enabled."]
            _1,
        }
        impl INTMAJORW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INTMAJORW::_0 => false,
                    INTMAJORW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INTMAJORW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INTMAJORW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INTMAJORW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The end-of-major loop interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INTMAJORW::_0)
            }
            #[doc = "The end-of-major loop interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INTMAJORW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INTHALF`"]
        pub enum INTHALFW {
            #[doc = "The half-point interrupt is disabled."]
            _0,
            #[doc = "The half-point interrupt is enabled."]
            _1,
        }
        impl INTHALFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INTHALFW::_0 => false,
                    INTHALFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INTHALFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INTHALFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INTHALFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The half-point interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INTHALFW::_0)
            }
            #[doc = "The half-point interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INTHALFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DREQW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DREQW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ESG`"]
        pub enum ESGW {
            #[doc = "The current channel's TCD is normal format."]
            _0,
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            _1,
        }
        impl ESGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ESGW::_0 => false,
                    ESGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ESGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ESGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ESGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The current channel's TCD is normal format."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ESGW::_0)
            }
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ESGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MAJORELINK`"]
        pub enum MAJORELINKW {
            #[doc = "The channel-to-channel linking is disabled."]
            _0,
            #[doc = "The channel-to-channel linking is enabled."]
            _1,
        }
        impl MAJORELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MAJORELINKW::_0 => false,
                    MAJORELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MAJORELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MAJORELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MAJORELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MAJORELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MAJORELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ACTIVEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ACTIVEW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DONEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DONEW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MAJORLINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MAJORLINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BWC`"]
        pub enum BWCW {
            #[doc = "No eDMA engine stalls."]
            _0,
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            _10,
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            _11,
        }
        impl BWCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    BWCW::_0 => 0,
                    BWCW::_10 => 2,
                    BWCW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BWCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BWCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BWCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "No eDMA engine stalls."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BWCW::_0)
            }
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(BWCW::_10)
            }
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(BWCW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bit 0 - Channel Start"]
            #[inline(always)]
            pub fn start(&self) -> STARTR {
                STARTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 1 - Enable an interrupt when major iteration count completes."]
            #[inline(always)]
            pub fn intmajor(&self) -> INTMAJORR {
                INTMAJORR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 2 - Enable an interrupt when major counter is half complete."]
            #[inline(always)]
            pub fn inthalf(&self) -> INTHALFR {
                INTHALFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 3 - Disable Request"]
            #[inline(always)]
            pub fn dreq(&self) -> DREQR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                DREQR { bits }
            }
            #[doc = "Bit 4 - Enable Scatter/Gather Processing"]
            #[inline(always)]
            pub fn esg(&self) -> ESGR {
                ESGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 5 - Enable channel-to-channel linking on major loop complete"]
            #[inline(always)]
            pub fn majorelink(&self) -> MAJORELINKR {
                MAJORELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 6 - Channel Active"]
            #[inline(always)]
            pub fn active(&self) -> ACTIVER {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                ACTIVER { bits }
            }
            #[doc = "Bit 7 - Channel Done"]
            #[inline(always)]
            pub fn done(&self) -> DONER {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                DONER { bits }
            }
            #[doc = "Bits 8:11 - Major Loop Link Channel Number"]
            #[inline(always)]
            pub fn majorlinkch(&self) -> MAJORLINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                MAJORLINKCHR { bits }
            }
            #[doc = "Bits 14:15 - Bandwidth Control"]
            #[inline(always)]
            pub fn bwc(&self) -> BWCR {
                BWCR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Channel Start"]
            #[inline(always)]
            pub fn start(&mut self) -> _STARTW {
                _STARTW { w: self }
            }
            #[doc = "Bit 1 - Enable an interrupt when major iteration count completes."]
            #[inline(always)]
            pub fn intmajor(&mut self) -> _INTMAJORW {
                _INTMAJORW { w: self }
            }
            #[doc = "Bit 2 - Enable an interrupt when major counter is half complete."]
            #[inline(always)]
            pub fn inthalf(&mut self) -> _INTHALFW {
                _INTHALFW { w: self }
            }
            #[doc = "Bit 3 - Disable Request"]
            #[inline(always)]
            pub fn dreq(&mut self) -> _DREQW {
                _DREQW { w: self }
            }
            #[doc = "Bit 4 - Enable Scatter/Gather Processing"]
            #[inline(always)]
            pub fn esg(&mut self) -> _ESGW {
                _ESGW { w: self }
            }
            #[doc = "Bit 5 - Enable channel-to-channel linking on major loop complete"]
            #[inline(always)]
            pub fn majorelink(&mut self) -> _MAJORELINKW {
                _MAJORELINKW { w: self }
            }
            #[doc = "Bit 6 - Channel Active"]
            #[inline(always)]
            pub fn active(&mut self) -> _ACTIVEW {
                _ACTIVEW { w: self }
            }
            #[doc = "Bit 7 - Channel Done"]
            #[inline(always)]
            pub fn done(&mut self) -> _DONEW {
                _DONEW { w: self }
            }
            #[doc = "Bits 8:11 - Major Loop Link Channel Number"]
            #[inline(always)]
            pub fn majorlinkch(&mut self) -> _MAJORLINKCHW {
                _MAJORLINKCHW { w: self }
            }
            #[doc = "Bits 14:15 - Bandwidth Control"]
            #[inline(always)]
            pub fn bwc(&mut self) -> _BWCW {
                _BWCW { w: self }
            }
        }
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub struct TCD4_BITER_ELINKNO {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub mod tcd4_biter_elinkno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD4_BITER_ELINKNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BITERR {
            bits: u16,
        }
        impl BITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _BITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 32767;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:14 - Starting Major Iteration Count"]
            #[inline(always)]
            pub fn biter(&self) -> BITERR {
                let bits = {
                    const MASK: u16 = 32767;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                BITERR { bits }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:14 - Starting Major Iteration Count"]
            #[inline(always)]
            pub fn biter(&mut self) -> _BITERW {
                _BITERW { w: self }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub struct TCD4_BITER_ELINKYES {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub mod tcd4_biter_elinkyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD4_BITER_ELINKYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BITERR {
            bits: u16,
        }
        impl BITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct LINKCHR {
            bits: u8,
        }
        impl LINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _BITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 511;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _LINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:8 - Starting major iteration count"]
            #[inline(always)]
            pub fn biter(&self) -> BITERR {
                let bits = {
                    const MASK: u16 = 511;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                BITERR { bits }
            }
            #[doc = "Bits 9:12 - Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&self) -> LINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                LINKCHR { bits }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:8 - Starting major iteration count"]
            #[inline(always)]
            pub fn biter(&mut self) -> _BITERW {
                _BITERW { w: self }
            }
            #[doc = "Bits 9:12 - Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&mut self) -> _LINKCHW {
                _LINKCHW { w: self }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Source Address"]
    pub struct TCD5_SADDR {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Source Address"]
    pub mod tcd5_saddr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD5_SADDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SADDRR {
            bits: u32,
        }
        impl SADDRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SADDRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SADDRW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Source Address"]
            #[inline(always)]
            pub fn saddr(&self) -> SADDRR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SADDRR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Source Address"]
            #[inline(always)]
            pub fn saddr(&mut self) -> _SADDRW {
                _SADDRW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Source Address Offset"]
    pub struct TCD5_SOFF {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Signed Source Address Offset"]
    pub mod tcd5_soff {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD5_SOFF {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SOFFR {
            bits: u16,
        }
        impl SOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:15 - Source address signed offset"]
            #[inline(always)]
            pub fn soff(&self) -> SOFFR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                SOFFR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Source address signed offset"]
            #[inline(always)]
            pub fn soff(&mut self) -> _SOFFW {
                _SOFFW { w: self }
            }
        }
    }
    #[doc = "TCD Transfer Attributes"]
    pub struct TCD5_ATTR {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Transfer Attributes"]
    pub mod tcd5_attr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD5_ATTR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DSIZER {
            bits: u8,
        }
        impl DSIZER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DMODR {
            bits: u8,
        }
        impl DMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `SSIZE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SSIZER {
            #[doc = "8-bit"]
            _0,
            #[doc = "16-bit"]
            _1,
            #[doc = "32-bit"]
            _10,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl SSIZER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SSIZER::_0 => 0,
                    SSIZER::_1 => 1,
                    SSIZER::_10 => 2,
                    SSIZER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SSIZER {
                match value {
                    0 => SSIZER::_0,
                    1 => SSIZER::_1,
                    2 => SSIZER::_10,
                    i => SSIZER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SSIZER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SSIZER::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == SSIZER::_10
            }
        }
        #[doc = "Possible values of the field `SMOD`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMODR {
            #[doc = "Source address modulo feature is disabled"]
            _0,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl SMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SMODR::_0 => 0,
                    SMODR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SMODR {
                match value {
                    0 => SMODR::_0,
                    i => SMODR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMODR::_0
            }
        }
        #[doc = r" Proxy"]
        pub struct _DSIZEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DSIZEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMODW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SSIZE`"]
        pub enum SSIZEW {
            #[doc = "8-bit"]
            _0,
            #[doc = "16-bit"]
            _1,
            #[doc = "32-bit"]
            _10,
        }
        impl SSIZEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SSIZEW::_0 => 0,
                    SSIZEW::_1 => 1,
                    SSIZEW::_10 => 2,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SSIZEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SSIZEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SSIZEW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "8-bit"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SSIZEW::_0)
            }
            #[doc = "16-bit"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SSIZEW::_1)
            }
            #[doc = "32-bit"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(SSIZEW::_10)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMOD`"]
        pub enum SMODW {
            #[doc = "Source address modulo feature is disabled"]
            _0,
        }
        impl SMODW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SMODW::_0 => 0,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMODW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMODW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Source address modulo feature is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMODW::_0)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:2 - Destination data transfer size"]
            #[inline(always)]
            pub fn dsize(&self) -> DSIZER {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                DSIZER { bits }
            }
            #[doc = "Bits 3:7 - Destination Address Modulo"]
            #[inline(always)]
            pub fn dmod(&self) -> DMODR {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                DMODR { bits }
            }
            #[doc = "Bits 8:10 - Source data transfer size"]
            #[inline(always)]
            pub fn ssize(&self) -> SSIZER {
                SSIZER::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
            #[doc = "Bits 11:15 - Source Address Modulo"]
            #[inline(always)]
            pub fn smod(&self) -> SMODR {
                SMODR::_from({
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:2 - Destination data transfer size"]
            #[inline(always)]
            pub fn dsize(&mut self) -> _DSIZEW {
                _DSIZEW { w: self }
            }
            #[doc = "Bits 3:7 - Destination Address Modulo"]
            #[inline(always)]
            pub fn dmod(&mut self) -> _DMODW {
                _DMODW { w: self }
            }
            #[doc = "Bits 8:10 - Source data transfer size"]
            #[inline(always)]
            pub fn ssize(&mut self) -> _SSIZEW {
                _SSIZEW { w: self }
            }
            #[doc = "Bits 11:15 - Source Address Modulo"]
            #[inline(always)]
            pub fn smod(&mut self) -> _SMODW {
                _SMODW { w: self }
            }
        }
    }
    #[doc = "TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
    pub struct TCD5_NBYTES_MLNO {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
    pub mod tcd5_nbytes_mlno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD5_NBYTES_MLNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u32,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                NBYTESR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"]
    pub struct TCD5_NBYTES_MLOFFNO {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"]
    pub mod tcd5_nbytes_mloffno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD5_NBYTES_MLOFFNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u32,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMLOER {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMLOER::_0 => false,
                    DMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMLOER {
                match value {
                    false => DMLOER::_0,
                    true => DMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMLOER::_1
            }
        }
        #[doc = "Possible values of the field `SMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMLOER {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SMLOER::_0 => false,
                    SMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SMLOER {
                match value {
                    false => SMLOER::_0,
                    true => SMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SMLOER::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 1073741823;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMLOE`"]
        pub enum DMLOEW {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMLOEW::_0 => false,
                    DMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the DADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the DADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMLOE`"]
        pub enum SMLOEW {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SMLOEW::_0 => false,
                    SMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the SADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the SADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:29 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u32 = 1073741823;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                NBYTESR { bits }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&self) -> DMLOER {
                DMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&self) -> SMLOER {
                SMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:29 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&mut self) -> _DMLOEW {
                _DMLOEW { w: self }
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&mut self) -> _SMLOEW {
                _SMLOEW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"]
    pub struct TCD5_NBYTES_MLOFFYES {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"]
    pub mod tcd5_nbytes_mloffyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD5_NBYTES_MLOFFYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u16,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct MLOFFR {
            bits: u32,
        }
        impl MLOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMLOER {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMLOER::_0 => false,
                    DMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMLOER {
                match value {
                    false => DMLOER::_0,
                    true => DMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMLOER::_1
            }
        }
        #[doc = "Possible values of the field `SMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMLOER {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SMLOER::_0 => false,
                    SMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SMLOER {
                match value {
                    false => SMLOER::_0,
                    true => SMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SMLOER::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 1023;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MLOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MLOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 1048575;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMLOE`"]
        pub enum DMLOEW {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMLOEW::_0 => false,
                    DMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the DADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the DADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMLOE`"]
        pub enum SMLOEW {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SMLOEW::_0 => false,
                    SMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the SADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the SADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:9 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u16 = 1023;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                NBYTESR { bits }
            }
            #[doc = "Bits 10:29 - If SMLOE or DMLOE is set, this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."]
            #[inline(always)]
            pub fn mloff(&self) -> MLOFFR {
                let bits = {
                    const MASK: u32 = 1048575;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MLOFFR { bits }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&self) -> DMLOER {
                DMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&self) -> SMLOER {
                SMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:9 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
            #[doc = "Bits 10:29 - If SMLOE or DMLOE is set, this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."]
            #[inline(always)]
            pub fn mloff(&mut self) -> _MLOFFW {
                _MLOFFW { w: self }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&mut self) -> _DMLOEW {
                _DMLOEW { w: self }
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&mut self) -> _SMLOEW {
                _SMLOEW { w: self }
            }
        }
    }
    #[doc = "TCD Last Source Address Adjustment"]
    pub struct TCD5_SLAST {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Last Source Address Adjustment"]
    pub mod tcd5_slast {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD5_SLAST {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SLASTR {
            bits: u32,
        }
        impl SLASTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SLASTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SLASTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Last Source Address Adjustment"]
            #[inline(always)]
            pub fn slast(&self) -> SLASTR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SLASTR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Last Source Address Adjustment"]
            #[inline(always)]
            pub fn slast(&mut self) -> _SLASTW {
                _SLASTW { w: self }
            }
        }
    }
    #[doc = "TCD Destination Address"]
    pub struct TCD5_DADDR {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Destination Address"]
    pub mod tcd5_daddr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD5_DADDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DADDRR {
            bits: u32,
        }
        impl DADDRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DADDRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DADDRW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Destination Address"]
            #[inline(always)]
            pub fn daddr(&self) -> DADDRR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                DADDRR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Destination Address"]
            #[inline(always)]
            pub fn daddr(&mut self) -> _DADDRW {
                _DADDRW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Destination Address Offset"]
    pub struct TCD5_DOFF {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Signed Destination Address Offset"]
    pub mod tcd5_doff {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD5_DOFF {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DOFFR {
            bits: u16,
        }
        impl DOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:15 - Destination Address Signed Offset"]
            #[inline(always)]
            pub fn doff(&self) -> DOFFR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                DOFFR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Destination Address Signed Offset"]
            #[inline(always)]
            pub fn doff(&mut self) -> _DOFFW {
                _DOFFW { w: self }
            }
        }
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub struct TCD5_CITER_ELINKNO {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub mod tcd5_citer_elinkno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD5_CITER_ELINKNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CITERR {
            bits: u16,
        }
        impl CITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 32767;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:14 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer(&self) -> CITERR {
                let bits = {
                    const MASK: u16 = 32767;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                CITERR { bits }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:14 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer(&mut self) -> _CITERW {
                _CITERW { w: self }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub struct TCD5_CITER_ELINKYES {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub mod tcd5_citer_elinkyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD5_CITER_ELINKYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CITER_LER {
            bits: u16,
        }
        impl CITER_LER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct LINKCHR {
            bits: u8,
        }
        impl LINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CITER_LEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CITER_LEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 511;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _LINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:8 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer_le(&self) -> CITER_LER {
                let bits = {
                    const MASK: u16 = 511;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                CITER_LER { bits }
            }
            #[doc = "Bits 9:12 - Minor Loop Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&self) -> LINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                LINKCHR { bits }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:8 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer_le(&mut self) -> _CITER_LEW {
                _CITER_LEW { w: self }
            }
            #[doc = "Bits 9:12 - Minor Loop Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&mut self) -> _LINKCHW {
                _LINKCHW { w: self }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Last Destination Address Adjustment/Scatter Gather Address"]
    pub struct TCD5_DLASTSGA {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Last Destination Address Adjustment/Scatter Gather Address"]
    pub mod tcd5_dlastsga {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD5_DLASTSGA {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLASTSGAR {
            bits: u32,
        }
        impl DLASTSGAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DLASTSGAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DLASTSGAW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - DLASTSGA"]
            #[inline(always)]
            pub fn dlastsga(&self) -> DLASTSGAR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                DLASTSGAR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - DLASTSGA"]
            #[inline(always)]
            pub fn dlastsga(&mut self) -> _DLASTSGAW {
                _DLASTSGAW { w: self }
            }
        }
    }
    #[doc = "TCD Control and Status"]
    pub struct TCD5_CSR {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Control and Status"]
    pub mod tcd5_csr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD5_CSR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `START`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum STARTR {
            #[doc = "The channel is not explicitly started."]
            _0,
            #[doc = "The channel is explicitly started via a software initiated service request."]
            _1,
        }
        impl STARTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    STARTR::_0 => false,
                    STARTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> STARTR {
                match value {
                    false => STARTR::_0,
                    true => STARTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == STARTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == STARTR::_1
            }
        }
        #[doc = "Possible values of the field `INTMAJOR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INTMAJORR {
            #[doc = "The end-of-major loop interrupt is disabled."]
            _0,
            #[doc = "The end-of-major loop interrupt is enabled."]
            _1,
        }
        impl INTMAJORR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INTMAJORR::_0 => false,
                    INTMAJORR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INTMAJORR {
                match value {
                    false => INTMAJORR::_0,
                    true => INTMAJORR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INTMAJORR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INTMAJORR::_1
            }
        }
        #[doc = "Possible values of the field `INTHALF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INTHALFR {
            #[doc = "The half-point interrupt is disabled."]
            _0,
            #[doc = "The half-point interrupt is enabled."]
            _1,
        }
        impl INTHALFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INTHALFR::_0 => false,
                    INTHALFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INTHALFR {
                match value {
                    false => INTHALFR::_0,
                    true => INTHALFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INTHALFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INTHALFR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct DREQR {
            bits: bool,
        }
        impl DREQR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `ESG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ESGR {
            #[doc = "The current channel's TCD is normal format."]
            _0,
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            _1,
        }
        impl ESGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ESGR::_0 => false,
                    ESGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ESGR {
                match value {
                    false => ESGR::_0,
                    true => ESGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ESGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ESGR::_1
            }
        }
        #[doc = "Possible values of the field `MAJORELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MAJORELINKR {
            #[doc = "The channel-to-channel linking is disabled."]
            _0,
            #[doc = "The channel-to-channel linking is enabled."]
            _1,
        }
        impl MAJORELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MAJORELINKR::_0 => false,
                    MAJORELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MAJORELINKR {
                match value {
                    false => MAJORELINKR::_0,
                    true => MAJORELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MAJORELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MAJORELINKR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ACTIVER {
            bits: bool,
        }
        impl ACTIVER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct DONER {
            bits: bool,
        }
        impl DONER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MAJORLINKCHR {
            bits: u8,
        }
        impl MAJORLINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `BWC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BWCR {
            #[doc = "No eDMA engine stalls."]
            _0,
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            _10,
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            _11,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl BWCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    BWCR::_0 => 0,
                    BWCR::_10 => 2,
                    BWCR::_11 => 3,
                    BWCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> BWCR {
                match value {
                    0 => BWCR::_0,
                    2 => BWCR::_10,
                    3 => BWCR::_11,
                    i => BWCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BWCR::_0
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == BWCR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == BWCR::_11
            }
        }
        #[doc = "Values that can be written to the field `START`"]
        pub enum STARTW {
            #[doc = "The channel is not explicitly started."]
            _0,
            #[doc = "The channel is explicitly started via a software initiated service request."]
            _1,
        }
        impl STARTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    STARTW::_0 => false,
                    STARTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _STARTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _STARTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: STARTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel is not explicitly started."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(STARTW::_0)
            }
            #[doc = "The channel is explicitly started via a software initiated service request."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(STARTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INTMAJOR`"]
        pub enum INTMAJORW {
            #[doc = "The end-of-major loop interrupt is disabled."]
            _0,
            #[doc = "The end-of-major loop interrupt is enabled."]
            _1,
        }
        impl INTMAJORW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INTMAJORW::_0 => false,
                    INTMAJORW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INTMAJORW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INTMAJORW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INTMAJORW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The end-of-major loop interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INTMAJORW::_0)
            }
            #[doc = "The end-of-major loop interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INTMAJORW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INTHALF`"]
        pub enum INTHALFW {
            #[doc = "The half-point interrupt is disabled."]
            _0,
            #[doc = "The half-point interrupt is enabled."]
            _1,
        }
        impl INTHALFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INTHALFW::_0 => false,
                    INTHALFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INTHALFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INTHALFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INTHALFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The half-point interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INTHALFW::_0)
            }
            #[doc = "The half-point interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INTHALFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DREQW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DREQW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ESG`"]
        pub enum ESGW {
            #[doc = "The current channel's TCD is normal format."]
            _0,
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            _1,
        }
        impl ESGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ESGW::_0 => false,
                    ESGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ESGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ESGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ESGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The current channel's TCD is normal format."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ESGW::_0)
            }
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ESGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MAJORELINK`"]
        pub enum MAJORELINKW {
            #[doc = "The channel-to-channel linking is disabled."]
            _0,
            #[doc = "The channel-to-channel linking is enabled."]
            _1,
        }
        impl MAJORELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MAJORELINKW::_0 => false,
                    MAJORELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MAJORELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MAJORELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MAJORELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MAJORELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MAJORELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ACTIVEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ACTIVEW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DONEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DONEW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MAJORLINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MAJORLINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BWC`"]
        pub enum BWCW {
            #[doc = "No eDMA engine stalls."]
            _0,
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            _10,
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            _11,
        }
        impl BWCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    BWCW::_0 => 0,
                    BWCW::_10 => 2,
                    BWCW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BWCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BWCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BWCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "No eDMA engine stalls."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BWCW::_0)
            }
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(BWCW::_10)
            }
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(BWCW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bit 0 - Channel Start"]
            #[inline(always)]
            pub fn start(&self) -> STARTR {
                STARTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 1 - Enable an interrupt when major iteration count completes."]
            #[inline(always)]
            pub fn intmajor(&self) -> INTMAJORR {
                INTMAJORR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 2 - Enable an interrupt when major counter is half complete."]
            #[inline(always)]
            pub fn inthalf(&self) -> INTHALFR {
                INTHALFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 3 - Disable Request"]
            #[inline(always)]
            pub fn dreq(&self) -> DREQR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                DREQR { bits }
            }
            #[doc = "Bit 4 - Enable Scatter/Gather Processing"]
            #[inline(always)]
            pub fn esg(&self) -> ESGR {
                ESGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 5 - Enable channel-to-channel linking on major loop complete"]
            #[inline(always)]
            pub fn majorelink(&self) -> MAJORELINKR {
                MAJORELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 6 - Channel Active"]
            #[inline(always)]
            pub fn active(&self) -> ACTIVER {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                ACTIVER { bits }
            }
            #[doc = "Bit 7 - Channel Done"]
            #[inline(always)]
            pub fn done(&self) -> DONER {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                DONER { bits }
            }
            #[doc = "Bits 8:11 - Major Loop Link Channel Number"]
            #[inline(always)]
            pub fn majorlinkch(&self) -> MAJORLINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                MAJORLINKCHR { bits }
            }
            #[doc = "Bits 14:15 - Bandwidth Control"]
            #[inline(always)]
            pub fn bwc(&self) -> BWCR {
                BWCR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Channel Start"]
            #[inline(always)]
            pub fn start(&mut self) -> _STARTW {
                _STARTW { w: self }
            }
            #[doc = "Bit 1 - Enable an interrupt when major iteration count completes."]
            #[inline(always)]
            pub fn intmajor(&mut self) -> _INTMAJORW {
                _INTMAJORW { w: self }
            }
            #[doc = "Bit 2 - Enable an interrupt when major counter is half complete."]
            #[inline(always)]
            pub fn inthalf(&mut self) -> _INTHALFW {
                _INTHALFW { w: self }
            }
            #[doc = "Bit 3 - Disable Request"]
            #[inline(always)]
            pub fn dreq(&mut self) -> _DREQW {
                _DREQW { w: self }
            }
            #[doc = "Bit 4 - Enable Scatter/Gather Processing"]
            #[inline(always)]
            pub fn esg(&mut self) -> _ESGW {
                _ESGW { w: self }
            }
            #[doc = "Bit 5 - Enable channel-to-channel linking on major loop complete"]
            #[inline(always)]
            pub fn majorelink(&mut self) -> _MAJORELINKW {
                _MAJORELINKW { w: self }
            }
            #[doc = "Bit 6 - Channel Active"]
            #[inline(always)]
            pub fn active(&mut self) -> _ACTIVEW {
                _ACTIVEW { w: self }
            }
            #[doc = "Bit 7 - Channel Done"]
            #[inline(always)]
            pub fn done(&mut self) -> _DONEW {
                _DONEW { w: self }
            }
            #[doc = "Bits 8:11 - Major Loop Link Channel Number"]
            #[inline(always)]
            pub fn majorlinkch(&mut self) -> _MAJORLINKCHW {
                _MAJORLINKCHW { w: self }
            }
            #[doc = "Bits 14:15 - Bandwidth Control"]
            #[inline(always)]
            pub fn bwc(&mut self) -> _BWCW {
                _BWCW { w: self }
            }
        }
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub struct TCD5_BITER_ELINKNO {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub mod tcd5_biter_elinkno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD5_BITER_ELINKNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BITERR {
            bits: u16,
        }
        impl BITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _BITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 32767;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:14 - Starting Major Iteration Count"]
            #[inline(always)]
            pub fn biter(&self) -> BITERR {
                let bits = {
                    const MASK: u16 = 32767;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                BITERR { bits }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:14 - Starting Major Iteration Count"]
            #[inline(always)]
            pub fn biter(&mut self) -> _BITERW {
                _BITERW { w: self }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub struct TCD5_BITER_ELINKYES {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub mod tcd5_biter_elinkyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD5_BITER_ELINKYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BITERR {
            bits: u16,
        }
        impl BITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct LINKCHR {
            bits: u8,
        }
        impl LINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _BITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 511;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _LINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:8 - Starting major iteration count"]
            #[inline(always)]
            pub fn biter(&self) -> BITERR {
                let bits = {
                    const MASK: u16 = 511;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                BITERR { bits }
            }
            #[doc = "Bits 9:12 - Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&self) -> LINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                LINKCHR { bits }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:8 - Starting major iteration count"]
            #[inline(always)]
            pub fn biter(&mut self) -> _BITERW {
                _BITERW { w: self }
            }
            #[doc = "Bits 9:12 - Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&mut self) -> _LINKCHW {
                _LINKCHW { w: self }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Source Address"]
    pub struct TCD6_SADDR {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Source Address"]
    pub mod tcd6_saddr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD6_SADDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SADDRR {
            bits: u32,
        }
        impl SADDRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SADDRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SADDRW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Source Address"]
            #[inline(always)]
            pub fn saddr(&self) -> SADDRR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SADDRR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Source Address"]
            #[inline(always)]
            pub fn saddr(&mut self) -> _SADDRW {
                _SADDRW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Source Address Offset"]
    pub struct TCD6_SOFF {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Signed Source Address Offset"]
    pub mod tcd6_soff {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD6_SOFF {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SOFFR {
            bits: u16,
        }
        impl SOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:15 - Source address signed offset"]
            #[inline(always)]
            pub fn soff(&self) -> SOFFR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                SOFFR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Source address signed offset"]
            #[inline(always)]
            pub fn soff(&mut self) -> _SOFFW {
                _SOFFW { w: self }
            }
        }
    }
    #[doc = "TCD Transfer Attributes"]
    pub struct TCD6_ATTR {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Transfer Attributes"]
    pub mod tcd6_attr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD6_ATTR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DSIZER {
            bits: u8,
        }
        impl DSIZER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DMODR {
            bits: u8,
        }
        impl DMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `SSIZE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SSIZER {
            #[doc = "8-bit"]
            _0,
            #[doc = "16-bit"]
            _1,
            #[doc = "32-bit"]
            _10,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl SSIZER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SSIZER::_0 => 0,
                    SSIZER::_1 => 1,
                    SSIZER::_10 => 2,
                    SSIZER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SSIZER {
                match value {
                    0 => SSIZER::_0,
                    1 => SSIZER::_1,
                    2 => SSIZER::_10,
                    i => SSIZER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SSIZER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SSIZER::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == SSIZER::_10
            }
        }
        #[doc = "Possible values of the field `SMOD`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMODR {
            #[doc = "Source address modulo feature is disabled"]
            _0,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl SMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SMODR::_0 => 0,
                    SMODR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SMODR {
                match value {
                    0 => SMODR::_0,
                    i => SMODR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMODR::_0
            }
        }
        #[doc = r" Proxy"]
        pub struct _DSIZEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DSIZEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMODW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SSIZE`"]
        pub enum SSIZEW {
            #[doc = "8-bit"]
            _0,
            #[doc = "16-bit"]
            _1,
            #[doc = "32-bit"]
            _10,
        }
        impl SSIZEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SSIZEW::_0 => 0,
                    SSIZEW::_1 => 1,
                    SSIZEW::_10 => 2,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SSIZEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SSIZEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SSIZEW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "8-bit"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SSIZEW::_0)
            }
            #[doc = "16-bit"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SSIZEW::_1)
            }
            #[doc = "32-bit"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(SSIZEW::_10)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMOD`"]
        pub enum SMODW {
            #[doc = "Source address modulo feature is disabled"]
            _0,
        }
        impl SMODW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SMODW::_0 => 0,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMODW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMODW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Source address modulo feature is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMODW::_0)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:2 - Destination data transfer size"]
            #[inline(always)]
            pub fn dsize(&self) -> DSIZER {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                DSIZER { bits }
            }
            #[doc = "Bits 3:7 - Destination Address Modulo"]
            #[inline(always)]
            pub fn dmod(&self) -> DMODR {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                DMODR { bits }
            }
            #[doc = "Bits 8:10 - Source data transfer size"]
            #[inline(always)]
            pub fn ssize(&self) -> SSIZER {
                SSIZER::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
            #[doc = "Bits 11:15 - Source Address Modulo"]
            #[inline(always)]
            pub fn smod(&self) -> SMODR {
                SMODR::_from({
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:2 - Destination data transfer size"]
            #[inline(always)]
            pub fn dsize(&mut self) -> _DSIZEW {
                _DSIZEW { w: self }
            }
            #[doc = "Bits 3:7 - Destination Address Modulo"]
            #[inline(always)]
            pub fn dmod(&mut self) -> _DMODW {
                _DMODW { w: self }
            }
            #[doc = "Bits 8:10 - Source data transfer size"]
            #[inline(always)]
            pub fn ssize(&mut self) -> _SSIZEW {
                _SSIZEW { w: self }
            }
            #[doc = "Bits 11:15 - Source Address Modulo"]
            #[inline(always)]
            pub fn smod(&mut self) -> _SMODW {
                _SMODW { w: self }
            }
        }
    }
    #[doc = "TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
    pub struct TCD6_NBYTES_MLNO {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
    pub mod tcd6_nbytes_mlno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD6_NBYTES_MLNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u32,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                NBYTESR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"]
    pub struct TCD6_NBYTES_MLOFFNO {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"]
    pub mod tcd6_nbytes_mloffno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD6_NBYTES_MLOFFNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u32,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMLOER {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMLOER::_0 => false,
                    DMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMLOER {
                match value {
                    false => DMLOER::_0,
                    true => DMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMLOER::_1
            }
        }
        #[doc = "Possible values of the field `SMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMLOER {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SMLOER::_0 => false,
                    SMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SMLOER {
                match value {
                    false => SMLOER::_0,
                    true => SMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SMLOER::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 1073741823;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMLOE`"]
        pub enum DMLOEW {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMLOEW::_0 => false,
                    DMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the DADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the DADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMLOE`"]
        pub enum SMLOEW {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SMLOEW::_0 => false,
                    SMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the SADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the SADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:29 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u32 = 1073741823;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                NBYTESR { bits }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&self) -> DMLOER {
                DMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&self) -> SMLOER {
                SMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:29 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&mut self) -> _DMLOEW {
                _DMLOEW { w: self }
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&mut self) -> _SMLOEW {
                _SMLOEW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"]
    pub struct TCD6_NBYTES_MLOFFYES {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"]
    pub mod tcd6_nbytes_mloffyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD6_NBYTES_MLOFFYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u16,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct MLOFFR {
            bits: u32,
        }
        impl MLOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMLOER {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMLOER::_0 => false,
                    DMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMLOER {
                match value {
                    false => DMLOER::_0,
                    true => DMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMLOER::_1
            }
        }
        #[doc = "Possible values of the field `SMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMLOER {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SMLOER::_0 => false,
                    SMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SMLOER {
                match value {
                    false => SMLOER::_0,
                    true => SMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SMLOER::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 1023;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MLOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MLOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 1048575;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMLOE`"]
        pub enum DMLOEW {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMLOEW::_0 => false,
                    DMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the DADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the DADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMLOE`"]
        pub enum SMLOEW {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SMLOEW::_0 => false,
                    SMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the SADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the SADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:9 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u16 = 1023;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                NBYTESR { bits }
            }
            #[doc = "Bits 10:29 - If SMLOE or DMLOE is set, this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."]
            #[inline(always)]
            pub fn mloff(&self) -> MLOFFR {
                let bits = {
                    const MASK: u32 = 1048575;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MLOFFR { bits }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&self) -> DMLOER {
                DMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&self) -> SMLOER {
                SMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:9 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
            #[doc = "Bits 10:29 - If SMLOE or DMLOE is set, this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."]
            #[inline(always)]
            pub fn mloff(&mut self) -> _MLOFFW {
                _MLOFFW { w: self }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&mut self) -> _DMLOEW {
                _DMLOEW { w: self }
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&mut self) -> _SMLOEW {
                _SMLOEW { w: self }
            }
        }
    }
    #[doc = "TCD Last Source Address Adjustment"]
    pub struct TCD6_SLAST {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Last Source Address Adjustment"]
    pub mod tcd6_slast {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD6_SLAST {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SLASTR {
            bits: u32,
        }
        impl SLASTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SLASTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SLASTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Last Source Address Adjustment"]
            #[inline(always)]
            pub fn slast(&self) -> SLASTR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SLASTR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Last Source Address Adjustment"]
            #[inline(always)]
            pub fn slast(&mut self) -> _SLASTW {
                _SLASTW { w: self }
            }
        }
    }
    #[doc = "TCD Destination Address"]
    pub struct TCD6_DADDR {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Destination Address"]
    pub mod tcd6_daddr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD6_DADDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DADDRR {
            bits: u32,
        }
        impl DADDRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DADDRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DADDRW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Destination Address"]
            #[inline(always)]
            pub fn daddr(&self) -> DADDRR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                DADDRR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Destination Address"]
            #[inline(always)]
            pub fn daddr(&mut self) -> _DADDRW {
                _DADDRW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Destination Address Offset"]
    pub struct TCD6_DOFF {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Signed Destination Address Offset"]
    pub mod tcd6_doff {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD6_DOFF {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DOFFR {
            bits: u16,
        }
        impl DOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:15 - Destination Address Signed Offset"]
            #[inline(always)]
            pub fn doff(&self) -> DOFFR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                DOFFR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Destination Address Signed Offset"]
            #[inline(always)]
            pub fn doff(&mut self) -> _DOFFW {
                _DOFFW { w: self }
            }
        }
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub struct TCD6_CITER_ELINKNO {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub mod tcd6_citer_elinkno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD6_CITER_ELINKNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CITERR {
            bits: u16,
        }
        impl CITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 32767;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:14 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer(&self) -> CITERR {
                let bits = {
                    const MASK: u16 = 32767;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                CITERR { bits }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:14 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer(&mut self) -> _CITERW {
                _CITERW { w: self }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub struct TCD6_CITER_ELINKYES {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub mod tcd6_citer_elinkyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD6_CITER_ELINKYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CITER_LER {
            bits: u16,
        }
        impl CITER_LER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct LINKCHR {
            bits: u8,
        }
        impl LINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CITER_LEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CITER_LEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 511;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _LINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:8 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer_le(&self) -> CITER_LER {
                let bits = {
                    const MASK: u16 = 511;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                CITER_LER { bits }
            }
            #[doc = "Bits 9:12 - Minor Loop Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&self) -> LINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                LINKCHR { bits }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:8 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer_le(&mut self) -> _CITER_LEW {
                _CITER_LEW { w: self }
            }
            #[doc = "Bits 9:12 - Minor Loop Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&mut self) -> _LINKCHW {
                _LINKCHW { w: self }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Last Destination Address Adjustment/Scatter Gather Address"]
    pub struct TCD6_DLASTSGA {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Last Destination Address Adjustment/Scatter Gather Address"]
    pub mod tcd6_dlastsga {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD6_DLASTSGA {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLASTSGAR {
            bits: u32,
        }
        impl DLASTSGAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DLASTSGAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DLASTSGAW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - DLASTSGA"]
            #[inline(always)]
            pub fn dlastsga(&self) -> DLASTSGAR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                DLASTSGAR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - DLASTSGA"]
            #[inline(always)]
            pub fn dlastsga(&mut self) -> _DLASTSGAW {
                _DLASTSGAW { w: self }
            }
        }
    }
    #[doc = "TCD Control and Status"]
    pub struct TCD6_CSR {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Control and Status"]
    pub mod tcd6_csr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD6_CSR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `START`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum STARTR {
            #[doc = "The channel is not explicitly started."]
            _0,
            #[doc = "The channel is explicitly started via a software initiated service request."]
            _1,
        }
        impl STARTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    STARTR::_0 => false,
                    STARTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> STARTR {
                match value {
                    false => STARTR::_0,
                    true => STARTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == STARTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == STARTR::_1
            }
        }
        #[doc = "Possible values of the field `INTMAJOR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INTMAJORR {
            #[doc = "The end-of-major loop interrupt is disabled."]
            _0,
            #[doc = "The end-of-major loop interrupt is enabled."]
            _1,
        }
        impl INTMAJORR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INTMAJORR::_0 => false,
                    INTMAJORR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INTMAJORR {
                match value {
                    false => INTMAJORR::_0,
                    true => INTMAJORR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INTMAJORR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INTMAJORR::_1
            }
        }
        #[doc = "Possible values of the field `INTHALF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INTHALFR {
            #[doc = "The half-point interrupt is disabled."]
            _0,
            #[doc = "The half-point interrupt is enabled."]
            _1,
        }
        impl INTHALFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INTHALFR::_0 => false,
                    INTHALFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INTHALFR {
                match value {
                    false => INTHALFR::_0,
                    true => INTHALFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INTHALFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INTHALFR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct DREQR {
            bits: bool,
        }
        impl DREQR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `ESG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ESGR {
            #[doc = "The current channel's TCD is normal format."]
            _0,
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            _1,
        }
        impl ESGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ESGR::_0 => false,
                    ESGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ESGR {
                match value {
                    false => ESGR::_0,
                    true => ESGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ESGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ESGR::_1
            }
        }
        #[doc = "Possible values of the field `MAJORELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MAJORELINKR {
            #[doc = "The channel-to-channel linking is disabled."]
            _0,
            #[doc = "The channel-to-channel linking is enabled."]
            _1,
        }
        impl MAJORELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MAJORELINKR::_0 => false,
                    MAJORELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MAJORELINKR {
                match value {
                    false => MAJORELINKR::_0,
                    true => MAJORELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MAJORELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MAJORELINKR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ACTIVER {
            bits: bool,
        }
        impl ACTIVER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct DONER {
            bits: bool,
        }
        impl DONER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MAJORLINKCHR {
            bits: u8,
        }
        impl MAJORLINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `BWC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BWCR {
            #[doc = "No eDMA engine stalls."]
            _0,
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            _10,
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            _11,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl BWCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    BWCR::_0 => 0,
                    BWCR::_10 => 2,
                    BWCR::_11 => 3,
                    BWCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> BWCR {
                match value {
                    0 => BWCR::_0,
                    2 => BWCR::_10,
                    3 => BWCR::_11,
                    i => BWCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BWCR::_0
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == BWCR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == BWCR::_11
            }
        }
        #[doc = "Values that can be written to the field `START`"]
        pub enum STARTW {
            #[doc = "The channel is not explicitly started."]
            _0,
            #[doc = "The channel is explicitly started via a software initiated service request."]
            _1,
        }
        impl STARTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    STARTW::_0 => false,
                    STARTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _STARTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _STARTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: STARTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel is not explicitly started."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(STARTW::_0)
            }
            #[doc = "The channel is explicitly started via a software initiated service request."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(STARTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INTMAJOR`"]
        pub enum INTMAJORW {
            #[doc = "The end-of-major loop interrupt is disabled."]
            _0,
            #[doc = "The end-of-major loop interrupt is enabled."]
            _1,
        }
        impl INTMAJORW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INTMAJORW::_0 => false,
                    INTMAJORW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INTMAJORW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INTMAJORW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INTMAJORW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The end-of-major loop interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INTMAJORW::_0)
            }
            #[doc = "The end-of-major loop interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INTMAJORW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INTHALF`"]
        pub enum INTHALFW {
            #[doc = "The half-point interrupt is disabled."]
            _0,
            #[doc = "The half-point interrupt is enabled."]
            _1,
        }
        impl INTHALFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INTHALFW::_0 => false,
                    INTHALFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INTHALFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INTHALFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INTHALFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The half-point interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INTHALFW::_0)
            }
            #[doc = "The half-point interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INTHALFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DREQW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DREQW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ESG`"]
        pub enum ESGW {
            #[doc = "The current channel's TCD is normal format."]
            _0,
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            _1,
        }
        impl ESGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ESGW::_0 => false,
                    ESGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ESGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ESGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ESGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The current channel's TCD is normal format."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ESGW::_0)
            }
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ESGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MAJORELINK`"]
        pub enum MAJORELINKW {
            #[doc = "The channel-to-channel linking is disabled."]
            _0,
            #[doc = "The channel-to-channel linking is enabled."]
            _1,
        }
        impl MAJORELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MAJORELINKW::_0 => false,
                    MAJORELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MAJORELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MAJORELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MAJORELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MAJORELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MAJORELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ACTIVEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ACTIVEW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DONEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DONEW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MAJORLINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MAJORLINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BWC`"]
        pub enum BWCW {
            #[doc = "No eDMA engine stalls."]
            _0,
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            _10,
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            _11,
        }
        impl BWCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    BWCW::_0 => 0,
                    BWCW::_10 => 2,
                    BWCW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BWCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BWCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BWCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "No eDMA engine stalls."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BWCW::_0)
            }
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(BWCW::_10)
            }
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(BWCW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bit 0 - Channel Start"]
            #[inline(always)]
            pub fn start(&self) -> STARTR {
                STARTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 1 - Enable an interrupt when major iteration count completes."]
            #[inline(always)]
            pub fn intmajor(&self) -> INTMAJORR {
                INTMAJORR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 2 - Enable an interrupt when major counter is half complete."]
            #[inline(always)]
            pub fn inthalf(&self) -> INTHALFR {
                INTHALFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 3 - Disable Request"]
            #[inline(always)]
            pub fn dreq(&self) -> DREQR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                DREQR { bits }
            }
            #[doc = "Bit 4 - Enable Scatter/Gather Processing"]
            #[inline(always)]
            pub fn esg(&self) -> ESGR {
                ESGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 5 - Enable channel-to-channel linking on major loop complete"]
            #[inline(always)]
            pub fn majorelink(&self) -> MAJORELINKR {
                MAJORELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 6 - Channel Active"]
            #[inline(always)]
            pub fn active(&self) -> ACTIVER {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                ACTIVER { bits }
            }
            #[doc = "Bit 7 - Channel Done"]
            #[inline(always)]
            pub fn done(&self) -> DONER {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                DONER { bits }
            }
            #[doc = "Bits 8:11 - Major Loop Link Channel Number"]
            #[inline(always)]
            pub fn majorlinkch(&self) -> MAJORLINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                MAJORLINKCHR { bits }
            }
            #[doc = "Bits 14:15 - Bandwidth Control"]
            #[inline(always)]
            pub fn bwc(&self) -> BWCR {
                BWCR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Channel Start"]
            #[inline(always)]
            pub fn start(&mut self) -> _STARTW {
                _STARTW { w: self }
            }
            #[doc = "Bit 1 - Enable an interrupt when major iteration count completes."]
            #[inline(always)]
            pub fn intmajor(&mut self) -> _INTMAJORW {
                _INTMAJORW { w: self }
            }
            #[doc = "Bit 2 - Enable an interrupt when major counter is half complete."]
            #[inline(always)]
            pub fn inthalf(&mut self) -> _INTHALFW {
                _INTHALFW { w: self }
            }
            #[doc = "Bit 3 - Disable Request"]
            #[inline(always)]
            pub fn dreq(&mut self) -> _DREQW {
                _DREQW { w: self }
            }
            #[doc = "Bit 4 - Enable Scatter/Gather Processing"]
            #[inline(always)]
            pub fn esg(&mut self) -> _ESGW {
                _ESGW { w: self }
            }
            #[doc = "Bit 5 - Enable channel-to-channel linking on major loop complete"]
            #[inline(always)]
            pub fn majorelink(&mut self) -> _MAJORELINKW {
                _MAJORELINKW { w: self }
            }
            #[doc = "Bit 6 - Channel Active"]
            #[inline(always)]
            pub fn active(&mut self) -> _ACTIVEW {
                _ACTIVEW { w: self }
            }
            #[doc = "Bit 7 - Channel Done"]
            #[inline(always)]
            pub fn done(&mut self) -> _DONEW {
                _DONEW { w: self }
            }
            #[doc = "Bits 8:11 - Major Loop Link Channel Number"]
            #[inline(always)]
            pub fn majorlinkch(&mut self) -> _MAJORLINKCHW {
                _MAJORLINKCHW { w: self }
            }
            #[doc = "Bits 14:15 - Bandwidth Control"]
            #[inline(always)]
            pub fn bwc(&mut self) -> _BWCW {
                _BWCW { w: self }
            }
        }
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub struct TCD6_BITER_ELINKNO {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub mod tcd6_biter_elinkno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD6_BITER_ELINKNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BITERR {
            bits: u16,
        }
        impl BITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _BITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 32767;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:14 - Starting Major Iteration Count"]
            #[inline(always)]
            pub fn biter(&self) -> BITERR {
                let bits = {
                    const MASK: u16 = 32767;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                BITERR { bits }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:14 - Starting Major Iteration Count"]
            #[inline(always)]
            pub fn biter(&mut self) -> _BITERW {
                _BITERW { w: self }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub struct TCD6_BITER_ELINKYES {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub mod tcd6_biter_elinkyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD6_BITER_ELINKYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BITERR {
            bits: u16,
        }
        impl BITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct LINKCHR {
            bits: u8,
        }
        impl LINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _BITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 511;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _LINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:8 - Starting major iteration count"]
            #[inline(always)]
            pub fn biter(&self) -> BITERR {
                let bits = {
                    const MASK: u16 = 511;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                BITERR { bits }
            }
            #[doc = "Bits 9:12 - Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&self) -> LINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                LINKCHR { bits }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:8 - Starting major iteration count"]
            #[inline(always)]
            pub fn biter(&mut self) -> _BITERW {
                _BITERW { w: self }
            }
            #[doc = "Bits 9:12 - Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&mut self) -> _LINKCHW {
                _LINKCHW { w: self }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Source Address"]
    pub struct TCD7_SADDR {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Source Address"]
    pub mod tcd7_saddr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD7_SADDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SADDRR {
            bits: u32,
        }
        impl SADDRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SADDRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SADDRW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Source Address"]
            #[inline(always)]
            pub fn saddr(&self) -> SADDRR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SADDRR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Source Address"]
            #[inline(always)]
            pub fn saddr(&mut self) -> _SADDRW {
                _SADDRW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Source Address Offset"]
    pub struct TCD7_SOFF {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Signed Source Address Offset"]
    pub mod tcd7_soff {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD7_SOFF {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SOFFR {
            bits: u16,
        }
        impl SOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:15 - Source address signed offset"]
            #[inline(always)]
            pub fn soff(&self) -> SOFFR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                SOFFR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Source address signed offset"]
            #[inline(always)]
            pub fn soff(&mut self) -> _SOFFW {
                _SOFFW { w: self }
            }
        }
    }
    #[doc = "TCD Transfer Attributes"]
    pub struct TCD7_ATTR {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Transfer Attributes"]
    pub mod tcd7_attr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD7_ATTR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DSIZER {
            bits: u8,
        }
        impl DSIZER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DMODR {
            bits: u8,
        }
        impl DMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `SSIZE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SSIZER {
            #[doc = "8-bit"]
            _0,
            #[doc = "16-bit"]
            _1,
            #[doc = "32-bit"]
            _10,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl SSIZER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SSIZER::_0 => 0,
                    SSIZER::_1 => 1,
                    SSIZER::_10 => 2,
                    SSIZER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SSIZER {
                match value {
                    0 => SSIZER::_0,
                    1 => SSIZER::_1,
                    2 => SSIZER::_10,
                    i => SSIZER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SSIZER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SSIZER::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == SSIZER::_10
            }
        }
        #[doc = "Possible values of the field `SMOD`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMODR {
            #[doc = "Source address modulo feature is disabled"]
            _0,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl SMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SMODR::_0 => 0,
                    SMODR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SMODR {
                match value {
                    0 => SMODR::_0,
                    i => SMODR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMODR::_0
            }
        }
        #[doc = r" Proxy"]
        pub struct _DSIZEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DSIZEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMODW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SSIZE`"]
        pub enum SSIZEW {
            #[doc = "8-bit"]
            _0,
            #[doc = "16-bit"]
            _1,
            #[doc = "32-bit"]
            _10,
        }
        impl SSIZEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SSIZEW::_0 => 0,
                    SSIZEW::_1 => 1,
                    SSIZEW::_10 => 2,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SSIZEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SSIZEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SSIZEW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "8-bit"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SSIZEW::_0)
            }
            #[doc = "16-bit"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SSIZEW::_1)
            }
            #[doc = "32-bit"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(SSIZEW::_10)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMOD`"]
        pub enum SMODW {
            #[doc = "Source address modulo feature is disabled"]
            _0,
        }
        impl SMODW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SMODW::_0 => 0,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMODW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMODW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Source address modulo feature is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMODW::_0)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:2 - Destination data transfer size"]
            #[inline(always)]
            pub fn dsize(&self) -> DSIZER {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                DSIZER { bits }
            }
            #[doc = "Bits 3:7 - Destination Address Modulo"]
            #[inline(always)]
            pub fn dmod(&self) -> DMODR {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                DMODR { bits }
            }
            #[doc = "Bits 8:10 - Source data transfer size"]
            #[inline(always)]
            pub fn ssize(&self) -> SSIZER {
                SSIZER::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
            #[doc = "Bits 11:15 - Source Address Modulo"]
            #[inline(always)]
            pub fn smod(&self) -> SMODR {
                SMODR::_from({
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:2 - Destination data transfer size"]
            #[inline(always)]
            pub fn dsize(&mut self) -> _DSIZEW {
                _DSIZEW { w: self }
            }
            #[doc = "Bits 3:7 - Destination Address Modulo"]
            #[inline(always)]
            pub fn dmod(&mut self) -> _DMODW {
                _DMODW { w: self }
            }
            #[doc = "Bits 8:10 - Source data transfer size"]
            #[inline(always)]
            pub fn ssize(&mut self) -> _SSIZEW {
                _SSIZEW { w: self }
            }
            #[doc = "Bits 11:15 - Source Address Modulo"]
            #[inline(always)]
            pub fn smod(&mut self) -> _SMODW {
                _SMODW { w: self }
            }
        }
    }
    #[doc = "TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
    pub struct TCD7_NBYTES_MLNO {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
    pub mod tcd7_nbytes_mlno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD7_NBYTES_MLNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u32,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                NBYTESR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"]
    pub struct TCD7_NBYTES_MLOFFNO {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"]
    pub mod tcd7_nbytes_mloffno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD7_NBYTES_MLOFFNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u32,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMLOER {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMLOER::_0 => false,
                    DMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMLOER {
                match value {
                    false => DMLOER::_0,
                    true => DMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMLOER::_1
            }
        }
        #[doc = "Possible values of the field `SMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMLOER {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SMLOER::_0 => false,
                    SMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SMLOER {
                match value {
                    false => SMLOER::_0,
                    true => SMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SMLOER::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 1073741823;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMLOE`"]
        pub enum DMLOEW {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMLOEW::_0 => false,
                    DMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the DADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the DADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMLOE`"]
        pub enum SMLOEW {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SMLOEW::_0 => false,
                    SMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the SADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the SADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:29 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u32 = 1073741823;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                NBYTESR { bits }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&self) -> DMLOER {
                DMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&self) -> SMLOER {
                SMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:29 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&mut self) -> _DMLOEW {
                _DMLOEW { w: self }
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&mut self) -> _SMLOEW {
                _SMLOEW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"]
    pub struct TCD7_NBYTES_MLOFFYES {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"]
    pub mod tcd7_nbytes_mloffyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD7_NBYTES_MLOFFYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u16,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct MLOFFR {
            bits: u32,
        }
        impl MLOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMLOER {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMLOER::_0 => false,
                    DMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMLOER {
                match value {
                    false => DMLOER::_0,
                    true => DMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMLOER::_1
            }
        }
        #[doc = "Possible values of the field `SMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMLOER {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SMLOER::_0 => false,
                    SMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SMLOER {
                match value {
                    false => SMLOER::_0,
                    true => SMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SMLOER::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 1023;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MLOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MLOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 1048575;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMLOE`"]
        pub enum DMLOEW {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMLOEW::_0 => false,
                    DMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the DADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the DADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMLOE`"]
        pub enum SMLOEW {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SMLOEW::_0 => false,
                    SMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the SADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the SADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:9 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u16 = 1023;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                NBYTESR { bits }
            }
            #[doc = "Bits 10:29 - If SMLOE or DMLOE is set, this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."]
            #[inline(always)]
            pub fn mloff(&self) -> MLOFFR {
                let bits = {
                    const MASK: u32 = 1048575;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MLOFFR { bits }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&self) -> DMLOER {
                DMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&self) -> SMLOER {
                SMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:9 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
            #[doc = "Bits 10:29 - If SMLOE or DMLOE is set, this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."]
            #[inline(always)]
            pub fn mloff(&mut self) -> _MLOFFW {
                _MLOFFW { w: self }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&mut self) -> _DMLOEW {
                _DMLOEW { w: self }
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&mut self) -> _SMLOEW {
                _SMLOEW { w: self }
            }
        }
    }
    #[doc = "TCD Last Source Address Adjustment"]
    pub struct TCD7_SLAST {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Last Source Address Adjustment"]
    pub mod tcd7_slast {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD7_SLAST {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SLASTR {
            bits: u32,
        }
        impl SLASTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SLASTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SLASTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Last Source Address Adjustment"]
            #[inline(always)]
            pub fn slast(&self) -> SLASTR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SLASTR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Last Source Address Adjustment"]
            #[inline(always)]
            pub fn slast(&mut self) -> _SLASTW {
                _SLASTW { w: self }
            }
        }
    }
    #[doc = "TCD Destination Address"]
    pub struct TCD7_DADDR {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Destination Address"]
    pub mod tcd7_daddr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD7_DADDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DADDRR {
            bits: u32,
        }
        impl DADDRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DADDRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DADDRW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Destination Address"]
            #[inline(always)]
            pub fn daddr(&self) -> DADDRR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                DADDRR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Destination Address"]
            #[inline(always)]
            pub fn daddr(&mut self) -> _DADDRW {
                _DADDRW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Destination Address Offset"]
    pub struct TCD7_DOFF {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Signed Destination Address Offset"]
    pub mod tcd7_doff {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD7_DOFF {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DOFFR {
            bits: u16,
        }
        impl DOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:15 - Destination Address Signed Offset"]
            #[inline(always)]
            pub fn doff(&self) -> DOFFR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                DOFFR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Destination Address Signed Offset"]
            #[inline(always)]
            pub fn doff(&mut self) -> _DOFFW {
                _DOFFW { w: self }
            }
        }
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub struct TCD7_CITER_ELINKNO {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub mod tcd7_citer_elinkno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD7_CITER_ELINKNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CITERR {
            bits: u16,
        }
        impl CITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 32767;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:14 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer(&self) -> CITERR {
                let bits = {
                    const MASK: u16 = 32767;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                CITERR { bits }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:14 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer(&mut self) -> _CITERW {
                _CITERW { w: self }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub struct TCD7_CITER_ELINKYES {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub mod tcd7_citer_elinkyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD7_CITER_ELINKYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CITER_LER {
            bits: u16,
        }
        impl CITER_LER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct LINKCHR {
            bits: u8,
        }
        impl LINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CITER_LEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CITER_LEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 511;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _LINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:8 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer_le(&self) -> CITER_LER {
                let bits = {
                    const MASK: u16 = 511;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                CITER_LER { bits }
            }
            #[doc = "Bits 9:12 - Minor Loop Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&self) -> LINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                LINKCHR { bits }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:8 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer_le(&mut self) -> _CITER_LEW {
                _CITER_LEW { w: self }
            }
            #[doc = "Bits 9:12 - Minor Loop Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&mut self) -> _LINKCHW {
                _LINKCHW { w: self }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Last Destination Address Adjustment/Scatter Gather Address"]
    pub struct TCD7_DLASTSGA {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Last Destination Address Adjustment/Scatter Gather Address"]
    pub mod tcd7_dlastsga {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD7_DLASTSGA {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLASTSGAR {
            bits: u32,
        }
        impl DLASTSGAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DLASTSGAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DLASTSGAW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - DLASTSGA"]
            #[inline(always)]
            pub fn dlastsga(&self) -> DLASTSGAR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                DLASTSGAR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - DLASTSGA"]
            #[inline(always)]
            pub fn dlastsga(&mut self) -> _DLASTSGAW {
                _DLASTSGAW { w: self }
            }
        }
    }
    #[doc = "TCD Control and Status"]
    pub struct TCD7_CSR {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Control and Status"]
    pub mod tcd7_csr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD7_CSR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `START`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum STARTR {
            #[doc = "The channel is not explicitly started."]
            _0,
            #[doc = "The channel is explicitly started via a software initiated service request."]
            _1,
        }
        impl STARTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    STARTR::_0 => false,
                    STARTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> STARTR {
                match value {
                    false => STARTR::_0,
                    true => STARTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == STARTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == STARTR::_1
            }
        }
        #[doc = "Possible values of the field `INTMAJOR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INTMAJORR {
            #[doc = "The end-of-major loop interrupt is disabled."]
            _0,
            #[doc = "The end-of-major loop interrupt is enabled."]
            _1,
        }
        impl INTMAJORR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INTMAJORR::_0 => false,
                    INTMAJORR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INTMAJORR {
                match value {
                    false => INTMAJORR::_0,
                    true => INTMAJORR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INTMAJORR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INTMAJORR::_1
            }
        }
        #[doc = "Possible values of the field `INTHALF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INTHALFR {
            #[doc = "The half-point interrupt is disabled."]
            _0,
            #[doc = "The half-point interrupt is enabled."]
            _1,
        }
        impl INTHALFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INTHALFR::_0 => false,
                    INTHALFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INTHALFR {
                match value {
                    false => INTHALFR::_0,
                    true => INTHALFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INTHALFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INTHALFR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct DREQR {
            bits: bool,
        }
        impl DREQR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `ESG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ESGR {
            #[doc = "The current channel's TCD is normal format."]
            _0,
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            _1,
        }
        impl ESGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ESGR::_0 => false,
                    ESGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ESGR {
                match value {
                    false => ESGR::_0,
                    true => ESGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ESGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ESGR::_1
            }
        }
        #[doc = "Possible values of the field `MAJORELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MAJORELINKR {
            #[doc = "The channel-to-channel linking is disabled."]
            _0,
            #[doc = "The channel-to-channel linking is enabled."]
            _1,
        }
        impl MAJORELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MAJORELINKR::_0 => false,
                    MAJORELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MAJORELINKR {
                match value {
                    false => MAJORELINKR::_0,
                    true => MAJORELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MAJORELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MAJORELINKR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ACTIVER {
            bits: bool,
        }
        impl ACTIVER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct DONER {
            bits: bool,
        }
        impl DONER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MAJORLINKCHR {
            bits: u8,
        }
        impl MAJORLINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `BWC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BWCR {
            #[doc = "No eDMA engine stalls."]
            _0,
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            _10,
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            _11,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl BWCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    BWCR::_0 => 0,
                    BWCR::_10 => 2,
                    BWCR::_11 => 3,
                    BWCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> BWCR {
                match value {
                    0 => BWCR::_0,
                    2 => BWCR::_10,
                    3 => BWCR::_11,
                    i => BWCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BWCR::_0
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == BWCR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == BWCR::_11
            }
        }
        #[doc = "Values that can be written to the field `START`"]
        pub enum STARTW {
            #[doc = "The channel is not explicitly started."]
            _0,
            #[doc = "The channel is explicitly started via a software initiated service request."]
            _1,
        }
        impl STARTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    STARTW::_0 => false,
                    STARTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _STARTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _STARTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: STARTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel is not explicitly started."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(STARTW::_0)
            }
            #[doc = "The channel is explicitly started via a software initiated service request."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(STARTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INTMAJOR`"]
        pub enum INTMAJORW {
            #[doc = "The end-of-major loop interrupt is disabled."]
            _0,
            #[doc = "The end-of-major loop interrupt is enabled."]
            _1,
        }
        impl INTMAJORW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INTMAJORW::_0 => false,
                    INTMAJORW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INTMAJORW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INTMAJORW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INTMAJORW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The end-of-major loop interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INTMAJORW::_0)
            }
            #[doc = "The end-of-major loop interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INTMAJORW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INTHALF`"]
        pub enum INTHALFW {
            #[doc = "The half-point interrupt is disabled."]
            _0,
            #[doc = "The half-point interrupt is enabled."]
            _1,
        }
        impl INTHALFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INTHALFW::_0 => false,
                    INTHALFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INTHALFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INTHALFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INTHALFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The half-point interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INTHALFW::_0)
            }
            #[doc = "The half-point interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INTHALFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DREQW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DREQW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ESG`"]
        pub enum ESGW {
            #[doc = "The current channel's TCD is normal format."]
            _0,
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            _1,
        }
        impl ESGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ESGW::_0 => false,
                    ESGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ESGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ESGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ESGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The current channel's TCD is normal format."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ESGW::_0)
            }
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ESGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MAJORELINK`"]
        pub enum MAJORELINKW {
            #[doc = "The channel-to-channel linking is disabled."]
            _0,
            #[doc = "The channel-to-channel linking is enabled."]
            _1,
        }
        impl MAJORELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MAJORELINKW::_0 => false,
                    MAJORELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MAJORELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MAJORELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MAJORELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MAJORELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MAJORELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ACTIVEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ACTIVEW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DONEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DONEW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MAJORLINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MAJORLINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BWC`"]
        pub enum BWCW {
            #[doc = "No eDMA engine stalls."]
            _0,
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            _10,
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            _11,
        }
        impl BWCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    BWCW::_0 => 0,
                    BWCW::_10 => 2,
                    BWCW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BWCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BWCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BWCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "No eDMA engine stalls."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BWCW::_0)
            }
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(BWCW::_10)
            }
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(BWCW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bit 0 - Channel Start"]
            #[inline(always)]
            pub fn start(&self) -> STARTR {
                STARTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 1 - Enable an interrupt when major iteration count completes."]
            #[inline(always)]
            pub fn intmajor(&self) -> INTMAJORR {
                INTMAJORR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 2 - Enable an interrupt when major counter is half complete."]
            #[inline(always)]
            pub fn inthalf(&self) -> INTHALFR {
                INTHALFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 3 - Disable Request"]
            #[inline(always)]
            pub fn dreq(&self) -> DREQR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                DREQR { bits }
            }
            #[doc = "Bit 4 - Enable Scatter/Gather Processing"]
            #[inline(always)]
            pub fn esg(&self) -> ESGR {
                ESGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 5 - Enable channel-to-channel linking on major loop complete"]
            #[inline(always)]
            pub fn majorelink(&self) -> MAJORELINKR {
                MAJORELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 6 - Channel Active"]
            #[inline(always)]
            pub fn active(&self) -> ACTIVER {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                ACTIVER { bits }
            }
            #[doc = "Bit 7 - Channel Done"]
            #[inline(always)]
            pub fn done(&self) -> DONER {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                DONER { bits }
            }
            #[doc = "Bits 8:11 - Major Loop Link Channel Number"]
            #[inline(always)]
            pub fn majorlinkch(&self) -> MAJORLINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                MAJORLINKCHR { bits }
            }
            #[doc = "Bits 14:15 - Bandwidth Control"]
            #[inline(always)]
            pub fn bwc(&self) -> BWCR {
                BWCR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Channel Start"]
            #[inline(always)]
            pub fn start(&mut self) -> _STARTW {
                _STARTW { w: self }
            }
            #[doc = "Bit 1 - Enable an interrupt when major iteration count completes."]
            #[inline(always)]
            pub fn intmajor(&mut self) -> _INTMAJORW {
                _INTMAJORW { w: self }
            }
            #[doc = "Bit 2 - Enable an interrupt when major counter is half complete."]
            #[inline(always)]
            pub fn inthalf(&mut self) -> _INTHALFW {
                _INTHALFW { w: self }
            }
            #[doc = "Bit 3 - Disable Request"]
            #[inline(always)]
            pub fn dreq(&mut self) -> _DREQW {
                _DREQW { w: self }
            }
            #[doc = "Bit 4 - Enable Scatter/Gather Processing"]
            #[inline(always)]
            pub fn esg(&mut self) -> _ESGW {
                _ESGW { w: self }
            }
            #[doc = "Bit 5 - Enable channel-to-channel linking on major loop complete"]
            #[inline(always)]
            pub fn majorelink(&mut self) -> _MAJORELINKW {
                _MAJORELINKW { w: self }
            }
            #[doc = "Bit 6 - Channel Active"]
            #[inline(always)]
            pub fn active(&mut self) -> _ACTIVEW {
                _ACTIVEW { w: self }
            }
            #[doc = "Bit 7 - Channel Done"]
            #[inline(always)]
            pub fn done(&mut self) -> _DONEW {
                _DONEW { w: self }
            }
            #[doc = "Bits 8:11 - Major Loop Link Channel Number"]
            #[inline(always)]
            pub fn majorlinkch(&mut self) -> _MAJORLINKCHW {
                _MAJORLINKCHW { w: self }
            }
            #[doc = "Bits 14:15 - Bandwidth Control"]
            #[inline(always)]
            pub fn bwc(&mut self) -> _BWCW {
                _BWCW { w: self }
            }
        }
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub struct TCD7_BITER_ELINKNO {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub mod tcd7_biter_elinkno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD7_BITER_ELINKNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BITERR {
            bits: u16,
        }
        impl BITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _BITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 32767;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:14 - Starting Major Iteration Count"]
            #[inline(always)]
            pub fn biter(&self) -> BITERR {
                let bits = {
                    const MASK: u16 = 32767;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                BITERR { bits }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:14 - Starting Major Iteration Count"]
            #[inline(always)]
            pub fn biter(&mut self) -> _BITERW {
                _BITERW { w: self }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub struct TCD7_BITER_ELINKYES {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub mod tcd7_biter_elinkyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD7_BITER_ELINKYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BITERR {
            bits: u16,
        }
        impl BITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct LINKCHR {
            bits: u8,
        }
        impl LINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _BITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 511;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _LINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:8 - Starting major iteration count"]
            #[inline(always)]
            pub fn biter(&self) -> BITERR {
                let bits = {
                    const MASK: u16 = 511;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                BITERR { bits }
            }
            #[doc = "Bits 9:12 - Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&self) -> LINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                LINKCHR { bits }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:8 - Starting major iteration count"]
            #[inline(always)]
            pub fn biter(&mut self) -> _BITERW {
                _BITERW { w: self }
            }
            #[doc = "Bits 9:12 - Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&mut self) -> _LINKCHW {
                _LINKCHW { w: self }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Source Address"]
    pub struct TCD8_SADDR {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Source Address"]
    pub mod tcd8_saddr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD8_SADDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SADDRR {
            bits: u32,
        }
        impl SADDRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SADDRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SADDRW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Source Address"]
            #[inline(always)]
            pub fn saddr(&self) -> SADDRR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SADDRR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Source Address"]
            #[inline(always)]
            pub fn saddr(&mut self) -> _SADDRW {
                _SADDRW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Source Address Offset"]
    pub struct TCD8_SOFF {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Signed Source Address Offset"]
    pub mod tcd8_soff {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD8_SOFF {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SOFFR {
            bits: u16,
        }
        impl SOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:15 - Source address signed offset"]
            #[inline(always)]
            pub fn soff(&self) -> SOFFR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                SOFFR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Source address signed offset"]
            #[inline(always)]
            pub fn soff(&mut self) -> _SOFFW {
                _SOFFW { w: self }
            }
        }
    }
    #[doc = "TCD Transfer Attributes"]
    pub struct TCD8_ATTR {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Transfer Attributes"]
    pub mod tcd8_attr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD8_ATTR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DSIZER {
            bits: u8,
        }
        impl DSIZER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DMODR {
            bits: u8,
        }
        impl DMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `SSIZE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SSIZER {
            #[doc = "8-bit"]
            _0,
            #[doc = "16-bit"]
            _1,
            #[doc = "32-bit"]
            _10,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl SSIZER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SSIZER::_0 => 0,
                    SSIZER::_1 => 1,
                    SSIZER::_10 => 2,
                    SSIZER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SSIZER {
                match value {
                    0 => SSIZER::_0,
                    1 => SSIZER::_1,
                    2 => SSIZER::_10,
                    i => SSIZER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SSIZER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SSIZER::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == SSIZER::_10
            }
        }
        #[doc = "Possible values of the field `SMOD`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMODR {
            #[doc = "Source address modulo feature is disabled"]
            _0,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl SMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SMODR::_0 => 0,
                    SMODR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SMODR {
                match value {
                    0 => SMODR::_0,
                    i => SMODR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMODR::_0
            }
        }
        #[doc = r" Proxy"]
        pub struct _DSIZEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DSIZEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMODW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SSIZE`"]
        pub enum SSIZEW {
            #[doc = "8-bit"]
            _0,
            #[doc = "16-bit"]
            _1,
            #[doc = "32-bit"]
            _10,
        }
        impl SSIZEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SSIZEW::_0 => 0,
                    SSIZEW::_1 => 1,
                    SSIZEW::_10 => 2,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SSIZEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SSIZEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SSIZEW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "8-bit"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SSIZEW::_0)
            }
            #[doc = "16-bit"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SSIZEW::_1)
            }
            #[doc = "32-bit"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(SSIZEW::_10)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMOD`"]
        pub enum SMODW {
            #[doc = "Source address modulo feature is disabled"]
            _0,
        }
        impl SMODW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SMODW::_0 => 0,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMODW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMODW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Source address modulo feature is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMODW::_0)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:2 - Destination data transfer size"]
            #[inline(always)]
            pub fn dsize(&self) -> DSIZER {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                DSIZER { bits }
            }
            #[doc = "Bits 3:7 - Destination Address Modulo"]
            #[inline(always)]
            pub fn dmod(&self) -> DMODR {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                DMODR { bits }
            }
            #[doc = "Bits 8:10 - Source data transfer size"]
            #[inline(always)]
            pub fn ssize(&self) -> SSIZER {
                SSIZER::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
            #[doc = "Bits 11:15 - Source Address Modulo"]
            #[inline(always)]
            pub fn smod(&self) -> SMODR {
                SMODR::_from({
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:2 - Destination data transfer size"]
            #[inline(always)]
            pub fn dsize(&mut self) -> _DSIZEW {
                _DSIZEW { w: self }
            }
            #[doc = "Bits 3:7 - Destination Address Modulo"]
            #[inline(always)]
            pub fn dmod(&mut self) -> _DMODW {
                _DMODW { w: self }
            }
            #[doc = "Bits 8:10 - Source data transfer size"]
            #[inline(always)]
            pub fn ssize(&mut self) -> _SSIZEW {
                _SSIZEW { w: self }
            }
            #[doc = "Bits 11:15 - Source Address Modulo"]
            #[inline(always)]
            pub fn smod(&mut self) -> _SMODW {
                _SMODW { w: self }
            }
        }
    }
    #[doc = "TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
    pub struct TCD8_NBYTES_MLNO {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
    pub mod tcd8_nbytes_mlno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD8_NBYTES_MLNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u32,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                NBYTESR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"]
    pub struct TCD8_NBYTES_MLOFFNO {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"]
    pub mod tcd8_nbytes_mloffno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD8_NBYTES_MLOFFNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u32,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMLOER {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMLOER::_0 => false,
                    DMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMLOER {
                match value {
                    false => DMLOER::_0,
                    true => DMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMLOER::_1
            }
        }
        #[doc = "Possible values of the field `SMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMLOER {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SMLOER::_0 => false,
                    SMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SMLOER {
                match value {
                    false => SMLOER::_0,
                    true => SMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SMLOER::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 1073741823;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMLOE`"]
        pub enum DMLOEW {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMLOEW::_0 => false,
                    DMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the DADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the DADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMLOE`"]
        pub enum SMLOEW {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SMLOEW::_0 => false,
                    SMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the SADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the SADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:29 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u32 = 1073741823;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                NBYTESR { bits }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&self) -> DMLOER {
                DMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&self) -> SMLOER {
                SMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:29 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&mut self) -> _DMLOEW {
                _DMLOEW { w: self }
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&mut self) -> _SMLOEW {
                _SMLOEW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"]
    pub struct TCD8_NBYTES_MLOFFYES {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"]
    pub mod tcd8_nbytes_mloffyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD8_NBYTES_MLOFFYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u16,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct MLOFFR {
            bits: u32,
        }
        impl MLOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMLOER {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMLOER::_0 => false,
                    DMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMLOER {
                match value {
                    false => DMLOER::_0,
                    true => DMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMLOER::_1
            }
        }
        #[doc = "Possible values of the field `SMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMLOER {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SMLOER::_0 => false,
                    SMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SMLOER {
                match value {
                    false => SMLOER::_0,
                    true => SMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SMLOER::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 1023;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MLOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MLOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 1048575;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMLOE`"]
        pub enum DMLOEW {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMLOEW::_0 => false,
                    DMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the DADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the DADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMLOE`"]
        pub enum SMLOEW {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SMLOEW::_0 => false,
                    SMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the SADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the SADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:9 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u16 = 1023;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                NBYTESR { bits }
            }
            #[doc = "Bits 10:29 - If SMLOE or DMLOE is set, this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."]
            #[inline(always)]
            pub fn mloff(&self) -> MLOFFR {
                let bits = {
                    const MASK: u32 = 1048575;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MLOFFR { bits }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&self) -> DMLOER {
                DMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&self) -> SMLOER {
                SMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:9 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
            #[doc = "Bits 10:29 - If SMLOE or DMLOE is set, this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."]
            #[inline(always)]
            pub fn mloff(&mut self) -> _MLOFFW {
                _MLOFFW { w: self }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&mut self) -> _DMLOEW {
                _DMLOEW { w: self }
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&mut self) -> _SMLOEW {
                _SMLOEW { w: self }
            }
        }
    }
    #[doc = "TCD Last Source Address Adjustment"]
    pub struct TCD8_SLAST {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Last Source Address Adjustment"]
    pub mod tcd8_slast {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD8_SLAST {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SLASTR {
            bits: u32,
        }
        impl SLASTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SLASTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SLASTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Last Source Address Adjustment"]
            #[inline(always)]
            pub fn slast(&self) -> SLASTR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SLASTR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Last Source Address Adjustment"]
            #[inline(always)]
            pub fn slast(&mut self) -> _SLASTW {
                _SLASTW { w: self }
            }
        }
    }
    #[doc = "TCD Destination Address"]
    pub struct TCD8_DADDR {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Destination Address"]
    pub mod tcd8_daddr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD8_DADDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DADDRR {
            bits: u32,
        }
        impl DADDRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DADDRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DADDRW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Destination Address"]
            #[inline(always)]
            pub fn daddr(&self) -> DADDRR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                DADDRR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Destination Address"]
            #[inline(always)]
            pub fn daddr(&mut self) -> _DADDRW {
                _DADDRW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Destination Address Offset"]
    pub struct TCD8_DOFF {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Signed Destination Address Offset"]
    pub mod tcd8_doff {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD8_DOFF {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DOFFR {
            bits: u16,
        }
        impl DOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:15 - Destination Address Signed Offset"]
            #[inline(always)]
            pub fn doff(&self) -> DOFFR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                DOFFR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Destination Address Signed Offset"]
            #[inline(always)]
            pub fn doff(&mut self) -> _DOFFW {
                _DOFFW { w: self }
            }
        }
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub struct TCD8_CITER_ELINKNO {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub mod tcd8_citer_elinkno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD8_CITER_ELINKNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CITERR {
            bits: u16,
        }
        impl CITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 32767;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:14 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer(&self) -> CITERR {
                let bits = {
                    const MASK: u16 = 32767;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                CITERR { bits }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:14 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer(&mut self) -> _CITERW {
                _CITERW { w: self }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub struct TCD8_CITER_ELINKYES {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub mod tcd8_citer_elinkyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD8_CITER_ELINKYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CITER_LER {
            bits: u16,
        }
        impl CITER_LER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct LINKCHR {
            bits: u8,
        }
        impl LINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CITER_LEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CITER_LEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 511;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _LINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:8 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer_le(&self) -> CITER_LER {
                let bits = {
                    const MASK: u16 = 511;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                CITER_LER { bits }
            }
            #[doc = "Bits 9:12 - Minor Loop Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&self) -> LINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                LINKCHR { bits }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:8 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer_le(&mut self) -> _CITER_LEW {
                _CITER_LEW { w: self }
            }
            #[doc = "Bits 9:12 - Minor Loop Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&mut self) -> _LINKCHW {
                _LINKCHW { w: self }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Last Destination Address Adjustment/Scatter Gather Address"]
    pub struct TCD8_DLASTSGA {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Last Destination Address Adjustment/Scatter Gather Address"]
    pub mod tcd8_dlastsga {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD8_DLASTSGA {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLASTSGAR {
            bits: u32,
        }
        impl DLASTSGAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DLASTSGAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DLASTSGAW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - DLASTSGA"]
            #[inline(always)]
            pub fn dlastsga(&self) -> DLASTSGAR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                DLASTSGAR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - DLASTSGA"]
            #[inline(always)]
            pub fn dlastsga(&mut self) -> _DLASTSGAW {
                _DLASTSGAW { w: self }
            }
        }
    }
    #[doc = "TCD Control and Status"]
    pub struct TCD8_CSR {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Control and Status"]
    pub mod tcd8_csr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD8_CSR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `START`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum STARTR {
            #[doc = "The channel is not explicitly started."]
            _0,
            #[doc = "The channel is explicitly started via a software initiated service request."]
            _1,
        }
        impl STARTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    STARTR::_0 => false,
                    STARTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> STARTR {
                match value {
                    false => STARTR::_0,
                    true => STARTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == STARTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == STARTR::_1
            }
        }
        #[doc = "Possible values of the field `INTMAJOR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INTMAJORR {
            #[doc = "The end-of-major loop interrupt is disabled."]
            _0,
            #[doc = "The end-of-major loop interrupt is enabled."]
            _1,
        }
        impl INTMAJORR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INTMAJORR::_0 => false,
                    INTMAJORR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INTMAJORR {
                match value {
                    false => INTMAJORR::_0,
                    true => INTMAJORR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INTMAJORR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INTMAJORR::_1
            }
        }
        #[doc = "Possible values of the field `INTHALF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INTHALFR {
            #[doc = "The half-point interrupt is disabled."]
            _0,
            #[doc = "The half-point interrupt is enabled."]
            _1,
        }
        impl INTHALFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INTHALFR::_0 => false,
                    INTHALFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INTHALFR {
                match value {
                    false => INTHALFR::_0,
                    true => INTHALFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INTHALFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INTHALFR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct DREQR {
            bits: bool,
        }
        impl DREQR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `ESG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ESGR {
            #[doc = "The current channel's TCD is normal format."]
            _0,
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            _1,
        }
        impl ESGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ESGR::_0 => false,
                    ESGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ESGR {
                match value {
                    false => ESGR::_0,
                    true => ESGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ESGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ESGR::_1
            }
        }
        #[doc = "Possible values of the field `MAJORELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MAJORELINKR {
            #[doc = "The channel-to-channel linking is disabled."]
            _0,
            #[doc = "The channel-to-channel linking is enabled."]
            _1,
        }
        impl MAJORELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MAJORELINKR::_0 => false,
                    MAJORELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MAJORELINKR {
                match value {
                    false => MAJORELINKR::_0,
                    true => MAJORELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MAJORELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MAJORELINKR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ACTIVER {
            bits: bool,
        }
        impl ACTIVER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct DONER {
            bits: bool,
        }
        impl DONER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MAJORLINKCHR {
            bits: u8,
        }
        impl MAJORLINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `BWC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BWCR {
            #[doc = "No eDMA engine stalls."]
            _0,
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            _10,
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            _11,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl BWCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    BWCR::_0 => 0,
                    BWCR::_10 => 2,
                    BWCR::_11 => 3,
                    BWCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> BWCR {
                match value {
                    0 => BWCR::_0,
                    2 => BWCR::_10,
                    3 => BWCR::_11,
                    i => BWCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BWCR::_0
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == BWCR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == BWCR::_11
            }
        }
        #[doc = "Values that can be written to the field `START`"]
        pub enum STARTW {
            #[doc = "The channel is not explicitly started."]
            _0,
            #[doc = "The channel is explicitly started via a software initiated service request."]
            _1,
        }
        impl STARTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    STARTW::_0 => false,
                    STARTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _STARTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _STARTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: STARTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel is not explicitly started."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(STARTW::_0)
            }
            #[doc = "The channel is explicitly started via a software initiated service request."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(STARTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INTMAJOR`"]
        pub enum INTMAJORW {
            #[doc = "The end-of-major loop interrupt is disabled."]
            _0,
            #[doc = "The end-of-major loop interrupt is enabled."]
            _1,
        }
        impl INTMAJORW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INTMAJORW::_0 => false,
                    INTMAJORW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INTMAJORW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INTMAJORW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INTMAJORW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The end-of-major loop interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INTMAJORW::_0)
            }
            #[doc = "The end-of-major loop interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INTMAJORW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INTHALF`"]
        pub enum INTHALFW {
            #[doc = "The half-point interrupt is disabled."]
            _0,
            #[doc = "The half-point interrupt is enabled."]
            _1,
        }
        impl INTHALFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INTHALFW::_0 => false,
                    INTHALFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INTHALFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INTHALFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INTHALFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The half-point interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INTHALFW::_0)
            }
            #[doc = "The half-point interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INTHALFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DREQW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DREQW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ESG`"]
        pub enum ESGW {
            #[doc = "The current channel's TCD is normal format."]
            _0,
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            _1,
        }
        impl ESGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ESGW::_0 => false,
                    ESGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ESGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ESGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ESGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The current channel's TCD is normal format."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ESGW::_0)
            }
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ESGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MAJORELINK`"]
        pub enum MAJORELINKW {
            #[doc = "The channel-to-channel linking is disabled."]
            _0,
            #[doc = "The channel-to-channel linking is enabled."]
            _1,
        }
        impl MAJORELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MAJORELINKW::_0 => false,
                    MAJORELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MAJORELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MAJORELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MAJORELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MAJORELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MAJORELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ACTIVEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ACTIVEW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DONEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DONEW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MAJORLINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MAJORLINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BWC`"]
        pub enum BWCW {
            #[doc = "No eDMA engine stalls."]
            _0,
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            _10,
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            _11,
        }
        impl BWCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    BWCW::_0 => 0,
                    BWCW::_10 => 2,
                    BWCW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BWCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BWCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BWCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "No eDMA engine stalls."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BWCW::_0)
            }
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(BWCW::_10)
            }
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(BWCW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bit 0 - Channel Start"]
            #[inline(always)]
            pub fn start(&self) -> STARTR {
                STARTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 1 - Enable an interrupt when major iteration count completes."]
            #[inline(always)]
            pub fn intmajor(&self) -> INTMAJORR {
                INTMAJORR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 2 - Enable an interrupt when major counter is half complete."]
            #[inline(always)]
            pub fn inthalf(&self) -> INTHALFR {
                INTHALFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 3 - Disable Request"]
            #[inline(always)]
            pub fn dreq(&self) -> DREQR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                DREQR { bits }
            }
            #[doc = "Bit 4 - Enable Scatter/Gather Processing"]
            #[inline(always)]
            pub fn esg(&self) -> ESGR {
                ESGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 5 - Enable channel-to-channel linking on major loop complete"]
            #[inline(always)]
            pub fn majorelink(&self) -> MAJORELINKR {
                MAJORELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 6 - Channel Active"]
            #[inline(always)]
            pub fn active(&self) -> ACTIVER {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                ACTIVER { bits }
            }
            #[doc = "Bit 7 - Channel Done"]
            #[inline(always)]
            pub fn done(&self) -> DONER {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                DONER { bits }
            }
            #[doc = "Bits 8:11 - Major Loop Link Channel Number"]
            #[inline(always)]
            pub fn majorlinkch(&self) -> MAJORLINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                MAJORLINKCHR { bits }
            }
            #[doc = "Bits 14:15 - Bandwidth Control"]
            #[inline(always)]
            pub fn bwc(&self) -> BWCR {
                BWCR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Channel Start"]
            #[inline(always)]
            pub fn start(&mut self) -> _STARTW {
                _STARTW { w: self }
            }
            #[doc = "Bit 1 - Enable an interrupt when major iteration count completes."]
            #[inline(always)]
            pub fn intmajor(&mut self) -> _INTMAJORW {
                _INTMAJORW { w: self }
            }
            #[doc = "Bit 2 - Enable an interrupt when major counter is half complete."]
            #[inline(always)]
            pub fn inthalf(&mut self) -> _INTHALFW {
                _INTHALFW { w: self }
            }
            #[doc = "Bit 3 - Disable Request"]
            #[inline(always)]
            pub fn dreq(&mut self) -> _DREQW {
                _DREQW { w: self }
            }
            #[doc = "Bit 4 - Enable Scatter/Gather Processing"]
            #[inline(always)]
            pub fn esg(&mut self) -> _ESGW {
                _ESGW { w: self }
            }
            #[doc = "Bit 5 - Enable channel-to-channel linking on major loop complete"]
            #[inline(always)]
            pub fn majorelink(&mut self) -> _MAJORELINKW {
                _MAJORELINKW { w: self }
            }
            #[doc = "Bit 6 - Channel Active"]
            #[inline(always)]
            pub fn active(&mut self) -> _ACTIVEW {
                _ACTIVEW { w: self }
            }
            #[doc = "Bit 7 - Channel Done"]
            #[inline(always)]
            pub fn done(&mut self) -> _DONEW {
                _DONEW { w: self }
            }
            #[doc = "Bits 8:11 - Major Loop Link Channel Number"]
            #[inline(always)]
            pub fn majorlinkch(&mut self) -> _MAJORLINKCHW {
                _MAJORLINKCHW { w: self }
            }
            #[doc = "Bits 14:15 - Bandwidth Control"]
            #[inline(always)]
            pub fn bwc(&mut self) -> _BWCW {
                _BWCW { w: self }
            }
        }
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub struct TCD8_BITER_ELINKNO {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub mod tcd8_biter_elinkno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD8_BITER_ELINKNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BITERR {
            bits: u16,
        }
        impl BITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _BITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 32767;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:14 - Starting Major Iteration Count"]
            #[inline(always)]
            pub fn biter(&self) -> BITERR {
                let bits = {
                    const MASK: u16 = 32767;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                BITERR { bits }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:14 - Starting Major Iteration Count"]
            #[inline(always)]
            pub fn biter(&mut self) -> _BITERW {
                _BITERW { w: self }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub struct TCD8_BITER_ELINKYES {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub mod tcd8_biter_elinkyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD8_BITER_ELINKYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BITERR {
            bits: u16,
        }
        impl BITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct LINKCHR {
            bits: u8,
        }
        impl LINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _BITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 511;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _LINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:8 - Starting major iteration count"]
            #[inline(always)]
            pub fn biter(&self) -> BITERR {
                let bits = {
                    const MASK: u16 = 511;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                BITERR { bits }
            }
            #[doc = "Bits 9:12 - Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&self) -> LINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                LINKCHR { bits }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:8 - Starting major iteration count"]
            #[inline(always)]
            pub fn biter(&mut self) -> _BITERW {
                _BITERW { w: self }
            }
            #[doc = "Bits 9:12 - Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&mut self) -> _LINKCHW {
                _LINKCHW { w: self }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Source Address"]
    pub struct TCD9_SADDR {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Source Address"]
    pub mod tcd9_saddr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD9_SADDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SADDRR {
            bits: u32,
        }
        impl SADDRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SADDRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SADDRW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Source Address"]
            #[inline(always)]
            pub fn saddr(&self) -> SADDRR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SADDRR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Source Address"]
            #[inline(always)]
            pub fn saddr(&mut self) -> _SADDRW {
                _SADDRW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Source Address Offset"]
    pub struct TCD9_SOFF {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Signed Source Address Offset"]
    pub mod tcd9_soff {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD9_SOFF {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SOFFR {
            bits: u16,
        }
        impl SOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:15 - Source address signed offset"]
            #[inline(always)]
            pub fn soff(&self) -> SOFFR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                SOFFR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Source address signed offset"]
            #[inline(always)]
            pub fn soff(&mut self) -> _SOFFW {
                _SOFFW { w: self }
            }
        }
    }
    #[doc = "TCD Transfer Attributes"]
    pub struct TCD9_ATTR {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Transfer Attributes"]
    pub mod tcd9_attr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD9_ATTR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DSIZER {
            bits: u8,
        }
        impl DSIZER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DMODR {
            bits: u8,
        }
        impl DMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `SSIZE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SSIZER {
            #[doc = "8-bit"]
            _0,
            #[doc = "16-bit"]
            _1,
            #[doc = "32-bit"]
            _10,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl SSIZER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SSIZER::_0 => 0,
                    SSIZER::_1 => 1,
                    SSIZER::_10 => 2,
                    SSIZER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SSIZER {
                match value {
                    0 => SSIZER::_0,
                    1 => SSIZER::_1,
                    2 => SSIZER::_10,
                    i => SSIZER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SSIZER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SSIZER::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == SSIZER::_10
            }
        }
        #[doc = "Possible values of the field `SMOD`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMODR {
            #[doc = "Source address modulo feature is disabled"]
            _0,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl SMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SMODR::_0 => 0,
                    SMODR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SMODR {
                match value {
                    0 => SMODR::_0,
                    i => SMODR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMODR::_0
            }
        }
        #[doc = r" Proxy"]
        pub struct _DSIZEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DSIZEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMODW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SSIZE`"]
        pub enum SSIZEW {
            #[doc = "8-bit"]
            _0,
            #[doc = "16-bit"]
            _1,
            #[doc = "32-bit"]
            _10,
        }
        impl SSIZEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SSIZEW::_0 => 0,
                    SSIZEW::_1 => 1,
                    SSIZEW::_10 => 2,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SSIZEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SSIZEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SSIZEW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "8-bit"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SSIZEW::_0)
            }
            #[doc = "16-bit"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SSIZEW::_1)
            }
            #[doc = "32-bit"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(SSIZEW::_10)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMOD`"]
        pub enum SMODW {
            #[doc = "Source address modulo feature is disabled"]
            _0,
        }
        impl SMODW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SMODW::_0 => 0,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMODW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMODW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Source address modulo feature is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMODW::_0)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:2 - Destination data transfer size"]
            #[inline(always)]
            pub fn dsize(&self) -> DSIZER {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                DSIZER { bits }
            }
            #[doc = "Bits 3:7 - Destination Address Modulo"]
            #[inline(always)]
            pub fn dmod(&self) -> DMODR {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                DMODR { bits }
            }
            #[doc = "Bits 8:10 - Source data transfer size"]
            #[inline(always)]
            pub fn ssize(&self) -> SSIZER {
                SSIZER::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
            #[doc = "Bits 11:15 - Source Address Modulo"]
            #[inline(always)]
            pub fn smod(&self) -> SMODR {
                SMODR::_from({
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:2 - Destination data transfer size"]
            #[inline(always)]
            pub fn dsize(&mut self) -> _DSIZEW {
                _DSIZEW { w: self }
            }
            #[doc = "Bits 3:7 - Destination Address Modulo"]
            #[inline(always)]
            pub fn dmod(&mut self) -> _DMODW {
                _DMODW { w: self }
            }
            #[doc = "Bits 8:10 - Source data transfer size"]
            #[inline(always)]
            pub fn ssize(&mut self) -> _SSIZEW {
                _SSIZEW { w: self }
            }
            #[doc = "Bits 11:15 - Source Address Modulo"]
            #[inline(always)]
            pub fn smod(&mut self) -> _SMODW {
                _SMODW { w: self }
            }
        }
    }
    #[doc = "TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
    pub struct TCD9_NBYTES_MLNO {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
    pub mod tcd9_nbytes_mlno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD9_NBYTES_MLNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u32,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                NBYTESR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"]
    pub struct TCD9_NBYTES_MLOFFNO {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"]
    pub mod tcd9_nbytes_mloffno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD9_NBYTES_MLOFFNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u32,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMLOER {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMLOER::_0 => false,
                    DMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMLOER {
                match value {
                    false => DMLOER::_0,
                    true => DMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMLOER::_1
            }
        }
        #[doc = "Possible values of the field `SMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMLOER {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SMLOER::_0 => false,
                    SMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SMLOER {
                match value {
                    false => SMLOER::_0,
                    true => SMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SMLOER::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 1073741823;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMLOE`"]
        pub enum DMLOEW {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMLOEW::_0 => false,
                    DMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the DADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the DADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMLOE`"]
        pub enum SMLOEW {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SMLOEW::_0 => false,
                    SMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the SADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the SADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:29 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u32 = 1073741823;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                NBYTESR { bits }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&self) -> DMLOER {
                DMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&self) -> SMLOER {
                SMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:29 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&mut self) -> _DMLOEW {
                _DMLOEW { w: self }
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&mut self) -> _SMLOEW {
                _SMLOEW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"]
    pub struct TCD9_NBYTES_MLOFFYES {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"]
    pub mod tcd9_nbytes_mloffyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD9_NBYTES_MLOFFYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u16,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct MLOFFR {
            bits: u32,
        }
        impl MLOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMLOER {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMLOER::_0 => false,
                    DMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMLOER {
                match value {
                    false => DMLOER::_0,
                    true => DMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMLOER::_1
            }
        }
        #[doc = "Possible values of the field `SMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMLOER {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SMLOER::_0 => false,
                    SMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SMLOER {
                match value {
                    false => SMLOER::_0,
                    true => SMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SMLOER::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 1023;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MLOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MLOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 1048575;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMLOE`"]
        pub enum DMLOEW {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMLOEW::_0 => false,
                    DMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the DADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the DADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMLOE`"]
        pub enum SMLOEW {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SMLOEW::_0 => false,
                    SMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the SADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the SADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:9 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u16 = 1023;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                NBYTESR { bits }
            }
            #[doc = "Bits 10:29 - If SMLOE or DMLOE is set, this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."]
            #[inline(always)]
            pub fn mloff(&self) -> MLOFFR {
                let bits = {
                    const MASK: u32 = 1048575;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MLOFFR { bits }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&self) -> DMLOER {
                DMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&self) -> SMLOER {
                SMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:9 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
            #[doc = "Bits 10:29 - If SMLOE or DMLOE is set, this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."]
            #[inline(always)]
            pub fn mloff(&mut self) -> _MLOFFW {
                _MLOFFW { w: self }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&mut self) -> _DMLOEW {
                _DMLOEW { w: self }
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&mut self) -> _SMLOEW {
                _SMLOEW { w: self }
            }
        }
    }
    #[doc = "TCD Last Source Address Adjustment"]
    pub struct TCD9_SLAST {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Last Source Address Adjustment"]
    pub mod tcd9_slast {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD9_SLAST {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SLASTR {
            bits: u32,
        }
        impl SLASTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SLASTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SLASTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Last Source Address Adjustment"]
            #[inline(always)]
            pub fn slast(&self) -> SLASTR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SLASTR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Last Source Address Adjustment"]
            #[inline(always)]
            pub fn slast(&mut self) -> _SLASTW {
                _SLASTW { w: self }
            }
        }
    }
    #[doc = "TCD Destination Address"]
    pub struct TCD9_DADDR {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Destination Address"]
    pub mod tcd9_daddr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD9_DADDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DADDRR {
            bits: u32,
        }
        impl DADDRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DADDRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DADDRW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Destination Address"]
            #[inline(always)]
            pub fn daddr(&self) -> DADDRR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                DADDRR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Destination Address"]
            #[inline(always)]
            pub fn daddr(&mut self) -> _DADDRW {
                _DADDRW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Destination Address Offset"]
    pub struct TCD9_DOFF {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Signed Destination Address Offset"]
    pub mod tcd9_doff {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD9_DOFF {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DOFFR {
            bits: u16,
        }
        impl DOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:15 - Destination Address Signed Offset"]
            #[inline(always)]
            pub fn doff(&self) -> DOFFR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                DOFFR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Destination Address Signed Offset"]
            #[inline(always)]
            pub fn doff(&mut self) -> _DOFFW {
                _DOFFW { w: self }
            }
        }
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub struct TCD9_CITER_ELINKNO {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub mod tcd9_citer_elinkno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD9_CITER_ELINKNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CITERR {
            bits: u16,
        }
        impl CITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 32767;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:14 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer(&self) -> CITERR {
                let bits = {
                    const MASK: u16 = 32767;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                CITERR { bits }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:14 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer(&mut self) -> _CITERW {
                _CITERW { w: self }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub struct TCD9_CITER_ELINKYES {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub mod tcd9_citer_elinkyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD9_CITER_ELINKYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CITER_LER {
            bits: u16,
        }
        impl CITER_LER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct LINKCHR {
            bits: u8,
        }
        impl LINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CITER_LEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CITER_LEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 511;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _LINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:8 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer_le(&self) -> CITER_LER {
                let bits = {
                    const MASK: u16 = 511;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                CITER_LER { bits }
            }
            #[doc = "Bits 9:12 - Minor Loop Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&self) -> LINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                LINKCHR { bits }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:8 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer_le(&mut self) -> _CITER_LEW {
                _CITER_LEW { w: self }
            }
            #[doc = "Bits 9:12 - Minor Loop Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&mut self) -> _LINKCHW {
                _LINKCHW { w: self }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Last Destination Address Adjustment/Scatter Gather Address"]
    pub struct TCD9_DLASTSGA {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Last Destination Address Adjustment/Scatter Gather Address"]
    pub mod tcd9_dlastsga {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD9_DLASTSGA {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLASTSGAR {
            bits: u32,
        }
        impl DLASTSGAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DLASTSGAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DLASTSGAW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - DLASTSGA"]
            #[inline(always)]
            pub fn dlastsga(&self) -> DLASTSGAR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                DLASTSGAR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - DLASTSGA"]
            #[inline(always)]
            pub fn dlastsga(&mut self) -> _DLASTSGAW {
                _DLASTSGAW { w: self }
            }
        }
    }
    #[doc = "TCD Control and Status"]
    pub struct TCD9_CSR {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Control and Status"]
    pub mod tcd9_csr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD9_CSR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `START`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum STARTR {
            #[doc = "The channel is not explicitly started."]
            _0,
            #[doc = "The channel is explicitly started via a software initiated service request."]
            _1,
        }
        impl STARTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    STARTR::_0 => false,
                    STARTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> STARTR {
                match value {
                    false => STARTR::_0,
                    true => STARTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == STARTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == STARTR::_1
            }
        }
        #[doc = "Possible values of the field `INTMAJOR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INTMAJORR {
            #[doc = "The end-of-major loop interrupt is disabled."]
            _0,
            #[doc = "The end-of-major loop interrupt is enabled."]
            _1,
        }
        impl INTMAJORR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INTMAJORR::_0 => false,
                    INTMAJORR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INTMAJORR {
                match value {
                    false => INTMAJORR::_0,
                    true => INTMAJORR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INTMAJORR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INTMAJORR::_1
            }
        }
        #[doc = "Possible values of the field `INTHALF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INTHALFR {
            #[doc = "The half-point interrupt is disabled."]
            _0,
            #[doc = "The half-point interrupt is enabled."]
            _1,
        }
        impl INTHALFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INTHALFR::_0 => false,
                    INTHALFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INTHALFR {
                match value {
                    false => INTHALFR::_0,
                    true => INTHALFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INTHALFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INTHALFR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct DREQR {
            bits: bool,
        }
        impl DREQR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `ESG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ESGR {
            #[doc = "The current channel's TCD is normal format."]
            _0,
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            _1,
        }
        impl ESGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ESGR::_0 => false,
                    ESGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ESGR {
                match value {
                    false => ESGR::_0,
                    true => ESGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ESGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ESGR::_1
            }
        }
        #[doc = "Possible values of the field `MAJORELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MAJORELINKR {
            #[doc = "The channel-to-channel linking is disabled."]
            _0,
            #[doc = "The channel-to-channel linking is enabled."]
            _1,
        }
        impl MAJORELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MAJORELINKR::_0 => false,
                    MAJORELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MAJORELINKR {
                match value {
                    false => MAJORELINKR::_0,
                    true => MAJORELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MAJORELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MAJORELINKR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ACTIVER {
            bits: bool,
        }
        impl ACTIVER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct DONER {
            bits: bool,
        }
        impl DONER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MAJORLINKCHR {
            bits: u8,
        }
        impl MAJORLINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `BWC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BWCR {
            #[doc = "No eDMA engine stalls."]
            _0,
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            _10,
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            _11,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl BWCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    BWCR::_0 => 0,
                    BWCR::_10 => 2,
                    BWCR::_11 => 3,
                    BWCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> BWCR {
                match value {
                    0 => BWCR::_0,
                    2 => BWCR::_10,
                    3 => BWCR::_11,
                    i => BWCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BWCR::_0
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == BWCR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == BWCR::_11
            }
        }
        #[doc = "Values that can be written to the field `START`"]
        pub enum STARTW {
            #[doc = "The channel is not explicitly started."]
            _0,
            #[doc = "The channel is explicitly started via a software initiated service request."]
            _1,
        }
        impl STARTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    STARTW::_0 => false,
                    STARTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _STARTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _STARTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: STARTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel is not explicitly started."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(STARTW::_0)
            }
            #[doc = "The channel is explicitly started via a software initiated service request."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(STARTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INTMAJOR`"]
        pub enum INTMAJORW {
            #[doc = "The end-of-major loop interrupt is disabled."]
            _0,
            #[doc = "The end-of-major loop interrupt is enabled."]
            _1,
        }
        impl INTMAJORW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INTMAJORW::_0 => false,
                    INTMAJORW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INTMAJORW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INTMAJORW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INTMAJORW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The end-of-major loop interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INTMAJORW::_0)
            }
            #[doc = "The end-of-major loop interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INTMAJORW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INTHALF`"]
        pub enum INTHALFW {
            #[doc = "The half-point interrupt is disabled."]
            _0,
            #[doc = "The half-point interrupt is enabled."]
            _1,
        }
        impl INTHALFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INTHALFW::_0 => false,
                    INTHALFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INTHALFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INTHALFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INTHALFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The half-point interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INTHALFW::_0)
            }
            #[doc = "The half-point interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INTHALFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DREQW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DREQW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ESG`"]
        pub enum ESGW {
            #[doc = "The current channel's TCD is normal format."]
            _0,
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            _1,
        }
        impl ESGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ESGW::_0 => false,
                    ESGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ESGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ESGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ESGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The current channel's TCD is normal format."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ESGW::_0)
            }
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ESGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MAJORELINK`"]
        pub enum MAJORELINKW {
            #[doc = "The channel-to-channel linking is disabled."]
            _0,
            #[doc = "The channel-to-channel linking is enabled."]
            _1,
        }
        impl MAJORELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MAJORELINKW::_0 => false,
                    MAJORELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MAJORELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MAJORELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MAJORELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MAJORELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MAJORELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ACTIVEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ACTIVEW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DONEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DONEW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MAJORLINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MAJORLINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BWC`"]
        pub enum BWCW {
            #[doc = "No eDMA engine stalls."]
            _0,
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            _10,
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            _11,
        }
        impl BWCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    BWCW::_0 => 0,
                    BWCW::_10 => 2,
                    BWCW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BWCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BWCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BWCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "No eDMA engine stalls."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BWCW::_0)
            }
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(BWCW::_10)
            }
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(BWCW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bit 0 - Channel Start"]
            #[inline(always)]
            pub fn start(&self) -> STARTR {
                STARTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 1 - Enable an interrupt when major iteration count completes."]
            #[inline(always)]
            pub fn intmajor(&self) -> INTMAJORR {
                INTMAJORR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 2 - Enable an interrupt when major counter is half complete."]
            #[inline(always)]
            pub fn inthalf(&self) -> INTHALFR {
                INTHALFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 3 - Disable Request"]
            #[inline(always)]
            pub fn dreq(&self) -> DREQR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                DREQR { bits }
            }
            #[doc = "Bit 4 - Enable Scatter/Gather Processing"]
            #[inline(always)]
            pub fn esg(&self) -> ESGR {
                ESGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 5 - Enable channel-to-channel linking on major loop complete"]
            #[inline(always)]
            pub fn majorelink(&self) -> MAJORELINKR {
                MAJORELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 6 - Channel Active"]
            #[inline(always)]
            pub fn active(&self) -> ACTIVER {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                ACTIVER { bits }
            }
            #[doc = "Bit 7 - Channel Done"]
            #[inline(always)]
            pub fn done(&self) -> DONER {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                DONER { bits }
            }
            #[doc = "Bits 8:11 - Major Loop Link Channel Number"]
            #[inline(always)]
            pub fn majorlinkch(&self) -> MAJORLINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                MAJORLINKCHR { bits }
            }
            #[doc = "Bits 14:15 - Bandwidth Control"]
            #[inline(always)]
            pub fn bwc(&self) -> BWCR {
                BWCR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Channel Start"]
            #[inline(always)]
            pub fn start(&mut self) -> _STARTW {
                _STARTW { w: self }
            }
            #[doc = "Bit 1 - Enable an interrupt when major iteration count completes."]
            #[inline(always)]
            pub fn intmajor(&mut self) -> _INTMAJORW {
                _INTMAJORW { w: self }
            }
            #[doc = "Bit 2 - Enable an interrupt when major counter is half complete."]
            #[inline(always)]
            pub fn inthalf(&mut self) -> _INTHALFW {
                _INTHALFW { w: self }
            }
            #[doc = "Bit 3 - Disable Request"]
            #[inline(always)]
            pub fn dreq(&mut self) -> _DREQW {
                _DREQW { w: self }
            }
            #[doc = "Bit 4 - Enable Scatter/Gather Processing"]
            #[inline(always)]
            pub fn esg(&mut self) -> _ESGW {
                _ESGW { w: self }
            }
            #[doc = "Bit 5 - Enable channel-to-channel linking on major loop complete"]
            #[inline(always)]
            pub fn majorelink(&mut self) -> _MAJORELINKW {
                _MAJORELINKW { w: self }
            }
            #[doc = "Bit 6 - Channel Active"]
            #[inline(always)]
            pub fn active(&mut self) -> _ACTIVEW {
                _ACTIVEW { w: self }
            }
            #[doc = "Bit 7 - Channel Done"]
            #[inline(always)]
            pub fn done(&mut self) -> _DONEW {
                _DONEW { w: self }
            }
            #[doc = "Bits 8:11 - Major Loop Link Channel Number"]
            #[inline(always)]
            pub fn majorlinkch(&mut self) -> _MAJORLINKCHW {
                _MAJORLINKCHW { w: self }
            }
            #[doc = "Bits 14:15 - Bandwidth Control"]
            #[inline(always)]
            pub fn bwc(&mut self) -> _BWCW {
                _BWCW { w: self }
            }
        }
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub struct TCD9_BITER_ELINKNO {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub mod tcd9_biter_elinkno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD9_BITER_ELINKNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BITERR {
            bits: u16,
        }
        impl BITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _BITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 32767;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:14 - Starting Major Iteration Count"]
            #[inline(always)]
            pub fn biter(&self) -> BITERR {
                let bits = {
                    const MASK: u16 = 32767;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                BITERR { bits }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:14 - Starting Major Iteration Count"]
            #[inline(always)]
            pub fn biter(&mut self) -> _BITERW {
                _BITERW { w: self }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub struct TCD9_BITER_ELINKYES {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub mod tcd9_biter_elinkyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD9_BITER_ELINKYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BITERR {
            bits: u16,
        }
        impl BITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct LINKCHR {
            bits: u8,
        }
        impl LINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _BITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 511;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _LINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:8 - Starting major iteration count"]
            #[inline(always)]
            pub fn biter(&self) -> BITERR {
                let bits = {
                    const MASK: u16 = 511;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                BITERR { bits }
            }
            #[doc = "Bits 9:12 - Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&self) -> LINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                LINKCHR { bits }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:8 - Starting major iteration count"]
            #[inline(always)]
            pub fn biter(&mut self) -> _BITERW {
                _BITERW { w: self }
            }
            #[doc = "Bits 9:12 - Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&mut self) -> _LINKCHW {
                _LINKCHW { w: self }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Source Address"]
    pub struct TCD10_SADDR {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Source Address"]
    pub mod tcd10_saddr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD10_SADDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SADDRR {
            bits: u32,
        }
        impl SADDRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SADDRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SADDRW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Source Address"]
            #[inline(always)]
            pub fn saddr(&self) -> SADDRR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SADDRR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Source Address"]
            #[inline(always)]
            pub fn saddr(&mut self) -> _SADDRW {
                _SADDRW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Source Address Offset"]
    pub struct TCD10_SOFF {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Signed Source Address Offset"]
    pub mod tcd10_soff {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD10_SOFF {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SOFFR {
            bits: u16,
        }
        impl SOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:15 - Source address signed offset"]
            #[inline(always)]
            pub fn soff(&self) -> SOFFR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                SOFFR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Source address signed offset"]
            #[inline(always)]
            pub fn soff(&mut self) -> _SOFFW {
                _SOFFW { w: self }
            }
        }
    }
    #[doc = "TCD Transfer Attributes"]
    pub struct TCD10_ATTR {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Transfer Attributes"]
    pub mod tcd10_attr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD10_ATTR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DSIZER {
            bits: u8,
        }
        impl DSIZER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DMODR {
            bits: u8,
        }
        impl DMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `SSIZE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SSIZER {
            #[doc = "8-bit"]
            _0,
            #[doc = "16-bit"]
            _1,
            #[doc = "32-bit"]
            _10,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl SSIZER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SSIZER::_0 => 0,
                    SSIZER::_1 => 1,
                    SSIZER::_10 => 2,
                    SSIZER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SSIZER {
                match value {
                    0 => SSIZER::_0,
                    1 => SSIZER::_1,
                    2 => SSIZER::_10,
                    i => SSIZER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SSIZER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SSIZER::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == SSIZER::_10
            }
        }
        #[doc = "Possible values of the field `SMOD`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMODR {
            #[doc = "Source address modulo feature is disabled"]
            _0,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl SMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SMODR::_0 => 0,
                    SMODR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SMODR {
                match value {
                    0 => SMODR::_0,
                    i => SMODR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMODR::_0
            }
        }
        #[doc = r" Proxy"]
        pub struct _DSIZEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DSIZEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMODW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SSIZE`"]
        pub enum SSIZEW {
            #[doc = "8-bit"]
            _0,
            #[doc = "16-bit"]
            _1,
            #[doc = "32-bit"]
            _10,
        }
        impl SSIZEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SSIZEW::_0 => 0,
                    SSIZEW::_1 => 1,
                    SSIZEW::_10 => 2,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SSIZEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SSIZEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SSIZEW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "8-bit"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SSIZEW::_0)
            }
            #[doc = "16-bit"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SSIZEW::_1)
            }
            #[doc = "32-bit"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(SSIZEW::_10)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMOD`"]
        pub enum SMODW {
            #[doc = "Source address modulo feature is disabled"]
            _0,
        }
        impl SMODW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SMODW::_0 => 0,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMODW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMODW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Source address modulo feature is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMODW::_0)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:2 - Destination data transfer size"]
            #[inline(always)]
            pub fn dsize(&self) -> DSIZER {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                DSIZER { bits }
            }
            #[doc = "Bits 3:7 - Destination Address Modulo"]
            #[inline(always)]
            pub fn dmod(&self) -> DMODR {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                DMODR { bits }
            }
            #[doc = "Bits 8:10 - Source data transfer size"]
            #[inline(always)]
            pub fn ssize(&self) -> SSIZER {
                SSIZER::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
            #[doc = "Bits 11:15 - Source Address Modulo"]
            #[inline(always)]
            pub fn smod(&self) -> SMODR {
                SMODR::_from({
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:2 - Destination data transfer size"]
            #[inline(always)]
            pub fn dsize(&mut self) -> _DSIZEW {
                _DSIZEW { w: self }
            }
            #[doc = "Bits 3:7 - Destination Address Modulo"]
            #[inline(always)]
            pub fn dmod(&mut self) -> _DMODW {
                _DMODW { w: self }
            }
            #[doc = "Bits 8:10 - Source data transfer size"]
            #[inline(always)]
            pub fn ssize(&mut self) -> _SSIZEW {
                _SSIZEW { w: self }
            }
            #[doc = "Bits 11:15 - Source Address Modulo"]
            #[inline(always)]
            pub fn smod(&mut self) -> _SMODW {
                _SMODW { w: self }
            }
        }
    }
    #[doc = "TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
    pub struct TCD10_NBYTES_MLNO {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
    pub mod tcd10_nbytes_mlno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD10_NBYTES_MLNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u32,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                NBYTESR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"]
    pub struct TCD10_NBYTES_MLOFFNO {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"]
    pub mod tcd10_nbytes_mloffno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD10_NBYTES_MLOFFNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u32,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMLOER {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMLOER::_0 => false,
                    DMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMLOER {
                match value {
                    false => DMLOER::_0,
                    true => DMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMLOER::_1
            }
        }
        #[doc = "Possible values of the field `SMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMLOER {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SMLOER::_0 => false,
                    SMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SMLOER {
                match value {
                    false => SMLOER::_0,
                    true => SMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SMLOER::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 1073741823;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMLOE`"]
        pub enum DMLOEW {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMLOEW::_0 => false,
                    DMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the DADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the DADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMLOE`"]
        pub enum SMLOEW {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SMLOEW::_0 => false,
                    SMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the SADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the SADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:29 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u32 = 1073741823;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                NBYTESR { bits }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&self) -> DMLOER {
                DMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&self) -> SMLOER {
                SMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:29 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&mut self) -> _DMLOEW {
                _DMLOEW { w: self }
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&mut self) -> _SMLOEW {
                _SMLOEW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"]
    pub struct TCD10_NBYTES_MLOFFYES {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"]
    pub mod tcd10_nbytes_mloffyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD10_NBYTES_MLOFFYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u16,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct MLOFFR {
            bits: u32,
        }
        impl MLOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMLOER {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMLOER::_0 => false,
                    DMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMLOER {
                match value {
                    false => DMLOER::_0,
                    true => DMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMLOER::_1
            }
        }
        #[doc = "Possible values of the field `SMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMLOER {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SMLOER::_0 => false,
                    SMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SMLOER {
                match value {
                    false => SMLOER::_0,
                    true => SMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SMLOER::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 1023;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MLOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MLOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 1048575;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMLOE`"]
        pub enum DMLOEW {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMLOEW::_0 => false,
                    DMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the DADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the DADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMLOE`"]
        pub enum SMLOEW {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SMLOEW::_0 => false,
                    SMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the SADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the SADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:9 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u16 = 1023;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                NBYTESR { bits }
            }
            #[doc = "Bits 10:29 - If SMLOE or DMLOE is set, this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."]
            #[inline(always)]
            pub fn mloff(&self) -> MLOFFR {
                let bits = {
                    const MASK: u32 = 1048575;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MLOFFR { bits }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&self) -> DMLOER {
                DMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&self) -> SMLOER {
                SMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:9 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
            #[doc = "Bits 10:29 - If SMLOE or DMLOE is set, this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."]
            #[inline(always)]
            pub fn mloff(&mut self) -> _MLOFFW {
                _MLOFFW { w: self }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&mut self) -> _DMLOEW {
                _DMLOEW { w: self }
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&mut self) -> _SMLOEW {
                _SMLOEW { w: self }
            }
        }
    }
    #[doc = "TCD Last Source Address Adjustment"]
    pub struct TCD10_SLAST {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Last Source Address Adjustment"]
    pub mod tcd10_slast {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD10_SLAST {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SLASTR {
            bits: u32,
        }
        impl SLASTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SLASTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SLASTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Last Source Address Adjustment"]
            #[inline(always)]
            pub fn slast(&self) -> SLASTR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SLASTR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Last Source Address Adjustment"]
            #[inline(always)]
            pub fn slast(&mut self) -> _SLASTW {
                _SLASTW { w: self }
            }
        }
    }
    #[doc = "TCD Destination Address"]
    pub struct TCD10_DADDR {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Destination Address"]
    pub mod tcd10_daddr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD10_DADDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DADDRR {
            bits: u32,
        }
        impl DADDRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DADDRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DADDRW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Destination Address"]
            #[inline(always)]
            pub fn daddr(&self) -> DADDRR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                DADDRR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Destination Address"]
            #[inline(always)]
            pub fn daddr(&mut self) -> _DADDRW {
                _DADDRW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Destination Address Offset"]
    pub struct TCD10_DOFF {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Signed Destination Address Offset"]
    pub mod tcd10_doff {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD10_DOFF {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DOFFR {
            bits: u16,
        }
        impl DOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:15 - Destination Address Signed Offset"]
            #[inline(always)]
            pub fn doff(&self) -> DOFFR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                DOFFR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Destination Address Signed Offset"]
            #[inline(always)]
            pub fn doff(&mut self) -> _DOFFW {
                _DOFFW { w: self }
            }
        }
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub struct TCD10_CITER_ELINKNO {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub mod tcd10_citer_elinkno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD10_CITER_ELINKNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CITERR {
            bits: u16,
        }
        impl CITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 32767;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:14 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer(&self) -> CITERR {
                let bits = {
                    const MASK: u16 = 32767;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                CITERR { bits }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:14 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer(&mut self) -> _CITERW {
                _CITERW { w: self }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub struct TCD10_CITER_ELINKYES {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub mod tcd10_citer_elinkyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD10_CITER_ELINKYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CITER_LER {
            bits: u16,
        }
        impl CITER_LER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct LINKCHR {
            bits: u8,
        }
        impl LINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CITER_LEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CITER_LEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 511;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _LINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:8 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer_le(&self) -> CITER_LER {
                let bits = {
                    const MASK: u16 = 511;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                CITER_LER { bits }
            }
            #[doc = "Bits 9:12 - Minor Loop Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&self) -> LINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                LINKCHR { bits }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:8 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer_le(&mut self) -> _CITER_LEW {
                _CITER_LEW { w: self }
            }
            #[doc = "Bits 9:12 - Minor Loop Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&mut self) -> _LINKCHW {
                _LINKCHW { w: self }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Last Destination Address Adjustment/Scatter Gather Address"]
    pub struct TCD10_DLASTSGA {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Last Destination Address Adjustment/Scatter Gather Address"]
    pub mod tcd10_dlastsga {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD10_DLASTSGA {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLASTSGAR {
            bits: u32,
        }
        impl DLASTSGAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DLASTSGAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DLASTSGAW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - DLASTSGA"]
            #[inline(always)]
            pub fn dlastsga(&self) -> DLASTSGAR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                DLASTSGAR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - DLASTSGA"]
            #[inline(always)]
            pub fn dlastsga(&mut self) -> _DLASTSGAW {
                _DLASTSGAW { w: self }
            }
        }
    }
    #[doc = "TCD Control and Status"]
    pub struct TCD10_CSR {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Control and Status"]
    pub mod tcd10_csr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD10_CSR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `START`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum STARTR {
            #[doc = "The channel is not explicitly started."]
            _0,
            #[doc = "The channel is explicitly started via a software initiated service request."]
            _1,
        }
        impl STARTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    STARTR::_0 => false,
                    STARTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> STARTR {
                match value {
                    false => STARTR::_0,
                    true => STARTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == STARTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == STARTR::_1
            }
        }
        #[doc = "Possible values of the field `INTMAJOR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INTMAJORR {
            #[doc = "The end-of-major loop interrupt is disabled."]
            _0,
            #[doc = "The end-of-major loop interrupt is enabled."]
            _1,
        }
        impl INTMAJORR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INTMAJORR::_0 => false,
                    INTMAJORR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INTMAJORR {
                match value {
                    false => INTMAJORR::_0,
                    true => INTMAJORR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INTMAJORR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INTMAJORR::_1
            }
        }
        #[doc = "Possible values of the field `INTHALF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INTHALFR {
            #[doc = "The half-point interrupt is disabled."]
            _0,
            #[doc = "The half-point interrupt is enabled."]
            _1,
        }
        impl INTHALFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INTHALFR::_0 => false,
                    INTHALFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INTHALFR {
                match value {
                    false => INTHALFR::_0,
                    true => INTHALFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INTHALFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INTHALFR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct DREQR {
            bits: bool,
        }
        impl DREQR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `ESG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ESGR {
            #[doc = "The current channel's TCD is normal format."]
            _0,
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            _1,
        }
        impl ESGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ESGR::_0 => false,
                    ESGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ESGR {
                match value {
                    false => ESGR::_0,
                    true => ESGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ESGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ESGR::_1
            }
        }
        #[doc = "Possible values of the field `MAJORELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MAJORELINKR {
            #[doc = "The channel-to-channel linking is disabled."]
            _0,
            #[doc = "The channel-to-channel linking is enabled."]
            _1,
        }
        impl MAJORELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MAJORELINKR::_0 => false,
                    MAJORELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MAJORELINKR {
                match value {
                    false => MAJORELINKR::_0,
                    true => MAJORELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MAJORELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MAJORELINKR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ACTIVER {
            bits: bool,
        }
        impl ACTIVER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct DONER {
            bits: bool,
        }
        impl DONER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MAJORLINKCHR {
            bits: u8,
        }
        impl MAJORLINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `BWC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BWCR {
            #[doc = "No eDMA engine stalls."]
            _0,
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            _10,
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            _11,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl BWCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    BWCR::_0 => 0,
                    BWCR::_10 => 2,
                    BWCR::_11 => 3,
                    BWCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> BWCR {
                match value {
                    0 => BWCR::_0,
                    2 => BWCR::_10,
                    3 => BWCR::_11,
                    i => BWCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BWCR::_0
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == BWCR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == BWCR::_11
            }
        }
        #[doc = "Values that can be written to the field `START`"]
        pub enum STARTW {
            #[doc = "The channel is not explicitly started."]
            _0,
            #[doc = "The channel is explicitly started via a software initiated service request."]
            _1,
        }
        impl STARTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    STARTW::_0 => false,
                    STARTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _STARTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _STARTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: STARTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel is not explicitly started."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(STARTW::_0)
            }
            #[doc = "The channel is explicitly started via a software initiated service request."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(STARTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INTMAJOR`"]
        pub enum INTMAJORW {
            #[doc = "The end-of-major loop interrupt is disabled."]
            _0,
            #[doc = "The end-of-major loop interrupt is enabled."]
            _1,
        }
        impl INTMAJORW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INTMAJORW::_0 => false,
                    INTMAJORW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INTMAJORW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INTMAJORW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INTMAJORW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The end-of-major loop interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INTMAJORW::_0)
            }
            #[doc = "The end-of-major loop interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INTMAJORW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INTHALF`"]
        pub enum INTHALFW {
            #[doc = "The half-point interrupt is disabled."]
            _0,
            #[doc = "The half-point interrupt is enabled."]
            _1,
        }
        impl INTHALFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INTHALFW::_0 => false,
                    INTHALFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INTHALFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INTHALFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INTHALFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The half-point interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INTHALFW::_0)
            }
            #[doc = "The half-point interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INTHALFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DREQW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DREQW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ESG`"]
        pub enum ESGW {
            #[doc = "The current channel's TCD is normal format."]
            _0,
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            _1,
        }
        impl ESGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ESGW::_0 => false,
                    ESGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ESGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ESGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ESGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The current channel's TCD is normal format."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ESGW::_0)
            }
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ESGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MAJORELINK`"]
        pub enum MAJORELINKW {
            #[doc = "The channel-to-channel linking is disabled."]
            _0,
            #[doc = "The channel-to-channel linking is enabled."]
            _1,
        }
        impl MAJORELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MAJORELINKW::_0 => false,
                    MAJORELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MAJORELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MAJORELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MAJORELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MAJORELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MAJORELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ACTIVEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ACTIVEW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DONEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DONEW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MAJORLINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MAJORLINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BWC`"]
        pub enum BWCW {
            #[doc = "No eDMA engine stalls."]
            _0,
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            _10,
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            _11,
        }
        impl BWCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    BWCW::_0 => 0,
                    BWCW::_10 => 2,
                    BWCW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BWCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BWCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BWCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "No eDMA engine stalls."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BWCW::_0)
            }
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(BWCW::_10)
            }
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(BWCW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bit 0 - Channel Start"]
            #[inline(always)]
            pub fn start(&self) -> STARTR {
                STARTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 1 - Enable an interrupt when major iteration count completes."]
            #[inline(always)]
            pub fn intmajor(&self) -> INTMAJORR {
                INTMAJORR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 2 - Enable an interrupt when major counter is half complete."]
            #[inline(always)]
            pub fn inthalf(&self) -> INTHALFR {
                INTHALFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 3 - Disable Request"]
            #[inline(always)]
            pub fn dreq(&self) -> DREQR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                DREQR { bits }
            }
            #[doc = "Bit 4 - Enable Scatter/Gather Processing"]
            #[inline(always)]
            pub fn esg(&self) -> ESGR {
                ESGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 5 - Enable channel-to-channel linking on major loop complete"]
            #[inline(always)]
            pub fn majorelink(&self) -> MAJORELINKR {
                MAJORELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 6 - Channel Active"]
            #[inline(always)]
            pub fn active(&self) -> ACTIVER {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                ACTIVER { bits }
            }
            #[doc = "Bit 7 - Channel Done"]
            #[inline(always)]
            pub fn done(&self) -> DONER {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                DONER { bits }
            }
            #[doc = "Bits 8:11 - Major Loop Link Channel Number"]
            #[inline(always)]
            pub fn majorlinkch(&self) -> MAJORLINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                MAJORLINKCHR { bits }
            }
            #[doc = "Bits 14:15 - Bandwidth Control"]
            #[inline(always)]
            pub fn bwc(&self) -> BWCR {
                BWCR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Channel Start"]
            #[inline(always)]
            pub fn start(&mut self) -> _STARTW {
                _STARTW { w: self }
            }
            #[doc = "Bit 1 - Enable an interrupt when major iteration count completes."]
            #[inline(always)]
            pub fn intmajor(&mut self) -> _INTMAJORW {
                _INTMAJORW { w: self }
            }
            #[doc = "Bit 2 - Enable an interrupt when major counter is half complete."]
            #[inline(always)]
            pub fn inthalf(&mut self) -> _INTHALFW {
                _INTHALFW { w: self }
            }
            #[doc = "Bit 3 - Disable Request"]
            #[inline(always)]
            pub fn dreq(&mut self) -> _DREQW {
                _DREQW { w: self }
            }
            #[doc = "Bit 4 - Enable Scatter/Gather Processing"]
            #[inline(always)]
            pub fn esg(&mut self) -> _ESGW {
                _ESGW { w: self }
            }
            #[doc = "Bit 5 - Enable channel-to-channel linking on major loop complete"]
            #[inline(always)]
            pub fn majorelink(&mut self) -> _MAJORELINKW {
                _MAJORELINKW { w: self }
            }
            #[doc = "Bit 6 - Channel Active"]
            #[inline(always)]
            pub fn active(&mut self) -> _ACTIVEW {
                _ACTIVEW { w: self }
            }
            #[doc = "Bit 7 - Channel Done"]
            #[inline(always)]
            pub fn done(&mut self) -> _DONEW {
                _DONEW { w: self }
            }
            #[doc = "Bits 8:11 - Major Loop Link Channel Number"]
            #[inline(always)]
            pub fn majorlinkch(&mut self) -> _MAJORLINKCHW {
                _MAJORLINKCHW { w: self }
            }
            #[doc = "Bits 14:15 - Bandwidth Control"]
            #[inline(always)]
            pub fn bwc(&mut self) -> _BWCW {
                _BWCW { w: self }
            }
        }
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub struct TCD10_BITER_ELINKNO {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub mod tcd10_biter_elinkno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD10_BITER_ELINKNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BITERR {
            bits: u16,
        }
        impl BITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _BITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 32767;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:14 - Starting Major Iteration Count"]
            #[inline(always)]
            pub fn biter(&self) -> BITERR {
                let bits = {
                    const MASK: u16 = 32767;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                BITERR { bits }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:14 - Starting Major Iteration Count"]
            #[inline(always)]
            pub fn biter(&mut self) -> _BITERW {
                _BITERW { w: self }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub struct TCD10_BITER_ELINKYES {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub mod tcd10_biter_elinkyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD10_BITER_ELINKYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BITERR {
            bits: u16,
        }
        impl BITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct LINKCHR {
            bits: u8,
        }
        impl LINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _BITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 511;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _LINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:8 - Starting major iteration count"]
            #[inline(always)]
            pub fn biter(&self) -> BITERR {
                let bits = {
                    const MASK: u16 = 511;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                BITERR { bits }
            }
            #[doc = "Bits 9:12 - Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&self) -> LINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                LINKCHR { bits }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:8 - Starting major iteration count"]
            #[inline(always)]
            pub fn biter(&mut self) -> _BITERW {
                _BITERW { w: self }
            }
            #[doc = "Bits 9:12 - Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&mut self) -> _LINKCHW {
                _LINKCHW { w: self }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Source Address"]
    pub struct TCD11_SADDR {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Source Address"]
    pub mod tcd11_saddr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD11_SADDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SADDRR {
            bits: u32,
        }
        impl SADDRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SADDRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SADDRW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Source Address"]
            #[inline(always)]
            pub fn saddr(&self) -> SADDRR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SADDRR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Source Address"]
            #[inline(always)]
            pub fn saddr(&mut self) -> _SADDRW {
                _SADDRW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Source Address Offset"]
    pub struct TCD11_SOFF {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Signed Source Address Offset"]
    pub mod tcd11_soff {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD11_SOFF {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SOFFR {
            bits: u16,
        }
        impl SOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:15 - Source address signed offset"]
            #[inline(always)]
            pub fn soff(&self) -> SOFFR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                SOFFR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Source address signed offset"]
            #[inline(always)]
            pub fn soff(&mut self) -> _SOFFW {
                _SOFFW { w: self }
            }
        }
    }
    #[doc = "TCD Transfer Attributes"]
    pub struct TCD11_ATTR {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Transfer Attributes"]
    pub mod tcd11_attr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD11_ATTR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DSIZER {
            bits: u8,
        }
        impl DSIZER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DMODR {
            bits: u8,
        }
        impl DMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `SSIZE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SSIZER {
            #[doc = "8-bit"]
            _0,
            #[doc = "16-bit"]
            _1,
            #[doc = "32-bit"]
            _10,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl SSIZER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SSIZER::_0 => 0,
                    SSIZER::_1 => 1,
                    SSIZER::_10 => 2,
                    SSIZER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SSIZER {
                match value {
                    0 => SSIZER::_0,
                    1 => SSIZER::_1,
                    2 => SSIZER::_10,
                    i => SSIZER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SSIZER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SSIZER::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == SSIZER::_10
            }
        }
        #[doc = "Possible values of the field `SMOD`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMODR {
            #[doc = "Source address modulo feature is disabled"]
            _0,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl SMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SMODR::_0 => 0,
                    SMODR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SMODR {
                match value {
                    0 => SMODR::_0,
                    i => SMODR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMODR::_0
            }
        }
        #[doc = r" Proxy"]
        pub struct _DSIZEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DSIZEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMODW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SSIZE`"]
        pub enum SSIZEW {
            #[doc = "8-bit"]
            _0,
            #[doc = "16-bit"]
            _1,
            #[doc = "32-bit"]
            _10,
        }
        impl SSIZEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SSIZEW::_0 => 0,
                    SSIZEW::_1 => 1,
                    SSIZEW::_10 => 2,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SSIZEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SSIZEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SSIZEW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "8-bit"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SSIZEW::_0)
            }
            #[doc = "16-bit"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SSIZEW::_1)
            }
            #[doc = "32-bit"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(SSIZEW::_10)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMOD`"]
        pub enum SMODW {
            #[doc = "Source address modulo feature is disabled"]
            _0,
        }
        impl SMODW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SMODW::_0 => 0,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMODW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMODW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Source address modulo feature is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMODW::_0)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:2 - Destination data transfer size"]
            #[inline(always)]
            pub fn dsize(&self) -> DSIZER {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                DSIZER { bits }
            }
            #[doc = "Bits 3:7 - Destination Address Modulo"]
            #[inline(always)]
            pub fn dmod(&self) -> DMODR {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                DMODR { bits }
            }
            #[doc = "Bits 8:10 - Source data transfer size"]
            #[inline(always)]
            pub fn ssize(&self) -> SSIZER {
                SSIZER::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
            #[doc = "Bits 11:15 - Source Address Modulo"]
            #[inline(always)]
            pub fn smod(&self) -> SMODR {
                SMODR::_from({
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:2 - Destination data transfer size"]
            #[inline(always)]
            pub fn dsize(&mut self) -> _DSIZEW {
                _DSIZEW { w: self }
            }
            #[doc = "Bits 3:7 - Destination Address Modulo"]
            #[inline(always)]
            pub fn dmod(&mut self) -> _DMODW {
                _DMODW { w: self }
            }
            #[doc = "Bits 8:10 - Source data transfer size"]
            #[inline(always)]
            pub fn ssize(&mut self) -> _SSIZEW {
                _SSIZEW { w: self }
            }
            #[doc = "Bits 11:15 - Source Address Modulo"]
            #[inline(always)]
            pub fn smod(&mut self) -> _SMODW {
                _SMODW { w: self }
            }
        }
    }
    #[doc = "TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
    pub struct TCD11_NBYTES_MLNO {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
    pub mod tcd11_nbytes_mlno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD11_NBYTES_MLNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u32,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                NBYTESR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"]
    pub struct TCD11_NBYTES_MLOFFNO {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"]
    pub mod tcd11_nbytes_mloffno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD11_NBYTES_MLOFFNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u32,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMLOER {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMLOER::_0 => false,
                    DMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMLOER {
                match value {
                    false => DMLOER::_0,
                    true => DMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMLOER::_1
            }
        }
        #[doc = "Possible values of the field `SMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMLOER {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SMLOER::_0 => false,
                    SMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SMLOER {
                match value {
                    false => SMLOER::_0,
                    true => SMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SMLOER::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 1073741823;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMLOE`"]
        pub enum DMLOEW {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMLOEW::_0 => false,
                    DMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the DADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the DADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMLOE`"]
        pub enum SMLOEW {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SMLOEW::_0 => false,
                    SMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the SADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the SADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:29 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u32 = 1073741823;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                NBYTESR { bits }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&self) -> DMLOER {
                DMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&self) -> SMLOER {
                SMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:29 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&mut self) -> _DMLOEW {
                _DMLOEW { w: self }
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&mut self) -> _SMLOEW {
                _SMLOEW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"]
    pub struct TCD11_NBYTES_MLOFFYES {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"]
    pub mod tcd11_nbytes_mloffyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD11_NBYTES_MLOFFYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u16,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct MLOFFR {
            bits: u32,
        }
        impl MLOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMLOER {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMLOER::_0 => false,
                    DMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMLOER {
                match value {
                    false => DMLOER::_0,
                    true => DMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMLOER::_1
            }
        }
        #[doc = "Possible values of the field `SMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMLOER {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SMLOER::_0 => false,
                    SMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SMLOER {
                match value {
                    false => SMLOER::_0,
                    true => SMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SMLOER::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 1023;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MLOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MLOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 1048575;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMLOE`"]
        pub enum DMLOEW {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMLOEW::_0 => false,
                    DMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the DADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the DADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMLOE`"]
        pub enum SMLOEW {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SMLOEW::_0 => false,
                    SMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the SADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the SADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:9 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u16 = 1023;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                NBYTESR { bits }
            }
            #[doc = "Bits 10:29 - If SMLOE or DMLOE is set, this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."]
            #[inline(always)]
            pub fn mloff(&self) -> MLOFFR {
                let bits = {
                    const MASK: u32 = 1048575;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MLOFFR { bits }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&self) -> DMLOER {
                DMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&self) -> SMLOER {
                SMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:9 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
            #[doc = "Bits 10:29 - If SMLOE or DMLOE is set, this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."]
            #[inline(always)]
            pub fn mloff(&mut self) -> _MLOFFW {
                _MLOFFW { w: self }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&mut self) -> _DMLOEW {
                _DMLOEW { w: self }
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&mut self) -> _SMLOEW {
                _SMLOEW { w: self }
            }
        }
    }
    #[doc = "TCD Last Source Address Adjustment"]
    pub struct TCD11_SLAST {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Last Source Address Adjustment"]
    pub mod tcd11_slast {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD11_SLAST {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SLASTR {
            bits: u32,
        }
        impl SLASTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SLASTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SLASTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Last Source Address Adjustment"]
            #[inline(always)]
            pub fn slast(&self) -> SLASTR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SLASTR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Last Source Address Adjustment"]
            #[inline(always)]
            pub fn slast(&mut self) -> _SLASTW {
                _SLASTW { w: self }
            }
        }
    }
    #[doc = "TCD Destination Address"]
    pub struct TCD11_DADDR {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Destination Address"]
    pub mod tcd11_daddr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD11_DADDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DADDRR {
            bits: u32,
        }
        impl DADDRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DADDRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DADDRW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Destination Address"]
            #[inline(always)]
            pub fn daddr(&self) -> DADDRR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                DADDRR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Destination Address"]
            #[inline(always)]
            pub fn daddr(&mut self) -> _DADDRW {
                _DADDRW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Destination Address Offset"]
    pub struct TCD11_DOFF {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Signed Destination Address Offset"]
    pub mod tcd11_doff {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD11_DOFF {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DOFFR {
            bits: u16,
        }
        impl DOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:15 - Destination Address Signed Offset"]
            #[inline(always)]
            pub fn doff(&self) -> DOFFR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                DOFFR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Destination Address Signed Offset"]
            #[inline(always)]
            pub fn doff(&mut self) -> _DOFFW {
                _DOFFW { w: self }
            }
        }
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub struct TCD11_CITER_ELINKNO {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub mod tcd11_citer_elinkno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD11_CITER_ELINKNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CITERR {
            bits: u16,
        }
        impl CITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 32767;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:14 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer(&self) -> CITERR {
                let bits = {
                    const MASK: u16 = 32767;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                CITERR { bits }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:14 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer(&mut self) -> _CITERW {
                _CITERW { w: self }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub struct TCD11_CITER_ELINKYES {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub mod tcd11_citer_elinkyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD11_CITER_ELINKYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CITER_LER {
            bits: u16,
        }
        impl CITER_LER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct LINKCHR {
            bits: u8,
        }
        impl LINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CITER_LEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CITER_LEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 511;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _LINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:8 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer_le(&self) -> CITER_LER {
                let bits = {
                    const MASK: u16 = 511;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                CITER_LER { bits }
            }
            #[doc = "Bits 9:12 - Minor Loop Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&self) -> LINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                LINKCHR { bits }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:8 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer_le(&mut self) -> _CITER_LEW {
                _CITER_LEW { w: self }
            }
            #[doc = "Bits 9:12 - Minor Loop Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&mut self) -> _LINKCHW {
                _LINKCHW { w: self }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Last Destination Address Adjustment/Scatter Gather Address"]
    pub struct TCD11_DLASTSGA {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Last Destination Address Adjustment/Scatter Gather Address"]
    pub mod tcd11_dlastsga {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD11_DLASTSGA {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLASTSGAR {
            bits: u32,
        }
        impl DLASTSGAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DLASTSGAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DLASTSGAW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - DLASTSGA"]
            #[inline(always)]
            pub fn dlastsga(&self) -> DLASTSGAR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                DLASTSGAR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - DLASTSGA"]
            #[inline(always)]
            pub fn dlastsga(&mut self) -> _DLASTSGAW {
                _DLASTSGAW { w: self }
            }
        }
    }
    #[doc = "TCD Control and Status"]
    pub struct TCD11_CSR {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Control and Status"]
    pub mod tcd11_csr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD11_CSR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `START`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum STARTR {
            #[doc = "The channel is not explicitly started."]
            _0,
            #[doc = "The channel is explicitly started via a software initiated service request."]
            _1,
        }
        impl STARTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    STARTR::_0 => false,
                    STARTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> STARTR {
                match value {
                    false => STARTR::_0,
                    true => STARTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == STARTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == STARTR::_1
            }
        }
        #[doc = "Possible values of the field `INTMAJOR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INTMAJORR {
            #[doc = "The end-of-major loop interrupt is disabled."]
            _0,
            #[doc = "The end-of-major loop interrupt is enabled."]
            _1,
        }
        impl INTMAJORR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INTMAJORR::_0 => false,
                    INTMAJORR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INTMAJORR {
                match value {
                    false => INTMAJORR::_0,
                    true => INTMAJORR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INTMAJORR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INTMAJORR::_1
            }
        }
        #[doc = "Possible values of the field `INTHALF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INTHALFR {
            #[doc = "The half-point interrupt is disabled."]
            _0,
            #[doc = "The half-point interrupt is enabled."]
            _1,
        }
        impl INTHALFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INTHALFR::_0 => false,
                    INTHALFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INTHALFR {
                match value {
                    false => INTHALFR::_0,
                    true => INTHALFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INTHALFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INTHALFR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct DREQR {
            bits: bool,
        }
        impl DREQR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `ESG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ESGR {
            #[doc = "The current channel's TCD is normal format."]
            _0,
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            _1,
        }
        impl ESGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ESGR::_0 => false,
                    ESGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ESGR {
                match value {
                    false => ESGR::_0,
                    true => ESGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ESGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ESGR::_1
            }
        }
        #[doc = "Possible values of the field `MAJORELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MAJORELINKR {
            #[doc = "The channel-to-channel linking is disabled."]
            _0,
            #[doc = "The channel-to-channel linking is enabled."]
            _1,
        }
        impl MAJORELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MAJORELINKR::_0 => false,
                    MAJORELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MAJORELINKR {
                match value {
                    false => MAJORELINKR::_0,
                    true => MAJORELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MAJORELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MAJORELINKR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ACTIVER {
            bits: bool,
        }
        impl ACTIVER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct DONER {
            bits: bool,
        }
        impl DONER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MAJORLINKCHR {
            bits: u8,
        }
        impl MAJORLINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `BWC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BWCR {
            #[doc = "No eDMA engine stalls."]
            _0,
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            _10,
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            _11,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl BWCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    BWCR::_0 => 0,
                    BWCR::_10 => 2,
                    BWCR::_11 => 3,
                    BWCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> BWCR {
                match value {
                    0 => BWCR::_0,
                    2 => BWCR::_10,
                    3 => BWCR::_11,
                    i => BWCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BWCR::_0
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == BWCR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == BWCR::_11
            }
        }
        #[doc = "Values that can be written to the field `START`"]
        pub enum STARTW {
            #[doc = "The channel is not explicitly started."]
            _0,
            #[doc = "The channel is explicitly started via a software initiated service request."]
            _1,
        }
        impl STARTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    STARTW::_0 => false,
                    STARTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _STARTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _STARTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: STARTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel is not explicitly started."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(STARTW::_0)
            }
            #[doc = "The channel is explicitly started via a software initiated service request."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(STARTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INTMAJOR`"]
        pub enum INTMAJORW {
            #[doc = "The end-of-major loop interrupt is disabled."]
            _0,
            #[doc = "The end-of-major loop interrupt is enabled."]
            _1,
        }
        impl INTMAJORW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INTMAJORW::_0 => false,
                    INTMAJORW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INTMAJORW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INTMAJORW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INTMAJORW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The end-of-major loop interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INTMAJORW::_0)
            }
            #[doc = "The end-of-major loop interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INTMAJORW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INTHALF`"]
        pub enum INTHALFW {
            #[doc = "The half-point interrupt is disabled."]
            _0,
            #[doc = "The half-point interrupt is enabled."]
            _1,
        }
        impl INTHALFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INTHALFW::_0 => false,
                    INTHALFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INTHALFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INTHALFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INTHALFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The half-point interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INTHALFW::_0)
            }
            #[doc = "The half-point interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INTHALFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DREQW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DREQW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ESG`"]
        pub enum ESGW {
            #[doc = "The current channel's TCD is normal format."]
            _0,
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            _1,
        }
        impl ESGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ESGW::_0 => false,
                    ESGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ESGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ESGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ESGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The current channel's TCD is normal format."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ESGW::_0)
            }
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ESGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MAJORELINK`"]
        pub enum MAJORELINKW {
            #[doc = "The channel-to-channel linking is disabled."]
            _0,
            #[doc = "The channel-to-channel linking is enabled."]
            _1,
        }
        impl MAJORELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MAJORELINKW::_0 => false,
                    MAJORELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MAJORELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MAJORELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MAJORELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MAJORELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MAJORELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ACTIVEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ACTIVEW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DONEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DONEW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MAJORLINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MAJORLINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BWC`"]
        pub enum BWCW {
            #[doc = "No eDMA engine stalls."]
            _0,
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            _10,
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            _11,
        }
        impl BWCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    BWCW::_0 => 0,
                    BWCW::_10 => 2,
                    BWCW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BWCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BWCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BWCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "No eDMA engine stalls."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BWCW::_0)
            }
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(BWCW::_10)
            }
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(BWCW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bit 0 - Channel Start"]
            #[inline(always)]
            pub fn start(&self) -> STARTR {
                STARTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 1 - Enable an interrupt when major iteration count completes."]
            #[inline(always)]
            pub fn intmajor(&self) -> INTMAJORR {
                INTMAJORR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 2 - Enable an interrupt when major counter is half complete."]
            #[inline(always)]
            pub fn inthalf(&self) -> INTHALFR {
                INTHALFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 3 - Disable Request"]
            #[inline(always)]
            pub fn dreq(&self) -> DREQR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                DREQR { bits }
            }
            #[doc = "Bit 4 - Enable Scatter/Gather Processing"]
            #[inline(always)]
            pub fn esg(&self) -> ESGR {
                ESGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 5 - Enable channel-to-channel linking on major loop complete"]
            #[inline(always)]
            pub fn majorelink(&self) -> MAJORELINKR {
                MAJORELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 6 - Channel Active"]
            #[inline(always)]
            pub fn active(&self) -> ACTIVER {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                ACTIVER { bits }
            }
            #[doc = "Bit 7 - Channel Done"]
            #[inline(always)]
            pub fn done(&self) -> DONER {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                DONER { bits }
            }
            #[doc = "Bits 8:11 - Major Loop Link Channel Number"]
            #[inline(always)]
            pub fn majorlinkch(&self) -> MAJORLINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                MAJORLINKCHR { bits }
            }
            #[doc = "Bits 14:15 - Bandwidth Control"]
            #[inline(always)]
            pub fn bwc(&self) -> BWCR {
                BWCR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Channel Start"]
            #[inline(always)]
            pub fn start(&mut self) -> _STARTW {
                _STARTW { w: self }
            }
            #[doc = "Bit 1 - Enable an interrupt when major iteration count completes."]
            #[inline(always)]
            pub fn intmajor(&mut self) -> _INTMAJORW {
                _INTMAJORW { w: self }
            }
            #[doc = "Bit 2 - Enable an interrupt when major counter is half complete."]
            #[inline(always)]
            pub fn inthalf(&mut self) -> _INTHALFW {
                _INTHALFW { w: self }
            }
            #[doc = "Bit 3 - Disable Request"]
            #[inline(always)]
            pub fn dreq(&mut self) -> _DREQW {
                _DREQW { w: self }
            }
            #[doc = "Bit 4 - Enable Scatter/Gather Processing"]
            #[inline(always)]
            pub fn esg(&mut self) -> _ESGW {
                _ESGW { w: self }
            }
            #[doc = "Bit 5 - Enable channel-to-channel linking on major loop complete"]
            #[inline(always)]
            pub fn majorelink(&mut self) -> _MAJORELINKW {
                _MAJORELINKW { w: self }
            }
            #[doc = "Bit 6 - Channel Active"]
            #[inline(always)]
            pub fn active(&mut self) -> _ACTIVEW {
                _ACTIVEW { w: self }
            }
            #[doc = "Bit 7 - Channel Done"]
            #[inline(always)]
            pub fn done(&mut self) -> _DONEW {
                _DONEW { w: self }
            }
            #[doc = "Bits 8:11 - Major Loop Link Channel Number"]
            #[inline(always)]
            pub fn majorlinkch(&mut self) -> _MAJORLINKCHW {
                _MAJORLINKCHW { w: self }
            }
            #[doc = "Bits 14:15 - Bandwidth Control"]
            #[inline(always)]
            pub fn bwc(&mut self) -> _BWCW {
                _BWCW { w: self }
            }
        }
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub struct TCD11_BITER_ELINKNO {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub mod tcd11_biter_elinkno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD11_BITER_ELINKNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BITERR {
            bits: u16,
        }
        impl BITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _BITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 32767;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:14 - Starting Major Iteration Count"]
            #[inline(always)]
            pub fn biter(&self) -> BITERR {
                let bits = {
                    const MASK: u16 = 32767;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                BITERR { bits }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:14 - Starting Major Iteration Count"]
            #[inline(always)]
            pub fn biter(&mut self) -> _BITERW {
                _BITERW { w: self }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub struct TCD11_BITER_ELINKYES {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub mod tcd11_biter_elinkyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD11_BITER_ELINKYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BITERR {
            bits: u16,
        }
        impl BITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct LINKCHR {
            bits: u8,
        }
        impl LINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _BITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 511;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _LINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:8 - Starting major iteration count"]
            #[inline(always)]
            pub fn biter(&self) -> BITERR {
                let bits = {
                    const MASK: u16 = 511;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                BITERR { bits }
            }
            #[doc = "Bits 9:12 - Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&self) -> LINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                LINKCHR { bits }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:8 - Starting major iteration count"]
            #[inline(always)]
            pub fn biter(&mut self) -> _BITERW {
                _BITERW { w: self }
            }
            #[doc = "Bits 9:12 - Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&mut self) -> _LINKCHW {
                _LINKCHW { w: self }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Source Address"]
    pub struct TCD12_SADDR {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Source Address"]
    pub mod tcd12_saddr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD12_SADDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SADDRR {
            bits: u32,
        }
        impl SADDRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SADDRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SADDRW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Source Address"]
            #[inline(always)]
            pub fn saddr(&self) -> SADDRR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SADDRR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Source Address"]
            #[inline(always)]
            pub fn saddr(&mut self) -> _SADDRW {
                _SADDRW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Source Address Offset"]
    pub struct TCD12_SOFF {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Signed Source Address Offset"]
    pub mod tcd12_soff {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD12_SOFF {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SOFFR {
            bits: u16,
        }
        impl SOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:15 - Source address signed offset"]
            #[inline(always)]
            pub fn soff(&self) -> SOFFR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                SOFFR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Source address signed offset"]
            #[inline(always)]
            pub fn soff(&mut self) -> _SOFFW {
                _SOFFW { w: self }
            }
        }
    }
    #[doc = "TCD Transfer Attributes"]
    pub struct TCD12_ATTR {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Transfer Attributes"]
    pub mod tcd12_attr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD12_ATTR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DSIZER {
            bits: u8,
        }
        impl DSIZER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DMODR {
            bits: u8,
        }
        impl DMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `SSIZE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SSIZER {
            #[doc = "8-bit"]
            _0,
            #[doc = "16-bit"]
            _1,
            #[doc = "32-bit"]
            _10,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl SSIZER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SSIZER::_0 => 0,
                    SSIZER::_1 => 1,
                    SSIZER::_10 => 2,
                    SSIZER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SSIZER {
                match value {
                    0 => SSIZER::_0,
                    1 => SSIZER::_1,
                    2 => SSIZER::_10,
                    i => SSIZER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SSIZER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SSIZER::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == SSIZER::_10
            }
        }
        #[doc = "Possible values of the field `SMOD`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMODR {
            #[doc = "Source address modulo feature is disabled"]
            _0,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl SMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SMODR::_0 => 0,
                    SMODR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SMODR {
                match value {
                    0 => SMODR::_0,
                    i => SMODR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMODR::_0
            }
        }
        #[doc = r" Proxy"]
        pub struct _DSIZEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DSIZEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMODW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SSIZE`"]
        pub enum SSIZEW {
            #[doc = "8-bit"]
            _0,
            #[doc = "16-bit"]
            _1,
            #[doc = "32-bit"]
            _10,
        }
        impl SSIZEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SSIZEW::_0 => 0,
                    SSIZEW::_1 => 1,
                    SSIZEW::_10 => 2,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SSIZEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SSIZEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SSIZEW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "8-bit"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SSIZEW::_0)
            }
            #[doc = "16-bit"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SSIZEW::_1)
            }
            #[doc = "32-bit"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(SSIZEW::_10)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMOD`"]
        pub enum SMODW {
            #[doc = "Source address modulo feature is disabled"]
            _0,
        }
        impl SMODW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SMODW::_0 => 0,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMODW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMODW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Source address modulo feature is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMODW::_0)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:2 - Destination data transfer size"]
            #[inline(always)]
            pub fn dsize(&self) -> DSIZER {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                DSIZER { bits }
            }
            #[doc = "Bits 3:7 - Destination Address Modulo"]
            #[inline(always)]
            pub fn dmod(&self) -> DMODR {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                DMODR { bits }
            }
            #[doc = "Bits 8:10 - Source data transfer size"]
            #[inline(always)]
            pub fn ssize(&self) -> SSIZER {
                SSIZER::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
            #[doc = "Bits 11:15 - Source Address Modulo"]
            #[inline(always)]
            pub fn smod(&self) -> SMODR {
                SMODR::_from({
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:2 - Destination data transfer size"]
            #[inline(always)]
            pub fn dsize(&mut self) -> _DSIZEW {
                _DSIZEW { w: self }
            }
            #[doc = "Bits 3:7 - Destination Address Modulo"]
            #[inline(always)]
            pub fn dmod(&mut self) -> _DMODW {
                _DMODW { w: self }
            }
            #[doc = "Bits 8:10 - Source data transfer size"]
            #[inline(always)]
            pub fn ssize(&mut self) -> _SSIZEW {
                _SSIZEW { w: self }
            }
            #[doc = "Bits 11:15 - Source Address Modulo"]
            #[inline(always)]
            pub fn smod(&mut self) -> _SMODW {
                _SMODW { w: self }
            }
        }
    }
    #[doc = "TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
    pub struct TCD12_NBYTES_MLNO {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
    pub mod tcd12_nbytes_mlno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD12_NBYTES_MLNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u32,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                NBYTESR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"]
    pub struct TCD12_NBYTES_MLOFFNO {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"]
    pub mod tcd12_nbytes_mloffno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD12_NBYTES_MLOFFNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u32,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMLOER {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMLOER::_0 => false,
                    DMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMLOER {
                match value {
                    false => DMLOER::_0,
                    true => DMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMLOER::_1
            }
        }
        #[doc = "Possible values of the field `SMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMLOER {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SMLOER::_0 => false,
                    SMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SMLOER {
                match value {
                    false => SMLOER::_0,
                    true => SMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SMLOER::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 1073741823;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMLOE`"]
        pub enum DMLOEW {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMLOEW::_0 => false,
                    DMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the DADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the DADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMLOE`"]
        pub enum SMLOEW {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SMLOEW::_0 => false,
                    SMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the SADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the SADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:29 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u32 = 1073741823;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                NBYTESR { bits }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&self) -> DMLOER {
                DMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&self) -> SMLOER {
                SMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:29 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&mut self) -> _DMLOEW {
                _DMLOEW { w: self }
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&mut self) -> _SMLOEW {
                _SMLOEW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"]
    pub struct TCD12_NBYTES_MLOFFYES {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"]
    pub mod tcd12_nbytes_mloffyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD12_NBYTES_MLOFFYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u16,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct MLOFFR {
            bits: u32,
        }
        impl MLOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMLOER {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMLOER::_0 => false,
                    DMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMLOER {
                match value {
                    false => DMLOER::_0,
                    true => DMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMLOER::_1
            }
        }
        #[doc = "Possible values of the field `SMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMLOER {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SMLOER::_0 => false,
                    SMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SMLOER {
                match value {
                    false => SMLOER::_0,
                    true => SMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SMLOER::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 1023;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MLOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MLOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 1048575;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMLOE`"]
        pub enum DMLOEW {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMLOEW::_0 => false,
                    DMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the DADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the DADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMLOE`"]
        pub enum SMLOEW {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SMLOEW::_0 => false,
                    SMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the SADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the SADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:9 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u16 = 1023;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                NBYTESR { bits }
            }
            #[doc = "Bits 10:29 - If SMLOE or DMLOE is set, this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."]
            #[inline(always)]
            pub fn mloff(&self) -> MLOFFR {
                let bits = {
                    const MASK: u32 = 1048575;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MLOFFR { bits }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&self) -> DMLOER {
                DMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&self) -> SMLOER {
                SMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:9 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
            #[doc = "Bits 10:29 - If SMLOE or DMLOE is set, this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."]
            #[inline(always)]
            pub fn mloff(&mut self) -> _MLOFFW {
                _MLOFFW { w: self }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&mut self) -> _DMLOEW {
                _DMLOEW { w: self }
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&mut self) -> _SMLOEW {
                _SMLOEW { w: self }
            }
        }
    }
    #[doc = "TCD Last Source Address Adjustment"]
    pub struct TCD12_SLAST {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Last Source Address Adjustment"]
    pub mod tcd12_slast {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD12_SLAST {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SLASTR {
            bits: u32,
        }
        impl SLASTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SLASTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SLASTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Last Source Address Adjustment"]
            #[inline(always)]
            pub fn slast(&self) -> SLASTR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SLASTR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Last Source Address Adjustment"]
            #[inline(always)]
            pub fn slast(&mut self) -> _SLASTW {
                _SLASTW { w: self }
            }
        }
    }
    #[doc = "TCD Destination Address"]
    pub struct TCD12_DADDR {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Destination Address"]
    pub mod tcd12_daddr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD12_DADDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DADDRR {
            bits: u32,
        }
        impl DADDRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DADDRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DADDRW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Destination Address"]
            #[inline(always)]
            pub fn daddr(&self) -> DADDRR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                DADDRR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Destination Address"]
            #[inline(always)]
            pub fn daddr(&mut self) -> _DADDRW {
                _DADDRW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Destination Address Offset"]
    pub struct TCD12_DOFF {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Signed Destination Address Offset"]
    pub mod tcd12_doff {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD12_DOFF {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DOFFR {
            bits: u16,
        }
        impl DOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:15 - Destination Address Signed Offset"]
            #[inline(always)]
            pub fn doff(&self) -> DOFFR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                DOFFR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Destination Address Signed Offset"]
            #[inline(always)]
            pub fn doff(&mut self) -> _DOFFW {
                _DOFFW { w: self }
            }
        }
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub struct TCD12_CITER_ELINKNO {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub mod tcd12_citer_elinkno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD12_CITER_ELINKNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CITERR {
            bits: u16,
        }
        impl CITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 32767;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:14 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer(&self) -> CITERR {
                let bits = {
                    const MASK: u16 = 32767;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                CITERR { bits }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:14 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer(&mut self) -> _CITERW {
                _CITERW { w: self }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub struct TCD12_CITER_ELINKYES {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub mod tcd12_citer_elinkyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD12_CITER_ELINKYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CITER_LER {
            bits: u16,
        }
        impl CITER_LER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct LINKCHR {
            bits: u8,
        }
        impl LINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CITER_LEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CITER_LEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 511;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _LINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:8 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer_le(&self) -> CITER_LER {
                let bits = {
                    const MASK: u16 = 511;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                CITER_LER { bits }
            }
            #[doc = "Bits 9:12 - Minor Loop Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&self) -> LINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                LINKCHR { bits }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:8 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer_le(&mut self) -> _CITER_LEW {
                _CITER_LEW { w: self }
            }
            #[doc = "Bits 9:12 - Minor Loop Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&mut self) -> _LINKCHW {
                _LINKCHW { w: self }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Last Destination Address Adjustment/Scatter Gather Address"]
    pub struct TCD12_DLASTSGA {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Last Destination Address Adjustment/Scatter Gather Address"]
    pub mod tcd12_dlastsga {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD12_DLASTSGA {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLASTSGAR {
            bits: u32,
        }
        impl DLASTSGAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DLASTSGAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DLASTSGAW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - DLASTSGA"]
            #[inline(always)]
            pub fn dlastsga(&self) -> DLASTSGAR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                DLASTSGAR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - DLASTSGA"]
            #[inline(always)]
            pub fn dlastsga(&mut self) -> _DLASTSGAW {
                _DLASTSGAW { w: self }
            }
        }
    }
    #[doc = "TCD Control and Status"]
    pub struct TCD12_CSR {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Control and Status"]
    pub mod tcd12_csr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD12_CSR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `START`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum STARTR {
            #[doc = "The channel is not explicitly started."]
            _0,
            #[doc = "The channel is explicitly started via a software initiated service request."]
            _1,
        }
        impl STARTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    STARTR::_0 => false,
                    STARTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> STARTR {
                match value {
                    false => STARTR::_0,
                    true => STARTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == STARTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == STARTR::_1
            }
        }
        #[doc = "Possible values of the field `INTMAJOR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INTMAJORR {
            #[doc = "The end-of-major loop interrupt is disabled."]
            _0,
            #[doc = "The end-of-major loop interrupt is enabled."]
            _1,
        }
        impl INTMAJORR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INTMAJORR::_0 => false,
                    INTMAJORR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INTMAJORR {
                match value {
                    false => INTMAJORR::_0,
                    true => INTMAJORR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INTMAJORR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INTMAJORR::_1
            }
        }
        #[doc = "Possible values of the field `INTHALF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INTHALFR {
            #[doc = "The half-point interrupt is disabled."]
            _0,
            #[doc = "The half-point interrupt is enabled."]
            _1,
        }
        impl INTHALFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INTHALFR::_0 => false,
                    INTHALFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INTHALFR {
                match value {
                    false => INTHALFR::_0,
                    true => INTHALFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INTHALFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INTHALFR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct DREQR {
            bits: bool,
        }
        impl DREQR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `ESG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ESGR {
            #[doc = "The current channel's TCD is normal format."]
            _0,
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            _1,
        }
        impl ESGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ESGR::_0 => false,
                    ESGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ESGR {
                match value {
                    false => ESGR::_0,
                    true => ESGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ESGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ESGR::_1
            }
        }
        #[doc = "Possible values of the field `MAJORELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MAJORELINKR {
            #[doc = "The channel-to-channel linking is disabled."]
            _0,
            #[doc = "The channel-to-channel linking is enabled."]
            _1,
        }
        impl MAJORELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MAJORELINKR::_0 => false,
                    MAJORELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MAJORELINKR {
                match value {
                    false => MAJORELINKR::_0,
                    true => MAJORELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MAJORELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MAJORELINKR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ACTIVER {
            bits: bool,
        }
        impl ACTIVER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct DONER {
            bits: bool,
        }
        impl DONER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MAJORLINKCHR {
            bits: u8,
        }
        impl MAJORLINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `BWC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BWCR {
            #[doc = "No eDMA engine stalls."]
            _0,
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            _10,
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            _11,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl BWCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    BWCR::_0 => 0,
                    BWCR::_10 => 2,
                    BWCR::_11 => 3,
                    BWCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> BWCR {
                match value {
                    0 => BWCR::_0,
                    2 => BWCR::_10,
                    3 => BWCR::_11,
                    i => BWCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BWCR::_0
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == BWCR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == BWCR::_11
            }
        }
        #[doc = "Values that can be written to the field `START`"]
        pub enum STARTW {
            #[doc = "The channel is not explicitly started."]
            _0,
            #[doc = "The channel is explicitly started via a software initiated service request."]
            _1,
        }
        impl STARTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    STARTW::_0 => false,
                    STARTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _STARTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _STARTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: STARTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel is not explicitly started."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(STARTW::_0)
            }
            #[doc = "The channel is explicitly started via a software initiated service request."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(STARTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INTMAJOR`"]
        pub enum INTMAJORW {
            #[doc = "The end-of-major loop interrupt is disabled."]
            _0,
            #[doc = "The end-of-major loop interrupt is enabled."]
            _1,
        }
        impl INTMAJORW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INTMAJORW::_0 => false,
                    INTMAJORW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INTMAJORW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INTMAJORW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INTMAJORW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The end-of-major loop interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INTMAJORW::_0)
            }
            #[doc = "The end-of-major loop interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INTMAJORW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INTHALF`"]
        pub enum INTHALFW {
            #[doc = "The half-point interrupt is disabled."]
            _0,
            #[doc = "The half-point interrupt is enabled."]
            _1,
        }
        impl INTHALFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INTHALFW::_0 => false,
                    INTHALFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INTHALFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INTHALFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INTHALFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The half-point interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INTHALFW::_0)
            }
            #[doc = "The half-point interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INTHALFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DREQW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DREQW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ESG`"]
        pub enum ESGW {
            #[doc = "The current channel's TCD is normal format."]
            _0,
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            _1,
        }
        impl ESGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ESGW::_0 => false,
                    ESGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ESGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ESGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ESGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The current channel's TCD is normal format."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ESGW::_0)
            }
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ESGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MAJORELINK`"]
        pub enum MAJORELINKW {
            #[doc = "The channel-to-channel linking is disabled."]
            _0,
            #[doc = "The channel-to-channel linking is enabled."]
            _1,
        }
        impl MAJORELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MAJORELINKW::_0 => false,
                    MAJORELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MAJORELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MAJORELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MAJORELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MAJORELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MAJORELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ACTIVEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ACTIVEW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DONEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DONEW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MAJORLINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MAJORLINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BWC`"]
        pub enum BWCW {
            #[doc = "No eDMA engine stalls."]
            _0,
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            _10,
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            _11,
        }
        impl BWCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    BWCW::_0 => 0,
                    BWCW::_10 => 2,
                    BWCW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BWCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BWCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BWCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "No eDMA engine stalls."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BWCW::_0)
            }
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(BWCW::_10)
            }
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(BWCW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bit 0 - Channel Start"]
            #[inline(always)]
            pub fn start(&self) -> STARTR {
                STARTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 1 - Enable an interrupt when major iteration count completes."]
            #[inline(always)]
            pub fn intmajor(&self) -> INTMAJORR {
                INTMAJORR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 2 - Enable an interrupt when major counter is half complete."]
            #[inline(always)]
            pub fn inthalf(&self) -> INTHALFR {
                INTHALFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 3 - Disable Request"]
            #[inline(always)]
            pub fn dreq(&self) -> DREQR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                DREQR { bits }
            }
            #[doc = "Bit 4 - Enable Scatter/Gather Processing"]
            #[inline(always)]
            pub fn esg(&self) -> ESGR {
                ESGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 5 - Enable channel-to-channel linking on major loop complete"]
            #[inline(always)]
            pub fn majorelink(&self) -> MAJORELINKR {
                MAJORELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 6 - Channel Active"]
            #[inline(always)]
            pub fn active(&self) -> ACTIVER {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                ACTIVER { bits }
            }
            #[doc = "Bit 7 - Channel Done"]
            #[inline(always)]
            pub fn done(&self) -> DONER {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                DONER { bits }
            }
            #[doc = "Bits 8:11 - Major Loop Link Channel Number"]
            #[inline(always)]
            pub fn majorlinkch(&self) -> MAJORLINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                MAJORLINKCHR { bits }
            }
            #[doc = "Bits 14:15 - Bandwidth Control"]
            #[inline(always)]
            pub fn bwc(&self) -> BWCR {
                BWCR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Channel Start"]
            #[inline(always)]
            pub fn start(&mut self) -> _STARTW {
                _STARTW { w: self }
            }
            #[doc = "Bit 1 - Enable an interrupt when major iteration count completes."]
            #[inline(always)]
            pub fn intmajor(&mut self) -> _INTMAJORW {
                _INTMAJORW { w: self }
            }
            #[doc = "Bit 2 - Enable an interrupt when major counter is half complete."]
            #[inline(always)]
            pub fn inthalf(&mut self) -> _INTHALFW {
                _INTHALFW { w: self }
            }
            #[doc = "Bit 3 - Disable Request"]
            #[inline(always)]
            pub fn dreq(&mut self) -> _DREQW {
                _DREQW { w: self }
            }
            #[doc = "Bit 4 - Enable Scatter/Gather Processing"]
            #[inline(always)]
            pub fn esg(&mut self) -> _ESGW {
                _ESGW { w: self }
            }
            #[doc = "Bit 5 - Enable channel-to-channel linking on major loop complete"]
            #[inline(always)]
            pub fn majorelink(&mut self) -> _MAJORELINKW {
                _MAJORELINKW { w: self }
            }
            #[doc = "Bit 6 - Channel Active"]
            #[inline(always)]
            pub fn active(&mut self) -> _ACTIVEW {
                _ACTIVEW { w: self }
            }
            #[doc = "Bit 7 - Channel Done"]
            #[inline(always)]
            pub fn done(&mut self) -> _DONEW {
                _DONEW { w: self }
            }
            #[doc = "Bits 8:11 - Major Loop Link Channel Number"]
            #[inline(always)]
            pub fn majorlinkch(&mut self) -> _MAJORLINKCHW {
                _MAJORLINKCHW { w: self }
            }
            #[doc = "Bits 14:15 - Bandwidth Control"]
            #[inline(always)]
            pub fn bwc(&mut self) -> _BWCW {
                _BWCW { w: self }
            }
        }
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub struct TCD12_BITER_ELINKNO {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub mod tcd12_biter_elinkno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD12_BITER_ELINKNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BITERR {
            bits: u16,
        }
        impl BITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _BITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 32767;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:14 - Starting Major Iteration Count"]
            #[inline(always)]
            pub fn biter(&self) -> BITERR {
                let bits = {
                    const MASK: u16 = 32767;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                BITERR { bits }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:14 - Starting Major Iteration Count"]
            #[inline(always)]
            pub fn biter(&mut self) -> _BITERW {
                _BITERW { w: self }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub struct TCD12_BITER_ELINKYES {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub mod tcd12_biter_elinkyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD12_BITER_ELINKYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BITERR {
            bits: u16,
        }
        impl BITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct LINKCHR {
            bits: u8,
        }
        impl LINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _BITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 511;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _LINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:8 - Starting major iteration count"]
            #[inline(always)]
            pub fn biter(&self) -> BITERR {
                let bits = {
                    const MASK: u16 = 511;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                BITERR { bits }
            }
            #[doc = "Bits 9:12 - Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&self) -> LINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                LINKCHR { bits }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:8 - Starting major iteration count"]
            #[inline(always)]
            pub fn biter(&mut self) -> _BITERW {
                _BITERW { w: self }
            }
            #[doc = "Bits 9:12 - Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&mut self) -> _LINKCHW {
                _LINKCHW { w: self }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Source Address"]
    pub struct TCD13_SADDR {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Source Address"]
    pub mod tcd13_saddr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD13_SADDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SADDRR {
            bits: u32,
        }
        impl SADDRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SADDRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SADDRW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Source Address"]
            #[inline(always)]
            pub fn saddr(&self) -> SADDRR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SADDRR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Source Address"]
            #[inline(always)]
            pub fn saddr(&mut self) -> _SADDRW {
                _SADDRW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Source Address Offset"]
    pub struct TCD13_SOFF {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Signed Source Address Offset"]
    pub mod tcd13_soff {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD13_SOFF {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SOFFR {
            bits: u16,
        }
        impl SOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:15 - Source address signed offset"]
            #[inline(always)]
            pub fn soff(&self) -> SOFFR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                SOFFR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Source address signed offset"]
            #[inline(always)]
            pub fn soff(&mut self) -> _SOFFW {
                _SOFFW { w: self }
            }
        }
    }
    #[doc = "TCD Transfer Attributes"]
    pub struct TCD13_ATTR {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Transfer Attributes"]
    pub mod tcd13_attr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD13_ATTR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DSIZER {
            bits: u8,
        }
        impl DSIZER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DMODR {
            bits: u8,
        }
        impl DMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `SSIZE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SSIZER {
            #[doc = "8-bit"]
            _0,
            #[doc = "16-bit"]
            _1,
            #[doc = "32-bit"]
            _10,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl SSIZER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SSIZER::_0 => 0,
                    SSIZER::_1 => 1,
                    SSIZER::_10 => 2,
                    SSIZER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SSIZER {
                match value {
                    0 => SSIZER::_0,
                    1 => SSIZER::_1,
                    2 => SSIZER::_10,
                    i => SSIZER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SSIZER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SSIZER::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == SSIZER::_10
            }
        }
        #[doc = "Possible values of the field `SMOD`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMODR {
            #[doc = "Source address modulo feature is disabled"]
            _0,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl SMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SMODR::_0 => 0,
                    SMODR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SMODR {
                match value {
                    0 => SMODR::_0,
                    i => SMODR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMODR::_0
            }
        }
        #[doc = r" Proxy"]
        pub struct _DSIZEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DSIZEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMODW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SSIZE`"]
        pub enum SSIZEW {
            #[doc = "8-bit"]
            _0,
            #[doc = "16-bit"]
            _1,
            #[doc = "32-bit"]
            _10,
        }
        impl SSIZEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SSIZEW::_0 => 0,
                    SSIZEW::_1 => 1,
                    SSIZEW::_10 => 2,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SSIZEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SSIZEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SSIZEW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "8-bit"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SSIZEW::_0)
            }
            #[doc = "16-bit"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SSIZEW::_1)
            }
            #[doc = "32-bit"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(SSIZEW::_10)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMOD`"]
        pub enum SMODW {
            #[doc = "Source address modulo feature is disabled"]
            _0,
        }
        impl SMODW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SMODW::_0 => 0,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMODW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMODW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Source address modulo feature is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMODW::_0)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:2 - Destination data transfer size"]
            #[inline(always)]
            pub fn dsize(&self) -> DSIZER {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                DSIZER { bits }
            }
            #[doc = "Bits 3:7 - Destination Address Modulo"]
            #[inline(always)]
            pub fn dmod(&self) -> DMODR {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                DMODR { bits }
            }
            #[doc = "Bits 8:10 - Source data transfer size"]
            #[inline(always)]
            pub fn ssize(&self) -> SSIZER {
                SSIZER::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
            #[doc = "Bits 11:15 - Source Address Modulo"]
            #[inline(always)]
            pub fn smod(&self) -> SMODR {
                SMODR::_from({
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:2 - Destination data transfer size"]
            #[inline(always)]
            pub fn dsize(&mut self) -> _DSIZEW {
                _DSIZEW { w: self }
            }
            #[doc = "Bits 3:7 - Destination Address Modulo"]
            #[inline(always)]
            pub fn dmod(&mut self) -> _DMODW {
                _DMODW { w: self }
            }
            #[doc = "Bits 8:10 - Source data transfer size"]
            #[inline(always)]
            pub fn ssize(&mut self) -> _SSIZEW {
                _SSIZEW { w: self }
            }
            #[doc = "Bits 11:15 - Source Address Modulo"]
            #[inline(always)]
            pub fn smod(&mut self) -> _SMODW {
                _SMODW { w: self }
            }
        }
    }
    #[doc = "TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
    pub struct TCD13_NBYTES_MLNO {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
    pub mod tcd13_nbytes_mlno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD13_NBYTES_MLNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u32,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                NBYTESR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"]
    pub struct TCD13_NBYTES_MLOFFNO {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"]
    pub mod tcd13_nbytes_mloffno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD13_NBYTES_MLOFFNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u32,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMLOER {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMLOER::_0 => false,
                    DMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMLOER {
                match value {
                    false => DMLOER::_0,
                    true => DMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMLOER::_1
            }
        }
        #[doc = "Possible values of the field `SMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMLOER {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SMLOER::_0 => false,
                    SMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SMLOER {
                match value {
                    false => SMLOER::_0,
                    true => SMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SMLOER::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 1073741823;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMLOE`"]
        pub enum DMLOEW {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMLOEW::_0 => false,
                    DMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the DADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the DADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMLOE`"]
        pub enum SMLOEW {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SMLOEW::_0 => false,
                    SMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the SADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the SADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:29 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u32 = 1073741823;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                NBYTESR { bits }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&self) -> DMLOER {
                DMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&self) -> SMLOER {
                SMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:29 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&mut self) -> _DMLOEW {
                _DMLOEW { w: self }
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&mut self) -> _SMLOEW {
                _SMLOEW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"]
    pub struct TCD13_NBYTES_MLOFFYES {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"]
    pub mod tcd13_nbytes_mloffyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD13_NBYTES_MLOFFYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u16,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct MLOFFR {
            bits: u32,
        }
        impl MLOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMLOER {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMLOER::_0 => false,
                    DMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMLOER {
                match value {
                    false => DMLOER::_0,
                    true => DMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMLOER::_1
            }
        }
        #[doc = "Possible values of the field `SMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMLOER {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SMLOER::_0 => false,
                    SMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SMLOER {
                match value {
                    false => SMLOER::_0,
                    true => SMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SMLOER::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 1023;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MLOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MLOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 1048575;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMLOE`"]
        pub enum DMLOEW {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMLOEW::_0 => false,
                    DMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the DADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the DADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMLOE`"]
        pub enum SMLOEW {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SMLOEW::_0 => false,
                    SMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the SADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the SADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:9 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u16 = 1023;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                NBYTESR { bits }
            }
            #[doc = "Bits 10:29 - If SMLOE or DMLOE is set, this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."]
            #[inline(always)]
            pub fn mloff(&self) -> MLOFFR {
                let bits = {
                    const MASK: u32 = 1048575;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MLOFFR { bits }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&self) -> DMLOER {
                DMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&self) -> SMLOER {
                SMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:9 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
            #[doc = "Bits 10:29 - If SMLOE or DMLOE is set, this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."]
            #[inline(always)]
            pub fn mloff(&mut self) -> _MLOFFW {
                _MLOFFW { w: self }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&mut self) -> _DMLOEW {
                _DMLOEW { w: self }
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&mut self) -> _SMLOEW {
                _SMLOEW { w: self }
            }
        }
    }
    #[doc = "TCD Last Source Address Adjustment"]
    pub struct TCD13_SLAST {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Last Source Address Adjustment"]
    pub mod tcd13_slast {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD13_SLAST {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SLASTR {
            bits: u32,
        }
        impl SLASTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SLASTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SLASTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Last Source Address Adjustment"]
            #[inline(always)]
            pub fn slast(&self) -> SLASTR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SLASTR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Last Source Address Adjustment"]
            #[inline(always)]
            pub fn slast(&mut self) -> _SLASTW {
                _SLASTW { w: self }
            }
        }
    }
    #[doc = "TCD Destination Address"]
    pub struct TCD13_DADDR {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Destination Address"]
    pub mod tcd13_daddr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD13_DADDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DADDRR {
            bits: u32,
        }
        impl DADDRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DADDRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DADDRW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Destination Address"]
            #[inline(always)]
            pub fn daddr(&self) -> DADDRR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                DADDRR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Destination Address"]
            #[inline(always)]
            pub fn daddr(&mut self) -> _DADDRW {
                _DADDRW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Destination Address Offset"]
    pub struct TCD13_DOFF {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Signed Destination Address Offset"]
    pub mod tcd13_doff {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD13_DOFF {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DOFFR {
            bits: u16,
        }
        impl DOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:15 - Destination Address Signed Offset"]
            #[inline(always)]
            pub fn doff(&self) -> DOFFR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                DOFFR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Destination Address Signed Offset"]
            #[inline(always)]
            pub fn doff(&mut self) -> _DOFFW {
                _DOFFW { w: self }
            }
        }
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub struct TCD13_CITER_ELINKNO {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub mod tcd13_citer_elinkno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD13_CITER_ELINKNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CITERR {
            bits: u16,
        }
        impl CITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 32767;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:14 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer(&self) -> CITERR {
                let bits = {
                    const MASK: u16 = 32767;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                CITERR { bits }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:14 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer(&mut self) -> _CITERW {
                _CITERW { w: self }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub struct TCD13_CITER_ELINKYES {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub mod tcd13_citer_elinkyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD13_CITER_ELINKYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CITER_LER {
            bits: u16,
        }
        impl CITER_LER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct LINKCHR {
            bits: u8,
        }
        impl LINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CITER_LEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CITER_LEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 511;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _LINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:8 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer_le(&self) -> CITER_LER {
                let bits = {
                    const MASK: u16 = 511;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                CITER_LER { bits }
            }
            #[doc = "Bits 9:12 - Minor Loop Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&self) -> LINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                LINKCHR { bits }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:8 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer_le(&mut self) -> _CITER_LEW {
                _CITER_LEW { w: self }
            }
            #[doc = "Bits 9:12 - Minor Loop Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&mut self) -> _LINKCHW {
                _LINKCHW { w: self }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Last Destination Address Adjustment/Scatter Gather Address"]
    pub struct TCD13_DLASTSGA {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Last Destination Address Adjustment/Scatter Gather Address"]
    pub mod tcd13_dlastsga {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD13_DLASTSGA {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLASTSGAR {
            bits: u32,
        }
        impl DLASTSGAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DLASTSGAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DLASTSGAW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - DLASTSGA"]
            #[inline(always)]
            pub fn dlastsga(&self) -> DLASTSGAR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                DLASTSGAR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - DLASTSGA"]
            #[inline(always)]
            pub fn dlastsga(&mut self) -> _DLASTSGAW {
                _DLASTSGAW { w: self }
            }
        }
    }
    #[doc = "TCD Control and Status"]
    pub struct TCD13_CSR {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Control and Status"]
    pub mod tcd13_csr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD13_CSR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `START`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum STARTR {
            #[doc = "The channel is not explicitly started."]
            _0,
            #[doc = "The channel is explicitly started via a software initiated service request."]
            _1,
        }
        impl STARTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    STARTR::_0 => false,
                    STARTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> STARTR {
                match value {
                    false => STARTR::_0,
                    true => STARTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == STARTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == STARTR::_1
            }
        }
        #[doc = "Possible values of the field `INTMAJOR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INTMAJORR {
            #[doc = "The end-of-major loop interrupt is disabled."]
            _0,
            #[doc = "The end-of-major loop interrupt is enabled."]
            _1,
        }
        impl INTMAJORR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INTMAJORR::_0 => false,
                    INTMAJORR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INTMAJORR {
                match value {
                    false => INTMAJORR::_0,
                    true => INTMAJORR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INTMAJORR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INTMAJORR::_1
            }
        }
        #[doc = "Possible values of the field `INTHALF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INTHALFR {
            #[doc = "The half-point interrupt is disabled."]
            _0,
            #[doc = "The half-point interrupt is enabled."]
            _1,
        }
        impl INTHALFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INTHALFR::_0 => false,
                    INTHALFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INTHALFR {
                match value {
                    false => INTHALFR::_0,
                    true => INTHALFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INTHALFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INTHALFR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct DREQR {
            bits: bool,
        }
        impl DREQR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `ESG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ESGR {
            #[doc = "The current channel's TCD is normal format."]
            _0,
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            _1,
        }
        impl ESGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ESGR::_0 => false,
                    ESGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ESGR {
                match value {
                    false => ESGR::_0,
                    true => ESGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ESGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ESGR::_1
            }
        }
        #[doc = "Possible values of the field `MAJORELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MAJORELINKR {
            #[doc = "The channel-to-channel linking is disabled."]
            _0,
            #[doc = "The channel-to-channel linking is enabled."]
            _1,
        }
        impl MAJORELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MAJORELINKR::_0 => false,
                    MAJORELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MAJORELINKR {
                match value {
                    false => MAJORELINKR::_0,
                    true => MAJORELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MAJORELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MAJORELINKR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ACTIVER {
            bits: bool,
        }
        impl ACTIVER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct DONER {
            bits: bool,
        }
        impl DONER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MAJORLINKCHR {
            bits: u8,
        }
        impl MAJORLINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `BWC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BWCR {
            #[doc = "No eDMA engine stalls."]
            _0,
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            _10,
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            _11,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl BWCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    BWCR::_0 => 0,
                    BWCR::_10 => 2,
                    BWCR::_11 => 3,
                    BWCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> BWCR {
                match value {
                    0 => BWCR::_0,
                    2 => BWCR::_10,
                    3 => BWCR::_11,
                    i => BWCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BWCR::_0
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == BWCR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == BWCR::_11
            }
        }
        #[doc = "Values that can be written to the field `START`"]
        pub enum STARTW {
            #[doc = "The channel is not explicitly started."]
            _0,
            #[doc = "The channel is explicitly started via a software initiated service request."]
            _1,
        }
        impl STARTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    STARTW::_0 => false,
                    STARTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _STARTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _STARTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: STARTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel is not explicitly started."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(STARTW::_0)
            }
            #[doc = "The channel is explicitly started via a software initiated service request."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(STARTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INTMAJOR`"]
        pub enum INTMAJORW {
            #[doc = "The end-of-major loop interrupt is disabled."]
            _0,
            #[doc = "The end-of-major loop interrupt is enabled."]
            _1,
        }
        impl INTMAJORW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INTMAJORW::_0 => false,
                    INTMAJORW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INTMAJORW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INTMAJORW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INTMAJORW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The end-of-major loop interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INTMAJORW::_0)
            }
            #[doc = "The end-of-major loop interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INTMAJORW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INTHALF`"]
        pub enum INTHALFW {
            #[doc = "The half-point interrupt is disabled."]
            _0,
            #[doc = "The half-point interrupt is enabled."]
            _1,
        }
        impl INTHALFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INTHALFW::_0 => false,
                    INTHALFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INTHALFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INTHALFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INTHALFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The half-point interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INTHALFW::_0)
            }
            #[doc = "The half-point interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INTHALFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DREQW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DREQW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ESG`"]
        pub enum ESGW {
            #[doc = "The current channel's TCD is normal format."]
            _0,
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            _1,
        }
        impl ESGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ESGW::_0 => false,
                    ESGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ESGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ESGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ESGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The current channel's TCD is normal format."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ESGW::_0)
            }
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ESGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MAJORELINK`"]
        pub enum MAJORELINKW {
            #[doc = "The channel-to-channel linking is disabled."]
            _0,
            #[doc = "The channel-to-channel linking is enabled."]
            _1,
        }
        impl MAJORELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MAJORELINKW::_0 => false,
                    MAJORELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MAJORELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MAJORELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MAJORELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MAJORELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MAJORELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ACTIVEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ACTIVEW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DONEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DONEW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MAJORLINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MAJORLINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BWC`"]
        pub enum BWCW {
            #[doc = "No eDMA engine stalls."]
            _0,
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            _10,
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            _11,
        }
        impl BWCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    BWCW::_0 => 0,
                    BWCW::_10 => 2,
                    BWCW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BWCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BWCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BWCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "No eDMA engine stalls."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BWCW::_0)
            }
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(BWCW::_10)
            }
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(BWCW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bit 0 - Channel Start"]
            #[inline(always)]
            pub fn start(&self) -> STARTR {
                STARTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 1 - Enable an interrupt when major iteration count completes."]
            #[inline(always)]
            pub fn intmajor(&self) -> INTMAJORR {
                INTMAJORR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 2 - Enable an interrupt when major counter is half complete."]
            #[inline(always)]
            pub fn inthalf(&self) -> INTHALFR {
                INTHALFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 3 - Disable Request"]
            #[inline(always)]
            pub fn dreq(&self) -> DREQR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                DREQR { bits }
            }
            #[doc = "Bit 4 - Enable Scatter/Gather Processing"]
            #[inline(always)]
            pub fn esg(&self) -> ESGR {
                ESGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 5 - Enable channel-to-channel linking on major loop complete"]
            #[inline(always)]
            pub fn majorelink(&self) -> MAJORELINKR {
                MAJORELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 6 - Channel Active"]
            #[inline(always)]
            pub fn active(&self) -> ACTIVER {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                ACTIVER { bits }
            }
            #[doc = "Bit 7 - Channel Done"]
            #[inline(always)]
            pub fn done(&self) -> DONER {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                DONER { bits }
            }
            #[doc = "Bits 8:11 - Major Loop Link Channel Number"]
            #[inline(always)]
            pub fn majorlinkch(&self) -> MAJORLINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                MAJORLINKCHR { bits }
            }
            #[doc = "Bits 14:15 - Bandwidth Control"]
            #[inline(always)]
            pub fn bwc(&self) -> BWCR {
                BWCR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Channel Start"]
            #[inline(always)]
            pub fn start(&mut self) -> _STARTW {
                _STARTW { w: self }
            }
            #[doc = "Bit 1 - Enable an interrupt when major iteration count completes."]
            #[inline(always)]
            pub fn intmajor(&mut self) -> _INTMAJORW {
                _INTMAJORW { w: self }
            }
            #[doc = "Bit 2 - Enable an interrupt when major counter is half complete."]
            #[inline(always)]
            pub fn inthalf(&mut self) -> _INTHALFW {
                _INTHALFW { w: self }
            }
            #[doc = "Bit 3 - Disable Request"]
            #[inline(always)]
            pub fn dreq(&mut self) -> _DREQW {
                _DREQW { w: self }
            }
            #[doc = "Bit 4 - Enable Scatter/Gather Processing"]
            #[inline(always)]
            pub fn esg(&mut self) -> _ESGW {
                _ESGW { w: self }
            }
            #[doc = "Bit 5 - Enable channel-to-channel linking on major loop complete"]
            #[inline(always)]
            pub fn majorelink(&mut self) -> _MAJORELINKW {
                _MAJORELINKW { w: self }
            }
            #[doc = "Bit 6 - Channel Active"]
            #[inline(always)]
            pub fn active(&mut self) -> _ACTIVEW {
                _ACTIVEW { w: self }
            }
            #[doc = "Bit 7 - Channel Done"]
            #[inline(always)]
            pub fn done(&mut self) -> _DONEW {
                _DONEW { w: self }
            }
            #[doc = "Bits 8:11 - Major Loop Link Channel Number"]
            #[inline(always)]
            pub fn majorlinkch(&mut self) -> _MAJORLINKCHW {
                _MAJORLINKCHW { w: self }
            }
            #[doc = "Bits 14:15 - Bandwidth Control"]
            #[inline(always)]
            pub fn bwc(&mut self) -> _BWCW {
                _BWCW { w: self }
            }
        }
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub struct TCD13_BITER_ELINKNO {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub mod tcd13_biter_elinkno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD13_BITER_ELINKNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BITERR {
            bits: u16,
        }
        impl BITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _BITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 32767;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:14 - Starting Major Iteration Count"]
            #[inline(always)]
            pub fn biter(&self) -> BITERR {
                let bits = {
                    const MASK: u16 = 32767;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                BITERR { bits }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:14 - Starting Major Iteration Count"]
            #[inline(always)]
            pub fn biter(&mut self) -> _BITERW {
                _BITERW { w: self }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub struct TCD13_BITER_ELINKYES {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub mod tcd13_biter_elinkyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD13_BITER_ELINKYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BITERR {
            bits: u16,
        }
        impl BITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct LINKCHR {
            bits: u8,
        }
        impl LINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _BITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 511;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _LINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:8 - Starting major iteration count"]
            #[inline(always)]
            pub fn biter(&self) -> BITERR {
                let bits = {
                    const MASK: u16 = 511;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                BITERR { bits }
            }
            #[doc = "Bits 9:12 - Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&self) -> LINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                LINKCHR { bits }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:8 - Starting major iteration count"]
            #[inline(always)]
            pub fn biter(&mut self) -> _BITERW {
                _BITERW { w: self }
            }
            #[doc = "Bits 9:12 - Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&mut self) -> _LINKCHW {
                _LINKCHW { w: self }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Source Address"]
    pub struct TCD14_SADDR {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Source Address"]
    pub mod tcd14_saddr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD14_SADDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SADDRR {
            bits: u32,
        }
        impl SADDRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SADDRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SADDRW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Source Address"]
            #[inline(always)]
            pub fn saddr(&self) -> SADDRR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SADDRR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Source Address"]
            #[inline(always)]
            pub fn saddr(&mut self) -> _SADDRW {
                _SADDRW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Source Address Offset"]
    pub struct TCD14_SOFF {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Signed Source Address Offset"]
    pub mod tcd14_soff {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD14_SOFF {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SOFFR {
            bits: u16,
        }
        impl SOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:15 - Source address signed offset"]
            #[inline(always)]
            pub fn soff(&self) -> SOFFR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                SOFFR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Source address signed offset"]
            #[inline(always)]
            pub fn soff(&mut self) -> _SOFFW {
                _SOFFW { w: self }
            }
        }
    }
    #[doc = "TCD Transfer Attributes"]
    pub struct TCD14_ATTR {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Transfer Attributes"]
    pub mod tcd14_attr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD14_ATTR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DSIZER {
            bits: u8,
        }
        impl DSIZER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DMODR {
            bits: u8,
        }
        impl DMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `SSIZE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SSIZER {
            #[doc = "8-bit"]
            _0,
            #[doc = "16-bit"]
            _1,
            #[doc = "32-bit"]
            _10,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl SSIZER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SSIZER::_0 => 0,
                    SSIZER::_1 => 1,
                    SSIZER::_10 => 2,
                    SSIZER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SSIZER {
                match value {
                    0 => SSIZER::_0,
                    1 => SSIZER::_1,
                    2 => SSIZER::_10,
                    i => SSIZER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SSIZER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SSIZER::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == SSIZER::_10
            }
        }
        #[doc = "Possible values of the field `SMOD`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMODR {
            #[doc = "Source address modulo feature is disabled"]
            _0,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl SMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SMODR::_0 => 0,
                    SMODR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SMODR {
                match value {
                    0 => SMODR::_0,
                    i => SMODR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMODR::_0
            }
        }
        #[doc = r" Proxy"]
        pub struct _DSIZEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DSIZEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMODW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SSIZE`"]
        pub enum SSIZEW {
            #[doc = "8-bit"]
            _0,
            #[doc = "16-bit"]
            _1,
            #[doc = "32-bit"]
            _10,
        }
        impl SSIZEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SSIZEW::_0 => 0,
                    SSIZEW::_1 => 1,
                    SSIZEW::_10 => 2,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SSIZEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SSIZEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SSIZEW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "8-bit"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SSIZEW::_0)
            }
            #[doc = "16-bit"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SSIZEW::_1)
            }
            #[doc = "32-bit"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(SSIZEW::_10)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMOD`"]
        pub enum SMODW {
            #[doc = "Source address modulo feature is disabled"]
            _0,
        }
        impl SMODW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SMODW::_0 => 0,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMODW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMODW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Source address modulo feature is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMODW::_0)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:2 - Destination data transfer size"]
            #[inline(always)]
            pub fn dsize(&self) -> DSIZER {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                DSIZER { bits }
            }
            #[doc = "Bits 3:7 - Destination Address Modulo"]
            #[inline(always)]
            pub fn dmod(&self) -> DMODR {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                DMODR { bits }
            }
            #[doc = "Bits 8:10 - Source data transfer size"]
            #[inline(always)]
            pub fn ssize(&self) -> SSIZER {
                SSIZER::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
            #[doc = "Bits 11:15 - Source Address Modulo"]
            #[inline(always)]
            pub fn smod(&self) -> SMODR {
                SMODR::_from({
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:2 - Destination data transfer size"]
            #[inline(always)]
            pub fn dsize(&mut self) -> _DSIZEW {
                _DSIZEW { w: self }
            }
            #[doc = "Bits 3:7 - Destination Address Modulo"]
            #[inline(always)]
            pub fn dmod(&mut self) -> _DMODW {
                _DMODW { w: self }
            }
            #[doc = "Bits 8:10 - Source data transfer size"]
            #[inline(always)]
            pub fn ssize(&mut self) -> _SSIZEW {
                _SSIZEW { w: self }
            }
            #[doc = "Bits 11:15 - Source Address Modulo"]
            #[inline(always)]
            pub fn smod(&mut self) -> _SMODW {
                _SMODW { w: self }
            }
        }
    }
    #[doc = "TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
    pub struct TCD14_NBYTES_MLNO {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
    pub mod tcd14_nbytes_mlno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD14_NBYTES_MLNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u32,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                NBYTESR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"]
    pub struct TCD14_NBYTES_MLOFFNO {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"]
    pub mod tcd14_nbytes_mloffno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD14_NBYTES_MLOFFNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u32,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMLOER {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMLOER::_0 => false,
                    DMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMLOER {
                match value {
                    false => DMLOER::_0,
                    true => DMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMLOER::_1
            }
        }
        #[doc = "Possible values of the field `SMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMLOER {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SMLOER::_0 => false,
                    SMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SMLOER {
                match value {
                    false => SMLOER::_0,
                    true => SMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SMLOER::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 1073741823;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMLOE`"]
        pub enum DMLOEW {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMLOEW::_0 => false,
                    DMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the DADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the DADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMLOE`"]
        pub enum SMLOEW {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SMLOEW::_0 => false,
                    SMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the SADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the SADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:29 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u32 = 1073741823;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                NBYTESR { bits }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&self) -> DMLOER {
                DMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&self) -> SMLOER {
                SMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:29 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&mut self) -> _DMLOEW {
                _DMLOEW { w: self }
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&mut self) -> _SMLOEW {
                _SMLOEW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"]
    pub struct TCD14_NBYTES_MLOFFYES {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"]
    pub mod tcd14_nbytes_mloffyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD14_NBYTES_MLOFFYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u16,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct MLOFFR {
            bits: u32,
        }
        impl MLOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMLOER {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMLOER::_0 => false,
                    DMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMLOER {
                match value {
                    false => DMLOER::_0,
                    true => DMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMLOER::_1
            }
        }
        #[doc = "Possible values of the field `SMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMLOER {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SMLOER::_0 => false,
                    SMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SMLOER {
                match value {
                    false => SMLOER::_0,
                    true => SMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SMLOER::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 1023;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MLOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MLOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 1048575;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMLOE`"]
        pub enum DMLOEW {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMLOEW::_0 => false,
                    DMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the DADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the DADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMLOE`"]
        pub enum SMLOEW {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SMLOEW::_0 => false,
                    SMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the SADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the SADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:9 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u16 = 1023;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                NBYTESR { bits }
            }
            #[doc = "Bits 10:29 - If SMLOE or DMLOE is set, this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."]
            #[inline(always)]
            pub fn mloff(&self) -> MLOFFR {
                let bits = {
                    const MASK: u32 = 1048575;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MLOFFR { bits }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&self) -> DMLOER {
                DMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&self) -> SMLOER {
                SMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:9 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
            #[doc = "Bits 10:29 - If SMLOE or DMLOE is set, this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."]
            #[inline(always)]
            pub fn mloff(&mut self) -> _MLOFFW {
                _MLOFFW { w: self }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&mut self) -> _DMLOEW {
                _DMLOEW { w: self }
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&mut self) -> _SMLOEW {
                _SMLOEW { w: self }
            }
        }
    }
    #[doc = "TCD Last Source Address Adjustment"]
    pub struct TCD14_SLAST {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Last Source Address Adjustment"]
    pub mod tcd14_slast {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD14_SLAST {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SLASTR {
            bits: u32,
        }
        impl SLASTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SLASTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SLASTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Last Source Address Adjustment"]
            #[inline(always)]
            pub fn slast(&self) -> SLASTR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SLASTR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Last Source Address Adjustment"]
            #[inline(always)]
            pub fn slast(&mut self) -> _SLASTW {
                _SLASTW { w: self }
            }
        }
    }
    #[doc = "TCD Destination Address"]
    pub struct TCD14_DADDR {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Destination Address"]
    pub mod tcd14_daddr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD14_DADDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DADDRR {
            bits: u32,
        }
        impl DADDRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DADDRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DADDRW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Destination Address"]
            #[inline(always)]
            pub fn daddr(&self) -> DADDRR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                DADDRR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Destination Address"]
            #[inline(always)]
            pub fn daddr(&mut self) -> _DADDRW {
                _DADDRW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Destination Address Offset"]
    pub struct TCD14_DOFF {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Signed Destination Address Offset"]
    pub mod tcd14_doff {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD14_DOFF {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DOFFR {
            bits: u16,
        }
        impl DOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:15 - Destination Address Signed Offset"]
            #[inline(always)]
            pub fn doff(&self) -> DOFFR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                DOFFR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Destination Address Signed Offset"]
            #[inline(always)]
            pub fn doff(&mut self) -> _DOFFW {
                _DOFFW { w: self }
            }
        }
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub struct TCD14_CITER_ELINKNO {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub mod tcd14_citer_elinkno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD14_CITER_ELINKNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CITERR {
            bits: u16,
        }
        impl CITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 32767;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:14 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer(&self) -> CITERR {
                let bits = {
                    const MASK: u16 = 32767;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                CITERR { bits }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:14 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer(&mut self) -> _CITERW {
                _CITERW { w: self }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub struct TCD14_CITER_ELINKYES {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub mod tcd14_citer_elinkyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD14_CITER_ELINKYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CITER_LER {
            bits: u16,
        }
        impl CITER_LER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct LINKCHR {
            bits: u8,
        }
        impl LINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CITER_LEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CITER_LEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 511;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _LINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:8 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer_le(&self) -> CITER_LER {
                let bits = {
                    const MASK: u16 = 511;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                CITER_LER { bits }
            }
            #[doc = "Bits 9:12 - Minor Loop Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&self) -> LINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                LINKCHR { bits }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:8 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer_le(&mut self) -> _CITER_LEW {
                _CITER_LEW { w: self }
            }
            #[doc = "Bits 9:12 - Minor Loop Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&mut self) -> _LINKCHW {
                _LINKCHW { w: self }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Last Destination Address Adjustment/Scatter Gather Address"]
    pub struct TCD14_DLASTSGA {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Last Destination Address Adjustment/Scatter Gather Address"]
    pub mod tcd14_dlastsga {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD14_DLASTSGA {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLASTSGAR {
            bits: u32,
        }
        impl DLASTSGAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DLASTSGAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DLASTSGAW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - DLASTSGA"]
            #[inline(always)]
            pub fn dlastsga(&self) -> DLASTSGAR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                DLASTSGAR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - DLASTSGA"]
            #[inline(always)]
            pub fn dlastsga(&mut self) -> _DLASTSGAW {
                _DLASTSGAW { w: self }
            }
        }
    }
    #[doc = "TCD Control and Status"]
    pub struct TCD14_CSR {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Control and Status"]
    pub mod tcd14_csr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD14_CSR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `START`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum STARTR {
            #[doc = "The channel is not explicitly started."]
            _0,
            #[doc = "The channel is explicitly started via a software initiated service request."]
            _1,
        }
        impl STARTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    STARTR::_0 => false,
                    STARTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> STARTR {
                match value {
                    false => STARTR::_0,
                    true => STARTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == STARTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == STARTR::_1
            }
        }
        #[doc = "Possible values of the field `INTMAJOR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INTMAJORR {
            #[doc = "The end-of-major loop interrupt is disabled."]
            _0,
            #[doc = "The end-of-major loop interrupt is enabled."]
            _1,
        }
        impl INTMAJORR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INTMAJORR::_0 => false,
                    INTMAJORR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INTMAJORR {
                match value {
                    false => INTMAJORR::_0,
                    true => INTMAJORR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INTMAJORR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INTMAJORR::_1
            }
        }
        #[doc = "Possible values of the field `INTHALF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INTHALFR {
            #[doc = "The half-point interrupt is disabled."]
            _0,
            #[doc = "The half-point interrupt is enabled."]
            _1,
        }
        impl INTHALFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INTHALFR::_0 => false,
                    INTHALFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INTHALFR {
                match value {
                    false => INTHALFR::_0,
                    true => INTHALFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INTHALFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INTHALFR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct DREQR {
            bits: bool,
        }
        impl DREQR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `ESG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ESGR {
            #[doc = "The current channel's TCD is normal format."]
            _0,
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            _1,
        }
        impl ESGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ESGR::_0 => false,
                    ESGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ESGR {
                match value {
                    false => ESGR::_0,
                    true => ESGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ESGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ESGR::_1
            }
        }
        #[doc = "Possible values of the field `MAJORELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MAJORELINKR {
            #[doc = "The channel-to-channel linking is disabled."]
            _0,
            #[doc = "The channel-to-channel linking is enabled."]
            _1,
        }
        impl MAJORELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MAJORELINKR::_0 => false,
                    MAJORELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MAJORELINKR {
                match value {
                    false => MAJORELINKR::_0,
                    true => MAJORELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MAJORELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MAJORELINKR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ACTIVER {
            bits: bool,
        }
        impl ACTIVER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct DONER {
            bits: bool,
        }
        impl DONER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MAJORLINKCHR {
            bits: u8,
        }
        impl MAJORLINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `BWC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BWCR {
            #[doc = "No eDMA engine stalls."]
            _0,
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            _10,
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            _11,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl BWCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    BWCR::_0 => 0,
                    BWCR::_10 => 2,
                    BWCR::_11 => 3,
                    BWCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> BWCR {
                match value {
                    0 => BWCR::_0,
                    2 => BWCR::_10,
                    3 => BWCR::_11,
                    i => BWCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BWCR::_0
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == BWCR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == BWCR::_11
            }
        }
        #[doc = "Values that can be written to the field `START`"]
        pub enum STARTW {
            #[doc = "The channel is not explicitly started."]
            _0,
            #[doc = "The channel is explicitly started via a software initiated service request."]
            _1,
        }
        impl STARTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    STARTW::_0 => false,
                    STARTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _STARTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _STARTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: STARTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel is not explicitly started."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(STARTW::_0)
            }
            #[doc = "The channel is explicitly started via a software initiated service request."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(STARTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INTMAJOR`"]
        pub enum INTMAJORW {
            #[doc = "The end-of-major loop interrupt is disabled."]
            _0,
            #[doc = "The end-of-major loop interrupt is enabled."]
            _1,
        }
        impl INTMAJORW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INTMAJORW::_0 => false,
                    INTMAJORW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INTMAJORW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INTMAJORW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INTMAJORW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The end-of-major loop interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INTMAJORW::_0)
            }
            #[doc = "The end-of-major loop interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INTMAJORW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INTHALF`"]
        pub enum INTHALFW {
            #[doc = "The half-point interrupt is disabled."]
            _0,
            #[doc = "The half-point interrupt is enabled."]
            _1,
        }
        impl INTHALFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INTHALFW::_0 => false,
                    INTHALFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INTHALFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INTHALFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INTHALFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The half-point interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INTHALFW::_0)
            }
            #[doc = "The half-point interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INTHALFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DREQW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DREQW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ESG`"]
        pub enum ESGW {
            #[doc = "The current channel's TCD is normal format."]
            _0,
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            _1,
        }
        impl ESGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ESGW::_0 => false,
                    ESGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ESGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ESGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ESGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The current channel's TCD is normal format."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ESGW::_0)
            }
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ESGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MAJORELINK`"]
        pub enum MAJORELINKW {
            #[doc = "The channel-to-channel linking is disabled."]
            _0,
            #[doc = "The channel-to-channel linking is enabled."]
            _1,
        }
        impl MAJORELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MAJORELINKW::_0 => false,
                    MAJORELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MAJORELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MAJORELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MAJORELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MAJORELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MAJORELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ACTIVEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ACTIVEW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DONEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DONEW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MAJORLINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MAJORLINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BWC`"]
        pub enum BWCW {
            #[doc = "No eDMA engine stalls."]
            _0,
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            _10,
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            _11,
        }
        impl BWCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    BWCW::_0 => 0,
                    BWCW::_10 => 2,
                    BWCW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BWCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BWCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BWCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "No eDMA engine stalls."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BWCW::_0)
            }
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(BWCW::_10)
            }
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(BWCW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bit 0 - Channel Start"]
            #[inline(always)]
            pub fn start(&self) -> STARTR {
                STARTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 1 - Enable an interrupt when major iteration count completes."]
            #[inline(always)]
            pub fn intmajor(&self) -> INTMAJORR {
                INTMAJORR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 2 - Enable an interrupt when major counter is half complete."]
            #[inline(always)]
            pub fn inthalf(&self) -> INTHALFR {
                INTHALFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 3 - Disable Request"]
            #[inline(always)]
            pub fn dreq(&self) -> DREQR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                DREQR { bits }
            }
            #[doc = "Bit 4 - Enable Scatter/Gather Processing"]
            #[inline(always)]
            pub fn esg(&self) -> ESGR {
                ESGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 5 - Enable channel-to-channel linking on major loop complete"]
            #[inline(always)]
            pub fn majorelink(&self) -> MAJORELINKR {
                MAJORELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 6 - Channel Active"]
            #[inline(always)]
            pub fn active(&self) -> ACTIVER {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                ACTIVER { bits }
            }
            #[doc = "Bit 7 - Channel Done"]
            #[inline(always)]
            pub fn done(&self) -> DONER {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                DONER { bits }
            }
            #[doc = "Bits 8:11 - Major Loop Link Channel Number"]
            #[inline(always)]
            pub fn majorlinkch(&self) -> MAJORLINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                MAJORLINKCHR { bits }
            }
            #[doc = "Bits 14:15 - Bandwidth Control"]
            #[inline(always)]
            pub fn bwc(&self) -> BWCR {
                BWCR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Channel Start"]
            #[inline(always)]
            pub fn start(&mut self) -> _STARTW {
                _STARTW { w: self }
            }
            #[doc = "Bit 1 - Enable an interrupt when major iteration count completes."]
            #[inline(always)]
            pub fn intmajor(&mut self) -> _INTMAJORW {
                _INTMAJORW { w: self }
            }
            #[doc = "Bit 2 - Enable an interrupt when major counter is half complete."]
            #[inline(always)]
            pub fn inthalf(&mut self) -> _INTHALFW {
                _INTHALFW { w: self }
            }
            #[doc = "Bit 3 - Disable Request"]
            #[inline(always)]
            pub fn dreq(&mut self) -> _DREQW {
                _DREQW { w: self }
            }
            #[doc = "Bit 4 - Enable Scatter/Gather Processing"]
            #[inline(always)]
            pub fn esg(&mut self) -> _ESGW {
                _ESGW { w: self }
            }
            #[doc = "Bit 5 - Enable channel-to-channel linking on major loop complete"]
            #[inline(always)]
            pub fn majorelink(&mut self) -> _MAJORELINKW {
                _MAJORELINKW { w: self }
            }
            #[doc = "Bit 6 - Channel Active"]
            #[inline(always)]
            pub fn active(&mut self) -> _ACTIVEW {
                _ACTIVEW { w: self }
            }
            #[doc = "Bit 7 - Channel Done"]
            #[inline(always)]
            pub fn done(&mut self) -> _DONEW {
                _DONEW { w: self }
            }
            #[doc = "Bits 8:11 - Major Loop Link Channel Number"]
            #[inline(always)]
            pub fn majorlinkch(&mut self) -> _MAJORLINKCHW {
                _MAJORLINKCHW { w: self }
            }
            #[doc = "Bits 14:15 - Bandwidth Control"]
            #[inline(always)]
            pub fn bwc(&mut self) -> _BWCW {
                _BWCW { w: self }
            }
        }
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub struct TCD14_BITER_ELINKNO {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub mod tcd14_biter_elinkno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD14_BITER_ELINKNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BITERR {
            bits: u16,
        }
        impl BITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _BITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 32767;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:14 - Starting Major Iteration Count"]
            #[inline(always)]
            pub fn biter(&self) -> BITERR {
                let bits = {
                    const MASK: u16 = 32767;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                BITERR { bits }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:14 - Starting Major Iteration Count"]
            #[inline(always)]
            pub fn biter(&mut self) -> _BITERW {
                _BITERW { w: self }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub struct TCD14_BITER_ELINKYES {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub mod tcd14_biter_elinkyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD14_BITER_ELINKYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BITERR {
            bits: u16,
        }
        impl BITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct LINKCHR {
            bits: u8,
        }
        impl LINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _BITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 511;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _LINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:8 - Starting major iteration count"]
            #[inline(always)]
            pub fn biter(&self) -> BITERR {
                let bits = {
                    const MASK: u16 = 511;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                BITERR { bits }
            }
            #[doc = "Bits 9:12 - Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&self) -> LINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                LINKCHR { bits }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:8 - Starting major iteration count"]
            #[inline(always)]
            pub fn biter(&mut self) -> _BITERW {
                _BITERW { w: self }
            }
            #[doc = "Bits 9:12 - Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&mut self) -> _LINKCHW {
                _LINKCHW { w: self }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Source Address"]
    pub struct TCD15_SADDR {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Source Address"]
    pub mod tcd15_saddr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD15_SADDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SADDRR {
            bits: u32,
        }
        impl SADDRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SADDRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SADDRW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Source Address"]
            #[inline(always)]
            pub fn saddr(&self) -> SADDRR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SADDRR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Source Address"]
            #[inline(always)]
            pub fn saddr(&mut self) -> _SADDRW {
                _SADDRW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Source Address Offset"]
    pub struct TCD15_SOFF {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Signed Source Address Offset"]
    pub mod tcd15_soff {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD15_SOFF {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SOFFR {
            bits: u16,
        }
        impl SOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:15 - Source address signed offset"]
            #[inline(always)]
            pub fn soff(&self) -> SOFFR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                SOFFR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Source address signed offset"]
            #[inline(always)]
            pub fn soff(&mut self) -> _SOFFW {
                _SOFFW { w: self }
            }
        }
    }
    #[doc = "TCD Transfer Attributes"]
    pub struct TCD15_ATTR {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Transfer Attributes"]
    pub mod tcd15_attr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD15_ATTR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DSIZER {
            bits: u8,
        }
        impl DSIZER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DMODR {
            bits: u8,
        }
        impl DMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `SSIZE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SSIZER {
            #[doc = "8-bit"]
            _0,
            #[doc = "16-bit"]
            _1,
            #[doc = "32-bit"]
            _10,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl SSIZER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SSIZER::_0 => 0,
                    SSIZER::_1 => 1,
                    SSIZER::_10 => 2,
                    SSIZER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SSIZER {
                match value {
                    0 => SSIZER::_0,
                    1 => SSIZER::_1,
                    2 => SSIZER::_10,
                    i => SSIZER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SSIZER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SSIZER::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == SSIZER::_10
            }
        }
        #[doc = "Possible values of the field `SMOD`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMODR {
            #[doc = "Source address modulo feature is disabled"]
            _0,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl SMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SMODR::_0 => 0,
                    SMODR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SMODR {
                match value {
                    0 => SMODR::_0,
                    i => SMODR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMODR::_0
            }
        }
        #[doc = r" Proxy"]
        pub struct _DSIZEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DSIZEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMODW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SSIZE`"]
        pub enum SSIZEW {
            #[doc = "8-bit"]
            _0,
            #[doc = "16-bit"]
            _1,
            #[doc = "32-bit"]
            _10,
        }
        impl SSIZEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SSIZEW::_0 => 0,
                    SSIZEW::_1 => 1,
                    SSIZEW::_10 => 2,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SSIZEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SSIZEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SSIZEW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "8-bit"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SSIZEW::_0)
            }
            #[doc = "16-bit"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SSIZEW::_1)
            }
            #[doc = "32-bit"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(SSIZEW::_10)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMOD`"]
        pub enum SMODW {
            #[doc = "Source address modulo feature is disabled"]
            _0,
        }
        impl SMODW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SMODW::_0 => 0,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMODW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMODW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Source address modulo feature is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMODW::_0)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:2 - Destination data transfer size"]
            #[inline(always)]
            pub fn dsize(&self) -> DSIZER {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                DSIZER { bits }
            }
            #[doc = "Bits 3:7 - Destination Address Modulo"]
            #[inline(always)]
            pub fn dmod(&self) -> DMODR {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                DMODR { bits }
            }
            #[doc = "Bits 8:10 - Source data transfer size"]
            #[inline(always)]
            pub fn ssize(&self) -> SSIZER {
                SSIZER::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
            #[doc = "Bits 11:15 - Source Address Modulo"]
            #[inline(always)]
            pub fn smod(&self) -> SMODR {
                SMODR::_from({
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:2 - Destination data transfer size"]
            #[inline(always)]
            pub fn dsize(&mut self) -> _DSIZEW {
                _DSIZEW { w: self }
            }
            #[doc = "Bits 3:7 - Destination Address Modulo"]
            #[inline(always)]
            pub fn dmod(&mut self) -> _DMODW {
                _DMODW { w: self }
            }
            #[doc = "Bits 8:10 - Source data transfer size"]
            #[inline(always)]
            pub fn ssize(&mut self) -> _SSIZEW {
                _SSIZEW { w: self }
            }
            #[doc = "Bits 11:15 - Source Address Modulo"]
            #[inline(always)]
            pub fn smod(&mut self) -> _SMODW {
                _SMODW { w: self }
            }
        }
    }
    #[doc = "TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
    pub struct TCD15_NBYTES_MLNO {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
    pub mod tcd15_nbytes_mlno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD15_NBYTES_MLNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u32,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                NBYTESR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"]
    pub struct TCD15_NBYTES_MLOFFNO {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"]
    pub mod tcd15_nbytes_mloffno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD15_NBYTES_MLOFFNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u32,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMLOER {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMLOER::_0 => false,
                    DMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMLOER {
                match value {
                    false => DMLOER::_0,
                    true => DMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMLOER::_1
            }
        }
        #[doc = "Possible values of the field `SMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMLOER {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SMLOER::_0 => false,
                    SMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SMLOER {
                match value {
                    false => SMLOER::_0,
                    true => SMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SMLOER::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 1073741823;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMLOE`"]
        pub enum DMLOEW {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMLOEW::_0 => false,
                    DMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the DADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the DADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMLOE`"]
        pub enum SMLOEW {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SMLOEW::_0 => false,
                    SMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the SADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the SADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:29 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u32 = 1073741823;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                NBYTESR { bits }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&self) -> DMLOER {
                DMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&self) -> SMLOER {
                SMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:29 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&mut self) -> _DMLOEW {
                _DMLOEW { w: self }
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&mut self) -> _SMLOEW {
                _SMLOEW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"]
    pub struct TCD15_NBYTES_MLOFFYES {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"]
    pub mod tcd15_nbytes_mloffyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD15_NBYTES_MLOFFYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct NBYTESR {
            bits: u16,
        }
        impl NBYTESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct MLOFFR {
            bits: u32,
        }
        impl MLOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMLOER {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMLOER::_0 => false,
                    DMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMLOER {
                match value {
                    false => DMLOER::_0,
                    true => DMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMLOER::_1
            }
        }
        #[doc = "Possible values of the field `SMLOE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMLOER {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SMLOER::_0 => false,
                    SMLOER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SMLOER {
                match value {
                    false => SMLOER::_0,
                    true => SMLOER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMLOER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SMLOER::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _NBYTESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NBYTESW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 1023;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MLOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MLOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 1048575;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMLOE`"]
        pub enum DMLOEW {
            #[doc = "The minor loop offset is not applied to the DADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the DADDR"]
            _1,
        }
        impl DMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMLOEW::_0 => false,
                    DMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the DADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the DADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMLOE`"]
        pub enum SMLOEW {
            #[doc = "The minor loop offset is not applied to the SADDR"]
            _0,
            #[doc = "The minor loop offset is applied to the SADDR"]
            _1,
        }
        impl SMLOEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SMLOEW::_0 => false,
                    SMLOEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMLOEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMLOEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMLOEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minor loop offset is not applied to the SADDR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMLOEW::_0)
            }
            #[doc = "The minor loop offset is applied to the SADDR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SMLOEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:9 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&self) -> NBYTESR {
                let bits = {
                    const MASK: u16 = 1023;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                NBYTESR { bits }
            }
            #[doc = "Bits 10:29 - If SMLOE or DMLOE is set, this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."]
            #[inline(always)]
            pub fn mloff(&self) -> MLOFFR {
                let bits = {
                    const MASK: u32 = 1048575;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MLOFFR { bits }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&self) -> DMLOER {
                DMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&self) -> SMLOER {
                SMLOER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:9 - Minor Byte Transfer Count"]
            #[inline(always)]
            pub fn nbytes(&mut self) -> _NBYTESW {
                _NBYTESW { w: self }
            }
            #[doc = "Bits 10:29 - If SMLOE or DMLOE is set, this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."]
            #[inline(always)]
            pub fn mloff(&mut self) -> _MLOFFW {
                _MLOFFW { w: self }
            }
            #[doc = "Bit 30 - Destination Minor Loop Offset enable"]
            #[inline(always)]
            pub fn dmloe(&mut self) -> _DMLOEW {
                _DMLOEW { w: self }
            }
            #[doc = "Bit 31 - Source Minor Loop Offset Enable"]
            #[inline(always)]
            pub fn smloe(&mut self) -> _SMLOEW {
                _SMLOEW { w: self }
            }
        }
    }
    #[doc = "TCD Last Source Address Adjustment"]
    pub struct TCD15_SLAST {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Last Source Address Adjustment"]
    pub mod tcd15_slast {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD15_SLAST {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SLASTR {
            bits: u32,
        }
        impl SLASTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SLASTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SLASTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Last Source Address Adjustment"]
            #[inline(always)]
            pub fn slast(&self) -> SLASTR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SLASTR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Last Source Address Adjustment"]
            #[inline(always)]
            pub fn slast(&mut self) -> _SLASTW {
                _SLASTW { w: self }
            }
        }
    }
    #[doc = "TCD Destination Address"]
    pub struct TCD15_DADDR {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Destination Address"]
    pub mod tcd15_daddr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD15_DADDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DADDRR {
            bits: u32,
        }
        impl DADDRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DADDRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DADDRW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Destination Address"]
            #[inline(always)]
            pub fn daddr(&self) -> DADDRR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                DADDRR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Destination Address"]
            #[inline(always)]
            pub fn daddr(&mut self) -> _DADDRW {
                _DADDRW { w: self }
            }
        }
    }
    #[doc = "TCD Signed Destination Address Offset"]
    pub struct TCD15_DOFF {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Signed Destination Address Offset"]
    pub mod tcd15_doff {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD15_DOFF {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DOFFR {
            bits: u16,
        }
        impl DOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:15 - Destination Address Signed Offset"]
            #[inline(always)]
            pub fn doff(&self) -> DOFFR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                DOFFR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Destination Address Signed Offset"]
            #[inline(always)]
            pub fn doff(&mut self) -> _DOFFW {
                _DOFFW { w: self }
            }
        }
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub struct TCD15_CITER_ELINKNO {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub mod tcd15_citer_elinkno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD15_CITER_ELINKNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CITERR {
            bits: u16,
        }
        impl CITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 32767;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:14 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer(&self) -> CITERR {
                let bits = {
                    const MASK: u16 = 32767;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                CITERR { bits }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:14 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer(&mut self) -> _CITERW {
                _CITERW { w: self }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub struct TCD15_CITER_ELINKYES {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub mod tcd15_citer_elinkyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD15_CITER_ELINKYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CITER_LER {
            bits: u16,
        }
        impl CITER_LER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct LINKCHR {
            bits: u8,
        }
        impl LINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CITER_LEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CITER_LEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 511;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _LINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:8 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer_le(&self) -> CITER_LER {
                let bits = {
                    const MASK: u16 = 511;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                CITER_LER { bits }
            }
            #[doc = "Bits 9:12 - Minor Loop Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&self) -> LINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                LINKCHR { bits }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:8 - Current Major Iteration Count"]
            #[inline(always)]
            pub fn citer_le(&mut self) -> _CITER_LEW {
                _CITER_LEW { w: self }
            }
            #[doc = "Bits 9:12 - Minor Loop Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&mut self) -> _LINKCHW {
                _LINKCHW { w: self }
            }
            #[doc = "Bit 15 - Enable channel-to-channel linking on minor-loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Last Destination Address Adjustment/Scatter Gather Address"]
    pub struct TCD15_DLASTSGA {
        register: VolatileCell<u32>,
    }
    #[doc = "TCD Last Destination Address Adjustment/Scatter Gather Address"]
    pub mod tcd15_dlastsga {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCD15_DLASTSGA {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLASTSGAR {
            bits: u32,
        }
        impl DLASTSGAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DLASTSGAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DLASTSGAW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - DLASTSGA"]
            #[inline(always)]
            pub fn dlastsga(&self) -> DLASTSGAR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                DLASTSGAR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - DLASTSGA"]
            #[inline(always)]
            pub fn dlastsga(&mut self) -> _DLASTSGAW {
                _DLASTSGAW { w: self }
            }
        }
    }
    #[doc = "TCD Control and Status"]
    pub struct TCD15_CSR {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Control and Status"]
    pub mod tcd15_csr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD15_CSR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `START`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum STARTR {
            #[doc = "The channel is not explicitly started."]
            _0,
            #[doc = "The channel is explicitly started via a software initiated service request."]
            _1,
        }
        impl STARTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    STARTR::_0 => false,
                    STARTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> STARTR {
                match value {
                    false => STARTR::_0,
                    true => STARTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == STARTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == STARTR::_1
            }
        }
        #[doc = "Possible values of the field `INTMAJOR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INTMAJORR {
            #[doc = "The end-of-major loop interrupt is disabled."]
            _0,
            #[doc = "The end-of-major loop interrupt is enabled."]
            _1,
        }
        impl INTMAJORR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INTMAJORR::_0 => false,
                    INTMAJORR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INTMAJORR {
                match value {
                    false => INTMAJORR::_0,
                    true => INTMAJORR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INTMAJORR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INTMAJORR::_1
            }
        }
        #[doc = "Possible values of the field `INTHALF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INTHALFR {
            #[doc = "The half-point interrupt is disabled."]
            _0,
            #[doc = "The half-point interrupt is enabled."]
            _1,
        }
        impl INTHALFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INTHALFR::_0 => false,
                    INTHALFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INTHALFR {
                match value {
                    false => INTHALFR::_0,
                    true => INTHALFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INTHALFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INTHALFR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct DREQR {
            bits: bool,
        }
        impl DREQR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `ESG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ESGR {
            #[doc = "The current channel's TCD is normal format."]
            _0,
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            _1,
        }
        impl ESGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ESGR::_0 => false,
                    ESGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ESGR {
                match value {
                    false => ESGR::_0,
                    true => ESGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ESGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ESGR::_1
            }
        }
        #[doc = "Possible values of the field `MAJORELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MAJORELINKR {
            #[doc = "The channel-to-channel linking is disabled."]
            _0,
            #[doc = "The channel-to-channel linking is enabled."]
            _1,
        }
        impl MAJORELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MAJORELINKR::_0 => false,
                    MAJORELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MAJORELINKR {
                match value {
                    false => MAJORELINKR::_0,
                    true => MAJORELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MAJORELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MAJORELINKR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ACTIVER {
            bits: bool,
        }
        impl ACTIVER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct DONER {
            bits: bool,
        }
        impl DONER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MAJORLINKCHR {
            bits: u8,
        }
        impl MAJORLINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `BWC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BWCR {
            #[doc = "No eDMA engine stalls."]
            _0,
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            _10,
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            _11,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl BWCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    BWCR::_0 => 0,
                    BWCR::_10 => 2,
                    BWCR::_11 => 3,
                    BWCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> BWCR {
                match value {
                    0 => BWCR::_0,
                    2 => BWCR::_10,
                    3 => BWCR::_11,
                    i => BWCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BWCR::_0
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == BWCR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == BWCR::_11
            }
        }
        #[doc = "Values that can be written to the field `START`"]
        pub enum STARTW {
            #[doc = "The channel is not explicitly started."]
            _0,
            #[doc = "The channel is explicitly started via a software initiated service request."]
            _1,
        }
        impl STARTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    STARTW::_0 => false,
                    STARTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _STARTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _STARTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: STARTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel is not explicitly started."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(STARTW::_0)
            }
            #[doc = "The channel is explicitly started via a software initiated service request."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(STARTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INTMAJOR`"]
        pub enum INTMAJORW {
            #[doc = "The end-of-major loop interrupt is disabled."]
            _0,
            #[doc = "The end-of-major loop interrupt is enabled."]
            _1,
        }
        impl INTMAJORW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INTMAJORW::_0 => false,
                    INTMAJORW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INTMAJORW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INTMAJORW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INTMAJORW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The end-of-major loop interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INTMAJORW::_0)
            }
            #[doc = "The end-of-major loop interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INTMAJORW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INTHALF`"]
        pub enum INTHALFW {
            #[doc = "The half-point interrupt is disabled."]
            _0,
            #[doc = "The half-point interrupt is enabled."]
            _1,
        }
        impl INTHALFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INTHALFW::_0 => false,
                    INTHALFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INTHALFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INTHALFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INTHALFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The half-point interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INTHALFW::_0)
            }
            #[doc = "The half-point interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INTHALFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DREQW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DREQW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ESG`"]
        pub enum ESGW {
            #[doc = "The current channel's TCD is normal format."]
            _0,
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            _1,
        }
        impl ESGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ESGW::_0 => false,
                    ESGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ESGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ESGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ESGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The current channel's TCD is normal format."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ESGW::_0)
            }
            #[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ESGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MAJORELINK`"]
        pub enum MAJORELINKW {
            #[doc = "The channel-to-channel linking is disabled."]
            _0,
            #[doc = "The channel-to-channel linking is enabled."]
            _1,
        }
        impl MAJORELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MAJORELINKW::_0 => false,
                    MAJORELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MAJORELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MAJORELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MAJORELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MAJORELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MAJORELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ACTIVEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ACTIVEW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DONEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DONEW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MAJORLINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MAJORLINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BWC`"]
        pub enum BWCW {
            #[doc = "No eDMA engine stalls."]
            _0,
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            _10,
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            _11,
        }
        impl BWCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    BWCW::_0 => 0,
                    BWCW::_10 => 2,
                    BWCW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BWCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BWCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BWCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "No eDMA engine stalls."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BWCW::_0)
            }
            #[doc = "eDMA engine stalls for 4 cycles after each R/W."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(BWCW::_10)
            }
            #[doc = "eDMA engine stalls for 8 cycles after each R/W."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(BWCW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bit 0 - Channel Start"]
            #[inline(always)]
            pub fn start(&self) -> STARTR {
                STARTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 1 - Enable an interrupt when major iteration count completes."]
            #[inline(always)]
            pub fn intmajor(&self) -> INTMAJORR {
                INTMAJORR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 2 - Enable an interrupt when major counter is half complete."]
            #[inline(always)]
            pub fn inthalf(&self) -> INTHALFR {
                INTHALFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 3 - Disable Request"]
            #[inline(always)]
            pub fn dreq(&self) -> DREQR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                DREQR { bits }
            }
            #[doc = "Bit 4 - Enable Scatter/Gather Processing"]
            #[inline(always)]
            pub fn esg(&self) -> ESGR {
                ESGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 5 - Enable channel-to-channel linking on major loop complete"]
            #[inline(always)]
            pub fn majorelink(&self) -> MAJORELINKR {
                MAJORELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
            #[doc = "Bit 6 - Channel Active"]
            #[inline(always)]
            pub fn active(&self) -> ACTIVER {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                ACTIVER { bits }
            }
            #[doc = "Bit 7 - Channel Done"]
            #[inline(always)]
            pub fn done(&self) -> DONER {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                };
                DONER { bits }
            }
            #[doc = "Bits 8:11 - Major Loop Link Channel Number"]
            #[inline(always)]
            pub fn majorlinkch(&self) -> MAJORLINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                MAJORLINKCHR { bits }
            }
            #[doc = "Bits 14:15 - Bandwidth Control"]
            #[inline(always)]
            pub fn bwc(&self) -> BWCR {
                BWCR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Channel Start"]
            #[inline(always)]
            pub fn start(&mut self) -> _STARTW {
                _STARTW { w: self }
            }
            #[doc = "Bit 1 - Enable an interrupt when major iteration count completes."]
            #[inline(always)]
            pub fn intmajor(&mut self) -> _INTMAJORW {
                _INTMAJORW { w: self }
            }
            #[doc = "Bit 2 - Enable an interrupt when major counter is half complete."]
            #[inline(always)]
            pub fn inthalf(&mut self) -> _INTHALFW {
                _INTHALFW { w: self }
            }
            #[doc = "Bit 3 - Disable Request"]
            #[inline(always)]
            pub fn dreq(&mut self) -> _DREQW {
                _DREQW { w: self }
            }
            #[doc = "Bit 4 - Enable Scatter/Gather Processing"]
            #[inline(always)]
            pub fn esg(&mut self) -> _ESGW {
                _ESGW { w: self }
            }
            #[doc = "Bit 5 - Enable channel-to-channel linking on major loop complete"]
            #[inline(always)]
            pub fn majorelink(&mut self) -> _MAJORELINKW {
                _MAJORELINKW { w: self }
            }
            #[doc = "Bit 6 - Channel Active"]
            #[inline(always)]
            pub fn active(&mut self) -> _ACTIVEW {
                _ACTIVEW { w: self }
            }
            #[doc = "Bit 7 - Channel Done"]
            #[inline(always)]
            pub fn done(&mut self) -> _DONEW {
                _DONEW { w: self }
            }
            #[doc = "Bits 8:11 - Major Loop Link Channel Number"]
            #[inline(always)]
            pub fn majorlinkch(&mut self) -> _MAJORLINKCHW {
                _MAJORLINKCHW { w: self }
            }
            #[doc = "Bits 14:15 - Bandwidth Control"]
            #[inline(always)]
            pub fn bwc(&mut self) -> _BWCW {
                _BWCW { w: self }
            }
        }
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub struct TCD15_BITER_ELINKNO {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
    pub mod tcd15_biter_elinkno {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD15_BITER_ELINKNO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BITERR {
            bits: u16,
        }
        impl BITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _BITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 32767;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:14 - Starting Major Iteration Count"]
            #[inline(always)]
            pub fn biter(&self) -> BITERR {
                let bits = {
                    const MASK: u16 = 32767;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                BITERR { bits }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:14 - Starting Major Iteration Count"]
            #[inline(always)]
            pub fn biter(&mut self) -> _BITERW {
                _BITERW { w: self }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub struct TCD15_BITER_ELINKYES {
        register: VolatileCell<u16>,
    }
    #[doc = "TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled)"]
    pub mod tcd15_biter_elinkyes {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::TCD15_BITER_ELINKYES {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BITERR {
            bits: u16,
        }
        impl BITERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct LINKCHR {
            bits: u8,
        }
        impl LINKCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ELINK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELINKR {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELINKR::_0 => false,
                    ELINKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELINKR {
                match value {
                    false => ELINKR::_0,
                    true => ELINKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELINKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELINKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _BITERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BITERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 511;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _LINKCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LINKCHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ELINK`"]
        pub enum ELINKW {
            #[doc = "The channel-to-channel linking is disabled"]
            _0,
            #[doc = "The channel-to-channel linking is enabled"]
            _1,
        }
        impl ELINKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ELINKW::_0 => false,
                    ELINKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELINKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELINKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ELINKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel-to-channel linking is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ELINKW::_0)
            }
            #[doc = "The channel-to-channel linking is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ELINKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:8 - Starting major iteration count"]
            #[inline(always)]
            pub fn biter(&self) -> BITERR {
                let bits = {
                    const MASK: u16 = 511;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                BITERR { bits }
            }
            #[doc = "Bits 9:12 - Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&self) -> LINKCHR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                };
                LINKCHR { bits }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&self) -> ELINKR {
                ELINKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u16) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:8 - Starting major iteration count"]
            #[inline(always)]
            pub fn biter(&mut self) -> _BITERW {
                _BITERW { w: self }
            }
            #[doc = "Bits 9:12 - Link Channel Number"]
            #[inline(always)]
            pub fn linkch(&mut self) -> _LINKCHW {
                _LINKCHW { w: self }
            }
            #[doc = "Bit 15 - Enables channel-to-channel linking on minor loop complete"]
            #[inline(always)]
            pub fn elink(&mut self) -> _ELINKW {
                _ELINKW { w: self }
            }
        }
    }
}
#[doc = "Enhanced Direct Memory Access"]
pub struct DMA {
    register_block: dma::RegisterBlock,
}
impl Deref for DMA {
    type Target = dma::RegisterBlock;
    fn deref(&self) -> &dma::RegisterBlock {
        &self.register_block
    }
}
#[doc = "ERM"]
pub const ERM: Peripheral<ERM> = unsafe { Peripheral::new(1073840128) };
#[doc = "ERM"]
pub mod erm {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - ERM Configuration Register 0"]
        pub cr0: CR0,
        _reserved0: [u8; 12usize],
        #[doc = "0x10 - ERM Status Register 0"]
        pub sr0: SR0,
        _reserved1: [u8; 236usize],
        #[doc = "0x100 - ERM Memory n Error Address Register"]
        pub ear0: EAR0,
        _reserved2: [u8; 12usize],
        #[doc = "0x110 - ERM Memory n Error Address Register"]
        pub ear1: EAR1,
    }
    #[doc = "ERM Configuration Register 0"]
    pub struct CR0 {
        register: VolatileCell<u32>,
    }
    #[doc = "ERM Configuration Register 0"]
    pub mod cr0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CR0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `ENCIE1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ENCIE1R {
            #[doc = "Interrupt notification of Memory 1 non-correctable error events is disabled."]
            _0,
            #[doc = "Interrupt notification of Memory 1 non-correctable error events is enabled."]
            _1,
        }
        impl ENCIE1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ENCIE1R::_0 => false,
                    ENCIE1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ENCIE1R {
                match value {
                    false => ENCIE1R::_0,
                    true => ENCIE1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ENCIE1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ENCIE1R::_1
            }
        }
        #[doc = "Possible values of the field `ESCIE1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ESCIE1R {
            #[doc = "Interrupt notification of Memory 1 single-bit correction events is disabled."]
            _0,
            #[doc = "Interrupt notification of Memory 1 single-bit correction events is enabled."]
            _1,
        }
        impl ESCIE1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ESCIE1R::_0 => false,
                    ESCIE1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ESCIE1R {
                match value {
                    false => ESCIE1R::_0,
                    true => ESCIE1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ESCIE1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ESCIE1R::_1
            }
        }
        #[doc = "Possible values of the field `ENCIE0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ENCIE0R {
            #[doc = "Interrupt notification of Memory 0 non-correctable error events is disabled."]
            _0,
            #[doc = "Interrupt notification of Memory 0 non-correctable error events is enabled."]
            _1,
        }
        impl ENCIE0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ENCIE0R::_0 => false,
                    ENCIE0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ENCIE0R {
                match value {
                    false => ENCIE0R::_0,
                    true => ENCIE0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ENCIE0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ENCIE0R::_1
            }
        }
        #[doc = "Possible values of the field `ESCIE0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ESCIE0R {
            #[doc = "Interrupt notification of Memory 0 single-bit correction events is disabled."]
            _0,
            #[doc = "Interrupt notification of Memory 0 single-bit correction events is enabled."]
            _1,
        }
        impl ESCIE0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ESCIE0R::_0 => false,
                    ESCIE0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ESCIE0R {
                match value {
                    false => ESCIE0R::_0,
                    true => ESCIE0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ESCIE0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ESCIE0R::_1
            }
        }
        #[doc = "Values that can be written to the field `ENCIE1`"]
        pub enum ENCIE1W {
            #[doc = "Interrupt notification of Memory 1 non-correctable error events is disabled."]
            _0,
            #[doc = "Interrupt notification of Memory 1 non-correctable error events is enabled."]
            _1,
        }
        impl ENCIE1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ENCIE1W::_0 => false,
                    ENCIE1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ENCIE1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _ENCIE1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ENCIE1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt notification of Memory 1 non-correctable error events is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ENCIE1W::_0)
            }
            #[doc = "Interrupt notification of Memory 1 non-correctable error events is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ENCIE1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 26;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ESCIE1`"]
        pub enum ESCIE1W {
            #[doc = "Interrupt notification of Memory 1 single-bit correction events is disabled."]
            _0,
            #[doc = "Interrupt notification of Memory 1 single-bit correction events is enabled."]
            _1,
        }
        impl ESCIE1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ESCIE1W::_0 => false,
                    ESCIE1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ESCIE1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _ESCIE1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ESCIE1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt notification of Memory 1 single-bit correction events is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ESCIE1W::_0)
            }
            #[doc = "Interrupt notification of Memory 1 single-bit correction events is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ESCIE1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 27;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ENCIE0`"]
        pub enum ENCIE0W {
            #[doc = "Interrupt notification of Memory 0 non-correctable error events is disabled."]
            _0,
            #[doc = "Interrupt notification of Memory 0 non-correctable error events is enabled."]
            _1,
        }
        impl ENCIE0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ENCIE0W::_0 => false,
                    ENCIE0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ENCIE0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _ENCIE0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ENCIE0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt notification of Memory 0 non-correctable error events is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ENCIE0W::_0)
            }
            #[doc = "Interrupt notification of Memory 0 non-correctable error events is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ENCIE0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ESCIE0`"]
        pub enum ESCIE0W {
            #[doc = "Interrupt notification of Memory 0 single-bit correction events is disabled."]
            _0,
            #[doc = "Interrupt notification of Memory 0 single-bit correction events is enabled."]
            _1,
        }
        impl ESCIE0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ESCIE0W::_0 => false,
                    ESCIE0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ESCIE0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _ESCIE0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ESCIE0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt notification of Memory 0 single-bit correction events is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ESCIE0W::_0)
            }
            #[doc = "Interrupt notification of Memory 0 single-bit correction events is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ESCIE0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 26 - ENCIE1"]
            #[inline(always)]
            pub fn encie1(&self) -> ENCIE1R {
                ENCIE1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 26;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 27 - ESCIE1"]
            #[inline(always)]
            pub fn escie1(&self) -> ESCIE1R {
                ESCIE1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 27;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 30 - ENCIE0"]
            #[inline(always)]
            pub fn encie0(&self) -> ENCIE0R {
                ENCIE0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - ESCIE0"]
            #[inline(always)]
            pub fn escie0(&self) -> ESCIE0R {
                ESCIE0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 26 - ENCIE1"]
            #[inline(always)]
            pub fn encie1(&mut self) -> _ENCIE1W {
                _ENCIE1W { w: self }
            }
            #[doc = "Bit 27 - ESCIE1"]
            #[inline(always)]
            pub fn escie1(&mut self) -> _ESCIE1W {
                _ESCIE1W { w: self }
            }
            #[doc = "Bit 30 - ENCIE0"]
            #[inline(always)]
            pub fn encie0(&mut self) -> _ENCIE0W {
                _ENCIE0W { w: self }
            }
            #[doc = "Bit 31 - ESCIE0"]
            #[inline(always)]
            pub fn escie0(&mut self) -> _ESCIE0W {
                _ESCIE0W { w: self }
            }
        }
    }
    #[doc = "ERM Status Register 0"]
    pub struct SR0 {
        register: VolatileCell<u32>,
    }
    #[doc = "ERM Status Register 0"]
    pub mod sr0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SR0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `NCE1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum NCE1R {
            #[doc = "No non-correctable error event on Memory 1 detected"]
            _0,
            #[doc = "Non-correctable error event on Memory 1 detected"]
            _1,
        }
        impl NCE1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    NCE1R::_0 => false,
                    NCE1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> NCE1R {
                match value {
                    false => NCE1R::_0,
                    true => NCE1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == NCE1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == NCE1R::_1
            }
        }
        #[doc = "Possible values of the field `SBC1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SBC1R {
            #[doc = "No single-bit correction event on Memory 1 detected"]
            _0,
            #[doc = "Single-bit correction event on Memory 1 detected"]
            _1,
        }
        impl SBC1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SBC1R::_0 => false,
                    SBC1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SBC1R {
                match value {
                    false => SBC1R::_0,
                    true => SBC1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SBC1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SBC1R::_1
            }
        }
        #[doc = "Possible values of the field `NCE0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum NCE0R {
            #[doc = "No non-correctable error event on Memory 0 detected"]
            _0,
            #[doc = "Non-correctable error event on Memory 0 detected"]
            _1,
        }
        impl NCE0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    NCE0R::_0 => false,
                    NCE0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> NCE0R {
                match value {
                    false => NCE0R::_0,
                    true => NCE0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == NCE0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == NCE0R::_1
            }
        }
        #[doc = "Possible values of the field `SBC0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SBC0R {
            #[doc = "No single-bit correction event on Memory 0 detected"]
            _0,
            #[doc = "Single-bit correction event on Memory 0 detected"]
            _1,
        }
        impl SBC0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SBC0R::_0 => false,
                    SBC0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SBC0R {
                match value {
                    false => SBC0R::_0,
                    true => SBC0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SBC0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SBC0R::_1
            }
        }
        #[doc = "Values that can be written to the field `NCE1`"]
        pub enum NCE1W {
            #[doc = "No non-correctable error event on Memory 1 detected"]
            _0,
            #[doc = "Non-correctable error event on Memory 1 detected"]
            _1,
        }
        impl NCE1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    NCE1W::_0 => false,
                    NCE1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _NCE1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _NCE1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: NCE1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No non-correctable error event on Memory 1 detected"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(NCE1W::_0)
            }
            #[doc = "Non-correctable error event on Memory 1 detected"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(NCE1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 26;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SBC1`"]
        pub enum SBC1W {
            #[doc = "No single-bit correction event on Memory 1 detected"]
            _0,
            #[doc = "Single-bit correction event on Memory 1 detected"]
            _1,
        }
        impl SBC1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SBC1W::_0 => false,
                    SBC1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SBC1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SBC1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SBC1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No single-bit correction event on Memory 1 detected"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SBC1W::_0)
            }
            #[doc = "Single-bit correction event on Memory 1 detected"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SBC1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 27;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `NCE0`"]
        pub enum NCE0W {
            #[doc = "No non-correctable error event on Memory 0 detected"]
            _0,
            #[doc = "Non-correctable error event on Memory 0 detected"]
            _1,
        }
        impl NCE0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    NCE0W::_0 => false,
                    NCE0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _NCE0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _NCE0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: NCE0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No non-correctable error event on Memory 0 detected"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(NCE0W::_0)
            }
            #[doc = "Non-correctable error event on Memory 0 detected"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(NCE0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SBC0`"]
        pub enum SBC0W {
            #[doc = "No single-bit correction event on Memory 0 detected"]
            _0,
            #[doc = "Single-bit correction event on Memory 0 detected"]
            _1,
        }
        impl SBC0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SBC0W::_0 => false,
                    SBC0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SBC0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SBC0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SBC0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No single-bit correction event on Memory 0 detected"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SBC0W::_0)
            }
            #[doc = "Single-bit correction event on Memory 0 detected"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SBC0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 26 - NCE1"]
            #[inline(always)]
            pub fn nce1(&self) -> NCE1R {
                NCE1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 26;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 27 - SBC1"]
            #[inline(always)]
            pub fn sbc1(&self) -> SBC1R {
                SBC1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 27;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 30 - NCE0"]
            #[inline(always)]
            pub fn nce0(&self) -> NCE0R {
                NCE0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - SBC0"]
            #[inline(always)]
            pub fn sbc0(&self) -> SBC0R {
                SBC0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 26 - NCE1"]
            #[inline(always)]
            pub fn nce1(&mut self) -> _NCE1W {
                _NCE1W { w: self }
            }
            #[doc = "Bit 27 - SBC1"]
            #[inline(always)]
            pub fn sbc1(&mut self) -> _SBC1W {
                _SBC1W { w: self }
            }
            #[doc = "Bit 30 - NCE0"]
            #[inline(always)]
            pub fn nce0(&mut self) -> _NCE0W {
                _NCE0W { w: self }
            }
            #[doc = "Bit 31 - SBC0"]
            #[inline(always)]
            pub fn sbc0(&mut self) -> _SBC0W {
                _SBC0W { w: self }
            }
        }
    }
    #[doc = "ERM Memory n Error Address Register"]
    pub struct EAR0 {
        register: VolatileCell<u32>,
    }
    #[doc = "ERM Memory n Error Address Register"]
    pub mod ear0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::EAR0 {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct EARR {
            bits: u32,
        }
        impl EARR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - EAR"]
            #[inline(always)]
            pub fn ear(&self) -> EARR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                EARR { bits }
            }
        }
    }
    #[doc = "ERM Memory n Error Address Register"]
    pub struct EAR1 {
        register: VolatileCell<u32>,
    }
    #[doc = "ERM Memory n Error Address Register"]
    pub mod ear1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::EAR1 {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct EARR {
            bits: u32,
        }
        impl EARR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - EAR"]
            #[inline(always)]
            pub fn ear(&self) -> EARR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                EARR { bits }
            }
        }
    }
}
#[doc = "ERM"]
pub struct ERM {
    register_block: erm::RegisterBlock,
}
impl Deref for ERM {
    type Target = erm::RegisterBlock;
    fn deref(&self) -> &erm::RegisterBlock {
        &self.register_block
    }
}
#[doc = "Error Injection Module"]
pub const EIM: Peripheral<EIM> = unsafe { Peripheral::new(1073844224) };
#[doc = "Error Injection Module"]
pub mod eim {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - Error Injection Module Configuration Register"]
        pub eimcr: EIMCR,
        #[doc = "0x04 - Error Injection Channel Enable register"]
        pub eichen: EICHEN,
        _reserved0: [u8; 248usize],
        #[doc = "0x100 - Error Injection Channel Descriptor n, Word0"]
        pub eichd0_word0: EICHD0_WORD0,
        #[doc = "0x104 - Error Injection Channel Descriptor n, Word1"]
        pub eichd0_word1: EICHD0_WORD1,
        _reserved1: [u8; 248usize],
        #[doc = "0x200 - Error Injection Channel Descriptor n, Word0"]
        pub eichd1_word0: EICHD1_WORD0,
        #[doc = "0x204 - Error Injection Channel Descriptor n, Word1"]
        pub eichd1_word1: EICHD1_WORD1,
    }
    #[doc = "Error Injection Module Configuration Register"]
    pub struct EIMCR {
        register: VolatileCell<u32>,
    }
    #[doc = "Error Injection Module Configuration Register"]
    pub mod eimcr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EIMCR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `GEIEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum GEIENR {
            #[doc = "Disabled"]
            _0,
            #[doc = "Enabled"]
            _1,
        }
        impl GEIENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    GEIENR::_0 => false,
                    GEIENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> GEIENR {
                match value {
                    false => GEIENR::_0,
                    true => GEIENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == GEIENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == GEIENR::_1
            }
        }
        #[doc = "Values that can be written to the field `GEIEN`"]
        pub enum GEIENW {
            #[doc = "Disabled"]
            _0,
            #[doc = "Enabled"]
            _1,
        }
        impl GEIENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    GEIENW::_0 => false,
                    GEIENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _GEIENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GEIENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: GEIENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(GEIENW::_0)
            }
            #[doc = "Enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(GEIENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Global Error Injection Enable"]
            #[inline(always)]
            pub fn geien(&self) -> GEIENR {
                GEIENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Global Error Injection Enable"]
            #[inline(always)]
            pub fn geien(&mut self) -> _GEIENW {
                _GEIENW { w: self }
            }
        }
    }
    #[doc = "Error Injection Channel Enable register"]
    pub struct EICHEN {
        register: VolatileCell<u32>,
    }
    #[doc = "Error Injection Channel Enable register"]
    pub mod eichen {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EICHEN {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `EICH1EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EICH1ENR {
            #[doc = "Error injection is disabled on Error Injection Channel 1"]
            _0,
            #[doc = "Error injection is enabled on Error Injection Channel 1"]
            _1,
        }
        impl EICH1ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EICH1ENR::_0 => false,
                    EICH1ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EICH1ENR {
                match value {
                    false => EICH1ENR::_0,
                    true => EICH1ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EICH1ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EICH1ENR::_1
            }
        }
        #[doc = "Possible values of the field `EICH0EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EICH0ENR {
            #[doc = "Error injection is disabled on Error Injection Channel 0"]
            _0,
            #[doc = "Error injection is enabled on Error Injection Channel 0"]
            _1,
        }
        impl EICH0ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EICH0ENR::_0 => false,
                    EICH0ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EICH0ENR {
                match value {
                    false => EICH0ENR::_0,
                    true => EICH0ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EICH0ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EICH0ENR::_1
            }
        }
        #[doc = "Values that can be written to the field `EICH1EN`"]
        pub enum EICH1ENW {
            #[doc = "Error injection is disabled on Error Injection Channel 1"]
            _0,
            #[doc = "Error injection is enabled on Error Injection Channel 1"]
            _1,
        }
        impl EICH1ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EICH1ENW::_0 => false,
                    EICH1ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EICH1ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _EICH1ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EICH1ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Error injection is disabled on Error Injection Channel 1"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EICH1ENW::_0)
            }
            #[doc = "Error injection is enabled on Error Injection Channel 1"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EICH1ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `EICH0EN`"]
        pub enum EICH0ENW {
            #[doc = "Error injection is disabled on Error Injection Channel 0"]
            _0,
            #[doc = "Error injection is enabled on Error Injection Channel 0"]
            _1,
        }
        impl EICH0ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EICH0ENW::_0 => false,
                    EICH0ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EICH0ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _EICH0ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EICH0ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Error injection is disabled on Error Injection Channel 0"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EICH0ENW::_0)
            }
            #[doc = "Error injection is enabled on Error Injection Channel 0"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EICH0ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 30 - Error Injection Channel 1 Enable"]
            #[inline(always)]
            pub fn eich1en(&self) -> EICH1ENR {
                EICH1ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Error Injection Channel 0 Enable"]
            #[inline(always)]
            pub fn eich0en(&self) -> EICH0ENR {
                EICH0ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 30 - Error Injection Channel 1 Enable"]
            #[inline(always)]
            pub fn eich1en(&mut self) -> _EICH1ENW {
                _EICH1ENW { w: self }
            }
            #[doc = "Bit 31 - Error Injection Channel 0 Enable"]
            #[inline(always)]
            pub fn eich0en(&mut self) -> _EICH0ENW {
                _EICH0ENW { w: self }
            }
        }
    }
    #[doc = "Error Injection Channel Descriptor n, Word0"]
    pub struct EICHD0_WORD0 {
        register: VolatileCell<u32>,
    }
    #[doc = "Error Injection Channel Descriptor n, Word0"]
    pub mod eichd0_word0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EICHD0_WORD0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CHKBIT_MASKR {
            bits: u8,
        }
        impl CHKBIT_MASKR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHKBIT_MASKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHKBIT_MASKW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 127;
                const OFFSET: u8 = 25;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 25:31 - Checkbit Mask"]
            #[inline(always)]
            pub fn chkbit_mask(&self) -> CHKBIT_MASKR {
                let bits = {
                    const MASK: u8 = 127;
                    const OFFSET: u8 = 25;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CHKBIT_MASKR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 25:31 - Checkbit Mask"]
            #[inline(always)]
            pub fn chkbit_mask(&mut self) -> _CHKBIT_MASKW {
                _CHKBIT_MASKW { w: self }
            }
        }
    }
    #[doc = "Error Injection Channel Descriptor n, Word1"]
    pub struct EICHD0_WORD1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Error Injection Channel Descriptor n, Word1"]
    pub mod eichd0_word1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EICHD0_WORD1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct B0_3DATA_MASKR {
            bits: u32,
        }
        impl B0_3DATA_MASKR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _B0_3DATA_MASKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _B0_3DATA_MASKW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Data Mask Bytes 0-3"]
            #[inline(always)]
            pub fn b0_3data_mask(&self) -> B0_3DATA_MASKR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                B0_3DATA_MASKR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Data Mask Bytes 0-3"]
            #[inline(always)]
            pub fn b0_3data_mask(&mut self) -> _B0_3DATA_MASKW {
                _B0_3DATA_MASKW { w: self }
            }
        }
    }
    #[doc = "Error Injection Channel Descriptor n, Word0"]
    pub struct EICHD1_WORD0 {
        register: VolatileCell<u32>,
    }
    #[doc = "Error Injection Channel Descriptor n, Word0"]
    pub mod eichd1_word0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EICHD1_WORD0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CHKBIT_MASKR {
            bits: u8,
        }
        impl CHKBIT_MASKR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHKBIT_MASKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHKBIT_MASKW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 127;
                const OFFSET: u8 = 25;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 25:31 - Checkbit Mask"]
            #[inline(always)]
            pub fn chkbit_mask(&self) -> CHKBIT_MASKR {
                let bits = {
                    const MASK: u8 = 127;
                    const OFFSET: u8 = 25;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CHKBIT_MASKR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 25:31 - Checkbit Mask"]
            #[inline(always)]
            pub fn chkbit_mask(&mut self) -> _CHKBIT_MASKW {
                _CHKBIT_MASKW { w: self }
            }
        }
    }
    #[doc = "Error Injection Channel Descriptor n, Word1"]
    pub struct EICHD1_WORD1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Error Injection Channel Descriptor n, Word1"]
    pub mod eichd1_word1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EICHD1_WORD1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct B0_3DATA_MASKR {
            bits: u32,
        }
        impl B0_3DATA_MASKR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _B0_3DATA_MASKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _B0_3DATA_MASKW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Data Mask Bytes 0-3"]
            #[inline(always)]
            pub fn b0_3data_mask(&self) -> B0_3DATA_MASKR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                B0_3DATA_MASKR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Data Mask Bytes 0-3"]
            #[inline(always)]
            pub fn b0_3data_mask(&mut self) -> _B0_3DATA_MASKW {
                _B0_3DATA_MASKW { w: self }
            }
        }
    }
}
#[doc = "Error Injection Module"]
pub struct EIM {
    register_block: eim::RegisterBlock,
}
impl Deref for EIM {
    type Target = eim::RegisterBlock;
    fn deref(&self) -> &eim::RegisterBlock {
        &self.register_block
    }
}
#[doc = "FTFC"]
pub const FTFC: Peripheral<FTFC> = unsafe { Peripheral::new(1073872896) };
#[doc = "FTFC"]
pub mod ftfc {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - Flash Status Register"]
        pub fstat: FSTAT,
        #[doc = "0x01 - Flash Configuration Register"]
        pub fcnfg: FCNFG,
        #[doc = "0x02 - Flash Security Register"]
        pub fsec: FSEC,
        #[doc = "0x03 - Flash Option Register"]
        pub fopt: FOPT,
        #[doc = "0x04 - Flash Common Command Object Registers"]
        pub fccob3: FCCOB3,
        #[doc = "0x05 - Flash Common Command Object Registers"]
        pub fccob2: FCCOB2,
        #[doc = "0x06 - Flash Common Command Object Registers"]
        pub fccob1: FCCOB1,
        #[doc = "0x07 - Flash Common Command Object Registers"]
        pub fccob0: FCCOB0,
        #[doc = "0x08 - Flash Common Command Object Registers"]
        pub fccob7: FCCOB7,
        #[doc = "0x09 - Flash Common Command Object Registers"]
        pub fccob6: FCCOB6,
        #[doc = "0x0a - Flash Common Command Object Registers"]
        pub fccob5: FCCOB5,
        #[doc = "0x0b - Flash Common Command Object Registers"]
        pub fccob4: FCCOB4,
        #[doc = "0x0c - Flash Common Command Object Registers"]
        pub fccobb: FCCOBB,
        #[doc = "0x0d - Flash Common Command Object Registers"]
        pub fccoba: FCCOBA,
        #[doc = "0x0e - Flash Common Command Object Registers"]
        pub fccob9: FCCOB9,
        #[doc = "0x0f - Flash Common Command Object Registers"]
        pub fccob8: FCCOB8,
        #[doc = "0x10 - Program Flash Protection Registers"]
        pub fprot3: FPROT3,
        #[doc = "0x11 - Program Flash Protection Registers"]
        pub fprot2: FPROT2,
        #[doc = "0x12 - Program Flash Protection Registers"]
        pub fprot1: FPROT1,
        #[doc = "0x13 - Program Flash Protection Registers"]
        pub fprot0: FPROT0,
        _reserved0: [u8; 2usize],
        #[doc = "0x16 - EEPROM Protection Register"]
        pub feprot: FEPROT,
        #[doc = "0x17 - Data Flash Protection Register"]
        pub fdprot: FDPROT,
        _reserved1: [u8; 20usize],
        #[doc = "0x2c - Flash CSEc Status Register"]
        pub fcsestat: FCSESTAT,
        _reserved2: [u8; 1usize],
        #[doc = "0x2e - Flash Error Status Register"]
        pub ferstat: FERSTAT,
        #[doc = "0x2f - Flash Error Configuration Register"]
        pub fercnfg: FERCNFG,
    }
    #[doc = "Flash Status Register"]
    pub struct FSTAT {
        register: VolatileCell<u8>,
    }
    #[doc = "Flash Status Register"]
    pub mod fstat {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::FSTAT {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MGSTAT0R {
            bits: bool,
        }
        impl MGSTAT0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `FPVIOL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FPVIOLR {
            #[doc = "No protection violation detected"]
            _0,
            #[doc = "Protection violation detected"]
            _1,
        }
        impl FPVIOLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FPVIOLR::_0 => false,
                    FPVIOLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FPVIOLR {
                match value {
                    false => FPVIOLR::_0,
                    true => FPVIOLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FPVIOLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FPVIOLR::_1
            }
        }
        #[doc = "Possible values of the field `ACCERR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ACCERRR {
            #[doc = "No access error detected"]
            _0,
            #[doc = "Access error detected"]
            _1,
        }
        impl ACCERRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ACCERRR::_0 => false,
                    ACCERRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ACCERRR {
                match value {
                    false => ACCERRR::_0,
                    true => ACCERRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ACCERRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ACCERRR::_1
            }
        }
        #[doc = "Possible values of the field `RDCOLERR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RDCOLERRR {
            #[doc = "No collision error detected"]
            _0,
            #[doc = "Collision error detected"]
            _1,
        }
        impl RDCOLERRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RDCOLERRR::_0 => false,
                    RDCOLERRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RDCOLERRR {
                match value {
                    false => RDCOLERRR::_0,
                    true => RDCOLERRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RDCOLERRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RDCOLERRR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct CCIFR {
            bits: bool,
        }
        impl CCIFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Values that can be written to the field `FPVIOL`"]
        pub enum FPVIOLW {
            #[doc = "No protection violation detected"]
            _0,
            #[doc = "Protection violation detected"]
            _1,
        }
        impl FPVIOLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FPVIOLW::_0 => false,
                    FPVIOLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FPVIOLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FPVIOLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FPVIOLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No protection violation detected"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FPVIOLW::_0)
            }
            #[doc = "Protection violation detected"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FPVIOLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ACCERR`"]
        pub enum ACCERRW {
            #[doc = "No access error detected"]
            _0,
            #[doc = "Access error detected"]
            _1,
        }
        impl ACCERRW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ACCERRW::_0 => false,
                    ACCERRW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ACCERRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ACCERRW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ACCERRW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No access error detected"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ACCERRW::_0)
            }
            #[doc = "Access error detected"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ACCERRW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RDCOLERR`"]
        pub enum RDCOLERRW {
            #[doc = "No collision error detected"]
            _0,
            #[doc = "Collision error detected"]
            _1,
        }
        impl RDCOLERRW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RDCOLERRW::_0 => false,
                    RDCOLERRW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RDCOLERRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RDCOLERRW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RDCOLERRW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No collision error detected"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RDCOLERRW::_0)
            }
            #[doc = "Collision error detected"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RDCOLERRW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CCIFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CCIFW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bit 0 - Memory Controller Command Completion Status Flag"]
            #[inline(always)]
            pub fn mgstat0(&self) -> MGSTAT0R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                };
                MGSTAT0R { bits }
            }
            #[doc = "Bit 4 - Flash Protection Violation Flag"]
            #[inline(always)]
            pub fn fpviol(&self) -> FPVIOLR {
                FPVIOLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 5 - Flash Access Error Flag"]
            #[inline(always)]
            pub fn accerr(&self) -> ACCERRR {
                ACCERRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 6 - FTFC Read Collision Error Flag"]
            #[inline(always)]
            pub fn rdcolerr(&self) -> RDCOLERRR {
                RDCOLERRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 7 - Command Complete Interrupt Flag"]
            #[inline(always)]
            pub fn ccif(&self) -> CCIFR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                };
                CCIFR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 128 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 4 - Flash Protection Violation Flag"]
            #[inline(always)]
            pub fn fpviol(&mut self) -> _FPVIOLW {
                _FPVIOLW { w: self }
            }
            #[doc = "Bit 5 - Flash Access Error Flag"]
            #[inline(always)]
            pub fn accerr(&mut self) -> _ACCERRW {
                _ACCERRW { w: self }
            }
            #[doc = "Bit 6 - FTFC Read Collision Error Flag"]
            #[inline(always)]
            pub fn rdcolerr(&mut self) -> _RDCOLERRW {
                _RDCOLERRW { w: self }
            }
            #[doc = "Bit 7 - Command Complete Interrupt Flag"]
            #[inline(always)]
            pub fn ccif(&mut self) -> _CCIFW {
                _CCIFW { w: self }
            }
        }
    }
    #[doc = "Flash Configuration Register"]
    pub struct FCNFG {
        register: VolatileCell<u8>,
    }
    #[doc = "Flash Configuration Register"]
    pub mod fcnfg {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::FCNFG {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct EEERDYR {
            bits: bool,
        }
        impl EEERDYR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct RAMRDYR {
            bits: bool,
        }
        impl RAMRDYR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `ERSSUSP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERSSUSPR {
            #[doc = "No suspend requested"]
            _0,
            #[doc = "Suspend the current Erase Flash Sector command execution"]
            _1,
        }
        impl ERSSUSPR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERSSUSPR::_0 => false,
                    ERSSUSPR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERSSUSPR {
                match value {
                    false => ERSSUSPR::_0,
                    true => ERSSUSPR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERSSUSPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERSSUSPR::_1
            }
        }
        #[doc = "Possible values of the field `ERSAREQ`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERSAREQR {
            #[doc = "No request or request complete"]
            _0,
            #[doc = r" Reserved"]
            _Reserved(bool),
        }
        impl ERSAREQR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERSAREQR::_0 => false,
                    ERSAREQR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERSAREQR {
                match value {
                    false => ERSAREQR::_0,
                    i => ERSAREQR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERSAREQR::_0
            }
        }
        #[doc = "Possible values of the field `RDCOLLIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RDCOLLIER {
            #[doc = "Read collision error interrupt disabled"]
            _0,
            #[doc = "Read collision error interrupt enabled. An interrupt request is generated whenever an FTFC read collision error is detected (see the description of FSTAT[RDCOLERR])."]
            _1,
        }
        impl RDCOLLIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RDCOLLIER::_0 => false,
                    RDCOLLIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RDCOLLIER {
                match value {
                    false => RDCOLLIER::_0,
                    true => RDCOLLIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RDCOLLIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RDCOLLIER::_1
            }
        }
        #[doc = "Possible values of the field `CCIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CCIER {
            #[doc = "Command complete interrupt disabled"]
            _0,
            #[doc = "Command complete interrupt enabled. An interrupt request is generated whenever the FSTAT[CCIF] flag is set."]
            _1,
        }
        impl CCIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CCIER::_0 => false,
                    CCIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CCIER {
                match value {
                    false => CCIER::_0,
                    true => CCIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CCIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CCIER::_1
            }
        }
        #[doc = "Values that can be written to the field `ERSSUSP`"]
        pub enum ERSSUSPW {
            #[doc = "No suspend requested"]
            _0,
            #[doc = "Suspend the current Erase Flash Sector command execution"]
            _1,
        }
        impl ERSSUSPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERSSUSPW::_0 => false,
                    ERSSUSPW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERSSUSPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERSSUSPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERSSUSPW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No suspend requested"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERSSUSPW::_0)
            }
            #[doc = "Suspend the current Erase Flash Sector command execution"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERSSUSPW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RDCOLLIE`"]
        pub enum RDCOLLIEW {
            #[doc = "Read collision error interrupt disabled"]
            _0,
            #[doc = "Read collision error interrupt enabled. An interrupt request is generated whenever an FTFC read collision error is detected (see the description of FSTAT[RDCOLERR])."]
            _1,
        }
        impl RDCOLLIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RDCOLLIEW::_0 => false,
                    RDCOLLIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RDCOLLIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RDCOLLIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RDCOLLIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Read collision error interrupt disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RDCOLLIEW::_0)
            }
            #[doc = "Read collision error interrupt enabled. An interrupt request is generated whenever an FTFC read collision error is detected (see the description of FSTAT[RDCOLERR])."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RDCOLLIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CCIE`"]
        pub enum CCIEW {
            #[doc = "Command complete interrupt disabled"]
            _0,
            #[doc = "Command complete interrupt enabled. An interrupt request is generated whenever the FSTAT[CCIF] flag is set."]
            _1,
        }
        impl CCIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CCIEW::_0 => false,
                    CCIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CCIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CCIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CCIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Command complete interrupt disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CCIEW::_0)
            }
            #[doc = "Command complete interrupt enabled. An interrupt request is generated whenever the FSTAT[CCIF] flag is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CCIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bit 0 - EEERDY"]
            #[inline(always)]
            pub fn eeerdy(&self) -> EEERDYR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                };
                EEERDYR { bits }
            }
            #[doc = "Bit 1 - RAM Ready"]
            #[inline(always)]
            pub fn ramrdy(&self) -> RAMRDYR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                };
                RAMRDYR { bits }
            }
            #[doc = "Bit 4 - Erase Suspend"]
            #[inline(always)]
            pub fn erssusp(&self) -> ERSSUSPR {
                ERSSUSPR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 5 - Erase All Request"]
            #[inline(always)]
            pub fn ersareq(&self) -> ERSAREQR {
                ERSAREQR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 6 - Read Collision Error Interrupt Enable"]
            #[inline(always)]
            pub fn rdcollie(&self) -> RDCOLLIER {
                RDCOLLIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 7 - Command Complete Interrupt Enable"]
            #[inline(always)]
            pub fn ccie(&self) -> CCIER {
                CCIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 2 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 4 - Erase Suspend"]
            #[inline(always)]
            pub fn erssusp(&mut self) -> _ERSSUSPW {
                _ERSSUSPW { w: self }
            }
            #[doc = "Bit 6 - Read Collision Error Interrupt Enable"]
            #[inline(always)]
            pub fn rdcollie(&mut self) -> _RDCOLLIEW {
                _RDCOLLIEW { w: self }
            }
            #[doc = "Bit 7 - Command Complete Interrupt Enable"]
            #[inline(always)]
            pub fn ccie(&mut self) -> _CCIEW {
                _CCIEW { w: self }
            }
        }
    }
    #[doc = "Flash Security Register"]
    pub struct FSEC {
        register: VolatileCell<u8>,
    }
    #[doc = "Flash Security Register"]
    pub mod fsec {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        impl super::FSEC {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = "Possible values of the field `SEC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SECR {
            #[doc = "MCU security status is unsecure (The standard shipping condition of the FTFC is unsecure.)"]
            _10,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl SECR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SECR::_10 => 2,
                    SECR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SECR {
                match value {
                    2 => SECR::_10,
                    i => SECR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == SECR::_10
            }
        }
        #[doc = "Possible values of the field `FSLACC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FSLACCR {
            #[doc = "Factory access granted"]
            _00,
            #[doc = "Factory access granted"]
            _11,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl FSLACCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    FSLACCR::_00 => 0,
                    FSLACCR::_11 => 3,
                    FSLACCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> FSLACCR {
                match value {
                    0 => FSLACCR::_00,
                    3 => FSLACCR::_11,
                    i => FSLACCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == FSLACCR::_00
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == FSLACCR::_11
            }
        }
        #[doc = "Possible values of the field `MEEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MEENR {
            #[doc = "Mass erase is enabled"]
            _00,
            #[doc = "Mass erase is enabled"]
            _01,
            #[doc = "Mass erase is enabled"]
            _11,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl MEENR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MEENR::_00 => 0,
                    MEENR::_01 => 1,
                    MEENR::_11 => 3,
                    MEENR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MEENR {
                match value {
                    0 => MEENR::_00,
                    1 => MEENR::_01,
                    3 => MEENR::_11,
                    i => MEENR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == MEENR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == MEENR::_01
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == MEENR::_11
            }
        }
        #[doc = "Possible values of the field `KEYEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum KEYENR {
            #[doc = "Backdoor key access disabled"]
            _00,
            #[doc = "Backdoor key access disabled (preferred KEYEN state to disable backdoor key access)"]
            _01,
            #[doc = "Backdoor key access enabled"]
            _10,
            #[doc = "Backdoor key access disabled"]
            _11,
        }
        impl KEYENR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    KEYENR::_00 => 0,
                    KEYENR::_01 => 1,
                    KEYENR::_10 => 2,
                    KEYENR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> KEYENR {
                match value {
                    0 => KEYENR::_00,
                    1 => KEYENR::_01,
                    2 => KEYENR::_10,
                    3 => KEYENR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == KEYENR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == KEYENR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == KEYENR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == KEYENR::_11
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:1 - Flash Security"]
            #[inline(always)]
            pub fn sec(&self) -> SECR {
                SECR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                })
            }
            #[doc = "Bits 2:3 - Factory Failure Analysis Access Code"]
            #[inline(always)]
            pub fn fslacc(&self) -> FSLACCR {
                FSLACCR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                })
            }
            #[doc = "Bits 4:5 - Mass Erase Enable Bits"]
            #[inline(always)]
            pub fn meen(&self) -> MEENR {
                MEENR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                })
            }
            #[doc = "Bits 6:7 - Backdoor Key Security Enable"]
            #[inline(always)]
            pub fn keyen(&self) -> KEYENR {
                KEYENR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                })
            }
        }
    }
    #[doc = "Flash Option Register"]
    pub struct FOPT {
        register: VolatileCell<u8>,
    }
    #[doc = "Flash Option Register"]
    pub mod fopt {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        impl super::FOPT {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct OPTR {
            bits: u8,
        }
        impl OPTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - Nonvolatile Option"]
            #[inline(always)]
            pub fn opt(&self) -> OPTR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                OPTR { bits }
            }
        }
    }
    #[doc = "Flash Common Command Object Registers"]
    pub struct FCCOB3 {
        register: VolatileCell<u8>,
    }
    #[doc = "Flash Common Command Object Registers"]
    pub mod fccob3 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::FCCOB3 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CCOBNR {
            bits: u8,
        }
        impl CCOBNR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CCOBNW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CCOBNW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CCOBn"]
            #[inline(always)]
            pub fn ccobn(&self) -> CCOBNR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                CCOBNR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CCOBn"]
            #[inline(always)]
            pub fn ccobn(&mut self) -> _CCOBNW {
                _CCOBNW { w: self }
            }
        }
    }
    #[doc = "Flash Common Command Object Registers"]
    pub struct FCCOB2 {
        register: VolatileCell<u8>,
    }
    #[doc = "Flash Common Command Object Registers"]
    pub mod fccob2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::FCCOB2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CCOBNR {
            bits: u8,
        }
        impl CCOBNR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CCOBNW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CCOBNW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CCOBn"]
            #[inline(always)]
            pub fn ccobn(&self) -> CCOBNR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                CCOBNR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CCOBn"]
            #[inline(always)]
            pub fn ccobn(&mut self) -> _CCOBNW {
                _CCOBNW { w: self }
            }
        }
    }
    #[doc = "Flash Common Command Object Registers"]
    pub struct FCCOB1 {
        register: VolatileCell<u8>,
    }
    #[doc = "Flash Common Command Object Registers"]
    pub mod fccob1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::FCCOB1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CCOBNR {
            bits: u8,
        }
        impl CCOBNR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CCOBNW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CCOBNW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CCOBn"]
            #[inline(always)]
            pub fn ccobn(&self) -> CCOBNR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                CCOBNR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CCOBn"]
            #[inline(always)]
            pub fn ccobn(&mut self) -> _CCOBNW {
                _CCOBNW { w: self }
            }
        }
    }
    #[doc = "Flash Common Command Object Registers"]
    pub struct FCCOB0 {
        register: VolatileCell<u8>,
    }
    #[doc = "Flash Common Command Object Registers"]
    pub mod fccob0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::FCCOB0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CCOBNR {
            bits: u8,
        }
        impl CCOBNR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CCOBNW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CCOBNW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CCOBn"]
            #[inline(always)]
            pub fn ccobn(&self) -> CCOBNR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                CCOBNR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CCOBn"]
            #[inline(always)]
            pub fn ccobn(&mut self) -> _CCOBNW {
                _CCOBNW { w: self }
            }
        }
    }
    #[doc = "Flash Common Command Object Registers"]
    pub struct FCCOB7 {
        register: VolatileCell<u8>,
    }
    #[doc = "Flash Common Command Object Registers"]
    pub mod fccob7 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::FCCOB7 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CCOBNR {
            bits: u8,
        }
        impl CCOBNR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CCOBNW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CCOBNW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CCOBn"]
            #[inline(always)]
            pub fn ccobn(&self) -> CCOBNR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                CCOBNR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CCOBn"]
            #[inline(always)]
            pub fn ccobn(&mut self) -> _CCOBNW {
                _CCOBNW { w: self }
            }
        }
    }
    #[doc = "Flash Common Command Object Registers"]
    pub struct FCCOB6 {
        register: VolatileCell<u8>,
    }
    #[doc = "Flash Common Command Object Registers"]
    pub mod fccob6 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::FCCOB6 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CCOBNR {
            bits: u8,
        }
        impl CCOBNR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CCOBNW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CCOBNW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CCOBn"]
            #[inline(always)]
            pub fn ccobn(&self) -> CCOBNR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                CCOBNR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CCOBn"]
            #[inline(always)]
            pub fn ccobn(&mut self) -> _CCOBNW {
                _CCOBNW { w: self }
            }
        }
    }
    #[doc = "Flash Common Command Object Registers"]
    pub struct FCCOB5 {
        register: VolatileCell<u8>,
    }
    #[doc = "Flash Common Command Object Registers"]
    pub mod fccob5 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::FCCOB5 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CCOBNR {
            bits: u8,
        }
        impl CCOBNR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CCOBNW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CCOBNW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CCOBn"]
            #[inline(always)]
            pub fn ccobn(&self) -> CCOBNR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                CCOBNR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CCOBn"]
            #[inline(always)]
            pub fn ccobn(&mut self) -> _CCOBNW {
                _CCOBNW { w: self }
            }
        }
    }
    #[doc = "Flash Common Command Object Registers"]
    pub struct FCCOB4 {
        register: VolatileCell<u8>,
    }
    #[doc = "Flash Common Command Object Registers"]
    pub mod fccob4 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::FCCOB4 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CCOBNR {
            bits: u8,
        }
        impl CCOBNR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CCOBNW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CCOBNW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CCOBn"]
            #[inline(always)]
            pub fn ccobn(&self) -> CCOBNR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                CCOBNR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CCOBn"]
            #[inline(always)]
            pub fn ccobn(&mut self) -> _CCOBNW {
                _CCOBNW { w: self }
            }
        }
    }
    #[doc = "Flash Common Command Object Registers"]
    pub struct FCCOBB {
        register: VolatileCell<u8>,
    }
    #[doc = "Flash Common Command Object Registers"]
    pub mod fccobb {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::FCCOBB {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CCOBNR {
            bits: u8,
        }
        impl CCOBNR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CCOBNW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CCOBNW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CCOBn"]
            #[inline(always)]
            pub fn ccobn(&self) -> CCOBNR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                CCOBNR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CCOBn"]
            #[inline(always)]
            pub fn ccobn(&mut self) -> _CCOBNW {
                _CCOBNW { w: self }
            }
        }
    }
    #[doc = "Flash Common Command Object Registers"]
    pub struct FCCOBA {
        register: VolatileCell<u8>,
    }
    #[doc = "Flash Common Command Object Registers"]
    pub mod fccoba {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::FCCOBA {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CCOBNR {
            bits: u8,
        }
        impl CCOBNR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CCOBNW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CCOBNW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CCOBn"]
            #[inline(always)]
            pub fn ccobn(&self) -> CCOBNR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                CCOBNR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CCOBn"]
            #[inline(always)]
            pub fn ccobn(&mut self) -> _CCOBNW {
                _CCOBNW { w: self }
            }
        }
    }
    #[doc = "Flash Common Command Object Registers"]
    pub struct FCCOB9 {
        register: VolatileCell<u8>,
    }
    #[doc = "Flash Common Command Object Registers"]
    pub mod fccob9 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::FCCOB9 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CCOBNR {
            bits: u8,
        }
        impl CCOBNR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CCOBNW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CCOBNW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CCOBn"]
            #[inline(always)]
            pub fn ccobn(&self) -> CCOBNR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                CCOBNR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CCOBn"]
            #[inline(always)]
            pub fn ccobn(&mut self) -> _CCOBNW {
                _CCOBNW { w: self }
            }
        }
    }
    #[doc = "Flash Common Command Object Registers"]
    pub struct FCCOB8 {
        register: VolatileCell<u8>,
    }
    #[doc = "Flash Common Command Object Registers"]
    pub mod fccob8 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::FCCOB8 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CCOBNR {
            bits: u8,
        }
        impl CCOBNR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CCOBNW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CCOBNW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CCOBn"]
            #[inline(always)]
            pub fn ccobn(&self) -> CCOBNR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                CCOBNR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CCOBn"]
            #[inline(always)]
            pub fn ccobn(&mut self) -> _CCOBNW {
                _CCOBNW { w: self }
            }
        }
    }
    #[doc = "Program Flash Protection Registers"]
    pub struct FPROT3 {
        register: VolatileCell<u8>,
    }
    #[doc = "Program Flash Protection Registers"]
    pub mod fprot3 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::FPROT3 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct PROTR {
            bits: u8,
        }
        impl PROTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _PROTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PROTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - Program Flash Region Protect"]
            #[inline(always)]
            pub fn prot(&self) -> PROTR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                PROTR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Program Flash Region Protect"]
            #[inline(always)]
            pub fn prot(&mut self) -> _PROTW {
                _PROTW { w: self }
            }
        }
    }
    #[doc = "Program Flash Protection Registers"]
    pub struct FPROT2 {
        register: VolatileCell<u8>,
    }
    #[doc = "Program Flash Protection Registers"]
    pub mod fprot2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::FPROT2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct PROTR {
            bits: u8,
        }
        impl PROTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _PROTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PROTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - Program Flash Region Protect"]
            #[inline(always)]
            pub fn prot(&self) -> PROTR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                PROTR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Program Flash Region Protect"]
            #[inline(always)]
            pub fn prot(&mut self) -> _PROTW {
                _PROTW { w: self }
            }
        }
    }
    #[doc = "Program Flash Protection Registers"]
    pub struct FPROT1 {
        register: VolatileCell<u8>,
    }
    #[doc = "Program Flash Protection Registers"]
    pub mod fprot1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::FPROT1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct PROTR {
            bits: u8,
        }
        impl PROTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _PROTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PROTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - Program Flash Region Protect"]
            #[inline(always)]
            pub fn prot(&self) -> PROTR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                PROTR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Program Flash Region Protect"]
            #[inline(always)]
            pub fn prot(&mut self) -> _PROTW {
                _PROTW { w: self }
            }
        }
    }
    #[doc = "Program Flash Protection Registers"]
    pub struct FPROT0 {
        register: VolatileCell<u8>,
    }
    #[doc = "Program Flash Protection Registers"]
    pub mod fprot0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::FPROT0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct PROTR {
            bits: u8,
        }
        impl PROTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _PROTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PROTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - Program Flash Region Protect"]
            #[inline(always)]
            pub fn prot(&self) -> PROTR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                PROTR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Program Flash Region Protect"]
            #[inline(always)]
            pub fn prot(&mut self) -> _PROTW {
                _PROTW { w: self }
            }
        }
    }
    #[doc = "EEPROM Protection Register"]
    pub struct FEPROT {
        register: VolatileCell<u8>,
    }
    #[doc = "EEPROM Protection Register"]
    pub mod feprot {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::FEPROT {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct EPROTR {
            bits: u8,
        }
        impl EPROTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _EPROTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _EPROTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - EEPROM Region Protect"]
            #[inline(always)]
            pub fn eprot(&self) -> EPROTR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                EPROTR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - EEPROM Region Protect"]
            #[inline(always)]
            pub fn eprot(&mut self) -> _EPROTW {
                _EPROTW { w: self }
            }
        }
    }
    #[doc = "Data Flash Protection Register"]
    pub struct FDPROT {
        register: VolatileCell<u8>,
    }
    #[doc = "Data Flash Protection Register"]
    pub mod fdprot {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::FDPROT {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DPROT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DPROTR {
            #[doc = "Data Flash region is protected"]
            _00000000,
            #[doc = "Data Flash region is not protected"]
            _00000001,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl DPROTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    DPROTR::_00000000 => 0,
                    DPROTR::_00000001 => 1,
                    DPROTR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> DPROTR {
                match value {
                    0 => DPROTR::_00000000,
                    1 => DPROTR::_00000001,
                    i => DPROTR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_00000000`"]
            #[inline(always)]
            pub fn is_00000000(&self) -> bool {
                *self == DPROTR::_00000000
            }
            #[doc = "Checks if the value of the field is `_00000001`"]
            #[inline(always)]
            pub fn is_00000001(&self) -> bool {
                *self == DPROTR::_00000001
            }
        }
        #[doc = "Values that can be written to the field `DPROT`"]
        pub enum DPROTW {
            #[doc = "Data Flash region is protected"]
            _00000000,
            #[doc = "Data Flash region is not protected"]
            _00000001,
        }
        impl DPROTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    DPROTW::_00000000 => 0,
                    DPROTW::_00000001 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DPROTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DPROTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DPROTW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Data Flash region is protected"]
            #[inline(always)]
            pub fn _00000000(self) -> &'a mut W {
                self.variant(DPROTW::_00000000)
            }
            #[doc = "Data Flash region is not protected"]
            #[inline(always)]
            pub fn _00000001(self) -> &'a mut W {
                self.variant(DPROTW::_00000001)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - Data Flash Region Protect"]
            #[inline(always)]
            pub fn dprot(&self) -> DPROTR {
                DPROTR::_from({
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Data Flash Region Protect"]
            #[inline(always)]
            pub fn dprot(&mut self) -> _DPROTW {
                _DPROTW { w: self }
            }
        }
    }
    #[doc = "Flash CSEc Status Register"]
    pub struct FCSESTAT {
        register: VolatileCell<u8>,
    }
    #[doc = "Flash CSEc Status Register"]
    pub mod fcsestat {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        impl super::FCSESTAT {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct BSYR {
            bits: bool,
        }
        impl BSYR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct SBR {
            bits: bool,
        }
        impl SBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct BINR {
            bits: bool,
        }
        impl BINR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct BFNR {
            bits: bool,
        }
        impl BFNR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct BOKR {
            bits: bool,
        }
        impl BOKR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct RINR {
            bits: bool,
        }
        impl RINR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct EDBR {
            bits: bool,
        }
        impl EDBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct IDBR {
            bits: bool,
        }
        impl IDBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bit 0 - Busy"]
            #[inline(always)]
            pub fn bsy(&self) -> BSYR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                };
                BSYR { bits }
            }
            #[doc = "Bit 1 - Secure Boot"]
            #[inline(always)]
            pub fn sb(&self) -> SBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                };
                SBR { bits }
            }
            #[doc = "Bit 2 - Secure Boot Initialization"]
            #[inline(always)]
            pub fn bin(&self) -> BINR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                };
                BINR { bits }
            }
            #[doc = "Bit 3 - Secure Boot Finished"]
            #[inline(always)]
            pub fn bfn(&self) -> BFNR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                };
                BFNR { bits }
            }
            #[doc = "Bit 4 - Secure Boot OK"]
            #[inline(always)]
            pub fn bok(&self) -> BOKR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                };
                BOKR { bits }
            }
            #[doc = "Bit 5 - Random Number Generator Initialized"]
            #[inline(always)]
            pub fn rin(&self) -> RINR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                };
                RINR { bits }
            }
            #[doc = "Bit 6 - External Debug"]
            #[inline(always)]
            pub fn edb(&self) -> EDBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                };
                EDBR { bits }
            }
            #[doc = "Bit 7 - Internal Debug"]
            #[inline(always)]
            pub fn idb(&self) -> IDBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                };
                IDBR { bits }
            }
        }
    }
    #[doc = "Flash Error Status Register"]
    pub struct FERSTAT {
        register: VolatileCell<u8>,
    }
    #[doc = "Flash Error Status Register"]
    pub mod ferstat {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::FERSTAT {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DFDIF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DFDIFR {
            #[doc = "Double bit fault not detected during a valid flash read access from the platform flash controller"]
            _0,
            #[doc = "Double bit fault detected (or FERCNFG[FDFD] is set) during a valid flash read access from the platform flash controller"]
            _1,
        }
        impl DFDIFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DFDIFR::_0 => false,
                    DFDIFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DFDIFR {
                match value {
                    false => DFDIFR::_0,
                    true => DFDIFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DFDIFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DFDIFR::_1
            }
        }
        #[doc = "Values that can be written to the field `DFDIF`"]
        pub enum DFDIFW {
            #[doc = "Double bit fault not detected during a valid flash read access from the platform flash controller"]
            _0,
            #[doc = "Double bit fault detected (or FERCNFG[FDFD] is set) during a valid flash read access from the platform flash controller"]
            _1,
        }
        impl DFDIFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DFDIFW::_0 => false,
                    DFDIFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DFDIFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DFDIFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DFDIFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Double bit fault not detected during a valid flash read access from the platform flash controller"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DFDIFW::_0)
            }
            #[doc = "Double bit fault detected (or FERCNFG[FDFD] is set) during a valid flash read access from the platform flash controller"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DFDIFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bit 1 - Double Bit Fault Detect Interrupt Flag"]
            #[inline(always)]
            pub fn dfdif(&self) -> DFDIFR {
                DFDIFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 1 - Double Bit Fault Detect Interrupt Flag"]
            #[inline(always)]
            pub fn dfdif(&mut self) -> _DFDIFW {
                _DFDIFW { w: self }
            }
        }
    }
    #[doc = "Flash Error Configuration Register"]
    pub struct FERCNFG {
        register: VolatileCell<u8>,
    }
    #[doc = "Flash Error Configuration Register"]
    pub mod fercnfg {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::FERCNFG {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DFDIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DFDIER {
            #[doc = "Double bit fault detect interrupt disabled"]
            _0,
            #[doc = "Double bit fault detect interrupt enabled. An interrupt request is generated whenever the FERSTAT[DFDIF] flag is set."]
            _1,
        }
        impl DFDIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DFDIER::_0 => false,
                    DFDIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DFDIER {
                match value {
                    false => DFDIER::_0,
                    true => DFDIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DFDIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DFDIER::_1
            }
        }
        #[doc = "Possible values of the field `FDFD`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FDFDR {
            #[doc = "FERSTAT[DFDIF] sets only if a double bit fault is detected during read access from the platform flash controller"]
            _0,
            #[doc = "FERSTAT[DFDIF] sets during any valid flash read access from the platform flash controller. An interrupt request is generated if the DFDIE bit is set."]
            _1,
        }
        impl FDFDR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FDFDR::_0 => false,
                    FDFDR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FDFDR {
                match value {
                    false => FDFDR::_0,
                    true => FDFDR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FDFDR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FDFDR::_1
            }
        }
        #[doc = "Values that can be written to the field `DFDIE`"]
        pub enum DFDIEW {
            #[doc = "Double bit fault detect interrupt disabled"]
            _0,
            #[doc = "Double bit fault detect interrupt enabled. An interrupt request is generated whenever the FERSTAT[DFDIF] flag is set."]
            _1,
        }
        impl DFDIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DFDIEW::_0 => false,
                    DFDIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DFDIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DFDIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DFDIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Double bit fault detect interrupt disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DFDIEW::_0)
            }
            #[doc = "Double bit fault detect interrupt enabled. An interrupt request is generated whenever the FERSTAT[DFDIF] flag is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DFDIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FDFD`"]
        pub enum FDFDW {
            #[doc = "FERSTAT[DFDIF] sets only if a double bit fault is detected during read access from the platform flash controller"]
            _0,
            #[doc = "FERSTAT[DFDIF] sets during any valid flash read access from the platform flash controller. An interrupt request is generated if the DFDIE bit is set."]
            _1,
        }
        impl FDFDW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FDFDW::_0 => false,
                    FDFDW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FDFDW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FDFDW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FDFDW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FERSTAT[DFDIF] sets only if a double bit fault is detected during read access from the platform flash controller"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FDFDW::_0)
            }
            #[doc = "FERSTAT[DFDIF] sets during any valid flash read access from the platform flash controller. An interrupt request is generated if the DFDIE bit is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FDFDW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bit 1 - Double Bit Fault Detect Interrupt Enable"]
            #[inline(always)]
            pub fn dfdie(&self) -> DFDIER {
                DFDIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 5 - Force Double Bit Fault Detect"]
            #[inline(always)]
            pub fn fdfd(&self) -> FDFDR {
                FDFDR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 1 - Double Bit Fault Detect Interrupt Enable"]
            #[inline(always)]
            pub fn dfdie(&mut self) -> _DFDIEW {
                _DFDIEW { w: self }
            }
            #[doc = "Bit 5 - Force Double Bit Fault Detect"]
            #[inline(always)]
            pub fn fdfd(&mut self) -> _FDFDW {
                _FDFDW { w: self }
            }
        }
    }
}
#[doc = "FTFC"]
pub struct FTFC {
    register_block: ftfc::RegisterBlock,
}
impl Deref for FTFC {
    type Target = ftfc::RegisterBlock;
    fn deref(&self) -> &ftfc::RegisterBlock {
        &self.register_block
    }
}
#[doc = "DMA channel multiplexor"]
pub const DMAMUX: Peripheral<DMAMUX> = unsafe { Peripheral::new(1073876992) };
#[doc = "DMA channel multiplexor"]
pub mod dmamux {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - Channel Configuration register"]
        pub chcfg0: CHCFG0,
        #[doc = "0x01 - Channel Configuration register"]
        pub chcfg1: CHCFG1,
        #[doc = "0x02 - Channel Configuration register"]
        pub chcfg2: CHCFG2,
        #[doc = "0x03 - Channel Configuration register"]
        pub chcfg3: CHCFG3,
        #[doc = "0x04 - Channel Configuration register"]
        pub chcfg4: CHCFG4,
        #[doc = "0x05 - Channel Configuration register"]
        pub chcfg5: CHCFG5,
        #[doc = "0x06 - Channel Configuration register"]
        pub chcfg6: CHCFG6,
        #[doc = "0x07 - Channel Configuration register"]
        pub chcfg7: CHCFG7,
        #[doc = "0x08 - Channel Configuration register"]
        pub chcfg8: CHCFG8,
        #[doc = "0x09 - Channel Configuration register"]
        pub chcfg9: CHCFG9,
        #[doc = "0x0a - Channel Configuration register"]
        pub chcfg10: CHCFG10,
        #[doc = "0x0b - Channel Configuration register"]
        pub chcfg11: CHCFG11,
        #[doc = "0x0c - Channel Configuration register"]
        pub chcfg12: CHCFG12,
        #[doc = "0x0d - Channel Configuration register"]
        pub chcfg13: CHCFG13,
        #[doc = "0x0e - Channel Configuration register"]
        pub chcfg14: CHCFG14,
        #[doc = "0x0f - Channel Configuration register"]
        pub chcfg15: CHCFG15,
    }
    #[doc = "Channel Configuration register"]
    pub struct CHCFG0 {
        register: VolatileCell<u8>,
    }
    #[doc = "Channel Configuration register"]
    pub mod chcfg0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::CHCFG0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SOURCER {
            bits: u8,
        }
        impl SOURCER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGR {
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            _0,
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            _1,
        }
        impl TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGR::_0 => false,
                    TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGR {
                match value {
                    false => TRIGR::_0,
                    true => TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `ENBL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ENBLR {
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            _0,
            #[doc = "DMA channel is enabled"]
            _1,
        }
        impl ENBLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ENBLR::_0 => false,
                    ENBLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ENBLR {
                match value {
                    false => ENBLR::_0,
                    true => ENBLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ENBLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ENBLR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _SOURCEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SOURCEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIG`"]
        pub enum TRIGW {
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            _0,
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            _1,
        }
        impl TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGW::_0 => false,
                    TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGW::_0)
            }
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ENBL`"]
        pub enum ENBLW {
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            _0,
            #[doc = "DMA channel is enabled"]
            _1,
        }
        impl ENBLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ENBLW::_0 => false,
                    ENBLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ENBLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ENBLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ENBLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ENBLW::_0)
            }
            #[doc = "DMA channel is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ENBLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:5 - DMA Channel Source (Slot)"]
            #[inline(always)]
            pub fn source(&self) -> SOURCER {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                SOURCER { bits }
            }
            #[doc = "Bit 6 - DMA Channel Trigger Enable"]
            #[inline(always)]
            pub fn trig(&self) -> TRIGR {
                TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 7 - DMA Channel Enable"]
            #[inline(always)]
            pub fn enbl(&self) -> ENBLR {
                ENBLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - DMA Channel Source (Slot)"]
            #[inline(always)]
            pub fn source(&mut self) -> _SOURCEW {
                _SOURCEW { w: self }
            }
            #[doc = "Bit 6 - DMA Channel Trigger Enable"]
            #[inline(always)]
            pub fn trig(&mut self) -> _TRIGW {
                _TRIGW { w: self }
            }
            #[doc = "Bit 7 - DMA Channel Enable"]
            #[inline(always)]
            pub fn enbl(&mut self) -> _ENBLW {
                _ENBLW { w: self }
            }
        }
    }
    #[doc = "Channel Configuration register"]
    pub struct CHCFG1 {
        register: VolatileCell<u8>,
    }
    #[doc = "Channel Configuration register"]
    pub mod chcfg1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::CHCFG1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SOURCER {
            bits: u8,
        }
        impl SOURCER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGR {
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            _0,
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            _1,
        }
        impl TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGR::_0 => false,
                    TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGR {
                match value {
                    false => TRIGR::_0,
                    true => TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `ENBL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ENBLR {
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            _0,
            #[doc = "DMA channel is enabled"]
            _1,
        }
        impl ENBLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ENBLR::_0 => false,
                    ENBLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ENBLR {
                match value {
                    false => ENBLR::_0,
                    true => ENBLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ENBLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ENBLR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _SOURCEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SOURCEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIG`"]
        pub enum TRIGW {
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            _0,
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            _1,
        }
        impl TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGW::_0 => false,
                    TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGW::_0)
            }
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ENBL`"]
        pub enum ENBLW {
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            _0,
            #[doc = "DMA channel is enabled"]
            _1,
        }
        impl ENBLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ENBLW::_0 => false,
                    ENBLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ENBLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ENBLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ENBLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ENBLW::_0)
            }
            #[doc = "DMA channel is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ENBLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:5 - DMA Channel Source (Slot)"]
            #[inline(always)]
            pub fn source(&self) -> SOURCER {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                SOURCER { bits }
            }
            #[doc = "Bit 6 - DMA Channel Trigger Enable"]
            #[inline(always)]
            pub fn trig(&self) -> TRIGR {
                TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 7 - DMA Channel Enable"]
            #[inline(always)]
            pub fn enbl(&self) -> ENBLR {
                ENBLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - DMA Channel Source (Slot)"]
            #[inline(always)]
            pub fn source(&mut self) -> _SOURCEW {
                _SOURCEW { w: self }
            }
            #[doc = "Bit 6 - DMA Channel Trigger Enable"]
            #[inline(always)]
            pub fn trig(&mut self) -> _TRIGW {
                _TRIGW { w: self }
            }
            #[doc = "Bit 7 - DMA Channel Enable"]
            #[inline(always)]
            pub fn enbl(&mut self) -> _ENBLW {
                _ENBLW { w: self }
            }
        }
    }
    #[doc = "Channel Configuration register"]
    pub struct CHCFG2 {
        register: VolatileCell<u8>,
    }
    #[doc = "Channel Configuration register"]
    pub mod chcfg2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::CHCFG2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SOURCER {
            bits: u8,
        }
        impl SOURCER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGR {
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            _0,
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            _1,
        }
        impl TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGR::_0 => false,
                    TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGR {
                match value {
                    false => TRIGR::_0,
                    true => TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `ENBL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ENBLR {
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            _0,
            #[doc = "DMA channel is enabled"]
            _1,
        }
        impl ENBLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ENBLR::_0 => false,
                    ENBLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ENBLR {
                match value {
                    false => ENBLR::_0,
                    true => ENBLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ENBLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ENBLR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _SOURCEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SOURCEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIG`"]
        pub enum TRIGW {
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            _0,
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            _1,
        }
        impl TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGW::_0 => false,
                    TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGW::_0)
            }
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ENBL`"]
        pub enum ENBLW {
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            _0,
            #[doc = "DMA channel is enabled"]
            _1,
        }
        impl ENBLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ENBLW::_0 => false,
                    ENBLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ENBLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ENBLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ENBLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ENBLW::_0)
            }
            #[doc = "DMA channel is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ENBLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:5 - DMA Channel Source (Slot)"]
            #[inline(always)]
            pub fn source(&self) -> SOURCER {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                SOURCER { bits }
            }
            #[doc = "Bit 6 - DMA Channel Trigger Enable"]
            #[inline(always)]
            pub fn trig(&self) -> TRIGR {
                TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 7 - DMA Channel Enable"]
            #[inline(always)]
            pub fn enbl(&self) -> ENBLR {
                ENBLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - DMA Channel Source (Slot)"]
            #[inline(always)]
            pub fn source(&mut self) -> _SOURCEW {
                _SOURCEW { w: self }
            }
            #[doc = "Bit 6 - DMA Channel Trigger Enable"]
            #[inline(always)]
            pub fn trig(&mut self) -> _TRIGW {
                _TRIGW { w: self }
            }
            #[doc = "Bit 7 - DMA Channel Enable"]
            #[inline(always)]
            pub fn enbl(&mut self) -> _ENBLW {
                _ENBLW { w: self }
            }
        }
    }
    #[doc = "Channel Configuration register"]
    pub struct CHCFG3 {
        register: VolatileCell<u8>,
    }
    #[doc = "Channel Configuration register"]
    pub mod chcfg3 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::CHCFG3 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SOURCER {
            bits: u8,
        }
        impl SOURCER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGR {
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            _0,
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            _1,
        }
        impl TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGR::_0 => false,
                    TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGR {
                match value {
                    false => TRIGR::_0,
                    true => TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `ENBL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ENBLR {
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            _0,
            #[doc = "DMA channel is enabled"]
            _1,
        }
        impl ENBLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ENBLR::_0 => false,
                    ENBLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ENBLR {
                match value {
                    false => ENBLR::_0,
                    true => ENBLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ENBLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ENBLR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _SOURCEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SOURCEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIG`"]
        pub enum TRIGW {
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            _0,
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            _1,
        }
        impl TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGW::_0 => false,
                    TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGW::_0)
            }
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ENBL`"]
        pub enum ENBLW {
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            _0,
            #[doc = "DMA channel is enabled"]
            _1,
        }
        impl ENBLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ENBLW::_0 => false,
                    ENBLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ENBLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ENBLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ENBLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ENBLW::_0)
            }
            #[doc = "DMA channel is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ENBLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:5 - DMA Channel Source (Slot)"]
            #[inline(always)]
            pub fn source(&self) -> SOURCER {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                SOURCER { bits }
            }
            #[doc = "Bit 6 - DMA Channel Trigger Enable"]
            #[inline(always)]
            pub fn trig(&self) -> TRIGR {
                TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 7 - DMA Channel Enable"]
            #[inline(always)]
            pub fn enbl(&self) -> ENBLR {
                ENBLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - DMA Channel Source (Slot)"]
            #[inline(always)]
            pub fn source(&mut self) -> _SOURCEW {
                _SOURCEW { w: self }
            }
            #[doc = "Bit 6 - DMA Channel Trigger Enable"]
            #[inline(always)]
            pub fn trig(&mut self) -> _TRIGW {
                _TRIGW { w: self }
            }
            #[doc = "Bit 7 - DMA Channel Enable"]
            #[inline(always)]
            pub fn enbl(&mut self) -> _ENBLW {
                _ENBLW { w: self }
            }
        }
    }
    #[doc = "Channel Configuration register"]
    pub struct CHCFG4 {
        register: VolatileCell<u8>,
    }
    #[doc = "Channel Configuration register"]
    pub mod chcfg4 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::CHCFG4 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SOURCER {
            bits: u8,
        }
        impl SOURCER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGR {
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            _0,
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            _1,
        }
        impl TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGR::_0 => false,
                    TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGR {
                match value {
                    false => TRIGR::_0,
                    true => TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `ENBL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ENBLR {
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            _0,
            #[doc = "DMA channel is enabled"]
            _1,
        }
        impl ENBLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ENBLR::_0 => false,
                    ENBLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ENBLR {
                match value {
                    false => ENBLR::_0,
                    true => ENBLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ENBLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ENBLR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _SOURCEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SOURCEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIG`"]
        pub enum TRIGW {
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            _0,
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            _1,
        }
        impl TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGW::_0 => false,
                    TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGW::_0)
            }
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ENBL`"]
        pub enum ENBLW {
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            _0,
            #[doc = "DMA channel is enabled"]
            _1,
        }
        impl ENBLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ENBLW::_0 => false,
                    ENBLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ENBLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ENBLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ENBLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ENBLW::_0)
            }
            #[doc = "DMA channel is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ENBLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:5 - DMA Channel Source (Slot)"]
            #[inline(always)]
            pub fn source(&self) -> SOURCER {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                SOURCER { bits }
            }
            #[doc = "Bit 6 - DMA Channel Trigger Enable"]
            #[inline(always)]
            pub fn trig(&self) -> TRIGR {
                TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 7 - DMA Channel Enable"]
            #[inline(always)]
            pub fn enbl(&self) -> ENBLR {
                ENBLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - DMA Channel Source (Slot)"]
            #[inline(always)]
            pub fn source(&mut self) -> _SOURCEW {
                _SOURCEW { w: self }
            }
            #[doc = "Bit 6 - DMA Channel Trigger Enable"]
            #[inline(always)]
            pub fn trig(&mut self) -> _TRIGW {
                _TRIGW { w: self }
            }
            #[doc = "Bit 7 - DMA Channel Enable"]
            #[inline(always)]
            pub fn enbl(&mut self) -> _ENBLW {
                _ENBLW { w: self }
            }
        }
    }
    #[doc = "Channel Configuration register"]
    pub struct CHCFG5 {
        register: VolatileCell<u8>,
    }
    #[doc = "Channel Configuration register"]
    pub mod chcfg5 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::CHCFG5 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SOURCER {
            bits: u8,
        }
        impl SOURCER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGR {
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            _0,
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            _1,
        }
        impl TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGR::_0 => false,
                    TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGR {
                match value {
                    false => TRIGR::_0,
                    true => TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `ENBL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ENBLR {
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            _0,
            #[doc = "DMA channel is enabled"]
            _1,
        }
        impl ENBLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ENBLR::_0 => false,
                    ENBLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ENBLR {
                match value {
                    false => ENBLR::_0,
                    true => ENBLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ENBLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ENBLR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _SOURCEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SOURCEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIG`"]
        pub enum TRIGW {
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            _0,
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            _1,
        }
        impl TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGW::_0 => false,
                    TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGW::_0)
            }
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ENBL`"]
        pub enum ENBLW {
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            _0,
            #[doc = "DMA channel is enabled"]
            _1,
        }
        impl ENBLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ENBLW::_0 => false,
                    ENBLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ENBLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ENBLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ENBLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ENBLW::_0)
            }
            #[doc = "DMA channel is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ENBLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:5 - DMA Channel Source (Slot)"]
            #[inline(always)]
            pub fn source(&self) -> SOURCER {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                SOURCER { bits }
            }
            #[doc = "Bit 6 - DMA Channel Trigger Enable"]
            #[inline(always)]
            pub fn trig(&self) -> TRIGR {
                TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 7 - DMA Channel Enable"]
            #[inline(always)]
            pub fn enbl(&self) -> ENBLR {
                ENBLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - DMA Channel Source (Slot)"]
            #[inline(always)]
            pub fn source(&mut self) -> _SOURCEW {
                _SOURCEW { w: self }
            }
            #[doc = "Bit 6 - DMA Channel Trigger Enable"]
            #[inline(always)]
            pub fn trig(&mut self) -> _TRIGW {
                _TRIGW { w: self }
            }
            #[doc = "Bit 7 - DMA Channel Enable"]
            #[inline(always)]
            pub fn enbl(&mut self) -> _ENBLW {
                _ENBLW { w: self }
            }
        }
    }
    #[doc = "Channel Configuration register"]
    pub struct CHCFG6 {
        register: VolatileCell<u8>,
    }
    #[doc = "Channel Configuration register"]
    pub mod chcfg6 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::CHCFG6 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SOURCER {
            bits: u8,
        }
        impl SOURCER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGR {
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            _0,
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            _1,
        }
        impl TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGR::_0 => false,
                    TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGR {
                match value {
                    false => TRIGR::_0,
                    true => TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `ENBL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ENBLR {
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            _0,
            #[doc = "DMA channel is enabled"]
            _1,
        }
        impl ENBLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ENBLR::_0 => false,
                    ENBLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ENBLR {
                match value {
                    false => ENBLR::_0,
                    true => ENBLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ENBLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ENBLR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _SOURCEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SOURCEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIG`"]
        pub enum TRIGW {
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            _0,
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            _1,
        }
        impl TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGW::_0 => false,
                    TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGW::_0)
            }
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ENBL`"]
        pub enum ENBLW {
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            _0,
            #[doc = "DMA channel is enabled"]
            _1,
        }
        impl ENBLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ENBLW::_0 => false,
                    ENBLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ENBLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ENBLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ENBLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ENBLW::_0)
            }
            #[doc = "DMA channel is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ENBLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:5 - DMA Channel Source (Slot)"]
            #[inline(always)]
            pub fn source(&self) -> SOURCER {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                SOURCER { bits }
            }
            #[doc = "Bit 6 - DMA Channel Trigger Enable"]
            #[inline(always)]
            pub fn trig(&self) -> TRIGR {
                TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 7 - DMA Channel Enable"]
            #[inline(always)]
            pub fn enbl(&self) -> ENBLR {
                ENBLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - DMA Channel Source (Slot)"]
            #[inline(always)]
            pub fn source(&mut self) -> _SOURCEW {
                _SOURCEW { w: self }
            }
            #[doc = "Bit 6 - DMA Channel Trigger Enable"]
            #[inline(always)]
            pub fn trig(&mut self) -> _TRIGW {
                _TRIGW { w: self }
            }
            #[doc = "Bit 7 - DMA Channel Enable"]
            #[inline(always)]
            pub fn enbl(&mut self) -> _ENBLW {
                _ENBLW { w: self }
            }
        }
    }
    #[doc = "Channel Configuration register"]
    pub struct CHCFG7 {
        register: VolatileCell<u8>,
    }
    #[doc = "Channel Configuration register"]
    pub mod chcfg7 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::CHCFG7 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SOURCER {
            bits: u8,
        }
        impl SOURCER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGR {
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            _0,
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            _1,
        }
        impl TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGR::_0 => false,
                    TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGR {
                match value {
                    false => TRIGR::_0,
                    true => TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `ENBL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ENBLR {
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            _0,
            #[doc = "DMA channel is enabled"]
            _1,
        }
        impl ENBLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ENBLR::_0 => false,
                    ENBLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ENBLR {
                match value {
                    false => ENBLR::_0,
                    true => ENBLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ENBLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ENBLR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _SOURCEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SOURCEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIG`"]
        pub enum TRIGW {
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            _0,
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            _1,
        }
        impl TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGW::_0 => false,
                    TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGW::_0)
            }
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ENBL`"]
        pub enum ENBLW {
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            _0,
            #[doc = "DMA channel is enabled"]
            _1,
        }
        impl ENBLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ENBLW::_0 => false,
                    ENBLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ENBLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ENBLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ENBLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ENBLW::_0)
            }
            #[doc = "DMA channel is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ENBLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:5 - DMA Channel Source (Slot)"]
            #[inline(always)]
            pub fn source(&self) -> SOURCER {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                SOURCER { bits }
            }
            #[doc = "Bit 6 - DMA Channel Trigger Enable"]
            #[inline(always)]
            pub fn trig(&self) -> TRIGR {
                TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 7 - DMA Channel Enable"]
            #[inline(always)]
            pub fn enbl(&self) -> ENBLR {
                ENBLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - DMA Channel Source (Slot)"]
            #[inline(always)]
            pub fn source(&mut self) -> _SOURCEW {
                _SOURCEW { w: self }
            }
            #[doc = "Bit 6 - DMA Channel Trigger Enable"]
            #[inline(always)]
            pub fn trig(&mut self) -> _TRIGW {
                _TRIGW { w: self }
            }
            #[doc = "Bit 7 - DMA Channel Enable"]
            #[inline(always)]
            pub fn enbl(&mut self) -> _ENBLW {
                _ENBLW { w: self }
            }
        }
    }
    #[doc = "Channel Configuration register"]
    pub struct CHCFG8 {
        register: VolatileCell<u8>,
    }
    #[doc = "Channel Configuration register"]
    pub mod chcfg8 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::CHCFG8 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SOURCER {
            bits: u8,
        }
        impl SOURCER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGR {
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            _0,
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            _1,
        }
        impl TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGR::_0 => false,
                    TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGR {
                match value {
                    false => TRIGR::_0,
                    true => TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `ENBL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ENBLR {
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            _0,
            #[doc = "DMA channel is enabled"]
            _1,
        }
        impl ENBLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ENBLR::_0 => false,
                    ENBLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ENBLR {
                match value {
                    false => ENBLR::_0,
                    true => ENBLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ENBLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ENBLR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _SOURCEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SOURCEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIG`"]
        pub enum TRIGW {
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            _0,
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            _1,
        }
        impl TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGW::_0 => false,
                    TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGW::_0)
            }
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ENBL`"]
        pub enum ENBLW {
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            _0,
            #[doc = "DMA channel is enabled"]
            _1,
        }
        impl ENBLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ENBLW::_0 => false,
                    ENBLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ENBLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ENBLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ENBLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ENBLW::_0)
            }
            #[doc = "DMA channel is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ENBLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:5 - DMA Channel Source (Slot)"]
            #[inline(always)]
            pub fn source(&self) -> SOURCER {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                SOURCER { bits }
            }
            #[doc = "Bit 6 - DMA Channel Trigger Enable"]
            #[inline(always)]
            pub fn trig(&self) -> TRIGR {
                TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 7 - DMA Channel Enable"]
            #[inline(always)]
            pub fn enbl(&self) -> ENBLR {
                ENBLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - DMA Channel Source (Slot)"]
            #[inline(always)]
            pub fn source(&mut self) -> _SOURCEW {
                _SOURCEW { w: self }
            }
            #[doc = "Bit 6 - DMA Channel Trigger Enable"]
            #[inline(always)]
            pub fn trig(&mut self) -> _TRIGW {
                _TRIGW { w: self }
            }
            #[doc = "Bit 7 - DMA Channel Enable"]
            #[inline(always)]
            pub fn enbl(&mut self) -> _ENBLW {
                _ENBLW { w: self }
            }
        }
    }
    #[doc = "Channel Configuration register"]
    pub struct CHCFG9 {
        register: VolatileCell<u8>,
    }
    #[doc = "Channel Configuration register"]
    pub mod chcfg9 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::CHCFG9 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SOURCER {
            bits: u8,
        }
        impl SOURCER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGR {
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            _0,
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            _1,
        }
        impl TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGR::_0 => false,
                    TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGR {
                match value {
                    false => TRIGR::_0,
                    true => TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `ENBL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ENBLR {
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            _0,
            #[doc = "DMA channel is enabled"]
            _1,
        }
        impl ENBLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ENBLR::_0 => false,
                    ENBLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ENBLR {
                match value {
                    false => ENBLR::_0,
                    true => ENBLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ENBLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ENBLR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _SOURCEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SOURCEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIG`"]
        pub enum TRIGW {
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            _0,
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            _1,
        }
        impl TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGW::_0 => false,
                    TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGW::_0)
            }
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ENBL`"]
        pub enum ENBLW {
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            _0,
            #[doc = "DMA channel is enabled"]
            _1,
        }
        impl ENBLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ENBLW::_0 => false,
                    ENBLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ENBLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ENBLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ENBLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ENBLW::_0)
            }
            #[doc = "DMA channel is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ENBLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:5 - DMA Channel Source (Slot)"]
            #[inline(always)]
            pub fn source(&self) -> SOURCER {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                SOURCER { bits }
            }
            #[doc = "Bit 6 - DMA Channel Trigger Enable"]
            #[inline(always)]
            pub fn trig(&self) -> TRIGR {
                TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 7 - DMA Channel Enable"]
            #[inline(always)]
            pub fn enbl(&self) -> ENBLR {
                ENBLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - DMA Channel Source (Slot)"]
            #[inline(always)]
            pub fn source(&mut self) -> _SOURCEW {
                _SOURCEW { w: self }
            }
            #[doc = "Bit 6 - DMA Channel Trigger Enable"]
            #[inline(always)]
            pub fn trig(&mut self) -> _TRIGW {
                _TRIGW { w: self }
            }
            #[doc = "Bit 7 - DMA Channel Enable"]
            #[inline(always)]
            pub fn enbl(&mut self) -> _ENBLW {
                _ENBLW { w: self }
            }
        }
    }
    #[doc = "Channel Configuration register"]
    pub struct CHCFG10 {
        register: VolatileCell<u8>,
    }
    #[doc = "Channel Configuration register"]
    pub mod chcfg10 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::CHCFG10 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SOURCER {
            bits: u8,
        }
        impl SOURCER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGR {
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            _0,
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            _1,
        }
        impl TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGR::_0 => false,
                    TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGR {
                match value {
                    false => TRIGR::_0,
                    true => TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `ENBL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ENBLR {
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            _0,
            #[doc = "DMA channel is enabled"]
            _1,
        }
        impl ENBLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ENBLR::_0 => false,
                    ENBLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ENBLR {
                match value {
                    false => ENBLR::_0,
                    true => ENBLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ENBLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ENBLR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _SOURCEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SOURCEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIG`"]
        pub enum TRIGW {
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            _0,
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            _1,
        }
        impl TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGW::_0 => false,
                    TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGW::_0)
            }
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ENBL`"]
        pub enum ENBLW {
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            _0,
            #[doc = "DMA channel is enabled"]
            _1,
        }
        impl ENBLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ENBLW::_0 => false,
                    ENBLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ENBLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ENBLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ENBLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ENBLW::_0)
            }
            #[doc = "DMA channel is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ENBLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:5 - DMA Channel Source (Slot)"]
            #[inline(always)]
            pub fn source(&self) -> SOURCER {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                SOURCER { bits }
            }
            #[doc = "Bit 6 - DMA Channel Trigger Enable"]
            #[inline(always)]
            pub fn trig(&self) -> TRIGR {
                TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 7 - DMA Channel Enable"]
            #[inline(always)]
            pub fn enbl(&self) -> ENBLR {
                ENBLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - DMA Channel Source (Slot)"]
            #[inline(always)]
            pub fn source(&mut self) -> _SOURCEW {
                _SOURCEW { w: self }
            }
            #[doc = "Bit 6 - DMA Channel Trigger Enable"]
            #[inline(always)]
            pub fn trig(&mut self) -> _TRIGW {
                _TRIGW { w: self }
            }
            #[doc = "Bit 7 - DMA Channel Enable"]
            #[inline(always)]
            pub fn enbl(&mut self) -> _ENBLW {
                _ENBLW { w: self }
            }
        }
    }
    #[doc = "Channel Configuration register"]
    pub struct CHCFG11 {
        register: VolatileCell<u8>,
    }
    #[doc = "Channel Configuration register"]
    pub mod chcfg11 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::CHCFG11 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SOURCER {
            bits: u8,
        }
        impl SOURCER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGR {
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            _0,
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            _1,
        }
        impl TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGR::_0 => false,
                    TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGR {
                match value {
                    false => TRIGR::_0,
                    true => TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `ENBL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ENBLR {
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            _0,
            #[doc = "DMA channel is enabled"]
            _1,
        }
        impl ENBLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ENBLR::_0 => false,
                    ENBLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ENBLR {
                match value {
                    false => ENBLR::_0,
                    true => ENBLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ENBLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ENBLR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _SOURCEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SOURCEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIG`"]
        pub enum TRIGW {
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            _0,
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            _1,
        }
        impl TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGW::_0 => false,
                    TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGW::_0)
            }
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ENBL`"]
        pub enum ENBLW {
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            _0,
            #[doc = "DMA channel is enabled"]
            _1,
        }
        impl ENBLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ENBLW::_0 => false,
                    ENBLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ENBLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ENBLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ENBLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ENBLW::_0)
            }
            #[doc = "DMA channel is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ENBLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:5 - DMA Channel Source (Slot)"]
            #[inline(always)]
            pub fn source(&self) -> SOURCER {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                SOURCER { bits }
            }
            #[doc = "Bit 6 - DMA Channel Trigger Enable"]
            #[inline(always)]
            pub fn trig(&self) -> TRIGR {
                TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 7 - DMA Channel Enable"]
            #[inline(always)]
            pub fn enbl(&self) -> ENBLR {
                ENBLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - DMA Channel Source (Slot)"]
            #[inline(always)]
            pub fn source(&mut self) -> _SOURCEW {
                _SOURCEW { w: self }
            }
            #[doc = "Bit 6 - DMA Channel Trigger Enable"]
            #[inline(always)]
            pub fn trig(&mut self) -> _TRIGW {
                _TRIGW { w: self }
            }
            #[doc = "Bit 7 - DMA Channel Enable"]
            #[inline(always)]
            pub fn enbl(&mut self) -> _ENBLW {
                _ENBLW { w: self }
            }
        }
    }
    #[doc = "Channel Configuration register"]
    pub struct CHCFG12 {
        register: VolatileCell<u8>,
    }
    #[doc = "Channel Configuration register"]
    pub mod chcfg12 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::CHCFG12 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SOURCER {
            bits: u8,
        }
        impl SOURCER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGR {
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            _0,
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            _1,
        }
        impl TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGR::_0 => false,
                    TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGR {
                match value {
                    false => TRIGR::_0,
                    true => TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `ENBL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ENBLR {
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            _0,
            #[doc = "DMA channel is enabled"]
            _1,
        }
        impl ENBLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ENBLR::_0 => false,
                    ENBLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ENBLR {
                match value {
                    false => ENBLR::_0,
                    true => ENBLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ENBLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ENBLR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _SOURCEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SOURCEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIG`"]
        pub enum TRIGW {
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            _0,
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            _1,
        }
        impl TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGW::_0 => false,
                    TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGW::_0)
            }
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ENBL`"]
        pub enum ENBLW {
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            _0,
            #[doc = "DMA channel is enabled"]
            _1,
        }
        impl ENBLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ENBLW::_0 => false,
                    ENBLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ENBLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ENBLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ENBLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ENBLW::_0)
            }
            #[doc = "DMA channel is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ENBLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:5 - DMA Channel Source (Slot)"]
            #[inline(always)]
            pub fn source(&self) -> SOURCER {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                SOURCER { bits }
            }
            #[doc = "Bit 6 - DMA Channel Trigger Enable"]
            #[inline(always)]
            pub fn trig(&self) -> TRIGR {
                TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 7 - DMA Channel Enable"]
            #[inline(always)]
            pub fn enbl(&self) -> ENBLR {
                ENBLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - DMA Channel Source (Slot)"]
            #[inline(always)]
            pub fn source(&mut self) -> _SOURCEW {
                _SOURCEW { w: self }
            }
            #[doc = "Bit 6 - DMA Channel Trigger Enable"]
            #[inline(always)]
            pub fn trig(&mut self) -> _TRIGW {
                _TRIGW { w: self }
            }
            #[doc = "Bit 7 - DMA Channel Enable"]
            #[inline(always)]
            pub fn enbl(&mut self) -> _ENBLW {
                _ENBLW { w: self }
            }
        }
    }
    #[doc = "Channel Configuration register"]
    pub struct CHCFG13 {
        register: VolatileCell<u8>,
    }
    #[doc = "Channel Configuration register"]
    pub mod chcfg13 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::CHCFG13 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SOURCER {
            bits: u8,
        }
        impl SOURCER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGR {
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            _0,
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            _1,
        }
        impl TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGR::_0 => false,
                    TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGR {
                match value {
                    false => TRIGR::_0,
                    true => TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `ENBL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ENBLR {
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            _0,
            #[doc = "DMA channel is enabled"]
            _1,
        }
        impl ENBLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ENBLR::_0 => false,
                    ENBLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ENBLR {
                match value {
                    false => ENBLR::_0,
                    true => ENBLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ENBLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ENBLR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _SOURCEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SOURCEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIG`"]
        pub enum TRIGW {
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            _0,
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            _1,
        }
        impl TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGW::_0 => false,
                    TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGW::_0)
            }
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ENBL`"]
        pub enum ENBLW {
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            _0,
            #[doc = "DMA channel is enabled"]
            _1,
        }
        impl ENBLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ENBLW::_0 => false,
                    ENBLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ENBLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ENBLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ENBLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ENBLW::_0)
            }
            #[doc = "DMA channel is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ENBLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:5 - DMA Channel Source (Slot)"]
            #[inline(always)]
            pub fn source(&self) -> SOURCER {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                SOURCER { bits }
            }
            #[doc = "Bit 6 - DMA Channel Trigger Enable"]
            #[inline(always)]
            pub fn trig(&self) -> TRIGR {
                TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 7 - DMA Channel Enable"]
            #[inline(always)]
            pub fn enbl(&self) -> ENBLR {
                ENBLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - DMA Channel Source (Slot)"]
            #[inline(always)]
            pub fn source(&mut self) -> _SOURCEW {
                _SOURCEW { w: self }
            }
            #[doc = "Bit 6 - DMA Channel Trigger Enable"]
            #[inline(always)]
            pub fn trig(&mut self) -> _TRIGW {
                _TRIGW { w: self }
            }
            #[doc = "Bit 7 - DMA Channel Enable"]
            #[inline(always)]
            pub fn enbl(&mut self) -> _ENBLW {
                _ENBLW { w: self }
            }
        }
    }
    #[doc = "Channel Configuration register"]
    pub struct CHCFG14 {
        register: VolatileCell<u8>,
    }
    #[doc = "Channel Configuration register"]
    pub mod chcfg14 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::CHCFG14 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SOURCER {
            bits: u8,
        }
        impl SOURCER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGR {
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            _0,
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            _1,
        }
        impl TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGR::_0 => false,
                    TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGR {
                match value {
                    false => TRIGR::_0,
                    true => TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `ENBL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ENBLR {
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            _0,
            #[doc = "DMA channel is enabled"]
            _1,
        }
        impl ENBLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ENBLR::_0 => false,
                    ENBLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ENBLR {
                match value {
                    false => ENBLR::_0,
                    true => ENBLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ENBLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ENBLR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _SOURCEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SOURCEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIG`"]
        pub enum TRIGW {
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            _0,
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            _1,
        }
        impl TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGW::_0 => false,
                    TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGW::_0)
            }
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ENBL`"]
        pub enum ENBLW {
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            _0,
            #[doc = "DMA channel is enabled"]
            _1,
        }
        impl ENBLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ENBLW::_0 => false,
                    ENBLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ENBLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ENBLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ENBLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ENBLW::_0)
            }
            #[doc = "DMA channel is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ENBLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:5 - DMA Channel Source (Slot)"]
            #[inline(always)]
            pub fn source(&self) -> SOURCER {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                SOURCER { bits }
            }
            #[doc = "Bit 6 - DMA Channel Trigger Enable"]
            #[inline(always)]
            pub fn trig(&self) -> TRIGR {
                TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 7 - DMA Channel Enable"]
            #[inline(always)]
            pub fn enbl(&self) -> ENBLR {
                ENBLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - DMA Channel Source (Slot)"]
            #[inline(always)]
            pub fn source(&mut self) -> _SOURCEW {
                _SOURCEW { w: self }
            }
            #[doc = "Bit 6 - DMA Channel Trigger Enable"]
            #[inline(always)]
            pub fn trig(&mut self) -> _TRIGW {
                _TRIGW { w: self }
            }
            #[doc = "Bit 7 - DMA Channel Enable"]
            #[inline(always)]
            pub fn enbl(&mut self) -> _ENBLW {
                _ENBLW { w: self }
            }
        }
    }
    #[doc = "Channel Configuration register"]
    pub struct CHCFG15 {
        register: VolatileCell<u8>,
    }
    #[doc = "Channel Configuration register"]
    pub mod chcfg15 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::CHCFG15 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SOURCER {
            bits: u8,
        }
        impl SOURCER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGR {
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            _0,
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            _1,
        }
        impl TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGR::_0 => false,
                    TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGR {
                match value {
                    false => TRIGR::_0,
                    true => TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `ENBL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ENBLR {
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            _0,
            #[doc = "DMA channel is enabled"]
            _1,
        }
        impl ENBLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ENBLR::_0 => false,
                    ENBLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ENBLR {
                match value {
                    false => ENBLR::_0,
                    true => ENBLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ENBLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ENBLR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _SOURCEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SOURCEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIG`"]
        pub enum TRIGW {
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            _0,
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            _1,
        }
        impl TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGW::_0 => false,
                    TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGW::_0)
            }
            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ENBL`"]
        pub enum ENBLW {
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            _0,
            #[doc = "DMA channel is enabled"]
            _1,
        }
        impl ENBLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ENBLW::_0 => false,
                    ENBLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ENBLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ENBLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ENBLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ENBLW::_0)
            }
            #[doc = "DMA channel is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ENBLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:5 - DMA Channel Source (Slot)"]
            #[inline(always)]
            pub fn source(&self) -> SOURCER {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                SOURCER { bits }
            }
            #[doc = "Bit 6 - DMA Channel Trigger Enable"]
            #[inline(always)]
            pub fn trig(&self) -> TRIGR {
                TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 7 - DMA Channel Enable"]
            #[inline(always)]
            pub fn enbl(&self) -> ENBLR {
                ENBLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - DMA Channel Source (Slot)"]
            #[inline(always)]
            pub fn source(&mut self) -> _SOURCEW {
                _SOURCEW { w: self }
            }
            #[doc = "Bit 6 - DMA Channel Trigger Enable"]
            #[inline(always)]
            pub fn trig(&mut self) -> _TRIGW {
                _TRIGW { w: self }
            }
            #[doc = "Bit 7 - DMA Channel Enable"]
            #[inline(always)]
            pub fn enbl(&mut self) -> _ENBLW {
                _ENBLW { w: self }
            }
        }
    }
}
#[doc = "DMA channel multiplexor"]
pub struct DMAMUX {
    register_block: dmamux::RegisterBlock,
}
impl Deref for DMAMUX {
    type Target = dmamux::RegisterBlock;
    fn deref(&self) -> &dmamux::RegisterBlock {
        &self.register_block
    }
}
#[doc = "Flex Controller Area Network module"]
pub const CAN0: Peripheral<CAN0> = unsafe { Peripheral::new(1073889280) };
#[doc = "Flex Controller Area Network module"]
pub mod can0 {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - Module Configuration Register"]
        pub mcr: MCR,
        #[doc = "0x04 - Control 1 register"]
        pub ctrl1: CTRL1,
        #[doc = "0x08 - Free Running Timer"]
        pub timer: TIMER,
        _reserved0: [u8; 4usize],
        #[doc = "0x10 - Rx Mailboxes Global Mask Register"]
        pub rxmgmask: RXMGMASK,
        #[doc = "0x14 - Rx 14 Mask register"]
        pub rx14mask: RX14MASK,
        #[doc = "0x18 - Rx 15 Mask register"]
        pub rx15mask: RX15MASK,
        #[doc = "0x1c - Error Counter"]
        pub ecr: ECR,
        #[doc = "0x20 - Error and Status 1 register"]
        pub esr1: ESR1,
        _reserved1: [u8; 4usize],
        #[doc = "0x28 - Interrupt Masks 1 register"]
        pub imask1: IMASK1,
        _reserved2: [u8; 4usize],
        #[doc = "0x30 - Interrupt Flags 1 register"]
        pub iflag1: IFLAG1,
        #[doc = "0x34 - Control 2 register"]
        pub ctrl2: CTRL2,
        #[doc = "0x38 - Error and Status 2 register"]
        pub esr2: ESR2,
        _reserved3: [u8; 8usize],
        #[doc = "0x44 - CRC Register"]
        pub crcr: CRCR,
        #[doc = "0x48 - Rx FIFO Global Mask register"]
        pub rxfgmask: RXFGMASK,
        #[doc = "0x4c - Rx FIFO Information Register"]
        pub rxfir: RXFIR,
        #[doc = "0x50 - CAN Bit Timing Register"]
        pub cbt: CBT,
        _reserved4: [u8; 44usize],
        #[doc = "0x80 - Embedded RAM"]
        pub embedded_ram: [EMBEDDEDRAM; 128],
        _reserved5: [u8; 1536usize],
        #[doc = "0x880 - Rx Individual Mask Registers"]
        pub rximr0: RXIMR0,
        #[doc = "0x884 - Rx Individual Mask Registers"]
        pub rximr1: RXIMR1,
        #[doc = "0x888 - Rx Individual Mask Registers"]
        pub rximr2: RXIMR2,
        #[doc = "0x88c - Rx Individual Mask Registers"]
        pub rximr3: RXIMR3,
        #[doc = "0x890 - Rx Individual Mask Registers"]
        pub rximr4: RXIMR4,
        #[doc = "0x894 - Rx Individual Mask Registers"]
        pub rximr5: RXIMR5,
        #[doc = "0x898 - Rx Individual Mask Registers"]
        pub rximr6: RXIMR6,
        #[doc = "0x89c - Rx Individual Mask Registers"]
        pub rximr7: RXIMR7,
        #[doc = "0x8a0 - Rx Individual Mask Registers"]
        pub rximr8: RXIMR8,
        #[doc = "0x8a4 - Rx Individual Mask Registers"]
        pub rximr9: RXIMR9,
        #[doc = "0x8a8 - Rx Individual Mask Registers"]
        pub rximr10: RXIMR10,
        #[doc = "0x8ac - Rx Individual Mask Registers"]
        pub rximr11: RXIMR11,
        #[doc = "0x8b0 - Rx Individual Mask Registers"]
        pub rximr12: RXIMR12,
        #[doc = "0x8b4 - Rx Individual Mask Registers"]
        pub rximr13: RXIMR13,
        #[doc = "0x8b8 - Rx Individual Mask Registers"]
        pub rximr14: RXIMR14,
        #[doc = "0x8bc - Rx Individual Mask Registers"]
        pub rximr15: RXIMR15,
        _reserved6: [u8; 576usize],
        #[doc = "0xb00 - Pretended Networking Control 1 Register"]
        pub ctrl1_pn: CTRL1_PN,
        #[doc = "0xb04 - Pretended Networking Control 2 Register"]
        pub ctrl2_pn: CTRL2_PN,
        #[doc = "0xb08 - Pretended Networking Wake Up Match Register"]
        pub wu_mtc: WU_MTC,
        #[doc = "0xb0c - Pretended Networking ID Filter 1 Register"]
        pub flt_id1: FLT_ID1,
        #[doc = "0xb10 - Pretended Networking DLC Filter Register"]
        pub flt_dlc: FLT_DLC,
        #[doc = "0xb14 - Pretended Networking Payload Low Filter 1 Register"]
        pub pl1_lo: PL1_LO,
        #[doc = "0xb18 - Pretended Networking Payload High Filter 1 Register"]
        pub pl1_hi: PL1_HI,
        #[doc = "0xb1c - Pretended Networking ID Filter 2 Register / ID Mask Register"]
        pub flt_id2_idmask: FLT_ID2_IDMASK,
        #[doc = "0xb20 - Pretended Networking Payload Low Filter 2 Register / Payload Low Mask Register"]
        pub pl2_plmask_lo: PL2_PLMASK_LO,
        #[doc = "0xb24 - Pretended Networking Payload High Filter 2 low order bits / Payload High Mask Register"]
        pub pl2_plmask_hi: PL2_PLMASK_HI,
        _reserved7: [u8; 24usize],
        #[doc = "0xb40 - Wake Up Message Buffer Register for C/S"]
        pub wmb0_cs: WMB0_CS,
        #[doc = "0xb44 - Wake Up Message Buffer Register for ID"]
        pub wmb0_id: WMB0_ID,
        #[doc = "0xb48 - Wake Up Message Buffer Register for Data 0-3"]
        pub wmb0_d03: WMB0_D03,
        #[doc = "0xb4c - Wake Up Message Buffer Register Data 4-7"]
        pub wmb0_d47: WMB0_D47,
        #[doc = "0xb50 - Wake Up Message Buffer Register for C/S"]
        pub wmb1_cs: WMB1_CS,
        #[doc = "0xb54 - Wake Up Message Buffer Register for ID"]
        pub wmb1_id: WMB1_ID,
        #[doc = "0xb58 - Wake Up Message Buffer Register for Data 0-3"]
        pub wmb1_d03: WMB1_D03,
        #[doc = "0xb5c - Wake Up Message Buffer Register Data 4-7"]
        pub wmb1_d47: WMB1_D47,
        #[doc = "0xb60 - Wake Up Message Buffer Register for C/S"]
        pub wmb2_cs: WMB2_CS,
        #[doc = "0xb64 - Wake Up Message Buffer Register for ID"]
        pub wmb2_id: WMB2_ID,
        #[doc = "0xb68 - Wake Up Message Buffer Register for Data 0-3"]
        pub wmb2_d03: WMB2_D03,
        #[doc = "0xb6c - Wake Up Message Buffer Register Data 4-7"]
        pub wmb2_d47: WMB2_D47,
        #[doc = "0xb70 - Wake Up Message Buffer Register for C/S"]
        pub wmb3_cs: WMB3_CS,
        #[doc = "0xb74 - Wake Up Message Buffer Register for ID"]
        pub wmb3_id: WMB3_ID,
        #[doc = "0xb78 - Wake Up Message Buffer Register for Data 0-3"]
        pub wmb3_d03: WMB3_D03,
        #[doc = "0xb7c - Wake Up Message Buffer Register Data 4-7"]
        pub wmb3_d47: WMB3_D47,
        _reserved8: [u8; 128usize],
        #[doc = "0xc00 - CAN FD Control Register"]
        pub fdctrl: FDCTRL,
        #[doc = "0xc04 - CAN FD Bit Timing Register"]
        pub fdcbt: FDCBT,
        #[doc = "0xc08 - CAN FD CRC Register"]
        pub fdcrc: FDCRC,
    }
    #[doc = "Module Configuration Register"]
    pub struct MCR {
        register: VolatileCell<u32>,
    }
    #[doc = "Module Configuration Register"]
    pub mod mcr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::MCR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MAXMBR {
            bits: u8,
        }
        impl MAXMBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `IDAM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IDAMR {
            #[doc = "Format A: One full ID (standard and extended) per ID Filter Table element."]
            _00,
            #[doc = "Format B: Two full standard IDs or two partial 14-bit (standard and extended) IDs per ID Filter Table element."]
            _01,
            #[doc = "Format C: Four partial 8-bit Standard IDs per ID Filter Table element."]
            _10,
            #[doc = "Format D: All frames rejected."]
            _11,
        }
        impl IDAMR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IDAMR::_00 => 0,
                    IDAMR::_01 => 1,
                    IDAMR::_10 => 2,
                    IDAMR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IDAMR {
                match value {
                    0 => IDAMR::_00,
                    1 => IDAMR::_01,
                    2 => IDAMR::_10,
                    3 => IDAMR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == IDAMR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == IDAMR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == IDAMR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == IDAMR::_11
            }
        }
        #[doc = "Possible values of the field `FDEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FDENR {
            #[doc = "CAN FD is enabled. FlexCAN is able to receive and transmit messages in both CAN FD and CAN 2.0 formats."]
            _1,
            #[doc = "CAN FD is disabled. FlexCAN is able to receive and transmit messages in CAN 2.0 format."]
            _0,
        }
        impl FDENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FDENR::_1 => true,
                    FDENR::_0 => false,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FDENR {
                match value {
                    true => FDENR::_1,
                    false => FDENR::_0,
                }
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FDENR::_1
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FDENR::_0
            }
        }
        #[doc = "Possible values of the field `AEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum AENR {
            #[doc = "Abort disabled."]
            _0,
            #[doc = "Abort enabled."]
            _1,
        }
        impl AENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    AENR::_0 => false,
                    AENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> AENR {
                match value {
                    false => AENR::_0,
                    true => AENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == AENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == AENR::_1
            }
        }
        #[doc = "Possible values of the field `LPRIOEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LPRIOENR {
            #[doc = "Local Priority disabled."]
            _0,
            #[doc = "Local Priority enabled."]
            _1,
        }
        impl LPRIOENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LPRIOENR::_0 => false,
                    LPRIOENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LPRIOENR {
                match value {
                    false => LPRIOENR::_0,
                    true => LPRIOENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LPRIOENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LPRIOENR::_1
            }
        }
        #[doc = "Possible values of the field `PNET_EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PNET_ENR {
            #[doc = "Pretended Networking mode is disabled."]
            _0,
            #[doc = "Pretended Networking mode is enabled."]
            _1,
        }
        impl PNET_ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PNET_ENR::_0 => false,
                    PNET_ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PNET_ENR {
                match value {
                    false => PNET_ENR::_0,
                    true => PNET_ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PNET_ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PNET_ENR::_1
            }
        }
        #[doc = "Possible values of the field `DMA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMAR {
            #[doc = "DMA feature for RX FIFO disabled."]
            _0,
            #[doc = "DMA feature for RX FIFO enabled."]
            _1,
        }
        impl DMAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMAR::_0 => false,
                    DMAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMAR {
                match value {
                    false => DMAR::_0,
                    true => DMAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMAR::_1
            }
        }
        #[doc = "Possible values of the field `IRMQ`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRMQR {
            #[doc = "Individual Rx masking and queue feature are disabled. For backward compatibility with legacy applications, the reading of C/S word locks the MB even if it is EMPTY."]
            _0,
            #[doc = "Individual Rx masking and queue feature are enabled."]
            _1,
        }
        impl IRMQR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    IRMQR::_0 => false,
                    IRMQR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> IRMQR {
                match value {
                    false => IRMQR::_0,
                    true => IRMQR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == IRMQR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == IRMQR::_1
            }
        }
        #[doc = "Possible values of the field `SRXDIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SRXDISR {
            #[doc = "Self reception enabled."]
            _0,
            #[doc = "Self reception disabled."]
            _1,
        }
        impl SRXDISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SRXDISR::_0 => false,
                    SRXDISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SRXDISR {
                match value {
                    false => SRXDISR::_0,
                    true => SRXDISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SRXDISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SRXDISR::_1
            }
        }
        #[doc = "Possible values of the field `LPMACK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LPMACKR {
            #[doc = "FlexCAN is not in a low-power mode."]
            _0,
            #[doc = "FlexCAN is in a low-power mode."]
            _1,
        }
        impl LPMACKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LPMACKR::_0 => false,
                    LPMACKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LPMACKR {
                match value {
                    false => LPMACKR::_0,
                    true => LPMACKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LPMACKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LPMACKR::_1
            }
        }
        #[doc = "Possible values of the field `WRNEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WRNENR {
            #[doc = "TWRNINT and RWRNINT bits are zero, independent of the values in the error counters."]
            _0,
            #[doc = "TWRNINT and RWRNINT bits are set when the respective error counter transitions from less than 96 to greater than or equal to 96."]
            _1,
        }
        impl WRNENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WRNENR::_0 => false,
                    WRNENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WRNENR {
                match value {
                    false => WRNENR::_0,
                    true => WRNENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WRNENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WRNENR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct SUPVR {
            bits: bool,
        }
        impl SUPVR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `FRZACK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FRZACKR {
            #[doc = "FlexCAN not in Freeze mode, prescaler running."]
            _0,
            #[doc = "FlexCAN in Freeze mode, prescaler stopped."]
            _1,
        }
        impl FRZACKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FRZACKR::_0 => false,
                    FRZACKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FRZACKR {
                match value {
                    false => FRZACKR::_0,
                    true => FRZACKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FRZACKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FRZACKR::_1
            }
        }
        #[doc = "Possible values of the field `SOFTRST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SOFTRSTR {
            #[doc = "No reset request."]
            _0,
            #[doc = "Resets the registers affected by soft reset."]
            _1,
        }
        impl SOFTRSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SOFTRSTR::_0 => false,
                    SOFTRSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SOFTRSTR {
                match value {
                    false => SOFTRSTR::_0,
                    true => SOFTRSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SOFTRSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SOFTRSTR::_1
            }
        }
        #[doc = "Possible values of the field `NOTRDY`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum NOTRDYR {
            #[doc = "FlexCAN module is either in Normal mode, Listen-Only mode or Loop-Back mode."]
            _0,
            #[doc = r" Reserved"]
            _Reserved(bool),
        }
        impl NOTRDYR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    NOTRDYR::_0 => false,
                    NOTRDYR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> NOTRDYR {
                match value {
                    false => NOTRDYR::_0,
                    i => NOTRDYR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == NOTRDYR::_0
            }
        }
        #[doc = "Possible values of the field `HALT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HALTR {
            #[doc = "No Freeze mode request."]
            _0,
            #[doc = "Enters Freeze mode if the FRZ bit is asserted."]
            _1,
        }
        impl HALTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HALTR::_0 => false,
                    HALTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HALTR {
                match value {
                    false => HALTR::_0,
                    true => HALTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HALTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HALTR::_1
            }
        }
        #[doc = "Possible values of the field `RFEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RFENR {
            #[doc = "Rx FIFO not enabled."]
            _0,
            #[doc = "Rx FIFO enabled."]
            _1,
        }
        impl RFENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RFENR::_0 => false,
                    RFENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RFENR {
                match value {
                    false => RFENR::_0,
                    true => RFENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RFENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RFENR::_1
            }
        }
        #[doc = "Possible values of the field `FRZ`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FRZR {
            #[doc = "Not enabled to enter Freeze mode."]
            _0,
            #[doc = "Enabled to enter Freeze mode."]
            _1,
        }
        impl FRZR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FRZR::_0 => false,
                    FRZR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FRZR {
                match value {
                    false => FRZR::_0,
                    true => FRZR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FRZR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FRZR::_1
            }
        }
        #[doc = "Possible values of the field `MDIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MDISR {
            #[doc = "Enable the FlexCAN module."]
            _0,
            #[doc = "Disable the FlexCAN module."]
            _1,
        }
        impl MDISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MDISR::_0 => false,
                    MDISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MDISR {
                match value {
                    false => MDISR::_0,
                    true => MDISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MDISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MDISR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _MAXMBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MAXMBW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 127;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IDAM`"]
        pub enum IDAMW {
            #[doc = "Format A: One full ID (standard and extended) per ID Filter Table element."]
            _00,
            #[doc = "Format B: Two full standard IDs or two partial 14-bit (standard and extended) IDs per ID Filter Table element."]
            _01,
            #[doc = "Format C: Four partial 8-bit Standard IDs per ID Filter Table element."]
            _10,
            #[doc = "Format D: All frames rejected."]
            _11,
        }
        impl IDAMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IDAMW::_00 => 0,
                    IDAMW::_01 => 1,
                    IDAMW::_10 => 2,
                    IDAMW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IDAMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IDAMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IDAMW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Format A: One full ID (standard and extended) per ID Filter Table element."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(IDAMW::_00)
            }
            #[doc = "Format B: Two full standard IDs or two partial 14-bit (standard and extended) IDs per ID Filter Table element."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(IDAMW::_01)
            }
            #[doc = "Format C: Four partial 8-bit Standard IDs per ID Filter Table element."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(IDAMW::_10)
            }
            #[doc = "Format D: All frames rejected."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(IDAMW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FDEN`"]
        pub enum FDENW {
            #[doc = "CAN FD is enabled. FlexCAN is able to receive and transmit messages in both CAN FD and CAN 2.0 formats."]
            _1,
            #[doc = "CAN FD is disabled. FlexCAN is able to receive and transmit messages in CAN 2.0 format."]
            _0,
        }
        impl FDENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FDENW::_1 => true,
                    FDENW::_0 => false,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FDENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FDENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FDENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "CAN FD is enabled. FlexCAN is able to receive and transmit messages in both CAN FD and CAN 2.0 formats."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FDENW::_1)
            }
            #[doc = "CAN FD is disabled. FlexCAN is able to receive and transmit messages in CAN 2.0 format."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FDENW::_0)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `AEN`"]
        pub enum AENW {
            #[doc = "Abort disabled."]
            _0,
            #[doc = "Abort enabled."]
            _1,
        }
        impl AENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    AENW::_0 => false,
                    AENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _AENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _AENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: AENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Abort disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(AENW::_0)
            }
            #[doc = "Abort enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(AENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LPRIOEN`"]
        pub enum LPRIOENW {
            #[doc = "Local Priority disabled."]
            _0,
            #[doc = "Local Priority enabled."]
            _1,
        }
        impl LPRIOENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LPRIOENW::_0 => false,
                    LPRIOENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LPRIOENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LPRIOENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LPRIOENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Local Priority disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LPRIOENW::_0)
            }
            #[doc = "Local Priority enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LPRIOENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PNET_EN`"]
        pub enum PNET_ENW {
            #[doc = "Pretended Networking mode is disabled."]
            _0,
            #[doc = "Pretended Networking mode is enabled."]
            _1,
        }
        impl PNET_ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PNET_ENW::_0 => false,
                    PNET_ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PNET_ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PNET_ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PNET_ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pretended Networking mode is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PNET_ENW::_0)
            }
            #[doc = "Pretended Networking mode is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PNET_ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMA`"]
        pub enum DMAW {
            #[doc = "DMA feature for RX FIFO disabled."]
            _0,
            #[doc = "DMA feature for RX FIFO enabled."]
            _1,
        }
        impl DMAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMAW::_0 => false,
                    DMAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA feature for RX FIFO disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMAW::_0)
            }
            #[doc = "DMA feature for RX FIFO enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRMQ`"]
        pub enum IRMQW {
            #[doc = "Individual Rx masking and queue feature are disabled. For backward compatibility with legacy applications, the reading of C/S word locks the MB even if it is EMPTY."]
            _0,
            #[doc = "Individual Rx masking and queue feature are enabled."]
            _1,
        }
        impl IRMQW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    IRMQW::_0 => false,
                    IRMQW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRMQW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRMQW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRMQW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Individual Rx masking and queue feature are disabled. For backward compatibility with legacy applications, the reading of C/S word locks the MB even if it is EMPTY."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(IRMQW::_0)
            }
            #[doc = "Individual Rx masking and queue feature are enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(IRMQW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SRXDIS`"]
        pub enum SRXDISW {
            #[doc = "Self reception enabled."]
            _0,
            #[doc = "Self reception disabled."]
            _1,
        }
        impl SRXDISW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SRXDISW::_0 => false,
                    SRXDISW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SRXDISW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SRXDISW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SRXDISW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Self reception enabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SRXDISW::_0)
            }
            #[doc = "Self reception disabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SRXDISW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WRNEN`"]
        pub enum WRNENW {
            #[doc = "TWRNINT and RWRNINT bits are zero, independent of the values in the error counters."]
            _0,
            #[doc = "TWRNINT and RWRNINT bits are set when the respective error counter transitions from less than 96 to greater than or equal to 96."]
            _1,
        }
        impl WRNENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WRNENW::_0 => false,
                    WRNENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WRNENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WRNENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WRNENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "TWRNINT and RWRNINT bits are zero, independent of the values in the error counters."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WRNENW::_0)
            }
            #[doc = "TWRNINT and RWRNINT bits are set when the respective error counter transitions from less than 96 to greater than or equal to 96."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WRNENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 21;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SUPVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SUPVW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 23;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SOFTRST`"]
        pub enum SOFTRSTW {
            #[doc = "No reset request."]
            _0,
            #[doc = "Resets the registers affected by soft reset."]
            _1,
        }
        impl SOFTRSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SOFTRSTW::_0 => false,
                    SOFTRSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SOFTRSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SOFTRSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SOFTRSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No reset request."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SOFTRSTW::_0)
            }
            #[doc = "Resets the registers affected by soft reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SOFTRSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 25;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `HALT`"]
        pub enum HALTW {
            #[doc = "No Freeze mode request."]
            _0,
            #[doc = "Enters Freeze mode if the FRZ bit is asserted."]
            _1,
        }
        impl HALTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HALTW::_0 => false,
                    HALTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HALTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HALTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HALTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No Freeze mode request."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HALTW::_0)
            }
            #[doc = "Enters Freeze mode if the FRZ bit is asserted."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HALTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 28;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RFEN`"]
        pub enum RFENW {
            #[doc = "Rx FIFO not enabled."]
            _0,
            #[doc = "Rx FIFO enabled."]
            _1,
        }
        impl RFENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RFENW::_0 => false,
                    RFENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RFENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RFENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RFENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Rx FIFO not enabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RFENW::_0)
            }
            #[doc = "Rx FIFO enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RFENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 29;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FRZ`"]
        pub enum FRZW {
            #[doc = "Not enabled to enter Freeze mode."]
            _0,
            #[doc = "Enabled to enter Freeze mode."]
            _1,
        }
        impl FRZW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FRZW::_0 => false,
                    FRZW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FRZW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FRZW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FRZW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Not enabled to enter Freeze mode."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FRZW::_0)
            }
            #[doc = "Enabled to enter Freeze mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FRZW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MDIS`"]
        pub enum MDISW {
            #[doc = "Enable the FlexCAN module."]
            _0,
            #[doc = "Disable the FlexCAN module."]
            _1,
        }
        impl MDISW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MDISW::_0 => false,
                    MDISW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MDISW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MDISW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MDISW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Enable the FlexCAN module."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MDISW::_0)
            }
            #[doc = "Disable the FlexCAN module."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MDISW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:6 - Number Of The Last Message Buffer"]
            #[inline(always)]
            pub fn maxmb(&self) -> MAXMBR {
                let bits = {
                    const MASK: u8 = 127;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                MAXMBR { bits }
            }
            #[doc = "Bits 8:9 - ID Acceptance Mode"]
            #[inline(always)]
            pub fn idam(&self) -> IDAMR {
                IDAMR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 11 - CAN FD operation enable"]
            #[inline(always)]
            pub fn fden(&self) -> FDENR {
                FDENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Abort Enable"]
            #[inline(always)]
            pub fn aen(&self) -> AENR {
                AENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Local Priority Enable"]
            #[inline(always)]
            pub fn lprioen(&self) -> LPRIOENR {
                LPRIOENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - Pretended Networking Enable"]
            #[inline(always)]
            pub fn pnet_en(&self) -> PNET_ENR {
                PNET_ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&self) -> DMAR {
                DMAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 16 - Individual Rx Masking And Queue Enable"]
            #[inline(always)]
            pub fn irmq(&self) -> IRMQR {
                IRMQR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - Self Reception Disable"]
            #[inline(always)]
            pub fn srxdis(&self) -> SRXDISR {
                SRXDISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 20 - Low-Power Mode Acknowledge"]
            #[inline(always)]
            pub fn lpmack(&self) -> LPMACKR {
                LPMACKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - Warning Interrupt Enable"]
            #[inline(always)]
            pub fn wrnen(&self) -> WRNENR {
                WRNENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 23 - Supervisor Mode"]
            #[inline(always)]
            pub fn supv(&self) -> SUPVR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                SUPVR { bits }
            }
            #[doc = "Bit 24 - Freeze Mode Acknowledge"]
            #[inline(always)]
            pub fn frzack(&self) -> FRZACKR {
                FRZACKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 25 - Soft Reset"]
            #[inline(always)]
            pub fn softrst(&self) -> SOFTRSTR {
                SOFTRSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 25;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 27 - FlexCAN Not Ready"]
            #[inline(always)]
            pub fn notrdy(&self) -> NOTRDYR {
                NOTRDYR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 27;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 28 - Halt FlexCAN"]
            #[inline(always)]
            pub fn halt(&self) -> HALTR {
                HALTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 28;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 29 - Rx FIFO Enable"]
            #[inline(always)]
            pub fn rfen(&self) -> RFENR {
                RFENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 29;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 30 - Freeze Enable"]
            #[inline(always)]
            pub fn frz(&self) -> FRZR {
                FRZR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Module Disable"]
            #[inline(always)]
            pub fn mdis(&self) -> MDISR {
                MDISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 3633315855 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:6 - Number Of The Last Message Buffer"]
            #[inline(always)]
            pub fn maxmb(&mut self) -> _MAXMBW {
                _MAXMBW { w: self }
            }
            #[doc = "Bits 8:9 - ID Acceptance Mode"]
            #[inline(always)]
            pub fn idam(&mut self) -> _IDAMW {
                _IDAMW { w: self }
            }
            #[doc = "Bit 11 - CAN FD operation enable"]
            #[inline(always)]
            pub fn fden(&mut self) -> _FDENW {
                _FDENW { w: self }
            }
            #[doc = "Bit 12 - Abort Enable"]
            #[inline(always)]
            pub fn aen(&mut self) -> _AENW {
                _AENW { w: self }
            }
            #[doc = "Bit 13 - Local Priority Enable"]
            #[inline(always)]
            pub fn lprioen(&mut self) -> _LPRIOENW {
                _LPRIOENW { w: self }
            }
            #[doc = "Bit 14 - Pretended Networking Enable"]
            #[inline(always)]
            pub fn pnet_en(&mut self) -> _PNET_ENW {
                _PNET_ENW { w: self }
            }
            #[doc = "Bit 15 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&mut self) -> _DMAW {
                _DMAW { w: self }
            }
            #[doc = "Bit 16 - Individual Rx Masking And Queue Enable"]
            #[inline(always)]
            pub fn irmq(&mut self) -> _IRMQW {
                _IRMQW { w: self }
            }
            #[doc = "Bit 17 - Self Reception Disable"]
            #[inline(always)]
            pub fn srxdis(&mut self) -> _SRXDISW {
                _SRXDISW { w: self }
            }
            #[doc = "Bit 21 - Warning Interrupt Enable"]
            #[inline(always)]
            pub fn wrnen(&mut self) -> _WRNENW {
                _WRNENW { w: self }
            }
            #[doc = "Bit 23 - Supervisor Mode"]
            #[inline(always)]
            pub fn supv(&mut self) -> _SUPVW {
                _SUPVW { w: self }
            }
            #[doc = "Bit 25 - Soft Reset"]
            #[inline(always)]
            pub fn softrst(&mut self) -> _SOFTRSTW {
                _SOFTRSTW { w: self }
            }
            #[doc = "Bit 28 - Halt FlexCAN"]
            #[inline(always)]
            pub fn halt(&mut self) -> _HALTW {
                _HALTW { w: self }
            }
            #[doc = "Bit 29 - Rx FIFO Enable"]
            #[inline(always)]
            pub fn rfen(&mut self) -> _RFENW {
                _RFENW { w: self }
            }
            #[doc = "Bit 30 - Freeze Enable"]
            #[inline(always)]
            pub fn frz(&mut self) -> _FRZW {
                _FRZW { w: self }
            }
            #[doc = "Bit 31 - Module Disable"]
            #[inline(always)]
            pub fn mdis(&mut self) -> _MDISW {
                _MDISW { w: self }
            }
        }
    }
    #[doc = "Control 1 register"]
    pub struct CTRL1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Control 1 register"]
    pub mod ctrl1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CTRL1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct PROPSEGR {
            bits: u8,
        }
        impl PROPSEGR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `LOM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LOMR {
            #[doc = "Listen-Only mode is deactivated."]
            _0,
            #[doc = "FlexCAN module operates in Listen-Only mode."]
            _1,
        }
        impl LOMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LOMR::_0 => false,
                    LOMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LOMR {
                match value {
                    false => LOMR::_0,
                    true => LOMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LOMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LOMR::_1
            }
        }
        #[doc = "Possible values of the field `LBUF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LBUFR {
            #[doc = "Buffer with highest priority is transmitted first."]
            _0,
            #[doc = "Lowest number buffer is transmitted first."]
            _1,
        }
        impl LBUFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LBUFR::_0 => false,
                    LBUFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LBUFR {
                match value {
                    false => LBUFR::_0,
                    true => LBUFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LBUFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LBUFR::_1
            }
        }
        #[doc = "Possible values of the field `TSYN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TSYNR {
            #[doc = "Timer Sync feature disabled"]
            _0,
            #[doc = "Timer Sync feature enabled"]
            _1,
        }
        impl TSYNR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TSYNR::_0 => false,
                    TSYNR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TSYNR {
                match value {
                    false => TSYNR::_0,
                    true => TSYNR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TSYNR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TSYNR::_1
            }
        }
        #[doc = "Possible values of the field `BOFFREC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BOFFRECR {
            #[doc = "Automatic recovering from Bus Off state enabled."]
            _0,
            #[doc = "Automatic recovering from Bus Off state disabled."]
            _1,
        }
        impl BOFFRECR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BOFFRECR::_0 => false,
                    BOFFRECR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BOFFRECR {
                match value {
                    false => BOFFRECR::_0,
                    true => BOFFRECR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BOFFRECR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BOFFRECR::_1
            }
        }
        #[doc = "Possible values of the field `SMP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMPR {
            #[doc = "Just one sample is used to determine the bit value."]
            _0,
            #[doc = "Three samples are used to determine the value of the received bit: the regular one (sample point) and 2 preceding samples; a majority rule is used."]
            _1,
        }
        impl SMPR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SMPR::_0 => false,
                    SMPR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SMPR {
                match value {
                    false => SMPR::_0,
                    true => SMPR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SMPR::_1
            }
        }
        #[doc = "Possible values of the field `RWRNMSK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RWRNMSKR {
            #[doc = "Rx Warning Interrupt disabled."]
            _0,
            #[doc = "Rx Warning Interrupt enabled."]
            _1,
        }
        impl RWRNMSKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RWRNMSKR::_0 => false,
                    RWRNMSKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RWRNMSKR {
                match value {
                    false => RWRNMSKR::_0,
                    true => RWRNMSKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RWRNMSKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RWRNMSKR::_1
            }
        }
        #[doc = "Possible values of the field `TWRNMSK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TWRNMSKR {
            #[doc = "Tx Warning Interrupt disabled."]
            _0,
            #[doc = "Tx Warning Interrupt enabled."]
            _1,
        }
        impl TWRNMSKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TWRNMSKR::_0 => false,
                    TWRNMSKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TWRNMSKR {
                match value {
                    false => TWRNMSKR::_0,
                    true => TWRNMSKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TWRNMSKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TWRNMSKR::_1
            }
        }
        #[doc = "Possible values of the field `LPB`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LPBR {
            #[doc = "Loop Back disabled."]
            _0,
            #[doc = "Loop Back enabled."]
            _1,
        }
        impl LPBR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LPBR::_0 => false,
                    LPBR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LPBR {
                match value {
                    false => LPBR::_0,
                    true => LPBR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LPBR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LPBR::_1
            }
        }
        #[doc = "Possible values of the field `CLKSRC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CLKSRCR {
            #[doc = "The CAN engine clock source is the oscillator clock. Under this condition, the oscillator clock frequency must be lower than the bus clock."]
            _0,
            #[doc = "The CAN engine clock source is the peripheral clock."]
            _1,
        }
        impl CLKSRCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CLKSRCR::_0 => false,
                    CLKSRCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CLKSRCR {
                match value {
                    false => CLKSRCR::_0,
                    true => CLKSRCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CLKSRCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CLKSRCR::_1
            }
        }
        #[doc = "Possible values of the field `ERRMSK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERRMSKR {
            #[doc = "Error interrupt disabled."]
            _0,
            #[doc = "Error interrupt enabled."]
            _1,
        }
        impl ERRMSKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERRMSKR::_0 => false,
                    ERRMSKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERRMSKR {
                match value {
                    false => ERRMSKR::_0,
                    true => ERRMSKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERRMSKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERRMSKR::_1
            }
        }
        #[doc = "Possible values of the field `BOFFMSK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BOFFMSKR {
            #[doc = "Bus Off interrupt disabled."]
            _0,
            #[doc = "Bus Off interrupt enabled."]
            _1,
        }
        impl BOFFMSKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BOFFMSKR::_0 => false,
                    BOFFMSKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BOFFMSKR {
                match value {
                    false => BOFFMSKR::_0,
                    true => BOFFMSKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BOFFMSKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BOFFMSKR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct PSEG2R {
            bits: u8,
        }
        impl PSEG2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct PSEG1R {
            bits: u8,
        }
        impl PSEG1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct RJWR {
            bits: u8,
        }
        impl RJWR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct PRESDIVR {
            bits: u8,
        }
        impl PRESDIVR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _PROPSEGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PROPSEGW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LOM`"]
        pub enum LOMW {
            #[doc = "Listen-Only mode is deactivated."]
            _0,
            #[doc = "FlexCAN module operates in Listen-Only mode."]
            _1,
        }
        impl LOMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LOMW::_0 => false,
                    LOMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LOMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LOMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LOMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Listen-Only mode is deactivated."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LOMW::_0)
            }
            #[doc = "FlexCAN module operates in Listen-Only mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LOMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LBUF`"]
        pub enum LBUFW {
            #[doc = "Buffer with highest priority is transmitted first."]
            _0,
            #[doc = "Lowest number buffer is transmitted first."]
            _1,
        }
        impl LBUFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LBUFW::_0 => false,
                    LBUFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LBUFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LBUFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LBUFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Buffer with highest priority is transmitted first."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LBUFW::_0)
            }
            #[doc = "Lowest number buffer is transmitted first."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LBUFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TSYN`"]
        pub enum TSYNW {
            #[doc = "Timer Sync feature disabled"]
            _0,
            #[doc = "Timer Sync feature enabled"]
            _1,
        }
        impl TSYNW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TSYNW::_0 => false,
                    TSYNW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TSYNW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TSYNW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TSYNW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Timer Sync feature disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TSYNW::_0)
            }
            #[doc = "Timer Sync feature enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TSYNW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BOFFREC`"]
        pub enum BOFFRECW {
            #[doc = "Automatic recovering from Bus Off state enabled."]
            _0,
            #[doc = "Automatic recovering from Bus Off state disabled."]
            _1,
        }
        impl BOFFRECW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    BOFFRECW::_0 => false,
                    BOFFRECW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BOFFRECW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BOFFRECW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BOFFRECW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Automatic recovering from Bus Off state enabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BOFFRECW::_0)
            }
            #[doc = "Automatic recovering from Bus Off state disabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BOFFRECW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMP`"]
        pub enum SMPW {
            #[doc = "Just one sample is used to determine the bit value."]
            _0,
            #[doc = "Three samples are used to determine the value of the received bit: the regular one (sample point) and 2 preceding samples; a majority rule is used."]
            _1,
        }
        impl SMPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SMPW::_0 => false,
                    SMPW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMPW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Just one sample is used to determine the bit value."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMPW::_0)
            }
            #[doc = "Three samples are used to determine the value of the received bit: the regular one (sample point) and 2 preceding samples; a majority rule is used."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SMPW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RWRNMSK`"]
        pub enum RWRNMSKW {
            #[doc = "Rx Warning Interrupt disabled."]
            _0,
            #[doc = "Rx Warning Interrupt enabled."]
            _1,
        }
        impl RWRNMSKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RWRNMSKW::_0 => false,
                    RWRNMSKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RWRNMSKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RWRNMSKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RWRNMSKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Rx Warning Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RWRNMSKW::_0)
            }
            #[doc = "Rx Warning Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RWRNMSKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TWRNMSK`"]
        pub enum TWRNMSKW {
            #[doc = "Tx Warning Interrupt disabled."]
            _0,
            #[doc = "Tx Warning Interrupt enabled."]
            _1,
        }
        impl TWRNMSKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TWRNMSKW::_0 => false,
                    TWRNMSKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TWRNMSKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TWRNMSKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TWRNMSKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Tx Warning Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TWRNMSKW::_0)
            }
            #[doc = "Tx Warning Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TWRNMSKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LPB`"]
        pub enum LPBW {
            #[doc = "Loop Back disabled."]
            _0,
            #[doc = "Loop Back enabled."]
            _1,
        }
        impl LPBW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LPBW::_0 => false,
                    LPBW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LPBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LPBW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LPBW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Loop Back disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LPBW::_0)
            }
            #[doc = "Loop Back enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LPBW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CLKSRC`"]
        pub enum CLKSRCW {
            #[doc = "The CAN engine clock source is the oscillator clock. Under this condition, the oscillator clock frequency must be lower than the bus clock."]
            _0,
            #[doc = "The CAN engine clock source is the peripheral clock."]
            _1,
        }
        impl CLKSRCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CLKSRCW::_0 => false,
                    CLKSRCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLKSRCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLKSRCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CLKSRCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The CAN engine clock source is the oscillator clock. Under this condition, the oscillator clock frequency must be lower than the bus clock."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CLKSRCW::_0)
            }
            #[doc = "The CAN engine clock source is the peripheral clock."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CLKSRCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ERRMSK`"]
        pub enum ERRMSKW {
            #[doc = "Error interrupt disabled."]
            _0,
            #[doc = "Error interrupt enabled."]
            _1,
        }
        impl ERRMSKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERRMSKW::_0 => false,
                    ERRMSKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERRMSKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERRMSKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERRMSKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Error interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERRMSKW::_0)
            }
            #[doc = "Error interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERRMSKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BOFFMSK`"]
        pub enum BOFFMSKW {
            #[doc = "Bus Off interrupt disabled."]
            _0,
            #[doc = "Bus Off interrupt enabled."]
            _1,
        }
        impl BOFFMSKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    BOFFMSKW::_0 => false,
                    BOFFMSKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BOFFMSKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BOFFMSKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BOFFMSKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Bus Off interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BOFFMSKW::_0)
            }
            #[doc = "Bus Off interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BOFFMSKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSEG2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSEG2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSEG1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSEG1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 19;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _RJWW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RJWW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 22;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _PRESDIVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PRESDIVW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:2 - Propagation Segment"]
            #[inline(always)]
            pub fn propseg(&self) -> PROPSEGR {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                PROPSEGR { bits }
            }
            #[doc = "Bit 3 - Listen-Only Mode"]
            #[inline(always)]
            pub fn lom(&self) -> LOMR {
                LOMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Lowest Buffer Transmitted First"]
            #[inline(always)]
            pub fn lbuf(&self) -> LBUFR {
                LBUFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Timer Sync"]
            #[inline(always)]
            pub fn tsyn(&self) -> TSYNR {
                TSYNR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Bus Off Recovery"]
            #[inline(always)]
            pub fn boffrec(&self) -> BOFFRECR {
                BOFFRECR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - CAN Bit Sampling"]
            #[inline(always)]
            pub fn smp(&self) -> SMPR {
                SMPR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Rx Warning Interrupt Mask"]
            #[inline(always)]
            pub fn rwrnmsk(&self) -> RWRNMSKR {
                RWRNMSKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 11 - Tx Warning Interrupt Mask"]
            #[inline(always)]
            pub fn twrnmsk(&self) -> TWRNMSKR {
                TWRNMSKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Loop Back Mode"]
            #[inline(always)]
            pub fn lpb(&self) -> LPBR {
                LPBR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - CAN Engine Clock Source"]
            #[inline(always)]
            pub fn clksrc(&self) -> CLKSRCR {
                CLKSRCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - Error Interrupt Mask"]
            #[inline(always)]
            pub fn errmsk(&self) -> ERRMSKR {
                ERRMSKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - Bus Off Interrupt Mask"]
            #[inline(always)]
            pub fn boffmsk(&self) -> BOFFMSKR {
                BOFFMSKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:18 - Phase Segment 2"]
            #[inline(always)]
            pub fn pseg2(&self) -> PSEG2R {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                PSEG2R { bits }
            }
            #[doc = "Bits 19:21 - Phase Segment 1"]
            #[inline(always)]
            pub fn pseg1(&self) -> PSEG1R {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 19;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                PSEG1R { bits }
            }
            #[doc = "Bits 22:23 - Resync Jump Width"]
            #[inline(always)]
            pub fn rjw(&self) -> RJWR {
                let bits = {
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                RJWR { bits }
            }
            #[doc = "Bits 24:31 - Prescaler Division Factor"]
            #[inline(always)]
            pub fn presdiv(&self) -> PRESDIVR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                PRESDIVR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:2 - Propagation Segment"]
            #[inline(always)]
            pub fn propseg(&mut self) -> _PROPSEGW {
                _PROPSEGW { w: self }
            }
            #[doc = "Bit 3 - Listen-Only Mode"]
            #[inline(always)]
            pub fn lom(&mut self) -> _LOMW {
                _LOMW { w: self }
            }
            #[doc = "Bit 4 - Lowest Buffer Transmitted First"]
            #[inline(always)]
            pub fn lbuf(&mut self) -> _LBUFW {
                _LBUFW { w: self }
            }
            #[doc = "Bit 5 - Timer Sync"]
            #[inline(always)]
            pub fn tsyn(&mut self) -> _TSYNW {
                _TSYNW { w: self }
            }
            #[doc = "Bit 6 - Bus Off Recovery"]
            #[inline(always)]
            pub fn boffrec(&mut self) -> _BOFFRECW {
                _BOFFRECW { w: self }
            }
            #[doc = "Bit 7 - CAN Bit Sampling"]
            #[inline(always)]
            pub fn smp(&mut self) -> _SMPW {
                _SMPW { w: self }
            }
            #[doc = "Bit 10 - Rx Warning Interrupt Mask"]
            #[inline(always)]
            pub fn rwrnmsk(&mut self) -> _RWRNMSKW {
                _RWRNMSKW { w: self }
            }
            #[doc = "Bit 11 - Tx Warning Interrupt Mask"]
            #[inline(always)]
            pub fn twrnmsk(&mut self) -> _TWRNMSKW {
                _TWRNMSKW { w: self }
            }
            #[doc = "Bit 12 - Loop Back Mode"]
            #[inline(always)]
            pub fn lpb(&mut self) -> _LPBW {
                _LPBW { w: self }
            }
            #[doc = "Bit 13 - CAN Engine Clock Source"]
            #[inline(always)]
            pub fn clksrc(&mut self) -> _CLKSRCW {
                _CLKSRCW { w: self }
            }
            #[doc = "Bit 14 - Error Interrupt Mask"]
            #[inline(always)]
            pub fn errmsk(&mut self) -> _ERRMSKW {
                _ERRMSKW { w: self }
            }
            #[doc = "Bit 15 - Bus Off Interrupt Mask"]
            #[inline(always)]
            pub fn boffmsk(&mut self) -> _BOFFMSKW {
                _BOFFMSKW { w: self }
            }
            #[doc = "Bits 16:18 - Phase Segment 2"]
            #[inline(always)]
            pub fn pseg2(&mut self) -> _PSEG2W {
                _PSEG2W { w: self }
            }
            #[doc = "Bits 19:21 - Phase Segment 1"]
            #[inline(always)]
            pub fn pseg1(&mut self) -> _PSEG1W {
                _PSEG1W { w: self }
            }
            #[doc = "Bits 22:23 - Resync Jump Width"]
            #[inline(always)]
            pub fn rjw(&mut self) -> _RJWW {
                _RJWW { w: self }
            }
            #[doc = "Bits 24:31 - Prescaler Division Factor"]
            #[inline(always)]
            pub fn presdiv(&mut self) -> _PRESDIVW {
                _PRESDIVW { w: self }
            }
        }
    }
    #[doc = "Free Running Timer"]
    pub struct TIMER {
        register: VolatileCell<u32>,
    }
    #[doc = "Free Running Timer"]
    pub mod timer {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TIMER {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct TIMERR {
            bits: u16,
        }
        impl TIMERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIMERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIMERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Timer Value"]
            #[inline(always)]
            pub fn timer(&self) -> TIMERR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                TIMERR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Timer Value"]
            #[inline(always)]
            pub fn timer(&mut self) -> _TIMERW {
                _TIMERW { w: self }
            }
        }
    }
    #[doc = "Rx Mailboxes Global Mask Register"]
    pub struct RXMGMASK {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Mailboxes Global Mask Register"]
    pub mod rxmgmask {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXMGMASK {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MGR {
            bits: u32,
        }
        impl MGR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MGW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Rx Mailboxes Global Mask Bits"]
            #[inline(always)]
            pub fn mg(&self) -> MGR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MGR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Rx Mailboxes Global Mask Bits"]
            #[inline(always)]
            pub fn mg(&mut self) -> _MGW {
                _MGW { w: self }
            }
        }
    }
    #[doc = "Rx 14 Mask register"]
    pub struct RX14MASK {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx 14 Mask register"]
    pub mod rx14mask {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RX14MASK {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RX14MR {
            bits: u32,
        }
        impl RX14MR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RX14MW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RX14MW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Rx Buffer 14 Mask Bits"]
            #[inline(always)]
            pub fn rx14m(&self) -> RX14MR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                RX14MR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Rx Buffer 14 Mask Bits"]
            #[inline(always)]
            pub fn rx14m(&mut self) -> _RX14MW {
                _RX14MW { w: self }
            }
        }
    }
    #[doc = "Rx 15 Mask register"]
    pub struct RX15MASK {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx 15 Mask register"]
    pub mod rx15mask {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RX15MASK {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RX15MR {
            bits: u32,
        }
        impl RX15MR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RX15MW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RX15MW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Rx Buffer 15 Mask Bits"]
            #[inline(always)]
            pub fn rx15m(&self) -> RX15MR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                RX15MR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Rx Buffer 15 Mask Bits"]
            #[inline(always)]
            pub fn rx15m(&mut self) -> _RX15MW {
                _RX15MW { w: self }
            }
        }
    }
    #[doc = "Error Counter"]
    pub struct ECR {
        register: VolatileCell<u32>,
    }
    #[doc = "Error Counter"]
    pub mod ecr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::ECR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct TXERRCNTR {
            bits: u8,
        }
        impl TXERRCNTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct RXERRCNTR {
            bits: u8,
        }
        impl RXERRCNTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct TXERRCNT_FASTR {
            bits: u8,
        }
        impl TXERRCNT_FASTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct RXERRCNT_FASTR {
            bits: u8,
        }
        impl RXERRCNT_FASTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXERRCNTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXERRCNTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXERRCNTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXERRCNTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXERRCNT_FASTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXERRCNT_FASTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXERRCNT_FASTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXERRCNT_FASTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Transmit Error Counter"]
            #[inline(always)]
            pub fn txerrcnt(&self) -> TXERRCNTR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TXERRCNTR { bits }
            }
            #[doc = "Bits 8:15 - Receive Error Counter"]
            #[inline(always)]
            pub fn rxerrcnt(&self) -> RXERRCNTR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                RXERRCNTR { bits }
            }
            #[doc = "Bits 16:23 - Transmit Error Counter for fast bits"]
            #[inline(always)]
            pub fn txerrcnt_fast(&self) -> TXERRCNT_FASTR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TXERRCNT_FASTR { bits }
            }
            #[doc = "Bits 24:31 - Receive Error Counter for fast bits"]
            #[inline(always)]
            pub fn rxerrcnt_fast(&self) -> RXERRCNT_FASTR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                RXERRCNT_FASTR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Transmit Error Counter"]
            #[inline(always)]
            pub fn txerrcnt(&mut self) -> _TXERRCNTW {
                _TXERRCNTW { w: self }
            }
            #[doc = "Bits 8:15 - Receive Error Counter"]
            #[inline(always)]
            pub fn rxerrcnt(&mut self) -> _RXERRCNTW {
                _RXERRCNTW { w: self }
            }
            #[doc = "Bits 16:23 - Transmit Error Counter for fast bits"]
            #[inline(always)]
            pub fn txerrcnt_fast(&mut self) -> _TXERRCNT_FASTW {
                _TXERRCNT_FASTW { w: self }
            }
            #[doc = "Bits 24:31 - Receive Error Counter for fast bits"]
            #[inline(always)]
            pub fn rxerrcnt_fast(&mut self) -> _RXERRCNT_FASTW {
                _RXERRCNT_FASTW { w: self }
            }
        }
    }
    #[doc = "Error and Status 1 register"]
    pub struct ESR1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Error and Status 1 register"]
    pub mod esr1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::ESR1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `ERRINT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERRINTR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "Indicates setting of any Error Bit in the Error and Status Register."]
            _1,
        }
        impl ERRINTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERRINTR::_0 => false,
                    ERRINTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERRINTR {
                match value {
                    false => ERRINTR::_0,
                    true => ERRINTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERRINTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERRINTR::_1
            }
        }
        #[doc = "Possible values of the field `BOFFINT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BOFFINTR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "FlexCAN module entered Bus Off state."]
            _1,
        }
        impl BOFFINTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BOFFINTR::_0 => false,
                    BOFFINTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BOFFINTR {
                match value {
                    false => BOFFINTR::_0,
                    true => BOFFINTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BOFFINTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BOFFINTR::_1
            }
        }
        #[doc = "Possible values of the field `RX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXR {
            #[doc = "FlexCAN is not receiving a message."]
            _0,
            #[doc = "FlexCAN is receiving a message."]
            _1,
        }
        impl RXR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXR::_0 => false,
                    RXR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXR {
                match value {
                    false => RXR::_0,
                    true => RXR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RXR::_1
            }
        }
        #[doc = "Possible values of the field `FLTCONF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FLTCONFR {
            #[doc = "Error Active"]
            _00,
            #[doc = "Error Passive"]
            _01,
            #[doc = "Bus Off"]
            _1X,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl FLTCONFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    FLTCONFR::_00 => 0,
                    FLTCONFR::_01 => 1,
                    FLTCONFR::_1X => 2,
                    FLTCONFR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> FLTCONFR {
                match value {
                    0 => FLTCONFR::_00,
                    1 => FLTCONFR::_01,
                    2 => FLTCONFR::_1X,
                    i => FLTCONFR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == FLTCONFR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == FLTCONFR::_01
            }
            #[doc = "Checks if the value of the field is `_1X`"]
            #[inline(always)]
            pub fn is_1x(&self) -> bool {
                *self == FLTCONFR::_1X
            }
        }
        #[doc = "Possible values of the field `TX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXR {
            #[doc = "FlexCAN is not transmitting a message."]
            _0,
            #[doc = "FlexCAN is transmitting a message."]
            _1,
        }
        impl TXR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXR::_0 => false,
                    TXR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXR {
                match value {
                    false => TXR::_0,
                    true => TXR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXR::_1
            }
        }
        #[doc = "Possible values of the field `IDLE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IDLER {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "CAN bus is now IDLE."]
            _1,
        }
        impl IDLER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    IDLER::_0 => false,
                    IDLER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> IDLER {
                match value {
                    false => IDLER::_0,
                    true => IDLER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == IDLER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == IDLER::_1
            }
        }
        #[doc = "Possible values of the field `RXWRN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXWRNR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "RXERRCNT is greater than or equal to 96."]
            _1,
        }
        impl RXWRNR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXWRNR::_0 => false,
                    RXWRNR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXWRNR {
                match value {
                    false => RXWRNR::_0,
                    true => RXWRNR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXWRNR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RXWRNR::_1
            }
        }
        #[doc = "Possible values of the field `TXWRN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXWRNR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "TXERRCNT is greater than or equal to 96."]
            _1,
        }
        impl TXWRNR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXWRNR::_0 => false,
                    TXWRNR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXWRNR {
                match value {
                    false => TXWRNR::_0,
                    true => TXWRNR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXWRNR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXWRNR::_1
            }
        }
        #[doc = "Possible values of the field `STFERR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum STFERRR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "A Stuffing Error occurred since last read of this register."]
            _1,
        }
        impl STFERRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    STFERRR::_0 => false,
                    STFERRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> STFERRR {
                match value {
                    false => STFERRR::_0,
                    true => STFERRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == STFERRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == STFERRR::_1
            }
        }
        #[doc = "Possible values of the field `FRMERR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FRMERRR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "A Form Error occurred since last read of this register."]
            _1,
        }
        impl FRMERRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FRMERRR::_0 => false,
                    FRMERRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FRMERRR {
                match value {
                    false => FRMERRR::_0,
                    true => FRMERRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FRMERRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FRMERRR::_1
            }
        }
        #[doc = "Possible values of the field `CRCERR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CRCERRR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "A CRC error occurred since last read of this register."]
            _1,
        }
        impl CRCERRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CRCERRR::_0 => false,
                    CRCERRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CRCERRR {
                match value {
                    false => CRCERRR::_0,
                    true => CRCERRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CRCERRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CRCERRR::_1
            }
        }
        #[doc = "Possible values of the field `ACKERR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ACKERRR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "An ACK error occurred since last read of this register."]
            _1,
        }
        impl ACKERRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ACKERRR::_0 => false,
                    ACKERRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ACKERRR {
                match value {
                    false => ACKERRR::_0,
                    true => ACKERRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ACKERRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ACKERRR::_1
            }
        }
        #[doc = "Possible values of the field `BIT0ERR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BIT0ERRR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "At least one bit sent as dominant is received as recessive."]
            _1,
        }
        impl BIT0ERRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BIT0ERRR::_0 => false,
                    BIT0ERRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BIT0ERRR {
                match value {
                    false => BIT0ERRR::_0,
                    true => BIT0ERRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BIT0ERRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BIT0ERRR::_1
            }
        }
        #[doc = "Possible values of the field `BIT1ERR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BIT1ERRR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "At least one bit sent as recessive is received as dominant."]
            _1,
        }
        impl BIT1ERRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BIT1ERRR::_0 => false,
                    BIT1ERRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BIT1ERRR {
                match value {
                    false => BIT1ERRR::_0,
                    true => BIT1ERRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BIT1ERRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BIT1ERRR::_1
            }
        }
        #[doc = "Possible values of the field `RWRNINT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RWRNINTR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "The Rx error counter transitioned from less than 96 to greater than or equal to 96."]
            _1,
        }
        impl RWRNINTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RWRNINTR::_0 => false,
                    RWRNINTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RWRNINTR {
                match value {
                    false => RWRNINTR::_0,
                    true => RWRNINTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RWRNINTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RWRNINTR::_1
            }
        }
        #[doc = "Possible values of the field `TWRNINT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TWRNINTR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "The Tx error counter transitioned from less than 96 to greater than or equal to 96."]
            _1,
        }
        impl TWRNINTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TWRNINTR::_0 => false,
                    TWRNINTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TWRNINTR {
                match value {
                    false => TWRNINTR::_0,
                    true => TWRNINTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TWRNINTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TWRNINTR::_1
            }
        }
        #[doc = "Possible values of the field `SYNCH`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SYNCHR {
            #[doc = "FlexCAN is not synchronized to the CAN bus."]
            _0,
            #[doc = "FlexCAN is synchronized to the CAN bus."]
            _1,
        }
        impl SYNCHR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SYNCHR::_0 => false,
                    SYNCHR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SYNCHR {
                match value {
                    false => SYNCHR::_0,
                    true => SYNCHR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SYNCHR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SYNCHR::_1
            }
        }
        #[doc = "Possible values of the field `BOFFDONEINT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BOFFDONEINTR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "FlexCAN module has completed Bus Off process."]
            _1,
        }
        impl BOFFDONEINTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BOFFDONEINTR::_0 => false,
                    BOFFDONEINTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BOFFDONEINTR {
                match value {
                    false => BOFFDONEINTR::_0,
                    true => BOFFDONEINTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BOFFDONEINTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BOFFDONEINTR::_1
            }
        }
        #[doc = "Possible values of the field `ERRINT_FAST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERRINT_FASTR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "Indicates setting of any Error Bit detected in the Data Phase of CAN FD frames with the BRS bit set."]
            _1,
        }
        impl ERRINT_FASTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERRINT_FASTR::_0 => false,
                    ERRINT_FASTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERRINT_FASTR {
                match value {
                    false => ERRINT_FASTR::_0,
                    true => ERRINT_FASTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERRINT_FASTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERRINT_FASTR::_1
            }
        }
        #[doc = "Possible values of the field `ERROVR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERROVRR {
            #[doc = "Overrun has not occurred."]
            _0,
            #[doc = "Overrun has occurred."]
            _1,
        }
        impl ERROVRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERROVRR::_0 => false,
                    ERROVRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERROVRR {
                match value {
                    false => ERROVRR::_0,
                    true => ERROVRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERROVRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERROVRR::_1
            }
        }
        #[doc = "Possible values of the field `STFERR_FAST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum STFERR_FASTR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "A Stuffing Error occurred since last read of this register."]
            _1,
        }
        impl STFERR_FASTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    STFERR_FASTR::_0 => false,
                    STFERR_FASTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> STFERR_FASTR {
                match value {
                    false => STFERR_FASTR::_0,
                    true => STFERR_FASTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == STFERR_FASTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == STFERR_FASTR::_1
            }
        }
        #[doc = "Possible values of the field `FRMERR_FAST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FRMERR_FASTR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "A Form Error occurred since last read of this register."]
            _1,
        }
        impl FRMERR_FASTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FRMERR_FASTR::_0 => false,
                    FRMERR_FASTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FRMERR_FASTR {
                match value {
                    false => FRMERR_FASTR::_0,
                    true => FRMERR_FASTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FRMERR_FASTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FRMERR_FASTR::_1
            }
        }
        #[doc = "Possible values of the field `CRCERR_FAST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CRCERR_FASTR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "A CRC error occurred since last read of this register."]
            _1,
        }
        impl CRCERR_FASTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CRCERR_FASTR::_0 => false,
                    CRCERR_FASTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CRCERR_FASTR {
                match value {
                    false => CRCERR_FASTR::_0,
                    true => CRCERR_FASTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CRCERR_FASTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CRCERR_FASTR::_1
            }
        }
        #[doc = "Possible values of the field `BIT0ERR_FAST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BIT0ERR_FASTR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "At least one bit sent as dominant is received as recessive."]
            _1,
        }
        impl BIT0ERR_FASTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BIT0ERR_FASTR::_0 => false,
                    BIT0ERR_FASTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BIT0ERR_FASTR {
                match value {
                    false => BIT0ERR_FASTR::_0,
                    true => BIT0ERR_FASTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BIT0ERR_FASTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BIT0ERR_FASTR::_1
            }
        }
        #[doc = "Possible values of the field `BIT1ERR_FAST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BIT1ERR_FASTR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "At least one bit sent as recessive is received as dominant."]
            _1,
        }
        impl BIT1ERR_FASTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BIT1ERR_FASTR::_0 => false,
                    BIT1ERR_FASTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BIT1ERR_FASTR {
                match value {
                    false => BIT1ERR_FASTR::_0,
                    true => BIT1ERR_FASTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BIT1ERR_FASTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BIT1ERR_FASTR::_1
            }
        }
        #[doc = "Values that can be written to the field `ERRINT`"]
        pub enum ERRINTW {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "Indicates setting of any Error Bit in the Error and Status Register."]
            _1,
        }
        impl ERRINTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERRINTW::_0 => false,
                    ERRINTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERRINTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERRINTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERRINTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No such occurrence."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERRINTW::_0)
            }
            #[doc = "Indicates setting of any Error Bit in the Error and Status Register."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERRINTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BOFFINT`"]
        pub enum BOFFINTW {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "FlexCAN module entered Bus Off state."]
            _1,
        }
        impl BOFFINTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    BOFFINTW::_0 => false,
                    BOFFINTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BOFFINTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BOFFINTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BOFFINTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No such occurrence."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BOFFINTW::_0)
            }
            #[doc = "FlexCAN module entered Bus Off state."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BOFFINTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RWRNINT`"]
        pub enum RWRNINTW {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "The Rx error counter transitioned from less than 96 to greater than or equal to 96."]
            _1,
        }
        impl RWRNINTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RWRNINTW::_0 => false,
                    RWRNINTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RWRNINTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RWRNINTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RWRNINTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No such occurrence."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RWRNINTW::_0)
            }
            #[doc = "The Rx error counter transitioned from less than 96 to greater than or equal to 96."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RWRNINTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TWRNINT`"]
        pub enum TWRNINTW {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "The Tx error counter transitioned from less than 96 to greater than or equal to 96."]
            _1,
        }
        impl TWRNINTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TWRNINTW::_0 => false,
                    TWRNINTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TWRNINTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TWRNINTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TWRNINTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No such occurrence."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TWRNINTW::_0)
            }
            #[doc = "The Tx error counter transitioned from less than 96 to greater than or equal to 96."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TWRNINTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BOFFDONEINT`"]
        pub enum BOFFDONEINTW {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "FlexCAN module has completed Bus Off process."]
            _1,
        }
        impl BOFFDONEINTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    BOFFDONEINTW::_0 => false,
                    BOFFDONEINTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BOFFDONEINTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BOFFDONEINTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BOFFDONEINTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No such occurrence."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BOFFDONEINTW::_0)
            }
            #[doc = "FlexCAN module has completed Bus Off process."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BOFFDONEINTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 19;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ERRINT_FAST`"]
        pub enum ERRINT_FASTW {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "Indicates setting of any Error Bit detected in the Data Phase of CAN FD frames with the BRS bit set."]
            _1,
        }
        impl ERRINT_FASTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERRINT_FASTW::_0 => false,
                    ERRINT_FASTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERRINT_FASTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERRINT_FASTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERRINT_FASTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No such occurrence."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERRINT_FASTW::_0)
            }
            #[doc = "Indicates setting of any Error Bit detected in the Data Phase of CAN FD frames with the BRS bit set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERRINT_FASTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ERROVR`"]
        pub enum ERROVRW {
            #[doc = "Overrun has not occurred."]
            _0,
            #[doc = "Overrun has occurred."]
            _1,
        }
        impl ERROVRW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERROVRW::_0 => false,
                    ERROVRW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERROVRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERROVRW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERROVRW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Overrun has not occurred."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERROVRW::_0)
            }
            #[doc = "Overrun has occurred."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERROVRW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 21;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 1 - Error Interrupt"]
            #[inline(always)]
            pub fn errint(&self) -> ERRINTR {
                ERRINTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Bus Off Interrupt"]
            #[inline(always)]
            pub fn boffint(&self) -> BOFFINTR {
                BOFFINTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - FlexCAN In Reception"]
            #[inline(always)]
            pub fn rx(&self) -> RXR {
                RXR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 4:5 - Fault Confinement State"]
            #[inline(always)]
            pub fn fltconf(&self) -> FLTCONFR {
                FLTCONFR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 6 - FlexCAN In Transmission"]
            #[inline(always)]
            pub fn tx(&self) -> TXR {
                TXR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - IDLE"]
            #[inline(always)]
            pub fn idle(&self) -> IDLER {
                IDLER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Rx Error Warning"]
            #[inline(always)]
            pub fn rxwrn(&self) -> RXWRNR {
                RXWRNR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - TX Error Warning"]
            #[inline(always)]
            pub fn txwrn(&self) -> TXWRNR {
                TXWRNR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Stuffing Error"]
            #[inline(always)]
            pub fn stferr(&self) -> STFERRR {
                STFERRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 11 - Form Error"]
            #[inline(always)]
            pub fn frmerr(&self) -> FRMERRR {
                FRMERRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Cyclic Redundancy Check Error"]
            #[inline(always)]
            pub fn crcerr(&self) -> CRCERRR {
                CRCERRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Acknowledge Error"]
            #[inline(always)]
            pub fn ackerr(&self) -> ACKERRR {
                ACKERRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - Bit0 Error"]
            #[inline(always)]
            pub fn bit0err(&self) -> BIT0ERRR {
                BIT0ERRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - Bit1 Error"]
            #[inline(always)]
            pub fn bit1err(&self) -> BIT1ERRR {
                BIT1ERRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 16 - Rx Warning Interrupt Flag"]
            #[inline(always)]
            pub fn rwrnint(&self) -> RWRNINTR {
                RWRNINTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - Tx Warning Interrupt Flag"]
            #[inline(always)]
            pub fn twrnint(&self) -> TWRNINTR {
                TWRNINTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 18 - CAN Synchronization Status"]
            #[inline(always)]
            pub fn synch(&self) -> SYNCHR {
                SYNCHR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 19 - Bus Off Done Interrupt"]
            #[inline(always)]
            pub fn boffdoneint(&self) -> BOFFDONEINTR {
                BOFFDONEINTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 19;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 20 - Error Interrupt for errors detected in the Data Phase of CAN FD frames with the BRS bit set"]
            #[inline(always)]
            pub fn errint_fast(&self) -> ERRINT_FASTR {
                ERRINT_FASTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - Error Overrun bit"]
            #[inline(always)]
            pub fn errovr(&self) -> ERROVRR {
                ERROVRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 26 - Stuffing Error in the Data Phase of CAN FD frames with the BRS bit set"]
            #[inline(always)]
            pub fn stferr_fast(&self) -> STFERR_FASTR {
                STFERR_FASTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 26;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 27 - Form Error in the Data Phase of CAN FD frames with the BRS bit set"]
            #[inline(always)]
            pub fn frmerr_fast(&self) -> FRMERR_FASTR {
                FRMERR_FASTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 27;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 28 - Cyclic Redundancy Check Error in the CRC field of CAN FD frames with the BRS bit set"]
            #[inline(always)]
            pub fn crcerr_fast(&self) -> CRCERR_FASTR {
                CRCERR_FASTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 28;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 30 - Bit0 Error in the Data Phase of CAN FD frames with the BRS bit set"]
            #[inline(always)]
            pub fn bit0err_fast(&self) -> BIT0ERR_FASTR {
                BIT0ERR_FASTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Bit1 Error in the Data Phase of CAN FD frames with the BRS bit set"]
            #[inline(always)]
            pub fn bit1err_fast(&self) -> BIT1ERR_FASTR {
                BIT1ERR_FASTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 1 - Error Interrupt"]
            #[inline(always)]
            pub fn errint(&mut self) -> _ERRINTW {
                _ERRINTW { w: self }
            }
            #[doc = "Bit 2 - Bus Off Interrupt"]
            #[inline(always)]
            pub fn boffint(&mut self) -> _BOFFINTW {
                _BOFFINTW { w: self }
            }
            #[doc = "Bit 16 - Rx Warning Interrupt Flag"]
            #[inline(always)]
            pub fn rwrnint(&mut self) -> _RWRNINTW {
                _RWRNINTW { w: self }
            }
            #[doc = "Bit 17 - Tx Warning Interrupt Flag"]
            #[inline(always)]
            pub fn twrnint(&mut self) -> _TWRNINTW {
                _TWRNINTW { w: self }
            }
            #[doc = "Bit 19 - Bus Off Done Interrupt"]
            #[inline(always)]
            pub fn boffdoneint(&mut self) -> _BOFFDONEINTW {
                _BOFFDONEINTW { w: self }
            }
            #[doc = "Bit 20 - Error Interrupt for errors detected in the Data Phase of CAN FD frames with the BRS bit set"]
            #[inline(always)]
            pub fn errint_fast(&mut self) -> _ERRINT_FASTW {
                _ERRINT_FASTW { w: self }
            }
            #[doc = "Bit 21 - Error Overrun bit"]
            #[inline(always)]
            pub fn errovr(&mut self) -> _ERROVRW {
                _ERROVRW { w: self }
            }
        }
    }
    #[doc = "Interrupt Masks 1 register"]
    pub struct IMASK1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Interrupt Masks 1 register"]
    pub mod imask1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::IMASK1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BUF31TO0MR {
            bits: u32,
        }
        impl BUF31TO0MR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _BUF31TO0MW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BUF31TO0MW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Buffer MB i Mask"]
            #[inline(always)]
            pub fn buf31to0m(&self) -> BUF31TO0MR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                BUF31TO0MR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Buffer MB i Mask"]
            #[inline(always)]
            pub fn buf31to0m(&mut self) -> _BUF31TO0MW {
                _BUF31TO0MW { w: self }
            }
        }
    }
    #[doc = "Interrupt Flags 1 register"]
    pub struct IFLAG1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Interrupt Flags 1 register"]
    pub mod iflag1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::IFLAG1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `BUF0I`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BUF0IR {
            #[doc = "The corresponding buffer has no occurrence of successfully completed transmission or reception when MCR[RFEN]=0."]
            _0,
            #[doc = "The corresponding buffer has successfully completed transmission or reception when MCR[RFEN]=0."]
            _1,
        }
        impl BUF0IR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BUF0IR::_0 => false,
                    BUF0IR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BUF0IR {
                match value {
                    false => BUF0IR::_0,
                    true => BUF0IR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BUF0IR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BUF0IR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct BUF4TO1IR {
            bits: u8,
        }
        impl BUF4TO1IR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `BUF5I`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BUF5IR {
            #[doc = "No occurrence of MB5 completing transmission/reception when MCR[RFEN]=0, or of frame(s) available in the FIFO, when MCR[RFEN]=1"]
            _0,
            #[doc = "MB5 completed transmission/reception when MCR[RFEN]=0, or frame(s) available in the Rx FIFO when MCR[RFEN]=1. It generates a DMA request in case of MCR[RFEN] and MCR[DMA] are enabled."]
            _1,
        }
        impl BUF5IR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BUF5IR::_0 => false,
                    BUF5IR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BUF5IR {
                match value {
                    false => BUF5IR::_0,
                    true => BUF5IR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BUF5IR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BUF5IR::_1
            }
        }
        #[doc = "Possible values of the field `BUF6I`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BUF6IR {
            #[doc = "No occurrence of MB6 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO almost full when MCR[RFEN]=1"]
            _0,
            #[doc = "MB6 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO almost full when MCR[RFEN]=1"]
            _1,
        }
        impl BUF6IR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BUF6IR::_0 => false,
                    BUF6IR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BUF6IR {
                match value {
                    false => BUF6IR::_0,
                    true => BUF6IR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BUF6IR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BUF6IR::_1
            }
        }
        #[doc = "Possible values of the field `BUF7I`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BUF7IR {
            #[doc = "No occurrence of MB7 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO overflow when MCR[RFEN]=1"]
            _0,
            #[doc = "MB7 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO overflow when MCR[RFEN]=1"]
            _1,
        }
        impl BUF7IR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BUF7IR::_0 => false,
                    BUF7IR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BUF7IR {
                match value {
                    false => BUF7IR::_0,
                    true => BUF7IR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BUF7IR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BUF7IR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct BUF31TO8IR {
            bits: u32,
        }
        impl BUF31TO8IR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = "Values that can be written to the field `BUF0I`"]
        pub enum BUF0IW {
            #[doc = "The corresponding buffer has no occurrence of successfully completed transmission or reception when MCR[RFEN]=0."]
            _0,
            #[doc = "The corresponding buffer has successfully completed transmission or reception when MCR[RFEN]=0."]
            _1,
        }
        impl BUF0IW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    BUF0IW::_0 => false,
                    BUF0IW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BUF0IW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BUF0IW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BUF0IW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The corresponding buffer has no occurrence of successfully completed transmission or reception when MCR[RFEN]=0."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BUF0IW::_0)
            }
            #[doc = "The corresponding buffer has successfully completed transmission or reception when MCR[RFEN]=0."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BUF0IW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BUF4TO1IW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BUF4TO1IW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BUF5I`"]
        pub enum BUF5IW {
            #[doc = "No occurrence of MB5 completing transmission/reception when MCR[RFEN]=0, or of frame(s) available in the FIFO, when MCR[RFEN]=1"]
            _0,
            #[doc = "MB5 completed transmission/reception when MCR[RFEN]=0, or frame(s) available in the Rx FIFO when MCR[RFEN]=1. It generates a DMA request in case of MCR[RFEN] and MCR[DMA] are enabled."]
            _1,
        }
        impl BUF5IW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    BUF5IW::_0 => false,
                    BUF5IW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BUF5IW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BUF5IW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BUF5IW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No occurrence of MB5 completing transmission/reception when MCR[RFEN]=0, or of frame(s) available in the FIFO, when MCR[RFEN]=1"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BUF5IW::_0)
            }
            #[doc = "MB5 completed transmission/reception when MCR[RFEN]=0, or frame(s) available in the Rx FIFO when MCR[RFEN]=1. It generates a DMA request in case of MCR[RFEN] and MCR[DMA] are enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BUF5IW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BUF6I`"]
        pub enum BUF6IW {
            #[doc = "No occurrence of MB6 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO almost full when MCR[RFEN]=1"]
            _0,
            #[doc = "MB6 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO almost full when MCR[RFEN]=1"]
            _1,
        }
        impl BUF6IW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    BUF6IW::_0 => false,
                    BUF6IW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BUF6IW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BUF6IW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BUF6IW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No occurrence of MB6 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO almost full when MCR[RFEN]=1"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BUF6IW::_0)
            }
            #[doc = "MB6 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO almost full when MCR[RFEN]=1"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BUF6IW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BUF7I`"]
        pub enum BUF7IW {
            #[doc = "No occurrence of MB7 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO overflow when MCR[RFEN]=1"]
            _0,
            #[doc = "MB7 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO overflow when MCR[RFEN]=1"]
            _1,
        }
        impl BUF7IW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    BUF7IW::_0 => false,
                    BUF7IW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BUF7IW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BUF7IW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BUF7IW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No occurrence of MB7 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO overflow when MCR[RFEN]=1"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BUF7IW::_0)
            }
            #[doc = "MB7 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO overflow when MCR[RFEN]=1"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BUF7IW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BUF31TO8IW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BUF31TO8IW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 16777215;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Buffer MB0 Interrupt Or Clear FIFO bit"]
            #[inline(always)]
            pub fn buf0i(&self) -> BUF0IR {
                BUF0IR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 1:4 - Buffer MB i Interrupt Or \"reserved\""]
            #[inline(always)]
            pub fn buf4to1i(&self) -> BUF4TO1IR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BUF4TO1IR { bits }
            }
            #[doc = "Bit 5 - Buffer MB5 Interrupt Or \"Frames available in Rx FIFO\""]
            #[inline(always)]
            pub fn buf5i(&self) -> BUF5IR {
                BUF5IR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Buffer MB6 Interrupt Or \"Rx FIFO Warning\""]
            #[inline(always)]
            pub fn buf6i(&self) -> BUF6IR {
                BUF6IR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Buffer MB7 Interrupt Or \"Rx FIFO Overflow\""]
            #[inline(always)]
            pub fn buf7i(&self) -> BUF7IR {
                BUF7IR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:31 - Buffer MBi Interrupt"]
            #[inline(always)]
            pub fn buf31to8i(&self) -> BUF31TO8IR {
                let bits = {
                    const MASK: u32 = 16777215;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                BUF31TO8IR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Buffer MB0 Interrupt Or Clear FIFO bit"]
            #[inline(always)]
            pub fn buf0i(&mut self) -> _BUF0IW {
                _BUF0IW { w: self }
            }
            #[doc = "Bits 1:4 - Buffer MB i Interrupt Or \"reserved\""]
            #[inline(always)]
            pub fn buf4to1i(&mut self) -> _BUF4TO1IW {
                _BUF4TO1IW { w: self }
            }
            #[doc = "Bit 5 - Buffer MB5 Interrupt Or \"Frames available in Rx FIFO\""]
            #[inline(always)]
            pub fn buf5i(&mut self) -> _BUF5IW {
                _BUF5IW { w: self }
            }
            #[doc = "Bit 6 - Buffer MB6 Interrupt Or \"Rx FIFO Warning\""]
            #[inline(always)]
            pub fn buf6i(&mut self) -> _BUF6IW {
                _BUF6IW { w: self }
            }
            #[doc = "Bit 7 - Buffer MB7 Interrupt Or \"Rx FIFO Overflow\""]
            #[inline(always)]
            pub fn buf7i(&mut self) -> _BUF7IW {
                _BUF7IW { w: self }
            }
            #[doc = "Bits 8:31 - Buffer MBi Interrupt"]
            #[inline(always)]
            pub fn buf31to8i(&mut self) -> _BUF31TO8IW {
                _BUF31TO8IW { w: self }
            }
        }
    }
    #[doc = "Control 2 register"]
    pub struct CTRL2 {
        register: VolatileCell<u32>,
    }
    #[doc = "Control 2 register"]
    pub mod ctrl2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CTRL2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `EDFLTDIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EDFLTDISR {
            #[doc = "Edge Filter is enabled."]
            _0,
            #[doc = "Edge Filter is disabled."]
            _1,
        }
        impl EDFLTDISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EDFLTDISR::_0 => false,
                    EDFLTDISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EDFLTDISR {
                match value {
                    false => EDFLTDISR::_0,
                    true => EDFLTDISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EDFLTDISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EDFLTDISR::_1
            }
        }
        #[doc = "Possible values of the field `ISOCANFDEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISOCANFDENR {
            #[doc = "FlexCAN operates using the non-ISO CAN FD protocol."]
            _0,
            #[doc = "FlexCAN operates using the ISO CAN FD protocol (ISO 11898-1)."]
            _1,
        }
        impl ISOCANFDENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISOCANFDENR::_0 => false,
                    ISOCANFDENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISOCANFDENR {
                match value {
                    false => ISOCANFDENR::_0,
                    true => ISOCANFDENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISOCANFDENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISOCANFDENR::_1
            }
        }
        #[doc = "Possible values of the field `PREXCEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PREXCENR {
            #[doc = "Protocol Exception is disabled."]
            _0,
            #[doc = "Protocol Exception is enabled."]
            _1,
        }
        impl PREXCENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PREXCENR::_0 => false,
                    PREXCENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PREXCENR {
                match value {
                    false => PREXCENR::_0,
                    true => PREXCENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PREXCENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PREXCENR::_1
            }
        }
        #[doc = "Possible values of the field `TIMER_SRC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIMER_SRCR {
            #[doc = "The Free Running Timer is clocked by the CAN bit clock, which defines the baud rate on the CAN bus."]
            _0,
            #[doc = "The Free Running Timer is clocked by an external time tick. The period can be either adjusted to be equal to the baud rate on the CAN bus, or a different value as required. See the device specific section for details about the external time tick."]
            _1,
        }
        impl TIMER_SRCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TIMER_SRCR::_0 => false,
                    TIMER_SRCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TIMER_SRCR {
                match value {
                    false => TIMER_SRCR::_0,
                    true => TIMER_SRCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIMER_SRCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TIMER_SRCR::_1
            }
        }
        #[doc = "Possible values of the field `EACEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EACENR {
            #[doc = "Rx Mailbox filter's IDE bit is always compared and RTR is never compared despite mask bits."]
            _0,
            #[doc = "Enables the comparison of both Rx Mailbox filter's IDE and RTR bit with their corresponding bits within the incoming frame. Mask bits do apply."]
            _1,
        }
        impl EACENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EACENR::_0 => false,
                    EACENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EACENR {
                match value {
                    false => EACENR::_0,
                    true => EACENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EACENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EACENR::_1
            }
        }
        #[doc = "Possible values of the field `RRS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RRSR {
            #[doc = "Remote Response Frame is generated."]
            _0,
            #[doc = "Remote Request Frame is stored."]
            _1,
        }
        impl RRSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RRSR::_0 => false,
                    RRSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RRSR {
                match value {
                    false => RRSR::_0,
                    true => RRSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RRSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RRSR::_1
            }
        }
        #[doc = "Possible values of the field `MRP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MRPR {
            #[doc = "Matching starts from Rx FIFO and continues on Mailboxes."]
            _0,
            #[doc = "Matching starts from Mailboxes and continues on Rx FIFO."]
            _1,
        }
        impl MRPR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MRPR::_0 => false,
                    MRPR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MRPR {
                match value {
                    false => MRPR::_0,
                    true => MRPR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MRPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MRPR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct TASDR {
            bits: u8,
        }
        impl TASDR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct RFFNR {
            bits: u8,
        }
        impl RFFNR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `BOFFDONEMSK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BOFFDONEMSKR {
            #[doc = "Bus Off Done interrupt disabled."]
            _0,
            #[doc = "Bus Off Done interrupt enabled."]
            _1,
        }
        impl BOFFDONEMSKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BOFFDONEMSKR::_0 => false,
                    BOFFDONEMSKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BOFFDONEMSKR {
                match value {
                    false => BOFFDONEMSKR::_0,
                    true => BOFFDONEMSKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BOFFDONEMSKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BOFFDONEMSKR::_1
            }
        }
        #[doc = "Possible values of the field `ERRMSK_FAST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERRMSK_FASTR {
            #[doc = "ERRINT_FAST Error interrupt disabled."]
            _0,
            #[doc = "ERRINT_FAST Error interrupt enabled."]
            _1,
        }
        impl ERRMSK_FASTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERRMSK_FASTR::_0 => false,
                    ERRMSK_FASTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERRMSK_FASTR {
                match value {
                    false => ERRMSK_FASTR::_0,
                    true => ERRMSK_FASTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERRMSK_FASTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERRMSK_FASTR::_1
            }
        }
        #[doc = "Values that can be written to the field `EDFLTDIS`"]
        pub enum EDFLTDISW {
            #[doc = "Edge Filter is enabled."]
            _0,
            #[doc = "Edge Filter is disabled."]
            _1,
        }
        impl EDFLTDISW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EDFLTDISW::_0 => false,
                    EDFLTDISW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EDFLTDISW<'a> {
            w: &'a mut W,
        }
        impl<'a> _EDFLTDISW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EDFLTDISW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Edge Filter is enabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EDFLTDISW::_0)
            }
            #[doc = "Edge Filter is disabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EDFLTDISW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISOCANFDEN`"]
        pub enum ISOCANFDENW {
            #[doc = "FlexCAN operates using the non-ISO CAN FD protocol."]
            _0,
            #[doc = "FlexCAN operates using the ISO CAN FD protocol (ISO 11898-1)."]
            _1,
        }
        impl ISOCANFDENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISOCANFDENW::_0 => false,
                    ISOCANFDENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISOCANFDENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISOCANFDENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISOCANFDENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FlexCAN operates using the non-ISO CAN FD protocol."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISOCANFDENW::_0)
            }
            #[doc = "FlexCAN operates using the ISO CAN FD protocol (ISO 11898-1)."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISOCANFDENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PREXCEN`"]
        pub enum PREXCENW {
            #[doc = "Protocol Exception is disabled."]
            _0,
            #[doc = "Protocol Exception is enabled."]
            _1,
        }
        impl PREXCENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PREXCENW::_0 => false,
                    PREXCENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PREXCENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PREXCENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PREXCENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Protocol Exception is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PREXCENW::_0)
            }
            #[doc = "Protocol Exception is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PREXCENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TIMER_SRC`"]
        pub enum TIMER_SRCW {
            #[doc = "The Free Running Timer is clocked by the CAN bit clock, which defines the baud rate on the CAN bus."]
            _0,
            #[doc = "The Free Running Timer is clocked by an external time tick. The period can be either adjusted to be equal to the baud rate on the CAN bus, or a different value as required. See the device specific section for details about the external time tick."]
            _1,
        }
        impl TIMER_SRCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TIMER_SRCW::_0 => false,
                    TIMER_SRCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIMER_SRCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIMER_SRCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIMER_SRCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The Free Running Timer is clocked by the CAN bit clock, which defines the baud rate on the CAN bus."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIMER_SRCW::_0)
            }
            #[doc = "The Free Running Timer is clocked by an external time tick. The period can be either adjusted to be equal to the baud rate on the CAN bus, or a different value as required. See the device specific section for details about the external time tick."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TIMER_SRCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `EACEN`"]
        pub enum EACENW {
            #[doc = "Rx Mailbox filter's IDE bit is always compared and RTR is never compared despite mask bits."]
            _0,
            #[doc = "Enables the comparison of both Rx Mailbox filter's IDE and RTR bit with their corresponding bits within the incoming frame. Mask bits do apply."]
            _1,
        }
        impl EACENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EACENW::_0 => false,
                    EACENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EACENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _EACENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EACENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Rx Mailbox filter's IDE bit is always compared and RTR is never compared despite mask bits."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EACENW::_0)
            }
            #[doc = "Enables the comparison of both Rx Mailbox filter's IDE and RTR bit with their corresponding bits within the incoming frame. Mask bits do apply."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EACENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RRS`"]
        pub enum RRSW {
            #[doc = "Remote Response Frame is generated."]
            _0,
            #[doc = "Remote Request Frame is stored."]
            _1,
        }
        impl RRSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RRSW::_0 => false,
                    RRSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RRSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RRSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RRSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Remote Response Frame is generated."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RRSW::_0)
            }
            #[doc = "Remote Request Frame is stored."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RRSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MRP`"]
        pub enum MRPW {
            #[doc = "Matching starts from Rx FIFO and continues on Mailboxes."]
            _0,
            #[doc = "Matching starts from Mailboxes and continues on Rx FIFO."]
            _1,
        }
        impl MRPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MRPW::_0 => false,
                    MRPW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MRPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MRPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MRPW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Matching starts from Rx FIFO and continues on Mailboxes."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MRPW::_0)
            }
            #[doc = "Matching starts from Mailboxes and continues on Rx FIFO."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MRPW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _TASDW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TASDW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 19;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _RFFNW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RFFNW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BOFFDONEMSK`"]
        pub enum BOFFDONEMSKW {
            #[doc = "Bus Off Done interrupt disabled."]
            _0,
            #[doc = "Bus Off Done interrupt enabled."]
            _1,
        }
        impl BOFFDONEMSKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    BOFFDONEMSKW::_0 => false,
                    BOFFDONEMSKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BOFFDONEMSKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BOFFDONEMSKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BOFFDONEMSKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Bus Off Done interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BOFFDONEMSKW::_0)
            }
            #[doc = "Bus Off Done interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BOFFDONEMSKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ERRMSK_FAST`"]
        pub enum ERRMSK_FASTW {
            #[doc = "ERRINT_FAST Error interrupt disabled."]
            _0,
            #[doc = "ERRINT_FAST Error interrupt enabled."]
            _1,
        }
        impl ERRMSK_FASTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERRMSK_FASTW::_0 => false,
                    ERRMSK_FASTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERRMSK_FASTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERRMSK_FASTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERRMSK_FASTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "ERRINT_FAST Error interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERRMSK_FASTW::_0)
            }
            #[doc = "ERRINT_FAST Error interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERRMSK_FASTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 11 - Edge Filter Disable"]
            #[inline(always)]
            pub fn edfltdis(&self) -> EDFLTDISR {
                EDFLTDISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - ISO CAN FD Enable"]
            #[inline(always)]
            pub fn isocanfden(&self) -> ISOCANFDENR {
                ISOCANFDENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - Protocol Exception Enable"]
            #[inline(always)]
            pub fn prexcen(&self) -> PREXCENR {
                PREXCENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - Timer Source"]
            #[inline(always)]
            pub fn timer_src(&self) -> TIMER_SRCR {
                TIMER_SRCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 16 - Entire Frame Arbitration Field Comparison Enable For Rx Mailboxes"]
            #[inline(always)]
            pub fn eacen(&self) -> EACENR {
                EACENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - Remote Request Storing"]
            #[inline(always)]
            pub fn rrs(&self) -> RRSR {
                RRSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 18 - Mailboxes Reception Priority"]
            #[inline(always)]
            pub fn mrp(&self) -> MRPR {
                MRPR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 19:23 - Tx Arbitration Start Delay"]
            #[inline(always)]
            pub fn tasd(&self) -> TASDR {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 19;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TASDR { bits }
            }
            #[doc = "Bits 24:27 - Number Of Rx FIFO Filters"]
            #[inline(always)]
            pub fn rffn(&self) -> RFFNR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                RFFNR { bits }
            }
            #[doc = "Bit 30 - Bus Off Done Interrupt Mask"]
            #[inline(always)]
            pub fn boffdonemsk(&self) -> BOFFDONEMSKR {
                BOFFDONEMSKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Error Interrupt Mask for errors detected in the Data Phase of fast CAN FD frames"]
            #[inline(always)]
            pub fn errmsk_fast(&self) -> ERRMSK_FASTR {
                ERRMSK_FASTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 10485760 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 11 - Edge Filter Disable"]
            #[inline(always)]
            pub fn edfltdis(&mut self) -> _EDFLTDISW {
                _EDFLTDISW { w: self }
            }
            #[doc = "Bit 12 - ISO CAN FD Enable"]
            #[inline(always)]
            pub fn isocanfden(&mut self) -> _ISOCANFDENW {
                _ISOCANFDENW { w: self }
            }
            #[doc = "Bit 14 - Protocol Exception Enable"]
            #[inline(always)]
            pub fn prexcen(&mut self) -> _PREXCENW {
                _PREXCENW { w: self }
            }
            #[doc = "Bit 15 - Timer Source"]
            #[inline(always)]
            pub fn timer_src(&mut self) -> _TIMER_SRCW {
                _TIMER_SRCW { w: self }
            }
            #[doc = "Bit 16 - Entire Frame Arbitration Field Comparison Enable For Rx Mailboxes"]
            #[inline(always)]
            pub fn eacen(&mut self) -> _EACENW {
                _EACENW { w: self }
            }
            #[doc = "Bit 17 - Remote Request Storing"]
            #[inline(always)]
            pub fn rrs(&mut self) -> _RRSW {
                _RRSW { w: self }
            }
            #[doc = "Bit 18 - Mailboxes Reception Priority"]
            #[inline(always)]
            pub fn mrp(&mut self) -> _MRPW {
                _MRPW { w: self }
            }
            #[doc = "Bits 19:23 - Tx Arbitration Start Delay"]
            #[inline(always)]
            pub fn tasd(&mut self) -> _TASDW {
                _TASDW { w: self }
            }
            #[doc = "Bits 24:27 - Number Of Rx FIFO Filters"]
            #[inline(always)]
            pub fn rffn(&mut self) -> _RFFNW {
                _RFFNW { w: self }
            }
            #[doc = "Bit 30 - Bus Off Done Interrupt Mask"]
            #[inline(always)]
            pub fn boffdonemsk(&mut self) -> _BOFFDONEMSKW {
                _BOFFDONEMSKW { w: self }
            }
            #[doc = "Bit 31 - Error Interrupt Mask for errors detected in the Data Phase of fast CAN FD frames"]
            #[inline(always)]
            pub fn errmsk_fast(&mut self) -> _ERRMSK_FASTW {
                _ERRMSK_FASTW { w: self }
            }
        }
    }
    #[doc = "Error and Status 2 register"]
    pub struct ESR2 {
        register: VolatileCell<u32>,
    }
    #[doc = "Error and Status 2 register"]
    pub mod esr2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::ESR2 {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = "Possible values of the field `IMB`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IMBR {
            #[doc = "If ESR2[VPS] is asserted, the ESR2[LPTM] is not an inactive Mailbox."]
            _0,
            #[doc = "If ESR2[VPS] is asserted, there is at least one inactive Mailbox. LPTM content is the number of the first one."]
            _1,
        }
        impl IMBR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    IMBR::_0 => false,
                    IMBR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> IMBR {
                match value {
                    false => IMBR::_0,
                    true => IMBR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == IMBR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == IMBR::_1
            }
        }
        #[doc = "Possible values of the field `VPS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum VPSR {
            #[doc = "Contents of IMB and LPTM are invalid."]
            _0,
            #[doc = "Contents of IMB and LPTM are valid."]
            _1,
        }
        impl VPSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    VPSR::_0 => false,
                    VPSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> VPSR {
                match value {
                    false => VPSR::_0,
                    true => VPSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == VPSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == VPSR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct LPTMR {
            bits: u8,
        }
        impl LPTMR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 13 - Inactive Mailbox"]
            #[inline(always)]
            pub fn imb(&self) -> IMBR {
                IMBR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - Valid Priority Status"]
            #[inline(always)]
            pub fn vps(&self) -> VPSR {
                VPSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:22 - Lowest Priority Tx Mailbox"]
            #[inline(always)]
            pub fn lptm(&self) -> LPTMR {
                let bits = {
                    const MASK: u8 = 127;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                LPTMR { bits }
            }
        }
    }
    #[doc = "CRC Register"]
    pub struct CRCR {
        register: VolatileCell<u32>,
    }
    #[doc = "CRC Register"]
    pub mod crcr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::CRCR {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct TXCRCR {
            bits: u16,
        }
        impl TXCRCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct MBCRCR {
            bits: u8,
        }
        impl MBCRCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:14 - Transmitted CRC value"]
            #[inline(always)]
            pub fn txcrc(&self) -> TXCRCR {
                let bits = {
                    const MASK: u16 = 32767;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                TXCRCR { bits }
            }
            #[doc = "Bits 16:22 - CRC Mailbox"]
            #[inline(always)]
            pub fn mbcrc(&self) -> MBCRCR {
                let bits = {
                    const MASK: u8 = 127;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                MBCRCR { bits }
            }
        }
    }
    #[doc = "Rx FIFO Global Mask register"]
    pub struct RXFGMASK {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx FIFO Global Mask register"]
    pub mod rxfgmask {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXFGMASK {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct FGMR {
            bits: u32,
        }
        impl FGMR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _FGMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FGMW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Rx FIFO Global Mask Bits"]
            #[inline(always)]
            pub fn fgm(&self) -> FGMR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                FGMR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Rx FIFO Global Mask Bits"]
            #[inline(always)]
            pub fn fgm(&mut self) -> _FGMW {
                _FGMW { w: self }
            }
        }
    }
    #[doc = "Rx FIFO Information Register"]
    pub struct RXFIR {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx FIFO Information Register"]
    pub mod rxfir {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::RXFIR {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct IDHITR {
            bits: u16,
        }
        impl IDHITR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:8 - Identifier Acceptance Filter Hit Indicator"]
            #[inline(always)]
            pub fn idhit(&self) -> IDHITR {
                let bits = {
                    const MASK: u16 = 511;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                IDHITR { bits }
            }
        }
    }
    #[doc = "CAN Bit Timing Register"]
    pub struct CBT {
        register: VolatileCell<u32>,
    }
    #[doc = "CAN Bit Timing Register"]
    pub mod cbt {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CBT {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct EPSEG2R {
            bits: u8,
        }
        impl EPSEG2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct EPSEG1R {
            bits: u8,
        }
        impl EPSEG1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct EPROPSEGR {
            bits: u8,
        }
        impl EPROPSEGR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct ERJWR {
            bits: u8,
        }
        impl ERJWR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct EPRESDIVR {
            bits: u16,
        }
        impl EPRESDIVR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `BTF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BTFR {
            #[doc = "Extended bit time definitions disabled."]
            _0,
            #[doc = "Extended bit time definitions enabled."]
            _1,
        }
        impl BTFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BTFR::_0 => false,
                    BTFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BTFR {
                match value {
                    false => BTFR::_0,
                    true => BTFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BTFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BTFR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _EPSEG2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _EPSEG2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _EPSEG1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _EPSEG1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _EPROPSEGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _EPROPSEGW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERJWW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERJWW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _EPRESDIVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _EPRESDIVW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 1023;
                const OFFSET: u8 = 21;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BTF`"]
        pub enum BTFW {
            #[doc = "Extended bit time definitions disabled."]
            _0,
            #[doc = "Extended bit time definitions enabled."]
            _1,
        }
        impl BTFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    BTFW::_0 => false,
                    BTFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BTFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BTFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BTFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Extended bit time definitions disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BTFW::_0)
            }
            #[doc = "Extended bit time definitions enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BTFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:4 - Extended Phase Segment 2"]
            #[inline(always)]
            pub fn epseg2(&self) -> EPSEG2R {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                EPSEG2R { bits }
            }
            #[doc = "Bits 5:9 - Extended Phase Segment 1"]
            #[inline(always)]
            pub fn epseg1(&self) -> EPSEG1R {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                EPSEG1R { bits }
            }
            #[doc = "Bits 10:15 - Extended Propagation Segment"]
            #[inline(always)]
            pub fn epropseg(&self) -> EPROPSEGR {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                EPROPSEGR { bits }
            }
            #[doc = "Bits 16:20 - Extended Resync Jump Width"]
            #[inline(always)]
            pub fn erjw(&self) -> ERJWR {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                ERJWR { bits }
            }
            #[doc = "Bits 21:30 - Extended Prescaler Division Factor"]
            #[inline(always)]
            pub fn epresdiv(&self) -> EPRESDIVR {
                let bits = {
                    const MASK: u16 = 1023;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                EPRESDIVR { bits }
            }
            #[doc = "Bit 31 - Bit Timing Format Enable"]
            #[inline(always)]
            pub fn btf(&self) -> BTFR {
                BTFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:4 - Extended Phase Segment 2"]
            #[inline(always)]
            pub fn epseg2(&mut self) -> _EPSEG2W {
                _EPSEG2W { w: self }
            }
            #[doc = "Bits 5:9 - Extended Phase Segment 1"]
            #[inline(always)]
            pub fn epseg1(&mut self) -> _EPSEG1W {
                _EPSEG1W { w: self }
            }
            #[doc = "Bits 10:15 - Extended Propagation Segment"]
            #[inline(always)]
            pub fn epropseg(&mut self) -> _EPROPSEGW {
                _EPROPSEGW { w: self }
            }
            #[doc = "Bits 16:20 - Extended Resync Jump Width"]
            #[inline(always)]
            pub fn erjw(&mut self) -> _ERJWW {
                _ERJWW { w: self }
            }
            #[doc = "Bits 21:30 - Extended Prescaler Division Factor"]
            #[inline(always)]
            pub fn epresdiv(&mut self) -> _EPRESDIVW {
                _EPRESDIVW { w: self }
            }
            #[doc = "Bit 31 - Bit Timing Format Enable"]
            #[inline(always)]
            pub fn btf(&mut self) -> _BTFW {
                _BTFW { w: self }
            }
        }
    }
    #[doc = "Embedded RAM"]
    pub struct EMBEDDEDRAM {
        register: VolatileCell<u32>,
    }
    #[doc = "Embedded RAM"]
    pub mod embedded_ram {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EMBEDDEDRAM {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_3R {
            bits: u8,
        }
        impl DATA_BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_2R {
            bits: u8,
        }
        impl DATA_BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_1R {
            bits: u8,
        }
        impl DATA_BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_0R {
            bits: u8,
        }
        impl DATA_BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn data_byte_3(&self) -> DATA_BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn data_byte_2(&self) -> DATA_BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn data_byte_1(&self) -> DATA_BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn data_byte_0(&self) -> DATA_BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn data_byte_3(&mut self) -> _DATA_BYTE_3W {
                _DATA_BYTE_3W { w: self }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn data_byte_2(&mut self) -> _DATA_BYTE_2W {
                _DATA_BYTE_2W { w: self }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn data_byte_1(&mut self) -> _DATA_BYTE_1W {
                _DATA_BYTE_1W { w: self }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn data_byte_0(&mut self) -> _DATA_BYTE_0W {
                _DATA_BYTE_0W { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR0 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR2 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR3 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr3 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR3 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR4 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr4 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR4 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR5 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr5 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR5 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR6 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr6 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR6 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR7 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr7 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR7 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR8 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr8 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR8 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR9 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr9 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR9 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR10 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr10 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR10 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR11 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr11 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR11 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR12 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr12 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR12 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR13 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr13 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR13 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR14 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr14 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR14 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR15 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr15 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR15 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Pretended Networking Control 1 Register"]
    pub struct CTRL1_PN {
        register: VolatileCell<u32>,
    }
    #[doc = "Pretended Networking Control 1 Register"]
    pub mod ctrl1_pn {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CTRL1_PN {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `FCS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FCSR {
            #[doc = "Message ID filtering only"]
            _00,
            #[doc = "Message ID filtering and payload filtering"]
            _01,
            #[doc = "Message ID filtering occurring a specified number of times."]
            _10,
            #[doc = "Message ID filtering and payload filtering a specified number of times"]
            _11,
        }
        impl FCSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    FCSR::_00 => 0,
                    FCSR::_01 => 1,
                    FCSR::_10 => 2,
                    FCSR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> FCSR {
                match value {
                    0 => FCSR::_00,
                    1 => FCSR::_01,
                    2 => FCSR::_10,
                    3 => FCSR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == FCSR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == FCSR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == FCSR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == FCSR::_11
            }
        }
        #[doc = "Possible values of the field `IDFS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IDFSR {
            #[doc = "Match upon a ID contents against an exact target value"]
            _00,
            #[doc = "Match upon a ID value greater than or equal to a specified target value"]
            _01,
            #[doc = "Match upon a ID value smaller than or equal to a specified target value"]
            _10,
            #[doc = "Match upon a ID value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"]
            _11,
        }
        impl IDFSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IDFSR::_00 => 0,
                    IDFSR::_01 => 1,
                    IDFSR::_10 => 2,
                    IDFSR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IDFSR {
                match value {
                    0 => IDFSR::_00,
                    1 => IDFSR::_01,
                    2 => IDFSR::_10,
                    3 => IDFSR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == IDFSR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == IDFSR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == IDFSR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == IDFSR::_11
            }
        }
        #[doc = "Possible values of the field `PLFS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PLFSR {
            #[doc = "Match upon a payload contents against an exact target value"]
            _00,
            #[doc = "Match upon a payload value greater than or equal to a specified target value"]
            _01,
            #[doc = "Match upon a payload value smaller than or equal to a specified target value"]
            _10,
            #[doc = "Match upon a payload value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"]
            _11,
        }
        impl PLFSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PLFSR::_00 => 0,
                    PLFSR::_01 => 1,
                    PLFSR::_10 => 2,
                    PLFSR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PLFSR {
                match value {
                    0 => PLFSR::_00,
                    1 => PLFSR::_01,
                    2 => PLFSR::_10,
                    3 => PLFSR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == PLFSR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == PLFSR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == PLFSR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == PLFSR::_11
            }
        }
        #[doc = "Possible values of the field `NMATCH`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum NMATCHR {
            #[doc = "Received message must match the predefined filtering criteria for ID and/or PL once before generating a wake up event."]
            _00000001,
            #[doc = "Received message must match the predefined filtering criteria for ID and/or PL twice before generating a wake up event."]
            _00000010,
            #[doc = "Received message must match the predefined filtering criteria for ID and/or PL 255 times before generating a wake up event."]
            _11111111,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl NMATCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    NMATCHR::_00000001 => 1,
                    NMATCHR::_00000010 => 2,
                    NMATCHR::_11111111 => 255,
                    NMATCHR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> NMATCHR {
                match value {
                    1 => NMATCHR::_00000001,
                    2 => NMATCHR::_00000010,
                    255 => NMATCHR::_11111111,
                    i => NMATCHR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_00000001`"]
            #[inline(always)]
            pub fn is_00000001(&self) -> bool {
                *self == NMATCHR::_00000001
            }
            #[doc = "Checks if the value of the field is `_00000010`"]
            #[inline(always)]
            pub fn is_00000010(&self) -> bool {
                *self == NMATCHR::_00000010
            }
            #[doc = "Checks if the value of the field is `_11111111`"]
            #[inline(always)]
            pub fn is_11111111(&self) -> bool {
                *self == NMATCHR::_11111111
            }
        }
        #[doc = "Possible values of the field `WUMF_MSK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WUMF_MSKR {
            #[doc = "Wake up match event is disabled"]
            _0,
            #[doc = "Wake up match event is enabled"]
            _1,
        }
        impl WUMF_MSKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WUMF_MSKR::_0 => false,
                    WUMF_MSKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WUMF_MSKR {
                match value {
                    false => WUMF_MSKR::_0,
                    true => WUMF_MSKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WUMF_MSKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WUMF_MSKR::_1
            }
        }
        #[doc = "Possible values of the field `WTOF_MSK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WTOF_MSKR {
            #[doc = "Timeout wake up event is disabled"]
            _0,
            #[doc = "Timeout wake up event is enabled"]
            _1,
        }
        impl WTOF_MSKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WTOF_MSKR::_0 => false,
                    WTOF_MSKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WTOF_MSKR {
                match value {
                    false => WTOF_MSKR::_0,
                    true => WTOF_MSKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WTOF_MSKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WTOF_MSKR::_1
            }
        }
        #[doc = "Values that can be written to the field `FCS`"]
        pub enum FCSW {
            #[doc = "Message ID filtering only"]
            _00,
            #[doc = "Message ID filtering and payload filtering"]
            _01,
            #[doc = "Message ID filtering occurring a specified number of times."]
            _10,
            #[doc = "Message ID filtering and payload filtering a specified number of times"]
            _11,
        }
        impl FCSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    FCSW::_00 => 0,
                    FCSW::_01 => 1,
                    FCSW::_10 => 2,
                    FCSW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FCSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FCSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FCSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Message ID filtering only"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(FCSW::_00)
            }
            #[doc = "Message ID filtering and payload filtering"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(FCSW::_01)
            }
            #[doc = "Message ID filtering occurring a specified number of times."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(FCSW::_10)
            }
            #[doc = "Message ID filtering and payload filtering a specified number of times"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(FCSW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IDFS`"]
        pub enum IDFSW {
            #[doc = "Match upon a ID contents against an exact target value"]
            _00,
            #[doc = "Match upon a ID value greater than or equal to a specified target value"]
            _01,
            #[doc = "Match upon a ID value smaller than or equal to a specified target value"]
            _10,
            #[doc = "Match upon a ID value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"]
            _11,
        }
        impl IDFSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IDFSW::_00 => 0,
                    IDFSW::_01 => 1,
                    IDFSW::_10 => 2,
                    IDFSW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IDFSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IDFSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IDFSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Match upon a ID contents against an exact target value"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(IDFSW::_00)
            }
            #[doc = "Match upon a ID value greater than or equal to a specified target value"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(IDFSW::_01)
            }
            #[doc = "Match upon a ID value smaller than or equal to a specified target value"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(IDFSW::_10)
            }
            #[doc = "Match upon a ID value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(IDFSW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PLFS`"]
        pub enum PLFSW {
            #[doc = "Match upon a payload contents against an exact target value"]
            _00,
            #[doc = "Match upon a payload value greater than or equal to a specified target value"]
            _01,
            #[doc = "Match upon a payload value smaller than or equal to a specified target value"]
            _10,
            #[doc = "Match upon a payload value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"]
            _11,
        }
        impl PLFSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PLFSW::_00 => 0,
                    PLFSW::_01 => 1,
                    PLFSW::_10 => 2,
                    PLFSW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PLFSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PLFSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PLFSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Match upon a payload contents against an exact target value"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(PLFSW::_00)
            }
            #[doc = "Match upon a payload value greater than or equal to a specified target value"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(PLFSW::_01)
            }
            #[doc = "Match upon a payload value smaller than or equal to a specified target value"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(PLFSW::_10)
            }
            #[doc = "Match upon a payload value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(PLFSW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `NMATCH`"]
        pub enum NMATCHW {
            #[doc = "Received message must match the predefined filtering criteria for ID and/or PL once before generating a wake up event."]
            _00000001,
            #[doc = "Received message must match the predefined filtering criteria for ID and/or PL twice before generating a wake up event."]
            _00000010,
            #[doc = "Received message must match the predefined filtering criteria for ID and/or PL 255 times before generating a wake up event."]
            _11111111,
        }
        impl NMATCHW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    NMATCHW::_00000001 => 1,
                    NMATCHW::_00000010 => 2,
                    NMATCHW::_11111111 => 255,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _NMATCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NMATCHW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: NMATCHW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Received message must match the predefined filtering criteria for ID and/or PL once before generating a wake up event."]
            #[inline(always)]
            pub fn _00000001(self) -> &'a mut W {
                self.variant(NMATCHW::_00000001)
            }
            #[doc = "Received message must match the predefined filtering criteria for ID and/or PL twice before generating a wake up event."]
            #[inline(always)]
            pub fn _00000010(self) -> &'a mut W {
                self.variant(NMATCHW::_00000010)
            }
            #[doc = "Received message must match the predefined filtering criteria for ID and/or PL 255 times before generating a wake up event."]
            #[inline(always)]
            pub fn _11111111(self) -> &'a mut W {
                self.variant(NMATCHW::_11111111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WUMF_MSK`"]
        pub enum WUMF_MSKW {
            #[doc = "Wake up match event is disabled"]
            _0,
            #[doc = "Wake up match event is enabled"]
            _1,
        }
        impl WUMF_MSKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WUMF_MSKW::_0 => false,
                    WUMF_MSKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WUMF_MSKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WUMF_MSKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WUMF_MSKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Wake up match event is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WUMF_MSKW::_0)
            }
            #[doc = "Wake up match event is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WUMF_MSKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WTOF_MSK`"]
        pub enum WTOF_MSKW {
            #[doc = "Timeout wake up event is disabled"]
            _0,
            #[doc = "Timeout wake up event is enabled"]
            _1,
        }
        impl WTOF_MSKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WTOF_MSKW::_0 => false,
                    WTOF_MSKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WTOF_MSKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WTOF_MSKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WTOF_MSKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Timeout wake up event is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WTOF_MSKW::_0)
            }
            #[doc = "Timeout wake up event is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WTOF_MSKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:1 - Filtering Combination Selection"]
            #[inline(always)]
            pub fn fcs(&self) -> FCSR {
                FCSR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 2:3 - ID Filtering Selection"]
            #[inline(always)]
            pub fn idfs(&self) -> IDFSR {
                IDFSR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 4:5 - Payload Filtering Selection"]
            #[inline(always)]
            pub fn plfs(&self) -> PLFSR {
                PLFSR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 8:15 - Number of Messages Matching the Same Filtering Criteria"]
            #[inline(always)]
            pub fn nmatch(&self) -> NMATCHR {
                NMATCHR::_from({
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 16 - Wake Up by Match Flag Mask Bit"]
            #[inline(always)]
            pub fn wumf_msk(&self) -> WUMF_MSKR {
                WUMF_MSKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - Wake Up by Timeout Flag Mask Bit"]
            #[inline(always)]
            pub fn wtof_msk(&self) -> WTOF_MSKR {
                WTOF_MSKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 256 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:1 - Filtering Combination Selection"]
            #[inline(always)]
            pub fn fcs(&mut self) -> _FCSW {
                _FCSW { w: self }
            }
            #[doc = "Bits 2:3 - ID Filtering Selection"]
            #[inline(always)]
            pub fn idfs(&mut self) -> _IDFSW {
                _IDFSW { w: self }
            }
            #[doc = "Bits 4:5 - Payload Filtering Selection"]
            #[inline(always)]
            pub fn plfs(&mut self) -> _PLFSW {
                _PLFSW { w: self }
            }
            #[doc = "Bits 8:15 - Number of Messages Matching the Same Filtering Criteria"]
            #[inline(always)]
            pub fn nmatch(&mut self) -> _NMATCHW {
                _NMATCHW { w: self }
            }
            #[doc = "Bit 16 - Wake Up by Match Flag Mask Bit"]
            #[inline(always)]
            pub fn wumf_msk(&mut self) -> _WUMF_MSKW {
                _WUMF_MSKW { w: self }
            }
            #[doc = "Bit 17 - Wake Up by Timeout Flag Mask Bit"]
            #[inline(always)]
            pub fn wtof_msk(&mut self) -> _WTOF_MSKW {
                _WTOF_MSKW { w: self }
            }
        }
    }
    #[doc = "Pretended Networking Control 2 Register"]
    pub struct CTRL2_PN {
        register: VolatileCell<u32>,
    }
    #[doc = "Pretended Networking Control 2 Register"]
    pub mod ctrl2_pn {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CTRL2_PN {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MATCHTOR {
            bits: u16,
        }
        impl MATCHTOR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MATCHTOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MATCHTOW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Timeout for No Message Matching the Filtering Criteria"]
            #[inline(always)]
            pub fn matchto(&self) -> MATCHTOR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                MATCHTOR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Timeout for No Message Matching the Filtering Criteria"]
            #[inline(always)]
            pub fn matchto(&mut self) -> _MATCHTOW {
                _MATCHTOW { w: self }
            }
        }
    }
    #[doc = "Pretended Networking Wake Up Match Register"]
    pub struct WU_MTC {
        register: VolatileCell<u32>,
    }
    #[doc = "Pretended Networking Wake Up Match Register"]
    pub mod wu_mtc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::WU_MTC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MCOUNTERR {
            bits: u8,
        }
        impl MCOUNTERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `WUMF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WUMFR {
            #[doc = "No wake up by match event detected"]
            _0,
            #[doc = "Wake up by match event detected"]
            _1,
        }
        impl WUMFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WUMFR::_0 => false,
                    WUMFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WUMFR {
                match value {
                    false => WUMFR::_0,
                    true => WUMFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WUMFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WUMFR::_1
            }
        }
        #[doc = "Possible values of the field `WTOF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WTOFR {
            #[doc = "No wake up by timeout event detected"]
            _0,
            #[doc = "Wake up by timeout event detected"]
            _1,
        }
        impl WTOFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WTOFR::_0 => false,
                    WTOFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WTOFR {
                match value {
                    false => WTOFR::_0,
                    true => WTOFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WTOFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WTOFR::_1
            }
        }
        #[doc = "Values that can be written to the field `WUMF`"]
        pub enum WUMFW {
            #[doc = "No wake up by match event detected"]
            _0,
            #[doc = "Wake up by match event detected"]
            _1,
        }
        impl WUMFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WUMFW::_0 => false,
                    WUMFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WUMFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WUMFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WUMFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No wake up by match event detected"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WUMFW::_0)
            }
            #[doc = "Wake up by match event detected"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WUMFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WTOF`"]
        pub enum WTOFW {
            #[doc = "No wake up by timeout event detected"]
            _0,
            #[doc = "Wake up by timeout event detected"]
            _1,
        }
        impl WTOFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WTOFW::_0 => false,
                    WTOFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WTOFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WTOFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WTOFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No wake up by timeout event detected"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WTOFW::_0)
            }
            #[doc = "Wake up by timeout event detected"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WTOFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 8:15 - Number of Matches while in Pretended Networking"]
            #[inline(always)]
            pub fn mcounter(&self) -> MCOUNTERR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                MCOUNTERR { bits }
            }
            #[doc = "Bit 16 - Wake Up by Match Flag Bit"]
            #[inline(always)]
            pub fn wumf(&self) -> WUMFR {
                WUMFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - Wake Up by Timeout Flag Bit"]
            #[inline(always)]
            pub fn wtof(&self) -> WTOFR {
                WTOFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 16 - Wake Up by Match Flag Bit"]
            #[inline(always)]
            pub fn wumf(&mut self) -> _WUMFW {
                _WUMFW { w: self }
            }
            #[doc = "Bit 17 - Wake Up by Timeout Flag Bit"]
            #[inline(always)]
            pub fn wtof(&mut self) -> _WTOFW {
                _WTOFW { w: self }
            }
        }
    }
    #[doc = "Pretended Networking ID Filter 1 Register"]
    pub struct FLT_ID1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pretended Networking ID Filter 1 Register"]
    pub mod flt_id1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FLT_ID1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct FLT_ID1R {
            bits: u32,
        }
        impl FLT_ID1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `FLT_RTR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FLT_RTRR {
            #[doc = "Reject remote frame (accept data frame)"]
            _0,
            #[doc = "Accept remote frame"]
            _1,
        }
        impl FLT_RTRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FLT_RTRR::_0 => false,
                    FLT_RTRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FLT_RTRR {
                match value {
                    false => FLT_RTRR::_0,
                    true => FLT_RTRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FLT_RTRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FLT_RTRR::_1
            }
        }
        #[doc = "Possible values of the field `FLT_IDE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FLT_IDER {
            #[doc = "Accept standard frame format"]
            _0,
            #[doc = "Accept extended frame format"]
            _1,
        }
        impl FLT_IDER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FLT_IDER::_0 => false,
                    FLT_IDER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FLT_IDER {
                match value {
                    false => FLT_IDER::_0,
                    true => FLT_IDER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FLT_IDER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FLT_IDER::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _FLT_ID1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _FLT_ID1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 536870911;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FLT_RTR`"]
        pub enum FLT_RTRW {
            #[doc = "Reject remote frame (accept data frame)"]
            _0,
            #[doc = "Accept remote frame"]
            _1,
        }
        impl FLT_RTRW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FLT_RTRW::_0 => false,
                    FLT_RTRW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FLT_RTRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FLT_RTRW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FLT_RTRW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Reject remote frame (accept data frame)"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FLT_RTRW::_0)
            }
            #[doc = "Accept remote frame"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FLT_RTRW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 29;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FLT_IDE`"]
        pub enum FLT_IDEW {
            #[doc = "Accept standard frame format"]
            _0,
            #[doc = "Accept extended frame format"]
            _1,
        }
        impl FLT_IDEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FLT_IDEW::_0 => false,
                    FLT_IDEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FLT_IDEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FLT_IDEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FLT_IDEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accept standard frame format"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FLT_IDEW::_0)
            }
            #[doc = "Accept extended frame format"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FLT_IDEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:28 - ID Filter 1 for Pretended Networking filtering"]
            #[inline(always)]
            pub fn flt_id1(&self) -> FLT_ID1R {
                let bits = {
                    const MASK: u32 = 536870911;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                FLT_ID1R { bits }
            }
            #[doc = "Bit 29 - Remote Transmission Request Filter"]
            #[inline(always)]
            pub fn flt_rtr(&self) -> FLT_RTRR {
                FLT_RTRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 29;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 30 - ID Extended Filter"]
            #[inline(always)]
            pub fn flt_ide(&self) -> FLT_IDER {
                FLT_IDER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:28 - ID Filter 1 for Pretended Networking filtering"]
            #[inline(always)]
            pub fn flt_id1(&mut self) -> _FLT_ID1W {
                _FLT_ID1W { w: self }
            }
            #[doc = "Bit 29 - Remote Transmission Request Filter"]
            #[inline(always)]
            pub fn flt_rtr(&mut self) -> _FLT_RTRW {
                _FLT_RTRW { w: self }
            }
            #[doc = "Bit 30 - ID Extended Filter"]
            #[inline(always)]
            pub fn flt_ide(&mut self) -> _FLT_IDEW {
                _FLT_IDEW { w: self }
            }
        }
    }
    #[doc = "Pretended Networking DLC Filter Register"]
    pub struct FLT_DLC {
        register: VolatileCell<u32>,
    }
    #[doc = "Pretended Networking DLC Filter Register"]
    pub mod flt_dlc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FLT_DLC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct FLT_DLC_HIR {
            bits: u8,
        }
        impl FLT_DLC_HIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct FLT_DLC_LOR {
            bits: u8,
        }
        impl FLT_DLC_LOR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _FLT_DLC_HIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FLT_DLC_HIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _FLT_DLC_LOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FLT_DLC_LOW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:3 - Upper Limit for Length of Data Bytes Filter"]
            #[inline(always)]
            pub fn flt_dlc_hi(&self) -> FLT_DLC_HIR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                FLT_DLC_HIR { bits }
            }
            #[doc = "Bits 16:19 - Lower Limit for Length of Data Bytes Filter"]
            #[inline(always)]
            pub fn flt_dlc_lo(&self) -> FLT_DLC_LOR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                FLT_DLC_LOR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 8 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Upper Limit for Length of Data Bytes Filter"]
            #[inline(always)]
            pub fn flt_dlc_hi(&mut self) -> _FLT_DLC_HIW {
                _FLT_DLC_HIW { w: self }
            }
            #[doc = "Bits 16:19 - Lower Limit for Length of Data Bytes Filter"]
            #[inline(always)]
            pub fn flt_dlc_lo(&mut self) -> _FLT_DLC_LOW {
                _FLT_DLC_LOW { w: self }
            }
        }
    }
    #[doc = "Pretended Networking Payload Low Filter 1 Register"]
    pub struct PL1_LO {
        register: VolatileCell<u32>,
    }
    #[doc = "Pretended Networking Payload Low Filter 1 Register"]
    pub mod pl1_lo {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PL1_LO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_3R {
            bits: u8,
        }
        impl DATA_BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_2R {
            bits: u8,
        }
        impl DATA_BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_1R {
            bits: u8,
        }
        impl DATA_BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_0R {
            bits: u8,
        }
        impl DATA_BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 3."]
            #[inline(always)]
            pub fn data_byte_3(&self) -> DATA_BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 2."]
            #[inline(always)]
            pub fn data_byte_2(&self) -> DATA_BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 1."]
            #[inline(always)]
            pub fn data_byte_1(&self) -> DATA_BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 0."]
            #[inline(always)]
            pub fn data_byte_0(&self) -> DATA_BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 3."]
            #[inline(always)]
            pub fn data_byte_3(&mut self) -> _DATA_BYTE_3W {
                _DATA_BYTE_3W { w: self }
            }
            #[doc = "Bits 8:15 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 2."]
            #[inline(always)]
            pub fn data_byte_2(&mut self) -> _DATA_BYTE_2W {
                _DATA_BYTE_2W { w: self }
            }
            #[doc = "Bits 16:23 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 1."]
            #[inline(always)]
            pub fn data_byte_1(&mut self) -> _DATA_BYTE_1W {
                _DATA_BYTE_1W { w: self }
            }
            #[doc = "Bits 24:31 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 0."]
            #[inline(always)]
            pub fn data_byte_0(&mut self) -> _DATA_BYTE_0W {
                _DATA_BYTE_0W { w: self }
            }
        }
    }
    #[doc = "Pretended Networking Payload High Filter 1 Register"]
    pub struct PL1_HI {
        register: VolatileCell<u32>,
    }
    #[doc = "Pretended Networking Payload High Filter 1 Register"]
    pub mod pl1_hi {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PL1_HI {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_7R {
            bits: u8,
        }
        impl DATA_BYTE_7R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_6R {
            bits: u8,
        }
        impl DATA_BYTE_6R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_5R {
            bits: u8,
        }
        impl DATA_BYTE_5R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_4R {
            bits: u8,
        }
        impl DATA_BYTE_4R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_7W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_7W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_6W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_6W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_5W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_4W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_4W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 7."]
            #[inline(always)]
            pub fn data_byte_7(&self) -> DATA_BYTE_7R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_7R { bits }
            }
            #[doc = "Bits 8:15 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 6."]
            #[inline(always)]
            pub fn data_byte_6(&self) -> DATA_BYTE_6R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_6R { bits }
            }
            #[doc = "Bits 16:23 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 5."]
            #[inline(always)]
            pub fn data_byte_5(&self) -> DATA_BYTE_5R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_5R { bits }
            }
            #[doc = "Bits 24:31 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 4."]
            #[inline(always)]
            pub fn data_byte_4(&self) -> DATA_BYTE_4R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_4R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 7."]
            #[inline(always)]
            pub fn data_byte_7(&mut self) -> _DATA_BYTE_7W {
                _DATA_BYTE_7W { w: self }
            }
            #[doc = "Bits 8:15 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 6."]
            #[inline(always)]
            pub fn data_byte_6(&mut self) -> _DATA_BYTE_6W {
                _DATA_BYTE_6W { w: self }
            }
            #[doc = "Bits 16:23 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 5."]
            #[inline(always)]
            pub fn data_byte_5(&mut self) -> _DATA_BYTE_5W {
                _DATA_BYTE_5W { w: self }
            }
            #[doc = "Bits 24:31 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 4."]
            #[inline(always)]
            pub fn data_byte_4(&mut self) -> _DATA_BYTE_4W {
                _DATA_BYTE_4W { w: self }
            }
        }
    }
    #[doc = "Pretended Networking ID Filter 2 Register / ID Mask Register"]
    pub struct FLT_ID2_IDMASK {
        register: VolatileCell<u32>,
    }
    #[doc = "Pretended Networking ID Filter 2 Register / ID Mask Register"]
    pub mod flt_id2_idmask {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FLT_ID2_IDMASK {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct FLT_ID2_IDMASKR {
            bits: u32,
        }
        impl FLT_ID2_IDMASKR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `RTR_MSK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RTR_MSKR {
            #[doc = "The corresponding bit in the filter is \"don't care\""]
            _0,
            #[doc = "The corresponding bit in the filter is checked"]
            _1,
        }
        impl RTR_MSKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RTR_MSKR::_0 => false,
                    RTR_MSKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RTR_MSKR {
                match value {
                    false => RTR_MSKR::_0,
                    true => RTR_MSKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RTR_MSKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RTR_MSKR::_1
            }
        }
        #[doc = "Possible values of the field `IDE_MSK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IDE_MSKR {
            #[doc = "The corresponding bit in the filter is \"don't care\""]
            _0,
            #[doc = "The corresponding bit in the filter is checked"]
            _1,
        }
        impl IDE_MSKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    IDE_MSKR::_0 => false,
                    IDE_MSKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> IDE_MSKR {
                match value {
                    false => IDE_MSKR::_0,
                    true => IDE_MSKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == IDE_MSKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == IDE_MSKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _FLT_ID2_IDMASKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FLT_ID2_IDMASKW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 536870911;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RTR_MSK`"]
        pub enum RTR_MSKW {
            #[doc = "The corresponding bit in the filter is \"don't care\""]
            _0,
            #[doc = "The corresponding bit in the filter is checked"]
            _1,
        }
        impl RTR_MSKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RTR_MSKW::_0 => false,
                    RTR_MSKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RTR_MSKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RTR_MSKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RTR_MSKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The corresponding bit in the filter is \"don't care\""]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RTR_MSKW::_0)
            }
            #[doc = "The corresponding bit in the filter is checked"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RTR_MSKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 29;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IDE_MSK`"]
        pub enum IDE_MSKW {
            #[doc = "The corresponding bit in the filter is \"don't care\""]
            _0,
            #[doc = "The corresponding bit in the filter is checked"]
            _1,
        }
        impl IDE_MSKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    IDE_MSKW::_0 => false,
                    IDE_MSKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IDE_MSKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IDE_MSKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IDE_MSKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The corresponding bit in the filter is \"don't care\""]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(IDE_MSKW::_0)
            }
            #[doc = "The corresponding bit in the filter is checked"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(IDE_MSKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:28 - ID Filter 2 for Pretended Networking Filtering / ID Mask Bits for Pretended Networking ID Filtering"]
            #[inline(always)]
            pub fn flt_id2_idmask(&self) -> FLT_ID2_IDMASKR {
                let bits = {
                    const MASK: u32 = 536870911;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                FLT_ID2_IDMASKR { bits }
            }
            #[doc = "Bit 29 - Remote Transmission Request Mask Bit"]
            #[inline(always)]
            pub fn rtr_msk(&self) -> RTR_MSKR {
                RTR_MSKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 29;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 30 - ID Extended Mask Bit"]
            #[inline(always)]
            pub fn ide_msk(&self) -> IDE_MSKR {
                IDE_MSKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:28 - ID Filter 2 for Pretended Networking Filtering / ID Mask Bits for Pretended Networking ID Filtering"]
            #[inline(always)]
            pub fn flt_id2_idmask(&mut self) -> _FLT_ID2_IDMASKW {
                _FLT_ID2_IDMASKW { w: self }
            }
            #[doc = "Bit 29 - Remote Transmission Request Mask Bit"]
            #[inline(always)]
            pub fn rtr_msk(&mut self) -> _RTR_MSKW {
                _RTR_MSKW { w: self }
            }
            #[doc = "Bit 30 - ID Extended Mask Bit"]
            #[inline(always)]
            pub fn ide_msk(&mut self) -> _IDE_MSKW {
                _IDE_MSKW { w: self }
            }
        }
    }
    #[doc = "Pretended Networking Payload Low Filter 2 Register / Payload Low Mask Register"]
    pub struct PL2_PLMASK_LO {
        register: VolatileCell<u32>,
    }
    #[doc = "Pretended Networking Payload Low Filter 2 Register / Payload Low Mask Register"]
    pub mod pl2_plmask_lo {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PL2_PLMASK_LO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_3R {
            bits: u8,
        }
        impl DATA_BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_2R {
            bits: u8,
        }
        impl DATA_BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_1R {
            bits: u8,
        }
        impl DATA_BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_0R {
            bits: u8,
        }
        impl DATA_BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 3."]
            #[inline(always)]
            pub fn data_byte_3(&self) -> DATA_BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 2."]
            #[inline(always)]
            pub fn data_byte_2(&self) -> DATA_BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 1."]
            #[inline(always)]
            pub fn data_byte_1(&self) -> DATA_BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 0."]
            #[inline(always)]
            pub fn data_byte_0(&self) -> DATA_BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 3."]
            #[inline(always)]
            pub fn data_byte_3(&mut self) -> _DATA_BYTE_3W {
                _DATA_BYTE_3W { w: self }
            }
            #[doc = "Bits 8:15 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 2."]
            #[inline(always)]
            pub fn data_byte_2(&mut self) -> _DATA_BYTE_2W {
                _DATA_BYTE_2W { w: self }
            }
            #[doc = "Bits 16:23 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 1."]
            #[inline(always)]
            pub fn data_byte_1(&mut self) -> _DATA_BYTE_1W {
                _DATA_BYTE_1W { w: self }
            }
            #[doc = "Bits 24:31 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 0."]
            #[inline(always)]
            pub fn data_byte_0(&mut self) -> _DATA_BYTE_0W {
                _DATA_BYTE_0W { w: self }
            }
        }
    }
    #[doc = "Pretended Networking Payload High Filter 2 low order bits / Payload High Mask Register"]
    pub struct PL2_PLMASK_HI {
        register: VolatileCell<u32>,
    }
    #[doc = "Pretended Networking Payload High Filter 2 low order bits / Payload High Mask Register"]
    pub mod pl2_plmask_hi {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PL2_PLMASK_HI {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_7R {
            bits: u8,
        }
        impl DATA_BYTE_7R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_6R {
            bits: u8,
        }
        impl DATA_BYTE_6R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_5R {
            bits: u8,
        }
        impl DATA_BYTE_5R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_4R {
            bits: u8,
        }
        impl DATA_BYTE_4R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_7W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_7W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_6W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_6W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_5W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_4W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_4W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 7."]
            #[inline(always)]
            pub fn data_byte_7(&self) -> DATA_BYTE_7R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_7R { bits }
            }
            #[doc = "Bits 8:15 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 6."]
            #[inline(always)]
            pub fn data_byte_6(&self) -> DATA_BYTE_6R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_6R { bits }
            }
            #[doc = "Bits 16:23 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 5."]
            #[inline(always)]
            pub fn data_byte_5(&self) -> DATA_BYTE_5R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_5R { bits }
            }
            #[doc = "Bits 24:31 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 4."]
            #[inline(always)]
            pub fn data_byte_4(&self) -> DATA_BYTE_4R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_4R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 7."]
            #[inline(always)]
            pub fn data_byte_7(&mut self) -> _DATA_BYTE_7W {
                _DATA_BYTE_7W { w: self }
            }
            #[doc = "Bits 8:15 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 6."]
            #[inline(always)]
            pub fn data_byte_6(&mut self) -> _DATA_BYTE_6W {
                _DATA_BYTE_6W { w: self }
            }
            #[doc = "Bits 16:23 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 5."]
            #[inline(always)]
            pub fn data_byte_5(&mut self) -> _DATA_BYTE_5W {
                _DATA_BYTE_5W { w: self }
            }
            #[doc = "Bits 24:31 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 4."]
            #[inline(always)]
            pub fn data_byte_4(&mut self) -> _DATA_BYTE_4W {
                _DATA_BYTE_4W { w: self }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register for C/S"]
    pub struct WMB0_CS {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register for C/S"]
    pub mod wmb0_cs {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB0_CS {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLCR {
            bits: u8,
        }
        impl DLCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `RTR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RTRR {
            #[doc = "Frame is data one (not remote)"]
            _0,
            #[doc = "Frame is a remote one"]
            _1,
        }
        impl RTRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RTRR::_0 => false,
                    RTRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RTRR {
                match value {
                    false => RTRR::_0,
                    true => RTRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RTRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RTRR::_1
            }
        }
        #[doc = "Possible values of the field `IDE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IDER {
            #[doc = "Frame format is standard"]
            _0,
            #[doc = "Frame format is extended"]
            _1,
        }
        impl IDER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    IDER::_0 => false,
                    IDER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> IDER {
                match value {
                    false => IDER::_0,
                    true => IDER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == IDER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == IDER::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct SRRR {
            bits: bool,
        }
        impl SRRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 16:19 - Length of Data in Bytes"]
            #[inline(always)]
            pub fn dlc(&self) -> DLCR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DLCR { bits }
            }
            #[doc = "Bit 20 - Remote Transmission Request Bit"]
            #[inline(always)]
            pub fn rtr(&self) -> RTRR {
                RTRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - ID Extended Bit"]
            #[inline(always)]
            pub fn ide(&self) -> IDER {
                IDER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 22 - Substitute Remote Request"]
            #[inline(always)]
            pub fn srr(&self) -> SRRR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                SRRR { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register for ID"]
    pub struct WMB0_ID {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register for ID"]
    pub mod wmb0_id {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB0_ID {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct IDR {
            bits: u32,
        }
        impl IDR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:28 - Received ID under Pretended Networking mode"]
            #[inline(always)]
            pub fn id(&self) -> IDR {
                let bits = {
                    const MASK: u32 = 536870911;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                IDR { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register for Data 0-3"]
    pub struct WMB0_D03 {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register for Data 0-3"]
    pub mod wmb0_d03 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB0_D03 {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_3R {
            bits: u8,
        }
        impl DATA_BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_2R {
            bits: u8,
        }
        impl DATA_BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_1R {
            bits: u8,
        }
        impl DATA_BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_0R {
            bits: u8,
        }
        impl DATA_BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Received payload corresponding to the data byte 3 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_3(&self) -> DATA_BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Received payload corresponding to the data byte 2 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_2(&self) -> DATA_BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Received payload corresponding to the data byte 1 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_1(&self) -> DATA_BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Received payload corresponding to the data byte 0 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_0(&self) -> DATA_BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_0R { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register Data 4-7"]
    pub struct WMB0_D47 {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register Data 4-7"]
    pub mod wmb0_d47 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB0_D47 {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_7R {
            bits: u8,
        }
        impl DATA_BYTE_7R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_6R {
            bits: u8,
        }
        impl DATA_BYTE_6R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_5R {
            bits: u8,
        }
        impl DATA_BYTE_5R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_4R {
            bits: u8,
        }
        impl DATA_BYTE_4R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Received payload corresponding to the data byte 7 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_7(&self) -> DATA_BYTE_7R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_7R { bits }
            }
            #[doc = "Bits 8:15 - Received payload corresponding to the data byte 6 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_6(&self) -> DATA_BYTE_6R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_6R { bits }
            }
            #[doc = "Bits 16:23 - Received payload corresponding to the data byte 5 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_5(&self) -> DATA_BYTE_5R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_5R { bits }
            }
            #[doc = "Bits 24:31 - Received payload corresponding to the data byte 4 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_4(&self) -> DATA_BYTE_4R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_4R { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register for C/S"]
    pub struct WMB1_CS {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register for C/S"]
    pub mod wmb1_cs {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB1_CS {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLCR {
            bits: u8,
        }
        impl DLCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `RTR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RTRR {
            #[doc = "Frame is data one (not remote)"]
            _0,
            #[doc = "Frame is a remote one"]
            _1,
        }
        impl RTRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RTRR::_0 => false,
                    RTRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RTRR {
                match value {
                    false => RTRR::_0,
                    true => RTRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RTRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RTRR::_1
            }
        }
        #[doc = "Possible values of the field `IDE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IDER {
            #[doc = "Frame format is standard"]
            _0,
            #[doc = "Frame format is extended"]
            _1,
        }
        impl IDER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    IDER::_0 => false,
                    IDER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> IDER {
                match value {
                    false => IDER::_0,
                    true => IDER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == IDER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == IDER::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct SRRR {
            bits: bool,
        }
        impl SRRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 16:19 - Length of Data in Bytes"]
            #[inline(always)]
            pub fn dlc(&self) -> DLCR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DLCR { bits }
            }
            #[doc = "Bit 20 - Remote Transmission Request Bit"]
            #[inline(always)]
            pub fn rtr(&self) -> RTRR {
                RTRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - ID Extended Bit"]
            #[inline(always)]
            pub fn ide(&self) -> IDER {
                IDER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 22 - Substitute Remote Request"]
            #[inline(always)]
            pub fn srr(&self) -> SRRR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                SRRR { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register for ID"]
    pub struct WMB1_ID {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register for ID"]
    pub mod wmb1_id {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB1_ID {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct IDR {
            bits: u32,
        }
        impl IDR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:28 - Received ID under Pretended Networking mode"]
            #[inline(always)]
            pub fn id(&self) -> IDR {
                let bits = {
                    const MASK: u32 = 536870911;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                IDR { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register for Data 0-3"]
    pub struct WMB1_D03 {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register for Data 0-3"]
    pub mod wmb1_d03 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB1_D03 {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_3R {
            bits: u8,
        }
        impl DATA_BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_2R {
            bits: u8,
        }
        impl DATA_BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_1R {
            bits: u8,
        }
        impl DATA_BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_0R {
            bits: u8,
        }
        impl DATA_BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Received payload corresponding to the data byte 3 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_3(&self) -> DATA_BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Received payload corresponding to the data byte 2 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_2(&self) -> DATA_BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Received payload corresponding to the data byte 1 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_1(&self) -> DATA_BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Received payload corresponding to the data byte 0 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_0(&self) -> DATA_BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_0R { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register Data 4-7"]
    pub struct WMB1_D47 {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register Data 4-7"]
    pub mod wmb1_d47 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB1_D47 {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_7R {
            bits: u8,
        }
        impl DATA_BYTE_7R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_6R {
            bits: u8,
        }
        impl DATA_BYTE_6R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_5R {
            bits: u8,
        }
        impl DATA_BYTE_5R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_4R {
            bits: u8,
        }
        impl DATA_BYTE_4R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Received payload corresponding to the data byte 7 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_7(&self) -> DATA_BYTE_7R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_7R { bits }
            }
            #[doc = "Bits 8:15 - Received payload corresponding to the data byte 6 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_6(&self) -> DATA_BYTE_6R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_6R { bits }
            }
            #[doc = "Bits 16:23 - Received payload corresponding to the data byte 5 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_5(&self) -> DATA_BYTE_5R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_5R { bits }
            }
            #[doc = "Bits 24:31 - Received payload corresponding to the data byte 4 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_4(&self) -> DATA_BYTE_4R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_4R { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register for C/S"]
    pub struct WMB2_CS {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register for C/S"]
    pub mod wmb2_cs {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB2_CS {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLCR {
            bits: u8,
        }
        impl DLCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `RTR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RTRR {
            #[doc = "Frame is data one (not remote)"]
            _0,
            #[doc = "Frame is a remote one"]
            _1,
        }
        impl RTRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RTRR::_0 => false,
                    RTRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RTRR {
                match value {
                    false => RTRR::_0,
                    true => RTRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RTRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RTRR::_1
            }
        }
        #[doc = "Possible values of the field `IDE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IDER {
            #[doc = "Frame format is standard"]
            _0,
            #[doc = "Frame format is extended"]
            _1,
        }
        impl IDER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    IDER::_0 => false,
                    IDER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> IDER {
                match value {
                    false => IDER::_0,
                    true => IDER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == IDER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == IDER::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct SRRR {
            bits: bool,
        }
        impl SRRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 16:19 - Length of Data in Bytes"]
            #[inline(always)]
            pub fn dlc(&self) -> DLCR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DLCR { bits }
            }
            #[doc = "Bit 20 - Remote Transmission Request Bit"]
            #[inline(always)]
            pub fn rtr(&self) -> RTRR {
                RTRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - ID Extended Bit"]
            #[inline(always)]
            pub fn ide(&self) -> IDER {
                IDER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 22 - Substitute Remote Request"]
            #[inline(always)]
            pub fn srr(&self) -> SRRR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                SRRR { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register for ID"]
    pub struct WMB2_ID {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register for ID"]
    pub mod wmb2_id {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB2_ID {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct IDR {
            bits: u32,
        }
        impl IDR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:28 - Received ID under Pretended Networking mode"]
            #[inline(always)]
            pub fn id(&self) -> IDR {
                let bits = {
                    const MASK: u32 = 536870911;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                IDR { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register for Data 0-3"]
    pub struct WMB2_D03 {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register for Data 0-3"]
    pub mod wmb2_d03 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB2_D03 {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_3R {
            bits: u8,
        }
        impl DATA_BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_2R {
            bits: u8,
        }
        impl DATA_BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_1R {
            bits: u8,
        }
        impl DATA_BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_0R {
            bits: u8,
        }
        impl DATA_BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Received payload corresponding to the data byte 3 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_3(&self) -> DATA_BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Received payload corresponding to the data byte 2 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_2(&self) -> DATA_BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Received payload corresponding to the data byte 1 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_1(&self) -> DATA_BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Received payload corresponding to the data byte 0 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_0(&self) -> DATA_BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_0R { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register Data 4-7"]
    pub struct WMB2_D47 {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register Data 4-7"]
    pub mod wmb2_d47 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB2_D47 {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_7R {
            bits: u8,
        }
        impl DATA_BYTE_7R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_6R {
            bits: u8,
        }
        impl DATA_BYTE_6R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_5R {
            bits: u8,
        }
        impl DATA_BYTE_5R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_4R {
            bits: u8,
        }
        impl DATA_BYTE_4R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Received payload corresponding to the data byte 7 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_7(&self) -> DATA_BYTE_7R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_7R { bits }
            }
            #[doc = "Bits 8:15 - Received payload corresponding to the data byte 6 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_6(&self) -> DATA_BYTE_6R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_6R { bits }
            }
            #[doc = "Bits 16:23 - Received payload corresponding to the data byte 5 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_5(&self) -> DATA_BYTE_5R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_5R { bits }
            }
            #[doc = "Bits 24:31 - Received payload corresponding to the data byte 4 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_4(&self) -> DATA_BYTE_4R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_4R { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register for C/S"]
    pub struct WMB3_CS {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register for C/S"]
    pub mod wmb3_cs {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB3_CS {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLCR {
            bits: u8,
        }
        impl DLCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `RTR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RTRR {
            #[doc = "Frame is data one (not remote)"]
            _0,
            #[doc = "Frame is a remote one"]
            _1,
        }
        impl RTRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RTRR::_0 => false,
                    RTRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RTRR {
                match value {
                    false => RTRR::_0,
                    true => RTRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RTRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RTRR::_1
            }
        }
        #[doc = "Possible values of the field `IDE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IDER {
            #[doc = "Frame format is standard"]
            _0,
            #[doc = "Frame format is extended"]
            _1,
        }
        impl IDER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    IDER::_0 => false,
                    IDER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> IDER {
                match value {
                    false => IDER::_0,
                    true => IDER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == IDER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == IDER::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct SRRR {
            bits: bool,
        }
        impl SRRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 16:19 - Length of Data in Bytes"]
            #[inline(always)]
            pub fn dlc(&self) -> DLCR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DLCR { bits }
            }
            #[doc = "Bit 20 - Remote Transmission Request Bit"]
            #[inline(always)]
            pub fn rtr(&self) -> RTRR {
                RTRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - ID Extended Bit"]
            #[inline(always)]
            pub fn ide(&self) -> IDER {
                IDER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 22 - Substitute Remote Request"]
            #[inline(always)]
            pub fn srr(&self) -> SRRR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                SRRR { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register for ID"]
    pub struct WMB3_ID {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register for ID"]
    pub mod wmb3_id {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB3_ID {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct IDR {
            bits: u32,
        }
        impl IDR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:28 - Received ID under Pretended Networking mode"]
            #[inline(always)]
            pub fn id(&self) -> IDR {
                let bits = {
                    const MASK: u32 = 536870911;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                IDR { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register for Data 0-3"]
    pub struct WMB3_D03 {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register for Data 0-3"]
    pub mod wmb3_d03 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB3_D03 {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_3R {
            bits: u8,
        }
        impl DATA_BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_2R {
            bits: u8,
        }
        impl DATA_BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_1R {
            bits: u8,
        }
        impl DATA_BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_0R {
            bits: u8,
        }
        impl DATA_BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Received payload corresponding to the data byte 3 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_3(&self) -> DATA_BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Received payload corresponding to the data byte 2 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_2(&self) -> DATA_BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Received payload corresponding to the data byte 1 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_1(&self) -> DATA_BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Received payload corresponding to the data byte 0 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_0(&self) -> DATA_BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_0R { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register Data 4-7"]
    pub struct WMB3_D47 {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register Data 4-7"]
    pub mod wmb3_d47 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB3_D47 {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_7R {
            bits: u8,
        }
        impl DATA_BYTE_7R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_6R {
            bits: u8,
        }
        impl DATA_BYTE_6R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_5R {
            bits: u8,
        }
        impl DATA_BYTE_5R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_4R {
            bits: u8,
        }
        impl DATA_BYTE_4R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Received payload corresponding to the data byte 7 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_7(&self) -> DATA_BYTE_7R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_7R { bits }
            }
            #[doc = "Bits 8:15 - Received payload corresponding to the data byte 6 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_6(&self) -> DATA_BYTE_6R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_6R { bits }
            }
            #[doc = "Bits 16:23 - Received payload corresponding to the data byte 5 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_5(&self) -> DATA_BYTE_5R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_5R { bits }
            }
            #[doc = "Bits 24:31 - Received payload corresponding to the data byte 4 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_4(&self) -> DATA_BYTE_4R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_4R { bits }
            }
        }
    }
    #[doc = "CAN FD Control Register"]
    pub struct FDCTRL {
        register: VolatileCell<u32>,
    }
    #[doc = "CAN FD Control Register"]
    pub mod fdctrl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FDCTRL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct TDCVALR {
            bits: u8,
        }
        impl TDCVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct TDCOFFR {
            bits: u8,
        }
        impl TDCOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `TDCFAIL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TDCFAILR {
            #[doc = "Measured loop delay is in range."]
            _0,
            #[doc = "Measured loop delay is out of range."]
            _1,
        }
        impl TDCFAILR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TDCFAILR::_0 => false,
                    TDCFAILR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TDCFAILR {
                match value {
                    false => TDCFAILR::_0,
                    true => TDCFAILR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TDCFAILR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TDCFAILR::_1
            }
        }
        #[doc = "Possible values of the field `TDCEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TDCENR {
            #[doc = "TDC is disabled"]
            _0,
            #[doc = "TDC is enabled"]
            _1,
        }
        impl TDCENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TDCENR::_0 => false,
                    TDCENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TDCENR {
                match value {
                    false => TDCENR::_0,
                    true => TDCENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TDCENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TDCENR::_1
            }
        }
        #[doc = "Possible values of the field `MBDSR0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MBDSR0R {
            #[doc = "Selects 8 bytes per Message Buffer."]
            _00,
            #[doc = "Selects 16 bytes per Message Buffer."]
            _01,
            #[doc = "Selects 32 bytes per Message Buffer."]
            _10,
            #[doc = "Selects 64 bytes per Message Buffer."]
            _11,
        }
        impl MBDSR0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MBDSR0R::_00 => 0,
                    MBDSR0R::_01 => 1,
                    MBDSR0R::_10 => 2,
                    MBDSR0R::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MBDSR0R {
                match value {
                    0 => MBDSR0R::_00,
                    1 => MBDSR0R::_01,
                    2 => MBDSR0R::_10,
                    3 => MBDSR0R::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == MBDSR0R::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == MBDSR0R::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == MBDSR0R::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == MBDSR0R::_11
            }
        }
        #[doc = "Possible values of the field `FDRATE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FDRATER {
            #[doc = "Transmit a frame in nominal rate. The BRS bit in the Tx MB has no effect."]
            _0,
            #[doc = "Transmit a frame with bit rate switching if the BRS bit in the Tx MB is recessive."]
            _1,
        }
        impl FDRATER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FDRATER::_0 => false,
                    FDRATER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FDRATER {
                match value {
                    false => FDRATER::_0,
                    true => FDRATER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FDRATER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FDRATER::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _TDCOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TDCOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TDCFAIL`"]
        pub enum TDCFAILW {
            #[doc = "Measured loop delay is in range."]
            _0,
            #[doc = "Measured loop delay is out of range."]
            _1,
        }
        impl TDCFAILW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TDCFAILW::_0 => false,
                    TDCFAILW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TDCFAILW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TDCFAILW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TDCFAILW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Measured loop delay is in range."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TDCFAILW::_0)
            }
            #[doc = "Measured loop delay is out of range."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TDCFAILW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TDCEN`"]
        pub enum TDCENW {
            #[doc = "TDC is disabled"]
            _0,
            #[doc = "TDC is enabled"]
            _1,
        }
        impl TDCENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TDCENW::_0 => false,
                    TDCENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TDCENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TDCENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TDCENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "TDC is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TDCENW::_0)
            }
            #[doc = "TDC is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TDCENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MBDSR0`"]
        pub enum MBDSR0W {
            #[doc = "Selects 8 bytes per Message Buffer."]
            _00,
            #[doc = "Selects 16 bytes per Message Buffer."]
            _01,
            #[doc = "Selects 32 bytes per Message Buffer."]
            _10,
            #[doc = "Selects 64 bytes per Message Buffer."]
            _11,
        }
        impl MBDSR0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MBDSR0W::_00 => 0,
                    MBDSR0W::_01 => 1,
                    MBDSR0W::_10 => 2,
                    MBDSR0W::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MBDSR0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MBDSR0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MBDSR0W) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Selects 8 bytes per Message Buffer."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(MBDSR0W::_00)
            }
            #[doc = "Selects 16 bytes per Message Buffer."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(MBDSR0W::_01)
            }
            #[doc = "Selects 32 bytes per Message Buffer."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(MBDSR0W::_10)
            }
            #[doc = "Selects 64 bytes per Message Buffer."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(MBDSR0W::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FDRATE`"]
        pub enum FDRATEW {
            #[doc = "Transmit a frame in nominal rate. The BRS bit in the Tx MB has no effect."]
            _0,
            #[doc = "Transmit a frame with bit rate switching if the BRS bit in the Tx MB is recessive."]
            _1,
        }
        impl FDRATEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FDRATEW::_0 => false,
                    FDRATEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FDRATEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FDRATEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FDRATEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Transmit a frame in nominal rate. The BRS bit in the Tx MB has no effect."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FDRATEW::_0)
            }
            #[doc = "Transmit a frame with bit rate switching if the BRS bit in the Tx MB is recessive."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FDRATEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Transceiver Delay Compensation Value"]
            #[inline(always)]
            pub fn tdcval(&self) -> TDCVALR {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TDCVALR { bits }
            }
            #[doc = "Bits 8:12 - Transceiver Delay Compensation Offset"]
            #[inline(always)]
            pub fn tdcoff(&self) -> TDCOFFR {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TDCOFFR { bits }
            }
            #[doc = "Bit 14 - Transceiver Delay Compensation Fail"]
            #[inline(always)]
            pub fn tdcfail(&self) -> TDCFAILR {
                TDCFAILR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - Transceiver Delay Compensation Enable"]
            #[inline(always)]
            pub fn tdcen(&self) -> TDCENR {
                TDCENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:17 - Message Buffer Data Size for Region 0"]
            #[inline(always)]
            pub fn mbdsr0(&self) -> MBDSR0R {
                MBDSR0R::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 31 - Bit Rate Switch Enable"]
            #[inline(always)]
            pub fn fdrate(&self) -> FDRATER {
                FDRATER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 2147483904 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 8:12 - Transceiver Delay Compensation Offset"]
            #[inline(always)]
            pub fn tdcoff(&mut self) -> _TDCOFFW {
                _TDCOFFW { w: self }
            }
            #[doc = "Bit 14 - Transceiver Delay Compensation Fail"]
            #[inline(always)]
            pub fn tdcfail(&mut self) -> _TDCFAILW {
                _TDCFAILW { w: self }
            }
            #[doc = "Bit 15 - Transceiver Delay Compensation Enable"]
            #[inline(always)]
            pub fn tdcen(&mut self) -> _TDCENW {
                _TDCENW { w: self }
            }
            #[doc = "Bits 16:17 - Message Buffer Data Size for Region 0"]
            #[inline(always)]
            pub fn mbdsr0(&mut self) -> _MBDSR0W {
                _MBDSR0W { w: self }
            }
            #[doc = "Bit 31 - Bit Rate Switch Enable"]
            #[inline(always)]
            pub fn fdrate(&mut self) -> _FDRATEW {
                _FDRATEW { w: self }
            }
        }
    }
    #[doc = "CAN FD Bit Timing Register"]
    pub struct FDCBT {
        register: VolatileCell<u32>,
    }
    #[doc = "CAN FD Bit Timing Register"]
    pub mod fdcbt {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FDCBT {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct FPSEG2R {
            bits: u8,
        }
        impl FPSEG2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct FPSEG1R {
            bits: u8,
        }
        impl FPSEG1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct FPROPSEGR {
            bits: u8,
        }
        impl FPROPSEGR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct FRJWR {
            bits: u8,
        }
        impl FRJWR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct FPRESDIVR {
            bits: u16,
        }
        impl FPRESDIVR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _FPSEG2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _FPSEG2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _FPSEG1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _FPSEG1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _FPROPSEGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FPROPSEGW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _FRJWW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FRJWW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _FPRESDIVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FPRESDIVW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 1023;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:2 - Fast Phase Segment 2"]
            #[inline(always)]
            pub fn fpseg2(&self) -> FPSEG2R {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                FPSEG2R { bits }
            }
            #[doc = "Bits 5:7 - Fast Phase Segment 1"]
            #[inline(always)]
            pub fn fpseg1(&self) -> FPSEG1R {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                FPSEG1R { bits }
            }
            #[doc = "Bits 10:14 - Fast Propagation Segment"]
            #[inline(always)]
            pub fn fpropseg(&self) -> FPROPSEGR {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                FPROPSEGR { bits }
            }
            #[doc = "Bits 16:18 - Fast Resync Jump Width"]
            #[inline(always)]
            pub fn frjw(&self) -> FRJWR {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                FRJWR { bits }
            }
            #[doc = "Bits 20:29 - Fast Prescaler Division Factor"]
            #[inline(always)]
            pub fn fpresdiv(&self) -> FPRESDIVR {
                let bits = {
                    const MASK: u16 = 1023;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                FPRESDIVR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:2 - Fast Phase Segment 2"]
            #[inline(always)]
            pub fn fpseg2(&mut self) -> _FPSEG2W {
                _FPSEG2W { w: self }
            }
            #[doc = "Bits 5:7 - Fast Phase Segment 1"]
            #[inline(always)]
            pub fn fpseg1(&mut self) -> _FPSEG1W {
                _FPSEG1W { w: self }
            }
            #[doc = "Bits 10:14 - Fast Propagation Segment"]
            #[inline(always)]
            pub fn fpropseg(&mut self) -> _FPROPSEGW {
                _FPROPSEGW { w: self }
            }
            #[doc = "Bits 16:18 - Fast Resync Jump Width"]
            #[inline(always)]
            pub fn frjw(&mut self) -> _FRJWW {
                _FRJWW { w: self }
            }
            #[doc = "Bits 20:29 - Fast Prescaler Division Factor"]
            #[inline(always)]
            pub fn fpresdiv(&mut self) -> _FPRESDIVW {
                _FPRESDIVW { w: self }
            }
        }
    }
    #[doc = "CAN FD CRC Register"]
    pub struct FDCRC {
        register: VolatileCell<u32>,
    }
    #[doc = "CAN FD CRC Register"]
    pub mod fdcrc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::FDCRC {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct FD_TXCRCR {
            bits: u32,
        }
        impl FD_TXCRCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct FD_MBCRCR {
            bits: u8,
        }
        impl FD_MBCRCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:20 - Extended Transmitted CRC value"]
            #[inline(always)]
            pub fn fd_txcrc(&self) -> FD_TXCRCR {
                let bits = {
                    const MASK: u32 = 2097151;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                FD_TXCRCR { bits }
            }
            #[doc = "Bits 24:30 - CRC Mailbox Number for FD_TXCRC"]
            #[inline(always)]
            pub fn fd_mbcrc(&self) -> FD_MBCRCR {
                let bits = {
                    const MASK: u8 = 127;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                FD_MBCRCR { bits }
            }
        }
    }
}
#[doc = "Flex Controller Area Network module"]
pub struct CAN0 {
    register_block: can0::RegisterBlock,
}
impl Deref for CAN0 {
    type Target = can0::RegisterBlock;
    fn deref(&self) -> &can0::RegisterBlock {
        &self.register_block
    }
}
#[doc = "Flex Controller Area Network module"]
pub const CAN1: Peripheral<CAN1> = unsafe { Peripheral::new(1073893376) };
#[doc = "Flex Controller Area Network module"]
pub mod can1 {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - Module Configuration Register"]
        pub mcr: MCR,
        #[doc = "0x04 - Control 1 register"]
        pub ctrl1: CTRL1,
        #[doc = "0x08 - Free Running Timer"]
        pub timer: TIMER,
        _reserved0: [u8; 4usize],
        #[doc = "0x10 - Rx Mailboxes Global Mask Register"]
        pub rxmgmask: RXMGMASK,
        #[doc = "0x14 - Rx 14 Mask register"]
        pub rx14mask: RX14MASK,
        #[doc = "0x18 - Rx 15 Mask register"]
        pub rx15mask: RX15MASK,
        #[doc = "0x1c - Error Counter"]
        pub ecr: ECR,
        #[doc = "0x20 - Error and Status 1 register"]
        pub esr1: ESR1,
        _reserved1: [u8; 4usize],
        #[doc = "0x28 - Interrupt Masks 1 register"]
        pub imask1: IMASK1,
        _reserved2: [u8; 4usize],
        #[doc = "0x30 - Interrupt Flags 1 register"]
        pub iflag1: IFLAG1,
        #[doc = "0x34 - Control 2 register"]
        pub ctrl2: CTRL2,
        #[doc = "0x38 - Error and Status 2 register"]
        pub esr2: ESR2,
        _reserved3: [u8; 8usize],
        #[doc = "0x44 - CRC Register"]
        pub crcr: CRCR,
        #[doc = "0x48 - Rx FIFO Global Mask register"]
        pub rxfgmask: RXFGMASK,
        #[doc = "0x4c - Rx FIFO Information Register"]
        pub rxfir: RXFIR,
        #[doc = "0x50 - CAN Bit Timing Register"]
        pub cbt: CBT,
        _reserved4: [u8; 44usize],
        #[doc = "0x80 - Embedded RAM"]
        pub embedded_ram: [EMBEDDEDRAM; 128],
        _reserved5: [u8; 1536usize],
        #[doc = "0x880 - Rx Individual Mask Registers"]
        pub rximr0: RXIMR0,
        #[doc = "0x884 - Rx Individual Mask Registers"]
        pub rximr1: RXIMR1,
        #[doc = "0x888 - Rx Individual Mask Registers"]
        pub rximr2: RXIMR2,
        #[doc = "0x88c - Rx Individual Mask Registers"]
        pub rximr3: RXIMR3,
        #[doc = "0x890 - Rx Individual Mask Registers"]
        pub rximr4: RXIMR4,
        #[doc = "0x894 - Rx Individual Mask Registers"]
        pub rximr5: RXIMR5,
        #[doc = "0x898 - Rx Individual Mask Registers"]
        pub rximr6: RXIMR6,
        #[doc = "0x89c - Rx Individual Mask Registers"]
        pub rximr7: RXIMR7,
        #[doc = "0x8a0 - Rx Individual Mask Registers"]
        pub rximr8: RXIMR8,
        #[doc = "0x8a4 - Rx Individual Mask Registers"]
        pub rximr9: RXIMR9,
        #[doc = "0x8a8 - Rx Individual Mask Registers"]
        pub rximr10: RXIMR10,
        #[doc = "0x8ac - Rx Individual Mask Registers"]
        pub rximr11: RXIMR11,
        #[doc = "0x8b0 - Rx Individual Mask Registers"]
        pub rximr12: RXIMR12,
        #[doc = "0x8b4 - Rx Individual Mask Registers"]
        pub rximr13: RXIMR13,
        #[doc = "0x8b8 - Rx Individual Mask Registers"]
        pub rximr14: RXIMR14,
        #[doc = "0x8bc - Rx Individual Mask Registers"]
        pub rximr15: RXIMR15,
        _reserved6: [u8; 576usize],
        #[doc = "0xb00 - Pretended Networking Control 1 Register"]
        pub ctrl1_pn: CTRL1_PN,
        #[doc = "0xb04 - Pretended Networking Control 2 Register"]
        pub ctrl2_pn: CTRL2_PN,
        #[doc = "0xb08 - Pretended Networking Wake Up Match Register"]
        pub wu_mtc: WU_MTC,
        #[doc = "0xb0c - Pretended Networking ID Filter 1 Register"]
        pub flt_id1: FLT_ID1,
        #[doc = "0xb10 - Pretended Networking DLC Filter Register"]
        pub flt_dlc: FLT_DLC,
        #[doc = "0xb14 - Pretended Networking Payload Low Filter 1 Register"]
        pub pl1_lo: PL1_LO,
        #[doc = "0xb18 - Pretended Networking Payload High Filter 1 Register"]
        pub pl1_hi: PL1_HI,
        #[doc = "0xb1c - Pretended Networking ID Filter 2 Register / ID Mask Register"]
        pub flt_id2_idmask: FLT_ID2_IDMASK,
        #[doc = "0xb20 - Pretended Networking Payload Low Filter 2 Register / Payload Low Mask Register"]
        pub pl2_plmask_lo: PL2_PLMASK_LO,
        #[doc = "0xb24 - Pretended Networking Payload High Filter 2 low order bits / Payload High Mask Register"]
        pub pl2_plmask_hi: PL2_PLMASK_HI,
        _reserved7: [u8; 24usize],
        #[doc = "0xb40 - Wake Up Message Buffer Register for C/S"]
        pub wmb0_cs: WMB0_CS,
        #[doc = "0xb44 - Wake Up Message Buffer Register for ID"]
        pub wmb0_id: WMB0_ID,
        #[doc = "0xb48 - Wake Up Message Buffer Register for Data 0-3"]
        pub wmb0_d03: WMB0_D03,
        #[doc = "0xb4c - Wake Up Message Buffer Register Data 4-7"]
        pub wmb0_d47: WMB0_D47,
        #[doc = "0xb50 - Wake Up Message Buffer Register for C/S"]
        pub wmb1_cs: WMB1_CS,
        #[doc = "0xb54 - Wake Up Message Buffer Register for ID"]
        pub wmb1_id: WMB1_ID,
        #[doc = "0xb58 - Wake Up Message Buffer Register for Data 0-3"]
        pub wmb1_d03: WMB1_D03,
        #[doc = "0xb5c - Wake Up Message Buffer Register Data 4-7"]
        pub wmb1_d47: WMB1_D47,
        #[doc = "0xb60 - Wake Up Message Buffer Register for C/S"]
        pub wmb2_cs: WMB2_CS,
        #[doc = "0xb64 - Wake Up Message Buffer Register for ID"]
        pub wmb2_id: WMB2_ID,
        #[doc = "0xb68 - Wake Up Message Buffer Register for Data 0-3"]
        pub wmb2_d03: WMB2_D03,
        #[doc = "0xb6c - Wake Up Message Buffer Register Data 4-7"]
        pub wmb2_d47: WMB2_D47,
        #[doc = "0xb70 - Wake Up Message Buffer Register for C/S"]
        pub wmb3_cs: WMB3_CS,
        #[doc = "0xb74 - Wake Up Message Buffer Register for ID"]
        pub wmb3_id: WMB3_ID,
        #[doc = "0xb78 - Wake Up Message Buffer Register for Data 0-3"]
        pub wmb3_d03: WMB3_D03,
        #[doc = "0xb7c - Wake Up Message Buffer Register Data 4-7"]
        pub wmb3_d47: WMB3_D47,
        _reserved8: [u8; 128usize],
        #[doc = "0xc00 - CAN FD Control Register"]
        pub fdctrl: FDCTRL,
        #[doc = "0xc04 - CAN FD Bit Timing Register"]
        pub fdcbt: FDCBT,
        #[doc = "0xc08 - CAN FD CRC Register"]
        pub fdcrc: FDCRC,
    }
    #[doc = "Module Configuration Register"]
    pub struct MCR {
        register: VolatileCell<u32>,
    }
    #[doc = "Module Configuration Register"]
    pub mod mcr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::MCR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MAXMBR {
            bits: u8,
        }
        impl MAXMBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `IDAM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IDAMR {
            #[doc = "Format A: One full ID (standard and extended) per ID Filter Table element."]
            _00,
            #[doc = "Format B: Two full standard IDs or two partial 14-bit (standard and extended) IDs per ID Filter Table element."]
            _01,
            #[doc = "Format C: Four partial 8-bit Standard IDs per ID Filter Table element."]
            _10,
            #[doc = "Format D: All frames rejected."]
            _11,
        }
        impl IDAMR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IDAMR::_00 => 0,
                    IDAMR::_01 => 1,
                    IDAMR::_10 => 2,
                    IDAMR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IDAMR {
                match value {
                    0 => IDAMR::_00,
                    1 => IDAMR::_01,
                    2 => IDAMR::_10,
                    3 => IDAMR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == IDAMR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == IDAMR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == IDAMR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == IDAMR::_11
            }
        }
        #[doc = "Possible values of the field `FDEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FDENR {
            #[doc = "CAN FD is enabled. FlexCAN is able to receive and transmit messages in both CAN FD and CAN 2.0 formats."]
            _1,
            #[doc = "CAN FD is disabled. FlexCAN is able to receive and transmit messages in CAN 2.0 format."]
            _0,
        }
        impl FDENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FDENR::_1 => true,
                    FDENR::_0 => false,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FDENR {
                match value {
                    true => FDENR::_1,
                    false => FDENR::_0,
                }
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FDENR::_1
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FDENR::_0
            }
        }
        #[doc = "Possible values of the field `AEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum AENR {
            #[doc = "Abort disabled."]
            _0,
            #[doc = "Abort enabled."]
            _1,
        }
        impl AENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    AENR::_0 => false,
                    AENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> AENR {
                match value {
                    false => AENR::_0,
                    true => AENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == AENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == AENR::_1
            }
        }
        #[doc = "Possible values of the field `LPRIOEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LPRIOENR {
            #[doc = "Local Priority disabled."]
            _0,
            #[doc = "Local Priority enabled."]
            _1,
        }
        impl LPRIOENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LPRIOENR::_0 => false,
                    LPRIOENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LPRIOENR {
                match value {
                    false => LPRIOENR::_0,
                    true => LPRIOENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LPRIOENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LPRIOENR::_1
            }
        }
        #[doc = "Possible values of the field `PNET_EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PNET_ENR {
            #[doc = "Pretended Networking mode is disabled."]
            _0,
            #[doc = "Pretended Networking mode is enabled."]
            _1,
        }
        impl PNET_ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PNET_ENR::_0 => false,
                    PNET_ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PNET_ENR {
                match value {
                    false => PNET_ENR::_0,
                    true => PNET_ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PNET_ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PNET_ENR::_1
            }
        }
        #[doc = "Possible values of the field `DMA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMAR {
            #[doc = "DMA feature for RX FIFO disabled."]
            _0,
            #[doc = "DMA feature for RX FIFO enabled."]
            _1,
        }
        impl DMAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMAR::_0 => false,
                    DMAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMAR {
                match value {
                    false => DMAR::_0,
                    true => DMAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMAR::_1
            }
        }
        #[doc = "Possible values of the field `IRMQ`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRMQR {
            #[doc = "Individual Rx masking and queue feature are disabled. For backward compatibility with legacy applications, the reading of C/S word locks the MB even if it is EMPTY."]
            _0,
            #[doc = "Individual Rx masking and queue feature are enabled."]
            _1,
        }
        impl IRMQR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    IRMQR::_0 => false,
                    IRMQR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> IRMQR {
                match value {
                    false => IRMQR::_0,
                    true => IRMQR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == IRMQR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == IRMQR::_1
            }
        }
        #[doc = "Possible values of the field `SRXDIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SRXDISR {
            #[doc = "Self reception enabled."]
            _0,
            #[doc = "Self reception disabled."]
            _1,
        }
        impl SRXDISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SRXDISR::_0 => false,
                    SRXDISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SRXDISR {
                match value {
                    false => SRXDISR::_0,
                    true => SRXDISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SRXDISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SRXDISR::_1
            }
        }
        #[doc = "Possible values of the field `LPMACK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LPMACKR {
            #[doc = "FlexCAN is not in a low-power mode."]
            _0,
            #[doc = "FlexCAN is in a low-power mode."]
            _1,
        }
        impl LPMACKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LPMACKR::_0 => false,
                    LPMACKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LPMACKR {
                match value {
                    false => LPMACKR::_0,
                    true => LPMACKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LPMACKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LPMACKR::_1
            }
        }
        #[doc = "Possible values of the field `WRNEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WRNENR {
            #[doc = "TWRNINT and RWRNINT bits are zero, independent of the values in the error counters."]
            _0,
            #[doc = "TWRNINT and RWRNINT bits are set when the respective error counter transitions from less than 96 to greater than or equal to 96."]
            _1,
        }
        impl WRNENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WRNENR::_0 => false,
                    WRNENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WRNENR {
                match value {
                    false => WRNENR::_0,
                    true => WRNENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WRNENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WRNENR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct SUPVR {
            bits: bool,
        }
        impl SUPVR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `FRZACK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FRZACKR {
            #[doc = "FlexCAN not in Freeze mode, prescaler running."]
            _0,
            #[doc = "FlexCAN in Freeze mode, prescaler stopped."]
            _1,
        }
        impl FRZACKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FRZACKR::_0 => false,
                    FRZACKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FRZACKR {
                match value {
                    false => FRZACKR::_0,
                    true => FRZACKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FRZACKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FRZACKR::_1
            }
        }
        #[doc = "Possible values of the field `SOFTRST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SOFTRSTR {
            #[doc = "No reset request."]
            _0,
            #[doc = "Resets the registers affected by soft reset."]
            _1,
        }
        impl SOFTRSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SOFTRSTR::_0 => false,
                    SOFTRSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SOFTRSTR {
                match value {
                    false => SOFTRSTR::_0,
                    true => SOFTRSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SOFTRSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SOFTRSTR::_1
            }
        }
        #[doc = "Possible values of the field `NOTRDY`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum NOTRDYR {
            #[doc = "FlexCAN module is either in Normal mode, Listen-Only mode or Loop-Back mode."]
            _0,
            #[doc = r" Reserved"]
            _Reserved(bool),
        }
        impl NOTRDYR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    NOTRDYR::_0 => false,
                    NOTRDYR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> NOTRDYR {
                match value {
                    false => NOTRDYR::_0,
                    i => NOTRDYR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == NOTRDYR::_0
            }
        }
        #[doc = "Possible values of the field `HALT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HALTR {
            #[doc = "No Freeze mode request."]
            _0,
            #[doc = "Enters Freeze mode if the FRZ bit is asserted."]
            _1,
        }
        impl HALTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HALTR::_0 => false,
                    HALTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HALTR {
                match value {
                    false => HALTR::_0,
                    true => HALTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HALTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HALTR::_1
            }
        }
        #[doc = "Possible values of the field `RFEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RFENR {
            #[doc = "Rx FIFO not enabled."]
            _0,
            #[doc = "Rx FIFO enabled."]
            _1,
        }
        impl RFENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RFENR::_0 => false,
                    RFENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RFENR {
                match value {
                    false => RFENR::_0,
                    true => RFENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RFENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RFENR::_1
            }
        }
        #[doc = "Possible values of the field `FRZ`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FRZR {
            #[doc = "Not enabled to enter Freeze mode."]
            _0,
            #[doc = "Enabled to enter Freeze mode."]
            _1,
        }
        impl FRZR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FRZR::_0 => false,
                    FRZR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FRZR {
                match value {
                    false => FRZR::_0,
                    true => FRZR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FRZR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FRZR::_1
            }
        }
        #[doc = "Possible values of the field `MDIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MDISR {
            #[doc = "Enable the FlexCAN module."]
            _0,
            #[doc = "Disable the FlexCAN module."]
            _1,
        }
        impl MDISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MDISR::_0 => false,
                    MDISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MDISR {
                match value {
                    false => MDISR::_0,
                    true => MDISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MDISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MDISR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _MAXMBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MAXMBW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 127;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IDAM`"]
        pub enum IDAMW {
            #[doc = "Format A: One full ID (standard and extended) per ID Filter Table element."]
            _00,
            #[doc = "Format B: Two full standard IDs or two partial 14-bit (standard and extended) IDs per ID Filter Table element."]
            _01,
            #[doc = "Format C: Four partial 8-bit Standard IDs per ID Filter Table element."]
            _10,
            #[doc = "Format D: All frames rejected."]
            _11,
        }
        impl IDAMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IDAMW::_00 => 0,
                    IDAMW::_01 => 1,
                    IDAMW::_10 => 2,
                    IDAMW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IDAMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IDAMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IDAMW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Format A: One full ID (standard and extended) per ID Filter Table element."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(IDAMW::_00)
            }
            #[doc = "Format B: Two full standard IDs or two partial 14-bit (standard and extended) IDs per ID Filter Table element."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(IDAMW::_01)
            }
            #[doc = "Format C: Four partial 8-bit Standard IDs per ID Filter Table element."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(IDAMW::_10)
            }
            #[doc = "Format D: All frames rejected."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(IDAMW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FDEN`"]
        pub enum FDENW {
            #[doc = "CAN FD is enabled. FlexCAN is able to receive and transmit messages in both CAN FD and CAN 2.0 formats."]
            _1,
            #[doc = "CAN FD is disabled. FlexCAN is able to receive and transmit messages in CAN 2.0 format."]
            _0,
        }
        impl FDENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FDENW::_1 => true,
                    FDENW::_0 => false,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FDENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FDENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FDENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "CAN FD is enabled. FlexCAN is able to receive and transmit messages in both CAN FD and CAN 2.0 formats."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FDENW::_1)
            }
            #[doc = "CAN FD is disabled. FlexCAN is able to receive and transmit messages in CAN 2.0 format."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FDENW::_0)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `AEN`"]
        pub enum AENW {
            #[doc = "Abort disabled."]
            _0,
            #[doc = "Abort enabled."]
            _1,
        }
        impl AENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    AENW::_0 => false,
                    AENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _AENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _AENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: AENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Abort disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(AENW::_0)
            }
            #[doc = "Abort enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(AENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LPRIOEN`"]
        pub enum LPRIOENW {
            #[doc = "Local Priority disabled."]
            _0,
            #[doc = "Local Priority enabled."]
            _1,
        }
        impl LPRIOENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LPRIOENW::_0 => false,
                    LPRIOENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LPRIOENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LPRIOENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LPRIOENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Local Priority disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LPRIOENW::_0)
            }
            #[doc = "Local Priority enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LPRIOENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PNET_EN`"]
        pub enum PNET_ENW {
            #[doc = "Pretended Networking mode is disabled."]
            _0,
            #[doc = "Pretended Networking mode is enabled."]
            _1,
        }
        impl PNET_ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PNET_ENW::_0 => false,
                    PNET_ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PNET_ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PNET_ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PNET_ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pretended Networking mode is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PNET_ENW::_0)
            }
            #[doc = "Pretended Networking mode is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PNET_ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMA`"]
        pub enum DMAW {
            #[doc = "DMA feature for RX FIFO disabled."]
            _0,
            #[doc = "DMA feature for RX FIFO enabled."]
            _1,
        }
        impl DMAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMAW::_0 => false,
                    DMAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA feature for RX FIFO disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMAW::_0)
            }
            #[doc = "DMA feature for RX FIFO enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRMQ`"]
        pub enum IRMQW {
            #[doc = "Individual Rx masking and queue feature are disabled. For backward compatibility with legacy applications, the reading of C/S word locks the MB even if it is EMPTY."]
            _0,
            #[doc = "Individual Rx masking and queue feature are enabled."]
            _1,
        }
        impl IRMQW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    IRMQW::_0 => false,
                    IRMQW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRMQW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRMQW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRMQW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Individual Rx masking and queue feature are disabled. For backward compatibility with legacy applications, the reading of C/S word locks the MB even if it is EMPTY."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(IRMQW::_0)
            }
            #[doc = "Individual Rx masking and queue feature are enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(IRMQW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SRXDIS`"]
        pub enum SRXDISW {
            #[doc = "Self reception enabled."]
            _0,
            #[doc = "Self reception disabled."]
            _1,
        }
        impl SRXDISW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SRXDISW::_0 => false,
                    SRXDISW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SRXDISW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SRXDISW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SRXDISW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Self reception enabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SRXDISW::_0)
            }
            #[doc = "Self reception disabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SRXDISW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WRNEN`"]
        pub enum WRNENW {
            #[doc = "TWRNINT and RWRNINT bits are zero, independent of the values in the error counters."]
            _0,
            #[doc = "TWRNINT and RWRNINT bits are set when the respective error counter transitions from less than 96 to greater than or equal to 96."]
            _1,
        }
        impl WRNENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WRNENW::_0 => false,
                    WRNENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WRNENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WRNENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WRNENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "TWRNINT and RWRNINT bits are zero, independent of the values in the error counters."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WRNENW::_0)
            }
            #[doc = "TWRNINT and RWRNINT bits are set when the respective error counter transitions from less than 96 to greater than or equal to 96."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WRNENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 21;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SUPVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SUPVW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 23;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SOFTRST`"]
        pub enum SOFTRSTW {
            #[doc = "No reset request."]
            _0,
            #[doc = "Resets the registers affected by soft reset."]
            _1,
        }
        impl SOFTRSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SOFTRSTW::_0 => false,
                    SOFTRSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SOFTRSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SOFTRSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SOFTRSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No reset request."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SOFTRSTW::_0)
            }
            #[doc = "Resets the registers affected by soft reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SOFTRSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 25;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `HALT`"]
        pub enum HALTW {
            #[doc = "No Freeze mode request."]
            _0,
            #[doc = "Enters Freeze mode if the FRZ bit is asserted."]
            _1,
        }
        impl HALTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HALTW::_0 => false,
                    HALTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HALTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HALTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HALTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No Freeze mode request."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HALTW::_0)
            }
            #[doc = "Enters Freeze mode if the FRZ bit is asserted."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HALTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 28;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RFEN`"]
        pub enum RFENW {
            #[doc = "Rx FIFO not enabled."]
            _0,
            #[doc = "Rx FIFO enabled."]
            _1,
        }
        impl RFENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RFENW::_0 => false,
                    RFENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RFENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RFENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RFENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Rx FIFO not enabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RFENW::_0)
            }
            #[doc = "Rx FIFO enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RFENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 29;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FRZ`"]
        pub enum FRZW {
            #[doc = "Not enabled to enter Freeze mode."]
            _0,
            #[doc = "Enabled to enter Freeze mode."]
            _1,
        }
        impl FRZW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FRZW::_0 => false,
                    FRZW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FRZW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FRZW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FRZW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Not enabled to enter Freeze mode."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FRZW::_0)
            }
            #[doc = "Enabled to enter Freeze mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FRZW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MDIS`"]
        pub enum MDISW {
            #[doc = "Enable the FlexCAN module."]
            _0,
            #[doc = "Disable the FlexCAN module."]
            _1,
        }
        impl MDISW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MDISW::_0 => false,
                    MDISW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MDISW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MDISW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MDISW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Enable the FlexCAN module."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MDISW::_0)
            }
            #[doc = "Disable the FlexCAN module."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MDISW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:6 - Number Of The Last Message Buffer"]
            #[inline(always)]
            pub fn maxmb(&self) -> MAXMBR {
                let bits = {
                    const MASK: u8 = 127;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                MAXMBR { bits }
            }
            #[doc = "Bits 8:9 - ID Acceptance Mode"]
            #[inline(always)]
            pub fn idam(&self) -> IDAMR {
                IDAMR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 11 - CAN FD operation enable"]
            #[inline(always)]
            pub fn fden(&self) -> FDENR {
                FDENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Abort Enable"]
            #[inline(always)]
            pub fn aen(&self) -> AENR {
                AENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Local Priority Enable"]
            #[inline(always)]
            pub fn lprioen(&self) -> LPRIOENR {
                LPRIOENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - Pretended Networking Enable"]
            #[inline(always)]
            pub fn pnet_en(&self) -> PNET_ENR {
                PNET_ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&self) -> DMAR {
                DMAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 16 - Individual Rx Masking And Queue Enable"]
            #[inline(always)]
            pub fn irmq(&self) -> IRMQR {
                IRMQR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - Self Reception Disable"]
            #[inline(always)]
            pub fn srxdis(&self) -> SRXDISR {
                SRXDISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 20 - Low-Power Mode Acknowledge"]
            #[inline(always)]
            pub fn lpmack(&self) -> LPMACKR {
                LPMACKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - Warning Interrupt Enable"]
            #[inline(always)]
            pub fn wrnen(&self) -> WRNENR {
                WRNENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 23 - Supervisor Mode"]
            #[inline(always)]
            pub fn supv(&self) -> SUPVR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                SUPVR { bits }
            }
            #[doc = "Bit 24 - Freeze Mode Acknowledge"]
            #[inline(always)]
            pub fn frzack(&self) -> FRZACKR {
                FRZACKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 25 - Soft Reset"]
            #[inline(always)]
            pub fn softrst(&self) -> SOFTRSTR {
                SOFTRSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 25;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 27 - FlexCAN Not Ready"]
            #[inline(always)]
            pub fn notrdy(&self) -> NOTRDYR {
                NOTRDYR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 27;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 28 - Halt FlexCAN"]
            #[inline(always)]
            pub fn halt(&self) -> HALTR {
                HALTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 28;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 29 - Rx FIFO Enable"]
            #[inline(always)]
            pub fn rfen(&self) -> RFENR {
                RFENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 29;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 30 - Freeze Enable"]
            #[inline(always)]
            pub fn frz(&self) -> FRZR {
                FRZR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Module Disable"]
            #[inline(always)]
            pub fn mdis(&self) -> MDISR {
                MDISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 3633315855 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:6 - Number Of The Last Message Buffer"]
            #[inline(always)]
            pub fn maxmb(&mut self) -> _MAXMBW {
                _MAXMBW { w: self }
            }
            #[doc = "Bits 8:9 - ID Acceptance Mode"]
            #[inline(always)]
            pub fn idam(&mut self) -> _IDAMW {
                _IDAMW { w: self }
            }
            #[doc = "Bit 11 - CAN FD operation enable"]
            #[inline(always)]
            pub fn fden(&mut self) -> _FDENW {
                _FDENW { w: self }
            }
            #[doc = "Bit 12 - Abort Enable"]
            #[inline(always)]
            pub fn aen(&mut self) -> _AENW {
                _AENW { w: self }
            }
            #[doc = "Bit 13 - Local Priority Enable"]
            #[inline(always)]
            pub fn lprioen(&mut self) -> _LPRIOENW {
                _LPRIOENW { w: self }
            }
            #[doc = "Bit 14 - Pretended Networking Enable"]
            #[inline(always)]
            pub fn pnet_en(&mut self) -> _PNET_ENW {
                _PNET_ENW { w: self }
            }
            #[doc = "Bit 15 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&mut self) -> _DMAW {
                _DMAW { w: self }
            }
            #[doc = "Bit 16 - Individual Rx Masking And Queue Enable"]
            #[inline(always)]
            pub fn irmq(&mut self) -> _IRMQW {
                _IRMQW { w: self }
            }
            #[doc = "Bit 17 - Self Reception Disable"]
            #[inline(always)]
            pub fn srxdis(&mut self) -> _SRXDISW {
                _SRXDISW { w: self }
            }
            #[doc = "Bit 21 - Warning Interrupt Enable"]
            #[inline(always)]
            pub fn wrnen(&mut self) -> _WRNENW {
                _WRNENW { w: self }
            }
            #[doc = "Bit 23 - Supervisor Mode"]
            #[inline(always)]
            pub fn supv(&mut self) -> _SUPVW {
                _SUPVW { w: self }
            }
            #[doc = "Bit 25 - Soft Reset"]
            #[inline(always)]
            pub fn softrst(&mut self) -> _SOFTRSTW {
                _SOFTRSTW { w: self }
            }
            #[doc = "Bit 28 - Halt FlexCAN"]
            #[inline(always)]
            pub fn halt(&mut self) -> _HALTW {
                _HALTW { w: self }
            }
            #[doc = "Bit 29 - Rx FIFO Enable"]
            #[inline(always)]
            pub fn rfen(&mut self) -> _RFENW {
                _RFENW { w: self }
            }
            #[doc = "Bit 30 - Freeze Enable"]
            #[inline(always)]
            pub fn frz(&mut self) -> _FRZW {
                _FRZW { w: self }
            }
            #[doc = "Bit 31 - Module Disable"]
            #[inline(always)]
            pub fn mdis(&mut self) -> _MDISW {
                _MDISW { w: self }
            }
        }
    }
    #[doc = "Control 1 register"]
    pub struct CTRL1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Control 1 register"]
    pub mod ctrl1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CTRL1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct PROPSEGR {
            bits: u8,
        }
        impl PROPSEGR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `LOM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LOMR {
            #[doc = "Listen-Only mode is deactivated."]
            _0,
            #[doc = "FlexCAN module operates in Listen-Only mode."]
            _1,
        }
        impl LOMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LOMR::_0 => false,
                    LOMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LOMR {
                match value {
                    false => LOMR::_0,
                    true => LOMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LOMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LOMR::_1
            }
        }
        #[doc = "Possible values of the field `LBUF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LBUFR {
            #[doc = "Buffer with highest priority is transmitted first."]
            _0,
            #[doc = "Lowest number buffer is transmitted first."]
            _1,
        }
        impl LBUFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LBUFR::_0 => false,
                    LBUFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LBUFR {
                match value {
                    false => LBUFR::_0,
                    true => LBUFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LBUFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LBUFR::_1
            }
        }
        #[doc = "Possible values of the field `TSYN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TSYNR {
            #[doc = "Timer Sync feature disabled"]
            _0,
            #[doc = "Timer Sync feature enabled"]
            _1,
        }
        impl TSYNR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TSYNR::_0 => false,
                    TSYNR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TSYNR {
                match value {
                    false => TSYNR::_0,
                    true => TSYNR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TSYNR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TSYNR::_1
            }
        }
        #[doc = "Possible values of the field `BOFFREC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BOFFRECR {
            #[doc = "Automatic recovering from Bus Off state enabled."]
            _0,
            #[doc = "Automatic recovering from Bus Off state disabled."]
            _1,
        }
        impl BOFFRECR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BOFFRECR::_0 => false,
                    BOFFRECR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BOFFRECR {
                match value {
                    false => BOFFRECR::_0,
                    true => BOFFRECR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BOFFRECR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BOFFRECR::_1
            }
        }
        #[doc = "Possible values of the field `SMP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMPR {
            #[doc = "Just one sample is used to determine the bit value."]
            _0,
            #[doc = "Three samples are used to determine the value of the received bit: the regular one (sample point) and 2 preceding samples; a majority rule is used."]
            _1,
        }
        impl SMPR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SMPR::_0 => false,
                    SMPR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SMPR {
                match value {
                    false => SMPR::_0,
                    true => SMPR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SMPR::_1
            }
        }
        #[doc = "Possible values of the field `RWRNMSK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RWRNMSKR {
            #[doc = "Rx Warning Interrupt disabled."]
            _0,
            #[doc = "Rx Warning Interrupt enabled."]
            _1,
        }
        impl RWRNMSKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RWRNMSKR::_0 => false,
                    RWRNMSKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RWRNMSKR {
                match value {
                    false => RWRNMSKR::_0,
                    true => RWRNMSKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RWRNMSKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RWRNMSKR::_1
            }
        }
        #[doc = "Possible values of the field `TWRNMSK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TWRNMSKR {
            #[doc = "Tx Warning Interrupt disabled."]
            _0,
            #[doc = "Tx Warning Interrupt enabled."]
            _1,
        }
        impl TWRNMSKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TWRNMSKR::_0 => false,
                    TWRNMSKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TWRNMSKR {
                match value {
                    false => TWRNMSKR::_0,
                    true => TWRNMSKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TWRNMSKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TWRNMSKR::_1
            }
        }
        #[doc = "Possible values of the field `LPB`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LPBR {
            #[doc = "Loop Back disabled."]
            _0,
            #[doc = "Loop Back enabled."]
            _1,
        }
        impl LPBR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LPBR::_0 => false,
                    LPBR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LPBR {
                match value {
                    false => LPBR::_0,
                    true => LPBR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LPBR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LPBR::_1
            }
        }
        #[doc = "Possible values of the field `CLKSRC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CLKSRCR {
            #[doc = "The CAN engine clock source is the oscillator clock. Under this condition, the oscillator clock frequency must be lower than the bus clock."]
            _0,
            #[doc = "The CAN engine clock source is the peripheral clock."]
            _1,
        }
        impl CLKSRCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CLKSRCR::_0 => false,
                    CLKSRCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CLKSRCR {
                match value {
                    false => CLKSRCR::_0,
                    true => CLKSRCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CLKSRCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CLKSRCR::_1
            }
        }
        #[doc = "Possible values of the field `ERRMSK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERRMSKR {
            #[doc = "Error interrupt disabled."]
            _0,
            #[doc = "Error interrupt enabled."]
            _1,
        }
        impl ERRMSKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERRMSKR::_0 => false,
                    ERRMSKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERRMSKR {
                match value {
                    false => ERRMSKR::_0,
                    true => ERRMSKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERRMSKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERRMSKR::_1
            }
        }
        #[doc = "Possible values of the field `BOFFMSK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BOFFMSKR {
            #[doc = "Bus Off interrupt disabled."]
            _0,
            #[doc = "Bus Off interrupt enabled."]
            _1,
        }
        impl BOFFMSKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BOFFMSKR::_0 => false,
                    BOFFMSKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BOFFMSKR {
                match value {
                    false => BOFFMSKR::_0,
                    true => BOFFMSKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BOFFMSKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BOFFMSKR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct PSEG2R {
            bits: u8,
        }
        impl PSEG2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct PSEG1R {
            bits: u8,
        }
        impl PSEG1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct RJWR {
            bits: u8,
        }
        impl RJWR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct PRESDIVR {
            bits: u8,
        }
        impl PRESDIVR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _PROPSEGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PROPSEGW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LOM`"]
        pub enum LOMW {
            #[doc = "Listen-Only mode is deactivated."]
            _0,
            #[doc = "FlexCAN module operates in Listen-Only mode."]
            _1,
        }
        impl LOMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LOMW::_0 => false,
                    LOMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LOMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LOMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LOMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Listen-Only mode is deactivated."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LOMW::_0)
            }
            #[doc = "FlexCAN module operates in Listen-Only mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LOMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LBUF`"]
        pub enum LBUFW {
            #[doc = "Buffer with highest priority is transmitted first."]
            _0,
            #[doc = "Lowest number buffer is transmitted first."]
            _1,
        }
        impl LBUFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LBUFW::_0 => false,
                    LBUFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LBUFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LBUFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LBUFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Buffer with highest priority is transmitted first."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LBUFW::_0)
            }
            #[doc = "Lowest number buffer is transmitted first."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LBUFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TSYN`"]
        pub enum TSYNW {
            #[doc = "Timer Sync feature disabled"]
            _0,
            #[doc = "Timer Sync feature enabled"]
            _1,
        }
        impl TSYNW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TSYNW::_0 => false,
                    TSYNW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TSYNW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TSYNW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TSYNW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Timer Sync feature disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TSYNW::_0)
            }
            #[doc = "Timer Sync feature enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TSYNW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BOFFREC`"]
        pub enum BOFFRECW {
            #[doc = "Automatic recovering from Bus Off state enabled."]
            _0,
            #[doc = "Automatic recovering from Bus Off state disabled."]
            _1,
        }
        impl BOFFRECW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    BOFFRECW::_0 => false,
                    BOFFRECW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BOFFRECW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BOFFRECW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BOFFRECW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Automatic recovering from Bus Off state enabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BOFFRECW::_0)
            }
            #[doc = "Automatic recovering from Bus Off state disabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BOFFRECW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMP`"]
        pub enum SMPW {
            #[doc = "Just one sample is used to determine the bit value."]
            _0,
            #[doc = "Three samples are used to determine the value of the received bit: the regular one (sample point) and 2 preceding samples; a majority rule is used."]
            _1,
        }
        impl SMPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SMPW::_0 => false,
                    SMPW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMPW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Just one sample is used to determine the bit value."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMPW::_0)
            }
            #[doc = "Three samples are used to determine the value of the received bit: the regular one (sample point) and 2 preceding samples; a majority rule is used."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SMPW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RWRNMSK`"]
        pub enum RWRNMSKW {
            #[doc = "Rx Warning Interrupt disabled."]
            _0,
            #[doc = "Rx Warning Interrupt enabled."]
            _1,
        }
        impl RWRNMSKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RWRNMSKW::_0 => false,
                    RWRNMSKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RWRNMSKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RWRNMSKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RWRNMSKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Rx Warning Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RWRNMSKW::_0)
            }
            #[doc = "Rx Warning Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RWRNMSKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TWRNMSK`"]
        pub enum TWRNMSKW {
            #[doc = "Tx Warning Interrupt disabled."]
            _0,
            #[doc = "Tx Warning Interrupt enabled."]
            _1,
        }
        impl TWRNMSKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TWRNMSKW::_0 => false,
                    TWRNMSKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TWRNMSKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TWRNMSKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TWRNMSKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Tx Warning Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TWRNMSKW::_0)
            }
            #[doc = "Tx Warning Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TWRNMSKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LPB`"]
        pub enum LPBW {
            #[doc = "Loop Back disabled."]
            _0,
            #[doc = "Loop Back enabled."]
            _1,
        }
        impl LPBW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LPBW::_0 => false,
                    LPBW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LPBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LPBW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LPBW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Loop Back disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LPBW::_0)
            }
            #[doc = "Loop Back enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LPBW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CLKSRC`"]
        pub enum CLKSRCW {
            #[doc = "The CAN engine clock source is the oscillator clock. Under this condition, the oscillator clock frequency must be lower than the bus clock."]
            _0,
            #[doc = "The CAN engine clock source is the peripheral clock."]
            _1,
        }
        impl CLKSRCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CLKSRCW::_0 => false,
                    CLKSRCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLKSRCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLKSRCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CLKSRCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The CAN engine clock source is the oscillator clock. Under this condition, the oscillator clock frequency must be lower than the bus clock."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CLKSRCW::_0)
            }
            #[doc = "The CAN engine clock source is the peripheral clock."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CLKSRCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ERRMSK`"]
        pub enum ERRMSKW {
            #[doc = "Error interrupt disabled."]
            _0,
            #[doc = "Error interrupt enabled."]
            _1,
        }
        impl ERRMSKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERRMSKW::_0 => false,
                    ERRMSKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERRMSKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERRMSKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERRMSKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Error interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERRMSKW::_0)
            }
            #[doc = "Error interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERRMSKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BOFFMSK`"]
        pub enum BOFFMSKW {
            #[doc = "Bus Off interrupt disabled."]
            _0,
            #[doc = "Bus Off interrupt enabled."]
            _1,
        }
        impl BOFFMSKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    BOFFMSKW::_0 => false,
                    BOFFMSKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BOFFMSKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BOFFMSKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BOFFMSKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Bus Off interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BOFFMSKW::_0)
            }
            #[doc = "Bus Off interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BOFFMSKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSEG2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSEG2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSEG1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSEG1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 19;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _RJWW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RJWW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 22;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _PRESDIVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PRESDIVW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:2 - Propagation Segment"]
            #[inline(always)]
            pub fn propseg(&self) -> PROPSEGR {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                PROPSEGR { bits }
            }
            #[doc = "Bit 3 - Listen-Only Mode"]
            #[inline(always)]
            pub fn lom(&self) -> LOMR {
                LOMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Lowest Buffer Transmitted First"]
            #[inline(always)]
            pub fn lbuf(&self) -> LBUFR {
                LBUFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Timer Sync"]
            #[inline(always)]
            pub fn tsyn(&self) -> TSYNR {
                TSYNR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Bus Off Recovery"]
            #[inline(always)]
            pub fn boffrec(&self) -> BOFFRECR {
                BOFFRECR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - CAN Bit Sampling"]
            #[inline(always)]
            pub fn smp(&self) -> SMPR {
                SMPR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Rx Warning Interrupt Mask"]
            #[inline(always)]
            pub fn rwrnmsk(&self) -> RWRNMSKR {
                RWRNMSKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 11 - Tx Warning Interrupt Mask"]
            #[inline(always)]
            pub fn twrnmsk(&self) -> TWRNMSKR {
                TWRNMSKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Loop Back Mode"]
            #[inline(always)]
            pub fn lpb(&self) -> LPBR {
                LPBR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - CAN Engine Clock Source"]
            #[inline(always)]
            pub fn clksrc(&self) -> CLKSRCR {
                CLKSRCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - Error Interrupt Mask"]
            #[inline(always)]
            pub fn errmsk(&self) -> ERRMSKR {
                ERRMSKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - Bus Off Interrupt Mask"]
            #[inline(always)]
            pub fn boffmsk(&self) -> BOFFMSKR {
                BOFFMSKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:18 - Phase Segment 2"]
            #[inline(always)]
            pub fn pseg2(&self) -> PSEG2R {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                PSEG2R { bits }
            }
            #[doc = "Bits 19:21 - Phase Segment 1"]
            #[inline(always)]
            pub fn pseg1(&self) -> PSEG1R {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 19;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                PSEG1R { bits }
            }
            #[doc = "Bits 22:23 - Resync Jump Width"]
            #[inline(always)]
            pub fn rjw(&self) -> RJWR {
                let bits = {
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                RJWR { bits }
            }
            #[doc = "Bits 24:31 - Prescaler Division Factor"]
            #[inline(always)]
            pub fn presdiv(&self) -> PRESDIVR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                PRESDIVR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:2 - Propagation Segment"]
            #[inline(always)]
            pub fn propseg(&mut self) -> _PROPSEGW {
                _PROPSEGW { w: self }
            }
            #[doc = "Bit 3 - Listen-Only Mode"]
            #[inline(always)]
            pub fn lom(&mut self) -> _LOMW {
                _LOMW { w: self }
            }
            #[doc = "Bit 4 - Lowest Buffer Transmitted First"]
            #[inline(always)]
            pub fn lbuf(&mut self) -> _LBUFW {
                _LBUFW { w: self }
            }
            #[doc = "Bit 5 - Timer Sync"]
            #[inline(always)]
            pub fn tsyn(&mut self) -> _TSYNW {
                _TSYNW { w: self }
            }
            #[doc = "Bit 6 - Bus Off Recovery"]
            #[inline(always)]
            pub fn boffrec(&mut self) -> _BOFFRECW {
                _BOFFRECW { w: self }
            }
            #[doc = "Bit 7 - CAN Bit Sampling"]
            #[inline(always)]
            pub fn smp(&mut self) -> _SMPW {
                _SMPW { w: self }
            }
            #[doc = "Bit 10 - Rx Warning Interrupt Mask"]
            #[inline(always)]
            pub fn rwrnmsk(&mut self) -> _RWRNMSKW {
                _RWRNMSKW { w: self }
            }
            #[doc = "Bit 11 - Tx Warning Interrupt Mask"]
            #[inline(always)]
            pub fn twrnmsk(&mut self) -> _TWRNMSKW {
                _TWRNMSKW { w: self }
            }
            #[doc = "Bit 12 - Loop Back Mode"]
            #[inline(always)]
            pub fn lpb(&mut self) -> _LPBW {
                _LPBW { w: self }
            }
            #[doc = "Bit 13 - CAN Engine Clock Source"]
            #[inline(always)]
            pub fn clksrc(&mut self) -> _CLKSRCW {
                _CLKSRCW { w: self }
            }
            #[doc = "Bit 14 - Error Interrupt Mask"]
            #[inline(always)]
            pub fn errmsk(&mut self) -> _ERRMSKW {
                _ERRMSKW { w: self }
            }
            #[doc = "Bit 15 - Bus Off Interrupt Mask"]
            #[inline(always)]
            pub fn boffmsk(&mut self) -> _BOFFMSKW {
                _BOFFMSKW { w: self }
            }
            #[doc = "Bits 16:18 - Phase Segment 2"]
            #[inline(always)]
            pub fn pseg2(&mut self) -> _PSEG2W {
                _PSEG2W { w: self }
            }
            #[doc = "Bits 19:21 - Phase Segment 1"]
            #[inline(always)]
            pub fn pseg1(&mut self) -> _PSEG1W {
                _PSEG1W { w: self }
            }
            #[doc = "Bits 22:23 - Resync Jump Width"]
            #[inline(always)]
            pub fn rjw(&mut self) -> _RJWW {
                _RJWW { w: self }
            }
            #[doc = "Bits 24:31 - Prescaler Division Factor"]
            #[inline(always)]
            pub fn presdiv(&mut self) -> _PRESDIVW {
                _PRESDIVW { w: self }
            }
        }
    }
    #[doc = "Free Running Timer"]
    pub struct TIMER {
        register: VolatileCell<u32>,
    }
    #[doc = "Free Running Timer"]
    pub mod timer {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TIMER {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct TIMERR {
            bits: u16,
        }
        impl TIMERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIMERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIMERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Timer Value"]
            #[inline(always)]
            pub fn timer(&self) -> TIMERR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                TIMERR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Timer Value"]
            #[inline(always)]
            pub fn timer(&mut self) -> _TIMERW {
                _TIMERW { w: self }
            }
        }
    }
    #[doc = "Rx Mailboxes Global Mask Register"]
    pub struct RXMGMASK {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Mailboxes Global Mask Register"]
    pub mod rxmgmask {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXMGMASK {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MGR {
            bits: u32,
        }
        impl MGR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MGW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Rx Mailboxes Global Mask Bits"]
            #[inline(always)]
            pub fn mg(&self) -> MGR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MGR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Rx Mailboxes Global Mask Bits"]
            #[inline(always)]
            pub fn mg(&mut self) -> _MGW {
                _MGW { w: self }
            }
        }
    }
    #[doc = "Rx 14 Mask register"]
    pub struct RX14MASK {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx 14 Mask register"]
    pub mod rx14mask {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RX14MASK {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RX14MR {
            bits: u32,
        }
        impl RX14MR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RX14MW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RX14MW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Rx Buffer 14 Mask Bits"]
            #[inline(always)]
            pub fn rx14m(&self) -> RX14MR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                RX14MR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Rx Buffer 14 Mask Bits"]
            #[inline(always)]
            pub fn rx14m(&mut self) -> _RX14MW {
                _RX14MW { w: self }
            }
        }
    }
    #[doc = "Rx 15 Mask register"]
    pub struct RX15MASK {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx 15 Mask register"]
    pub mod rx15mask {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RX15MASK {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RX15MR {
            bits: u32,
        }
        impl RX15MR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RX15MW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RX15MW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Rx Buffer 15 Mask Bits"]
            #[inline(always)]
            pub fn rx15m(&self) -> RX15MR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                RX15MR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Rx Buffer 15 Mask Bits"]
            #[inline(always)]
            pub fn rx15m(&mut self) -> _RX15MW {
                _RX15MW { w: self }
            }
        }
    }
    #[doc = "Error Counter"]
    pub struct ECR {
        register: VolatileCell<u32>,
    }
    #[doc = "Error Counter"]
    pub mod ecr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::ECR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct TXERRCNTR {
            bits: u8,
        }
        impl TXERRCNTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct RXERRCNTR {
            bits: u8,
        }
        impl RXERRCNTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct TXERRCNT_FASTR {
            bits: u8,
        }
        impl TXERRCNT_FASTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct RXERRCNT_FASTR {
            bits: u8,
        }
        impl RXERRCNT_FASTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXERRCNTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXERRCNTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXERRCNTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXERRCNTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXERRCNT_FASTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXERRCNT_FASTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXERRCNT_FASTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXERRCNT_FASTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Transmit Error Counter"]
            #[inline(always)]
            pub fn txerrcnt(&self) -> TXERRCNTR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TXERRCNTR { bits }
            }
            #[doc = "Bits 8:15 - Receive Error Counter"]
            #[inline(always)]
            pub fn rxerrcnt(&self) -> RXERRCNTR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                RXERRCNTR { bits }
            }
            #[doc = "Bits 16:23 - Transmit Error Counter for fast bits"]
            #[inline(always)]
            pub fn txerrcnt_fast(&self) -> TXERRCNT_FASTR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TXERRCNT_FASTR { bits }
            }
            #[doc = "Bits 24:31 - Receive Error Counter for fast bits"]
            #[inline(always)]
            pub fn rxerrcnt_fast(&self) -> RXERRCNT_FASTR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                RXERRCNT_FASTR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Transmit Error Counter"]
            #[inline(always)]
            pub fn txerrcnt(&mut self) -> _TXERRCNTW {
                _TXERRCNTW { w: self }
            }
            #[doc = "Bits 8:15 - Receive Error Counter"]
            #[inline(always)]
            pub fn rxerrcnt(&mut self) -> _RXERRCNTW {
                _RXERRCNTW { w: self }
            }
            #[doc = "Bits 16:23 - Transmit Error Counter for fast bits"]
            #[inline(always)]
            pub fn txerrcnt_fast(&mut self) -> _TXERRCNT_FASTW {
                _TXERRCNT_FASTW { w: self }
            }
            #[doc = "Bits 24:31 - Receive Error Counter for fast bits"]
            #[inline(always)]
            pub fn rxerrcnt_fast(&mut self) -> _RXERRCNT_FASTW {
                _RXERRCNT_FASTW { w: self }
            }
        }
    }
    #[doc = "Error and Status 1 register"]
    pub struct ESR1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Error and Status 1 register"]
    pub mod esr1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::ESR1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `ERRINT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERRINTR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "Indicates setting of any Error Bit in the Error and Status Register."]
            _1,
        }
        impl ERRINTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERRINTR::_0 => false,
                    ERRINTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERRINTR {
                match value {
                    false => ERRINTR::_0,
                    true => ERRINTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERRINTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERRINTR::_1
            }
        }
        #[doc = "Possible values of the field `BOFFINT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BOFFINTR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "FlexCAN module entered Bus Off state."]
            _1,
        }
        impl BOFFINTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BOFFINTR::_0 => false,
                    BOFFINTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BOFFINTR {
                match value {
                    false => BOFFINTR::_0,
                    true => BOFFINTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BOFFINTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BOFFINTR::_1
            }
        }
        #[doc = "Possible values of the field `RX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXR {
            #[doc = "FlexCAN is not receiving a message."]
            _0,
            #[doc = "FlexCAN is receiving a message."]
            _1,
        }
        impl RXR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXR::_0 => false,
                    RXR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXR {
                match value {
                    false => RXR::_0,
                    true => RXR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RXR::_1
            }
        }
        #[doc = "Possible values of the field `FLTCONF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FLTCONFR {
            #[doc = "Error Active"]
            _00,
            #[doc = "Error Passive"]
            _01,
            #[doc = "Bus Off"]
            _1X,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl FLTCONFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    FLTCONFR::_00 => 0,
                    FLTCONFR::_01 => 1,
                    FLTCONFR::_1X => 2,
                    FLTCONFR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> FLTCONFR {
                match value {
                    0 => FLTCONFR::_00,
                    1 => FLTCONFR::_01,
                    2 => FLTCONFR::_1X,
                    i => FLTCONFR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == FLTCONFR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == FLTCONFR::_01
            }
            #[doc = "Checks if the value of the field is `_1X`"]
            #[inline(always)]
            pub fn is_1x(&self) -> bool {
                *self == FLTCONFR::_1X
            }
        }
        #[doc = "Possible values of the field `TX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXR {
            #[doc = "FlexCAN is not transmitting a message."]
            _0,
            #[doc = "FlexCAN is transmitting a message."]
            _1,
        }
        impl TXR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXR::_0 => false,
                    TXR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXR {
                match value {
                    false => TXR::_0,
                    true => TXR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXR::_1
            }
        }
        #[doc = "Possible values of the field `IDLE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IDLER {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "CAN bus is now IDLE."]
            _1,
        }
        impl IDLER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    IDLER::_0 => false,
                    IDLER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> IDLER {
                match value {
                    false => IDLER::_0,
                    true => IDLER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == IDLER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == IDLER::_1
            }
        }
        #[doc = "Possible values of the field `RXWRN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXWRNR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "RXERRCNT is greater than or equal to 96."]
            _1,
        }
        impl RXWRNR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXWRNR::_0 => false,
                    RXWRNR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXWRNR {
                match value {
                    false => RXWRNR::_0,
                    true => RXWRNR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXWRNR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RXWRNR::_1
            }
        }
        #[doc = "Possible values of the field `TXWRN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXWRNR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "TXERRCNT is greater than or equal to 96."]
            _1,
        }
        impl TXWRNR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXWRNR::_0 => false,
                    TXWRNR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXWRNR {
                match value {
                    false => TXWRNR::_0,
                    true => TXWRNR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXWRNR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXWRNR::_1
            }
        }
        #[doc = "Possible values of the field `STFERR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum STFERRR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "A Stuffing Error occurred since last read of this register."]
            _1,
        }
        impl STFERRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    STFERRR::_0 => false,
                    STFERRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> STFERRR {
                match value {
                    false => STFERRR::_0,
                    true => STFERRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == STFERRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == STFERRR::_1
            }
        }
        #[doc = "Possible values of the field `FRMERR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FRMERRR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "A Form Error occurred since last read of this register."]
            _1,
        }
        impl FRMERRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FRMERRR::_0 => false,
                    FRMERRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FRMERRR {
                match value {
                    false => FRMERRR::_0,
                    true => FRMERRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FRMERRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FRMERRR::_1
            }
        }
        #[doc = "Possible values of the field `CRCERR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CRCERRR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "A CRC error occurred since last read of this register."]
            _1,
        }
        impl CRCERRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CRCERRR::_0 => false,
                    CRCERRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CRCERRR {
                match value {
                    false => CRCERRR::_0,
                    true => CRCERRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CRCERRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CRCERRR::_1
            }
        }
        #[doc = "Possible values of the field `ACKERR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ACKERRR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "An ACK error occurred since last read of this register."]
            _1,
        }
        impl ACKERRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ACKERRR::_0 => false,
                    ACKERRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ACKERRR {
                match value {
                    false => ACKERRR::_0,
                    true => ACKERRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ACKERRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ACKERRR::_1
            }
        }
        #[doc = "Possible values of the field `BIT0ERR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BIT0ERRR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "At least one bit sent as dominant is received as recessive."]
            _1,
        }
        impl BIT0ERRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BIT0ERRR::_0 => false,
                    BIT0ERRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BIT0ERRR {
                match value {
                    false => BIT0ERRR::_0,
                    true => BIT0ERRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BIT0ERRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BIT0ERRR::_1
            }
        }
        #[doc = "Possible values of the field `BIT1ERR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BIT1ERRR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "At least one bit sent as recessive is received as dominant."]
            _1,
        }
        impl BIT1ERRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BIT1ERRR::_0 => false,
                    BIT1ERRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BIT1ERRR {
                match value {
                    false => BIT1ERRR::_0,
                    true => BIT1ERRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BIT1ERRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BIT1ERRR::_1
            }
        }
        #[doc = "Possible values of the field `RWRNINT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RWRNINTR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "The Rx error counter transitioned from less than 96 to greater than or equal to 96."]
            _1,
        }
        impl RWRNINTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RWRNINTR::_0 => false,
                    RWRNINTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RWRNINTR {
                match value {
                    false => RWRNINTR::_0,
                    true => RWRNINTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RWRNINTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RWRNINTR::_1
            }
        }
        #[doc = "Possible values of the field `TWRNINT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TWRNINTR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "The Tx error counter transitioned from less than 96 to greater than or equal to 96."]
            _1,
        }
        impl TWRNINTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TWRNINTR::_0 => false,
                    TWRNINTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TWRNINTR {
                match value {
                    false => TWRNINTR::_0,
                    true => TWRNINTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TWRNINTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TWRNINTR::_1
            }
        }
        #[doc = "Possible values of the field `SYNCH`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SYNCHR {
            #[doc = "FlexCAN is not synchronized to the CAN bus."]
            _0,
            #[doc = "FlexCAN is synchronized to the CAN bus."]
            _1,
        }
        impl SYNCHR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SYNCHR::_0 => false,
                    SYNCHR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SYNCHR {
                match value {
                    false => SYNCHR::_0,
                    true => SYNCHR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SYNCHR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SYNCHR::_1
            }
        }
        #[doc = "Possible values of the field `BOFFDONEINT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BOFFDONEINTR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "FlexCAN module has completed Bus Off process."]
            _1,
        }
        impl BOFFDONEINTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BOFFDONEINTR::_0 => false,
                    BOFFDONEINTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BOFFDONEINTR {
                match value {
                    false => BOFFDONEINTR::_0,
                    true => BOFFDONEINTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BOFFDONEINTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BOFFDONEINTR::_1
            }
        }
        #[doc = "Possible values of the field `ERRINT_FAST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERRINT_FASTR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "Indicates setting of any Error Bit detected in the Data Phase of CAN FD frames with the BRS bit set."]
            _1,
        }
        impl ERRINT_FASTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERRINT_FASTR::_0 => false,
                    ERRINT_FASTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERRINT_FASTR {
                match value {
                    false => ERRINT_FASTR::_0,
                    true => ERRINT_FASTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERRINT_FASTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERRINT_FASTR::_1
            }
        }
        #[doc = "Possible values of the field `ERROVR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERROVRR {
            #[doc = "Overrun has not occurred."]
            _0,
            #[doc = "Overrun has occurred."]
            _1,
        }
        impl ERROVRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERROVRR::_0 => false,
                    ERROVRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERROVRR {
                match value {
                    false => ERROVRR::_0,
                    true => ERROVRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERROVRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERROVRR::_1
            }
        }
        #[doc = "Possible values of the field `STFERR_FAST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum STFERR_FASTR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "A Stuffing Error occurred since last read of this register."]
            _1,
        }
        impl STFERR_FASTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    STFERR_FASTR::_0 => false,
                    STFERR_FASTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> STFERR_FASTR {
                match value {
                    false => STFERR_FASTR::_0,
                    true => STFERR_FASTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == STFERR_FASTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == STFERR_FASTR::_1
            }
        }
        #[doc = "Possible values of the field `FRMERR_FAST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FRMERR_FASTR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "A Form Error occurred since last read of this register."]
            _1,
        }
        impl FRMERR_FASTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FRMERR_FASTR::_0 => false,
                    FRMERR_FASTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FRMERR_FASTR {
                match value {
                    false => FRMERR_FASTR::_0,
                    true => FRMERR_FASTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FRMERR_FASTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FRMERR_FASTR::_1
            }
        }
        #[doc = "Possible values of the field `CRCERR_FAST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CRCERR_FASTR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "A CRC error occurred since last read of this register."]
            _1,
        }
        impl CRCERR_FASTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CRCERR_FASTR::_0 => false,
                    CRCERR_FASTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CRCERR_FASTR {
                match value {
                    false => CRCERR_FASTR::_0,
                    true => CRCERR_FASTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CRCERR_FASTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CRCERR_FASTR::_1
            }
        }
        #[doc = "Possible values of the field `BIT0ERR_FAST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BIT0ERR_FASTR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "At least one bit sent as dominant is received as recessive."]
            _1,
        }
        impl BIT0ERR_FASTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BIT0ERR_FASTR::_0 => false,
                    BIT0ERR_FASTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BIT0ERR_FASTR {
                match value {
                    false => BIT0ERR_FASTR::_0,
                    true => BIT0ERR_FASTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BIT0ERR_FASTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BIT0ERR_FASTR::_1
            }
        }
        #[doc = "Possible values of the field `BIT1ERR_FAST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BIT1ERR_FASTR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "At least one bit sent as recessive is received as dominant."]
            _1,
        }
        impl BIT1ERR_FASTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BIT1ERR_FASTR::_0 => false,
                    BIT1ERR_FASTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BIT1ERR_FASTR {
                match value {
                    false => BIT1ERR_FASTR::_0,
                    true => BIT1ERR_FASTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BIT1ERR_FASTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BIT1ERR_FASTR::_1
            }
        }
        #[doc = "Values that can be written to the field `ERRINT`"]
        pub enum ERRINTW {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "Indicates setting of any Error Bit in the Error and Status Register."]
            _1,
        }
        impl ERRINTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERRINTW::_0 => false,
                    ERRINTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERRINTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERRINTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERRINTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No such occurrence."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERRINTW::_0)
            }
            #[doc = "Indicates setting of any Error Bit in the Error and Status Register."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERRINTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BOFFINT`"]
        pub enum BOFFINTW {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "FlexCAN module entered Bus Off state."]
            _1,
        }
        impl BOFFINTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    BOFFINTW::_0 => false,
                    BOFFINTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BOFFINTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BOFFINTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BOFFINTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No such occurrence."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BOFFINTW::_0)
            }
            #[doc = "FlexCAN module entered Bus Off state."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BOFFINTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RWRNINT`"]
        pub enum RWRNINTW {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "The Rx error counter transitioned from less than 96 to greater than or equal to 96."]
            _1,
        }
        impl RWRNINTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RWRNINTW::_0 => false,
                    RWRNINTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RWRNINTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RWRNINTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RWRNINTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No such occurrence."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RWRNINTW::_0)
            }
            #[doc = "The Rx error counter transitioned from less than 96 to greater than or equal to 96."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RWRNINTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TWRNINT`"]
        pub enum TWRNINTW {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "The Tx error counter transitioned from less than 96 to greater than or equal to 96."]
            _1,
        }
        impl TWRNINTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TWRNINTW::_0 => false,
                    TWRNINTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TWRNINTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TWRNINTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TWRNINTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No such occurrence."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TWRNINTW::_0)
            }
            #[doc = "The Tx error counter transitioned from less than 96 to greater than or equal to 96."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TWRNINTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BOFFDONEINT`"]
        pub enum BOFFDONEINTW {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "FlexCAN module has completed Bus Off process."]
            _1,
        }
        impl BOFFDONEINTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    BOFFDONEINTW::_0 => false,
                    BOFFDONEINTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BOFFDONEINTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BOFFDONEINTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BOFFDONEINTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No such occurrence."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BOFFDONEINTW::_0)
            }
            #[doc = "FlexCAN module has completed Bus Off process."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BOFFDONEINTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 19;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ERRINT_FAST`"]
        pub enum ERRINT_FASTW {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "Indicates setting of any Error Bit detected in the Data Phase of CAN FD frames with the BRS bit set."]
            _1,
        }
        impl ERRINT_FASTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERRINT_FASTW::_0 => false,
                    ERRINT_FASTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERRINT_FASTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERRINT_FASTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERRINT_FASTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No such occurrence."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERRINT_FASTW::_0)
            }
            #[doc = "Indicates setting of any Error Bit detected in the Data Phase of CAN FD frames with the BRS bit set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERRINT_FASTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ERROVR`"]
        pub enum ERROVRW {
            #[doc = "Overrun has not occurred."]
            _0,
            #[doc = "Overrun has occurred."]
            _1,
        }
        impl ERROVRW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERROVRW::_0 => false,
                    ERROVRW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERROVRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERROVRW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERROVRW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Overrun has not occurred."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERROVRW::_0)
            }
            #[doc = "Overrun has occurred."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERROVRW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 21;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 1 - Error Interrupt"]
            #[inline(always)]
            pub fn errint(&self) -> ERRINTR {
                ERRINTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Bus Off Interrupt"]
            #[inline(always)]
            pub fn boffint(&self) -> BOFFINTR {
                BOFFINTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - FlexCAN In Reception"]
            #[inline(always)]
            pub fn rx(&self) -> RXR {
                RXR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 4:5 - Fault Confinement State"]
            #[inline(always)]
            pub fn fltconf(&self) -> FLTCONFR {
                FLTCONFR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 6 - FlexCAN In Transmission"]
            #[inline(always)]
            pub fn tx(&self) -> TXR {
                TXR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - IDLE"]
            #[inline(always)]
            pub fn idle(&self) -> IDLER {
                IDLER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Rx Error Warning"]
            #[inline(always)]
            pub fn rxwrn(&self) -> RXWRNR {
                RXWRNR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - TX Error Warning"]
            #[inline(always)]
            pub fn txwrn(&self) -> TXWRNR {
                TXWRNR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Stuffing Error"]
            #[inline(always)]
            pub fn stferr(&self) -> STFERRR {
                STFERRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 11 - Form Error"]
            #[inline(always)]
            pub fn frmerr(&self) -> FRMERRR {
                FRMERRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Cyclic Redundancy Check Error"]
            #[inline(always)]
            pub fn crcerr(&self) -> CRCERRR {
                CRCERRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Acknowledge Error"]
            #[inline(always)]
            pub fn ackerr(&self) -> ACKERRR {
                ACKERRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - Bit0 Error"]
            #[inline(always)]
            pub fn bit0err(&self) -> BIT0ERRR {
                BIT0ERRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - Bit1 Error"]
            #[inline(always)]
            pub fn bit1err(&self) -> BIT1ERRR {
                BIT1ERRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 16 - Rx Warning Interrupt Flag"]
            #[inline(always)]
            pub fn rwrnint(&self) -> RWRNINTR {
                RWRNINTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - Tx Warning Interrupt Flag"]
            #[inline(always)]
            pub fn twrnint(&self) -> TWRNINTR {
                TWRNINTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 18 - CAN Synchronization Status"]
            #[inline(always)]
            pub fn synch(&self) -> SYNCHR {
                SYNCHR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 19 - Bus Off Done Interrupt"]
            #[inline(always)]
            pub fn boffdoneint(&self) -> BOFFDONEINTR {
                BOFFDONEINTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 19;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 20 - Error Interrupt for errors detected in the Data Phase of CAN FD frames with the BRS bit set"]
            #[inline(always)]
            pub fn errint_fast(&self) -> ERRINT_FASTR {
                ERRINT_FASTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - Error Overrun bit"]
            #[inline(always)]
            pub fn errovr(&self) -> ERROVRR {
                ERROVRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 26 - Stuffing Error in the Data Phase of CAN FD frames with the BRS bit set"]
            #[inline(always)]
            pub fn stferr_fast(&self) -> STFERR_FASTR {
                STFERR_FASTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 26;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 27 - Form Error in the Data Phase of CAN FD frames with the BRS bit set"]
            #[inline(always)]
            pub fn frmerr_fast(&self) -> FRMERR_FASTR {
                FRMERR_FASTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 27;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 28 - Cyclic Redundancy Check Error in the CRC field of CAN FD frames with the BRS bit set"]
            #[inline(always)]
            pub fn crcerr_fast(&self) -> CRCERR_FASTR {
                CRCERR_FASTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 28;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 30 - Bit0 Error in the Data Phase of CAN FD frames with the BRS bit set"]
            #[inline(always)]
            pub fn bit0err_fast(&self) -> BIT0ERR_FASTR {
                BIT0ERR_FASTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Bit1 Error in the Data Phase of CAN FD frames with the BRS bit set"]
            #[inline(always)]
            pub fn bit1err_fast(&self) -> BIT1ERR_FASTR {
                BIT1ERR_FASTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 1 - Error Interrupt"]
            #[inline(always)]
            pub fn errint(&mut self) -> _ERRINTW {
                _ERRINTW { w: self }
            }
            #[doc = "Bit 2 - Bus Off Interrupt"]
            #[inline(always)]
            pub fn boffint(&mut self) -> _BOFFINTW {
                _BOFFINTW { w: self }
            }
            #[doc = "Bit 16 - Rx Warning Interrupt Flag"]
            #[inline(always)]
            pub fn rwrnint(&mut self) -> _RWRNINTW {
                _RWRNINTW { w: self }
            }
            #[doc = "Bit 17 - Tx Warning Interrupt Flag"]
            #[inline(always)]
            pub fn twrnint(&mut self) -> _TWRNINTW {
                _TWRNINTW { w: self }
            }
            #[doc = "Bit 19 - Bus Off Done Interrupt"]
            #[inline(always)]
            pub fn boffdoneint(&mut self) -> _BOFFDONEINTW {
                _BOFFDONEINTW { w: self }
            }
            #[doc = "Bit 20 - Error Interrupt for errors detected in the Data Phase of CAN FD frames with the BRS bit set"]
            #[inline(always)]
            pub fn errint_fast(&mut self) -> _ERRINT_FASTW {
                _ERRINT_FASTW { w: self }
            }
            #[doc = "Bit 21 - Error Overrun bit"]
            #[inline(always)]
            pub fn errovr(&mut self) -> _ERROVRW {
                _ERROVRW { w: self }
            }
        }
    }
    #[doc = "Interrupt Masks 1 register"]
    pub struct IMASK1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Interrupt Masks 1 register"]
    pub mod imask1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::IMASK1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BUF31TO0MR {
            bits: u32,
        }
        impl BUF31TO0MR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _BUF31TO0MW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BUF31TO0MW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Buffer MB i Mask"]
            #[inline(always)]
            pub fn buf31to0m(&self) -> BUF31TO0MR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                BUF31TO0MR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Buffer MB i Mask"]
            #[inline(always)]
            pub fn buf31to0m(&mut self) -> _BUF31TO0MW {
                _BUF31TO0MW { w: self }
            }
        }
    }
    #[doc = "Interrupt Flags 1 register"]
    pub struct IFLAG1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Interrupt Flags 1 register"]
    pub mod iflag1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::IFLAG1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `BUF0I`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BUF0IR {
            #[doc = "The corresponding buffer has no occurrence of successfully completed transmission or reception when MCR[RFEN]=0."]
            _0,
            #[doc = "The corresponding buffer has successfully completed transmission or reception when MCR[RFEN]=0."]
            _1,
        }
        impl BUF0IR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BUF0IR::_0 => false,
                    BUF0IR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BUF0IR {
                match value {
                    false => BUF0IR::_0,
                    true => BUF0IR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BUF0IR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BUF0IR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct BUF4TO1IR {
            bits: u8,
        }
        impl BUF4TO1IR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `BUF5I`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BUF5IR {
            #[doc = "No occurrence of MB5 completing transmission/reception when MCR[RFEN]=0, or of frame(s) available in the FIFO, when MCR[RFEN]=1"]
            _0,
            #[doc = "MB5 completed transmission/reception when MCR[RFEN]=0, or frame(s) available in the Rx FIFO when MCR[RFEN]=1. It generates a DMA request in case of MCR[RFEN] and MCR[DMA] are enabled."]
            _1,
        }
        impl BUF5IR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BUF5IR::_0 => false,
                    BUF5IR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BUF5IR {
                match value {
                    false => BUF5IR::_0,
                    true => BUF5IR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BUF5IR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BUF5IR::_1
            }
        }
        #[doc = "Possible values of the field `BUF6I`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BUF6IR {
            #[doc = "No occurrence of MB6 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO almost full when MCR[RFEN]=1"]
            _0,
            #[doc = "MB6 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO almost full when MCR[RFEN]=1"]
            _1,
        }
        impl BUF6IR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BUF6IR::_0 => false,
                    BUF6IR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BUF6IR {
                match value {
                    false => BUF6IR::_0,
                    true => BUF6IR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BUF6IR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BUF6IR::_1
            }
        }
        #[doc = "Possible values of the field `BUF7I`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BUF7IR {
            #[doc = "No occurrence of MB7 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO overflow when MCR[RFEN]=1"]
            _0,
            #[doc = "MB7 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO overflow when MCR[RFEN]=1"]
            _1,
        }
        impl BUF7IR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BUF7IR::_0 => false,
                    BUF7IR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BUF7IR {
                match value {
                    false => BUF7IR::_0,
                    true => BUF7IR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BUF7IR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BUF7IR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct BUF31TO8IR {
            bits: u32,
        }
        impl BUF31TO8IR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = "Values that can be written to the field `BUF0I`"]
        pub enum BUF0IW {
            #[doc = "The corresponding buffer has no occurrence of successfully completed transmission or reception when MCR[RFEN]=0."]
            _0,
            #[doc = "The corresponding buffer has successfully completed transmission or reception when MCR[RFEN]=0."]
            _1,
        }
        impl BUF0IW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    BUF0IW::_0 => false,
                    BUF0IW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BUF0IW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BUF0IW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BUF0IW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The corresponding buffer has no occurrence of successfully completed transmission or reception when MCR[RFEN]=0."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BUF0IW::_0)
            }
            #[doc = "The corresponding buffer has successfully completed transmission or reception when MCR[RFEN]=0."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BUF0IW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BUF4TO1IW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BUF4TO1IW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BUF5I`"]
        pub enum BUF5IW {
            #[doc = "No occurrence of MB5 completing transmission/reception when MCR[RFEN]=0, or of frame(s) available in the FIFO, when MCR[RFEN]=1"]
            _0,
            #[doc = "MB5 completed transmission/reception when MCR[RFEN]=0, or frame(s) available in the Rx FIFO when MCR[RFEN]=1. It generates a DMA request in case of MCR[RFEN] and MCR[DMA] are enabled."]
            _1,
        }
        impl BUF5IW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    BUF5IW::_0 => false,
                    BUF5IW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BUF5IW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BUF5IW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BUF5IW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No occurrence of MB5 completing transmission/reception when MCR[RFEN]=0, or of frame(s) available in the FIFO, when MCR[RFEN]=1"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BUF5IW::_0)
            }
            #[doc = "MB5 completed transmission/reception when MCR[RFEN]=0, or frame(s) available in the Rx FIFO when MCR[RFEN]=1. It generates a DMA request in case of MCR[RFEN] and MCR[DMA] are enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BUF5IW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BUF6I`"]
        pub enum BUF6IW {
            #[doc = "No occurrence of MB6 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO almost full when MCR[RFEN]=1"]
            _0,
            #[doc = "MB6 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO almost full when MCR[RFEN]=1"]
            _1,
        }
        impl BUF6IW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    BUF6IW::_0 => false,
                    BUF6IW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BUF6IW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BUF6IW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BUF6IW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No occurrence of MB6 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO almost full when MCR[RFEN]=1"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BUF6IW::_0)
            }
            #[doc = "MB6 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO almost full when MCR[RFEN]=1"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BUF6IW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BUF7I`"]
        pub enum BUF7IW {
            #[doc = "No occurrence of MB7 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO overflow when MCR[RFEN]=1"]
            _0,
            #[doc = "MB7 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO overflow when MCR[RFEN]=1"]
            _1,
        }
        impl BUF7IW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    BUF7IW::_0 => false,
                    BUF7IW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BUF7IW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BUF7IW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BUF7IW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No occurrence of MB7 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO overflow when MCR[RFEN]=1"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BUF7IW::_0)
            }
            #[doc = "MB7 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO overflow when MCR[RFEN]=1"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BUF7IW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BUF31TO8IW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BUF31TO8IW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 16777215;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Buffer MB0 Interrupt Or Clear FIFO bit"]
            #[inline(always)]
            pub fn buf0i(&self) -> BUF0IR {
                BUF0IR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 1:4 - Buffer MB i Interrupt Or \"reserved\""]
            #[inline(always)]
            pub fn buf4to1i(&self) -> BUF4TO1IR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BUF4TO1IR { bits }
            }
            #[doc = "Bit 5 - Buffer MB5 Interrupt Or \"Frames available in Rx FIFO\""]
            #[inline(always)]
            pub fn buf5i(&self) -> BUF5IR {
                BUF5IR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Buffer MB6 Interrupt Or \"Rx FIFO Warning\""]
            #[inline(always)]
            pub fn buf6i(&self) -> BUF6IR {
                BUF6IR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Buffer MB7 Interrupt Or \"Rx FIFO Overflow\""]
            #[inline(always)]
            pub fn buf7i(&self) -> BUF7IR {
                BUF7IR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:31 - Buffer MBi Interrupt"]
            #[inline(always)]
            pub fn buf31to8i(&self) -> BUF31TO8IR {
                let bits = {
                    const MASK: u32 = 16777215;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                BUF31TO8IR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Buffer MB0 Interrupt Or Clear FIFO bit"]
            #[inline(always)]
            pub fn buf0i(&mut self) -> _BUF0IW {
                _BUF0IW { w: self }
            }
            #[doc = "Bits 1:4 - Buffer MB i Interrupt Or \"reserved\""]
            #[inline(always)]
            pub fn buf4to1i(&mut self) -> _BUF4TO1IW {
                _BUF4TO1IW { w: self }
            }
            #[doc = "Bit 5 - Buffer MB5 Interrupt Or \"Frames available in Rx FIFO\""]
            #[inline(always)]
            pub fn buf5i(&mut self) -> _BUF5IW {
                _BUF5IW { w: self }
            }
            #[doc = "Bit 6 - Buffer MB6 Interrupt Or \"Rx FIFO Warning\""]
            #[inline(always)]
            pub fn buf6i(&mut self) -> _BUF6IW {
                _BUF6IW { w: self }
            }
            #[doc = "Bit 7 - Buffer MB7 Interrupt Or \"Rx FIFO Overflow\""]
            #[inline(always)]
            pub fn buf7i(&mut self) -> _BUF7IW {
                _BUF7IW { w: self }
            }
            #[doc = "Bits 8:31 - Buffer MBi Interrupt"]
            #[inline(always)]
            pub fn buf31to8i(&mut self) -> _BUF31TO8IW {
                _BUF31TO8IW { w: self }
            }
        }
    }
    #[doc = "Control 2 register"]
    pub struct CTRL2 {
        register: VolatileCell<u32>,
    }
    #[doc = "Control 2 register"]
    pub mod ctrl2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CTRL2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `EDFLTDIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EDFLTDISR {
            #[doc = "Edge Filter is enabled."]
            _0,
            #[doc = "Edge Filter is disabled."]
            _1,
        }
        impl EDFLTDISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EDFLTDISR::_0 => false,
                    EDFLTDISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EDFLTDISR {
                match value {
                    false => EDFLTDISR::_0,
                    true => EDFLTDISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EDFLTDISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EDFLTDISR::_1
            }
        }
        #[doc = "Possible values of the field `ISOCANFDEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISOCANFDENR {
            #[doc = "FlexCAN operates using the non-ISO CAN FD protocol."]
            _0,
            #[doc = "FlexCAN operates using the ISO CAN FD protocol (ISO 11898-1)."]
            _1,
        }
        impl ISOCANFDENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISOCANFDENR::_0 => false,
                    ISOCANFDENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISOCANFDENR {
                match value {
                    false => ISOCANFDENR::_0,
                    true => ISOCANFDENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISOCANFDENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISOCANFDENR::_1
            }
        }
        #[doc = "Possible values of the field `PREXCEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PREXCENR {
            #[doc = "Protocol Exception is disabled."]
            _0,
            #[doc = "Protocol Exception is enabled."]
            _1,
        }
        impl PREXCENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PREXCENR::_0 => false,
                    PREXCENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PREXCENR {
                match value {
                    false => PREXCENR::_0,
                    true => PREXCENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PREXCENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PREXCENR::_1
            }
        }
        #[doc = "Possible values of the field `TIMER_SRC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIMER_SRCR {
            #[doc = "The Free Running Timer is clocked by the CAN bit clock, which defines the baud rate on the CAN bus."]
            _0,
            #[doc = "The Free Running Timer is clocked by an external time tick. The period can be either adjusted to be equal to the baud rate on the CAN bus, or a different value as required. See the device specific section for details about the external time tick."]
            _1,
        }
        impl TIMER_SRCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TIMER_SRCR::_0 => false,
                    TIMER_SRCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TIMER_SRCR {
                match value {
                    false => TIMER_SRCR::_0,
                    true => TIMER_SRCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIMER_SRCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TIMER_SRCR::_1
            }
        }
        #[doc = "Possible values of the field `EACEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EACENR {
            #[doc = "Rx Mailbox filter's IDE bit is always compared and RTR is never compared despite mask bits."]
            _0,
            #[doc = "Enables the comparison of both Rx Mailbox filter's IDE and RTR bit with their corresponding bits within the incoming frame. Mask bits do apply."]
            _1,
        }
        impl EACENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EACENR::_0 => false,
                    EACENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EACENR {
                match value {
                    false => EACENR::_0,
                    true => EACENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EACENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EACENR::_1
            }
        }
        #[doc = "Possible values of the field `RRS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RRSR {
            #[doc = "Remote Response Frame is generated."]
            _0,
            #[doc = "Remote Request Frame is stored."]
            _1,
        }
        impl RRSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RRSR::_0 => false,
                    RRSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RRSR {
                match value {
                    false => RRSR::_0,
                    true => RRSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RRSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RRSR::_1
            }
        }
        #[doc = "Possible values of the field `MRP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MRPR {
            #[doc = "Matching starts from Rx FIFO and continues on Mailboxes."]
            _0,
            #[doc = "Matching starts from Mailboxes and continues on Rx FIFO."]
            _1,
        }
        impl MRPR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MRPR::_0 => false,
                    MRPR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MRPR {
                match value {
                    false => MRPR::_0,
                    true => MRPR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MRPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MRPR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct TASDR {
            bits: u8,
        }
        impl TASDR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct RFFNR {
            bits: u8,
        }
        impl RFFNR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `BOFFDONEMSK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BOFFDONEMSKR {
            #[doc = "Bus Off Done interrupt disabled."]
            _0,
            #[doc = "Bus Off Done interrupt enabled."]
            _1,
        }
        impl BOFFDONEMSKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BOFFDONEMSKR::_0 => false,
                    BOFFDONEMSKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BOFFDONEMSKR {
                match value {
                    false => BOFFDONEMSKR::_0,
                    true => BOFFDONEMSKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BOFFDONEMSKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BOFFDONEMSKR::_1
            }
        }
        #[doc = "Possible values of the field `ERRMSK_FAST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERRMSK_FASTR {
            #[doc = "ERRINT_FAST Error interrupt disabled."]
            _0,
            #[doc = "ERRINT_FAST Error interrupt enabled."]
            _1,
        }
        impl ERRMSK_FASTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERRMSK_FASTR::_0 => false,
                    ERRMSK_FASTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERRMSK_FASTR {
                match value {
                    false => ERRMSK_FASTR::_0,
                    true => ERRMSK_FASTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERRMSK_FASTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERRMSK_FASTR::_1
            }
        }
        #[doc = "Values that can be written to the field `EDFLTDIS`"]
        pub enum EDFLTDISW {
            #[doc = "Edge Filter is enabled."]
            _0,
            #[doc = "Edge Filter is disabled."]
            _1,
        }
        impl EDFLTDISW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EDFLTDISW::_0 => false,
                    EDFLTDISW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EDFLTDISW<'a> {
            w: &'a mut W,
        }
        impl<'a> _EDFLTDISW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EDFLTDISW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Edge Filter is enabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EDFLTDISW::_0)
            }
            #[doc = "Edge Filter is disabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EDFLTDISW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISOCANFDEN`"]
        pub enum ISOCANFDENW {
            #[doc = "FlexCAN operates using the non-ISO CAN FD protocol."]
            _0,
            #[doc = "FlexCAN operates using the ISO CAN FD protocol (ISO 11898-1)."]
            _1,
        }
        impl ISOCANFDENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISOCANFDENW::_0 => false,
                    ISOCANFDENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISOCANFDENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISOCANFDENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISOCANFDENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FlexCAN operates using the non-ISO CAN FD protocol."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISOCANFDENW::_0)
            }
            #[doc = "FlexCAN operates using the ISO CAN FD protocol (ISO 11898-1)."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISOCANFDENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PREXCEN`"]
        pub enum PREXCENW {
            #[doc = "Protocol Exception is disabled."]
            _0,
            #[doc = "Protocol Exception is enabled."]
            _1,
        }
        impl PREXCENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PREXCENW::_0 => false,
                    PREXCENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PREXCENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PREXCENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PREXCENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Protocol Exception is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PREXCENW::_0)
            }
            #[doc = "Protocol Exception is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PREXCENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TIMER_SRC`"]
        pub enum TIMER_SRCW {
            #[doc = "The Free Running Timer is clocked by the CAN bit clock, which defines the baud rate on the CAN bus."]
            _0,
            #[doc = "The Free Running Timer is clocked by an external time tick. The period can be either adjusted to be equal to the baud rate on the CAN bus, or a different value as required. See the device specific section for details about the external time tick."]
            _1,
        }
        impl TIMER_SRCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TIMER_SRCW::_0 => false,
                    TIMER_SRCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIMER_SRCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIMER_SRCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIMER_SRCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The Free Running Timer is clocked by the CAN bit clock, which defines the baud rate on the CAN bus."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIMER_SRCW::_0)
            }
            #[doc = "The Free Running Timer is clocked by an external time tick. The period can be either adjusted to be equal to the baud rate on the CAN bus, or a different value as required. See the device specific section for details about the external time tick."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TIMER_SRCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `EACEN`"]
        pub enum EACENW {
            #[doc = "Rx Mailbox filter's IDE bit is always compared and RTR is never compared despite mask bits."]
            _0,
            #[doc = "Enables the comparison of both Rx Mailbox filter's IDE and RTR bit with their corresponding bits within the incoming frame. Mask bits do apply."]
            _1,
        }
        impl EACENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EACENW::_0 => false,
                    EACENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EACENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _EACENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EACENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Rx Mailbox filter's IDE bit is always compared and RTR is never compared despite mask bits."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EACENW::_0)
            }
            #[doc = "Enables the comparison of both Rx Mailbox filter's IDE and RTR bit with their corresponding bits within the incoming frame. Mask bits do apply."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EACENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RRS`"]
        pub enum RRSW {
            #[doc = "Remote Response Frame is generated."]
            _0,
            #[doc = "Remote Request Frame is stored."]
            _1,
        }
        impl RRSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RRSW::_0 => false,
                    RRSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RRSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RRSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RRSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Remote Response Frame is generated."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RRSW::_0)
            }
            #[doc = "Remote Request Frame is stored."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RRSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MRP`"]
        pub enum MRPW {
            #[doc = "Matching starts from Rx FIFO and continues on Mailboxes."]
            _0,
            #[doc = "Matching starts from Mailboxes and continues on Rx FIFO."]
            _1,
        }
        impl MRPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MRPW::_0 => false,
                    MRPW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MRPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MRPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MRPW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Matching starts from Rx FIFO and continues on Mailboxes."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MRPW::_0)
            }
            #[doc = "Matching starts from Mailboxes and continues on Rx FIFO."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MRPW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _TASDW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TASDW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 19;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _RFFNW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RFFNW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BOFFDONEMSK`"]
        pub enum BOFFDONEMSKW {
            #[doc = "Bus Off Done interrupt disabled."]
            _0,
            #[doc = "Bus Off Done interrupt enabled."]
            _1,
        }
        impl BOFFDONEMSKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    BOFFDONEMSKW::_0 => false,
                    BOFFDONEMSKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BOFFDONEMSKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BOFFDONEMSKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BOFFDONEMSKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Bus Off Done interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BOFFDONEMSKW::_0)
            }
            #[doc = "Bus Off Done interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BOFFDONEMSKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ERRMSK_FAST`"]
        pub enum ERRMSK_FASTW {
            #[doc = "ERRINT_FAST Error interrupt disabled."]
            _0,
            #[doc = "ERRINT_FAST Error interrupt enabled."]
            _1,
        }
        impl ERRMSK_FASTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERRMSK_FASTW::_0 => false,
                    ERRMSK_FASTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERRMSK_FASTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERRMSK_FASTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERRMSK_FASTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "ERRINT_FAST Error interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERRMSK_FASTW::_0)
            }
            #[doc = "ERRINT_FAST Error interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERRMSK_FASTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 11 - Edge Filter Disable"]
            #[inline(always)]
            pub fn edfltdis(&self) -> EDFLTDISR {
                EDFLTDISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - ISO CAN FD Enable"]
            #[inline(always)]
            pub fn isocanfden(&self) -> ISOCANFDENR {
                ISOCANFDENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - Protocol Exception Enable"]
            #[inline(always)]
            pub fn prexcen(&self) -> PREXCENR {
                PREXCENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - Timer Source"]
            #[inline(always)]
            pub fn timer_src(&self) -> TIMER_SRCR {
                TIMER_SRCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 16 - Entire Frame Arbitration Field Comparison Enable For Rx Mailboxes"]
            #[inline(always)]
            pub fn eacen(&self) -> EACENR {
                EACENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - Remote Request Storing"]
            #[inline(always)]
            pub fn rrs(&self) -> RRSR {
                RRSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 18 - Mailboxes Reception Priority"]
            #[inline(always)]
            pub fn mrp(&self) -> MRPR {
                MRPR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 19:23 - Tx Arbitration Start Delay"]
            #[inline(always)]
            pub fn tasd(&self) -> TASDR {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 19;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TASDR { bits }
            }
            #[doc = "Bits 24:27 - Number Of Rx FIFO Filters"]
            #[inline(always)]
            pub fn rffn(&self) -> RFFNR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                RFFNR { bits }
            }
            #[doc = "Bit 30 - Bus Off Done Interrupt Mask"]
            #[inline(always)]
            pub fn boffdonemsk(&self) -> BOFFDONEMSKR {
                BOFFDONEMSKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Error Interrupt Mask for errors detected in the Data Phase of fast CAN FD frames"]
            #[inline(always)]
            pub fn errmsk_fast(&self) -> ERRMSK_FASTR {
                ERRMSK_FASTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 10485760 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 11 - Edge Filter Disable"]
            #[inline(always)]
            pub fn edfltdis(&mut self) -> _EDFLTDISW {
                _EDFLTDISW { w: self }
            }
            #[doc = "Bit 12 - ISO CAN FD Enable"]
            #[inline(always)]
            pub fn isocanfden(&mut self) -> _ISOCANFDENW {
                _ISOCANFDENW { w: self }
            }
            #[doc = "Bit 14 - Protocol Exception Enable"]
            #[inline(always)]
            pub fn prexcen(&mut self) -> _PREXCENW {
                _PREXCENW { w: self }
            }
            #[doc = "Bit 15 - Timer Source"]
            #[inline(always)]
            pub fn timer_src(&mut self) -> _TIMER_SRCW {
                _TIMER_SRCW { w: self }
            }
            #[doc = "Bit 16 - Entire Frame Arbitration Field Comparison Enable For Rx Mailboxes"]
            #[inline(always)]
            pub fn eacen(&mut self) -> _EACENW {
                _EACENW { w: self }
            }
            #[doc = "Bit 17 - Remote Request Storing"]
            #[inline(always)]
            pub fn rrs(&mut self) -> _RRSW {
                _RRSW { w: self }
            }
            #[doc = "Bit 18 - Mailboxes Reception Priority"]
            #[inline(always)]
            pub fn mrp(&mut self) -> _MRPW {
                _MRPW { w: self }
            }
            #[doc = "Bits 19:23 - Tx Arbitration Start Delay"]
            #[inline(always)]
            pub fn tasd(&mut self) -> _TASDW {
                _TASDW { w: self }
            }
            #[doc = "Bits 24:27 - Number Of Rx FIFO Filters"]
            #[inline(always)]
            pub fn rffn(&mut self) -> _RFFNW {
                _RFFNW { w: self }
            }
            #[doc = "Bit 30 - Bus Off Done Interrupt Mask"]
            #[inline(always)]
            pub fn boffdonemsk(&mut self) -> _BOFFDONEMSKW {
                _BOFFDONEMSKW { w: self }
            }
            #[doc = "Bit 31 - Error Interrupt Mask for errors detected in the Data Phase of fast CAN FD frames"]
            #[inline(always)]
            pub fn errmsk_fast(&mut self) -> _ERRMSK_FASTW {
                _ERRMSK_FASTW { w: self }
            }
        }
    }
    #[doc = "Error and Status 2 register"]
    pub struct ESR2 {
        register: VolatileCell<u32>,
    }
    #[doc = "Error and Status 2 register"]
    pub mod esr2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::ESR2 {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = "Possible values of the field `IMB`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IMBR {
            #[doc = "If ESR2[VPS] is asserted, the ESR2[LPTM] is not an inactive Mailbox."]
            _0,
            #[doc = "If ESR2[VPS] is asserted, there is at least one inactive Mailbox. LPTM content is the number of the first one."]
            _1,
        }
        impl IMBR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    IMBR::_0 => false,
                    IMBR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> IMBR {
                match value {
                    false => IMBR::_0,
                    true => IMBR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == IMBR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == IMBR::_1
            }
        }
        #[doc = "Possible values of the field `VPS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum VPSR {
            #[doc = "Contents of IMB and LPTM are invalid."]
            _0,
            #[doc = "Contents of IMB and LPTM are valid."]
            _1,
        }
        impl VPSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    VPSR::_0 => false,
                    VPSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> VPSR {
                match value {
                    false => VPSR::_0,
                    true => VPSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == VPSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == VPSR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct LPTMR {
            bits: u8,
        }
        impl LPTMR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 13 - Inactive Mailbox"]
            #[inline(always)]
            pub fn imb(&self) -> IMBR {
                IMBR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - Valid Priority Status"]
            #[inline(always)]
            pub fn vps(&self) -> VPSR {
                VPSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:22 - Lowest Priority Tx Mailbox"]
            #[inline(always)]
            pub fn lptm(&self) -> LPTMR {
                let bits = {
                    const MASK: u8 = 127;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                LPTMR { bits }
            }
        }
    }
    #[doc = "CRC Register"]
    pub struct CRCR {
        register: VolatileCell<u32>,
    }
    #[doc = "CRC Register"]
    pub mod crcr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::CRCR {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct TXCRCR {
            bits: u16,
        }
        impl TXCRCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct MBCRCR {
            bits: u8,
        }
        impl MBCRCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:14 - Transmitted CRC value"]
            #[inline(always)]
            pub fn txcrc(&self) -> TXCRCR {
                let bits = {
                    const MASK: u16 = 32767;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                TXCRCR { bits }
            }
            #[doc = "Bits 16:22 - CRC Mailbox"]
            #[inline(always)]
            pub fn mbcrc(&self) -> MBCRCR {
                let bits = {
                    const MASK: u8 = 127;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                MBCRCR { bits }
            }
        }
    }
    #[doc = "Rx FIFO Global Mask register"]
    pub struct RXFGMASK {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx FIFO Global Mask register"]
    pub mod rxfgmask {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXFGMASK {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct FGMR {
            bits: u32,
        }
        impl FGMR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _FGMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FGMW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Rx FIFO Global Mask Bits"]
            #[inline(always)]
            pub fn fgm(&self) -> FGMR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                FGMR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Rx FIFO Global Mask Bits"]
            #[inline(always)]
            pub fn fgm(&mut self) -> _FGMW {
                _FGMW { w: self }
            }
        }
    }
    #[doc = "Rx FIFO Information Register"]
    pub struct RXFIR {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx FIFO Information Register"]
    pub mod rxfir {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::RXFIR {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct IDHITR {
            bits: u16,
        }
        impl IDHITR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:8 - Identifier Acceptance Filter Hit Indicator"]
            #[inline(always)]
            pub fn idhit(&self) -> IDHITR {
                let bits = {
                    const MASK: u16 = 511;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                IDHITR { bits }
            }
        }
    }
    #[doc = "CAN Bit Timing Register"]
    pub struct CBT {
        register: VolatileCell<u32>,
    }
    #[doc = "CAN Bit Timing Register"]
    pub mod cbt {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CBT {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct EPSEG2R {
            bits: u8,
        }
        impl EPSEG2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct EPSEG1R {
            bits: u8,
        }
        impl EPSEG1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct EPROPSEGR {
            bits: u8,
        }
        impl EPROPSEGR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct ERJWR {
            bits: u8,
        }
        impl ERJWR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct EPRESDIVR {
            bits: u16,
        }
        impl EPRESDIVR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `BTF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BTFR {
            #[doc = "Extended bit time definitions disabled."]
            _0,
            #[doc = "Extended bit time definitions enabled."]
            _1,
        }
        impl BTFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BTFR::_0 => false,
                    BTFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BTFR {
                match value {
                    false => BTFR::_0,
                    true => BTFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BTFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BTFR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _EPSEG2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _EPSEG2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _EPSEG1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _EPSEG1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _EPROPSEGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _EPROPSEGW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERJWW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERJWW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _EPRESDIVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _EPRESDIVW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 1023;
                const OFFSET: u8 = 21;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BTF`"]
        pub enum BTFW {
            #[doc = "Extended bit time definitions disabled."]
            _0,
            #[doc = "Extended bit time definitions enabled."]
            _1,
        }
        impl BTFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    BTFW::_0 => false,
                    BTFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BTFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BTFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BTFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Extended bit time definitions disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BTFW::_0)
            }
            #[doc = "Extended bit time definitions enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BTFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:4 - Extended Phase Segment 2"]
            #[inline(always)]
            pub fn epseg2(&self) -> EPSEG2R {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                EPSEG2R { bits }
            }
            #[doc = "Bits 5:9 - Extended Phase Segment 1"]
            #[inline(always)]
            pub fn epseg1(&self) -> EPSEG1R {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                EPSEG1R { bits }
            }
            #[doc = "Bits 10:15 - Extended Propagation Segment"]
            #[inline(always)]
            pub fn epropseg(&self) -> EPROPSEGR {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                EPROPSEGR { bits }
            }
            #[doc = "Bits 16:20 - Extended Resync Jump Width"]
            #[inline(always)]
            pub fn erjw(&self) -> ERJWR {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                ERJWR { bits }
            }
            #[doc = "Bits 21:30 - Extended Prescaler Division Factor"]
            #[inline(always)]
            pub fn epresdiv(&self) -> EPRESDIVR {
                let bits = {
                    const MASK: u16 = 1023;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                EPRESDIVR { bits }
            }
            #[doc = "Bit 31 - Bit Timing Format Enable"]
            #[inline(always)]
            pub fn btf(&self) -> BTFR {
                BTFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:4 - Extended Phase Segment 2"]
            #[inline(always)]
            pub fn epseg2(&mut self) -> _EPSEG2W {
                _EPSEG2W { w: self }
            }
            #[doc = "Bits 5:9 - Extended Phase Segment 1"]
            #[inline(always)]
            pub fn epseg1(&mut self) -> _EPSEG1W {
                _EPSEG1W { w: self }
            }
            #[doc = "Bits 10:15 - Extended Propagation Segment"]
            #[inline(always)]
            pub fn epropseg(&mut self) -> _EPROPSEGW {
                _EPROPSEGW { w: self }
            }
            #[doc = "Bits 16:20 - Extended Resync Jump Width"]
            #[inline(always)]
            pub fn erjw(&mut self) -> _ERJWW {
                _ERJWW { w: self }
            }
            #[doc = "Bits 21:30 - Extended Prescaler Division Factor"]
            #[inline(always)]
            pub fn epresdiv(&mut self) -> _EPRESDIVW {
                _EPRESDIVW { w: self }
            }
            #[doc = "Bit 31 - Bit Timing Format Enable"]
            #[inline(always)]
            pub fn btf(&mut self) -> _BTFW {
                _BTFW { w: self }
            }
        }
    }
    #[doc = "Embedded RAM"]
    pub struct EMBEDDEDRAM {
        register: VolatileCell<u32>,
    }
    #[doc = "Embedded RAM"]
    pub mod embedded_ram {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EMBEDDEDRAM {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_3R {
            bits: u8,
        }
        impl DATA_BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_2R {
            bits: u8,
        }
        impl DATA_BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_1R {
            bits: u8,
        }
        impl DATA_BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_0R {
            bits: u8,
        }
        impl DATA_BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn data_byte_3(&self) -> DATA_BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn data_byte_2(&self) -> DATA_BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn data_byte_1(&self) -> DATA_BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn data_byte_0(&self) -> DATA_BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn data_byte_3(&mut self) -> _DATA_BYTE_3W {
                _DATA_BYTE_3W { w: self }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn data_byte_2(&mut self) -> _DATA_BYTE_2W {
                _DATA_BYTE_2W { w: self }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn data_byte_1(&mut self) -> _DATA_BYTE_1W {
                _DATA_BYTE_1W { w: self }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn data_byte_0(&mut self) -> _DATA_BYTE_0W {
                _DATA_BYTE_0W { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR0 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR2 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR3 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr3 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR3 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR4 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr4 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR4 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR5 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr5 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR5 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR6 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr6 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR6 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR7 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr7 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR7 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR8 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr8 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR8 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR9 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr9 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR9 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR10 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr10 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR10 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR11 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr11 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR11 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR12 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr12 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR12 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR13 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr13 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR13 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR14 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr14 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR14 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR15 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr15 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR15 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Pretended Networking Control 1 Register"]
    pub struct CTRL1_PN {
        register: VolatileCell<u32>,
    }
    #[doc = "Pretended Networking Control 1 Register"]
    pub mod ctrl1_pn {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CTRL1_PN {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `FCS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FCSR {
            #[doc = "Message ID filtering only"]
            _00,
            #[doc = "Message ID filtering and payload filtering"]
            _01,
            #[doc = "Message ID filtering occurring a specified number of times."]
            _10,
            #[doc = "Message ID filtering and payload filtering a specified number of times"]
            _11,
        }
        impl FCSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    FCSR::_00 => 0,
                    FCSR::_01 => 1,
                    FCSR::_10 => 2,
                    FCSR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> FCSR {
                match value {
                    0 => FCSR::_00,
                    1 => FCSR::_01,
                    2 => FCSR::_10,
                    3 => FCSR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == FCSR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == FCSR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == FCSR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == FCSR::_11
            }
        }
        #[doc = "Possible values of the field `IDFS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IDFSR {
            #[doc = "Match upon a ID contents against an exact target value"]
            _00,
            #[doc = "Match upon a ID value greater than or equal to a specified target value"]
            _01,
            #[doc = "Match upon a ID value smaller than or equal to a specified target value"]
            _10,
            #[doc = "Match upon a ID value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"]
            _11,
        }
        impl IDFSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IDFSR::_00 => 0,
                    IDFSR::_01 => 1,
                    IDFSR::_10 => 2,
                    IDFSR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IDFSR {
                match value {
                    0 => IDFSR::_00,
                    1 => IDFSR::_01,
                    2 => IDFSR::_10,
                    3 => IDFSR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == IDFSR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == IDFSR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == IDFSR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == IDFSR::_11
            }
        }
        #[doc = "Possible values of the field `PLFS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PLFSR {
            #[doc = "Match upon a payload contents against an exact target value"]
            _00,
            #[doc = "Match upon a payload value greater than or equal to a specified target value"]
            _01,
            #[doc = "Match upon a payload value smaller than or equal to a specified target value"]
            _10,
            #[doc = "Match upon a payload value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"]
            _11,
        }
        impl PLFSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PLFSR::_00 => 0,
                    PLFSR::_01 => 1,
                    PLFSR::_10 => 2,
                    PLFSR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PLFSR {
                match value {
                    0 => PLFSR::_00,
                    1 => PLFSR::_01,
                    2 => PLFSR::_10,
                    3 => PLFSR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == PLFSR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == PLFSR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == PLFSR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == PLFSR::_11
            }
        }
        #[doc = "Possible values of the field `NMATCH`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum NMATCHR {
            #[doc = "Received message must match the predefined filtering criteria for ID and/or PL once before generating a wake up event."]
            _00000001,
            #[doc = "Received message must match the predefined filtering criteria for ID and/or PL twice before generating a wake up event."]
            _00000010,
            #[doc = "Received message must match the predefined filtering criteria for ID and/or PL 255 times before generating a wake up event."]
            _11111111,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl NMATCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    NMATCHR::_00000001 => 1,
                    NMATCHR::_00000010 => 2,
                    NMATCHR::_11111111 => 255,
                    NMATCHR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> NMATCHR {
                match value {
                    1 => NMATCHR::_00000001,
                    2 => NMATCHR::_00000010,
                    255 => NMATCHR::_11111111,
                    i => NMATCHR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_00000001`"]
            #[inline(always)]
            pub fn is_00000001(&self) -> bool {
                *self == NMATCHR::_00000001
            }
            #[doc = "Checks if the value of the field is `_00000010`"]
            #[inline(always)]
            pub fn is_00000010(&self) -> bool {
                *self == NMATCHR::_00000010
            }
            #[doc = "Checks if the value of the field is `_11111111`"]
            #[inline(always)]
            pub fn is_11111111(&self) -> bool {
                *self == NMATCHR::_11111111
            }
        }
        #[doc = "Possible values of the field `WUMF_MSK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WUMF_MSKR {
            #[doc = "Wake up match event is disabled"]
            _0,
            #[doc = "Wake up match event is enabled"]
            _1,
        }
        impl WUMF_MSKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WUMF_MSKR::_0 => false,
                    WUMF_MSKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WUMF_MSKR {
                match value {
                    false => WUMF_MSKR::_0,
                    true => WUMF_MSKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WUMF_MSKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WUMF_MSKR::_1
            }
        }
        #[doc = "Possible values of the field `WTOF_MSK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WTOF_MSKR {
            #[doc = "Timeout wake up event is disabled"]
            _0,
            #[doc = "Timeout wake up event is enabled"]
            _1,
        }
        impl WTOF_MSKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WTOF_MSKR::_0 => false,
                    WTOF_MSKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WTOF_MSKR {
                match value {
                    false => WTOF_MSKR::_0,
                    true => WTOF_MSKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WTOF_MSKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WTOF_MSKR::_1
            }
        }
        #[doc = "Values that can be written to the field `FCS`"]
        pub enum FCSW {
            #[doc = "Message ID filtering only"]
            _00,
            #[doc = "Message ID filtering and payload filtering"]
            _01,
            #[doc = "Message ID filtering occurring a specified number of times."]
            _10,
            #[doc = "Message ID filtering and payload filtering a specified number of times"]
            _11,
        }
        impl FCSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    FCSW::_00 => 0,
                    FCSW::_01 => 1,
                    FCSW::_10 => 2,
                    FCSW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FCSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FCSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FCSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Message ID filtering only"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(FCSW::_00)
            }
            #[doc = "Message ID filtering and payload filtering"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(FCSW::_01)
            }
            #[doc = "Message ID filtering occurring a specified number of times."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(FCSW::_10)
            }
            #[doc = "Message ID filtering and payload filtering a specified number of times"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(FCSW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IDFS`"]
        pub enum IDFSW {
            #[doc = "Match upon a ID contents against an exact target value"]
            _00,
            #[doc = "Match upon a ID value greater than or equal to a specified target value"]
            _01,
            #[doc = "Match upon a ID value smaller than or equal to a specified target value"]
            _10,
            #[doc = "Match upon a ID value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"]
            _11,
        }
        impl IDFSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IDFSW::_00 => 0,
                    IDFSW::_01 => 1,
                    IDFSW::_10 => 2,
                    IDFSW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IDFSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IDFSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IDFSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Match upon a ID contents against an exact target value"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(IDFSW::_00)
            }
            #[doc = "Match upon a ID value greater than or equal to a specified target value"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(IDFSW::_01)
            }
            #[doc = "Match upon a ID value smaller than or equal to a specified target value"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(IDFSW::_10)
            }
            #[doc = "Match upon a ID value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(IDFSW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PLFS`"]
        pub enum PLFSW {
            #[doc = "Match upon a payload contents against an exact target value"]
            _00,
            #[doc = "Match upon a payload value greater than or equal to a specified target value"]
            _01,
            #[doc = "Match upon a payload value smaller than or equal to a specified target value"]
            _10,
            #[doc = "Match upon a payload value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"]
            _11,
        }
        impl PLFSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PLFSW::_00 => 0,
                    PLFSW::_01 => 1,
                    PLFSW::_10 => 2,
                    PLFSW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PLFSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PLFSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PLFSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Match upon a payload contents against an exact target value"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(PLFSW::_00)
            }
            #[doc = "Match upon a payload value greater than or equal to a specified target value"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(PLFSW::_01)
            }
            #[doc = "Match upon a payload value smaller than or equal to a specified target value"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(PLFSW::_10)
            }
            #[doc = "Match upon a payload value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(PLFSW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `NMATCH`"]
        pub enum NMATCHW {
            #[doc = "Received message must match the predefined filtering criteria for ID and/or PL once before generating a wake up event."]
            _00000001,
            #[doc = "Received message must match the predefined filtering criteria for ID and/or PL twice before generating a wake up event."]
            _00000010,
            #[doc = "Received message must match the predefined filtering criteria for ID and/or PL 255 times before generating a wake up event."]
            _11111111,
        }
        impl NMATCHW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    NMATCHW::_00000001 => 1,
                    NMATCHW::_00000010 => 2,
                    NMATCHW::_11111111 => 255,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _NMATCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NMATCHW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: NMATCHW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Received message must match the predefined filtering criteria for ID and/or PL once before generating a wake up event."]
            #[inline(always)]
            pub fn _00000001(self) -> &'a mut W {
                self.variant(NMATCHW::_00000001)
            }
            #[doc = "Received message must match the predefined filtering criteria for ID and/or PL twice before generating a wake up event."]
            #[inline(always)]
            pub fn _00000010(self) -> &'a mut W {
                self.variant(NMATCHW::_00000010)
            }
            #[doc = "Received message must match the predefined filtering criteria for ID and/or PL 255 times before generating a wake up event."]
            #[inline(always)]
            pub fn _11111111(self) -> &'a mut W {
                self.variant(NMATCHW::_11111111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WUMF_MSK`"]
        pub enum WUMF_MSKW {
            #[doc = "Wake up match event is disabled"]
            _0,
            #[doc = "Wake up match event is enabled"]
            _1,
        }
        impl WUMF_MSKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WUMF_MSKW::_0 => false,
                    WUMF_MSKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WUMF_MSKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WUMF_MSKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WUMF_MSKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Wake up match event is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WUMF_MSKW::_0)
            }
            #[doc = "Wake up match event is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WUMF_MSKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WTOF_MSK`"]
        pub enum WTOF_MSKW {
            #[doc = "Timeout wake up event is disabled"]
            _0,
            #[doc = "Timeout wake up event is enabled"]
            _1,
        }
        impl WTOF_MSKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WTOF_MSKW::_0 => false,
                    WTOF_MSKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WTOF_MSKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WTOF_MSKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WTOF_MSKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Timeout wake up event is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WTOF_MSKW::_0)
            }
            #[doc = "Timeout wake up event is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WTOF_MSKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:1 - Filtering Combination Selection"]
            #[inline(always)]
            pub fn fcs(&self) -> FCSR {
                FCSR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 2:3 - ID Filtering Selection"]
            #[inline(always)]
            pub fn idfs(&self) -> IDFSR {
                IDFSR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 4:5 - Payload Filtering Selection"]
            #[inline(always)]
            pub fn plfs(&self) -> PLFSR {
                PLFSR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 8:15 - Number of Messages Matching the Same Filtering Criteria"]
            #[inline(always)]
            pub fn nmatch(&self) -> NMATCHR {
                NMATCHR::_from({
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 16 - Wake Up by Match Flag Mask Bit"]
            #[inline(always)]
            pub fn wumf_msk(&self) -> WUMF_MSKR {
                WUMF_MSKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - Wake Up by Timeout Flag Mask Bit"]
            #[inline(always)]
            pub fn wtof_msk(&self) -> WTOF_MSKR {
                WTOF_MSKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 256 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:1 - Filtering Combination Selection"]
            #[inline(always)]
            pub fn fcs(&mut self) -> _FCSW {
                _FCSW { w: self }
            }
            #[doc = "Bits 2:3 - ID Filtering Selection"]
            #[inline(always)]
            pub fn idfs(&mut self) -> _IDFSW {
                _IDFSW { w: self }
            }
            #[doc = "Bits 4:5 - Payload Filtering Selection"]
            #[inline(always)]
            pub fn plfs(&mut self) -> _PLFSW {
                _PLFSW { w: self }
            }
            #[doc = "Bits 8:15 - Number of Messages Matching the Same Filtering Criteria"]
            #[inline(always)]
            pub fn nmatch(&mut self) -> _NMATCHW {
                _NMATCHW { w: self }
            }
            #[doc = "Bit 16 - Wake Up by Match Flag Mask Bit"]
            #[inline(always)]
            pub fn wumf_msk(&mut self) -> _WUMF_MSKW {
                _WUMF_MSKW { w: self }
            }
            #[doc = "Bit 17 - Wake Up by Timeout Flag Mask Bit"]
            #[inline(always)]
            pub fn wtof_msk(&mut self) -> _WTOF_MSKW {
                _WTOF_MSKW { w: self }
            }
        }
    }
    #[doc = "Pretended Networking Control 2 Register"]
    pub struct CTRL2_PN {
        register: VolatileCell<u32>,
    }
    #[doc = "Pretended Networking Control 2 Register"]
    pub mod ctrl2_pn {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CTRL2_PN {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MATCHTOR {
            bits: u16,
        }
        impl MATCHTOR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MATCHTOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MATCHTOW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Timeout for No Message Matching the Filtering Criteria"]
            #[inline(always)]
            pub fn matchto(&self) -> MATCHTOR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                MATCHTOR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Timeout for No Message Matching the Filtering Criteria"]
            #[inline(always)]
            pub fn matchto(&mut self) -> _MATCHTOW {
                _MATCHTOW { w: self }
            }
        }
    }
    #[doc = "Pretended Networking Wake Up Match Register"]
    pub struct WU_MTC {
        register: VolatileCell<u32>,
    }
    #[doc = "Pretended Networking Wake Up Match Register"]
    pub mod wu_mtc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::WU_MTC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MCOUNTERR {
            bits: u8,
        }
        impl MCOUNTERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `WUMF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WUMFR {
            #[doc = "No wake up by match event detected"]
            _0,
            #[doc = "Wake up by match event detected"]
            _1,
        }
        impl WUMFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WUMFR::_0 => false,
                    WUMFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WUMFR {
                match value {
                    false => WUMFR::_0,
                    true => WUMFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WUMFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WUMFR::_1
            }
        }
        #[doc = "Possible values of the field `WTOF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WTOFR {
            #[doc = "No wake up by timeout event detected"]
            _0,
            #[doc = "Wake up by timeout event detected"]
            _1,
        }
        impl WTOFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WTOFR::_0 => false,
                    WTOFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WTOFR {
                match value {
                    false => WTOFR::_0,
                    true => WTOFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WTOFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WTOFR::_1
            }
        }
        #[doc = "Values that can be written to the field `WUMF`"]
        pub enum WUMFW {
            #[doc = "No wake up by match event detected"]
            _0,
            #[doc = "Wake up by match event detected"]
            _1,
        }
        impl WUMFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WUMFW::_0 => false,
                    WUMFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WUMFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WUMFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WUMFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No wake up by match event detected"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WUMFW::_0)
            }
            #[doc = "Wake up by match event detected"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WUMFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WTOF`"]
        pub enum WTOFW {
            #[doc = "No wake up by timeout event detected"]
            _0,
            #[doc = "Wake up by timeout event detected"]
            _1,
        }
        impl WTOFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WTOFW::_0 => false,
                    WTOFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WTOFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WTOFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WTOFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No wake up by timeout event detected"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WTOFW::_0)
            }
            #[doc = "Wake up by timeout event detected"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WTOFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 8:15 - Number of Matches while in Pretended Networking"]
            #[inline(always)]
            pub fn mcounter(&self) -> MCOUNTERR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                MCOUNTERR { bits }
            }
            #[doc = "Bit 16 - Wake Up by Match Flag Bit"]
            #[inline(always)]
            pub fn wumf(&self) -> WUMFR {
                WUMFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - Wake Up by Timeout Flag Bit"]
            #[inline(always)]
            pub fn wtof(&self) -> WTOFR {
                WTOFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 16 - Wake Up by Match Flag Bit"]
            #[inline(always)]
            pub fn wumf(&mut self) -> _WUMFW {
                _WUMFW { w: self }
            }
            #[doc = "Bit 17 - Wake Up by Timeout Flag Bit"]
            #[inline(always)]
            pub fn wtof(&mut self) -> _WTOFW {
                _WTOFW { w: self }
            }
        }
    }
    #[doc = "Pretended Networking ID Filter 1 Register"]
    pub struct FLT_ID1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pretended Networking ID Filter 1 Register"]
    pub mod flt_id1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FLT_ID1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct FLT_ID1R {
            bits: u32,
        }
        impl FLT_ID1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `FLT_RTR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FLT_RTRR {
            #[doc = "Reject remote frame (accept data frame)"]
            _0,
            #[doc = "Accept remote frame"]
            _1,
        }
        impl FLT_RTRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FLT_RTRR::_0 => false,
                    FLT_RTRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FLT_RTRR {
                match value {
                    false => FLT_RTRR::_0,
                    true => FLT_RTRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FLT_RTRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FLT_RTRR::_1
            }
        }
        #[doc = "Possible values of the field `FLT_IDE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FLT_IDER {
            #[doc = "Accept standard frame format"]
            _0,
            #[doc = "Accept extended frame format"]
            _1,
        }
        impl FLT_IDER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FLT_IDER::_0 => false,
                    FLT_IDER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FLT_IDER {
                match value {
                    false => FLT_IDER::_0,
                    true => FLT_IDER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FLT_IDER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FLT_IDER::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _FLT_ID1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _FLT_ID1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 536870911;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FLT_RTR`"]
        pub enum FLT_RTRW {
            #[doc = "Reject remote frame (accept data frame)"]
            _0,
            #[doc = "Accept remote frame"]
            _1,
        }
        impl FLT_RTRW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FLT_RTRW::_0 => false,
                    FLT_RTRW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FLT_RTRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FLT_RTRW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FLT_RTRW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Reject remote frame (accept data frame)"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FLT_RTRW::_0)
            }
            #[doc = "Accept remote frame"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FLT_RTRW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 29;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FLT_IDE`"]
        pub enum FLT_IDEW {
            #[doc = "Accept standard frame format"]
            _0,
            #[doc = "Accept extended frame format"]
            _1,
        }
        impl FLT_IDEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FLT_IDEW::_0 => false,
                    FLT_IDEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FLT_IDEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FLT_IDEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FLT_IDEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accept standard frame format"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FLT_IDEW::_0)
            }
            #[doc = "Accept extended frame format"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FLT_IDEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:28 - ID Filter 1 for Pretended Networking filtering"]
            #[inline(always)]
            pub fn flt_id1(&self) -> FLT_ID1R {
                let bits = {
                    const MASK: u32 = 536870911;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                FLT_ID1R { bits }
            }
            #[doc = "Bit 29 - Remote Transmission Request Filter"]
            #[inline(always)]
            pub fn flt_rtr(&self) -> FLT_RTRR {
                FLT_RTRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 29;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 30 - ID Extended Filter"]
            #[inline(always)]
            pub fn flt_ide(&self) -> FLT_IDER {
                FLT_IDER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:28 - ID Filter 1 for Pretended Networking filtering"]
            #[inline(always)]
            pub fn flt_id1(&mut self) -> _FLT_ID1W {
                _FLT_ID1W { w: self }
            }
            #[doc = "Bit 29 - Remote Transmission Request Filter"]
            #[inline(always)]
            pub fn flt_rtr(&mut self) -> _FLT_RTRW {
                _FLT_RTRW { w: self }
            }
            #[doc = "Bit 30 - ID Extended Filter"]
            #[inline(always)]
            pub fn flt_ide(&mut self) -> _FLT_IDEW {
                _FLT_IDEW { w: self }
            }
        }
    }
    #[doc = "Pretended Networking DLC Filter Register"]
    pub struct FLT_DLC {
        register: VolatileCell<u32>,
    }
    #[doc = "Pretended Networking DLC Filter Register"]
    pub mod flt_dlc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FLT_DLC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct FLT_DLC_HIR {
            bits: u8,
        }
        impl FLT_DLC_HIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct FLT_DLC_LOR {
            bits: u8,
        }
        impl FLT_DLC_LOR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _FLT_DLC_HIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FLT_DLC_HIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _FLT_DLC_LOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FLT_DLC_LOW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:3 - Upper Limit for Length of Data Bytes Filter"]
            #[inline(always)]
            pub fn flt_dlc_hi(&self) -> FLT_DLC_HIR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                FLT_DLC_HIR { bits }
            }
            #[doc = "Bits 16:19 - Lower Limit for Length of Data Bytes Filter"]
            #[inline(always)]
            pub fn flt_dlc_lo(&self) -> FLT_DLC_LOR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                FLT_DLC_LOR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 8 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Upper Limit for Length of Data Bytes Filter"]
            #[inline(always)]
            pub fn flt_dlc_hi(&mut self) -> _FLT_DLC_HIW {
                _FLT_DLC_HIW { w: self }
            }
            #[doc = "Bits 16:19 - Lower Limit for Length of Data Bytes Filter"]
            #[inline(always)]
            pub fn flt_dlc_lo(&mut self) -> _FLT_DLC_LOW {
                _FLT_DLC_LOW { w: self }
            }
        }
    }
    #[doc = "Pretended Networking Payload Low Filter 1 Register"]
    pub struct PL1_LO {
        register: VolatileCell<u32>,
    }
    #[doc = "Pretended Networking Payload Low Filter 1 Register"]
    pub mod pl1_lo {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PL1_LO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_3R {
            bits: u8,
        }
        impl DATA_BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_2R {
            bits: u8,
        }
        impl DATA_BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_1R {
            bits: u8,
        }
        impl DATA_BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_0R {
            bits: u8,
        }
        impl DATA_BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 3."]
            #[inline(always)]
            pub fn data_byte_3(&self) -> DATA_BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 2."]
            #[inline(always)]
            pub fn data_byte_2(&self) -> DATA_BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 1."]
            #[inline(always)]
            pub fn data_byte_1(&self) -> DATA_BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 0."]
            #[inline(always)]
            pub fn data_byte_0(&self) -> DATA_BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 3."]
            #[inline(always)]
            pub fn data_byte_3(&mut self) -> _DATA_BYTE_3W {
                _DATA_BYTE_3W { w: self }
            }
            #[doc = "Bits 8:15 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 2."]
            #[inline(always)]
            pub fn data_byte_2(&mut self) -> _DATA_BYTE_2W {
                _DATA_BYTE_2W { w: self }
            }
            #[doc = "Bits 16:23 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 1."]
            #[inline(always)]
            pub fn data_byte_1(&mut self) -> _DATA_BYTE_1W {
                _DATA_BYTE_1W { w: self }
            }
            #[doc = "Bits 24:31 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 0."]
            #[inline(always)]
            pub fn data_byte_0(&mut self) -> _DATA_BYTE_0W {
                _DATA_BYTE_0W { w: self }
            }
        }
    }
    #[doc = "Pretended Networking Payload High Filter 1 Register"]
    pub struct PL1_HI {
        register: VolatileCell<u32>,
    }
    #[doc = "Pretended Networking Payload High Filter 1 Register"]
    pub mod pl1_hi {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PL1_HI {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_7R {
            bits: u8,
        }
        impl DATA_BYTE_7R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_6R {
            bits: u8,
        }
        impl DATA_BYTE_6R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_5R {
            bits: u8,
        }
        impl DATA_BYTE_5R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_4R {
            bits: u8,
        }
        impl DATA_BYTE_4R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_7W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_7W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_6W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_6W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_5W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_4W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_4W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 7."]
            #[inline(always)]
            pub fn data_byte_7(&self) -> DATA_BYTE_7R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_7R { bits }
            }
            #[doc = "Bits 8:15 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 6."]
            #[inline(always)]
            pub fn data_byte_6(&self) -> DATA_BYTE_6R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_6R { bits }
            }
            #[doc = "Bits 16:23 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 5."]
            #[inline(always)]
            pub fn data_byte_5(&self) -> DATA_BYTE_5R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_5R { bits }
            }
            #[doc = "Bits 24:31 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 4."]
            #[inline(always)]
            pub fn data_byte_4(&self) -> DATA_BYTE_4R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_4R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 7."]
            #[inline(always)]
            pub fn data_byte_7(&mut self) -> _DATA_BYTE_7W {
                _DATA_BYTE_7W { w: self }
            }
            #[doc = "Bits 8:15 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 6."]
            #[inline(always)]
            pub fn data_byte_6(&mut self) -> _DATA_BYTE_6W {
                _DATA_BYTE_6W { w: self }
            }
            #[doc = "Bits 16:23 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 5."]
            #[inline(always)]
            pub fn data_byte_5(&mut self) -> _DATA_BYTE_5W {
                _DATA_BYTE_5W { w: self }
            }
            #[doc = "Bits 24:31 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 4."]
            #[inline(always)]
            pub fn data_byte_4(&mut self) -> _DATA_BYTE_4W {
                _DATA_BYTE_4W { w: self }
            }
        }
    }
    #[doc = "Pretended Networking ID Filter 2 Register / ID Mask Register"]
    pub struct FLT_ID2_IDMASK {
        register: VolatileCell<u32>,
    }
    #[doc = "Pretended Networking ID Filter 2 Register / ID Mask Register"]
    pub mod flt_id2_idmask {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FLT_ID2_IDMASK {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct FLT_ID2_IDMASKR {
            bits: u32,
        }
        impl FLT_ID2_IDMASKR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `RTR_MSK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RTR_MSKR {
            #[doc = "The corresponding bit in the filter is \"don't care\""]
            _0,
            #[doc = "The corresponding bit in the filter is checked"]
            _1,
        }
        impl RTR_MSKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RTR_MSKR::_0 => false,
                    RTR_MSKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RTR_MSKR {
                match value {
                    false => RTR_MSKR::_0,
                    true => RTR_MSKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RTR_MSKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RTR_MSKR::_1
            }
        }
        #[doc = "Possible values of the field `IDE_MSK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IDE_MSKR {
            #[doc = "The corresponding bit in the filter is \"don't care\""]
            _0,
            #[doc = "The corresponding bit in the filter is checked"]
            _1,
        }
        impl IDE_MSKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    IDE_MSKR::_0 => false,
                    IDE_MSKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> IDE_MSKR {
                match value {
                    false => IDE_MSKR::_0,
                    true => IDE_MSKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == IDE_MSKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == IDE_MSKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _FLT_ID2_IDMASKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FLT_ID2_IDMASKW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 536870911;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RTR_MSK`"]
        pub enum RTR_MSKW {
            #[doc = "The corresponding bit in the filter is \"don't care\""]
            _0,
            #[doc = "The corresponding bit in the filter is checked"]
            _1,
        }
        impl RTR_MSKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RTR_MSKW::_0 => false,
                    RTR_MSKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RTR_MSKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RTR_MSKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RTR_MSKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The corresponding bit in the filter is \"don't care\""]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RTR_MSKW::_0)
            }
            #[doc = "The corresponding bit in the filter is checked"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RTR_MSKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 29;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IDE_MSK`"]
        pub enum IDE_MSKW {
            #[doc = "The corresponding bit in the filter is \"don't care\""]
            _0,
            #[doc = "The corresponding bit in the filter is checked"]
            _1,
        }
        impl IDE_MSKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    IDE_MSKW::_0 => false,
                    IDE_MSKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IDE_MSKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IDE_MSKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IDE_MSKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The corresponding bit in the filter is \"don't care\""]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(IDE_MSKW::_0)
            }
            #[doc = "The corresponding bit in the filter is checked"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(IDE_MSKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:28 - ID Filter 2 for Pretended Networking Filtering / ID Mask Bits for Pretended Networking ID Filtering"]
            #[inline(always)]
            pub fn flt_id2_idmask(&self) -> FLT_ID2_IDMASKR {
                let bits = {
                    const MASK: u32 = 536870911;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                FLT_ID2_IDMASKR { bits }
            }
            #[doc = "Bit 29 - Remote Transmission Request Mask Bit"]
            #[inline(always)]
            pub fn rtr_msk(&self) -> RTR_MSKR {
                RTR_MSKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 29;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 30 - ID Extended Mask Bit"]
            #[inline(always)]
            pub fn ide_msk(&self) -> IDE_MSKR {
                IDE_MSKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:28 - ID Filter 2 for Pretended Networking Filtering / ID Mask Bits for Pretended Networking ID Filtering"]
            #[inline(always)]
            pub fn flt_id2_idmask(&mut self) -> _FLT_ID2_IDMASKW {
                _FLT_ID2_IDMASKW { w: self }
            }
            #[doc = "Bit 29 - Remote Transmission Request Mask Bit"]
            #[inline(always)]
            pub fn rtr_msk(&mut self) -> _RTR_MSKW {
                _RTR_MSKW { w: self }
            }
            #[doc = "Bit 30 - ID Extended Mask Bit"]
            #[inline(always)]
            pub fn ide_msk(&mut self) -> _IDE_MSKW {
                _IDE_MSKW { w: self }
            }
        }
    }
    #[doc = "Pretended Networking Payload Low Filter 2 Register / Payload Low Mask Register"]
    pub struct PL2_PLMASK_LO {
        register: VolatileCell<u32>,
    }
    #[doc = "Pretended Networking Payload Low Filter 2 Register / Payload Low Mask Register"]
    pub mod pl2_plmask_lo {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PL2_PLMASK_LO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_3R {
            bits: u8,
        }
        impl DATA_BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_2R {
            bits: u8,
        }
        impl DATA_BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_1R {
            bits: u8,
        }
        impl DATA_BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_0R {
            bits: u8,
        }
        impl DATA_BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 3."]
            #[inline(always)]
            pub fn data_byte_3(&self) -> DATA_BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 2."]
            #[inline(always)]
            pub fn data_byte_2(&self) -> DATA_BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 1."]
            #[inline(always)]
            pub fn data_byte_1(&self) -> DATA_BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 0."]
            #[inline(always)]
            pub fn data_byte_0(&self) -> DATA_BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 3."]
            #[inline(always)]
            pub fn data_byte_3(&mut self) -> _DATA_BYTE_3W {
                _DATA_BYTE_3W { w: self }
            }
            #[doc = "Bits 8:15 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 2."]
            #[inline(always)]
            pub fn data_byte_2(&mut self) -> _DATA_BYTE_2W {
                _DATA_BYTE_2W { w: self }
            }
            #[doc = "Bits 16:23 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 1."]
            #[inline(always)]
            pub fn data_byte_1(&mut self) -> _DATA_BYTE_1W {
                _DATA_BYTE_1W { w: self }
            }
            #[doc = "Bits 24:31 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 0."]
            #[inline(always)]
            pub fn data_byte_0(&mut self) -> _DATA_BYTE_0W {
                _DATA_BYTE_0W { w: self }
            }
        }
    }
    #[doc = "Pretended Networking Payload High Filter 2 low order bits / Payload High Mask Register"]
    pub struct PL2_PLMASK_HI {
        register: VolatileCell<u32>,
    }
    #[doc = "Pretended Networking Payload High Filter 2 low order bits / Payload High Mask Register"]
    pub mod pl2_plmask_hi {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PL2_PLMASK_HI {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_7R {
            bits: u8,
        }
        impl DATA_BYTE_7R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_6R {
            bits: u8,
        }
        impl DATA_BYTE_6R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_5R {
            bits: u8,
        }
        impl DATA_BYTE_5R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_4R {
            bits: u8,
        }
        impl DATA_BYTE_4R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_7W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_7W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_6W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_6W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_5W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_4W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_4W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 7."]
            #[inline(always)]
            pub fn data_byte_7(&self) -> DATA_BYTE_7R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_7R { bits }
            }
            #[doc = "Bits 8:15 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 6."]
            #[inline(always)]
            pub fn data_byte_6(&self) -> DATA_BYTE_6R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_6R { bits }
            }
            #[doc = "Bits 16:23 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 5."]
            #[inline(always)]
            pub fn data_byte_5(&self) -> DATA_BYTE_5R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_5R { bits }
            }
            #[doc = "Bits 24:31 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 4."]
            #[inline(always)]
            pub fn data_byte_4(&self) -> DATA_BYTE_4R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_4R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 7."]
            #[inline(always)]
            pub fn data_byte_7(&mut self) -> _DATA_BYTE_7W {
                _DATA_BYTE_7W { w: self }
            }
            #[doc = "Bits 8:15 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 6."]
            #[inline(always)]
            pub fn data_byte_6(&mut self) -> _DATA_BYTE_6W {
                _DATA_BYTE_6W { w: self }
            }
            #[doc = "Bits 16:23 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 5."]
            #[inline(always)]
            pub fn data_byte_5(&mut self) -> _DATA_BYTE_5W {
                _DATA_BYTE_5W { w: self }
            }
            #[doc = "Bits 24:31 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 4."]
            #[inline(always)]
            pub fn data_byte_4(&mut self) -> _DATA_BYTE_4W {
                _DATA_BYTE_4W { w: self }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register for C/S"]
    pub struct WMB0_CS {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register for C/S"]
    pub mod wmb0_cs {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB0_CS {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLCR {
            bits: u8,
        }
        impl DLCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `RTR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RTRR {
            #[doc = "Frame is data one (not remote)"]
            _0,
            #[doc = "Frame is a remote one"]
            _1,
        }
        impl RTRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RTRR::_0 => false,
                    RTRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RTRR {
                match value {
                    false => RTRR::_0,
                    true => RTRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RTRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RTRR::_1
            }
        }
        #[doc = "Possible values of the field `IDE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IDER {
            #[doc = "Frame format is standard"]
            _0,
            #[doc = "Frame format is extended"]
            _1,
        }
        impl IDER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    IDER::_0 => false,
                    IDER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> IDER {
                match value {
                    false => IDER::_0,
                    true => IDER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == IDER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == IDER::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct SRRR {
            bits: bool,
        }
        impl SRRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 16:19 - Length of Data in Bytes"]
            #[inline(always)]
            pub fn dlc(&self) -> DLCR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DLCR { bits }
            }
            #[doc = "Bit 20 - Remote Transmission Request Bit"]
            #[inline(always)]
            pub fn rtr(&self) -> RTRR {
                RTRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - ID Extended Bit"]
            #[inline(always)]
            pub fn ide(&self) -> IDER {
                IDER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 22 - Substitute Remote Request"]
            #[inline(always)]
            pub fn srr(&self) -> SRRR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                SRRR { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register for ID"]
    pub struct WMB0_ID {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register for ID"]
    pub mod wmb0_id {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB0_ID {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct IDR {
            bits: u32,
        }
        impl IDR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:28 - Received ID under Pretended Networking mode"]
            #[inline(always)]
            pub fn id(&self) -> IDR {
                let bits = {
                    const MASK: u32 = 536870911;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                IDR { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register for Data 0-3"]
    pub struct WMB0_D03 {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register for Data 0-3"]
    pub mod wmb0_d03 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB0_D03 {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_3R {
            bits: u8,
        }
        impl DATA_BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_2R {
            bits: u8,
        }
        impl DATA_BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_1R {
            bits: u8,
        }
        impl DATA_BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_0R {
            bits: u8,
        }
        impl DATA_BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Received payload corresponding to the data byte 3 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_3(&self) -> DATA_BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Received payload corresponding to the data byte 2 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_2(&self) -> DATA_BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Received payload corresponding to the data byte 1 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_1(&self) -> DATA_BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Received payload corresponding to the data byte 0 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_0(&self) -> DATA_BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_0R { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register Data 4-7"]
    pub struct WMB0_D47 {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register Data 4-7"]
    pub mod wmb0_d47 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB0_D47 {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_7R {
            bits: u8,
        }
        impl DATA_BYTE_7R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_6R {
            bits: u8,
        }
        impl DATA_BYTE_6R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_5R {
            bits: u8,
        }
        impl DATA_BYTE_5R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_4R {
            bits: u8,
        }
        impl DATA_BYTE_4R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Received payload corresponding to the data byte 7 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_7(&self) -> DATA_BYTE_7R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_7R { bits }
            }
            #[doc = "Bits 8:15 - Received payload corresponding to the data byte 6 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_6(&self) -> DATA_BYTE_6R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_6R { bits }
            }
            #[doc = "Bits 16:23 - Received payload corresponding to the data byte 5 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_5(&self) -> DATA_BYTE_5R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_5R { bits }
            }
            #[doc = "Bits 24:31 - Received payload corresponding to the data byte 4 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_4(&self) -> DATA_BYTE_4R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_4R { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register for C/S"]
    pub struct WMB1_CS {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register for C/S"]
    pub mod wmb1_cs {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB1_CS {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLCR {
            bits: u8,
        }
        impl DLCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `RTR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RTRR {
            #[doc = "Frame is data one (not remote)"]
            _0,
            #[doc = "Frame is a remote one"]
            _1,
        }
        impl RTRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RTRR::_0 => false,
                    RTRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RTRR {
                match value {
                    false => RTRR::_0,
                    true => RTRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RTRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RTRR::_1
            }
        }
        #[doc = "Possible values of the field `IDE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IDER {
            #[doc = "Frame format is standard"]
            _0,
            #[doc = "Frame format is extended"]
            _1,
        }
        impl IDER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    IDER::_0 => false,
                    IDER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> IDER {
                match value {
                    false => IDER::_0,
                    true => IDER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == IDER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == IDER::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct SRRR {
            bits: bool,
        }
        impl SRRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 16:19 - Length of Data in Bytes"]
            #[inline(always)]
            pub fn dlc(&self) -> DLCR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DLCR { bits }
            }
            #[doc = "Bit 20 - Remote Transmission Request Bit"]
            #[inline(always)]
            pub fn rtr(&self) -> RTRR {
                RTRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - ID Extended Bit"]
            #[inline(always)]
            pub fn ide(&self) -> IDER {
                IDER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 22 - Substitute Remote Request"]
            #[inline(always)]
            pub fn srr(&self) -> SRRR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                SRRR { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register for ID"]
    pub struct WMB1_ID {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register for ID"]
    pub mod wmb1_id {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB1_ID {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct IDR {
            bits: u32,
        }
        impl IDR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:28 - Received ID under Pretended Networking mode"]
            #[inline(always)]
            pub fn id(&self) -> IDR {
                let bits = {
                    const MASK: u32 = 536870911;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                IDR { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register for Data 0-3"]
    pub struct WMB1_D03 {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register for Data 0-3"]
    pub mod wmb1_d03 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB1_D03 {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_3R {
            bits: u8,
        }
        impl DATA_BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_2R {
            bits: u8,
        }
        impl DATA_BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_1R {
            bits: u8,
        }
        impl DATA_BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_0R {
            bits: u8,
        }
        impl DATA_BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Received payload corresponding to the data byte 3 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_3(&self) -> DATA_BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Received payload corresponding to the data byte 2 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_2(&self) -> DATA_BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Received payload corresponding to the data byte 1 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_1(&self) -> DATA_BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Received payload corresponding to the data byte 0 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_0(&self) -> DATA_BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_0R { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register Data 4-7"]
    pub struct WMB1_D47 {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register Data 4-7"]
    pub mod wmb1_d47 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB1_D47 {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_7R {
            bits: u8,
        }
        impl DATA_BYTE_7R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_6R {
            bits: u8,
        }
        impl DATA_BYTE_6R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_5R {
            bits: u8,
        }
        impl DATA_BYTE_5R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_4R {
            bits: u8,
        }
        impl DATA_BYTE_4R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Received payload corresponding to the data byte 7 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_7(&self) -> DATA_BYTE_7R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_7R { bits }
            }
            #[doc = "Bits 8:15 - Received payload corresponding to the data byte 6 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_6(&self) -> DATA_BYTE_6R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_6R { bits }
            }
            #[doc = "Bits 16:23 - Received payload corresponding to the data byte 5 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_5(&self) -> DATA_BYTE_5R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_5R { bits }
            }
            #[doc = "Bits 24:31 - Received payload corresponding to the data byte 4 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_4(&self) -> DATA_BYTE_4R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_4R { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register for C/S"]
    pub struct WMB2_CS {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register for C/S"]
    pub mod wmb2_cs {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB2_CS {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLCR {
            bits: u8,
        }
        impl DLCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `RTR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RTRR {
            #[doc = "Frame is data one (not remote)"]
            _0,
            #[doc = "Frame is a remote one"]
            _1,
        }
        impl RTRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RTRR::_0 => false,
                    RTRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RTRR {
                match value {
                    false => RTRR::_0,
                    true => RTRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RTRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RTRR::_1
            }
        }
        #[doc = "Possible values of the field `IDE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IDER {
            #[doc = "Frame format is standard"]
            _0,
            #[doc = "Frame format is extended"]
            _1,
        }
        impl IDER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    IDER::_0 => false,
                    IDER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> IDER {
                match value {
                    false => IDER::_0,
                    true => IDER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == IDER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == IDER::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct SRRR {
            bits: bool,
        }
        impl SRRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 16:19 - Length of Data in Bytes"]
            #[inline(always)]
            pub fn dlc(&self) -> DLCR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DLCR { bits }
            }
            #[doc = "Bit 20 - Remote Transmission Request Bit"]
            #[inline(always)]
            pub fn rtr(&self) -> RTRR {
                RTRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - ID Extended Bit"]
            #[inline(always)]
            pub fn ide(&self) -> IDER {
                IDER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 22 - Substitute Remote Request"]
            #[inline(always)]
            pub fn srr(&self) -> SRRR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                SRRR { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register for ID"]
    pub struct WMB2_ID {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register for ID"]
    pub mod wmb2_id {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB2_ID {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct IDR {
            bits: u32,
        }
        impl IDR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:28 - Received ID under Pretended Networking mode"]
            #[inline(always)]
            pub fn id(&self) -> IDR {
                let bits = {
                    const MASK: u32 = 536870911;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                IDR { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register for Data 0-3"]
    pub struct WMB2_D03 {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register for Data 0-3"]
    pub mod wmb2_d03 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB2_D03 {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_3R {
            bits: u8,
        }
        impl DATA_BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_2R {
            bits: u8,
        }
        impl DATA_BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_1R {
            bits: u8,
        }
        impl DATA_BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_0R {
            bits: u8,
        }
        impl DATA_BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Received payload corresponding to the data byte 3 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_3(&self) -> DATA_BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Received payload corresponding to the data byte 2 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_2(&self) -> DATA_BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Received payload corresponding to the data byte 1 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_1(&self) -> DATA_BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Received payload corresponding to the data byte 0 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_0(&self) -> DATA_BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_0R { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register Data 4-7"]
    pub struct WMB2_D47 {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register Data 4-7"]
    pub mod wmb2_d47 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB2_D47 {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_7R {
            bits: u8,
        }
        impl DATA_BYTE_7R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_6R {
            bits: u8,
        }
        impl DATA_BYTE_6R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_5R {
            bits: u8,
        }
        impl DATA_BYTE_5R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_4R {
            bits: u8,
        }
        impl DATA_BYTE_4R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Received payload corresponding to the data byte 7 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_7(&self) -> DATA_BYTE_7R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_7R { bits }
            }
            #[doc = "Bits 8:15 - Received payload corresponding to the data byte 6 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_6(&self) -> DATA_BYTE_6R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_6R { bits }
            }
            #[doc = "Bits 16:23 - Received payload corresponding to the data byte 5 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_5(&self) -> DATA_BYTE_5R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_5R { bits }
            }
            #[doc = "Bits 24:31 - Received payload corresponding to the data byte 4 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_4(&self) -> DATA_BYTE_4R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_4R { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register for C/S"]
    pub struct WMB3_CS {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register for C/S"]
    pub mod wmb3_cs {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB3_CS {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLCR {
            bits: u8,
        }
        impl DLCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `RTR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RTRR {
            #[doc = "Frame is data one (not remote)"]
            _0,
            #[doc = "Frame is a remote one"]
            _1,
        }
        impl RTRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RTRR::_0 => false,
                    RTRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RTRR {
                match value {
                    false => RTRR::_0,
                    true => RTRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RTRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RTRR::_1
            }
        }
        #[doc = "Possible values of the field `IDE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IDER {
            #[doc = "Frame format is standard"]
            _0,
            #[doc = "Frame format is extended"]
            _1,
        }
        impl IDER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    IDER::_0 => false,
                    IDER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> IDER {
                match value {
                    false => IDER::_0,
                    true => IDER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == IDER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == IDER::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct SRRR {
            bits: bool,
        }
        impl SRRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 16:19 - Length of Data in Bytes"]
            #[inline(always)]
            pub fn dlc(&self) -> DLCR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DLCR { bits }
            }
            #[doc = "Bit 20 - Remote Transmission Request Bit"]
            #[inline(always)]
            pub fn rtr(&self) -> RTRR {
                RTRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - ID Extended Bit"]
            #[inline(always)]
            pub fn ide(&self) -> IDER {
                IDER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 22 - Substitute Remote Request"]
            #[inline(always)]
            pub fn srr(&self) -> SRRR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                SRRR { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register for ID"]
    pub struct WMB3_ID {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register for ID"]
    pub mod wmb3_id {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB3_ID {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct IDR {
            bits: u32,
        }
        impl IDR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:28 - Received ID under Pretended Networking mode"]
            #[inline(always)]
            pub fn id(&self) -> IDR {
                let bits = {
                    const MASK: u32 = 536870911;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                IDR { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register for Data 0-3"]
    pub struct WMB3_D03 {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register for Data 0-3"]
    pub mod wmb3_d03 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB3_D03 {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_3R {
            bits: u8,
        }
        impl DATA_BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_2R {
            bits: u8,
        }
        impl DATA_BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_1R {
            bits: u8,
        }
        impl DATA_BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_0R {
            bits: u8,
        }
        impl DATA_BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Received payload corresponding to the data byte 3 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_3(&self) -> DATA_BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Received payload corresponding to the data byte 2 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_2(&self) -> DATA_BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Received payload corresponding to the data byte 1 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_1(&self) -> DATA_BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Received payload corresponding to the data byte 0 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_0(&self) -> DATA_BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_0R { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register Data 4-7"]
    pub struct WMB3_D47 {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register Data 4-7"]
    pub mod wmb3_d47 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB3_D47 {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_7R {
            bits: u8,
        }
        impl DATA_BYTE_7R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_6R {
            bits: u8,
        }
        impl DATA_BYTE_6R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_5R {
            bits: u8,
        }
        impl DATA_BYTE_5R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_4R {
            bits: u8,
        }
        impl DATA_BYTE_4R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Received payload corresponding to the data byte 7 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_7(&self) -> DATA_BYTE_7R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_7R { bits }
            }
            #[doc = "Bits 8:15 - Received payload corresponding to the data byte 6 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_6(&self) -> DATA_BYTE_6R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_6R { bits }
            }
            #[doc = "Bits 16:23 - Received payload corresponding to the data byte 5 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_5(&self) -> DATA_BYTE_5R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_5R { bits }
            }
            #[doc = "Bits 24:31 - Received payload corresponding to the data byte 4 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_4(&self) -> DATA_BYTE_4R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_4R { bits }
            }
        }
    }
    #[doc = "CAN FD Control Register"]
    pub struct FDCTRL {
        register: VolatileCell<u32>,
    }
    #[doc = "CAN FD Control Register"]
    pub mod fdctrl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FDCTRL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct TDCVALR {
            bits: u8,
        }
        impl TDCVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct TDCOFFR {
            bits: u8,
        }
        impl TDCOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `TDCFAIL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TDCFAILR {
            #[doc = "Measured loop delay is in range."]
            _0,
            #[doc = "Measured loop delay is out of range."]
            _1,
        }
        impl TDCFAILR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TDCFAILR::_0 => false,
                    TDCFAILR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TDCFAILR {
                match value {
                    false => TDCFAILR::_0,
                    true => TDCFAILR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TDCFAILR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TDCFAILR::_1
            }
        }
        #[doc = "Possible values of the field `TDCEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TDCENR {
            #[doc = "TDC is disabled"]
            _0,
            #[doc = "TDC is enabled"]
            _1,
        }
        impl TDCENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TDCENR::_0 => false,
                    TDCENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TDCENR {
                match value {
                    false => TDCENR::_0,
                    true => TDCENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TDCENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TDCENR::_1
            }
        }
        #[doc = "Possible values of the field `MBDSR0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MBDSR0R {
            #[doc = "Selects 8 bytes per Message Buffer."]
            _00,
            #[doc = "Selects 16 bytes per Message Buffer."]
            _01,
            #[doc = "Selects 32 bytes per Message Buffer."]
            _10,
            #[doc = "Selects 64 bytes per Message Buffer."]
            _11,
        }
        impl MBDSR0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MBDSR0R::_00 => 0,
                    MBDSR0R::_01 => 1,
                    MBDSR0R::_10 => 2,
                    MBDSR0R::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MBDSR0R {
                match value {
                    0 => MBDSR0R::_00,
                    1 => MBDSR0R::_01,
                    2 => MBDSR0R::_10,
                    3 => MBDSR0R::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == MBDSR0R::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == MBDSR0R::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == MBDSR0R::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == MBDSR0R::_11
            }
        }
        #[doc = "Possible values of the field `FDRATE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FDRATER {
            #[doc = "Transmit a frame in nominal rate. The BRS bit in the Tx MB has no effect."]
            _0,
            #[doc = "Transmit a frame with bit rate switching if the BRS bit in the Tx MB is recessive."]
            _1,
        }
        impl FDRATER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FDRATER::_0 => false,
                    FDRATER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FDRATER {
                match value {
                    false => FDRATER::_0,
                    true => FDRATER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FDRATER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FDRATER::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _TDCOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TDCOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TDCFAIL`"]
        pub enum TDCFAILW {
            #[doc = "Measured loop delay is in range."]
            _0,
            #[doc = "Measured loop delay is out of range."]
            _1,
        }
        impl TDCFAILW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TDCFAILW::_0 => false,
                    TDCFAILW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TDCFAILW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TDCFAILW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TDCFAILW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Measured loop delay is in range."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TDCFAILW::_0)
            }
            #[doc = "Measured loop delay is out of range."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TDCFAILW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TDCEN`"]
        pub enum TDCENW {
            #[doc = "TDC is disabled"]
            _0,
            #[doc = "TDC is enabled"]
            _1,
        }
        impl TDCENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TDCENW::_0 => false,
                    TDCENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TDCENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TDCENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TDCENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "TDC is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TDCENW::_0)
            }
            #[doc = "TDC is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TDCENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MBDSR0`"]
        pub enum MBDSR0W {
            #[doc = "Selects 8 bytes per Message Buffer."]
            _00,
            #[doc = "Selects 16 bytes per Message Buffer."]
            _01,
            #[doc = "Selects 32 bytes per Message Buffer."]
            _10,
            #[doc = "Selects 64 bytes per Message Buffer."]
            _11,
        }
        impl MBDSR0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MBDSR0W::_00 => 0,
                    MBDSR0W::_01 => 1,
                    MBDSR0W::_10 => 2,
                    MBDSR0W::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MBDSR0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MBDSR0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MBDSR0W) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Selects 8 bytes per Message Buffer."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(MBDSR0W::_00)
            }
            #[doc = "Selects 16 bytes per Message Buffer."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(MBDSR0W::_01)
            }
            #[doc = "Selects 32 bytes per Message Buffer."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(MBDSR0W::_10)
            }
            #[doc = "Selects 64 bytes per Message Buffer."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(MBDSR0W::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FDRATE`"]
        pub enum FDRATEW {
            #[doc = "Transmit a frame in nominal rate. The BRS bit in the Tx MB has no effect."]
            _0,
            #[doc = "Transmit a frame with bit rate switching if the BRS bit in the Tx MB is recessive."]
            _1,
        }
        impl FDRATEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FDRATEW::_0 => false,
                    FDRATEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FDRATEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FDRATEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FDRATEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Transmit a frame in nominal rate. The BRS bit in the Tx MB has no effect."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FDRATEW::_0)
            }
            #[doc = "Transmit a frame with bit rate switching if the BRS bit in the Tx MB is recessive."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FDRATEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Transceiver Delay Compensation Value"]
            #[inline(always)]
            pub fn tdcval(&self) -> TDCVALR {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TDCVALR { bits }
            }
            #[doc = "Bits 8:12 - Transceiver Delay Compensation Offset"]
            #[inline(always)]
            pub fn tdcoff(&self) -> TDCOFFR {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TDCOFFR { bits }
            }
            #[doc = "Bit 14 - Transceiver Delay Compensation Fail"]
            #[inline(always)]
            pub fn tdcfail(&self) -> TDCFAILR {
                TDCFAILR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - Transceiver Delay Compensation Enable"]
            #[inline(always)]
            pub fn tdcen(&self) -> TDCENR {
                TDCENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:17 - Message Buffer Data Size for Region 0"]
            #[inline(always)]
            pub fn mbdsr0(&self) -> MBDSR0R {
                MBDSR0R::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 31 - Bit Rate Switch Enable"]
            #[inline(always)]
            pub fn fdrate(&self) -> FDRATER {
                FDRATER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 2147483904 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 8:12 - Transceiver Delay Compensation Offset"]
            #[inline(always)]
            pub fn tdcoff(&mut self) -> _TDCOFFW {
                _TDCOFFW { w: self }
            }
            #[doc = "Bit 14 - Transceiver Delay Compensation Fail"]
            #[inline(always)]
            pub fn tdcfail(&mut self) -> _TDCFAILW {
                _TDCFAILW { w: self }
            }
            #[doc = "Bit 15 - Transceiver Delay Compensation Enable"]
            #[inline(always)]
            pub fn tdcen(&mut self) -> _TDCENW {
                _TDCENW { w: self }
            }
            #[doc = "Bits 16:17 - Message Buffer Data Size for Region 0"]
            #[inline(always)]
            pub fn mbdsr0(&mut self) -> _MBDSR0W {
                _MBDSR0W { w: self }
            }
            #[doc = "Bit 31 - Bit Rate Switch Enable"]
            #[inline(always)]
            pub fn fdrate(&mut self) -> _FDRATEW {
                _FDRATEW { w: self }
            }
        }
    }
    #[doc = "CAN FD Bit Timing Register"]
    pub struct FDCBT {
        register: VolatileCell<u32>,
    }
    #[doc = "CAN FD Bit Timing Register"]
    pub mod fdcbt {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FDCBT {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct FPSEG2R {
            bits: u8,
        }
        impl FPSEG2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct FPSEG1R {
            bits: u8,
        }
        impl FPSEG1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct FPROPSEGR {
            bits: u8,
        }
        impl FPROPSEGR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct FRJWR {
            bits: u8,
        }
        impl FRJWR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct FPRESDIVR {
            bits: u16,
        }
        impl FPRESDIVR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _FPSEG2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _FPSEG2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _FPSEG1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _FPSEG1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _FPROPSEGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FPROPSEGW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _FRJWW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FRJWW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _FPRESDIVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FPRESDIVW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 1023;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:2 - Fast Phase Segment 2"]
            #[inline(always)]
            pub fn fpseg2(&self) -> FPSEG2R {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                FPSEG2R { bits }
            }
            #[doc = "Bits 5:7 - Fast Phase Segment 1"]
            #[inline(always)]
            pub fn fpseg1(&self) -> FPSEG1R {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                FPSEG1R { bits }
            }
            #[doc = "Bits 10:14 - Fast Propagation Segment"]
            #[inline(always)]
            pub fn fpropseg(&self) -> FPROPSEGR {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                FPROPSEGR { bits }
            }
            #[doc = "Bits 16:18 - Fast Resync Jump Width"]
            #[inline(always)]
            pub fn frjw(&self) -> FRJWR {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                FRJWR { bits }
            }
            #[doc = "Bits 20:29 - Fast Prescaler Division Factor"]
            #[inline(always)]
            pub fn fpresdiv(&self) -> FPRESDIVR {
                let bits = {
                    const MASK: u16 = 1023;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                FPRESDIVR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:2 - Fast Phase Segment 2"]
            #[inline(always)]
            pub fn fpseg2(&mut self) -> _FPSEG2W {
                _FPSEG2W { w: self }
            }
            #[doc = "Bits 5:7 - Fast Phase Segment 1"]
            #[inline(always)]
            pub fn fpseg1(&mut self) -> _FPSEG1W {
                _FPSEG1W { w: self }
            }
            #[doc = "Bits 10:14 - Fast Propagation Segment"]
            #[inline(always)]
            pub fn fpropseg(&mut self) -> _FPROPSEGW {
                _FPROPSEGW { w: self }
            }
            #[doc = "Bits 16:18 - Fast Resync Jump Width"]
            #[inline(always)]
            pub fn frjw(&mut self) -> _FRJWW {
                _FRJWW { w: self }
            }
            #[doc = "Bits 20:29 - Fast Prescaler Division Factor"]
            #[inline(always)]
            pub fn fpresdiv(&mut self) -> _FPRESDIVW {
                _FPRESDIVW { w: self }
            }
        }
    }
    #[doc = "CAN FD CRC Register"]
    pub struct FDCRC {
        register: VolatileCell<u32>,
    }
    #[doc = "CAN FD CRC Register"]
    pub mod fdcrc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::FDCRC {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct FD_TXCRCR {
            bits: u32,
        }
        impl FD_TXCRCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct FD_MBCRCR {
            bits: u8,
        }
        impl FD_MBCRCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:20 - Extended Transmitted CRC value"]
            #[inline(always)]
            pub fn fd_txcrc(&self) -> FD_TXCRCR {
                let bits = {
                    const MASK: u32 = 2097151;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                FD_TXCRCR { bits }
            }
            #[doc = "Bits 24:30 - CRC Mailbox Number for FD_TXCRC"]
            #[inline(always)]
            pub fn fd_mbcrc(&self) -> FD_MBCRCR {
                let bits = {
                    const MASK: u8 = 127;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                FD_MBCRCR { bits }
            }
        }
    }
}
#[doc = "Flex Controller Area Network module"]
pub struct CAN1 {
    register_block: can1::RegisterBlock,
}
impl Deref for CAN1 {
    type Target = can1::RegisterBlock;
    fn deref(&self) -> &can1::RegisterBlock {
        &self.register_block
    }
}
#[doc = "Flex Controller Area Network module"]
pub const CAN2: Peripheral<CAN2> = unsafe { Peripheral::new(1073917952) };
#[doc = "Flex Controller Area Network module"]
pub mod can2 {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - Module Configuration Register"]
        pub mcr: MCR,
        #[doc = "0x04 - Control 1 register"]
        pub ctrl1: CTRL1,
        #[doc = "0x08 - Free Running Timer"]
        pub timer: TIMER,
        _reserved0: [u8; 4usize],
        #[doc = "0x10 - Rx Mailboxes Global Mask Register"]
        pub rxmgmask: RXMGMASK,
        #[doc = "0x14 - Rx 14 Mask register"]
        pub rx14mask: RX14MASK,
        #[doc = "0x18 - Rx 15 Mask register"]
        pub rx15mask: RX15MASK,
        #[doc = "0x1c - Error Counter"]
        pub ecr: ECR,
        #[doc = "0x20 - Error and Status 1 register"]
        pub esr1: ESR1,
        _reserved1: [u8; 4usize],
        #[doc = "0x28 - Interrupt Masks 1 register"]
        pub imask1: IMASK1,
        _reserved2: [u8; 4usize],
        #[doc = "0x30 - Interrupt Flags 1 register"]
        pub iflag1: IFLAG1,
        #[doc = "0x34 - Control 2 register"]
        pub ctrl2: CTRL2,
        #[doc = "0x38 - Error and Status 2 register"]
        pub esr2: ESR2,
        _reserved3: [u8; 8usize],
        #[doc = "0x44 - CRC Register"]
        pub crcr: CRCR,
        #[doc = "0x48 - Rx FIFO Global Mask register"]
        pub rxfgmask: RXFGMASK,
        #[doc = "0x4c - Rx FIFO Information Register"]
        pub rxfir: RXFIR,
        #[doc = "0x50 - CAN Bit Timing Register"]
        pub cbt: CBT,
        _reserved4: [u8; 44usize],
        #[doc = "0x80 - Embedded RAM"]
        pub embedded_ram: [EMBEDDEDRAM; 128],
        _reserved5: [u8; 1536usize],
        #[doc = "0x880 - Rx Individual Mask Registers"]
        pub rximr0: RXIMR0,
        #[doc = "0x884 - Rx Individual Mask Registers"]
        pub rximr1: RXIMR1,
        #[doc = "0x888 - Rx Individual Mask Registers"]
        pub rximr2: RXIMR2,
        #[doc = "0x88c - Rx Individual Mask Registers"]
        pub rximr3: RXIMR3,
        #[doc = "0x890 - Rx Individual Mask Registers"]
        pub rximr4: RXIMR4,
        #[doc = "0x894 - Rx Individual Mask Registers"]
        pub rximr5: RXIMR5,
        #[doc = "0x898 - Rx Individual Mask Registers"]
        pub rximr6: RXIMR6,
        #[doc = "0x89c - Rx Individual Mask Registers"]
        pub rximr7: RXIMR7,
        #[doc = "0x8a0 - Rx Individual Mask Registers"]
        pub rximr8: RXIMR8,
        #[doc = "0x8a4 - Rx Individual Mask Registers"]
        pub rximr9: RXIMR9,
        #[doc = "0x8a8 - Rx Individual Mask Registers"]
        pub rximr10: RXIMR10,
        #[doc = "0x8ac - Rx Individual Mask Registers"]
        pub rximr11: RXIMR11,
        #[doc = "0x8b0 - Rx Individual Mask Registers"]
        pub rximr12: RXIMR12,
        #[doc = "0x8b4 - Rx Individual Mask Registers"]
        pub rximr13: RXIMR13,
        #[doc = "0x8b8 - Rx Individual Mask Registers"]
        pub rximr14: RXIMR14,
        #[doc = "0x8bc - Rx Individual Mask Registers"]
        pub rximr15: RXIMR15,
        _reserved6: [u8; 576usize],
        #[doc = "0xb00 - Pretended Networking Control 1 Register"]
        pub ctrl1_pn: CTRL1_PN,
        #[doc = "0xb04 - Pretended Networking Control 2 Register"]
        pub ctrl2_pn: CTRL2_PN,
        #[doc = "0xb08 - Pretended Networking Wake Up Match Register"]
        pub wu_mtc: WU_MTC,
        #[doc = "0xb0c - Pretended Networking ID Filter 1 Register"]
        pub flt_id1: FLT_ID1,
        #[doc = "0xb10 - Pretended Networking DLC Filter Register"]
        pub flt_dlc: FLT_DLC,
        #[doc = "0xb14 - Pretended Networking Payload Low Filter 1 Register"]
        pub pl1_lo: PL1_LO,
        #[doc = "0xb18 - Pretended Networking Payload High Filter 1 Register"]
        pub pl1_hi: PL1_HI,
        #[doc = "0xb1c - Pretended Networking ID Filter 2 Register / ID Mask Register"]
        pub flt_id2_idmask: FLT_ID2_IDMASK,
        #[doc = "0xb20 - Pretended Networking Payload Low Filter 2 Register / Payload Low Mask Register"]
        pub pl2_plmask_lo: PL2_PLMASK_LO,
        #[doc = "0xb24 - Pretended Networking Payload High Filter 2 low order bits / Payload High Mask Register"]
        pub pl2_plmask_hi: PL2_PLMASK_HI,
        _reserved7: [u8; 24usize],
        #[doc = "0xb40 - Wake Up Message Buffer Register for C/S"]
        pub wmb0_cs: WMB0_CS,
        #[doc = "0xb44 - Wake Up Message Buffer Register for ID"]
        pub wmb0_id: WMB0_ID,
        #[doc = "0xb48 - Wake Up Message Buffer Register for Data 0-3"]
        pub wmb0_d03: WMB0_D03,
        #[doc = "0xb4c - Wake Up Message Buffer Register Data 4-7"]
        pub wmb0_d47: WMB0_D47,
        #[doc = "0xb50 - Wake Up Message Buffer Register for C/S"]
        pub wmb1_cs: WMB1_CS,
        #[doc = "0xb54 - Wake Up Message Buffer Register for ID"]
        pub wmb1_id: WMB1_ID,
        #[doc = "0xb58 - Wake Up Message Buffer Register for Data 0-3"]
        pub wmb1_d03: WMB1_D03,
        #[doc = "0xb5c - Wake Up Message Buffer Register Data 4-7"]
        pub wmb1_d47: WMB1_D47,
        #[doc = "0xb60 - Wake Up Message Buffer Register for C/S"]
        pub wmb2_cs: WMB2_CS,
        #[doc = "0xb64 - Wake Up Message Buffer Register for ID"]
        pub wmb2_id: WMB2_ID,
        #[doc = "0xb68 - Wake Up Message Buffer Register for Data 0-3"]
        pub wmb2_d03: WMB2_D03,
        #[doc = "0xb6c - Wake Up Message Buffer Register Data 4-7"]
        pub wmb2_d47: WMB2_D47,
        #[doc = "0xb70 - Wake Up Message Buffer Register for C/S"]
        pub wmb3_cs: WMB3_CS,
        #[doc = "0xb74 - Wake Up Message Buffer Register for ID"]
        pub wmb3_id: WMB3_ID,
        #[doc = "0xb78 - Wake Up Message Buffer Register for Data 0-3"]
        pub wmb3_d03: WMB3_D03,
        #[doc = "0xb7c - Wake Up Message Buffer Register Data 4-7"]
        pub wmb3_d47: WMB3_D47,
        _reserved8: [u8; 128usize],
        #[doc = "0xc00 - CAN FD Control Register"]
        pub fdctrl: FDCTRL,
        #[doc = "0xc04 - CAN FD Bit Timing Register"]
        pub fdcbt: FDCBT,
        #[doc = "0xc08 - CAN FD CRC Register"]
        pub fdcrc: FDCRC,
    }
    #[doc = "Module Configuration Register"]
    pub struct MCR {
        register: VolatileCell<u32>,
    }
    #[doc = "Module Configuration Register"]
    pub mod mcr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::MCR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MAXMBR {
            bits: u8,
        }
        impl MAXMBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `IDAM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IDAMR {
            #[doc = "Format A: One full ID (standard and extended) per ID Filter Table element."]
            _00,
            #[doc = "Format B: Two full standard IDs or two partial 14-bit (standard and extended) IDs per ID Filter Table element."]
            _01,
            #[doc = "Format C: Four partial 8-bit Standard IDs per ID Filter Table element."]
            _10,
            #[doc = "Format D: All frames rejected."]
            _11,
        }
        impl IDAMR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IDAMR::_00 => 0,
                    IDAMR::_01 => 1,
                    IDAMR::_10 => 2,
                    IDAMR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IDAMR {
                match value {
                    0 => IDAMR::_00,
                    1 => IDAMR::_01,
                    2 => IDAMR::_10,
                    3 => IDAMR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == IDAMR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == IDAMR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == IDAMR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == IDAMR::_11
            }
        }
        #[doc = "Possible values of the field `FDEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FDENR {
            #[doc = "CAN FD is enabled. FlexCAN is able to receive and transmit messages in both CAN FD and CAN 2.0 formats."]
            _1,
            #[doc = "CAN FD is disabled. FlexCAN is able to receive and transmit messages in CAN 2.0 format."]
            _0,
        }
        impl FDENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FDENR::_1 => true,
                    FDENR::_0 => false,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FDENR {
                match value {
                    true => FDENR::_1,
                    false => FDENR::_0,
                }
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FDENR::_1
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FDENR::_0
            }
        }
        #[doc = "Possible values of the field `AEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum AENR {
            #[doc = "Abort disabled."]
            _0,
            #[doc = "Abort enabled."]
            _1,
        }
        impl AENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    AENR::_0 => false,
                    AENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> AENR {
                match value {
                    false => AENR::_0,
                    true => AENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == AENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == AENR::_1
            }
        }
        #[doc = "Possible values of the field `LPRIOEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LPRIOENR {
            #[doc = "Local Priority disabled."]
            _0,
            #[doc = "Local Priority enabled."]
            _1,
        }
        impl LPRIOENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LPRIOENR::_0 => false,
                    LPRIOENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LPRIOENR {
                match value {
                    false => LPRIOENR::_0,
                    true => LPRIOENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LPRIOENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LPRIOENR::_1
            }
        }
        #[doc = "Possible values of the field `PNET_EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PNET_ENR {
            #[doc = "Pretended Networking mode is disabled."]
            _0,
            #[doc = "Pretended Networking mode is enabled."]
            _1,
        }
        impl PNET_ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PNET_ENR::_0 => false,
                    PNET_ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PNET_ENR {
                match value {
                    false => PNET_ENR::_0,
                    true => PNET_ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PNET_ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PNET_ENR::_1
            }
        }
        #[doc = "Possible values of the field `DMA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMAR {
            #[doc = "DMA feature for RX FIFO disabled."]
            _0,
            #[doc = "DMA feature for RX FIFO enabled."]
            _1,
        }
        impl DMAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMAR::_0 => false,
                    DMAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMAR {
                match value {
                    false => DMAR::_0,
                    true => DMAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMAR::_1
            }
        }
        #[doc = "Possible values of the field `IRMQ`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRMQR {
            #[doc = "Individual Rx masking and queue feature are disabled. For backward compatibility with legacy applications, the reading of C/S word locks the MB even if it is EMPTY."]
            _0,
            #[doc = "Individual Rx masking and queue feature are enabled."]
            _1,
        }
        impl IRMQR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    IRMQR::_0 => false,
                    IRMQR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> IRMQR {
                match value {
                    false => IRMQR::_0,
                    true => IRMQR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == IRMQR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == IRMQR::_1
            }
        }
        #[doc = "Possible values of the field `SRXDIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SRXDISR {
            #[doc = "Self reception enabled."]
            _0,
            #[doc = "Self reception disabled."]
            _1,
        }
        impl SRXDISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SRXDISR::_0 => false,
                    SRXDISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SRXDISR {
                match value {
                    false => SRXDISR::_0,
                    true => SRXDISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SRXDISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SRXDISR::_1
            }
        }
        #[doc = "Possible values of the field `LPMACK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LPMACKR {
            #[doc = "FlexCAN is not in a low-power mode."]
            _0,
            #[doc = "FlexCAN is in a low-power mode."]
            _1,
        }
        impl LPMACKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LPMACKR::_0 => false,
                    LPMACKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LPMACKR {
                match value {
                    false => LPMACKR::_0,
                    true => LPMACKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LPMACKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LPMACKR::_1
            }
        }
        #[doc = "Possible values of the field `WRNEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WRNENR {
            #[doc = "TWRNINT and RWRNINT bits are zero, independent of the values in the error counters."]
            _0,
            #[doc = "TWRNINT and RWRNINT bits are set when the respective error counter transitions from less than 96 to greater than or equal to 96."]
            _1,
        }
        impl WRNENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WRNENR::_0 => false,
                    WRNENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WRNENR {
                match value {
                    false => WRNENR::_0,
                    true => WRNENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WRNENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WRNENR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct SUPVR {
            bits: bool,
        }
        impl SUPVR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `FRZACK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FRZACKR {
            #[doc = "FlexCAN not in Freeze mode, prescaler running."]
            _0,
            #[doc = "FlexCAN in Freeze mode, prescaler stopped."]
            _1,
        }
        impl FRZACKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FRZACKR::_0 => false,
                    FRZACKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FRZACKR {
                match value {
                    false => FRZACKR::_0,
                    true => FRZACKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FRZACKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FRZACKR::_1
            }
        }
        #[doc = "Possible values of the field `SOFTRST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SOFTRSTR {
            #[doc = "No reset request."]
            _0,
            #[doc = "Resets the registers affected by soft reset."]
            _1,
        }
        impl SOFTRSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SOFTRSTR::_0 => false,
                    SOFTRSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SOFTRSTR {
                match value {
                    false => SOFTRSTR::_0,
                    true => SOFTRSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SOFTRSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SOFTRSTR::_1
            }
        }
        #[doc = "Possible values of the field `NOTRDY`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum NOTRDYR {
            #[doc = "FlexCAN module is either in Normal mode, Listen-Only mode or Loop-Back mode."]
            _0,
            #[doc = r" Reserved"]
            _Reserved(bool),
        }
        impl NOTRDYR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    NOTRDYR::_0 => false,
                    NOTRDYR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> NOTRDYR {
                match value {
                    false => NOTRDYR::_0,
                    i => NOTRDYR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == NOTRDYR::_0
            }
        }
        #[doc = "Possible values of the field `HALT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HALTR {
            #[doc = "No Freeze mode request."]
            _0,
            #[doc = "Enters Freeze mode if the FRZ bit is asserted."]
            _1,
        }
        impl HALTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HALTR::_0 => false,
                    HALTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HALTR {
                match value {
                    false => HALTR::_0,
                    true => HALTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HALTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HALTR::_1
            }
        }
        #[doc = "Possible values of the field `RFEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RFENR {
            #[doc = "Rx FIFO not enabled."]
            _0,
            #[doc = "Rx FIFO enabled."]
            _1,
        }
        impl RFENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RFENR::_0 => false,
                    RFENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RFENR {
                match value {
                    false => RFENR::_0,
                    true => RFENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RFENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RFENR::_1
            }
        }
        #[doc = "Possible values of the field `FRZ`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FRZR {
            #[doc = "Not enabled to enter Freeze mode."]
            _0,
            #[doc = "Enabled to enter Freeze mode."]
            _1,
        }
        impl FRZR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FRZR::_0 => false,
                    FRZR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FRZR {
                match value {
                    false => FRZR::_0,
                    true => FRZR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FRZR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FRZR::_1
            }
        }
        #[doc = "Possible values of the field `MDIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MDISR {
            #[doc = "Enable the FlexCAN module."]
            _0,
            #[doc = "Disable the FlexCAN module."]
            _1,
        }
        impl MDISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MDISR::_0 => false,
                    MDISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MDISR {
                match value {
                    false => MDISR::_0,
                    true => MDISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MDISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MDISR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _MAXMBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MAXMBW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 127;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IDAM`"]
        pub enum IDAMW {
            #[doc = "Format A: One full ID (standard and extended) per ID Filter Table element."]
            _00,
            #[doc = "Format B: Two full standard IDs or two partial 14-bit (standard and extended) IDs per ID Filter Table element."]
            _01,
            #[doc = "Format C: Four partial 8-bit Standard IDs per ID Filter Table element."]
            _10,
            #[doc = "Format D: All frames rejected."]
            _11,
        }
        impl IDAMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IDAMW::_00 => 0,
                    IDAMW::_01 => 1,
                    IDAMW::_10 => 2,
                    IDAMW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IDAMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IDAMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IDAMW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Format A: One full ID (standard and extended) per ID Filter Table element."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(IDAMW::_00)
            }
            #[doc = "Format B: Two full standard IDs or two partial 14-bit (standard and extended) IDs per ID Filter Table element."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(IDAMW::_01)
            }
            #[doc = "Format C: Four partial 8-bit Standard IDs per ID Filter Table element."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(IDAMW::_10)
            }
            #[doc = "Format D: All frames rejected."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(IDAMW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FDEN`"]
        pub enum FDENW {
            #[doc = "CAN FD is enabled. FlexCAN is able to receive and transmit messages in both CAN FD and CAN 2.0 formats."]
            _1,
            #[doc = "CAN FD is disabled. FlexCAN is able to receive and transmit messages in CAN 2.0 format."]
            _0,
        }
        impl FDENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FDENW::_1 => true,
                    FDENW::_0 => false,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FDENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FDENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FDENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "CAN FD is enabled. FlexCAN is able to receive and transmit messages in both CAN FD and CAN 2.0 formats."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FDENW::_1)
            }
            #[doc = "CAN FD is disabled. FlexCAN is able to receive and transmit messages in CAN 2.0 format."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FDENW::_0)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `AEN`"]
        pub enum AENW {
            #[doc = "Abort disabled."]
            _0,
            #[doc = "Abort enabled."]
            _1,
        }
        impl AENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    AENW::_0 => false,
                    AENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _AENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _AENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: AENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Abort disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(AENW::_0)
            }
            #[doc = "Abort enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(AENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LPRIOEN`"]
        pub enum LPRIOENW {
            #[doc = "Local Priority disabled."]
            _0,
            #[doc = "Local Priority enabled."]
            _1,
        }
        impl LPRIOENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LPRIOENW::_0 => false,
                    LPRIOENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LPRIOENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LPRIOENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LPRIOENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Local Priority disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LPRIOENW::_0)
            }
            #[doc = "Local Priority enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LPRIOENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PNET_EN`"]
        pub enum PNET_ENW {
            #[doc = "Pretended Networking mode is disabled."]
            _0,
            #[doc = "Pretended Networking mode is enabled."]
            _1,
        }
        impl PNET_ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PNET_ENW::_0 => false,
                    PNET_ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PNET_ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PNET_ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PNET_ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pretended Networking mode is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PNET_ENW::_0)
            }
            #[doc = "Pretended Networking mode is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PNET_ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMA`"]
        pub enum DMAW {
            #[doc = "DMA feature for RX FIFO disabled."]
            _0,
            #[doc = "DMA feature for RX FIFO enabled."]
            _1,
        }
        impl DMAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMAW::_0 => false,
                    DMAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA feature for RX FIFO disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMAW::_0)
            }
            #[doc = "DMA feature for RX FIFO enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRMQ`"]
        pub enum IRMQW {
            #[doc = "Individual Rx masking and queue feature are disabled. For backward compatibility with legacy applications, the reading of C/S word locks the MB even if it is EMPTY."]
            _0,
            #[doc = "Individual Rx masking and queue feature are enabled."]
            _1,
        }
        impl IRMQW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    IRMQW::_0 => false,
                    IRMQW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRMQW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRMQW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRMQW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Individual Rx masking and queue feature are disabled. For backward compatibility with legacy applications, the reading of C/S word locks the MB even if it is EMPTY."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(IRMQW::_0)
            }
            #[doc = "Individual Rx masking and queue feature are enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(IRMQW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SRXDIS`"]
        pub enum SRXDISW {
            #[doc = "Self reception enabled."]
            _0,
            #[doc = "Self reception disabled."]
            _1,
        }
        impl SRXDISW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SRXDISW::_0 => false,
                    SRXDISW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SRXDISW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SRXDISW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SRXDISW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Self reception enabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SRXDISW::_0)
            }
            #[doc = "Self reception disabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SRXDISW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WRNEN`"]
        pub enum WRNENW {
            #[doc = "TWRNINT and RWRNINT bits are zero, independent of the values in the error counters."]
            _0,
            #[doc = "TWRNINT and RWRNINT bits are set when the respective error counter transitions from less than 96 to greater than or equal to 96."]
            _1,
        }
        impl WRNENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WRNENW::_0 => false,
                    WRNENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WRNENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WRNENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WRNENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "TWRNINT and RWRNINT bits are zero, independent of the values in the error counters."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WRNENW::_0)
            }
            #[doc = "TWRNINT and RWRNINT bits are set when the respective error counter transitions from less than 96 to greater than or equal to 96."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WRNENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 21;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SUPVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SUPVW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 23;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SOFTRST`"]
        pub enum SOFTRSTW {
            #[doc = "No reset request."]
            _0,
            #[doc = "Resets the registers affected by soft reset."]
            _1,
        }
        impl SOFTRSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SOFTRSTW::_0 => false,
                    SOFTRSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SOFTRSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SOFTRSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SOFTRSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No reset request."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SOFTRSTW::_0)
            }
            #[doc = "Resets the registers affected by soft reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SOFTRSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 25;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `HALT`"]
        pub enum HALTW {
            #[doc = "No Freeze mode request."]
            _0,
            #[doc = "Enters Freeze mode if the FRZ bit is asserted."]
            _1,
        }
        impl HALTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HALTW::_0 => false,
                    HALTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HALTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HALTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HALTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No Freeze mode request."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HALTW::_0)
            }
            #[doc = "Enters Freeze mode if the FRZ bit is asserted."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HALTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 28;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RFEN`"]
        pub enum RFENW {
            #[doc = "Rx FIFO not enabled."]
            _0,
            #[doc = "Rx FIFO enabled."]
            _1,
        }
        impl RFENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RFENW::_0 => false,
                    RFENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RFENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RFENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RFENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Rx FIFO not enabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RFENW::_0)
            }
            #[doc = "Rx FIFO enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RFENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 29;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FRZ`"]
        pub enum FRZW {
            #[doc = "Not enabled to enter Freeze mode."]
            _0,
            #[doc = "Enabled to enter Freeze mode."]
            _1,
        }
        impl FRZW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FRZW::_0 => false,
                    FRZW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FRZW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FRZW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FRZW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Not enabled to enter Freeze mode."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FRZW::_0)
            }
            #[doc = "Enabled to enter Freeze mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FRZW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MDIS`"]
        pub enum MDISW {
            #[doc = "Enable the FlexCAN module."]
            _0,
            #[doc = "Disable the FlexCAN module."]
            _1,
        }
        impl MDISW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MDISW::_0 => false,
                    MDISW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MDISW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MDISW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MDISW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Enable the FlexCAN module."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MDISW::_0)
            }
            #[doc = "Disable the FlexCAN module."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MDISW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:6 - Number Of The Last Message Buffer"]
            #[inline(always)]
            pub fn maxmb(&self) -> MAXMBR {
                let bits = {
                    const MASK: u8 = 127;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                MAXMBR { bits }
            }
            #[doc = "Bits 8:9 - ID Acceptance Mode"]
            #[inline(always)]
            pub fn idam(&self) -> IDAMR {
                IDAMR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 11 - CAN FD operation enable"]
            #[inline(always)]
            pub fn fden(&self) -> FDENR {
                FDENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Abort Enable"]
            #[inline(always)]
            pub fn aen(&self) -> AENR {
                AENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Local Priority Enable"]
            #[inline(always)]
            pub fn lprioen(&self) -> LPRIOENR {
                LPRIOENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - Pretended Networking Enable"]
            #[inline(always)]
            pub fn pnet_en(&self) -> PNET_ENR {
                PNET_ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&self) -> DMAR {
                DMAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 16 - Individual Rx Masking And Queue Enable"]
            #[inline(always)]
            pub fn irmq(&self) -> IRMQR {
                IRMQR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - Self Reception Disable"]
            #[inline(always)]
            pub fn srxdis(&self) -> SRXDISR {
                SRXDISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 20 - Low-Power Mode Acknowledge"]
            #[inline(always)]
            pub fn lpmack(&self) -> LPMACKR {
                LPMACKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - Warning Interrupt Enable"]
            #[inline(always)]
            pub fn wrnen(&self) -> WRNENR {
                WRNENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 23 - Supervisor Mode"]
            #[inline(always)]
            pub fn supv(&self) -> SUPVR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                SUPVR { bits }
            }
            #[doc = "Bit 24 - Freeze Mode Acknowledge"]
            #[inline(always)]
            pub fn frzack(&self) -> FRZACKR {
                FRZACKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 25 - Soft Reset"]
            #[inline(always)]
            pub fn softrst(&self) -> SOFTRSTR {
                SOFTRSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 25;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 27 - FlexCAN Not Ready"]
            #[inline(always)]
            pub fn notrdy(&self) -> NOTRDYR {
                NOTRDYR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 27;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 28 - Halt FlexCAN"]
            #[inline(always)]
            pub fn halt(&self) -> HALTR {
                HALTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 28;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 29 - Rx FIFO Enable"]
            #[inline(always)]
            pub fn rfen(&self) -> RFENR {
                RFENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 29;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 30 - Freeze Enable"]
            #[inline(always)]
            pub fn frz(&self) -> FRZR {
                FRZR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Module Disable"]
            #[inline(always)]
            pub fn mdis(&self) -> MDISR {
                MDISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 3633315855 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:6 - Number Of The Last Message Buffer"]
            #[inline(always)]
            pub fn maxmb(&mut self) -> _MAXMBW {
                _MAXMBW { w: self }
            }
            #[doc = "Bits 8:9 - ID Acceptance Mode"]
            #[inline(always)]
            pub fn idam(&mut self) -> _IDAMW {
                _IDAMW { w: self }
            }
            #[doc = "Bit 11 - CAN FD operation enable"]
            #[inline(always)]
            pub fn fden(&mut self) -> _FDENW {
                _FDENW { w: self }
            }
            #[doc = "Bit 12 - Abort Enable"]
            #[inline(always)]
            pub fn aen(&mut self) -> _AENW {
                _AENW { w: self }
            }
            #[doc = "Bit 13 - Local Priority Enable"]
            #[inline(always)]
            pub fn lprioen(&mut self) -> _LPRIOENW {
                _LPRIOENW { w: self }
            }
            #[doc = "Bit 14 - Pretended Networking Enable"]
            #[inline(always)]
            pub fn pnet_en(&mut self) -> _PNET_ENW {
                _PNET_ENW { w: self }
            }
            #[doc = "Bit 15 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&mut self) -> _DMAW {
                _DMAW { w: self }
            }
            #[doc = "Bit 16 - Individual Rx Masking And Queue Enable"]
            #[inline(always)]
            pub fn irmq(&mut self) -> _IRMQW {
                _IRMQW { w: self }
            }
            #[doc = "Bit 17 - Self Reception Disable"]
            #[inline(always)]
            pub fn srxdis(&mut self) -> _SRXDISW {
                _SRXDISW { w: self }
            }
            #[doc = "Bit 21 - Warning Interrupt Enable"]
            #[inline(always)]
            pub fn wrnen(&mut self) -> _WRNENW {
                _WRNENW { w: self }
            }
            #[doc = "Bit 23 - Supervisor Mode"]
            #[inline(always)]
            pub fn supv(&mut self) -> _SUPVW {
                _SUPVW { w: self }
            }
            #[doc = "Bit 25 - Soft Reset"]
            #[inline(always)]
            pub fn softrst(&mut self) -> _SOFTRSTW {
                _SOFTRSTW { w: self }
            }
            #[doc = "Bit 28 - Halt FlexCAN"]
            #[inline(always)]
            pub fn halt(&mut self) -> _HALTW {
                _HALTW { w: self }
            }
            #[doc = "Bit 29 - Rx FIFO Enable"]
            #[inline(always)]
            pub fn rfen(&mut self) -> _RFENW {
                _RFENW { w: self }
            }
            #[doc = "Bit 30 - Freeze Enable"]
            #[inline(always)]
            pub fn frz(&mut self) -> _FRZW {
                _FRZW { w: self }
            }
            #[doc = "Bit 31 - Module Disable"]
            #[inline(always)]
            pub fn mdis(&mut self) -> _MDISW {
                _MDISW { w: self }
            }
        }
    }
    #[doc = "Control 1 register"]
    pub struct CTRL1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Control 1 register"]
    pub mod ctrl1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CTRL1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct PROPSEGR {
            bits: u8,
        }
        impl PROPSEGR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `LOM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LOMR {
            #[doc = "Listen-Only mode is deactivated."]
            _0,
            #[doc = "FlexCAN module operates in Listen-Only mode."]
            _1,
        }
        impl LOMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LOMR::_0 => false,
                    LOMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LOMR {
                match value {
                    false => LOMR::_0,
                    true => LOMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LOMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LOMR::_1
            }
        }
        #[doc = "Possible values of the field `LBUF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LBUFR {
            #[doc = "Buffer with highest priority is transmitted first."]
            _0,
            #[doc = "Lowest number buffer is transmitted first."]
            _1,
        }
        impl LBUFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LBUFR::_0 => false,
                    LBUFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LBUFR {
                match value {
                    false => LBUFR::_0,
                    true => LBUFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LBUFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LBUFR::_1
            }
        }
        #[doc = "Possible values of the field `TSYN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TSYNR {
            #[doc = "Timer Sync feature disabled"]
            _0,
            #[doc = "Timer Sync feature enabled"]
            _1,
        }
        impl TSYNR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TSYNR::_0 => false,
                    TSYNR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TSYNR {
                match value {
                    false => TSYNR::_0,
                    true => TSYNR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TSYNR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TSYNR::_1
            }
        }
        #[doc = "Possible values of the field `BOFFREC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BOFFRECR {
            #[doc = "Automatic recovering from Bus Off state enabled."]
            _0,
            #[doc = "Automatic recovering from Bus Off state disabled."]
            _1,
        }
        impl BOFFRECR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BOFFRECR::_0 => false,
                    BOFFRECR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BOFFRECR {
                match value {
                    false => BOFFRECR::_0,
                    true => BOFFRECR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BOFFRECR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BOFFRECR::_1
            }
        }
        #[doc = "Possible values of the field `SMP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMPR {
            #[doc = "Just one sample is used to determine the bit value."]
            _0,
            #[doc = "Three samples are used to determine the value of the received bit: the regular one (sample point) and 2 preceding samples; a majority rule is used."]
            _1,
        }
        impl SMPR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SMPR::_0 => false,
                    SMPR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SMPR {
                match value {
                    false => SMPR::_0,
                    true => SMPR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SMPR::_1
            }
        }
        #[doc = "Possible values of the field `RWRNMSK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RWRNMSKR {
            #[doc = "Rx Warning Interrupt disabled."]
            _0,
            #[doc = "Rx Warning Interrupt enabled."]
            _1,
        }
        impl RWRNMSKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RWRNMSKR::_0 => false,
                    RWRNMSKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RWRNMSKR {
                match value {
                    false => RWRNMSKR::_0,
                    true => RWRNMSKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RWRNMSKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RWRNMSKR::_1
            }
        }
        #[doc = "Possible values of the field `TWRNMSK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TWRNMSKR {
            #[doc = "Tx Warning Interrupt disabled."]
            _0,
            #[doc = "Tx Warning Interrupt enabled."]
            _1,
        }
        impl TWRNMSKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TWRNMSKR::_0 => false,
                    TWRNMSKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TWRNMSKR {
                match value {
                    false => TWRNMSKR::_0,
                    true => TWRNMSKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TWRNMSKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TWRNMSKR::_1
            }
        }
        #[doc = "Possible values of the field `LPB`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LPBR {
            #[doc = "Loop Back disabled."]
            _0,
            #[doc = "Loop Back enabled."]
            _1,
        }
        impl LPBR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LPBR::_0 => false,
                    LPBR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LPBR {
                match value {
                    false => LPBR::_0,
                    true => LPBR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LPBR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LPBR::_1
            }
        }
        #[doc = "Possible values of the field `CLKSRC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CLKSRCR {
            #[doc = "The CAN engine clock source is the oscillator clock. Under this condition, the oscillator clock frequency must be lower than the bus clock."]
            _0,
            #[doc = "The CAN engine clock source is the peripheral clock."]
            _1,
        }
        impl CLKSRCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CLKSRCR::_0 => false,
                    CLKSRCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CLKSRCR {
                match value {
                    false => CLKSRCR::_0,
                    true => CLKSRCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CLKSRCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CLKSRCR::_1
            }
        }
        #[doc = "Possible values of the field `ERRMSK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERRMSKR {
            #[doc = "Error interrupt disabled."]
            _0,
            #[doc = "Error interrupt enabled."]
            _1,
        }
        impl ERRMSKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERRMSKR::_0 => false,
                    ERRMSKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERRMSKR {
                match value {
                    false => ERRMSKR::_0,
                    true => ERRMSKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERRMSKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERRMSKR::_1
            }
        }
        #[doc = "Possible values of the field `BOFFMSK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BOFFMSKR {
            #[doc = "Bus Off interrupt disabled."]
            _0,
            #[doc = "Bus Off interrupt enabled."]
            _1,
        }
        impl BOFFMSKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BOFFMSKR::_0 => false,
                    BOFFMSKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BOFFMSKR {
                match value {
                    false => BOFFMSKR::_0,
                    true => BOFFMSKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BOFFMSKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BOFFMSKR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct PSEG2R {
            bits: u8,
        }
        impl PSEG2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct PSEG1R {
            bits: u8,
        }
        impl PSEG1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct RJWR {
            bits: u8,
        }
        impl RJWR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct PRESDIVR {
            bits: u8,
        }
        impl PRESDIVR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _PROPSEGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PROPSEGW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LOM`"]
        pub enum LOMW {
            #[doc = "Listen-Only mode is deactivated."]
            _0,
            #[doc = "FlexCAN module operates in Listen-Only mode."]
            _1,
        }
        impl LOMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LOMW::_0 => false,
                    LOMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LOMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LOMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LOMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Listen-Only mode is deactivated."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LOMW::_0)
            }
            #[doc = "FlexCAN module operates in Listen-Only mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LOMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LBUF`"]
        pub enum LBUFW {
            #[doc = "Buffer with highest priority is transmitted first."]
            _0,
            #[doc = "Lowest number buffer is transmitted first."]
            _1,
        }
        impl LBUFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LBUFW::_0 => false,
                    LBUFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LBUFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LBUFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LBUFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Buffer with highest priority is transmitted first."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LBUFW::_0)
            }
            #[doc = "Lowest number buffer is transmitted first."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LBUFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TSYN`"]
        pub enum TSYNW {
            #[doc = "Timer Sync feature disabled"]
            _0,
            #[doc = "Timer Sync feature enabled"]
            _1,
        }
        impl TSYNW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TSYNW::_0 => false,
                    TSYNW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TSYNW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TSYNW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TSYNW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Timer Sync feature disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TSYNW::_0)
            }
            #[doc = "Timer Sync feature enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TSYNW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BOFFREC`"]
        pub enum BOFFRECW {
            #[doc = "Automatic recovering from Bus Off state enabled."]
            _0,
            #[doc = "Automatic recovering from Bus Off state disabled."]
            _1,
        }
        impl BOFFRECW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    BOFFRECW::_0 => false,
                    BOFFRECW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BOFFRECW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BOFFRECW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BOFFRECW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Automatic recovering from Bus Off state enabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BOFFRECW::_0)
            }
            #[doc = "Automatic recovering from Bus Off state disabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BOFFRECW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMP`"]
        pub enum SMPW {
            #[doc = "Just one sample is used to determine the bit value."]
            _0,
            #[doc = "Three samples are used to determine the value of the received bit: the regular one (sample point) and 2 preceding samples; a majority rule is used."]
            _1,
        }
        impl SMPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SMPW::_0 => false,
                    SMPW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMPW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Just one sample is used to determine the bit value."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMPW::_0)
            }
            #[doc = "Three samples are used to determine the value of the received bit: the regular one (sample point) and 2 preceding samples; a majority rule is used."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SMPW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RWRNMSK`"]
        pub enum RWRNMSKW {
            #[doc = "Rx Warning Interrupt disabled."]
            _0,
            #[doc = "Rx Warning Interrupt enabled."]
            _1,
        }
        impl RWRNMSKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RWRNMSKW::_0 => false,
                    RWRNMSKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RWRNMSKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RWRNMSKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RWRNMSKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Rx Warning Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RWRNMSKW::_0)
            }
            #[doc = "Rx Warning Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RWRNMSKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TWRNMSK`"]
        pub enum TWRNMSKW {
            #[doc = "Tx Warning Interrupt disabled."]
            _0,
            #[doc = "Tx Warning Interrupt enabled."]
            _1,
        }
        impl TWRNMSKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TWRNMSKW::_0 => false,
                    TWRNMSKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TWRNMSKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TWRNMSKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TWRNMSKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Tx Warning Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TWRNMSKW::_0)
            }
            #[doc = "Tx Warning Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TWRNMSKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LPB`"]
        pub enum LPBW {
            #[doc = "Loop Back disabled."]
            _0,
            #[doc = "Loop Back enabled."]
            _1,
        }
        impl LPBW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LPBW::_0 => false,
                    LPBW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LPBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LPBW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LPBW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Loop Back disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LPBW::_0)
            }
            #[doc = "Loop Back enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LPBW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CLKSRC`"]
        pub enum CLKSRCW {
            #[doc = "The CAN engine clock source is the oscillator clock. Under this condition, the oscillator clock frequency must be lower than the bus clock."]
            _0,
            #[doc = "The CAN engine clock source is the peripheral clock."]
            _1,
        }
        impl CLKSRCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CLKSRCW::_0 => false,
                    CLKSRCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLKSRCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLKSRCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CLKSRCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The CAN engine clock source is the oscillator clock. Under this condition, the oscillator clock frequency must be lower than the bus clock."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CLKSRCW::_0)
            }
            #[doc = "The CAN engine clock source is the peripheral clock."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CLKSRCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ERRMSK`"]
        pub enum ERRMSKW {
            #[doc = "Error interrupt disabled."]
            _0,
            #[doc = "Error interrupt enabled."]
            _1,
        }
        impl ERRMSKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERRMSKW::_0 => false,
                    ERRMSKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERRMSKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERRMSKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERRMSKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Error interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERRMSKW::_0)
            }
            #[doc = "Error interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERRMSKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BOFFMSK`"]
        pub enum BOFFMSKW {
            #[doc = "Bus Off interrupt disabled."]
            _0,
            #[doc = "Bus Off interrupt enabled."]
            _1,
        }
        impl BOFFMSKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    BOFFMSKW::_0 => false,
                    BOFFMSKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BOFFMSKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BOFFMSKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BOFFMSKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Bus Off interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BOFFMSKW::_0)
            }
            #[doc = "Bus Off interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BOFFMSKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSEG2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSEG2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSEG1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSEG1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 19;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _RJWW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RJWW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 22;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _PRESDIVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PRESDIVW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:2 - Propagation Segment"]
            #[inline(always)]
            pub fn propseg(&self) -> PROPSEGR {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                PROPSEGR { bits }
            }
            #[doc = "Bit 3 - Listen-Only Mode"]
            #[inline(always)]
            pub fn lom(&self) -> LOMR {
                LOMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Lowest Buffer Transmitted First"]
            #[inline(always)]
            pub fn lbuf(&self) -> LBUFR {
                LBUFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Timer Sync"]
            #[inline(always)]
            pub fn tsyn(&self) -> TSYNR {
                TSYNR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Bus Off Recovery"]
            #[inline(always)]
            pub fn boffrec(&self) -> BOFFRECR {
                BOFFRECR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - CAN Bit Sampling"]
            #[inline(always)]
            pub fn smp(&self) -> SMPR {
                SMPR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Rx Warning Interrupt Mask"]
            #[inline(always)]
            pub fn rwrnmsk(&self) -> RWRNMSKR {
                RWRNMSKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 11 - Tx Warning Interrupt Mask"]
            #[inline(always)]
            pub fn twrnmsk(&self) -> TWRNMSKR {
                TWRNMSKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Loop Back Mode"]
            #[inline(always)]
            pub fn lpb(&self) -> LPBR {
                LPBR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - CAN Engine Clock Source"]
            #[inline(always)]
            pub fn clksrc(&self) -> CLKSRCR {
                CLKSRCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - Error Interrupt Mask"]
            #[inline(always)]
            pub fn errmsk(&self) -> ERRMSKR {
                ERRMSKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - Bus Off Interrupt Mask"]
            #[inline(always)]
            pub fn boffmsk(&self) -> BOFFMSKR {
                BOFFMSKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:18 - Phase Segment 2"]
            #[inline(always)]
            pub fn pseg2(&self) -> PSEG2R {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                PSEG2R { bits }
            }
            #[doc = "Bits 19:21 - Phase Segment 1"]
            #[inline(always)]
            pub fn pseg1(&self) -> PSEG1R {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 19;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                PSEG1R { bits }
            }
            #[doc = "Bits 22:23 - Resync Jump Width"]
            #[inline(always)]
            pub fn rjw(&self) -> RJWR {
                let bits = {
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                RJWR { bits }
            }
            #[doc = "Bits 24:31 - Prescaler Division Factor"]
            #[inline(always)]
            pub fn presdiv(&self) -> PRESDIVR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                PRESDIVR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:2 - Propagation Segment"]
            #[inline(always)]
            pub fn propseg(&mut self) -> _PROPSEGW {
                _PROPSEGW { w: self }
            }
            #[doc = "Bit 3 - Listen-Only Mode"]
            #[inline(always)]
            pub fn lom(&mut self) -> _LOMW {
                _LOMW { w: self }
            }
            #[doc = "Bit 4 - Lowest Buffer Transmitted First"]
            #[inline(always)]
            pub fn lbuf(&mut self) -> _LBUFW {
                _LBUFW { w: self }
            }
            #[doc = "Bit 5 - Timer Sync"]
            #[inline(always)]
            pub fn tsyn(&mut self) -> _TSYNW {
                _TSYNW { w: self }
            }
            #[doc = "Bit 6 - Bus Off Recovery"]
            #[inline(always)]
            pub fn boffrec(&mut self) -> _BOFFRECW {
                _BOFFRECW { w: self }
            }
            #[doc = "Bit 7 - CAN Bit Sampling"]
            #[inline(always)]
            pub fn smp(&mut self) -> _SMPW {
                _SMPW { w: self }
            }
            #[doc = "Bit 10 - Rx Warning Interrupt Mask"]
            #[inline(always)]
            pub fn rwrnmsk(&mut self) -> _RWRNMSKW {
                _RWRNMSKW { w: self }
            }
            #[doc = "Bit 11 - Tx Warning Interrupt Mask"]
            #[inline(always)]
            pub fn twrnmsk(&mut self) -> _TWRNMSKW {
                _TWRNMSKW { w: self }
            }
            #[doc = "Bit 12 - Loop Back Mode"]
            #[inline(always)]
            pub fn lpb(&mut self) -> _LPBW {
                _LPBW { w: self }
            }
            #[doc = "Bit 13 - CAN Engine Clock Source"]
            #[inline(always)]
            pub fn clksrc(&mut self) -> _CLKSRCW {
                _CLKSRCW { w: self }
            }
            #[doc = "Bit 14 - Error Interrupt Mask"]
            #[inline(always)]
            pub fn errmsk(&mut self) -> _ERRMSKW {
                _ERRMSKW { w: self }
            }
            #[doc = "Bit 15 - Bus Off Interrupt Mask"]
            #[inline(always)]
            pub fn boffmsk(&mut self) -> _BOFFMSKW {
                _BOFFMSKW { w: self }
            }
            #[doc = "Bits 16:18 - Phase Segment 2"]
            #[inline(always)]
            pub fn pseg2(&mut self) -> _PSEG2W {
                _PSEG2W { w: self }
            }
            #[doc = "Bits 19:21 - Phase Segment 1"]
            #[inline(always)]
            pub fn pseg1(&mut self) -> _PSEG1W {
                _PSEG1W { w: self }
            }
            #[doc = "Bits 22:23 - Resync Jump Width"]
            #[inline(always)]
            pub fn rjw(&mut self) -> _RJWW {
                _RJWW { w: self }
            }
            #[doc = "Bits 24:31 - Prescaler Division Factor"]
            #[inline(always)]
            pub fn presdiv(&mut self) -> _PRESDIVW {
                _PRESDIVW { w: self }
            }
        }
    }
    #[doc = "Free Running Timer"]
    pub struct TIMER {
        register: VolatileCell<u32>,
    }
    #[doc = "Free Running Timer"]
    pub mod timer {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TIMER {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct TIMERR {
            bits: u16,
        }
        impl TIMERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIMERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIMERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Timer Value"]
            #[inline(always)]
            pub fn timer(&self) -> TIMERR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                TIMERR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Timer Value"]
            #[inline(always)]
            pub fn timer(&mut self) -> _TIMERW {
                _TIMERW { w: self }
            }
        }
    }
    #[doc = "Rx Mailboxes Global Mask Register"]
    pub struct RXMGMASK {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Mailboxes Global Mask Register"]
    pub mod rxmgmask {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXMGMASK {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MGR {
            bits: u32,
        }
        impl MGR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MGW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Rx Mailboxes Global Mask Bits"]
            #[inline(always)]
            pub fn mg(&self) -> MGR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MGR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Rx Mailboxes Global Mask Bits"]
            #[inline(always)]
            pub fn mg(&mut self) -> _MGW {
                _MGW { w: self }
            }
        }
    }
    #[doc = "Rx 14 Mask register"]
    pub struct RX14MASK {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx 14 Mask register"]
    pub mod rx14mask {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RX14MASK {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RX14MR {
            bits: u32,
        }
        impl RX14MR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RX14MW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RX14MW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Rx Buffer 14 Mask Bits"]
            #[inline(always)]
            pub fn rx14m(&self) -> RX14MR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                RX14MR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Rx Buffer 14 Mask Bits"]
            #[inline(always)]
            pub fn rx14m(&mut self) -> _RX14MW {
                _RX14MW { w: self }
            }
        }
    }
    #[doc = "Rx 15 Mask register"]
    pub struct RX15MASK {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx 15 Mask register"]
    pub mod rx15mask {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RX15MASK {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct RX15MR {
            bits: u32,
        }
        impl RX15MR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _RX15MW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RX15MW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Rx Buffer 15 Mask Bits"]
            #[inline(always)]
            pub fn rx15m(&self) -> RX15MR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                RX15MR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Rx Buffer 15 Mask Bits"]
            #[inline(always)]
            pub fn rx15m(&mut self) -> _RX15MW {
                _RX15MW { w: self }
            }
        }
    }
    #[doc = "Error Counter"]
    pub struct ECR {
        register: VolatileCell<u32>,
    }
    #[doc = "Error Counter"]
    pub mod ecr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::ECR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct TXERRCNTR {
            bits: u8,
        }
        impl TXERRCNTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct RXERRCNTR {
            bits: u8,
        }
        impl RXERRCNTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct TXERRCNT_FASTR {
            bits: u8,
        }
        impl TXERRCNT_FASTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct RXERRCNT_FASTR {
            bits: u8,
        }
        impl RXERRCNT_FASTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXERRCNTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXERRCNTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXERRCNTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXERRCNTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXERRCNT_FASTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXERRCNT_FASTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXERRCNT_FASTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXERRCNT_FASTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Transmit Error Counter"]
            #[inline(always)]
            pub fn txerrcnt(&self) -> TXERRCNTR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TXERRCNTR { bits }
            }
            #[doc = "Bits 8:15 - Receive Error Counter"]
            #[inline(always)]
            pub fn rxerrcnt(&self) -> RXERRCNTR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                RXERRCNTR { bits }
            }
            #[doc = "Bits 16:23 - Transmit Error Counter for fast bits"]
            #[inline(always)]
            pub fn txerrcnt_fast(&self) -> TXERRCNT_FASTR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TXERRCNT_FASTR { bits }
            }
            #[doc = "Bits 24:31 - Receive Error Counter for fast bits"]
            #[inline(always)]
            pub fn rxerrcnt_fast(&self) -> RXERRCNT_FASTR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                RXERRCNT_FASTR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Transmit Error Counter"]
            #[inline(always)]
            pub fn txerrcnt(&mut self) -> _TXERRCNTW {
                _TXERRCNTW { w: self }
            }
            #[doc = "Bits 8:15 - Receive Error Counter"]
            #[inline(always)]
            pub fn rxerrcnt(&mut self) -> _RXERRCNTW {
                _RXERRCNTW { w: self }
            }
            #[doc = "Bits 16:23 - Transmit Error Counter for fast bits"]
            #[inline(always)]
            pub fn txerrcnt_fast(&mut self) -> _TXERRCNT_FASTW {
                _TXERRCNT_FASTW { w: self }
            }
            #[doc = "Bits 24:31 - Receive Error Counter for fast bits"]
            #[inline(always)]
            pub fn rxerrcnt_fast(&mut self) -> _RXERRCNT_FASTW {
                _RXERRCNT_FASTW { w: self }
            }
        }
    }
    #[doc = "Error and Status 1 register"]
    pub struct ESR1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Error and Status 1 register"]
    pub mod esr1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::ESR1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `ERRINT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERRINTR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "Indicates setting of any Error Bit in the Error and Status Register."]
            _1,
        }
        impl ERRINTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERRINTR::_0 => false,
                    ERRINTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERRINTR {
                match value {
                    false => ERRINTR::_0,
                    true => ERRINTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERRINTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERRINTR::_1
            }
        }
        #[doc = "Possible values of the field `BOFFINT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BOFFINTR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "FlexCAN module entered Bus Off state."]
            _1,
        }
        impl BOFFINTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BOFFINTR::_0 => false,
                    BOFFINTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BOFFINTR {
                match value {
                    false => BOFFINTR::_0,
                    true => BOFFINTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BOFFINTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BOFFINTR::_1
            }
        }
        #[doc = "Possible values of the field `RX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXR {
            #[doc = "FlexCAN is not receiving a message."]
            _0,
            #[doc = "FlexCAN is receiving a message."]
            _1,
        }
        impl RXR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXR::_0 => false,
                    RXR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXR {
                match value {
                    false => RXR::_0,
                    true => RXR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RXR::_1
            }
        }
        #[doc = "Possible values of the field `FLTCONF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FLTCONFR {
            #[doc = "Error Active"]
            _00,
            #[doc = "Error Passive"]
            _01,
            #[doc = "Bus Off"]
            _1X,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl FLTCONFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    FLTCONFR::_00 => 0,
                    FLTCONFR::_01 => 1,
                    FLTCONFR::_1X => 2,
                    FLTCONFR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> FLTCONFR {
                match value {
                    0 => FLTCONFR::_00,
                    1 => FLTCONFR::_01,
                    2 => FLTCONFR::_1X,
                    i => FLTCONFR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == FLTCONFR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == FLTCONFR::_01
            }
            #[doc = "Checks if the value of the field is `_1X`"]
            #[inline(always)]
            pub fn is_1x(&self) -> bool {
                *self == FLTCONFR::_1X
            }
        }
        #[doc = "Possible values of the field `TX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXR {
            #[doc = "FlexCAN is not transmitting a message."]
            _0,
            #[doc = "FlexCAN is transmitting a message."]
            _1,
        }
        impl TXR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXR::_0 => false,
                    TXR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXR {
                match value {
                    false => TXR::_0,
                    true => TXR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXR::_1
            }
        }
        #[doc = "Possible values of the field `IDLE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IDLER {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "CAN bus is now IDLE."]
            _1,
        }
        impl IDLER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    IDLER::_0 => false,
                    IDLER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> IDLER {
                match value {
                    false => IDLER::_0,
                    true => IDLER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == IDLER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == IDLER::_1
            }
        }
        #[doc = "Possible values of the field `RXWRN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXWRNR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "RXERRCNT is greater than or equal to 96."]
            _1,
        }
        impl RXWRNR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXWRNR::_0 => false,
                    RXWRNR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXWRNR {
                match value {
                    false => RXWRNR::_0,
                    true => RXWRNR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXWRNR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RXWRNR::_1
            }
        }
        #[doc = "Possible values of the field `TXWRN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXWRNR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "TXERRCNT is greater than or equal to 96."]
            _1,
        }
        impl TXWRNR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXWRNR::_0 => false,
                    TXWRNR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXWRNR {
                match value {
                    false => TXWRNR::_0,
                    true => TXWRNR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXWRNR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXWRNR::_1
            }
        }
        #[doc = "Possible values of the field `STFERR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum STFERRR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "A Stuffing Error occurred since last read of this register."]
            _1,
        }
        impl STFERRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    STFERRR::_0 => false,
                    STFERRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> STFERRR {
                match value {
                    false => STFERRR::_0,
                    true => STFERRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == STFERRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == STFERRR::_1
            }
        }
        #[doc = "Possible values of the field `FRMERR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FRMERRR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "A Form Error occurred since last read of this register."]
            _1,
        }
        impl FRMERRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FRMERRR::_0 => false,
                    FRMERRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FRMERRR {
                match value {
                    false => FRMERRR::_0,
                    true => FRMERRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FRMERRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FRMERRR::_1
            }
        }
        #[doc = "Possible values of the field `CRCERR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CRCERRR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "A CRC error occurred since last read of this register."]
            _1,
        }
        impl CRCERRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CRCERRR::_0 => false,
                    CRCERRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CRCERRR {
                match value {
                    false => CRCERRR::_0,
                    true => CRCERRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CRCERRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CRCERRR::_1
            }
        }
        #[doc = "Possible values of the field `ACKERR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ACKERRR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "An ACK error occurred since last read of this register."]
            _1,
        }
        impl ACKERRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ACKERRR::_0 => false,
                    ACKERRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ACKERRR {
                match value {
                    false => ACKERRR::_0,
                    true => ACKERRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ACKERRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ACKERRR::_1
            }
        }
        #[doc = "Possible values of the field `BIT0ERR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BIT0ERRR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "At least one bit sent as dominant is received as recessive."]
            _1,
        }
        impl BIT0ERRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BIT0ERRR::_0 => false,
                    BIT0ERRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BIT0ERRR {
                match value {
                    false => BIT0ERRR::_0,
                    true => BIT0ERRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BIT0ERRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BIT0ERRR::_1
            }
        }
        #[doc = "Possible values of the field `BIT1ERR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BIT1ERRR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "At least one bit sent as recessive is received as dominant."]
            _1,
        }
        impl BIT1ERRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BIT1ERRR::_0 => false,
                    BIT1ERRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BIT1ERRR {
                match value {
                    false => BIT1ERRR::_0,
                    true => BIT1ERRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BIT1ERRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BIT1ERRR::_1
            }
        }
        #[doc = "Possible values of the field `RWRNINT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RWRNINTR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "The Rx error counter transitioned from less than 96 to greater than or equal to 96."]
            _1,
        }
        impl RWRNINTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RWRNINTR::_0 => false,
                    RWRNINTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RWRNINTR {
                match value {
                    false => RWRNINTR::_0,
                    true => RWRNINTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RWRNINTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RWRNINTR::_1
            }
        }
        #[doc = "Possible values of the field `TWRNINT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TWRNINTR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "The Tx error counter transitioned from less than 96 to greater than or equal to 96."]
            _1,
        }
        impl TWRNINTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TWRNINTR::_0 => false,
                    TWRNINTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TWRNINTR {
                match value {
                    false => TWRNINTR::_0,
                    true => TWRNINTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TWRNINTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TWRNINTR::_1
            }
        }
        #[doc = "Possible values of the field `SYNCH`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SYNCHR {
            #[doc = "FlexCAN is not synchronized to the CAN bus."]
            _0,
            #[doc = "FlexCAN is synchronized to the CAN bus."]
            _1,
        }
        impl SYNCHR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SYNCHR::_0 => false,
                    SYNCHR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SYNCHR {
                match value {
                    false => SYNCHR::_0,
                    true => SYNCHR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SYNCHR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SYNCHR::_1
            }
        }
        #[doc = "Possible values of the field `BOFFDONEINT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BOFFDONEINTR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "FlexCAN module has completed Bus Off process."]
            _1,
        }
        impl BOFFDONEINTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BOFFDONEINTR::_0 => false,
                    BOFFDONEINTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BOFFDONEINTR {
                match value {
                    false => BOFFDONEINTR::_0,
                    true => BOFFDONEINTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BOFFDONEINTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BOFFDONEINTR::_1
            }
        }
        #[doc = "Possible values of the field `ERRINT_FAST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERRINT_FASTR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "Indicates setting of any Error Bit detected in the Data Phase of CAN FD frames with the BRS bit set."]
            _1,
        }
        impl ERRINT_FASTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERRINT_FASTR::_0 => false,
                    ERRINT_FASTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERRINT_FASTR {
                match value {
                    false => ERRINT_FASTR::_0,
                    true => ERRINT_FASTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERRINT_FASTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERRINT_FASTR::_1
            }
        }
        #[doc = "Possible values of the field `ERROVR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERROVRR {
            #[doc = "Overrun has not occurred."]
            _0,
            #[doc = "Overrun has occurred."]
            _1,
        }
        impl ERROVRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERROVRR::_0 => false,
                    ERROVRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERROVRR {
                match value {
                    false => ERROVRR::_0,
                    true => ERROVRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERROVRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERROVRR::_1
            }
        }
        #[doc = "Possible values of the field `STFERR_FAST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum STFERR_FASTR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "A Stuffing Error occurred since last read of this register."]
            _1,
        }
        impl STFERR_FASTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    STFERR_FASTR::_0 => false,
                    STFERR_FASTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> STFERR_FASTR {
                match value {
                    false => STFERR_FASTR::_0,
                    true => STFERR_FASTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == STFERR_FASTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == STFERR_FASTR::_1
            }
        }
        #[doc = "Possible values of the field `FRMERR_FAST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FRMERR_FASTR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "A Form Error occurred since last read of this register."]
            _1,
        }
        impl FRMERR_FASTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FRMERR_FASTR::_0 => false,
                    FRMERR_FASTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FRMERR_FASTR {
                match value {
                    false => FRMERR_FASTR::_0,
                    true => FRMERR_FASTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FRMERR_FASTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FRMERR_FASTR::_1
            }
        }
        #[doc = "Possible values of the field `CRCERR_FAST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CRCERR_FASTR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "A CRC error occurred since last read of this register."]
            _1,
        }
        impl CRCERR_FASTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CRCERR_FASTR::_0 => false,
                    CRCERR_FASTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CRCERR_FASTR {
                match value {
                    false => CRCERR_FASTR::_0,
                    true => CRCERR_FASTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CRCERR_FASTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CRCERR_FASTR::_1
            }
        }
        #[doc = "Possible values of the field `BIT0ERR_FAST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BIT0ERR_FASTR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "At least one bit sent as dominant is received as recessive."]
            _1,
        }
        impl BIT0ERR_FASTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BIT0ERR_FASTR::_0 => false,
                    BIT0ERR_FASTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BIT0ERR_FASTR {
                match value {
                    false => BIT0ERR_FASTR::_0,
                    true => BIT0ERR_FASTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BIT0ERR_FASTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BIT0ERR_FASTR::_1
            }
        }
        #[doc = "Possible values of the field `BIT1ERR_FAST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BIT1ERR_FASTR {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "At least one bit sent as recessive is received as dominant."]
            _1,
        }
        impl BIT1ERR_FASTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BIT1ERR_FASTR::_0 => false,
                    BIT1ERR_FASTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BIT1ERR_FASTR {
                match value {
                    false => BIT1ERR_FASTR::_0,
                    true => BIT1ERR_FASTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BIT1ERR_FASTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BIT1ERR_FASTR::_1
            }
        }
        #[doc = "Values that can be written to the field `ERRINT`"]
        pub enum ERRINTW {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "Indicates setting of any Error Bit in the Error and Status Register."]
            _1,
        }
        impl ERRINTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERRINTW::_0 => false,
                    ERRINTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERRINTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERRINTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERRINTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No such occurrence."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERRINTW::_0)
            }
            #[doc = "Indicates setting of any Error Bit in the Error and Status Register."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERRINTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BOFFINT`"]
        pub enum BOFFINTW {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "FlexCAN module entered Bus Off state."]
            _1,
        }
        impl BOFFINTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    BOFFINTW::_0 => false,
                    BOFFINTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BOFFINTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BOFFINTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BOFFINTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No such occurrence."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BOFFINTW::_0)
            }
            #[doc = "FlexCAN module entered Bus Off state."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BOFFINTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RWRNINT`"]
        pub enum RWRNINTW {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "The Rx error counter transitioned from less than 96 to greater than or equal to 96."]
            _1,
        }
        impl RWRNINTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RWRNINTW::_0 => false,
                    RWRNINTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RWRNINTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RWRNINTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RWRNINTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No such occurrence."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RWRNINTW::_0)
            }
            #[doc = "The Rx error counter transitioned from less than 96 to greater than or equal to 96."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RWRNINTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TWRNINT`"]
        pub enum TWRNINTW {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "The Tx error counter transitioned from less than 96 to greater than or equal to 96."]
            _1,
        }
        impl TWRNINTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TWRNINTW::_0 => false,
                    TWRNINTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TWRNINTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TWRNINTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TWRNINTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No such occurrence."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TWRNINTW::_0)
            }
            #[doc = "The Tx error counter transitioned from less than 96 to greater than or equal to 96."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TWRNINTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BOFFDONEINT`"]
        pub enum BOFFDONEINTW {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "FlexCAN module has completed Bus Off process."]
            _1,
        }
        impl BOFFDONEINTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    BOFFDONEINTW::_0 => false,
                    BOFFDONEINTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BOFFDONEINTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BOFFDONEINTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BOFFDONEINTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No such occurrence."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BOFFDONEINTW::_0)
            }
            #[doc = "FlexCAN module has completed Bus Off process."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BOFFDONEINTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 19;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ERRINT_FAST`"]
        pub enum ERRINT_FASTW {
            #[doc = "No such occurrence."]
            _0,
            #[doc = "Indicates setting of any Error Bit detected in the Data Phase of CAN FD frames with the BRS bit set."]
            _1,
        }
        impl ERRINT_FASTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERRINT_FASTW::_0 => false,
                    ERRINT_FASTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERRINT_FASTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERRINT_FASTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERRINT_FASTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No such occurrence."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERRINT_FASTW::_0)
            }
            #[doc = "Indicates setting of any Error Bit detected in the Data Phase of CAN FD frames with the BRS bit set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERRINT_FASTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ERROVR`"]
        pub enum ERROVRW {
            #[doc = "Overrun has not occurred."]
            _0,
            #[doc = "Overrun has occurred."]
            _1,
        }
        impl ERROVRW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERROVRW::_0 => false,
                    ERROVRW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERROVRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERROVRW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERROVRW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Overrun has not occurred."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERROVRW::_0)
            }
            #[doc = "Overrun has occurred."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERROVRW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 21;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 1 - Error Interrupt"]
            #[inline(always)]
            pub fn errint(&self) -> ERRINTR {
                ERRINTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Bus Off Interrupt"]
            #[inline(always)]
            pub fn boffint(&self) -> BOFFINTR {
                BOFFINTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - FlexCAN In Reception"]
            #[inline(always)]
            pub fn rx(&self) -> RXR {
                RXR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 4:5 - Fault Confinement State"]
            #[inline(always)]
            pub fn fltconf(&self) -> FLTCONFR {
                FLTCONFR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 6 - FlexCAN In Transmission"]
            #[inline(always)]
            pub fn tx(&self) -> TXR {
                TXR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - IDLE"]
            #[inline(always)]
            pub fn idle(&self) -> IDLER {
                IDLER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Rx Error Warning"]
            #[inline(always)]
            pub fn rxwrn(&self) -> RXWRNR {
                RXWRNR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - TX Error Warning"]
            #[inline(always)]
            pub fn txwrn(&self) -> TXWRNR {
                TXWRNR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Stuffing Error"]
            #[inline(always)]
            pub fn stferr(&self) -> STFERRR {
                STFERRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 11 - Form Error"]
            #[inline(always)]
            pub fn frmerr(&self) -> FRMERRR {
                FRMERRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Cyclic Redundancy Check Error"]
            #[inline(always)]
            pub fn crcerr(&self) -> CRCERRR {
                CRCERRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Acknowledge Error"]
            #[inline(always)]
            pub fn ackerr(&self) -> ACKERRR {
                ACKERRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - Bit0 Error"]
            #[inline(always)]
            pub fn bit0err(&self) -> BIT0ERRR {
                BIT0ERRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - Bit1 Error"]
            #[inline(always)]
            pub fn bit1err(&self) -> BIT1ERRR {
                BIT1ERRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 16 - Rx Warning Interrupt Flag"]
            #[inline(always)]
            pub fn rwrnint(&self) -> RWRNINTR {
                RWRNINTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - Tx Warning Interrupt Flag"]
            #[inline(always)]
            pub fn twrnint(&self) -> TWRNINTR {
                TWRNINTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 18 - CAN Synchronization Status"]
            #[inline(always)]
            pub fn synch(&self) -> SYNCHR {
                SYNCHR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 19 - Bus Off Done Interrupt"]
            #[inline(always)]
            pub fn boffdoneint(&self) -> BOFFDONEINTR {
                BOFFDONEINTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 19;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 20 - Error Interrupt for errors detected in the Data Phase of CAN FD frames with the BRS bit set"]
            #[inline(always)]
            pub fn errint_fast(&self) -> ERRINT_FASTR {
                ERRINT_FASTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - Error Overrun bit"]
            #[inline(always)]
            pub fn errovr(&self) -> ERROVRR {
                ERROVRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 26 - Stuffing Error in the Data Phase of CAN FD frames with the BRS bit set"]
            #[inline(always)]
            pub fn stferr_fast(&self) -> STFERR_FASTR {
                STFERR_FASTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 26;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 27 - Form Error in the Data Phase of CAN FD frames with the BRS bit set"]
            #[inline(always)]
            pub fn frmerr_fast(&self) -> FRMERR_FASTR {
                FRMERR_FASTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 27;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 28 - Cyclic Redundancy Check Error in the CRC field of CAN FD frames with the BRS bit set"]
            #[inline(always)]
            pub fn crcerr_fast(&self) -> CRCERR_FASTR {
                CRCERR_FASTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 28;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 30 - Bit0 Error in the Data Phase of CAN FD frames with the BRS bit set"]
            #[inline(always)]
            pub fn bit0err_fast(&self) -> BIT0ERR_FASTR {
                BIT0ERR_FASTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Bit1 Error in the Data Phase of CAN FD frames with the BRS bit set"]
            #[inline(always)]
            pub fn bit1err_fast(&self) -> BIT1ERR_FASTR {
                BIT1ERR_FASTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 1 - Error Interrupt"]
            #[inline(always)]
            pub fn errint(&mut self) -> _ERRINTW {
                _ERRINTW { w: self }
            }
            #[doc = "Bit 2 - Bus Off Interrupt"]
            #[inline(always)]
            pub fn boffint(&mut self) -> _BOFFINTW {
                _BOFFINTW { w: self }
            }
            #[doc = "Bit 16 - Rx Warning Interrupt Flag"]
            #[inline(always)]
            pub fn rwrnint(&mut self) -> _RWRNINTW {
                _RWRNINTW { w: self }
            }
            #[doc = "Bit 17 - Tx Warning Interrupt Flag"]
            #[inline(always)]
            pub fn twrnint(&mut self) -> _TWRNINTW {
                _TWRNINTW { w: self }
            }
            #[doc = "Bit 19 - Bus Off Done Interrupt"]
            #[inline(always)]
            pub fn boffdoneint(&mut self) -> _BOFFDONEINTW {
                _BOFFDONEINTW { w: self }
            }
            #[doc = "Bit 20 - Error Interrupt for errors detected in the Data Phase of CAN FD frames with the BRS bit set"]
            #[inline(always)]
            pub fn errint_fast(&mut self) -> _ERRINT_FASTW {
                _ERRINT_FASTW { w: self }
            }
            #[doc = "Bit 21 - Error Overrun bit"]
            #[inline(always)]
            pub fn errovr(&mut self) -> _ERROVRW {
                _ERROVRW { w: self }
            }
        }
    }
    #[doc = "Interrupt Masks 1 register"]
    pub struct IMASK1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Interrupt Masks 1 register"]
    pub mod imask1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::IMASK1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BUF31TO0MR {
            bits: u32,
        }
        impl BUF31TO0MR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _BUF31TO0MW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BUF31TO0MW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Buffer MB i Mask"]
            #[inline(always)]
            pub fn buf31to0m(&self) -> BUF31TO0MR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                BUF31TO0MR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Buffer MB i Mask"]
            #[inline(always)]
            pub fn buf31to0m(&mut self) -> _BUF31TO0MW {
                _BUF31TO0MW { w: self }
            }
        }
    }
    #[doc = "Interrupt Flags 1 register"]
    pub struct IFLAG1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Interrupt Flags 1 register"]
    pub mod iflag1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::IFLAG1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `BUF0I`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BUF0IR {
            #[doc = "The corresponding buffer has no occurrence of successfully completed transmission or reception when MCR[RFEN]=0."]
            _0,
            #[doc = "The corresponding buffer has successfully completed transmission or reception when MCR[RFEN]=0."]
            _1,
        }
        impl BUF0IR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BUF0IR::_0 => false,
                    BUF0IR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BUF0IR {
                match value {
                    false => BUF0IR::_0,
                    true => BUF0IR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BUF0IR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BUF0IR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct BUF4TO1IR {
            bits: u8,
        }
        impl BUF4TO1IR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `BUF5I`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BUF5IR {
            #[doc = "No occurrence of MB5 completing transmission/reception when MCR[RFEN]=0, or of frame(s) available in the FIFO, when MCR[RFEN]=1"]
            _0,
            #[doc = "MB5 completed transmission/reception when MCR[RFEN]=0, or frame(s) available in the Rx FIFO when MCR[RFEN]=1. It generates a DMA request in case of MCR[RFEN] and MCR[DMA] are enabled."]
            _1,
        }
        impl BUF5IR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BUF5IR::_0 => false,
                    BUF5IR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BUF5IR {
                match value {
                    false => BUF5IR::_0,
                    true => BUF5IR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BUF5IR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BUF5IR::_1
            }
        }
        #[doc = "Possible values of the field `BUF6I`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BUF6IR {
            #[doc = "No occurrence of MB6 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO almost full when MCR[RFEN]=1"]
            _0,
            #[doc = "MB6 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO almost full when MCR[RFEN]=1"]
            _1,
        }
        impl BUF6IR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BUF6IR::_0 => false,
                    BUF6IR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BUF6IR {
                match value {
                    false => BUF6IR::_0,
                    true => BUF6IR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BUF6IR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BUF6IR::_1
            }
        }
        #[doc = "Possible values of the field `BUF7I`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BUF7IR {
            #[doc = "No occurrence of MB7 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO overflow when MCR[RFEN]=1"]
            _0,
            #[doc = "MB7 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO overflow when MCR[RFEN]=1"]
            _1,
        }
        impl BUF7IR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BUF7IR::_0 => false,
                    BUF7IR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BUF7IR {
                match value {
                    false => BUF7IR::_0,
                    true => BUF7IR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BUF7IR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BUF7IR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct BUF31TO8IR {
            bits: u32,
        }
        impl BUF31TO8IR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = "Values that can be written to the field `BUF0I`"]
        pub enum BUF0IW {
            #[doc = "The corresponding buffer has no occurrence of successfully completed transmission or reception when MCR[RFEN]=0."]
            _0,
            #[doc = "The corresponding buffer has successfully completed transmission or reception when MCR[RFEN]=0."]
            _1,
        }
        impl BUF0IW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    BUF0IW::_0 => false,
                    BUF0IW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BUF0IW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BUF0IW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BUF0IW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The corresponding buffer has no occurrence of successfully completed transmission or reception when MCR[RFEN]=0."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BUF0IW::_0)
            }
            #[doc = "The corresponding buffer has successfully completed transmission or reception when MCR[RFEN]=0."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BUF0IW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BUF4TO1IW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BUF4TO1IW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BUF5I`"]
        pub enum BUF5IW {
            #[doc = "No occurrence of MB5 completing transmission/reception when MCR[RFEN]=0, or of frame(s) available in the FIFO, when MCR[RFEN]=1"]
            _0,
            #[doc = "MB5 completed transmission/reception when MCR[RFEN]=0, or frame(s) available in the Rx FIFO when MCR[RFEN]=1. It generates a DMA request in case of MCR[RFEN] and MCR[DMA] are enabled."]
            _1,
        }
        impl BUF5IW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    BUF5IW::_0 => false,
                    BUF5IW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BUF5IW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BUF5IW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BUF5IW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No occurrence of MB5 completing transmission/reception when MCR[RFEN]=0, or of frame(s) available in the FIFO, when MCR[RFEN]=1"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BUF5IW::_0)
            }
            #[doc = "MB5 completed transmission/reception when MCR[RFEN]=0, or frame(s) available in the Rx FIFO when MCR[RFEN]=1. It generates a DMA request in case of MCR[RFEN] and MCR[DMA] are enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BUF5IW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BUF6I`"]
        pub enum BUF6IW {
            #[doc = "No occurrence of MB6 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO almost full when MCR[RFEN]=1"]
            _0,
            #[doc = "MB6 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO almost full when MCR[RFEN]=1"]
            _1,
        }
        impl BUF6IW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    BUF6IW::_0 => false,
                    BUF6IW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BUF6IW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BUF6IW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BUF6IW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No occurrence of MB6 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO almost full when MCR[RFEN]=1"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BUF6IW::_0)
            }
            #[doc = "MB6 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO almost full when MCR[RFEN]=1"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BUF6IW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BUF7I`"]
        pub enum BUF7IW {
            #[doc = "No occurrence of MB7 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO overflow when MCR[RFEN]=1"]
            _0,
            #[doc = "MB7 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO overflow when MCR[RFEN]=1"]
            _1,
        }
        impl BUF7IW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    BUF7IW::_0 => false,
                    BUF7IW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BUF7IW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BUF7IW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BUF7IW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No occurrence of MB7 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO overflow when MCR[RFEN]=1"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BUF7IW::_0)
            }
            #[doc = "MB7 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO overflow when MCR[RFEN]=1"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BUF7IW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BUF31TO8IW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BUF31TO8IW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 16777215;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Buffer MB0 Interrupt Or Clear FIFO bit"]
            #[inline(always)]
            pub fn buf0i(&self) -> BUF0IR {
                BUF0IR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 1:4 - Buffer MB i Interrupt Or \"reserved\""]
            #[inline(always)]
            pub fn buf4to1i(&self) -> BUF4TO1IR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BUF4TO1IR { bits }
            }
            #[doc = "Bit 5 - Buffer MB5 Interrupt Or \"Frames available in Rx FIFO\""]
            #[inline(always)]
            pub fn buf5i(&self) -> BUF5IR {
                BUF5IR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Buffer MB6 Interrupt Or \"Rx FIFO Warning\""]
            #[inline(always)]
            pub fn buf6i(&self) -> BUF6IR {
                BUF6IR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Buffer MB7 Interrupt Or \"Rx FIFO Overflow\""]
            #[inline(always)]
            pub fn buf7i(&self) -> BUF7IR {
                BUF7IR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:31 - Buffer MBi Interrupt"]
            #[inline(always)]
            pub fn buf31to8i(&self) -> BUF31TO8IR {
                let bits = {
                    const MASK: u32 = 16777215;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                BUF31TO8IR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Buffer MB0 Interrupt Or Clear FIFO bit"]
            #[inline(always)]
            pub fn buf0i(&mut self) -> _BUF0IW {
                _BUF0IW { w: self }
            }
            #[doc = "Bits 1:4 - Buffer MB i Interrupt Or \"reserved\""]
            #[inline(always)]
            pub fn buf4to1i(&mut self) -> _BUF4TO1IW {
                _BUF4TO1IW { w: self }
            }
            #[doc = "Bit 5 - Buffer MB5 Interrupt Or \"Frames available in Rx FIFO\""]
            #[inline(always)]
            pub fn buf5i(&mut self) -> _BUF5IW {
                _BUF5IW { w: self }
            }
            #[doc = "Bit 6 - Buffer MB6 Interrupt Or \"Rx FIFO Warning\""]
            #[inline(always)]
            pub fn buf6i(&mut self) -> _BUF6IW {
                _BUF6IW { w: self }
            }
            #[doc = "Bit 7 - Buffer MB7 Interrupt Or \"Rx FIFO Overflow\""]
            #[inline(always)]
            pub fn buf7i(&mut self) -> _BUF7IW {
                _BUF7IW { w: self }
            }
            #[doc = "Bits 8:31 - Buffer MBi Interrupt"]
            #[inline(always)]
            pub fn buf31to8i(&mut self) -> _BUF31TO8IW {
                _BUF31TO8IW { w: self }
            }
        }
    }
    #[doc = "Control 2 register"]
    pub struct CTRL2 {
        register: VolatileCell<u32>,
    }
    #[doc = "Control 2 register"]
    pub mod ctrl2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CTRL2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `EDFLTDIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EDFLTDISR {
            #[doc = "Edge Filter is enabled."]
            _0,
            #[doc = "Edge Filter is disabled."]
            _1,
        }
        impl EDFLTDISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EDFLTDISR::_0 => false,
                    EDFLTDISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EDFLTDISR {
                match value {
                    false => EDFLTDISR::_0,
                    true => EDFLTDISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EDFLTDISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EDFLTDISR::_1
            }
        }
        #[doc = "Possible values of the field `ISOCANFDEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISOCANFDENR {
            #[doc = "FlexCAN operates using the non-ISO CAN FD protocol."]
            _0,
            #[doc = "FlexCAN operates using the ISO CAN FD protocol (ISO 11898-1)."]
            _1,
        }
        impl ISOCANFDENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISOCANFDENR::_0 => false,
                    ISOCANFDENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISOCANFDENR {
                match value {
                    false => ISOCANFDENR::_0,
                    true => ISOCANFDENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISOCANFDENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISOCANFDENR::_1
            }
        }
        #[doc = "Possible values of the field `PREXCEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PREXCENR {
            #[doc = "Protocol Exception is disabled."]
            _0,
            #[doc = "Protocol Exception is enabled."]
            _1,
        }
        impl PREXCENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PREXCENR::_0 => false,
                    PREXCENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PREXCENR {
                match value {
                    false => PREXCENR::_0,
                    true => PREXCENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PREXCENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PREXCENR::_1
            }
        }
        #[doc = "Possible values of the field `TIMER_SRC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIMER_SRCR {
            #[doc = "The Free Running Timer is clocked by the CAN bit clock, which defines the baud rate on the CAN bus."]
            _0,
            #[doc = "The Free Running Timer is clocked by an external time tick. The period can be either adjusted to be equal to the baud rate on the CAN bus, or a different value as required. See the device specific section for details about the external time tick."]
            _1,
        }
        impl TIMER_SRCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TIMER_SRCR::_0 => false,
                    TIMER_SRCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TIMER_SRCR {
                match value {
                    false => TIMER_SRCR::_0,
                    true => TIMER_SRCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIMER_SRCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TIMER_SRCR::_1
            }
        }
        #[doc = "Possible values of the field `EACEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EACENR {
            #[doc = "Rx Mailbox filter's IDE bit is always compared and RTR is never compared despite mask bits."]
            _0,
            #[doc = "Enables the comparison of both Rx Mailbox filter's IDE and RTR bit with their corresponding bits within the incoming frame. Mask bits do apply."]
            _1,
        }
        impl EACENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EACENR::_0 => false,
                    EACENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EACENR {
                match value {
                    false => EACENR::_0,
                    true => EACENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EACENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EACENR::_1
            }
        }
        #[doc = "Possible values of the field `RRS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RRSR {
            #[doc = "Remote Response Frame is generated."]
            _0,
            #[doc = "Remote Request Frame is stored."]
            _1,
        }
        impl RRSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RRSR::_0 => false,
                    RRSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RRSR {
                match value {
                    false => RRSR::_0,
                    true => RRSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RRSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RRSR::_1
            }
        }
        #[doc = "Possible values of the field `MRP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MRPR {
            #[doc = "Matching starts from Rx FIFO and continues on Mailboxes."]
            _0,
            #[doc = "Matching starts from Mailboxes and continues on Rx FIFO."]
            _1,
        }
        impl MRPR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MRPR::_0 => false,
                    MRPR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MRPR {
                match value {
                    false => MRPR::_0,
                    true => MRPR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MRPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MRPR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct TASDR {
            bits: u8,
        }
        impl TASDR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct RFFNR {
            bits: u8,
        }
        impl RFFNR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `BOFFDONEMSK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BOFFDONEMSKR {
            #[doc = "Bus Off Done interrupt disabled."]
            _0,
            #[doc = "Bus Off Done interrupt enabled."]
            _1,
        }
        impl BOFFDONEMSKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BOFFDONEMSKR::_0 => false,
                    BOFFDONEMSKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BOFFDONEMSKR {
                match value {
                    false => BOFFDONEMSKR::_0,
                    true => BOFFDONEMSKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BOFFDONEMSKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BOFFDONEMSKR::_1
            }
        }
        #[doc = "Possible values of the field `ERRMSK_FAST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERRMSK_FASTR {
            #[doc = "ERRINT_FAST Error interrupt disabled."]
            _0,
            #[doc = "ERRINT_FAST Error interrupt enabled."]
            _1,
        }
        impl ERRMSK_FASTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERRMSK_FASTR::_0 => false,
                    ERRMSK_FASTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERRMSK_FASTR {
                match value {
                    false => ERRMSK_FASTR::_0,
                    true => ERRMSK_FASTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERRMSK_FASTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERRMSK_FASTR::_1
            }
        }
        #[doc = "Values that can be written to the field `EDFLTDIS`"]
        pub enum EDFLTDISW {
            #[doc = "Edge Filter is enabled."]
            _0,
            #[doc = "Edge Filter is disabled."]
            _1,
        }
        impl EDFLTDISW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EDFLTDISW::_0 => false,
                    EDFLTDISW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EDFLTDISW<'a> {
            w: &'a mut W,
        }
        impl<'a> _EDFLTDISW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EDFLTDISW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Edge Filter is enabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EDFLTDISW::_0)
            }
            #[doc = "Edge Filter is disabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EDFLTDISW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISOCANFDEN`"]
        pub enum ISOCANFDENW {
            #[doc = "FlexCAN operates using the non-ISO CAN FD protocol."]
            _0,
            #[doc = "FlexCAN operates using the ISO CAN FD protocol (ISO 11898-1)."]
            _1,
        }
        impl ISOCANFDENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISOCANFDENW::_0 => false,
                    ISOCANFDENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISOCANFDENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISOCANFDENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISOCANFDENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FlexCAN operates using the non-ISO CAN FD protocol."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISOCANFDENW::_0)
            }
            #[doc = "FlexCAN operates using the ISO CAN FD protocol (ISO 11898-1)."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISOCANFDENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PREXCEN`"]
        pub enum PREXCENW {
            #[doc = "Protocol Exception is disabled."]
            _0,
            #[doc = "Protocol Exception is enabled."]
            _1,
        }
        impl PREXCENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PREXCENW::_0 => false,
                    PREXCENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PREXCENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PREXCENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PREXCENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Protocol Exception is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PREXCENW::_0)
            }
            #[doc = "Protocol Exception is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PREXCENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TIMER_SRC`"]
        pub enum TIMER_SRCW {
            #[doc = "The Free Running Timer is clocked by the CAN bit clock, which defines the baud rate on the CAN bus."]
            _0,
            #[doc = "The Free Running Timer is clocked by an external time tick. The period can be either adjusted to be equal to the baud rate on the CAN bus, or a different value as required. See the device specific section for details about the external time tick."]
            _1,
        }
        impl TIMER_SRCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TIMER_SRCW::_0 => false,
                    TIMER_SRCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIMER_SRCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIMER_SRCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIMER_SRCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The Free Running Timer is clocked by the CAN bit clock, which defines the baud rate on the CAN bus."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIMER_SRCW::_0)
            }
            #[doc = "The Free Running Timer is clocked by an external time tick. The period can be either adjusted to be equal to the baud rate on the CAN bus, or a different value as required. See the device specific section for details about the external time tick."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TIMER_SRCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `EACEN`"]
        pub enum EACENW {
            #[doc = "Rx Mailbox filter's IDE bit is always compared and RTR is never compared despite mask bits."]
            _0,
            #[doc = "Enables the comparison of both Rx Mailbox filter's IDE and RTR bit with their corresponding bits within the incoming frame. Mask bits do apply."]
            _1,
        }
        impl EACENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EACENW::_0 => false,
                    EACENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EACENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _EACENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EACENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Rx Mailbox filter's IDE bit is always compared and RTR is never compared despite mask bits."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EACENW::_0)
            }
            #[doc = "Enables the comparison of both Rx Mailbox filter's IDE and RTR bit with their corresponding bits within the incoming frame. Mask bits do apply."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EACENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RRS`"]
        pub enum RRSW {
            #[doc = "Remote Response Frame is generated."]
            _0,
            #[doc = "Remote Request Frame is stored."]
            _1,
        }
        impl RRSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RRSW::_0 => false,
                    RRSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RRSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RRSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RRSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Remote Response Frame is generated."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RRSW::_0)
            }
            #[doc = "Remote Request Frame is stored."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RRSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MRP`"]
        pub enum MRPW {
            #[doc = "Matching starts from Rx FIFO and continues on Mailboxes."]
            _0,
            #[doc = "Matching starts from Mailboxes and continues on Rx FIFO."]
            _1,
        }
        impl MRPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MRPW::_0 => false,
                    MRPW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MRPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MRPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MRPW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Matching starts from Rx FIFO and continues on Mailboxes."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MRPW::_0)
            }
            #[doc = "Matching starts from Mailboxes and continues on Rx FIFO."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MRPW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _TASDW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TASDW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 19;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _RFFNW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RFFNW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BOFFDONEMSK`"]
        pub enum BOFFDONEMSKW {
            #[doc = "Bus Off Done interrupt disabled."]
            _0,
            #[doc = "Bus Off Done interrupt enabled."]
            _1,
        }
        impl BOFFDONEMSKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    BOFFDONEMSKW::_0 => false,
                    BOFFDONEMSKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BOFFDONEMSKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BOFFDONEMSKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BOFFDONEMSKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Bus Off Done interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BOFFDONEMSKW::_0)
            }
            #[doc = "Bus Off Done interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BOFFDONEMSKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ERRMSK_FAST`"]
        pub enum ERRMSK_FASTW {
            #[doc = "ERRINT_FAST Error interrupt disabled."]
            _0,
            #[doc = "ERRINT_FAST Error interrupt enabled."]
            _1,
        }
        impl ERRMSK_FASTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERRMSK_FASTW::_0 => false,
                    ERRMSK_FASTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERRMSK_FASTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERRMSK_FASTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERRMSK_FASTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "ERRINT_FAST Error interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERRMSK_FASTW::_0)
            }
            #[doc = "ERRINT_FAST Error interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERRMSK_FASTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 11 - Edge Filter Disable"]
            #[inline(always)]
            pub fn edfltdis(&self) -> EDFLTDISR {
                EDFLTDISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - ISO CAN FD Enable"]
            #[inline(always)]
            pub fn isocanfden(&self) -> ISOCANFDENR {
                ISOCANFDENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - Protocol Exception Enable"]
            #[inline(always)]
            pub fn prexcen(&self) -> PREXCENR {
                PREXCENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - Timer Source"]
            #[inline(always)]
            pub fn timer_src(&self) -> TIMER_SRCR {
                TIMER_SRCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 16 - Entire Frame Arbitration Field Comparison Enable For Rx Mailboxes"]
            #[inline(always)]
            pub fn eacen(&self) -> EACENR {
                EACENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - Remote Request Storing"]
            #[inline(always)]
            pub fn rrs(&self) -> RRSR {
                RRSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 18 - Mailboxes Reception Priority"]
            #[inline(always)]
            pub fn mrp(&self) -> MRPR {
                MRPR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 19:23 - Tx Arbitration Start Delay"]
            #[inline(always)]
            pub fn tasd(&self) -> TASDR {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 19;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TASDR { bits }
            }
            #[doc = "Bits 24:27 - Number Of Rx FIFO Filters"]
            #[inline(always)]
            pub fn rffn(&self) -> RFFNR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                RFFNR { bits }
            }
            #[doc = "Bit 30 - Bus Off Done Interrupt Mask"]
            #[inline(always)]
            pub fn boffdonemsk(&self) -> BOFFDONEMSKR {
                BOFFDONEMSKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Error Interrupt Mask for errors detected in the Data Phase of fast CAN FD frames"]
            #[inline(always)]
            pub fn errmsk_fast(&self) -> ERRMSK_FASTR {
                ERRMSK_FASTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 10485760 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 11 - Edge Filter Disable"]
            #[inline(always)]
            pub fn edfltdis(&mut self) -> _EDFLTDISW {
                _EDFLTDISW { w: self }
            }
            #[doc = "Bit 12 - ISO CAN FD Enable"]
            #[inline(always)]
            pub fn isocanfden(&mut self) -> _ISOCANFDENW {
                _ISOCANFDENW { w: self }
            }
            #[doc = "Bit 14 - Protocol Exception Enable"]
            #[inline(always)]
            pub fn prexcen(&mut self) -> _PREXCENW {
                _PREXCENW { w: self }
            }
            #[doc = "Bit 15 - Timer Source"]
            #[inline(always)]
            pub fn timer_src(&mut self) -> _TIMER_SRCW {
                _TIMER_SRCW { w: self }
            }
            #[doc = "Bit 16 - Entire Frame Arbitration Field Comparison Enable For Rx Mailboxes"]
            #[inline(always)]
            pub fn eacen(&mut self) -> _EACENW {
                _EACENW { w: self }
            }
            #[doc = "Bit 17 - Remote Request Storing"]
            #[inline(always)]
            pub fn rrs(&mut self) -> _RRSW {
                _RRSW { w: self }
            }
            #[doc = "Bit 18 - Mailboxes Reception Priority"]
            #[inline(always)]
            pub fn mrp(&mut self) -> _MRPW {
                _MRPW { w: self }
            }
            #[doc = "Bits 19:23 - Tx Arbitration Start Delay"]
            #[inline(always)]
            pub fn tasd(&mut self) -> _TASDW {
                _TASDW { w: self }
            }
            #[doc = "Bits 24:27 - Number Of Rx FIFO Filters"]
            #[inline(always)]
            pub fn rffn(&mut self) -> _RFFNW {
                _RFFNW { w: self }
            }
            #[doc = "Bit 30 - Bus Off Done Interrupt Mask"]
            #[inline(always)]
            pub fn boffdonemsk(&mut self) -> _BOFFDONEMSKW {
                _BOFFDONEMSKW { w: self }
            }
            #[doc = "Bit 31 - Error Interrupt Mask for errors detected in the Data Phase of fast CAN FD frames"]
            #[inline(always)]
            pub fn errmsk_fast(&mut self) -> _ERRMSK_FASTW {
                _ERRMSK_FASTW { w: self }
            }
        }
    }
    #[doc = "Error and Status 2 register"]
    pub struct ESR2 {
        register: VolatileCell<u32>,
    }
    #[doc = "Error and Status 2 register"]
    pub mod esr2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::ESR2 {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = "Possible values of the field `IMB`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IMBR {
            #[doc = "If ESR2[VPS] is asserted, the ESR2[LPTM] is not an inactive Mailbox."]
            _0,
            #[doc = "If ESR2[VPS] is asserted, there is at least one inactive Mailbox. LPTM content is the number of the first one."]
            _1,
        }
        impl IMBR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    IMBR::_0 => false,
                    IMBR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> IMBR {
                match value {
                    false => IMBR::_0,
                    true => IMBR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == IMBR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == IMBR::_1
            }
        }
        #[doc = "Possible values of the field `VPS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum VPSR {
            #[doc = "Contents of IMB and LPTM are invalid."]
            _0,
            #[doc = "Contents of IMB and LPTM are valid."]
            _1,
        }
        impl VPSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    VPSR::_0 => false,
                    VPSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> VPSR {
                match value {
                    false => VPSR::_0,
                    true => VPSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == VPSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == VPSR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct LPTMR {
            bits: u8,
        }
        impl LPTMR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 13 - Inactive Mailbox"]
            #[inline(always)]
            pub fn imb(&self) -> IMBR {
                IMBR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - Valid Priority Status"]
            #[inline(always)]
            pub fn vps(&self) -> VPSR {
                VPSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:22 - Lowest Priority Tx Mailbox"]
            #[inline(always)]
            pub fn lptm(&self) -> LPTMR {
                let bits = {
                    const MASK: u8 = 127;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                LPTMR { bits }
            }
        }
    }
    #[doc = "CRC Register"]
    pub struct CRCR {
        register: VolatileCell<u32>,
    }
    #[doc = "CRC Register"]
    pub mod crcr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::CRCR {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct TXCRCR {
            bits: u16,
        }
        impl TXCRCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct MBCRCR {
            bits: u8,
        }
        impl MBCRCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:14 - Transmitted CRC value"]
            #[inline(always)]
            pub fn txcrc(&self) -> TXCRCR {
                let bits = {
                    const MASK: u16 = 32767;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                TXCRCR { bits }
            }
            #[doc = "Bits 16:22 - CRC Mailbox"]
            #[inline(always)]
            pub fn mbcrc(&self) -> MBCRCR {
                let bits = {
                    const MASK: u8 = 127;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                MBCRCR { bits }
            }
        }
    }
    #[doc = "Rx FIFO Global Mask register"]
    pub struct RXFGMASK {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx FIFO Global Mask register"]
    pub mod rxfgmask {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXFGMASK {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct FGMR {
            bits: u32,
        }
        impl FGMR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _FGMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FGMW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Rx FIFO Global Mask Bits"]
            #[inline(always)]
            pub fn fgm(&self) -> FGMR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                FGMR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Rx FIFO Global Mask Bits"]
            #[inline(always)]
            pub fn fgm(&mut self) -> _FGMW {
                _FGMW { w: self }
            }
        }
    }
    #[doc = "Rx FIFO Information Register"]
    pub struct RXFIR {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx FIFO Information Register"]
    pub mod rxfir {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::RXFIR {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct IDHITR {
            bits: u16,
        }
        impl IDHITR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:8 - Identifier Acceptance Filter Hit Indicator"]
            #[inline(always)]
            pub fn idhit(&self) -> IDHITR {
                let bits = {
                    const MASK: u16 = 511;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                IDHITR { bits }
            }
        }
    }
    #[doc = "CAN Bit Timing Register"]
    pub struct CBT {
        register: VolatileCell<u32>,
    }
    #[doc = "CAN Bit Timing Register"]
    pub mod cbt {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CBT {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct EPSEG2R {
            bits: u8,
        }
        impl EPSEG2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct EPSEG1R {
            bits: u8,
        }
        impl EPSEG1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct EPROPSEGR {
            bits: u8,
        }
        impl EPROPSEGR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct ERJWR {
            bits: u8,
        }
        impl ERJWR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct EPRESDIVR {
            bits: u16,
        }
        impl EPRESDIVR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `BTF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BTFR {
            #[doc = "Extended bit time definitions disabled."]
            _0,
            #[doc = "Extended bit time definitions enabled."]
            _1,
        }
        impl BTFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BTFR::_0 => false,
                    BTFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BTFR {
                match value {
                    false => BTFR::_0,
                    true => BTFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BTFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BTFR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _EPSEG2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _EPSEG2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _EPSEG1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _EPSEG1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _EPROPSEGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _EPROPSEGW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERJWW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERJWW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _EPRESDIVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _EPRESDIVW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 1023;
                const OFFSET: u8 = 21;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BTF`"]
        pub enum BTFW {
            #[doc = "Extended bit time definitions disabled."]
            _0,
            #[doc = "Extended bit time definitions enabled."]
            _1,
        }
        impl BTFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    BTFW::_0 => false,
                    BTFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BTFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BTFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BTFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Extended bit time definitions disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BTFW::_0)
            }
            #[doc = "Extended bit time definitions enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BTFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:4 - Extended Phase Segment 2"]
            #[inline(always)]
            pub fn epseg2(&self) -> EPSEG2R {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                EPSEG2R { bits }
            }
            #[doc = "Bits 5:9 - Extended Phase Segment 1"]
            #[inline(always)]
            pub fn epseg1(&self) -> EPSEG1R {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                EPSEG1R { bits }
            }
            #[doc = "Bits 10:15 - Extended Propagation Segment"]
            #[inline(always)]
            pub fn epropseg(&self) -> EPROPSEGR {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                EPROPSEGR { bits }
            }
            #[doc = "Bits 16:20 - Extended Resync Jump Width"]
            #[inline(always)]
            pub fn erjw(&self) -> ERJWR {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                ERJWR { bits }
            }
            #[doc = "Bits 21:30 - Extended Prescaler Division Factor"]
            #[inline(always)]
            pub fn epresdiv(&self) -> EPRESDIVR {
                let bits = {
                    const MASK: u16 = 1023;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                EPRESDIVR { bits }
            }
            #[doc = "Bit 31 - Bit Timing Format Enable"]
            #[inline(always)]
            pub fn btf(&self) -> BTFR {
                BTFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:4 - Extended Phase Segment 2"]
            #[inline(always)]
            pub fn epseg2(&mut self) -> _EPSEG2W {
                _EPSEG2W { w: self }
            }
            #[doc = "Bits 5:9 - Extended Phase Segment 1"]
            #[inline(always)]
            pub fn epseg1(&mut self) -> _EPSEG1W {
                _EPSEG1W { w: self }
            }
            #[doc = "Bits 10:15 - Extended Propagation Segment"]
            #[inline(always)]
            pub fn epropseg(&mut self) -> _EPROPSEGW {
                _EPROPSEGW { w: self }
            }
            #[doc = "Bits 16:20 - Extended Resync Jump Width"]
            #[inline(always)]
            pub fn erjw(&mut self) -> _ERJWW {
                _ERJWW { w: self }
            }
            #[doc = "Bits 21:30 - Extended Prescaler Division Factor"]
            #[inline(always)]
            pub fn epresdiv(&mut self) -> _EPRESDIVW {
                _EPRESDIVW { w: self }
            }
            #[doc = "Bit 31 - Bit Timing Format Enable"]
            #[inline(always)]
            pub fn btf(&mut self) -> _BTFW {
                _BTFW { w: self }
            }
        }
    }
    #[doc = "Embedded RAM"]
    pub struct EMBEDDEDRAM {
        register: VolatileCell<u32>,
    }
    #[doc = "Embedded RAM"]
    pub mod embedded_ram {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EMBEDDEDRAM {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_3R {
            bits: u8,
        }
        impl DATA_BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_2R {
            bits: u8,
        }
        impl DATA_BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_1R {
            bits: u8,
        }
        impl DATA_BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_0R {
            bits: u8,
        }
        impl DATA_BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn data_byte_3(&self) -> DATA_BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn data_byte_2(&self) -> DATA_BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn data_byte_1(&self) -> DATA_BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn data_byte_0(&self) -> DATA_BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
            #[inline(always)]
            pub fn data_byte_3(&mut self) -> _DATA_BYTE_3W {
                _DATA_BYTE_3W { w: self }
            }
            #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
            #[inline(always)]
            pub fn data_byte_2(&mut self) -> _DATA_BYTE_2W {
                _DATA_BYTE_2W { w: self }
            }
            #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
            #[inline(always)]
            pub fn data_byte_1(&mut self) -> _DATA_BYTE_1W {
                _DATA_BYTE_1W { w: self }
            }
            #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
            #[inline(always)]
            pub fn data_byte_0(&mut self) -> _DATA_BYTE_0W {
                _DATA_BYTE_0W { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR0 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR2 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR3 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr3 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR3 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR4 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr4 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR4 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR5 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr5 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR5 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR6 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr6 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR6 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR7 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr7 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR7 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR8 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr8 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR8 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR9 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr9 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR9 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR10 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr10 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR10 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR11 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr11 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR11 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR12 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr12 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR12 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR13 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr13 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR13 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR14 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr14 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR14 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Rx Individual Mask Registers"]
    pub struct RXIMR15 {
        register: VolatileCell<u32>,
    }
    #[doc = "Rx Individual Mask Registers"]
    pub mod rximr15 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RXIMR15 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MIR {
            bits: u32,
        }
        impl MIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&self) -> MIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MIR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Individual Mask Bits"]
            #[inline(always)]
            pub fn mi(&mut self) -> _MIW {
                _MIW { w: self }
            }
        }
    }
    #[doc = "Pretended Networking Control 1 Register"]
    pub struct CTRL1_PN {
        register: VolatileCell<u32>,
    }
    #[doc = "Pretended Networking Control 1 Register"]
    pub mod ctrl1_pn {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CTRL1_PN {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `FCS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FCSR {
            #[doc = "Message ID filtering only"]
            _00,
            #[doc = "Message ID filtering and payload filtering"]
            _01,
            #[doc = "Message ID filtering occurring a specified number of times."]
            _10,
            #[doc = "Message ID filtering and payload filtering a specified number of times"]
            _11,
        }
        impl FCSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    FCSR::_00 => 0,
                    FCSR::_01 => 1,
                    FCSR::_10 => 2,
                    FCSR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> FCSR {
                match value {
                    0 => FCSR::_00,
                    1 => FCSR::_01,
                    2 => FCSR::_10,
                    3 => FCSR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == FCSR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == FCSR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == FCSR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == FCSR::_11
            }
        }
        #[doc = "Possible values of the field `IDFS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IDFSR {
            #[doc = "Match upon a ID contents against an exact target value"]
            _00,
            #[doc = "Match upon a ID value greater than or equal to a specified target value"]
            _01,
            #[doc = "Match upon a ID value smaller than or equal to a specified target value"]
            _10,
            #[doc = "Match upon a ID value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"]
            _11,
        }
        impl IDFSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IDFSR::_00 => 0,
                    IDFSR::_01 => 1,
                    IDFSR::_10 => 2,
                    IDFSR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IDFSR {
                match value {
                    0 => IDFSR::_00,
                    1 => IDFSR::_01,
                    2 => IDFSR::_10,
                    3 => IDFSR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == IDFSR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == IDFSR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == IDFSR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == IDFSR::_11
            }
        }
        #[doc = "Possible values of the field `PLFS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PLFSR {
            #[doc = "Match upon a payload contents against an exact target value"]
            _00,
            #[doc = "Match upon a payload value greater than or equal to a specified target value"]
            _01,
            #[doc = "Match upon a payload value smaller than or equal to a specified target value"]
            _10,
            #[doc = "Match upon a payload value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"]
            _11,
        }
        impl PLFSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PLFSR::_00 => 0,
                    PLFSR::_01 => 1,
                    PLFSR::_10 => 2,
                    PLFSR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PLFSR {
                match value {
                    0 => PLFSR::_00,
                    1 => PLFSR::_01,
                    2 => PLFSR::_10,
                    3 => PLFSR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == PLFSR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == PLFSR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == PLFSR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == PLFSR::_11
            }
        }
        #[doc = "Possible values of the field `NMATCH`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum NMATCHR {
            #[doc = "Received message must match the predefined filtering criteria for ID and/or PL once before generating a wake up event."]
            _00000001,
            #[doc = "Received message must match the predefined filtering criteria for ID and/or PL twice before generating a wake up event."]
            _00000010,
            #[doc = "Received message must match the predefined filtering criteria for ID and/or PL 255 times before generating a wake up event."]
            _11111111,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl NMATCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    NMATCHR::_00000001 => 1,
                    NMATCHR::_00000010 => 2,
                    NMATCHR::_11111111 => 255,
                    NMATCHR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> NMATCHR {
                match value {
                    1 => NMATCHR::_00000001,
                    2 => NMATCHR::_00000010,
                    255 => NMATCHR::_11111111,
                    i => NMATCHR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_00000001`"]
            #[inline(always)]
            pub fn is_00000001(&self) -> bool {
                *self == NMATCHR::_00000001
            }
            #[doc = "Checks if the value of the field is `_00000010`"]
            #[inline(always)]
            pub fn is_00000010(&self) -> bool {
                *self == NMATCHR::_00000010
            }
            #[doc = "Checks if the value of the field is `_11111111`"]
            #[inline(always)]
            pub fn is_11111111(&self) -> bool {
                *self == NMATCHR::_11111111
            }
        }
        #[doc = "Possible values of the field `WUMF_MSK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WUMF_MSKR {
            #[doc = "Wake up match event is disabled"]
            _0,
            #[doc = "Wake up match event is enabled"]
            _1,
        }
        impl WUMF_MSKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WUMF_MSKR::_0 => false,
                    WUMF_MSKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WUMF_MSKR {
                match value {
                    false => WUMF_MSKR::_0,
                    true => WUMF_MSKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WUMF_MSKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WUMF_MSKR::_1
            }
        }
        #[doc = "Possible values of the field `WTOF_MSK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WTOF_MSKR {
            #[doc = "Timeout wake up event is disabled"]
            _0,
            #[doc = "Timeout wake up event is enabled"]
            _1,
        }
        impl WTOF_MSKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WTOF_MSKR::_0 => false,
                    WTOF_MSKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WTOF_MSKR {
                match value {
                    false => WTOF_MSKR::_0,
                    true => WTOF_MSKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WTOF_MSKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WTOF_MSKR::_1
            }
        }
        #[doc = "Values that can be written to the field `FCS`"]
        pub enum FCSW {
            #[doc = "Message ID filtering only"]
            _00,
            #[doc = "Message ID filtering and payload filtering"]
            _01,
            #[doc = "Message ID filtering occurring a specified number of times."]
            _10,
            #[doc = "Message ID filtering and payload filtering a specified number of times"]
            _11,
        }
        impl FCSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    FCSW::_00 => 0,
                    FCSW::_01 => 1,
                    FCSW::_10 => 2,
                    FCSW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FCSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FCSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FCSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Message ID filtering only"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(FCSW::_00)
            }
            #[doc = "Message ID filtering and payload filtering"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(FCSW::_01)
            }
            #[doc = "Message ID filtering occurring a specified number of times."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(FCSW::_10)
            }
            #[doc = "Message ID filtering and payload filtering a specified number of times"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(FCSW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IDFS`"]
        pub enum IDFSW {
            #[doc = "Match upon a ID contents against an exact target value"]
            _00,
            #[doc = "Match upon a ID value greater than or equal to a specified target value"]
            _01,
            #[doc = "Match upon a ID value smaller than or equal to a specified target value"]
            _10,
            #[doc = "Match upon a ID value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"]
            _11,
        }
        impl IDFSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IDFSW::_00 => 0,
                    IDFSW::_01 => 1,
                    IDFSW::_10 => 2,
                    IDFSW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IDFSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IDFSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IDFSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Match upon a ID contents against an exact target value"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(IDFSW::_00)
            }
            #[doc = "Match upon a ID value greater than or equal to a specified target value"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(IDFSW::_01)
            }
            #[doc = "Match upon a ID value smaller than or equal to a specified target value"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(IDFSW::_10)
            }
            #[doc = "Match upon a ID value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(IDFSW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PLFS`"]
        pub enum PLFSW {
            #[doc = "Match upon a payload contents against an exact target value"]
            _00,
            #[doc = "Match upon a payload value greater than or equal to a specified target value"]
            _01,
            #[doc = "Match upon a payload value smaller than or equal to a specified target value"]
            _10,
            #[doc = "Match upon a payload value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"]
            _11,
        }
        impl PLFSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PLFSW::_00 => 0,
                    PLFSW::_01 => 1,
                    PLFSW::_10 => 2,
                    PLFSW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PLFSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PLFSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PLFSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Match upon a payload contents against an exact target value"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(PLFSW::_00)
            }
            #[doc = "Match upon a payload value greater than or equal to a specified target value"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(PLFSW::_01)
            }
            #[doc = "Match upon a payload value smaller than or equal to a specified target value"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(PLFSW::_10)
            }
            #[doc = "Match upon a payload value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(PLFSW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `NMATCH`"]
        pub enum NMATCHW {
            #[doc = "Received message must match the predefined filtering criteria for ID and/or PL once before generating a wake up event."]
            _00000001,
            #[doc = "Received message must match the predefined filtering criteria for ID and/or PL twice before generating a wake up event."]
            _00000010,
            #[doc = "Received message must match the predefined filtering criteria for ID and/or PL 255 times before generating a wake up event."]
            _11111111,
        }
        impl NMATCHW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    NMATCHW::_00000001 => 1,
                    NMATCHW::_00000010 => 2,
                    NMATCHW::_11111111 => 255,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _NMATCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NMATCHW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: NMATCHW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Received message must match the predefined filtering criteria for ID and/or PL once before generating a wake up event."]
            #[inline(always)]
            pub fn _00000001(self) -> &'a mut W {
                self.variant(NMATCHW::_00000001)
            }
            #[doc = "Received message must match the predefined filtering criteria for ID and/or PL twice before generating a wake up event."]
            #[inline(always)]
            pub fn _00000010(self) -> &'a mut W {
                self.variant(NMATCHW::_00000010)
            }
            #[doc = "Received message must match the predefined filtering criteria for ID and/or PL 255 times before generating a wake up event."]
            #[inline(always)]
            pub fn _11111111(self) -> &'a mut W {
                self.variant(NMATCHW::_11111111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WUMF_MSK`"]
        pub enum WUMF_MSKW {
            #[doc = "Wake up match event is disabled"]
            _0,
            #[doc = "Wake up match event is enabled"]
            _1,
        }
        impl WUMF_MSKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WUMF_MSKW::_0 => false,
                    WUMF_MSKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WUMF_MSKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WUMF_MSKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WUMF_MSKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Wake up match event is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WUMF_MSKW::_0)
            }
            #[doc = "Wake up match event is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WUMF_MSKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WTOF_MSK`"]
        pub enum WTOF_MSKW {
            #[doc = "Timeout wake up event is disabled"]
            _0,
            #[doc = "Timeout wake up event is enabled"]
            _1,
        }
        impl WTOF_MSKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WTOF_MSKW::_0 => false,
                    WTOF_MSKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WTOF_MSKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WTOF_MSKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WTOF_MSKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Timeout wake up event is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WTOF_MSKW::_0)
            }
            #[doc = "Timeout wake up event is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WTOF_MSKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:1 - Filtering Combination Selection"]
            #[inline(always)]
            pub fn fcs(&self) -> FCSR {
                FCSR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 2:3 - ID Filtering Selection"]
            #[inline(always)]
            pub fn idfs(&self) -> IDFSR {
                IDFSR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 4:5 - Payload Filtering Selection"]
            #[inline(always)]
            pub fn plfs(&self) -> PLFSR {
                PLFSR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 8:15 - Number of Messages Matching the Same Filtering Criteria"]
            #[inline(always)]
            pub fn nmatch(&self) -> NMATCHR {
                NMATCHR::_from({
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 16 - Wake Up by Match Flag Mask Bit"]
            #[inline(always)]
            pub fn wumf_msk(&self) -> WUMF_MSKR {
                WUMF_MSKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - Wake Up by Timeout Flag Mask Bit"]
            #[inline(always)]
            pub fn wtof_msk(&self) -> WTOF_MSKR {
                WTOF_MSKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 256 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:1 - Filtering Combination Selection"]
            #[inline(always)]
            pub fn fcs(&mut self) -> _FCSW {
                _FCSW { w: self }
            }
            #[doc = "Bits 2:3 - ID Filtering Selection"]
            #[inline(always)]
            pub fn idfs(&mut self) -> _IDFSW {
                _IDFSW { w: self }
            }
            #[doc = "Bits 4:5 - Payload Filtering Selection"]
            #[inline(always)]
            pub fn plfs(&mut self) -> _PLFSW {
                _PLFSW { w: self }
            }
            #[doc = "Bits 8:15 - Number of Messages Matching the Same Filtering Criteria"]
            #[inline(always)]
            pub fn nmatch(&mut self) -> _NMATCHW {
                _NMATCHW { w: self }
            }
            #[doc = "Bit 16 - Wake Up by Match Flag Mask Bit"]
            #[inline(always)]
            pub fn wumf_msk(&mut self) -> _WUMF_MSKW {
                _WUMF_MSKW { w: self }
            }
            #[doc = "Bit 17 - Wake Up by Timeout Flag Mask Bit"]
            #[inline(always)]
            pub fn wtof_msk(&mut self) -> _WTOF_MSKW {
                _WTOF_MSKW { w: self }
            }
        }
    }
    #[doc = "Pretended Networking Control 2 Register"]
    pub struct CTRL2_PN {
        register: VolatileCell<u32>,
    }
    #[doc = "Pretended Networking Control 2 Register"]
    pub mod ctrl2_pn {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CTRL2_PN {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MATCHTOR {
            bits: u16,
        }
        impl MATCHTOR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MATCHTOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MATCHTOW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Timeout for No Message Matching the Filtering Criteria"]
            #[inline(always)]
            pub fn matchto(&self) -> MATCHTOR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                MATCHTOR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Timeout for No Message Matching the Filtering Criteria"]
            #[inline(always)]
            pub fn matchto(&mut self) -> _MATCHTOW {
                _MATCHTOW { w: self }
            }
        }
    }
    #[doc = "Pretended Networking Wake Up Match Register"]
    pub struct WU_MTC {
        register: VolatileCell<u32>,
    }
    #[doc = "Pretended Networking Wake Up Match Register"]
    pub mod wu_mtc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::WU_MTC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MCOUNTERR {
            bits: u8,
        }
        impl MCOUNTERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `WUMF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WUMFR {
            #[doc = "No wake up by match event detected"]
            _0,
            #[doc = "Wake up by match event detected"]
            _1,
        }
        impl WUMFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WUMFR::_0 => false,
                    WUMFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WUMFR {
                match value {
                    false => WUMFR::_0,
                    true => WUMFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WUMFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WUMFR::_1
            }
        }
        #[doc = "Possible values of the field `WTOF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WTOFR {
            #[doc = "No wake up by timeout event detected"]
            _0,
            #[doc = "Wake up by timeout event detected"]
            _1,
        }
        impl WTOFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WTOFR::_0 => false,
                    WTOFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WTOFR {
                match value {
                    false => WTOFR::_0,
                    true => WTOFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WTOFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WTOFR::_1
            }
        }
        #[doc = "Values that can be written to the field `WUMF`"]
        pub enum WUMFW {
            #[doc = "No wake up by match event detected"]
            _0,
            #[doc = "Wake up by match event detected"]
            _1,
        }
        impl WUMFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WUMFW::_0 => false,
                    WUMFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WUMFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WUMFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WUMFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No wake up by match event detected"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WUMFW::_0)
            }
            #[doc = "Wake up by match event detected"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WUMFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WTOF`"]
        pub enum WTOFW {
            #[doc = "No wake up by timeout event detected"]
            _0,
            #[doc = "Wake up by timeout event detected"]
            _1,
        }
        impl WTOFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WTOFW::_0 => false,
                    WTOFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WTOFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WTOFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WTOFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No wake up by timeout event detected"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WTOFW::_0)
            }
            #[doc = "Wake up by timeout event detected"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WTOFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 8:15 - Number of Matches while in Pretended Networking"]
            #[inline(always)]
            pub fn mcounter(&self) -> MCOUNTERR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                MCOUNTERR { bits }
            }
            #[doc = "Bit 16 - Wake Up by Match Flag Bit"]
            #[inline(always)]
            pub fn wumf(&self) -> WUMFR {
                WUMFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - Wake Up by Timeout Flag Bit"]
            #[inline(always)]
            pub fn wtof(&self) -> WTOFR {
                WTOFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 16 - Wake Up by Match Flag Bit"]
            #[inline(always)]
            pub fn wumf(&mut self) -> _WUMFW {
                _WUMFW { w: self }
            }
            #[doc = "Bit 17 - Wake Up by Timeout Flag Bit"]
            #[inline(always)]
            pub fn wtof(&mut self) -> _WTOFW {
                _WTOFW { w: self }
            }
        }
    }
    #[doc = "Pretended Networking ID Filter 1 Register"]
    pub struct FLT_ID1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pretended Networking ID Filter 1 Register"]
    pub mod flt_id1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FLT_ID1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct FLT_ID1R {
            bits: u32,
        }
        impl FLT_ID1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `FLT_RTR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FLT_RTRR {
            #[doc = "Reject remote frame (accept data frame)"]
            _0,
            #[doc = "Accept remote frame"]
            _1,
        }
        impl FLT_RTRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FLT_RTRR::_0 => false,
                    FLT_RTRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FLT_RTRR {
                match value {
                    false => FLT_RTRR::_0,
                    true => FLT_RTRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FLT_RTRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FLT_RTRR::_1
            }
        }
        #[doc = "Possible values of the field `FLT_IDE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FLT_IDER {
            #[doc = "Accept standard frame format"]
            _0,
            #[doc = "Accept extended frame format"]
            _1,
        }
        impl FLT_IDER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FLT_IDER::_0 => false,
                    FLT_IDER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FLT_IDER {
                match value {
                    false => FLT_IDER::_0,
                    true => FLT_IDER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FLT_IDER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FLT_IDER::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _FLT_ID1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _FLT_ID1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 536870911;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FLT_RTR`"]
        pub enum FLT_RTRW {
            #[doc = "Reject remote frame (accept data frame)"]
            _0,
            #[doc = "Accept remote frame"]
            _1,
        }
        impl FLT_RTRW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FLT_RTRW::_0 => false,
                    FLT_RTRW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FLT_RTRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FLT_RTRW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FLT_RTRW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Reject remote frame (accept data frame)"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FLT_RTRW::_0)
            }
            #[doc = "Accept remote frame"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FLT_RTRW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 29;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FLT_IDE`"]
        pub enum FLT_IDEW {
            #[doc = "Accept standard frame format"]
            _0,
            #[doc = "Accept extended frame format"]
            _1,
        }
        impl FLT_IDEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FLT_IDEW::_0 => false,
                    FLT_IDEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FLT_IDEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FLT_IDEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FLT_IDEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Accept standard frame format"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FLT_IDEW::_0)
            }
            #[doc = "Accept extended frame format"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FLT_IDEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:28 - ID Filter 1 for Pretended Networking filtering"]
            #[inline(always)]
            pub fn flt_id1(&self) -> FLT_ID1R {
                let bits = {
                    const MASK: u32 = 536870911;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                FLT_ID1R { bits }
            }
            #[doc = "Bit 29 - Remote Transmission Request Filter"]
            #[inline(always)]
            pub fn flt_rtr(&self) -> FLT_RTRR {
                FLT_RTRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 29;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 30 - ID Extended Filter"]
            #[inline(always)]
            pub fn flt_ide(&self) -> FLT_IDER {
                FLT_IDER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:28 - ID Filter 1 for Pretended Networking filtering"]
            #[inline(always)]
            pub fn flt_id1(&mut self) -> _FLT_ID1W {
                _FLT_ID1W { w: self }
            }
            #[doc = "Bit 29 - Remote Transmission Request Filter"]
            #[inline(always)]
            pub fn flt_rtr(&mut self) -> _FLT_RTRW {
                _FLT_RTRW { w: self }
            }
            #[doc = "Bit 30 - ID Extended Filter"]
            #[inline(always)]
            pub fn flt_ide(&mut self) -> _FLT_IDEW {
                _FLT_IDEW { w: self }
            }
        }
    }
    #[doc = "Pretended Networking DLC Filter Register"]
    pub struct FLT_DLC {
        register: VolatileCell<u32>,
    }
    #[doc = "Pretended Networking DLC Filter Register"]
    pub mod flt_dlc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FLT_DLC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct FLT_DLC_HIR {
            bits: u8,
        }
        impl FLT_DLC_HIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct FLT_DLC_LOR {
            bits: u8,
        }
        impl FLT_DLC_LOR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _FLT_DLC_HIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FLT_DLC_HIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _FLT_DLC_LOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FLT_DLC_LOW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:3 - Upper Limit for Length of Data Bytes Filter"]
            #[inline(always)]
            pub fn flt_dlc_hi(&self) -> FLT_DLC_HIR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                FLT_DLC_HIR { bits }
            }
            #[doc = "Bits 16:19 - Lower Limit for Length of Data Bytes Filter"]
            #[inline(always)]
            pub fn flt_dlc_lo(&self) -> FLT_DLC_LOR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                FLT_DLC_LOR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 8 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Upper Limit for Length of Data Bytes Filter"]
            #[inline(always)]
            pub fn flt_dlc_hi(&mut self) -> _FLT_DLC_HIW {
                _FLT_DLC_HIW { w: self }
            }
            #[doc = "Bits 16:19 - Lower Limit for Length of Data Bytes Filter"]
            #[inline(always)]
            pub fn flt_dlc_lo(&mut self) -> _FLT_DLC_LOW {
                _FLT_DLC_LOW { w: self }
            }
        }
    }
    #[doc = "Pretended Networking Payload Low Filter 1 Register"]
    pub struct PL1_LO {
        register: VolatileCell<u32>,
    }
    #[doc = "Pretended Networking Payload Low Filter 1 Register"]
    pub mod pl1_lo {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PL1_LO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_3R {
            bits: u8,
        }
        impl DATA_BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_2R {
            bits: u8,
        }
        impl DATA_BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_1R {
            bits: u8,
        }
        impl DATA_BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_0R {
            bits: u8,
        }
        impl DATA_BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 3."]
            #[inline(always)]
            pub fn data_byte_3(&self) -> DATA_BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 2."]
            #[inline(always)]
            pub fn data_byte_2(&self) -> DATA_BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 1."]
            #[inline(always)]
            pub fn data_byte_1(&self) -> DATA_BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 0."]
            #[inline(always)]
            pub fn data_byte_0(&self) -> DATA_BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 3."]
            #[inline(always)]
            pub fn data_byte_3(&mut self) -> _DATA_BYTE_3W {
                _DATA_BYTE_3W { w: self }
            }
            #[doc = "Bits 8:15 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 2."]
            #[inline(always)]
            pub fn data_byte_2(&mut self) -> _DATA_BYTE_2W {
                _DATA_BYTE_2W { w: self }
            }
            #[doc = "Bits 16:23 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 1."]
            #[inline(always)]
            pub fn data_byte_1(&mut self) -> _DATA_BYTE_1W {
                _DATA_BYTE_1W { w: self }
            }
            #[doc = "Bits 24:31 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 0."]
            #[inline(always)]
            pub fn data_byte_0(&mut self) -> _DATA_BYTE_0W {
                _DATA_BYTE_0W { w: self }
            }
        }
    }
    #[doc = "Pretended Networking Payload High Filter 1 Register"]
    pub struct PL1_HI {
        register: VolatileCell<u32>,
    }
    #[doc = "Pretended Networking Payload High Filter 1 Register"]
    pub mod pl1_hi {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PL1_HI {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_7R {
            bits: u8,
        }
        impl DATA_BYTE_7R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_6R {
            bits: u8,
        }
        impl DATA_BYTE_6R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_5R {
            bits: u8,
        }
        impl DATA_BYTE_5R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_4R {
            bits: u8,
        }
        impl DATA_BYTE_4R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_7W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_7W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_6W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_6W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_5W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_4W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_4W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 7."]
            #[inline(always)]
            pub fn data_byte_7(&self) -> DATA_BYTE_7R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_7R { bits }
            }
            #[doc = "Bits 8:15 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 6."]
            #[inline(always)]
            pub fn data_byte_6(&self) -> DATA_BYTE_6R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_6R { bits }
            }
            #[doc = "Bits 16:23 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 5."]
            #[inline(always)]
            pub fn data_byte_5(&self) -> DATA_BYTE_5R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_5R { bits }
            }
            #[doc = "Bits 24:31 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 4."]
            #[inline(always)]
            pub fn data_byte_4(&self) -> DATA_BYTE_4R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_4R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 7."]
            #[inline(always)]
            pub fn data_byte_7(&mut self) -> _DATA_BYTE_7W {
                _DATA_BYTE_7W { w: self }
            }
            #[doc = "Bits 8:15 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 6."]
            #[inline(always)]
            pub fn data_byte_6(&mut self) -> _DATA_BYTE_6W {
                _DATA_BYTE_6W { w: self }
            }
            #[doc = "Bits 16:23 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 5."]
            #[inline(always)]
            pub fn data_byte_5(&mut self) -> _DATA_BYTE_5W {
                _DATA_BYTE_5W { w: self }
            }
            #[doc = "Bits 24:31 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 4."]
            #[inline(always)]
            pub fn data_byte_4(&mut self) -> _DATA_BYTE_4W {
                _DATA_BYTE_4W { w: self }
            }
        }
    }
    #[doc = "Pretended Networking ID Filter 2 Register / ID Mask Register"]
    pub struct FLT_ID2_IDMASK {
        register: VolatileCell<u32>,
    }
    #[doc = "Pretended Networking ID Filter 2 Register / ID Mask Register"]
    pub mod flt_id2_idmask {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FLT_ID2_IDMASK {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct FLT_ID2_IDMASKR {
            bits: u32,
        }
        impl FLT_ID2_IDMASKR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `RTR_MSK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RTR_MSKR {
            #[doc = "The corresponding bit in the filter is \"don't care\""]
            _0,
            #[doc = "The corresponding bit in the filter is checked"]
            _1,
        }
        impl RTR_MSKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RTR_MSKR::_0 => false,
                    RTR_MSKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RTR_MSKR {
                match value {
                    false => RTR_MSKR::_0,
                    true => RTR_MSKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RTR_MSKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RTR_MSKR::_1
            }
        }
        #[doc = "Possible values of the field `IDE_MSK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IDE_MSKR {
            #[doc = "The corresponding bit in the filter is \"don't care\""]
            _0,
            #[doc = "The corresponding bit in the filter is checked"]
            _1,
        }
        impl IDE_MSKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    IDE_MSKR::_0 => false,
                    IDE_MSKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> IDE_MSKR {
                match value {
                    false => IDE_MSKR::_0,
                    true => IDE_MSKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == IDE_MSKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == IDE_MSKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _FLT_ID2_IDMASKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FLT_ID2_IDMASKW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 536870911;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RTR_MSK`"]
        pub enum RTR_MSKW {
            #[doc = "The corresponding bit in the filter is \"don't care\""]
            _0,
            #[doc = "The corresponding bit in the filter is checked"]
            _1,
        }
        impl RTR_MSKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RTR_MSKW::_0 => false,
                    RTR_MSKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RTR_MSKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RTR_MSKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RTR_MSKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The corresponding bit in the filter is \"don't care\""]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RTR_MSKW::_0)
            }
            #[doc = "The corresponding bit in the filter is checked"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RTR_MSKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 29;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IDE_MSK`"]
        pub enum IDE_MSKW {
            #[doc = "The corresponding bit in the filter is \"don't care\""]
            _0,
            #[doc = "The corresponding bit in the filter is checked"]
            _1,
        }
        impl IDE_MSKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    IDE_MSKW::_0 => false,
                    IDE_MSKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IDE_MSKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IDE_MSKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IDE_MSKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The corresponding bit in the filter is \"don't care\""]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(IDE_MSKW::_0)
            }
            #[doc = "The corresponding bit in the filter is checked"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(IDE_MSKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:28 - ID Filter 2 for Pretended Networking Filtering / ID Mask Bits for Pretended Networking ID Filtering"]
            #[inline(always)]
            pub fn flt_id2_idmask(&self) -> FLT_ID2_IDMASKR {
                let bits = {
                    const MASK: u32 = 536870911;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                FLT_ID2_IDMASKR { bits }
            }
            #[doc = "Bit 29 - Remote Transmission Request Mask Bit"]
            #[inline(always)]
            pub fn rtr_msk(&self) -> RTR_MSKR {
                RTR_MSKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 29;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 30 - ID Extended Mask Bit"]
            #[inline(always)]
            pub fn ide_msk(&self) -> IDE_MSKR {
                IDE_MSKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:28 - ID Filter 2 for Pretended Networking Filtering / ID Mask Bits for Pretended Networking ID Filtering"]
            #[inline(always)]
            pub fn flt_id2_idmask(&mut self) -> _FLT_ID2_IDMASKW {
                _FLT_ID2_IDMASKW { w: self }
            }
            #[doc = "Bit 29 - Remote Transmission Request Mask Bit"]
            #[inline(always)]
            pub fn rtr_msk(&mut self) -> _RTR_MSKW {
                _RTR_MSKW { w: self }
            }
            #[doc = "Bit 30 - ID Extended Mask Bit"]
            #[inline(always)]
            pub fn ide_msk(&mut self) -> _IDE_MSKW {
                _IDE_MSKW { w: self }
            }
        }
    }
    #[doc = "Pretended Networking Payload Low Filter 2 Register / Payload Low Mask Register"]
    pub struct PL2_PLMASK_LO {
        register: VolatileCell<u32>,
    }
    #[doc = "Pretended Networking Payload Low Filter 2 Register / Payload Low Mask Register"]
    pub mod pl2_plmask_lo {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PL2_PLMASK_LO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_3R {
            bits: u8,
        }
        impl DATA_BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_2R {
            bits: u8,
        }
        impl DATA_BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_1R {
            bits: u8,
        }
        impl DATA_BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_0R {
            bits: u8,
        }
        impl DATA_BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 3."]
            #[inline(always)]
            pub fn data_byte_3(&self) -> DATA_BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 2."]
            #[inline(always)]
            pub fn data_byte_2(&self) -> DATA_BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 1."]
            #[inline(always)]
            pub fn data_byte_1(&self) -> DATA_BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 0."]
            #[inline(always)]
            pub fn data_byte_0(&self) -> DATA_BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 3."]
            #[inline(always)]
            pub fn data_byte_3(&mut self) -> _DATA_BYTE_3W {
                _DATA_BYTE_3W { w: self }
            }
            #[doc = "Bits 8:15 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 2."]
            #[inline(always)]
            pub fn data_byte_2(&mut self) -> _DATA_BYTE_2W {
                _DATA_BYTE_2W { w: self }
            }
            #[doc = "Bits 16:23 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 1."]
            #[inline(always)]
            pub fn data_byte_1(&mut self) -> _DATA_BYTE_1W {
                _DATA_BYTE_1W { w: self }
            }
            #[doc = "Bits 24:31 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 0."]
            #[inline(always)]
            pub fn data_byte_0(&mut self) -> _DATA_BYTE_0W {
                _DATA_BYTE_0W { w: self }
            }
        }
    }
    #[doc = "Pretended Networking Payload High Filter 2 low order bits / Payload High Mask Register"]
    pub struct PL2_PLMASK_HI {
        register: VolatileCell<u32>,
    }
    #[doc = "Pretended Networking Payload High Filter 2 low order bits / Payload High Mask Register"]
    pub mod pl2_plmask_hi {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PL2_PLMASK_HI {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_7R {
            bits: u8,
        }
        impl DATA_BYTE_7R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_6R {
            bits: u8,
        }
        impl DATA_BYTE_6R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_5R {
            bits: u8,
        }
        impl DATA_BYTE_5R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_4R {
            bits: u8,
        }
        impl DATA_BYTE_4R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_7W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_7W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_6W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_6W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_5W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATA_BYTE_4W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATA_BYTE_4W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 7."]
            #[inline(always)]
            pub fn data_byte_7(&self) -> DATA_BYTE_7R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_7R { bits }
            }
            #[doc = "Bits 8:15 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 6."]
            #[inline(always)]
            pub fn data_byte_6(&self) -> DATA_BYTE_6R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_6R { bits }
            }
            #[doc = "Bits 16:23 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 5."]
            #[inline(always)]
            pub fn data_byte_5(&self) -> DATA_BYTE_5R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_5R { bits }
            }
            #[doc = "Bits 24:31 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 4."]
            #[inline(always)]
            pub fn data_byte_4(&self) -> DATA_BYTE_4R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_4R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 7."]
            #[inline(always)]
            pub fn data_byte_7(&mut self) -> _DATA_BYTE_7W {
                _DATA_BYTE_7W { w: self }
            }
            #[doc = "Bits 8:15 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 6."]
            #[inline(always)]
            pub fn data_byte_6(&mut self) -> _DATA_BYTE_6W {
                _DATA_BYTE_6W { w: self }
            }
            #[doc = "Bits 16:23 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 5."]
            #[inline(always)]
            pub fn data_byte_5(&mut self) -> _DATA_BYTE_5W {
                _DATA_BYTE_5W { w: self }
            }
            #[doc = "Bits 24:31 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 4."]
            #[inline(always)]
            pub fn data_byte_4(&mut self) -> _DATA_BYTE_4W {
                _DATA_BYTE_4W { w: self }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register for C/S"]
    pub struct WMB0_CS {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register for C/S"]
    pub mod wmb0_cs {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB0_CS {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLCR {
            bits: u8,
        }
        impl DLCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `RTR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RTRR {
            #[doc = "Frame is data one (not remote)"]
            _0,
            #[doc = "Frame is a remote one"]
            _1,
        }
        impl RTRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RTRR::_0 => false,
                    RTRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RTRR {
                match value {
                    false => RTRR::_0,
                    true => RTRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RTRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RTRR::_1
            }
        }
        #[doc = "Possible values of the field `IDE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IDER {
            #[doc = "Frame format is standard"]
            _0,
            #[doc = "Frame format is extended"]
            _1,
        }
        impl IDER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    IDER::_0 => false,
                    IDER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> IDER {
                match value {
                    false => IDER::_0,
                    true => IDER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == IDER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == IDER::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct SRRR {
            bits: bool,
        }
        impl SRRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 16:19 - Length of Data in Bytes"]
            #[inline(always)]
            pub fn dlc(&self) -> DLCR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DLCR { bits }
            }
            #[doc = "Bit 20 - Remote Transmission Request Bit"]
            #[inline(always)]
            pub fn rtr(&self) -> RTRR {
                RTRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - ID Extended Bit"]
            #[inline(always)]
            pub fn ide(&self) -> IDER {
                IDER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 22 - Substitute Remote Request"]
            #[inline(always)]
            pub fn srr(&self) -> SRRR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                SRRR { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register for ID"]
    pub struct WMB0_ID {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register for ID"]
    pub mod wmb0_id {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB0_ID {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct IDR {
            bits: u32,
        }
        impl IDR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:28 - Received ID under Pretended Networking mode"]
            #[inline(always)]
            pub fn id(&self) -> IDR {
                let bits = {
                    const MASK: u32 = 536870911;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                IDR { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register for Data 0-3"]
    pub struct WMB0_D03 {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register for Data 0-3"]
    pub mod wmb0_d03 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB0_D03 {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_3R {
            bits: u8,
        }
        impl DATA_BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_2R {
            bits: u8,
        }
        impl DATA_BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_1R {
            bits: u8,
        }
        impl DATA_BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_0R {
            bits: u8,
        }
        impl DATA_BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Received payload corresponding to the data byte 3 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_3(&self) -> DATA_BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Received payload corresponding to the data byte 2 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_2(&self) -> DATA_BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Received payload corresponding to the data byte 1 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_1(&self) -> DATA_BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Received payload corresponding to the data byte 0 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_0(&self) -> DATA_BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_0R { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register Data 4-7"]
    pub struct WMB0_D47 {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register Data 4-7"]
    pub mod wmb0_d47 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB0_D47 {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_7R {
            bits: u8,
        }
        impl DATA_BYTE_7R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_6R {
            bits: u8,
        }
        impl DATA_BYTE_6R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_5R {
            bits: u8,
        }
        impl DATA_BYTE_5R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_4R {
            bits: u8,
        }
        impl DATA_BYTE_4R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Received payload corresponding to the data byte 7 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_7(&self) -> DATA_BYTE_7R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_7R { bits }
            }
            #[doc = "Bits 8:15 - Received payload corresponding to the data byte 6 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_6(&self) -> DATA_BYTE_6R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_6R { bits }
            }
            #[doc = "Bits 16:23 - Received payload corresponding to the data byte 5 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_5(&self) -> DATA_BYTE_5R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_5R { bits }
            }
            #[doc = "Bits 24:31 - Received payload corresponding to the data byte 4 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_4(&self) -> DATA_BYTE_4R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_4R { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register for C/S"]
    pub struct WMB1_CS {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register for C/S"]
    pub mod wmb1_cs {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB1_CS {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLCR {
            bits: u8,
        }
        impl DLCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `RTR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RTRR {
            #[doc = "Frame is data one (not remote)"]
            _0,
            #[doc = "Frame is a remote one"]
            _1,
        }
        impl RTRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RTRR::_0 => false,
                    RTRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RTRR {
                match value {
                    false => RTRR::_0,
                    true => RTRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RTRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RTRR::_1
            }
        }
        #[doc = "Possible values of the field `IDE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IDER {
            #[doc = "Frame format is standard"]
            _0,
            #[doc = "Frame format is extended"]
            _1,
        }
        impl IDER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    IDER::_0 => false,
                    IDER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> IDER {
                match value {
                    false => IDER::_0,
                    true => IDER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == IDER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == IDER::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct SRRR {
            bits: bool,
        }
        impl SRRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 16:19 - Length of Data in Bytes"]
            #[inline(always)]
            pub fn dlc(&self) -> DLCR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DLCR { bits }
            }
            #[doc = "Bit 20 - Remote Transmission Request Bit"]
            #[inline(always)]
            pub fn rtr(&self) -> RTRR {
                RTRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - ID Extended Bit"]
            #[inline(always)]
            pub fn ide(&self) -> IDER {
                IDER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 22 - Substitute Remote Request"]
            #[inline(always)]
            pub fn srr(&self) -> SRRR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                SRRR { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register for ID"]
    pub struct WMB1_ID {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register for ID"]
    pub mod wmb1_id {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB1_ID {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct IDR {
            bits: u32,
        }
        impl IDR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:28 - Received ID under Pretended Networking mode"]
            #[inline(always)]
            pub fn id(&self) -> IDR {
                let bits = {
                    const MASK: u32 = 536870911;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                IDR { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register for Data 0-3"]
    pub struct WMB1_D03 {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register for Data 0-3"]
    pub mod wmb1_d03 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB1_D03 {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_3R {
            bits: u8,
        }
        impl DATA_BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_2R {
            bits: u8,
        }
        impl DATA_BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_1R {
            bits: u8,
        }
        impl DATA_BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_0R {
            bits: u8,
        }
        impl DATA_BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Received payload corresponding to the data byte 3 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_3(&self) -> DATA_BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Received payload corresponding to the data byte 2 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_2(&self) -> DATA_BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Received payload corresponding to the data byte 1 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_1(&self) -> DATA_BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Received payload corresponding to the data byte 0 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_0(&self) -> DATA_BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_0R { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register Data 4-7"]
    pub struct WMB1_D47 {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register Data 4-7"]
    pub mod wmb1_d47 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB1_D47 {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_7R {
            bits: u8,
        }
        impl DATA_BYTE_7R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_6R {
            bits: u8,
        }
        impl DATA_BYTE_6R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_5R {
            bits: u8,
        }
        impl DATA_BYTE_5R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_4R {
            bits: u8,
        }
        impl DATA_BYTE_4R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Received payload corresponding to the data byte 7 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_7(&self) -> DATA_BYTE_7R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_7R { bits }
            }
            #[doc = "Bits 8:15 - Received payload corresponding to the data byte 6 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_6(&self) -> DATA_BYTE_6R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_6R { bits }
            }
            #[doc = "Bits 16:23 - Received payload corresponding to the data byte 5 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_5(&self) -> DATA_BYTE_5R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_5R { bits }
            }
            #[doc = "Bits 24:31 - Received payload corresponding to the data byte 4 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_4(&self) -> DATA_BYTE_4R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_4R { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register for C/S"]
    pub struct WMB2_CS {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register for C/S"]
    pub mod wmb2_cs {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB2_CS {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLCR {
            bits: u8,
        }
        impl DLCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `RTR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RTRR {
            #[doc = "Frame is data one (not remote)"]
            _0,
            #[doc = "Frame is a remote one"]
            _1,
        }
        impl RTRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RTRR::_0 => false,
                    RTRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RTRR {
                match value {
                    false => RTRR::_0,
                    true => RTRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RTRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RTRR::_1
            }
        }
        #[doc = "Possible values of the field `IDE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IDER {
            #[doc = "Frame format is standard"]
            _0,
            #[doc = "Frame format is extended"]
            _1,
        }
        impl IDER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    IDER::_0 => false,
                    IDER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> IDER {
                match value {
                    false => IDER::_0,
                    true => IDER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == IDER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == IDER::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct SRRR {
            bits: bool,
        }
        impl SRRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 16:19 - Length of Data in Bytes"]
            #[inline(always)]
            pub fn dlc(&self) -> DLCR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DLCR { bits }
            }
            #[doc = "Bit 20 - Remote Transmission Request Bit"]
            #[inline(always)]
            pub fn rtr(&self) -> RTRR {
                RTRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - ID Extended Bit"]
            #[inline(always)]
            pub fn ide(&self) -> IDER {
                IDER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 22 - Substitute Remote Request"]
            #[inline(always)]
            pub fn srr(&self) -> SRRR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                SRRR { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register for ID"]
    pub struct WMB2_ID {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register for ID"]
    pub mod wmb2_id {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB2_ID {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct IDR {
            bits: u32,
        }
        impl IDR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:28 - Received ID under Pretended Networking mode"]
            #[inline(always)]
            pub fn id(&self) -> IDR {
                let bits = {
                    const MASK: u32 = 536870911;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                IDR { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register for Data 0-3"]
    pub struct WMB2_D03 {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register for Data 0-3"]
    pub mod wmb2_d03 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB2_D03 {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_3R {
            bits: u8,
        }
        impl DATA_BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_2R {
            bits: u8,
        }
        impl DATA_BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_1R {
            bits: u8,
        }
        impl DATA_BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_0R {
            bits: u8,
        }
        impl DATA_BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Received payload corresponding to the data byte 3 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_3(&self) -> DATA_BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Received payload corresponding to the data byte 2 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_2(&self) -> DATA_BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Received payload corresponding to the data byte 1 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_1(&self) -> DATA_BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Received payload corresponding to the data byte 0 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_0(&self) -> DATA_BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_0R { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register Data 4-7"]
    pub struct WMB2_D47 {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register Data 4-7"]
    pub mod wmb2_d47 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB2_D47 {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_7R {
            bits: u8,
        }
        impl DATA_BYTE_7R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_6R {
            bits: u8,
        }
        impl DATA_BYTE_6R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_5R {
            bits: u8,
        }
        impl DATA_BYTE_5R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_4R {
            bits: u8,
        }
        impl DATA_BYTE_4R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Received payload corresponding to the data byte 7 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_7(&self) -> DATA_BYTE_7R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_7R { bits }
            }
            #[doc = "Bits 8:15 - Received payload corresponding to the data byte 6 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_6(&self) -> DATA_BYTE_6R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_6R { bits }
            }
            #[doc = "Bits 16:23 - Received payload corresponding to the data byte 5 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_5(&self) -> DATA_BYTE_5R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_5R { bits }
            }
            #[doc = "Bits 24:31 - Received payload corresponding to the data byte 4 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_4(&self) -> DATA_BYTE_4R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_4R { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register for C/S"]
    pub struct WMB3_CS {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register for C/S"]
    pub mod wmb3_cs {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB3_CS {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLCR {
            bits: u8,
        }
        impl DLCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `RTR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RTRR {
            #[doc = "Frame is data one (not remote)"]
            _0,
            #[doc = "Frame is a remote one"]
            _1,
        }
        impl RTRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RTRR::_0 => false,
                    RTRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RTRR {
                match value {
                    false => RTRR::_0,
                    true => RTRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RTRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RTRR::_1
            }
        }
        #[doc = "Possible values of the field `IDE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IDER {
            #[doc = "Frame format is standard"]
            _0,
            #[doc = "Frame format is extended"]
            _1,
        }
        impl IDER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    IDER::_0 => false,
                    IDER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> IDER {
                match value {
                    false => IDER::_0,
                    true => IDER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == IDER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == IDER::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct SRRR {
            bits: bool,
        }
        impl SRRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 16:19 - Length of Data in Bytes"]
            #[inline(always)]
            pub fn dlc(&self) -> DLCR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DLCR { bits }
            }
            #[doc = "Bit 20 - Remote Transmission Request Bit"]
            #[inline(always)]
            pub fn rtr(&self) -> RTRR {
                RTRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - ID Extended Bit"]
            #[inline(always)]
            pub fn ide(&self) -> IDER {
                IDER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 22 - Substitute Remote Request"]
            #[inline(always)]
            pub fn srr(&self) -> SRRR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                SRRR { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register for ID"]
    pub struct WMB3_ID {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register for ID"]
    pub mod wmb3_id {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB3_ID {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct IDR {
            bits: u32,
        }
        impl IDR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:28 - Received ID under Pretended Networking mode"]
            #[inline(always)]
            pub fn id(&self) -> IDR {
                let bits = {
                    const MASK: u32 = 536870911;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                IDR { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register for Data 0-3"]
    pub struct WMB3_D03 {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register for Data 0-3"]
    pub mod wmb3_d03 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB3_D03 {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_3R {
            bits: u8,
        }
        impl DATA_BYTE_3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_2R {
            bits: u8,
        }
        impl DATA_BYTE_2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_1R {
            bits: u8,
        }
        impl DATA_BYTE_1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_0R {
            bits: u8,
        }
        impl DATA_BYTE_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Received payload corresponding to the data byte 3 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_3(&self) -> DATA_BYTE_3R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_3R { bits }
            }
            #[doc = "Bits 8:15 - Received payload corresponding to the data byte 2 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_2(&self) -> DATA_BYTE_2R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_2R { bits }
            }
            #[doc = "Bits 16:23 - Received payload corresponding to the data byte 1 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_1(&self) -> DATA_BYTE_1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_1R { bits }
            }
            #[doc = "Bits 24:31 - Received payload corresponding to the data byte 0 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_0(&self) -> DATA_BYTE_0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_0R { bits }
            }
        }
    }
    #[doc = "Wake Up Message Buffer Register Data 4-7"]
    pub struct WMB3_D47 {
        register: VolatileCell<u32>,
    }
    #[doc = "Wake Up Message Buffer Register Data 4-7"]
    pub mod wmb3_d47 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::WMB3_D47 {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_7R {
            bits: u8,
        }
        impl DATA_BYTE_7R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_6R {
            bits: u8,
        }
        impl DATA_BYTE_6R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_5R {
            bits: u8,
        }
        impl DATA_BYTE_5R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATA_BYTE_4R {
            bits: u8,
        }
        impl DATA_BYTE_4R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Received payload corresponding to the data byte 7 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_7(&self) -> DATA_BYTE_7R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_7R { bits }
            }
            #[doc = "Bits 8:15 - Received payload corresponding to the data byte 6 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_6(&self) -> DATA_BYTE_6R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_6R { bits }
            }
            #[doc = "Bits 16:23 - Received payload corresponding to the data byte 5 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_5(&self) -> DATA_BYTE_5R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_5R { bits }
            }
            #[doc = "Bits 24:31 - Received payload corresponding to the data byte 4 under Pretended Networking mode"]
            #[inline(always)]
            pub fn data_byte_4(&self) -> DATA_BYTE_4R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATA_BYTE_4R { bits }
            }
        }
    }
    #[doc = "CAN FD Control Register"]
    pub struct FDCTRL {
        register: VolatileCell<u32>,
    }
    #[doc = "CAN FD Control Register"]
    pub mod fdctrl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FDCTRL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct TDCVALR {
            bits: u8,
        }
        impl TDCVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct TDCOFFR {
            bits: u8,
        }
        impl TDCOFFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `TDCFAIL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TDCFAILR {
            #[doc = "Measured loop delay is in range."]
            _0,
            #[doc = "Measured loop delay is out of range."]
            _1,
        }
        impl TDCFAILR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TDCFAILR::_0 => false,
                    TDCFAILR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TDCFAILR {
                match value {
                    false => TDCFAILR::_0,
                    true => TDCFAILR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TDCFAILR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TDCFAILR::_1
            }
        }
        #[doc = "Possible values of the field `TDCEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TDCENR {
            #[doc = "TDC is disabled"]
            _0,
            #[doc = "TDC is enabled"]
            _1,
        }
        impl TDCENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TDCENR::_0 => false,
                    TDCENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TDCENR {
                match value {
                    false => TDCENR::_0,
                    true => TDCENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TDCENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TDCENR::_1
            }
        }
        #[doc = "Possible values of the field `MBDSR0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MBDSR0R {
            #[doc = "Selects 8 bytes per Message Buffer."]
            _00,
            #[doc = "Selects 16 bytes per Message Buffer."]
            _01,
            #[doc = "Selects 32 bytes per Message Buffer."]
            _10,
            #[doc = "Selects 64 bytes per Message Buffer."]
            _11,
        }
        impl MBDSR0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MBDSR0R::_00 => 0,
                    MBDSR0R::_01 => 1,
                    MBDSR0R::_10 => 2,
                    MBDSR0R::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MBDSR0R {
                match value {
                    0 => MBDSR0R::_00,
                    1 => MBDSR0R::_01,
                    2 => MBDSR0R::_10,
                    3 => MBDSR0R::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == MBDSR0R::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == MBDSR0R::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == MBDSR0R::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == MBDSR0R::_11
            }
        }
        #[doc = "Possible values of the field `FDRATE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FDRATER {
            #[doc = "Transmit a frame in nominal rate. The BRS bit in the Tx MB has no effect."]
            _0,
            #[doc = "Transmit a frame with bit rate switching if the BRS bit in the Tx MB is recessive."]
            _1,
        }
        impl FDRATER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FDRATER::_0 => false,
                    FDRATER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FDRATER {
                match value {
                    false => FDRATER::_0,
                    true => FDRATER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FDRATER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FDRATER::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _TDCOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TDCOFFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TDCFAIL`"]
        pub enum TDCFAILW {
            #[doc = "Measured loop delay is in range."]
            _0,
            #[doc = "Measured loop delay is out of range."]
            _1,
        }
        impl TDCFAILW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TDCFAILW::_0 => false,
                    TDCFAILW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TDCFAILW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TDCFAILW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TDCFAILW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Measured loop delay is in range."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TDCFAILW::_0)
            }
            #[doc = "Measured loop delay is out of range."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TDCFAILW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TDCEN`"]
        pub enum TDCENW {
            #[doc = "TDC is disabled"]
            _0,
            #[doc = "TDC is enabled"]
            _1,
        }
        impl TDCENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TDCENW::_0 => false,
                    TDCENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TDCENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TDCENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TDCENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "TDC is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TDCENW::_0)
            }
            #[doc = "TDC is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TDCENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MBDSR0`"]
        pub enum MBDSR0W {
            #[doc = "Selects 8 bytes per Message Buffer."]
            _00,
            #[doc = "Selects 16 bytes per Message Buffer."]
            _01,
            #[doc = "Selects 32 bytes per Message Buffer."]
            _10,
            #[doc = "Selects 64 bytes per Message Buffer."]
            _11,
        }
        impl MBDSR0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MBDSR0W::_00 => 0,
                    MBDSR0W::_01 => 1,
                    MBDSR0W::_10 => 2,
                    MBDSR0W::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MBDSR0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MBDSR0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MBDSR0W) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Selects 8 bytes per Message Buffer."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(MBDSR0W::_00)
            }
            #[doc = "Selects 16 bytes per Message Buffer."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(MBDSR0W::_01)
            }
            #[doc = "Selects 32 bytes per Message Buffer."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(MBDSR0W::_10)
            }
            #[doc = "Selects 64 bytes per Message Buffer."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(MBDSR0W::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FDRATE`"]
        pub enum FDRATEW {
            #[doc = "Transmit a frame in nominal rate. The BRS bit in the Tx MB has no effect."]
            _0,
            #[doc = "Transmit a frame with bit rate switching if the BRS bit in the Tx MB is recessive."]
            _1,
        }
        impl FDRATEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FDRATEW::_0 => false,
                    FDRATEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FDRATEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FDRATEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FDRATEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Transmit a frame in nominal rate. The BRS bit in the Tx MB has no effect."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FDRATEW::_0)
            }
            #[doc = "Transmit a frame with bit rate switching if the BRS bit in the Tx MB is recessive."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FDRATEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Transceiver Delay Compensation Value"]
            #[inline(always)]
            pub fn tdcval(&self) -> TDCVALR {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TDCVALR { bits }
            }
            #[doc = "Bits 8:12 - Transceiver Delay Compensation Offset"]
            #[inline(always)]
            pub fn tdcoff(&self) -> TDCOFFR {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TDCOFFR { bits }
            }
            #[doc = "Bit 14 - Transceiver Delay Compensation Fail"]
            #[inline(always)]
            pub fn tdcfail(&self) -> TDCFAILR {
                TDCFAILR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - Transceiver Delay Compensation Enable"]
            #[inline(always)]
            pub fn tdcen(&self) -> TDCENR {
                TDCENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:17 - Message Buffer Data Size for Region 0"]
            #[inline(always)]
            pub fn mbdsr0(&self) -> MBDSR0R {
                MBDSR0R::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 31 - Bit Rate Switch Enable"]
            #[inline(always)]
            pub fn fdrate(&self) -> FDRATER {
                FDRATER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 2147483904 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 8:12 - Transceiver Delay Compensation Offset"]
            #[inline(always)]
            pub fn tdcoff(&mut self) -> _TDCOFFW {
                _TDCOFFW { w: self }
            }
            #[doc = "Bit 14 - Transceiver Delay Compensation Fail"]
            #[inline(always)]
            pub fn tdcfail(&mut self) -> _TDCFAILW {
                _TDCFAILW { w: self }
            }
            #[doc = "Bit 15 - Transceiver Delay Compensation Enable"]
            #[inline(always)]
            pub fn tdcen(&mut self) -> _TDCENW {
                _TDCENW { w: self }
            }
            #[doc = "Bits 16:17 - Message Buffer Data Size for Region 0"]
            #[inline(always)]
            pub fn mbdsr0(&mut self) -> _MBDSR0W {
                _MBDSR0W { w: self }
            }
            #[doc = "Bit 31 - Bit Rate Switch Enable"]
            #[inline(always)]
            pub fn fdrate(&mut self) -> _FDRATEW {
                _FDRATEW { w: self }
            }
        }
    }
    #[doc = "CAN FD Bit Timing Register"]
    pub struct FDCBT {
        register: VolatileCell<u32>,
    }
    #[doc = "CAN FD Bit Timing Register"]
    pub mod fdcbt {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FDCBT {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct FPSEG2R {
            bits: u8,
        }
        impl FPSEG2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct FPSEG1R {
            bits: u8,
        }
        impl FPSEG1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct FPROPSEGR {
            bits: u8,
        }
        impl FPROPSEGR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct FRJWR {
            bits: u8,
        }
        impl FRJWR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct FPRESDIVR {
            bits: u16,
        }
        impl FPRESDIVR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _FPSEG2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _FPSEG2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _FPSEG1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _FPSEG1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _FPROPSEGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FPROPSEGW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _FRJWW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FRJWW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _FPRESDIVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FPRESDIVW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 1023;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:2 - Fast Phase Segment 2"]
            #[inline(always)]
            pub fn fpseg2(&self) -> FPSEG2R {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                FPSEG2R { bits }
            }
            #[doc = "Bits 5:7 - Fast Phase Segment 1"]
            #[inline(always)]
            pub fn fpseg1(&self) -> FPSEG1R {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                FPSEG1R { bits }
            }
            #[doc = "Bits 10:14 - Fast Propagation Segment"]
            #[inline(always)]
            pub fn fpropseg(&self) -> FPROPSEGR {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                FPROPSEGR { bits }
            }
            #[doc = "Bits 16:18 - Fast Resync Jump Width"]
            #[inline(always)]
            pub fn frjw(&self) -> FRJWR {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                FRJWR { bits }
            }
            #[doc = "Bits 20:29 - Fast Prescaler Division Factor"]
            #[inline(always)]
            pub fn fpresdiv(&self) -> FPRESDIVR {
                let bits = {
                    const MASK: u16 = 1023;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                FPRESDIVR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:2 - Fast Phase Segment 2"]
            #[inline(always)]
            pub fn fpseg2(&mut self) -> _FPSEG2W {
                _FPSEG2W { w: self }
            }
            #[doc = "Bits 5:7 - Fast Phase Segment 1"]
            #[inline(always)]
            pub fn fpseg1(&mut self) -> _FPSEG1W {
                _FPSEG1W { w: self }
            }
            #[doc = "Bits 10:14 - Fast Propagation Segment"]
            #[inline(always)]
            pub fn fpropseg(&mut self) -> _FPROPSEGW {
                _FPROPSEGW { w: self }
            }
            #[doc = "Bits 16:18 - Fast Resync Jump Width"]
            #[inline(always)]
            pub fn frjw(&mut self) -> _FRJWW {
                _FRJWW { w: self }
            }
            #[doc = "Bits 20:29 - Fast Prescaler Division Factor"]
            #[inline(always)]
            pub fn fpresdiv(&mut self) -> _FPRESDIVW {
                _FPRESDIVW { w: self }
            }
        }
    }
    #[doc = "CAN FD CRC Register"]
    pub struct FDCRC {
        register: VolatileCell<u32>,
    }
    #[doc = "CAN FD CRC Register"]
    pub mod fdcrc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::FDCRC {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct FD_TXCRCR {
            bits: u32,
        }
        impl FD_TXCRCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct FD_MBCRCR {
            bits: u8,
        }
        impl FD_MBCRCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:20 - Extended Transmitted CRC value"]
            #[inline(always)]
            pub fn fd_txcrc(&self) -> FD_TXCRCR {
                let bits = {
                    const MASK: u32 = 2097151;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                FD_TXCRCR { bits }
            }
            #[doc = "Bits 24:30 - CRC Mailbox Number for FD_TXCRC"]
            #[inline(always)]
            pub fn fd_mbcrc(&self) -> FD_MBCRCR {
                let bits = {
                    const MASK: u8 = 127;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                FD_MBCRCR { bits }
            }
        }
    }
}
#[doc = "Flex Controller Area Network module"]
pub struct CAN2 {
    register_block: can2::RegisterBlock,
}
impl Deref for CAN2 {
    type Target = can2::RegisterBlock;
    fn deref(&self) -> &can2::RegisterBlock {
        &self.register_block
    }
}
#[doc = "FlexTimer Module"]
pub const FTM0: Peripheral<FTM0> = unsafe { Peripheral::new(1073971200) };
#[doc = "FlexTimer Module"]
pub mod ftm0 {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - Status And Control"]
        pub sc: SC,
        #[doc = "0x04 - Counter"]
        pub cnt: CNT,
        #[doc = "0x08 - Modulo"]
        pub mod_: MOD,
        #[doc = "0x0c - Channel (n) Status And Control"]
        pub c0sc: C0SC,
        #[doc = "0x10 - Channel (n) Value"]
        pub c0v: C0V,
        #[doc = "0x14 - Channel (n) Status And Control"]
        pub c1sc: C1SC,
        #[doc = "0x18 - Channel (n) Value"]
        pub c1v: C1V,
        #[doc = "0x1c - Channel (n) Status And Control"]
        pub c2sc: C2SC,
        #[doc = "0x20 - Channel (n) Value"]
        pub c2v: C2V,
        #[doc = "0x24 - Channel (n) Status And Control"]
        pub c3sc: C3SC,
        #[doc = "0x28 - Channel (n) Value"]
        pub c3v: C3V,
        #[doc = "0x2c - Channel (n) Status And Control"]
        pub c4sc: C4SC,
        #[doc = "0x30 - Channel (n) Value"]
        pub c4v: C4V,
        #[doc = "0x34 - Channel (n) Status And Control"]
        pub c5sc: C5SC,
        #[doc = "0x38 - Channel (n) Value"]
        pub c5v: C5V,
        #[doc = "0x3c - Channel (n) Status And Control"]
        pub c6sc: C6SC,
        #[doc = "0x40 - Channel (n) Value"]
        pub c6v: C6V,
        #[doc = "0x44 - Channel (n) Status And Control"]
        pub c7sc: C7SC,
        #[doc = "0x48 - Channel (n) Value"]
        pub c7v: C7V,
        #[doc = "0x4c - Counter Initial Value"]
        pub cntin: CNTIN,
        #[doc = "0x50 - Capture And Compare Status"]
        pub status: STATUS,
        #[doc = "0x54 - Features Mode Selection"]
        pub mode: MODE,
        #[doc = "0x58 - Synchronization"]
        pub sync: SYNC,
        #[doc = "0x5c - Initial State For Channels Output"]
        pub outinit: OUTINIT,
        #[doc = "0x60 - Output Mask"]
        pub outmask: OUTMASK,
        #[doc = "0x64 - Function For Linked Channels"]
        pub combine: COMBINE,
        #[doc = "0x68 - Deadtime Configuration"]
        pub deadtime: DEADTIME,
        #[doc = "0x6c - FTM External Trigger"]
        pub exttrig: EXTTRIG,
        #[doc = "0x70 - Channels Polarity"]
        pub pol: POL,
        #[doc = "0x74 - Fault Mode Status"]
        pub fms: FMS,
        #[doc = "0x78 - Input Capture Filter Control"]
        pub filter: FILTER,
        #[doc = "0x7c - Fault Control"]
        pub fltctrl: FLTCTRL,
        #[doc = "0x80 - Quadrature Decoder Control And Status"]
        pub qdctrl: QDCTRL,
        #[doc = "0x84 - Configuration"]
        pub conf: CONF,
        #[doc = "0x88 - FTM Fault Input Polarity"]
        pub fltpol: FLTPOL,
        #[doc = "0x8c - Synchronization Configuration"]
        pub synconf: SYNCONF,
        #[doc = "0x90 - FTM Inverting Control"]
        pub invctrl: INVCTRL,
        #[doc = "0x94 - FTM Software Output Control"]
        pub swoctrl: SWOCTRL,
        #[doc = "0x98 - FTM PWM Load"]
        pub pwmload: PWMLOAD,
        #[doc = "0x9c - Half Cycle Register"]
        pub hcr: HCR,
        #[doc = "0xa0 - Pair 0 Deadtime Configuration"]
        pub pair0deadtime: PAIR0DEADTIME,
        _reserved0: [u8; 4usize],
        #[doc = "0xa8 - Pair 1 Deadtime Configuration"]
        pub pair1deadtime: PAIR1DEADTIME,
        _reserved1: [u8; 4usize],
        #[doc = "0xb0 - Pair 2 Deadtime Configuration"]
        pub pair2deadtime: PAIR2DEADTIME,
        _reserved2: [u8; 4usize],
        #[doc = "0xb8 - Pair 3 Deadtime Configuration"]
        pub pair3deadtime: PAIR3DEADTIME,
    }
    #[doc = "Status And Control"]
    pub struct SC {
        register: VolatileCell<u32>,
    }
    #[doc = "Status And Control"]
    pub mod sc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Divide by 1"]
            _000,
            #[doc = "Divide by 2"]
            _001,
            #[doc = "Divide by 4"]
            _010,
            #[doc = "Divide by 8"]
            _011,
            #[doc = "Divide by 16"]
            _100,
            #[doc = "Divide by 32"]
            _101,
            #[doc = "Divide by 64"]
            _110,
            #[doc = "Divide by 128"]
            _111,
        }
        impl PSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PSR::_000 => 0,
                    PSR::_001 => 1,
                    PSR::_010 => 2,
                    PSR::_011 => 3,
                    PSR::_100 => 4,
                    PSR::_101 => 5,
                    PSR::_110 => 6,
                    PSR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PSR {
                match value {
                    0 => PSR::_000,
                    1 => PSR::_001,
                    2 => PSR::_010,
                    3 => PSR::_011,
                    4 => PSR::_100,
                    5 => PSR::_101,
                    6 => PSR::_110,
                    7 => PSR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == PSR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == PSR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == PSR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == PSR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == PSR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == PSR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == PSR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == PSR::_111
            }
        }
        #[doc = "Possible values of the field `CLKS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CLKSR {
            #[doc = "No clock selected. This in effect disables the FTM counter."]
            _00,
            #[doc = "FTM input clock"]
            _01,
            #[doc = "Fixed frequency clock"]
            _10,
            #[doc = "External clock"]
            _11,
        }
        impl CLKSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    CLKSR::_00 => 0,
                    CLKSR::_01 => 1,
                    CLKSR::_10 => 2,
                    CLKSR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> CLKSR {
                match value {
                    0 => CLKSR::_00,
                    1 => CLKSR::_01,
                    2 => CLKSR::_10,
                    3 => CLKSR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == CLKSR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == CLKSR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == CLKSR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == CLKSR::_11
            }
        }
        #[doc = "Possible values of the field `CPWMS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CPWMSR {
            #[doc = "FTM counter operates in Up Counting mode."]
            _0,
            #[doc = "FTM counter operates in Up-Down Counting mode."]
            _1,
        }
        impl CPWMSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CPWMSR::_0 => false,
                    CPWMSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CPWMSR {
                match value {
                    false => CPWMSR::_0,
                    true => CPWMSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CPWMSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CPWMSR::_1
            }
        }
        #[doc = "Possible values of the field `RIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RIER {
            #[doc = "Reload point interrupt is disabled."]
            _0,
            #[doc = "Reload point interrupt is enabled."]
            _1,
        }
        impl RIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RIER::_0 => false,
                    RIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RIER {
                match value {
                    false => RIER::_0,
                    true => RIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RIER::_1
            }
        }
        #[doc = "Possible values of the field `RF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RFR {
            #[doc = "A selected reload point did not happen."]
            _0,
            #[doc = "A selected reload point happened."]
            _1,
        }
        impl RFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RFR::_0 => false,
                    RFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RFR {
                match value {
                    false => RFR::_0,
                    true => RFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RFR::_1
            }
        }
        #[doc = "Possible values of the field `TOIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TOIER {
            #[doc = "Disable TOF interrupts. Use software polling."]
            _0,
            #[doc = "Enable TOF interrupts. An interrupt is generated when TOF equals one."]
            _1,
        }
        impl TOIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TOIER::_0 => false,
                    TOIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TOIER {
                match value {
                    false => TOIER::_0,
                    true => TOIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TOIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TOIER::_1
            }
        }
        #[doc = "Possible values of the field `TOF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TOFR {
            #[doc = "FTM counter has not overflowed."]
            _0,
            #[doc = "FTM counter has overflowed."]
            _1,
        }
        impl TOFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TOFR::_0 => false,
                    TOFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TOFR {
                match value {
                    false => TOFR::_0,
                    true => TOFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TOFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TOFR::_1
            }
        }
        #[doc = "Possible values of the field `PWMEN0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PWMEN0R {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PWMEN0R::_0 => false,
                    PWMEN0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PWMEN0R {
                match value {
                    false => PWMEN0R::_0,
                    true => PWMEN0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PWMEN0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PWMEN0R::_1
            }
        }
        #[doc = "Possible values of the field `PWMEN1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PWMEN1R {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PWMEN1R::_0 => false,
                    PWMEN1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PWMEN1R {
                match value {
                    false => PWMEN1R::_0,
                    true => PWMEN1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PWMEN1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PWMEN1R::_1
            }
        }
        #[doc = "Possible values of the field `PWMEN2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PWMEN2R {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PWMEN2R::_0 => false,
                    PWMEN2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PWMEN2R {
                match value {
                    false => PWMEN2R::_0,
                    true => PWMEN2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PWMEN2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PWMEN2R::_1
            }
        }
        #[doc = "Possible values of the field `PWMEN3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PWMEN3R {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PWMEN3R::_0 => false,
                    PWMEN3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PWMEN3R {
                match value {
                    false => PWMEN3R::_0,
                    true => PWMEN3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PWMEN3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PWMEN3R::_1
            }
        }
        #[doc = "Possible values of the field `PWMEN4`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PWMEN4R {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN4R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PWMEN4R::_0 => false,
                    PWMEN4R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PWMEN4R {
                match value {
                    false => PWMEN4R::_0,
                    true => PWMEN4R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PWMEN4R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PWMEN4R::_1
            }
        }
        #[doc = "Possible values of the field `PWMEN5`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PWMEN5R {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN5R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PWMEN5R::_0 => false,
                    PWMEN5R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PWMEN5R {
                match value {
                    false => PWMEN5R::_0,
                    true => PWMEN5R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PWMEN5R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PWMEN5R::_1
            }
        }
        #[doc = "Possible values of the field `PWMEN6`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PWMEN6R {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN6R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PWMEN6R::_0 => false,
                    PWMEN6R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PWMEN6R {
                match value {
                    false => PWMEN6R::_0,
                    true => PWMEN6R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PWMEN6R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PWMEN6R::_1
            }
        }
        #[doc = "Possible values of the field `PWMEN7`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PWMEN7R {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN7R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PWMEN7R::_0 => false,
                    PWMEN7R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PWMEN7R {
                match value {
                    false => PWMEN7R::_0,
                    true => PWMEN7R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PWMEN7R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PWMEN7R::_1
            }
        }
        #[doc = "Possible values of the field `FLTPS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FLTPSR {
            #[doc = "Divide by 1"]
            _0000,
            #[doc = "Divide by 2"]
            _0001,
            #[doc = "Divide by 3"]
            _0010,
            #[doc = "Divide by 4"]
            _0011,
            #[doc = "Divide by 5"]
            _0100,
            #[doc = "Divide by 6"]
            _0101,
            #[doc = "Divide by 7"]
            _0110,
            #[doc = "Divide by 8"]
            _0111,
            #[doc = "Divide by 9"]
            _1000,
            #[doc = "Divide by 10"]
            _1001,
            #[doc = "Divide by 11"]
            _1010,
            #[doc = "Divide by 12"]
            _1011,
            #[doc = "Divide by 13"]
            _1100,
            #[doc = "Divide by 14"]
            _1101,
            #[doc = "Divide by 15"]
            _1110,
            #[doc = "Divide by 16"]
            _1111,
        }
        impl FLTPSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    FLTPSR::_0000 => 0,
                    FLTPSR::_0001 => 1,
                    FLTPSR::_0010 => 2,
                    FLTPSR::_0011 => 3,
                    FLTPSR::_0100 => 4,
                    FLTPSR::_0101 => 5,
                    FLTPSR::_0110 => 6,
                    FLTPSR::_0111 => 7,
                    FLTPSR::_1000 => 8,
                    FLTPSR::_1001 => 9,
                    FLTPSR::_1010 => 10,
                    FLTPSR::_1011 => 11,
                    FLTPSR::_1100 => 12,
                    FLTPSR::_1101 => 13,
                    FLTPSR::_1110 => 14,
                    FLTPSR::_1111 => 15,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> FLTPSR {
                match value {
                    0 => FLTPSR::_0000,
                    1 => FLTPSR::_0001,
                    2 => FLTPSR::_0010,
                    3 => FLTPSR::_0011,
                    4 => FLTPSR::_0100,
                    5 => FLTPSR::_0101,
                    6 => FLTPSR::_0110,
                    7 => FLTPSR::_0111,
                    8 => FLTPSR::_1000,
                    9 => FLTPSR::_1001,
                    10 => FLTPSR::_1010,
                    11 => FLTPSR::_1011,
                    12 => FLTPSR::_1100,
                    13 => FLTPSR::_1101,
                    14 => FLTPSR::_1110,
                    15 => FLTPSR::_1111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == FLTPSR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == FLTPSR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == FLTPSR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == FLTPSR::_0011
            }
            #[doc = "Checks if the value of the field is `_0100`"]
            #[inline(always)]
            pub fn is_0100(&self) -> bool {
                *self == FLTPSR::_0100
            }
            #[doc = "Checks if the value of the field is `_0101`"]
            #[inline(always)]
            pub fn is_0101(&self) -> bool {
                *self == FLTPSR::_0101
            }
            #[doc = "Checks if the value of the field is `_0110`"]
            #[inline(always)]
            pub fn is_0110(&self) -> bool {
                *self == FLTPSR::_0110
            }
            #[doc = "Checks if the value of the field is `_0111`"]
            #[inline(always)]
            pub fn is_0111(&self) -> bool {
                *self == FLTPSR::_0111
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == FLTPSR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == FLTPSR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == FLTPSR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == FLTPSR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == FLTPSR::_1100
            }
            #[doc = "Checks if the value of the field is `_1101`"]
            #[inline(always)]
            pub fn is_1101(&self) -> bool {
                *self == FLTPSR::_1101
            }
            #[doc = "Checks if the value of the field is `_1110`"]
            #[inline(always)]
            pub fn is_1110(&self) -> bool {
                *self == FLTPSR::_1110
            }
            #[doc = "Checks if the value of the field is `_1111`"]
            #[inline(always)]
            pub fn is_1111(&self) -> bool {
                *self == FLTPSR::_1111
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Divide by 1"]
            _000,
            #[doc = "Divide by 2"]
            _001,
            #[doc = "Divide by 4"]
            _010,
            #[doc = "Divide by 8"]
            _011,
            #[doc = "Divide by 16"]
            _100,
            #[doc = "Divide by 32"]
            _101,
            #[doc = "Divide by 64"]
            _110,
            #[doc = "Divide by 128"]
            _111,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PSW::_000 => 0,
                    PSW::_001 => 1,
                    PSW::_010 => 2,
                    PSW::_011 => 3,
                    PSW::_100 => 4,
                    PSW::_101 => 5,
                    PSW::_110 => 6,
                    PSW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Divide by 1"]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(PSW::_000)
            }
            #[doc = "Divide by 2"]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(PSW::_001)
            }
            #[doc = "Divide by 4"]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(PSW::_010)
            }
            #[doc = "Divide by 8"]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(PSW::_011)
            }
            #[doc = "Divide by 16"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(PSW::_100)
            }
            #[doc = "Divide by 32"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(PSW::_101)
            }
            #[doc = "Divide by 64"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(PSW::_110)
            }
            #[doc = "Divide by 128"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(PSW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CLKS`"]
        pub enum CLKSW {
            #[doc = "No clock selected. This in effect disables the FTM counter."]
            _00,
            #[doc = "FTM input clock"]
            _01,
            #[doc = "Fixed frequency clock"]
            _10,
            #[doc = "External clock"]
            _11,
        }
        impl CLKSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    CLKSW::_00 => 0,
                    CLKSW::_01 => 1,
                    CLKSW::_10 => 2,
                    CLKSW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLKSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLKSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CLKSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "No clock selected. This in effect disables the FTM counter."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(CLKSW::_00)
            }
            #[doc = "FTM input clock"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(CLKSW::_01)
            }
            #[doc = "Fixed frequency clock"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(CLKSW::_10)
            }
            #[doc = "External clock"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(CLKSW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CPWMS`"]
        pub enum CPWMSW {
            #[doc = "FTM counter operates in Up Counting mode."]
            _0,
            #[doc = "FTM counter operates in Up-Down Counting mode."]
            _1,
        }
        impl CPWMSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CPWMSW::_0 => false,
                    CPWMSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CPWMSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CPWMSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CPWMSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM counter operates in Up Counting mode."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CPWMSW::_0)
            }
            #[doc = "FTM counter operates in Up-Down Counting mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CPWMSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RIE`"]
        pub enum RIEW {
            #[doc = "Reload point interrupt is disabled."]
            _0,
            #[doc = "Reload point interrupt is enabled."]
            _1,
        }
        impl RIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RIEW::_0 => false,
                    RIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Reload point interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RIEW::_0)
            }
            #[doc = "Reload point interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TOIE`"]
        pub enum TOIEW {
            #[doc = "Disable TOF interrupts. Use software polling."]
            _0,
            #[doc = "Enable TOF interrupts. An interrupt is generated when TOF equals one."]
            _1,
        }
        impl TOIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TOIEW::_0 => false,
                    TOIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TOIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TOIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TOIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable TOF interrupts. Use software polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TOIEW::_0)
            }
            #[doc = "Enable TOF interrupts. An interrupt is generated when TOF equals one."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TOIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PWMEN0`"]
        pub enum PWMEN0W {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PWMEN0W::_0 => false,
                    PWMEN0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PWMEN0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _PWMEN0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PWMEN0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output port is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PWMEN0W::_0)
            }
            #[doc = "Channel output port is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PWMEN0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PWMEN1`"]
        pub enum PWMEN1W {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PWMEN1W::_0 => false,
                    PWMEN1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PWMEN1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _PWMEN1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PWMEN1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output port is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PWMEN1W::_0)
            }
            #[doc = "Channel output port is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PWMEN1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PWMEN2`"]
        pub enum PWMEN2W {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PWMEN2W::_0 => false,
                    PWMEN2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PWMEN2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _PWMEN2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PWMEN2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output port is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PWMEN2W::_0)
            }
            #[doc = "Channel output port is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PWMEN2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PWMEN3`"]
        pub enum PWMEN3W {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PWMEN3W::_0 => false,
                    PWMEN3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PWMEN3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _PWMEN3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PWMEN3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output port is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PWMEN3W::_0)
            }
            #[doc = "Channel output port is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PWMEN3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 19;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PWMEN4`"]
        pub enum PWMEN4W {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN4W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PWMEN4W::_0 => false,
                    PWMEN4W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PWMEN4W<'a> {
            w: &'a mut W,
        }
        impl<'a> _PWMEN4W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PWMEN4W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output port is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PWMEN4W::_0)
            }
            #[doc = "Channel output port is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PWMEN4W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PWMEN5`"]
        pub enum PWMEN5W {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN5W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PWMEN5W::_0 => false,
                    PWMEN5W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PWMEN5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _PWMEN5W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PWMEN5W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output port is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PWMEN5W::_0)
            }
            #[doc = "Channel output port is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PWMEN5W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 21;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PWMEN6`"]
        pub enum PWMEN6W {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN6W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PWMEN6W::_0 => false,
                    PWMEN6W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PWMEN6W<'a> {
            w: &'a mut W,
        }
        impl<'a> _PWMEN6W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PWMEN6W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output port is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PWMEN6W::_0)
            }
            #[doc = "Channel output port is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PWMEN6W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 22;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PWMEN7`"]
        pub enum PWMEN7W {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN7W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PWMEN7W::_0 => false,
                    PWMEN7W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PWMEN7W<'a> {
            w: &'a mut W,
        }
        impl<'a> _PWMEN7W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PWMEN7W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output port is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PWMEN7W::_0)
            }
            #[doc = "Channel output port is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PWMEN7W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 23;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FLTPS`"]
        pub enum FLTPSW {
            #[doc = "Divide by 1"]
            _0000,
            #[doc = "Divide by 2"]
            _0001,
            #[doc = "Divide by 3"]
            _0010,
            #[doc = "Divide by 4"]
            _0011,
            #[doc = "Divide by 5"]
            _0100,
            #[doc = "Divide by 6"]
            _0101,
            #[doc = "Divide by 7"]
            _0110,
            #[doc = "Divide by 8"]
            _0111,
            #[doc = "Divide by 9"]
            _1000,
            #[doc = "Divide by 10"]
            _1001,
            #[doc = "Divide by 11"]
            _1010,
            #[doc = "Divide by 12"]
            _1011,
            #[doc = "Divide by 13"]
            _1100,
            #[doc = "Divide by 14"]
            _1101,
            #[doc = "Divide by 15"]
            _1110,
            #[doc = "Divide by 16"]
            _1111,
        }
        impl FLTPSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    FLTPSW::_0000 => 0,
                    FLTPSW::_0001 => 1,
                    FLTPSW::_0010 => 2,
                    FLTPSW::_0011 => 3,
                    FLTPSW::_0100 => 4,
                    FLTPSW::_0101 => 5,
                    FLTPSW::_0110 => 6,
                    FLTPSW::_0111 => 7,
                    FLTPSW::_1000 => 8,
                    FLTPSW::_1001 => 9,
                    FLTPSW::_1010 => 10,
                    FLTPSW::_1011 => 11,
                    FLTPSW::_1100 => 12,
                    FLTPSW::_1101 => 13,
                    FLTPSW::_1110 => 14,
                    FLTPSW::_1111 => 15,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FLTPSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FLTPSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FLTPSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Divide by 1"]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(FLTPSW::_0000)
            }
            #[doc = "Divide by 2"]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(FLTPSW::_0001)
            }
            #[doc = "Divide by 3"]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(FLTPSW::_0010)
            }
            #[doc = "Divide by 4"]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(FLTPSW::_0011)
            }
            #[doc = "Divide by 5"]
            #[inline(always)]
            pub fn _0100(self) -> &'a mut W {
                self.variant(FLTPSW::_0100)
            }
            #[doc = "Divide by 6"]
            #[inline(always)]
            pub fn _0101(self) -> &'a mut W {
                self.variant(FLTPSW::_0101)
            }
            #[doc = "Divide by 7"]
            #[inline(always)]
            pub fn _0110(self) -> &'a mut W {
                self.variant(FLTPSW::_0110)
            }
            #[doc = "Divide by 8"]
            #[inline(always)]
            pub fn _0111(self) -> &'a mut W {
                self.variant(FLTPSW::_0111)
            }
            #[doc = "Divide by 9"]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(FLTPSW::_1000)
            }
            #[doc = "Divide by 10"]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(FLTPSW::_1001)
            }
            #[doc = "Divide by 11"]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(FLTPSW::_1010)
            }
            #[doc = "Divide by 12"]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(FLTPSW::_1011)
            }
            #[doc = "Divide by 13"]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(FLTPSW::_1100)
            }
            #[doc = "Divide by 14"]
            #[inline(always)]
            pub fn _1101(self) -> &'a mut W {
                self.variant(FLTPSW::_1101)
            }
            #[doc = "Divide by 15"]
            #[inline(always)]
            pub fn _1110(self) -> &'a mut W {
                self.variant(FLTPSW::_1110)
            }
            #[doc = "Divide by 16"]
            #[inline(always)]
            pub fn _1111(self) -> &'a mut W {
                self.variant(FLTPSW::_1111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:2 - Prescale Factor Selection"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 3:4 - Clock Source Selection"]
            #[inline(always)]
            pub fn clks(&self) -> CLKSR {
                CLKSR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 5 - Center-Aligned PWM Select"]
            #[inline(always)]
            pub fn cpwms(&self) -> CPWMSR {
                CPWMSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Reload Point Interrupt Enable"]
            #[inline(always)]
            pub fn rie(&self) -> RIER {
                RIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Reload Flag"]
            #[inline(always)]
            pub fn rf(&self) -> RFR {
                RFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Timer Overflow Interrupt Enable"]
            #[inline(always)]
            pub fn toie(&self) -> TOIER {
                TOIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Timer Overflow Flag"]
            #[inline(always)]
            pub fn tof(&self) -> TOFR {
                TOFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 16 - Channel 0 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen0(&self) -> PWMEN0R {
                PWMEN0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - Channel 1 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen1(&self) -> PWMEN1R {
                PWMEN1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 18 - Channel 2 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen2(&self) -> PWMEN2R {
                PWMEN2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 19 - Channel 3 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen3(&self) -> PWMEN3R {
                PWMEN3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 19;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 20 - Channel 4 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen4(&self) -> PWMEN4R {
                PWMEN4R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - Channel 5 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen5(&self) -> PWMEN5R {
                PWMEN5R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 22 - Channel 6 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen6(&self) -> PWMEN6R {
                PWMEN6R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 23 - Channel 7 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen7(&self) -> PWMEN7R {
                PWMEN7R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 24:27 - Filter Prescaler"]
            #[inline(always)]
            pub fn fltps(&self) -> FLTPSR {
                FLTPSR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:2 - Prescale Factor Selection"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bits 3:4 - Clock Source Selection"]
            #[inline(always)]
            pub fn clks(&mut self) -> _CLKSW {
                _CLKSW { w: self }
            }
            #[doc = "Bit 5 - Center-Aligned PWM Select"]
            #[inline(always)]
            pub fn cpwms(&mut self) -> _CPWMSW {
                _CPWMSW { w: self }
            }
            #[doc = "Bit 6 - Reload Point Interrupt Enable"]
            #[inline(always)]
            pub fn rie(&mut self) -> _RIEW {
                _RIEW { w: self }
            }
            #[doc = "Bit 8 - Timer Overflow Interrupt Enable"]
            #[inline(always)]
            pub fn toie(&mut self) -> _TOIEW {
                _TOIEW { w: self }
            }
            #[doc = "Bit 16 - Channel 0 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen0(&mut self) -> _PWMEN0W {
                _PWMEN0W { w: self }
            }
            #[doc = "Bit 17 - Channel 1 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen1(&mut self) -> _PWMEN1W {
                _PWMEN1W { w: self }
            }
            #[doc = "Bit 18 - Channel 2 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen2(&mut self) -> _PWMEN2W {
                _PWMEN2W { w: self }
            }
            #[doc = "Bit 19 - Channel 3 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen3(&mut self) -> _PWMEN3W {
                _PWMEN3W { w: self }
            }
            #[doc = "Bit 20 - Channel 4 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen4(&mut self) -> _PWMEN4W {
                _PWMEN4W { w: self }
            }
            #[doc = "Bit 21 - Channel 5 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen5(&mut self) -> _PWMEN5W {
                _PWMEN5W { w: self }
            }
            #[doc = "Bit 22 - Channel 6 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen6(&mut self) -> _PWMEN6W {
                _PWMEN6W { w: self }
            }
            #[doc = "Bit 23 - Channel 7 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen7(&mut self) -> _PWMEN7W {
                _PWMEN7W { w: self }
            }
            #[doc = "Bits 24:27 - Filter Prescaler"]
            #[inline(always)]
            pub fn fltps(&mut self) -> _FLTPSW {
                _FLTPSW { w: self }
            }
        }
    }
    #[doc = "Counter"]
    pub struct CNT {
        register: VolatileCell<u32>,
    }
    #[doc = "Counter"]
    pub mod cnt {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CNT {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct COUNTR {
            bits: u16,
        }
        impl COUNTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _COUNTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _COUNTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Counter Value"]
            #[inline(always)]
            pub fn count(&self) -> COUNTR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                COUNTR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Counter Value"]
            #[inline(always)]
            pub fn count(&mut self) -> _COUNTW {
                _COUNTW { w: self }
            }
        }
    }
    #[doc = "Modulo"]
    pub struct MOD {
        register: VolatileCell<u32>,
    }
    #[doc = "Modulo"]
    pub mod mod_ {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::MOD {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MODR {
            bits: u16,
        }
        impl MODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MODW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - MOD"]
            #[inline(always)]
            pub fn mod_(&self) -> MODR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                MODR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - MOD"]
            #[inline(always)]
            pub fn mod_(&mut self) -> _MODW {
                _MODW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Status And Control"]
    pub struct C0SC {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Status And Control"]
    pub mod c0sc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C0SC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DMA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMAR {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMAR::_0 => false,
                    DMAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMAR {
                match value {
                    false => DMAR::_0,
                    true => DMAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMAR::_1
            }
        }
        #[doc = "Possible values of the field `ICRST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ICRSTR {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ICRSTR::_0 => false,
                    ICRSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ICRSTR {
                match value {
                    false => ICRSTR::_0,
                    true => ICRSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ICRSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ICRSTR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSAR {
            bits: bool,
        }
        impl ELSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSBR {
            bits: bool,
        }
        impl ELSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSAR {
            bits: bool,
        }
        impl MSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSBR {
            bits: bool,
        }
        impl MSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `CHIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHIER {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHIER::_0 => false,
                    CHIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHIER {
                match value {
                    false => CHIER::_0,
                    true => CHIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHIER::_1
            }
        }
        #[doc = "Possible values of the field `CHF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHFR {
            #[doc = "No channel (n) event has occurred."]
            _0,
            #[doc = "A channel (n) event has occurred."]
            _1,
        }
        impl CHFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHFR::_0 => false,
                    CHFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHFR {
                match value {
                    false => CHFR::_0,
                    true => CHFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHFR::_1
            }
        }
        #[doc = "Possible values of the field `TRIGMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGMODER {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGMODER::_0 => false,
                    TRIGMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGMODER {
                match value {
                    false => TRIGMODER::_0,
                    true => TRIGMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGMODER::_1
            }
        }
        #[doc = "Possible values of the field `CHIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHISR {
            #[doc = "The channel (n) input is zero."]
            _0,
            #[doc = "The channel (n) input is one."]
            _1,
        }
        impl CHISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHISR::_0 => false,
                    CHISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHISR {
                match value {
                    false => CHISR::_0,
                    true => CHISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHISR::_1
            }
        }
        #[doc = "Possible values of the field `CHOV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHOVR {
            #[doc = "The channel (n) output is zero."]
            _0,
            #[doc = "The channel (n) output is one."]
            _1,
        }
        impl CHOVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHOVR::_0 => false,
                    CHOVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHOVR {
                match value {
                    false => CHOVR::_0,
                    true => CHOVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHOVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHOVR::_1
            }
        }
        #[doc = "Values that can be written to the field `DMA`"]
        pub enum DMAW {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMAW::_0 => false,
                    DMAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable DMA transfers."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMAW::_0)
            }
            #[doc = "Enable DMA transfers."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ICRST`"]
        pub enum ICRSTW {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ICRSTW::_0 => false,
                    ICRSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ICRSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ICRSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ICRSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ICRSTW::_0)
            }
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ICRSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CHIE`"]
        pub enum CHIEW {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CHIEW::_0 => false,
                    CHIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CHIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CHIEW::_0)
            }
            #[doc = "Enable channel (n) interrupt."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CHIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIGMODE`"]
        pub enum TRIGMODEW {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGMODEW::_0 => false,
                    TRIGMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGMODEW::_0)
            }
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&self) -> DMAR {
                DMAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&self) -> ICRSTR {
                ICRSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&self) -> ELSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSAR { bits }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&self) -> ELSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSBR { bits }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&self) -> MSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSAR { bits }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&self) -> MSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSBR { bits }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&self) -> CHIER {
                CHIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel (n) Flag"]
            #[inline(always)]
            pub fn chf(&self) -> CHFR {
                CHFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&self) -> TRIGMODER {
                TRIGMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Channel (n) Input State"]
            #[inline(always)]
            pub fn chis(&self) -> CHISR {
                CHISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Channel (n) Output Value"]
            #[inline(always)]
            pub fn chov(&self) -> CHOVR {
                CHOVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&mut self) -> _DMAW {
                _DMAW { w: self }
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&mut self) -> _ICRSTW {
                _ICRSTW { w: self }
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&mut self) -> _ELSAW {
                _ELSAW { w: self }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&mut self) -> _ELSBW {
                _ELSBW { w: self }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&mut self) -> _MSAW {
                _MSAW { w: self }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&mut self) -> _MSBW {
                _MSBW { w: self }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&mut self) -> _CHIEW {
                _CHIEW { w: self }
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&mut self) -> _TRIGMODEW {
                _TRIGMODEW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Value"]
    pub struct C0V {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Value"]
    pub mod c0v {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C0V {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct VALR {
            bits: u16,
        }
        impl VALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _VALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _VALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&self) -> VALR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                VALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&mut self) -> _VALW {
                _VALW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Status And Control"]
    pub struct C1SC {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Status And Control"]
    pub mod c1sc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C1SC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DMA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMAR {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMAR::_0 => false,
                    DMAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMAR {
                match value {
                    false => DMAR::_0,
                    true => DMAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMAR::_1
            }
        }
        #[doc = "Possible values of the field `ICRST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ICRSTR {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ICRSTR::_0 => false,
                    ICRSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ICRSTR {
                match value {
                    false => ICRSTR::_0,
                    true => ICRSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ICRSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ICRSTR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSAR {
            bits: bool,
        }
        impl ELSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSBR {
            bits: bool,
        }
        impl ELSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSAR {
            bits: bool,
        }
        impl MSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSBR {
            bits: bool,
        }
        impl MSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `CHIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHIER {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHIER::_0 => false,
                    CHIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHIER {
                match value {
                    false => CHIER::_0,
                    true => CHIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHIER::_1
            }
        }
        #[doc = "Possible values of the field `CHF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHFR {
            #[doc = "No channel (n) event has occurred."]
            _0,
            #[doc = "A channel (n) event has occurred."]
            _1,
        }
        impl CHFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHFR::_0 => false,
                    CHFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHFR {
                match value {
                    false => CHFR::_0,
                    true => CHFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHFR::_1
            }
        }
        #[doc = "Possible values of the field `TRIGMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGMODER {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGMODER::_0 => false,
                    TRIGMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGMODER {
                match value {
                    false => TRIGMODER::_0,
                    true => TRIGMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGMODER::_1
            }
        }
        #[doc = "Possible values of the field `CHIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHISR {
            #[doc = "The channel (n) input is zero."]
            _0,
            #[doc = "The channel (n) input is one."]
            _1,
        }
        impl CHISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHISR::_0 => false,
                    CHISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHISR {
                match value {
                    false => CHISR::_0,
                    true => CHISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHISR::_1
            }
        }
        #[doc = "Possible values of the field `CHOV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHOVR {
            #[doc = "The channel (n) output is zero."]
            _0,
            #[doc = "The channel (n) output is one."]
            _1,
        }
        impl CHOVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHOVR::_0 => false,
                    CHOVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHOVR {
                match value {
                    false => CHOVR::_0,
                    true => CHOVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHOVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHOVR::_1
            }
        }
        #[doc = "Values that can be written to the field `DMA`"]
        pub enum DMAW {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMAW::_0 => false,
                    DMAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable DMA transfers."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMAW::_0)
            }
            #[doc = "Enable DMA transfers."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ICRST`"]
        pub enum ICRSTW {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ICRSTW::_0 => false,
                    ICRSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ICRSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ICRSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ICRSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ICRSTW::_0)
            }
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ICRSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CHIE`"]
        pub enum CHIEW {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CHIEW::_0 => false,
                    CHIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CHIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CHIEW::_0)
            }
            #[doc = "Enable channel (n) interrupt."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CHIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIGMODE`"]
        pub enum TRIGMODEW {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGMODEW::_0 => false,
                    TRIGMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGMODEW::_0)
            }
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&self) -> DMAR {
                DMAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&self) -> ICRSTR {
                ICRSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&self) -> ELSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSAR { bits }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&self) -> ELSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSBR { bits }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&self) -> MSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSAR { bits }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&self) -> MSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSBR { bits }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&self) -> CHIER {
                CHIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel (n) Flag"]
            #[inline(always)]
            pub fn chf(&self) -> CHFR {
                CHFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&self) -> TRIGMODER {
                TRIGMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Channel (n) Input State"]
            #[inline(always)]
            pub fn chis(&self) -> CHISR {
                CHISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Channel (n) Output Value"]
            #[inline(always)]
            pub fn chov(&self) -> CHOVR {
                CHOVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&mut self) -> _DMAW {
                _DMAW { w: self }
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&mut self) -> _ICRSTW {
                _ICRSTW { w: self }
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&mut self) -> _ELSAW {
                _ELSAW { w: self }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&mut self) -> _ELSBW {
                _ELSBW { w: self }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&mut self) -> _MSAW {
                _MSAW { w: self }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&mut self) -> _MSBW {
                _MSBW { w: self }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&mut self) -> _CHIEW {
                _CHIEW { w: self }
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&mut self) -> _TRIGMODEW {
                _TRIGMODEW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Value"]
    pub struct C1V {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Value"]
    pub mod c1v {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C1V {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct VALR {
            bits: u16,
        }
        impl VALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _VALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _VALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&self) -> VALR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                VALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&mut self) -> _VALW {
                _VALW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Status And Control"]
    pub struct C2SC {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Status And Control"]
    pub mod c2sc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C2SC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DMA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMAR {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMAR::_0 => false,
                    DMAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMAR {
                match value {
                    false => DMAR::_0,
                    true => DMAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMAR::_1
            }
        }
        #[doc = "Possible values of the field `ICRST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ICRSTR {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ICRSTR::_0 => false,
                    ICRSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ICRSTR {
                match value {
                    false => ICRSTR::_0,
                    true => ICRSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ICRSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ICRSTR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSAR {
            bits: bool,
        }
        impl ELSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSBR {
            bits: bool,
        }
        impl ELSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSAR {
            bits: bool,
        }
        impl MSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSBR {
            bits: bool,
        }
        impl MSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `CHIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHIER {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHIER::_0 => false,
                    CHIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHIER {
                match value {
                    false => CHIER::_0,
                    true => CHIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHIER::_1
            }
        }
        #[doc = "Possible values of the field `CHF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHFR {
            #[doc = "No channel (n) event has occurred."]
            _0,
            #[doc = "A channel (n) event has occurred."]
            _1,
        }
        impl CHFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHFR::_0 => false,
                    CHFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHFR {
                match value {
                    false => CHFR::_0,
                    true => CHFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHFR::_1
            }
        }
        #[doc = "Possible values of the field `TRIGMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGMODER {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGMODER::_0 => false,
                    TRIGMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGMODER {
                match value {
                    false => TRIGMODER::_0,
                    true => TRIGMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGMODER::_1
            }
        }
        #[doc = "Possible values of the field `CHIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHISR {
            #[doc = "The channel (n) input is zero."]
            _0,
            #[doc = "The channel (n) input is one."]
            _1,
        }
        impl CHISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHISR::_0 => false,
                    CHISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHISR {
                match value {
                    false => CHISR::_0,
                    true => CHISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHISR::_1
            }
        }
        #[doc = "Possible values of the field `CHOV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHOVR {
            #[doc = "The channel (n) output is zero."]
            _0,
            #[doc = "The channel (n) output is one."]
            _1,
        }
        impl CHOVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHOVR::_0 => false,
                    CHOVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHOVR {
                match value {
                    false => CHOVR::_0,
                    true => CHOVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHOVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHOVR::_1
            }
        }
        #[doc = "Values that can be written to the field `DMA`"]
        pub enum DMAW {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMAW::_0 => false,
                    DMAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable DMA transfers."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMAW::_0)
            }
            #[doc = "Enable DMA transfers."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ICRST`"]
        pub enum ICRSTW {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ICRSTW::_0 => false,
                    ICRSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ICRSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ICRSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ICRSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ICRSTW::_0)
            }
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ICRSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CHIE`"]
        pub enum CHIEW {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CHIEW::_0 => false,
                    CHIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CHIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CHIEW::_0)
            }
            #[doc = "Enable channel (n) interrupt."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CHIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIGMODE`"]
        pub enum TRIGMODEW {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGMODEW::_0 => false,
                    TRIGMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGMODEW::_0)
            }
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&self) -> DMAR {
                DMAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&self) -> ICRSTR {
                ICRSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&self) -> ELSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSAR { bits }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&self) -> ELSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSBR { bits }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&self) -> MSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSAR { bits }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&self) -> MSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSBR { bits }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&self) -> CHIER {
                CHIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel (n) Flag"]
            #[inline(always)]
            pub fn chf(&self) -> CHFR {
                CHFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&self) -> TRIGMODER {
                TRIGMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Channel (n) Input State"]
            #[inline(always)]
            pub fn chis(&self) -> CHISR {
                CHISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Channel (n) Output Value"]
            #[inline(always)]
            pub fn chov(&self) -> CHOVR {
                CHOVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&mut self) -> _DMAW {
                _DMAW { w: self }
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&mut self) -> _ICRSTW {
                _ICRSTW { w: self }
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&mut self) -> _ELSAW {
                _ELSAW { w: self }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&mut self) -> _ELSBW {
                _ELSBW { w: self }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&mut self) -> _MSAW {
                _MSAW { w: self }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&mut self) -> _MSBW {
                _MSBW { w: self }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&mut self) -> _CHIEW {
                _CHIEW { w: self }
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&mut self) -> _TRIGMODEW {
                _TRIGMODEW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Value"]
    pub struct C2V {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Value"]
    pub mod c2v {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C2V {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct VALR {
            bits: u16,
        }
        impl VALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _VALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _VALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&self) -> VALR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                VALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&mut self) -> _VALW {
                _VALW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Status And Control"]
    pub struct C3SC {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Status And Control"]
    pub mod c3sc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C3SC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DMA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMAR {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMAR::_0 => false,
                    DMAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMAR {
                match value {
                    false => DMAR::_0,
                    true => DMAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMAR::_1
            }
        }
        #[doc = "Possible values of the field `ICRST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ICRSTR {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ICRSTR::_0 => false,
                    ICRSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ICRSTR {
                match value {
                    false => ICRSTR::_0,
                    true => ICRSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ICRSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ICRSTR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSAR {
            bits: bool,
        }
        impl ELSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSBR {
            bits: bool,
        }
        impl ELSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSAR {
            bits: bool,
        }
        impl MSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSBR {
            bits: bool,
        }
        impl MSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `CHIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHIER {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHIER::_0 => false,
                    CHIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHIER {
                match value {
                    false => CHIER::_0,
                    true => CHIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHIER::_1
            }
        }
        #[doc = "Possible values of the field `CHF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHFR {
            #[doc = "No channel (n) event has occurred."]
            _0,
            #[doc = "A channel (n) event has occurred."]
            _1,
        }
        impl CHFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHFR::_0 => false,
                    CHFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHFR {
                match value {
                    false => CHFR::_0,
                    true => CHFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHFR::_1
            }
        }
        #[doc = "Possible values of the field `TRIGMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGMODER {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGMODER::_0 => false,
                    TRIGMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGMODER {
                match value {
                    false => TRIGMODER::_0,
                    true => TRIGMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGMODER::_1
            }
        }
        #[doc = "Possible values of the field `CHIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHISR {
            #[doc = "The channel (n) input is zero."]
            _0,
            #[doc = "The channel (n) input is one."]
            _1,
        }
        impl CHISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHISR::_0 => false,
                    CHISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHISR {
                match value {
                    false => CHISR::_0,
                    true => CHISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHISR::_1
            }
        }
        #[doc = "Possible values of the field `CHOV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHOVR {
            #[doc = "The channel (n) output is zero."]
            _0,
            #[doc = "The channel (n) output is one."]
            _1,
        }
        impl CHOVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHOVR::_0 => false,
                    CHOVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHOVR {
                match value {
                    false => CHOVR::_0,
                    true => CHOVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHOVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHOVR::_1
            }
        }
        #[doc = "Values that can be written to the field `DMA`"]
        pub enum DMAW {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMAW::_0 => false,
                    DMAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable DMA transfers."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMAW::_0)
            }
            #[doc = "Enable DMA transfers."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ICRST`"]
        pub enum ICRSTW {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ICRSTW::_0 => false,
                    ICRSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ICRSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ICRSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ICRSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ICRSTW::_0)
            }
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ICRSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CHIE`"]
        pub enum CHIEW {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CHIEW::_0 => false,
                    CHIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CHIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CHIEW::_0)
            }
            #[doc = "Enable channel (n) interrupt."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CHIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIGMODE`"]
        pub enum TRIGMODEW {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGMODEW::_0 => false,
                    TRIGMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGMODEW::_0)
            }
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&self) -> DMAR {
                DMAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&self) -> ICRSTR {
                ICRSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&self) -> ELSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSAR { bits }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&self) -> ELSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSBR { bits }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&self) -> MSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSAR { bits }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&self) -> MSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSBR { bits }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&self) -> CHIER {
                CHIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel (n) Flag"]
            #[inline(always)]
            pub fn chf(&self) -> CHFR {
                CHFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&self) -> TRIGMODER {
                TRIGMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Channel (n) Input State"]
            #[inline(always)]
            pub fn chis(&self) -> CHISR {
                CHISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Channel (n) Output Value"]
            #[inline(always)]
            pub fn chov(&self) -> CHOVR {
                CHOVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&mut self) -> _DMAW {
                _DMAW { w: self }
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&mut self) -> _ICRSTW {
                _ICRSTW { w: self }
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&mut self) -> _ELSAW {
                _ELSAW { w: self }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&mut self) -> _ELSBW {
                _ELSBW { w: self }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&mut self) -> _MSAW {
                _MSAW { w: self }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&mut self) -> _MSBW {
                _MSBW { w: self }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&mut self) -> _CHIEW {
                _CHIEW { w: self }
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&mut self) -> _TRIGMODEW {
                _TRIGMODEW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Value"]
    pub struct C3V {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Value"]
    pub mod c3v {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C3V {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct VALR {
            bits: u16,
        }
        impl VALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _VALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _VALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&self) -> VALR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                VALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&mut self) -> _VALW {
                _VALW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Status And Control"]
    pub struct C4SC {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Status And Control"]
    pub mod c4sc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C4SC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DMA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMAR {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMAR::_0 => false,
                    DMAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMAR {
                match value {
                    false => DMAR::_0,
                    true => DMAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMAR::_1
            }
        }
        #[doc = "Possible values of the field `ICRST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ICRSTR {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ICRSTR::_0 => false,
                    ICRSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ICRSTR {
                match value {
                    false => ICRSTR::_0,
                    true => ICRSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ICRSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ICRSTR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSAR {
            bits: bool,
        }
        impl ELSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSBR {
            bits: bool,
        }
        impl ELSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSAR {
            bits: bool,
        }
        impl MSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSBR {
            bits: bool,
        }
        impl MSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `CHIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHIER {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHIER::_0 => false,
                    CHIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHIER {
                match value {
                    false => CHIER::_0,
                    true => CHIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHIER::_1
            }
        }
        #[doc = "Possible values of the field `CHF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHFR {
            #[doc = "No channel (n) event has occurred."]
            _0,
            #[doc = "A channel (n) event has occurred."]
            _1,
        }
        impl CHFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHFR::_0 => false,
                    CHFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHFR {
                match value {
                    false => CHFR::_0,
                    true => CHFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHFR::_1
            }
        }
        #[doc = "Possible values of the field `TRIGMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGMODER {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGMODER::_0 => false,
                    TRIGMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGMODER {
                match value {
                    false => TRIGMODER::_0,
                    true => TRIGMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGMODER::_1
            }
        }
        #[doc = "Possible values of the field `CHIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHISR {
            #[doc = "The channel (n) input is zero."]
            _0,
            #[doc = "The channel (n) input is one."]
            _1,
        }
        impl CHISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHISR::_0 => false,
                    CHISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHISR {
                match value {
                    false => CHISR::_0,
                    true => CHISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHISR::_1
            }
        }
        #[doc = "Possible values of the field `CHOV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHOVR {
            #[doc = "The channel (n) output is zero."]
            _0,
            #[doc = "The channel (n) output is one."]
            _1,
        }
        impl CHOVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHOVR::_0 => false,
                    CHOVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHOVR {
                match value {
                    false => CHOVR::_0,
                    true => CHOVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHOVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHOVR::_1
            }
        }
        #[doc = "Values that can be written to the field `DMA`"]
        pub enum DMAW {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMAW::_0 => false,
                    DMAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable DMA transfers."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMAW::_0)
            }
            #[doc = "Enable DMA transfers."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ICRST`"]
        pub enum ICRSTW {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ICRSTW::_0 => false,
                    ICRSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ICRSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ICRSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ICRSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ICRSTW::_0)
            }
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ICRSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CHIE`"]
        pub enum CHIEW {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CHIEW::_0 => false,
                    CHIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CHIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CHIEW::_0)
            }
            #[doc = "Enable channel (n) interrupt."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CHIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIGMODE`"]
        pub enum TRIGMODEW {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGMODEW::_0 => false,
                    TRIGMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGMODEW::_0)
            }
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&self) -> DMAR {
                DMAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&self) -> ICRSTR {
                ICRSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&self) -> ELSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSAR { bits }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&self) -> ELSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSBR { bits }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&self) -> MSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSAR { bits }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&self) -> MSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSBR { bits }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&self) -> CHIER {
                CHIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel (n) Flag"]
            #[inline(always)]
            pub fn chf(&self) -> CHFR {
                CHFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&self) -> TRIGMODER {
                TRIGMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Channel (n) Input State"]
            #[inline(always)]
            pub fn chis(&self) -> CHISR {
                CHISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Channel (n) Output Value"]
            #[inline(always)]
            pub fn chov(&self) -> CHOVR {
                CHOVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&mut self) -> _DMAW {
                _DMAW { w: self }
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&mut self) -> _ICRSTW {
                _ICRSTW { w: self }
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&mut self) -> _ELSAW {
                _ELSAW { w: self }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&mut self) -> _ELSBW {
                _ELSBW { w: self }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&mut self) -> _MSAW {
                _MSAW { w: self }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&mut self) -> _MSBW {
                _MSBW { w: self }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&mut self) -> _CHIEW {
                _CHIEW { w: self }
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&mut self) -> _TRIGMODEW {
                _TRIGMODEW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Value"]
    pub struct C4V {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Value"]
    pub mod c4v {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C4V {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct VALR {
            bits: u16,
        }
        impl VALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _VALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _VALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&self) -> VALR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                VALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&mut self) -> _VALW {
                _VALW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Status And Control"]
    pub struct C5SC {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Status And Control"]
    pub mod c5sc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C5SC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DMA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMAR {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMAR::_0 => false,
                    DMAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMAR {
                match value {
                    false => DMAR::_0,
                    true => DMAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMAR::_1
            }
        }
        #[doc = "Possible values of the field `ICRST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ICRSTR {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ICRSTR::_0 => false,
                    ICRSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ICRSTR {
                match value {
                    false => ICRSTR::_0,
                    true => ICRSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ICRSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ICRSTR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSAR {
            bits: bool,
        }
        impl ELSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSBR {
            bits: bool,
        }
        impl ELSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSAR {
            bits: bool,
        }
        impl MSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSBR {
            bits: bool,
        }
        impl MSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `CHIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHIER {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHIER::_0 => false,
                    CHIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHIER {
                match value {
                    false => CHIER::_0,
                    true => CHIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHIER::_1
            }
        }
        #[doc = "Possible values of the field `CHF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHFR {
            #[doc = "No channel (n) event has occurred."]
            _0,
            #[doc = "A channel (n) event has occurred."]
            _1,
        }
        impl CHFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHFR::_0 => false,
                    CHFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHFR {
                match value {
                    false => CHFR::_0,
                    true => CHFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHFR::_1
            }
        }
        #[doc = "Possible values of the field `TRIGMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGMODER {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGMODER::_0 => false,
                    TRIGMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGMODER {
                match value {
                    false => TRIGMODER::_0,
                    true => TRIGMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGMODER::_1
            }
        }
        #[doc = "Possible values of the field `CHIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHISR {
            #[doc = "The channel (n) input is zero."]
            _0,
            #[doc = "The channel (n) input is one."]
            _1,
        }
        impl CHISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHISR::_0 => false,
                    CHISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHISR {
                match value {
                    false => CHISR::_0,
                    true => CHISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHISR::_1
            }
        }
        #[doc = "Possible values of the field `CHOV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHOVR {
            #[doc = "The channel (n) output is zero."]
            _0,
            #[doc = "The channel (n) output is one."]
            _1,
        }
        impl CHOVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHOVR::_0 => false,
                    CHOVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHOVR {
                match value {
                    false => CHOVR::_0,
                    true => CHOVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHOVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHOVR::_1
            }
        }
        #[doc = "Values that can be written to the field `DMA`"]
        pub enum DMAW {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMAW::_0 => false,
                    DMAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable DMA transfers."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMAW::_0)
            }
            #[doc = "Enable DMA transfers."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ICRST`"]
        pub enum ICRSTW {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ICRSTW::_0 => false,
                    ICRSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ICRSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ICRSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ICRSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ICRSTW::_0)
            }
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ICRSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CHIE`"]
        pub enum CHIEW {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CHIEW::_0 => false,
                    CHIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CHIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CHIEW::_0)
            }
            #[doc = "Enable channel (n) interrupt."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CHIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIGMODE`"]
        pub enum TRIGMODEW {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGMODEW::_0 => false,
                    TRIGMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGMODEW::_0)
            }
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&self) -> DMAR {
                DMAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&self) -> ICRSTR {
                ICRSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&self) -> ELSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSAR { bits }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&self) -> ELSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSBR { bits }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&self) -> MSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSAR { bits }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&self) -> MSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSBR { bits }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&self) -> CHIER {
                CHIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel (n) Flag"]
            #[inline(always)]
            pub fn chf(&self) -> CHFR {
                CHFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&self) -> TRIGMODER {
                TRIGMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Channel (n) Input State"]
            #[inline(always)]
            pub fn chis(&self) -> CHISR {
                CHISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Channel (n) Output Value"]
            #[inline(always)]
            pub fn chov(&self) -> CHOVR {
                CHOVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&mut self) -> _DMAW {
                _DMAW { w: self }
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&mut self) -> _ICRSTW {
                _ICRSTW { w: self }
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&mut self) -> _ELSAW {
                _ELSAW { w: self }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&mut self) -> _ELSBW {
                _ELSBW { w: self }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&mut self) -> _MSAW {
                _MSAW { w: self }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&mut self) -> _MSBW {
                _MSBW { w: self }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&mut self) -> _CHIEW {
                _CHIEW { w: self }
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&mut self) -> _TRIGMODEW {
                _TRIGMODEW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Value"]
    pub struct C5V {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Value"]
    pub mod c5v {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C5V {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct VALR {
            bits: u16,
        }
        impl VALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _VALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _VALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&self) -> VALR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                VALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&mut self) -> _VALW {
                _VALW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Status And Control"]
    pub struct C6SC {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Status And Control"]
    pub mod c6sc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C6SC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DMA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMAR {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMAR::_0 => false,
                    DMAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMAR {
                match value {
                    false => DMAR::_0,
                    true => DMAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMAR::_1
            }
        }
        #[doc = "Possible values of the field `ICRST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ICRSTR {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ICRSTR::_0 => false,
                    ICRSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ICRSTR {
                match value {
                    false => ICRSTR::_0,
                    true => ICRSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ICRSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ICRSTR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSAR {
            bits: bool,
        }
        impl ELSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSBR {
            bits: bool,
        }
        impl ELSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSAR {
            bits: bool,
        }
        impl MSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSBR {
            bits: bool,
        }
        impl MSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `CHIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHIER {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHIER::_0 => false,
                    CHIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHIER {
                match value {
                    false => CHIER::_0,
                    true => CHIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHIER::_1
            }
        }
        #[doc = "Possible values of the field `CHF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHFR {
            #[doc = "No channel (n) event has occurred."]
            _0,
            #[doc = "A channel (n) event has occurred."]
            _1,
        }
        impl CHFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHFR::_0 => false,
                    CHFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHFR {
                match value {
                    false => CHFR::_0,
                    true => CHFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHFR::_1
            }
        }
        #[doc = "Possible values of the field `TRIGMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGMODER {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGMODER::_0 => false,
                    TRIGMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGMODER {
                match value {
                    false => TRIGMODER::_0,
                    true => TRIGMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGMODER::_1
            }
        }
        #[doc = "Possible values of the field `CHIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHISR {
            #[doc = "The channel (n) input is zero."]
            _0,
            #[doc = "The channel (n) input is one."]
            _1,
        }
        impl CHISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHISR::_0 => false,
                    CHISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHISR {
                match value {
                    false => CHISR::_0,
                    true => CHISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHISR::_1
            }
        }
        #[doc = "Possible values of the field `CHOV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHOVR {
            #[doc = "The channel (n) output is zero."]
            _0,
            #[doc = "The channel (n) output is one."]
            _1,
        }
        impl CHOVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHOVR::_0 => false,
                    CHOVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHOVR {
                match value {
                    false => CHOVR::_0,
                    true => CHOVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHOVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHOVR::_1
            }
        }
        #[doc = "Values that can be written to the field `DMA`"]
        pub enum DMAW {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMAW::_0 => false,
                    DMAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable DMA transfers."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMAW::_0)
            }
            #[doc = "Enable DMA transfers."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ICRST`"]
        pub enum ICRSTW {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ICRSTW::_0 => false,
                    ICRSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ICRSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ICRSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ICRSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ICRSTW::_0)
            }
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ICRSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CHIE`"]
        pub enum CHIEW {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CHIEW::_0 => false,
                    CHIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CHIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CHIEW::_0)
            }
            #[doc = "Enable channel (n) interrupt."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CHIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIGMODE`"]
        pub enum TRIGMODEW {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGMODEW::_0 => false,
                    TRIGMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGMODEW::_0)
            }
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&self) -> DMAR {
                DMAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&self) -> ICRSTR {
                ICRSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&self) -> ELSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSAR { bits }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&self) -> ELSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSBR { bits }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&self) -> MSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSAR { bits }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&self) -> MSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSBR { bits }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&self) -> CHIER {
                CHIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel (n) Flag"]
            #[inline(always)]
            pub fn chf(&self) -> CHFR {
                CHFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&self) -> TRIGMODER {
                TRIGMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Channel (n) Input State"]
            #[inline(always)]
            pub fn chis(&self) -> CHISR {
                CHISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Channel (n) Output Value"]
            #[inline(always)]
            pub fn chov(&self) -> CHOVR {
                CHOVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&mut self) -> _DMAW {
                _DMAW { w: self }
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&mut self) -> _ICRSTW {
                _ICRSTW { w: self }
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&mut self) -> _ELSAW {
                _ELSAW { w: self }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&mut self) -> _ELSBW {
                _ELSBW { w: self }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&mut self) -> _MSAW {
                _MSAW { w: self }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&mut self) -> _MSBW {
                _MSBW { w: self }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&mut self) -> _CHIEW {
                _CHIEW { w: self }
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&mut self) -> _TRIGMODEW {
                _TRIGMODEW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Value"]
    pub struct C6V {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Value"]
    pub mod c6v {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C6V {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct VALR {
            bits: u16,
        }
        impl VALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _VALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _VALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&self) -> VALR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                VALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&mut self) -> _VALW {
                _VALW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Status And Control"]
    pub struct C7SC {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Status And Control"]
    pub mod c7sc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C7SC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DMA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMAR {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMAR::_0 => false,
                    DMAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMAR {
                match value {
                    false => DMAR::_0,
                    true => DMAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMAR::_1
            }
        }
        #[doc = "Possible values of the field `ICRST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ICRSTR {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ICRSTR::_0 => false,
                    ICRSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ICRSTR {
                match value {
                    false => ICRSTR::_0,
                    true => ICRSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ICRSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ICRSTR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSAR {
            bits: bool,
        }
        impl ELSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSBR {
            bits: bool,
        }
        impl ELSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSAR {
            bits: bool,
        }
        impl MSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSBR {
            bits: bool,
        }
        impl MSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `CHIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHIER {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHIER::_0 => false,
                    CHIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHIER {
                match value {
                    false => CHIER::_0,
                    true => CHIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHIER::_1
            }
        }
        #[doc = "Possible values of the field `CHF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHFR {
            #[doc = "No channel (n) event has occurred."]
            _0,
            #[doc = "A channel (n) event has occurred."]
            _1,
        }
        impl CHFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHFR::_0 => false,
                    CHFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHFR {
                match value {
                    false => CHFR::_0,
                    true => CHFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHFR::_1
            }
        }
        #[doc = "Possible values of the field `TRIGMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGMODER {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGMODER::_0 => false,
                    TRIGMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGMODER {
                match value {
                    false => TRIGMODER::_0,
                    true => TRIGMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGMODER::_1
            }
        }
        #[doc = "Possible values of the field `CHIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHISR {
            #[doc = "The channel (n) input is zero."]
            _0,
            #[doc = "The channel (n) input is one."]
            _1,
        }
        impl CHISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHISR::_0 => false,
                    CHISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHISR {
                match value {
                    false => CHISR::_0,
                    true => CHISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHISR::_1
            }
        }
        #[doc = "Possible values of the field `CHOV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHOVR {
            #[doc = "The channel (n) output is zero."]
            _0,
            #[doc = "The channel (n) output is one."]
            _1,
        }
        impl CHOVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHOVR::_0 => false,
                    CHOVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHOVR {
                match value {
                    false => CHOVR::_0,
                    true => CHOVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHOVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHOVR::_1
            }
        }
        #[doc = "Values that can be written to the field `DMA`"]
        pub enum DMAW {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMAW::_0 => false,
                    DMAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable DMA transfers."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMAW::_0)
            }
            #[doc = "Enable DMA transfers."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ICRST`"]
        pub enum ICRSTW {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ICRSTW::_0 => false,
                    ICRSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ICRSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ICRSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ICRSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ICRSTW::_0)
            }
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ICRSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CHIE`"]
        pub enum CHIEW {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CHIEW::_0 => false,
                    CHIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CHIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CHIEW::_0)
            }
            #[doc = "Enable channel (n) interrupt."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CHIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIGMODE`"]
        pub enum TRIGMODEW {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGMODEW::_0 => false,
                    TRIGMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGMODEW::_0)
            }
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&self) -> DMAR {
                DMAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&self) -> ICRSTR {
                ICRSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&self) -> ELSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSAR { bits }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&self) -> ELSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSBR { bits }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&self) -> MSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSAR { bits }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&self) -> MSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSBR { bits }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&self) -> CHIER {
                CHIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel (n) Flag"]
            #[inline(always)]
            pub fn chf(&self) -> CHFR {
                CHFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&self) -> TRIGMODER {
                TRIGMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Channel (n) Input State"]
            #[inline(always)]
            pub fn chis(&self) -> CHISR {
                CHISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Channel (n) Output Value"]
            #[inline(always)]
            pub fn chov(&self) -> CHOVR {
                CHOVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&mut self) -> _DMAW {
                _DMAW { w: self }
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&mut self) -> _ICRSTW {
                _ICRSTW { w: self }
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&mut self) -> _ELSAW {
                _ELSAW { w: self }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&mut self) -> _ELSBW {
                _ELSBW { w: self }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&mut self) -> _MSAW {
                _MSAW { w: self }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&mut self) -> _MSBW {
                _MSBW { w: self }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&mut self) -> _CHIEW {
                _CHIEW { w: self }
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&mut self) -> _TRIGMODEW {
                _TRIGMODEW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Value"]
    pub struct C7V {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Value"]
    pub mod c7v {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C7V {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct VALR {
            bits: u16,
        }
        impl VALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _VALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _VALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&self) -> VALR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                VALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&mut self) -> _VALW {
                _VALW { w: self }
            }
        }
    }
    #[doc = "Counter Initial Value"]
    pub struct CNTIN {
        register: VolatileCell<u32>,
    }
    #[doc = "Counter Initial Value"]
    pub mod cntin {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CNTIN {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct INITR {
            bits: u16,
        }
        impl INITR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _INITW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INITW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - INIT"]
            #[inline(always)]
            pub fn init(&self) -> INITR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                INITR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - INIT"]
            #[inline(always)]
            pub fn init(&mut self) -> _INITW {
                _INITW { w: self }
            }
        }
    }
    #[doc = "Capture And Compare Status"]
    pub struct STATUS {
        register: VolatileCell<u32>,
    }
    #[doc = "Capture And Compare Status"]
    pub mod status {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::STATUS {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = "Possible values of the field `CH0F`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH0FR {
            #[doc = "No channel event has occurred."]
            _0,
            #[doc = "A channel event has occurred."]
            _1,
        }
        impl CH0FR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH0FR::_0 => false,
                    CH0FR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH0FR {
                match value {
                    false => CH0FR::_0,
                    true => CH0FR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH0FR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH0FR::_1
            }
        }
        #[doc = "Possible values of the field `CH1F`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH1FR {
            #[doc = "No channel event has occurred."]
            _0,
            #[doc = "A channel event has occurred."]
            _1,
        }
        impl CH1FR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH1FR::_0 => false,
                    CH1FR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH1FR {
                match value {
                    false => CH1FR::_0,
                    true => CH1FR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH1FR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH1FR::_1
            }
        }
        #[doc = "Possible values of the field `CH2F`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH2FR {
            #[doc = "No channel event has occurred."]
            _0,
            #[doc = "A channel event has occurred."]
            _1,
        }
        impl CH2FR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH2FR::_0 => false,
                    CH2FR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH2FR {
                match value {
                    false => CH2FR::_0,
                    true => CH2FR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH2FR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH2FR::_1
            }
        }
        #[doc = "Possible values of the field `CH3F`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH3FR {
            #[doc = "No channel event has occurred."]
            _0,
            #[doc = "A channel event has occurred."]
            _1,
        }
        impl CH3FR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH3FR::_0 => false,
                    CH3FR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH3FR {
                match value {
                    false => CH3FR::_0,
                    true => CH3FR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH3FR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH3FR::_1
            }
        }
        #[doc = "Possible values of the field `CH4F`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH4FR {
            #[doc = "No channel event has occurred."]
            _0,
            #[doc = "A channel event has occurred."]
            _1,
        }
        impl CH4FR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH4FR::_0 => false,
                    CH4FR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH4FR {
                match value {
                    false => CH4FR::_0,
                    true => CH4FR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH4FR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH4FR::_1
            }
        }
        #[doc = "Possible values of the field `CH5F`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH5FR {
            #[doc = "No channel event has occurred."]
            _0,
            #[doc = "A channel event has occurred."]
            _1,
        }
        impl CH5FR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH5FR::_0 => false,
                    CH5FR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH5FR {
                match value {
                    false => CH5FR::_0,
                    true => CH5FR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH5FR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH5FR::_1
            }
        }
        #[doc = "Possible values of the field `CH6F`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH6FR {
            #[doc = "No channel event has occurred."]
            _0,
            #[doc = "A channel event has occurred."]
            _1,
        }
        impl CH6FR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH6FR::_0 => false,
                    CH6FR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH6FR {
                match value {
                    false => CH6FR::_0,
                    true => CH6FR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH6FR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH6FR::_1
            }
        }
        #[doc = "Possible values of the field `CH7F`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH7FR {
            #[doc = "No channel event has occurred."]
            _0,
            #[doc = "A channel event has occurred."]
            _1,
        }
        impl CH7FR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH7FR::_0 => false,
                    CH7FR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH7FR {
                match value {
                    false => CH7FR::_0,
                    true => CH7FR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH7FR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH7FR::_1
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Channel 0 Flag"]
            #[inline(always)]
            pub fn ch0f(&self) -> CH0FR {
                CH0FR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Channel 1 Flag"]
            #[inline(always)]
            pub fn ch1f(&self) -> CH1FR {
                CH1FR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel 2 Flag"]
            #[inline(always)]
            pub fn ch2f(&self) -> CH2FR {
                CH2FR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Channel 3 Flag"]
            #[inline(always)]
            pub fn ch3f(&self) -> CH3FR {
                CH3FR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Channel 4 Flag"]
            #[inline(always)]
            pub fn ch4f(&self) -> CH4FR {
                CH4FR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Channel 5 Flag"]
            #[inline(always)]
            pub fn ch5f(&self) -> CH5FR {
                CH5FR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Channel 6 Flag"]
            #[inline(always)]
            pub fn ch6f(&self) -> CH6FR {
                CH6FR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel 7 Flag"]
            #[inline(always)]
            pub fn ch7f(&self) -> CH7FR {
                CH7FR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
    }
    #[doc = "Features Mode Selection"]
    pub struct MODE {
        register: VolatileCell<u32>,
    }
    #[doc = "Features Mode Selection"]
    pub mod mode {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::MODE {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `FTMEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FTMENR {
            #[doc = "TPM compatibility. Free running counter and synchronization compatible with TPM."]
            _0,
            #[doc = "Free running counter and synchronization are different from TPM behavior."]
            _1,
        }
        impl FTMENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FTMENR::_0 => false,
                    FTMENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FTMENR {
                match value {
                    false => FTMENR::_0,
                    true => FTMENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FTMENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FTMENR::_1
            }
        }
        #[doc = "Possible values of the field `WPDIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WPDISR {
            #[doc = "Write protection is enabled."]
            _0,
            #[doc = "Write protection is disabled."]
            _1,
        }
        impl WPDISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WPDISR::_0 => false,
                    WPDISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WPDISR {
                match value {
                    false => WPDISR::_0,
                    true => WPDISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WPDISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WPDISR::_1
            }
        }
        #[doc = "Possible values of the field `PWMSYNC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PWMSYNCR {
            #[doc = "No restrictions. Software and hardware triggers can be used by MOD, CnV, OUTMASK, and FTM counter synchronization."]
            _0,
            #[doc = "Software trigger can only be used by MOD and CnV synchronization, and hardware triggers can only be used by OUTMASK and FTM counter synchronization."]
            _1,
        }
        impl PWMSYNCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PWMSYNCR::_0 => false,
                    PWMSYNCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PWMSYNCR {
                match value {
                    false => PWMSYNCR::_0,
                    true => PWMSYNCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PWMSYNCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PWMSYNCR::_1
            }
        }
        #[doc = "Possible values of the field `CAPTEST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CAPTESTR {
            #[doc = "Capture test mode is disabled."]
            _0,
            #[doc = "Capture test mode is enabled."]
            _1,
        }
        impl CAPTESTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CAPTESTR::_0 => false,
                    CAPTESTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CAPTESTR {
                match value {
                    false => CAPTESTR::_0,
                    true => CAPTESTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CAPTESTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CAPTESTR::_1
            }
        }
        #[doc = "Possible values of the field `FAULTM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTMR {
            #[doc = "Fault control is disabled for all channels."]
            _00,
            #[doc = "Fault control is enabled for even channels only (channels 0, 2, 4, and 6), and the selected mode is the manual fault clearing."]
            _01,
            #[doc = "Fault control is enabled for all channels, and the selected mode is the manual fault clearing."]
            _10,
            #[doc = "Fault control is enabled for all channels, and the selected mode is the automatic fault clearing."]
            _11,
        }
        impl FAULTMR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    FAULTMR::_00 => 0,
                    FAULTMR::_01 => 1,
                    FAULTMR::_10 => 2,
                    FAULTMR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> FAULTMR {
                match value {
                    0 => FAULTMR::_00,
                    1 => FAULTMR::_01,
                    2 => FAULTMR::_10,
                    3 => FAULTMR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == FAULTMR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == FAULTMR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == FAULTMR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == FAULTMR::_11
            }
        }
        #[doc = "Possible values of the field `FAULTIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTIER {
            #[doc = "Fault control interrupt is disabled."]
            _0,
            #[doc = "Fault control interrupt is enabled."]
            _1,
        }
        impl FAULTIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTIER::_0 => false,
                    FAULTIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTIER {
                match value {
                    false => FAULTIER::_0,
                    true => FAULTIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTIER::_1
            }
        }
        #[doc = "Values that can be written to the field `FTMEN`"]
        pub enum FTMENW {
            #[doc = "TPM compatibility. Free running counter and synchronization compatible with TPM."]
            _0,
            #[doc = "Free running counter and synchronization are different from TPM behavior."]
            _1,
        }
        impl FTMENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FTMENW::_0 => false,
                    FTMENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FTMENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FTMENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FTMENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "TPM compatibility. Free running counter and synchronization compatible with TPM."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FTMENW::_0)
            }
            #[doc = "Free running counter and synchronization are different from TPM behavior."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FTMENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _INITW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INITW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WPDIS`"]
        pub enum WPDISW {
            #[doc = "Write protection is enabled."]
            _0,
            #[doc = "Write protection is disabled."]
            _1,
        }
        impl WPDISW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WPDISW::_0 => false,
                    WPDISW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WPDISW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WPDISW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WPDISW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Write protection is enabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WPDISW::_0)
            }
            #[doc = "Write protection is disabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WPDISW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PWMSYNC`"]
        pub enum PWMSYNCW {
            #[doc = "No restrictions. Software and hardware triggers can be used by MOD, CnV, OUTMASK, and FTM counter synchronization."]
            _0,
            #[doc = "Software trigger can only be used by MOD and CnV synchronization, and hardware triggers can only be used by OUTMASK and FTM counter synchronization."]
            _1,
        }
        impl PWMSYNCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PWMSYNCW::_0 => false,
                    PWMSYNCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PWMSYNCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PWMSYNCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PWMSYNCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No restrictions. Software and hardware triggers can be used by MOD, CnV, OUTMASK, and FTM counter synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PWMSYNCW::_0)
            }
            #[doc = "Software trigger can only be used by MOD and CnV synchronization, and hardware triggers can only be used by OUTMASK and FTM counter synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PWMSYNCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CAPTEST`"]
        pub enum CAPTESTW {
            #[doc = "Capture test mode is disabled."]
            _0,
            #[doc = "Capture test mode is enabled."]
            _1,
        }
        impl CAPTESTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CAPTESTW::_0 => false,
                    CAPTESTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CAPTESTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CAPTESTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CAPTESTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Capture test mode is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CAPTESTW::_0)
            }
            #[doc = "Capture test mode is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CAPTESTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FAULTM`"]
        pub enum FAULTMW {
            #[doc = "Fault control is disabled for all channels."]
            _00,
            #[doc = "Fault control is enabled for even channels only (channels 0, 2, 4, and 6), and the selected mode is the manual fault clearing."]
            _01,
            #[doc = "Fault control is enabled for all channels, and the selected mode is the manual fault clearing."]
            _10,
            #[doc = "Fault control is enabled for all channels, and the selected mode is the automatic fault clearing."]
            _11,
        }
        impl FAULTMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    FAULTMW::_00 => 0,
                    FAULTMW::_01 => 1,
                    FAULTMW::_10 => 2,
                    FAULTMW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FAULTMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FAULTMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FAULTMW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Fault control is disabled for all channels."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(FAULTMW::_00)
            }
            #[doc = "Fault control is enabled for even channels only (channels 0, 2, 4, and 6), and the selected mode is the manual fault clearing."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(FAULTMW::_01)
            }
            #[doc = "Fault control is enabled for all channels, and the selected mode is the manual fault clearing."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(FAULTMW::_10)
            }
            #[doc = "Fault control is enabled for all channels, and the selected mode is the automatic fault clearing."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(FAULTMW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FAULTIE`"]
        pub enum FAULTIEW {
            #[doc = "Fault control interrupt is disabled."]
            _0,
            #[doc = "Fault control interrupt is enabled."]
            _1,
        }
        impl FAULTIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FAULTIEW::_0 => false,
                    FAULTIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FAULTIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FAULTIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FAULTIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Fault control interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FAULTIEW::_0)
            }
            #[doc = "Fault control interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FAULTIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - FTM Enable"]
            #[inline(always)]
            pub fn ftmen(&self) -> FTMENR {
                FTMENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Write Protection Disable"]
            #[inline(always)]
            pub fn wpdis(&self) -> WPDISR {
                WPDISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - PWM Synchronization Mode"]
            #[inline(always)]
            pub fn pwmsync(&self) -> PWMSYNCR {
                PWMSYNCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Capture Test Mode Enable"]
            #[inline(always)]
            pub fn captest(&self) -> CAPTESTR {
                CAPTESTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 5:6 - Fault Control Mode"]
            #[inline(always)]
            pub fn faultm(&self) -> FAULTMR {
                FAULTMR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 7 - Fault Interrupt Enable"]
            #[inline(always)]
            pub fn faultie(&self) -> FAULTIER {
                FAULTIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 4 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - FTM Enable"]
            #[inline(always)]
            pub fn ftmen(&mut self) -> _FTMENW {
                _FTMENW { w: self }
            }
            #[doc = "Bit 1 - Initialize The Channels Output"]
            #[inline(always)]
            pub fn init(&mut self) -> _INITW {
                _INITW { w: self }
            }
            #[doc = "Bit 2 - Write Protection Disable"]
            #[inline(always)]
            pub fn wpdis(&mut self) -> _WPDISW {
                _WPDISW { w: self }
            }
            #[doc = "Bit 3 - PWM Synchronization Mode"]
            #[inline(always)]
            pub fn pwmsync(&mut self) -> _PWMSYNCW {
                _PWMSYNCW { w: self }
            }
            #[doc = "Bit 4 - Capture Test Mode Enable"]
            #[inline(always)]
            pub fn captest(&mut self) -> _CAPTESTW {
                _CAPTESTW { w: self }
            }
            #[doc = "Bits 5:6 - Fault Control Mode"]
            #[inline(always)]
            pub fn faultm(&mut self) -> _FAULTMW {
                _FAULTMW { w: self }
            }
            #[doc = "Bit 7 - Fault Interrupt Enable"]
            #[inline(always)]
            pub fn faultie(&mut self) -> _FAULTIEW {
                _FAULTIEW { w: self }
            }
        }
    }
    #[doc = "Synchronization"]
    pub struct SYNC {
        register: VolatileCell<u32>,
    }
    #[doc = "Synchronization"]
    pub mod sync {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SYNC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CNTMIN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CNTMINR {
            #[doc = "The minimum loading point is disabled."]
            _0,
            #[doc = "The minimum loading point is enabled."]
            _1,
        }
        impl CNTMINR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CNTMINR::_0 => false,
                    CNTMINR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CNTMINR {
                match value {
                    false => CNTMINR::_0,
                    true => CNTMINR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CNTMINR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CNTMINR::_1
            }
        }
        #[doc = "Possible values of the field `CNTMAX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CNTMAXR {
            #[doc = "The maximum loading point is disabled."]
            _0,
            #[doc = "The maximum loading point is enabled."]
            _1,
        }
        impl CNTMAXR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CNTMAXR::_0 => false,
                    CNTMAXR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CNTMAXR {
                match value {
                    false => CNTMAXR::_0,
                    true => CNTMAXR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CNTMAXR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CNTMAXR::_1
            }
        }
        #[doc = "Possible values of the field `REINIT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum REINITR {
            #[doc = "FTM counter continues to count normally."]
            _0,
            #[doc = "FTM counter is updated with its initial value when the selected trigger is detected."]
            _1,
        }
        impl REINITR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    REINITR::_0 => false,
                    REINITR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> REINITR {
                match value {
                    false => REINITR::_0,
                    true => REINITR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == REINITR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == REINITR::_1
            }
        }
        #[doc = "Possible values of the field `SYNCHOM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SYNCHOMR {
            #[doc = "OUTMASK register is updated with the value of its buffer in all rising edges of the FTM input clock."]
            _0,
            #[doc = "OUTMASK register is updated with the value of its buffer only by the PWM synchronization."]
            _1,
        }
        impl SYNCHOMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SYNCHOMR::_0 => false,
                    SYNCHOMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SYNCHOMR {
                match value {
                    false => SYNCHOMR::_0,
                    true => SYNCHOMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SYNCHOMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SYNCHOMR::_1
            }
        }
        #[doc = "Possible values of the field `TRIG0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIG0R {
            #[doc = "Trigger is disabled."]
            _0,
            #[doc = "Trigger is enabled."]
            _1,
        }
        impl TRIG0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIG0R::_0 => false,
                    TRIG0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIG0R {
                match value {
                    false => TRIG0R::_0,
                    true => TRIG0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIG0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIG0R::_1
            }
        }
        #[doc = "Possible values of the field `TRIG1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIG1R {
            #[doc = "Trigger is disabled."]
            _0,
            #[doc = "Trigger is enabled."]
            _1,
        }
        impl TRIG1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIG1R::_0 => false,
                    TRIG1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIG1R {
                match value {
                    false => TRIG1R::_0,
                    true => TRIG1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIG1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIG1R::_1
            }
        }
        #[doc = "Possible values of the field `TRIG2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIG2R {
            #[doc = "Trigger is disabled."]
            _0,
            #[doc = "Trigger is enabled."]
            _1,
        }
        impl TRIG2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIG2R::_0 => false,
                    TRIG2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIG2R {
                match value {
                    false => TRIG2R::_0,
                    true => TRIG2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIG2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIG2R::_1
            }
        }
        #[doc = "Possible values of the field `SWSYNC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SWSYNCR {
            #[doc = "Software trigger is not selected."]
            _0,
            #[doc = "Software trigger is selected."]
            _1,
        }
        impl SWSYNCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SWSYNCR::_0 => false,
                    SWSYNCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SWSYNCR {
                match value {
                    false => SWSYNCR::_0,
                    true => SWSYNCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SWSYNCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SWSYNCR::_1
            }
        }
        #[doc = "Values that can be written to the field `CNTMIN`"]
        pub enum CNTMINW {
            #[doc = "The minimum loading point is disabled."]
            _0,
            #[doc = "The minimum loading point is enabled."]
            _1,
        }
        impl CNTMINW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CNTMINW::_0 => false,
                    CNTMINW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CNTMINW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CNTMINW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CNTMINW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minimum loading point is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CNTMINW::_0)
            }
            #[doc = "The minimum loading point is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CNTMINW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CNTMAX`"]
        pub enum CNTMAXW {
            #[doc = "The maximum loading point is disabled."]
            _0,
            #[doc = "The maximum loading point is enabled."]
            _1,
        }
        impl CNTMAXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CNTMAXW::_0 => false,
                    CNTMAXW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CNTMAXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CNTMAXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CNTMAXW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The maximum loading point is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CNTMAXW::_0)
            }
            #[doc = "The maximum loading point is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CNTMAXW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `REINIT`"]
        pub enum REINITW {
            #[doc = "FTM counter continues to count normally."]
            _0,
            #[doc = "FTM counter is updated with its initial value when the selected trigger is detected."]
            _1,
        }
        impl REINITW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    REINITW::_0 => false,
                    REINITW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _REINITW<'a> {
            w: &'a mut W,
        }
        impl<'a> _REINITW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: REINITW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM counter continues to count normally."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(REINITW::_0)
            }
            #[doc = "FTM counter is updated with its initial value when the selected trigger is detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(REINITW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SYNCHOM`"]
        pub enum SYNCHOMW {
            #[doc = "OUTMASK register is updated with the value of its buffer in all rising edges of the FTM input clock."]
            _0,
            #[doc = "OUTMASK register is updated with the value of its buffer only by the PWM synchronization."]
            _1,
        }
        impl SYNCHOMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SYNCHOMW::_0 => false,
                    SYNCHOMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SYNCHOMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SYNCHOMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SYNCHOMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "OUTMASK register is updated with the value of its buffer in all rising edges of the FTM input clock."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SYNCHOMW::_0)
            }
            #[doc = "OUTMASK register is updated with the value of its buffer only by the PWM synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SYNCHOMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIG0`"]
        pub enum TRIG0W {
            #[doc = "Trigger is disabled."]
            _0,
            #[doc = "Trigger is enabled."]
            _1,
        }
        impl TRIG0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIG0W::_0 => false,
                    TRIG0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIG0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIG0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIG0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIG0W::_0)
            }
            #[doc = "Trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIG0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIG1`"]
        pub enum TRIG1W {
            #[doc = "Trigger is disabled."]
            _0,
            #[doc = "Trigger is enabled."]
            _1,
        }
        impl TRIG1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIG1W::_0 => false,
                    TRIG1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIG1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIG1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIG1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIG1W::_0)
            }
            #[doc = "Trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIG1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIG2`"]
        pub enum TRIG2W {
            #[doc = "Trigger is disabled."]
            _0,
            #[doc = "Trigger is enabled."]
            _1,
        }
        impl TRIG2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIG2W::_0 => false,
                    TRIG2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIG2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIG2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIG2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIG2W::_0)
            }
            #[doc = "Trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIG2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SWSYNC`"]
        pub enum SWSYNCW {
            #[doc = "Software trigger is not selected."]
            _0,
            #[doc = "Software trigger is selected."]
            _1,
        }
        impl SWSYNCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SWSYNCW::_0 => false,
                    SWSYNCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SWSYNCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SWSYNCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SWSYNCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Software trigger is not selected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SWSYNCW::_0)
            }
            #[doc = "Software trigger is selected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SWSYNCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Minimum Loading Point Enable"]
            #[inline(always)]
            pub fn cntmin(&self) -> CNTMINR {
                CNTMINR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Maximum Loading Point Enable"]
            #[inline(always)]
            pub fn cntmax(&self) -> CNTMAXR {
                CNTMAXR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - FTM Counter Reinitialization by Synchronization"]
            #[inline(always)]
            pub fn reinit(&self) -> REINITR {
                REINITR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Output Mask Synchronization"]
            #[inline(always)]
            pub fn synchom(&self) -> SYNCHOMR {
                SYNCHOMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - PWM Synchronization Hardware Trigger 0"]
            #[inline(always)]
            pub fn trig0(&self) -> TRIG0R {
                TRIG0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - PWM Synchronization Hardware Trigger 1"]
            #[inline(always)]
            pub fn trig1(&self) -> TRIG1R {
                TRIG1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - PWM Synchronization Hardware Trigger 2"]
            #[inline(always)]
            pub fn trig2(&self) -> TRIG2R {
                TRIG2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - PWM Synchronization Software Trigger"]
            #[inline(always)]
            pub fn swsync(&self) -> SWSYNCR {
                SWSYNCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Minimum Loading Point Enable"]
            #[inline(always)]
            pub fn cntmin(&mut self) -> _CNTMINW {
                _CNTMINW { w: self }
            }
            #[doc = "Bit 1 - Maximum Loading Point Enable"]
            #[inline(always)]
            pub fn cntmax(&mut self) -> _CNTMAXW {
                _CNTMAXW { w: self }
            }
            #[doc = "Bit 2 - FTM Counter Reinitialization by Synchronization"]
            #[inline(always)]
            pub fn reinit(&mut self) -> _REINITW {
                _REINITW { w: self }
            }
            #[doc = "Bit 3 - Output Mask Synchronization"]
            #[inline(always)]
            pub fn synchom(&mut self) -> _SYNCHOMW {
                _SYNCHOMW { w: self }
            }
            #[doc = "Bit 4 - PWM Synchronization Hardware Trigger 0"]
            #[inline(always)]
            pub fn trig0(&mut self) -> _TRIG0W {
                _TRIG0W { w: self }
            }
            #[doc = "Bit 5 - PWM Synchronization Hardware Trigger 1"]
            #[inline(always)]
            pub fn trig1(&mut self) -> _TRIG1W {
                _TRIG1W { w: self }
            }
            #[doc = "Bit 6 - PWM Synchronization Hardware Trigger 2"]
            #[inline(always)]
            pub fn trig2(&mut self) -> _TRIG2W {
                _TRIG2W { w: self }
            }
            #[doc = "Bit 7 - PWM Synchronization Software Trigger"]
            #[inline(always)]
            pub fn swsync(&mut self) -> _SWSYNCW {
                _SWSYNCW { w: self }
            }
        }
    }
    #[doc = "Initial State For Channels Output"]
    pub struct OUTINIT {
        register: VolatileCell<u32>,
    }
    #[doc = "Initial State For Channels Output"]
    pub mod outinit {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::OUTINIT {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CH0OI`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH0OIR {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH0OIR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH0OIR::_0 => false,
                    CH0OIR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH0OIR {
                match value {
                    false => CH0OIR::_0,
                    true => CH0OIR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH0OIR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH0OIR::_1
            }
        }
        #[doc = "Possible values of the field `CH1OI`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH1OIR {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH1OIR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH1OIR::_0 => false,
                    CH1OIR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH1OIR {
                match value {
                    false => CH1OIR::_0,
                    true => CH1OIR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH1OIR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH1OIR::_1
            }
        }
        #[doc = "Possible values of the field `CH2OI`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH2OIR {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH2OIR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH2OIR::_0 => false,
                    CH2OIR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH2OIR {
                match value {
                    false => CH2OIR::_0,
                    true => CH2OIR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH2OIR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH2OIR::_1
            }
        }
        #[doc = "Possible values of the field `CH3OI`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH3OIR {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH3OIR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH3OIR::_0 => false,
                    CH3OIR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH3OIR {
                match value {
                    false => CH3OIR::_0,
                    true => CH3OIR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH3OIR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH3OIR::_1
            }
        }
        #[doc = "Possible values of the field `CH4OI`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH4OIR {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH4OIR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH4OIR::_0 => false,
                    CH4OIR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH4OIR {
                match value {
                    false => CH4OIR::_0,
                    true => CH4OIR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH4OIR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH4OIR::_1
            }
        }
        #[doc = "Possible values of the field `CH5OI`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH5OIR {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH5OIR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH5OIR::_0 => false,
                    CH5OIR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH5OIR {
                match value {
                    false => CH5OIR::_0,
                    true => CH5OIR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH5OIR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH5OIR::_1
            }
        }
        #[doc = "Possible values of the field `CH6OI`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH6OIR {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH6OIR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH6OIR::_0 => false,
                    CH6OIR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH6OIR {
                match value {
                    false => CH6OIR::_0,
                    true => CH6OIR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH6OIR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH6OIR::_1
            }
        }
        #[doc = "Possible values of the field `CH7OI`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH7OIR {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH7OIR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH7OIR::_0 => false,
                    CH7OIR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH7OIR {
                match value {
                    false => CH7OIR::_0,
                    true => CH7OIR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH7OIR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH7OIR::_1
            }
        }
        #[doc = "Values that can be written to the field `CH0OI`"]
        pub enum CH0OIW {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH0OIW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH0OIW::_0 => false,
                    CH0OIW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH0OIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH0OIW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH0OIW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The initialization value is 0."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH0OIW::_0)
            }
            #[doc = "The initialization value is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH0OIW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH1OI`"]
        pub enum CH1OIW {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH1OIW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH1OIW::_0 => false,
                    CH1OIW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH1OIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH1OIW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH1OIW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The initialization value is 0."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH1OIW::_0)
            }
            #[doc = "The initialization value is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH1OIW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH2OI`"]
        pub enum CH2OIW {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH2OIW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH2OIW::_0 => false,
                    CH2OIW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH2OIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH2OIW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH2OIW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The initialization value is 0."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH2OIW::_0)
            }
            #[doc = "The initialization value is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH2OIW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH3OI`"]
        pub enum CH3OIW {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH3OIW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH3OIW::_0 => false,
                    CH3OIW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH3OIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH3OIW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH3OIW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The initialization value is 0."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH3OIW::_0)
            }
            #[doc = "The initialization value is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH3OIW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH4OI`"]
        pub enum CH4OIW {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH4OIW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH4OIW::_0 => false,
                    CH4OIW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH4OIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH4OIW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH4OIW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The initialization value is 0."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH4OIW::_0)
            }
            #[doc = "The initialization value is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH4OIW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH5OI`"]
        pub enum CH5OIW {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH5OIW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH5OIW::_0 => false,
                    CH5OIW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH5OIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH5OIW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH5OIW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The initialization value is 0."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH5OIW::_0)
            }
            #[doc = "The initialization value is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH5OIW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH6OI`"]
        pub enum CH6OIW {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH6OIW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH6OIW::_0 => false,
                    CH6OIW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH6OIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH6OIW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH6OIW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The initialization value is 0."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH6OIW::_0)
            }
            #[doc = "The initialization value is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH6OIW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH7OI`"]
        pub enum CH7OIW {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH7OIW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH7OIW::_0 => false,
                    CH7OIW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH7OIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH7OIW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH7OIW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The initialization value is 0."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH7OIW::_0)
            }
            #[doc = "The initialization value is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH7OIW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Channel 0 Output Initialization Value"]
            #[inline(always)]
            pub fn ch0oi(&self) -> CH0OIR {
                CH0OIR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Channel 1 Output Initialization Value"]
            #[inline(always)]
            pub fn ch1oi(&self) -> CH1OIR {
                CH1OIR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel 2 Output Initialization Value"]
            #[inline(always)]
            pub fn ch2oi(&self) -> CH2OIR {
                CH2OIR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Channel 3 Output Initialization Value"]
            #[inline(always)]
            pub fn ch3oi(&self) -> CH3OIR {
                CH3OIR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Channel 4 Output Initialization Value"]
            #[inline(always)]
            pub fn ch4oi(&self) -> CH4OIR {
                CH4OIR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Channel 5 Output Initialization Value"]
            #[inline(always)]
            pub fn ch5oi(&self) -> CH5OIR {
                CH5OIR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Channel 6 Output Initialization Value"]
            #[inline(always)]
            pub fn ch6oi(&self) -> CH6OIR {
                CH6OIR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel 7 Output Initialization Value"]
            #[inline(always)]
            pub fn ch7oi(&self) -> CH7OIR {
                CH7OIR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Channel 0 Output Initialization Value"]
            #[inline(always)]
            pub fn ch0oi(&mut self) -> _CH0OIW {
                _CH0OIW { w: self }
            }
            #[doc = "Bit 1 - Channel 1 Output Initialization Value"]
            #[inline(always)]
            pub fn ch1oi(&mut self) -> _CH1OIW {
                _CH1OIW { w: self }
            }
            #[doc = "Bit 2 - Channel 2 Output Initialization Value"]
            #[inline(always)]
            pub fn ch2oi(&mut self) -> _CH2OIW {
                _CH2OIW { w: self }
            }
            #[doc = "Bit 3 - Channel 3 Output Initialization Value"]
            #[inline(always)]
            pub fn ch3oi(&mut self) -> _CH3OIW {
                _CH3OIW { w: self }
            }
            #[doc = "Bit 4 - Channel 4 Output Initialization Value"]
            #[inline(always)]
            pub fn ch4oi(&mut self) -> _CH4OIW {
                _CH4OIW { w: self }
            }
            #[doc = "Bit 5 - Channel 5 Output Initialization Value"]
            #[inline(always)]
            pub fn ch5oi(&mut self) -> _CH5OIW {
                _CH5OIW { w: self }
            }
            #[doc = "Bit 6 - Channel 6 Output Initialization Value"]
            #[inline(always)]
            pub fn ch6oi(&mut self) -> _CH6OIW {
                _CH6OIW { w: self }
            }
            #[doc = "Bit 7 - Channel 7 Output Initialization Value"]
            #[inline(always)]
            pub fn ch7oi(&mut self) -> _CH7OIW {
                _CH7OIW { w: self }
            }
        }
    }
    #[doc = "Output Mask"]
    pub struct OUTMASK {
        register: VolatileCell<u32>,
    }
    #[doc = "Output Mask"]
    pub mod outmask {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::OUTMASK {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CH0OM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH0OMR {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH0OMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH0OMR::_0 => false,
                    CH0OMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH0OMR {
                match value {
                    false => CH0OMR::_0,
                    true => CH0OMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH0OMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH0OMR::_1
            }
        }
        #[doc = "Possible values of the field `CH1OM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH1OMR {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH1OMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH1OMR::_0 => false,
                    CH1OMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH1OMR {
                match value {
                    false => CH1OMR::_0,
                    true => CH1OMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH1OMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH1OMR::_1
            }
        }
        #[doc = "Possible values of the field `CH2OM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH2OMR {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH2OMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH2OMR::_0 => false,
                    CH2OMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH2OMR {
                match value {
                    false => CH2OMR::_0,
                    true => CH2OMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH2OMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH2OMR::_1
            }
        }
        #[doc = "Possible values of the field `CH3OM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH3OMR {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH3OMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH3OMR::_0 => false,
                    CH3OMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH3OMR {
                match value {
                    false => CH3OMR::_0,
                    true => CH3OMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH3OMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH3OMR::_1
            }
        }
        #[doc = "Possible values of the field `CH4OM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH4OMR {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH4OMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH4OMR::_0 => false,
                    CH4OMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH4OMR {
                match value {
                    false => CH4OMR::_0,
                    true => CH4OMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH4OMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH4OMR::_1
            }
        }
        #[doc = "Possible values of the field `CH5OM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH5OMR {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH5OMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH5OMR::_0 => false,
                    CH5OMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH5OMR {
                match value {
                    false => CH5OMR::_0,
                    true => CH5OMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH5OMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH5OMR::_1
            }
        }
        #[doc = "Possible values of the field `CH6OM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH6OMR {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH6OMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH6OMR::_0 => false,
                    CH6OMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH6OMR {
                match value {
                    false => CH6OMR::_0,
                    true => CH6OMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH6OMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH6OMR::_1
            }
        }
        #[doc = "Possible values of the field `CH7OM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH7OMR {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH7OMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH7OMR::_0 => false,
                    CH7OMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH7OMR {
                match value {
                    false => CH7OMR::_0,
                    true => CH7OMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH7OMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH7OMR::_1
            }
        }
        #[doc = "Values that can be written to the field `CH0OM`"]
        pub enum CH0OMW {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH0OMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH0OMW::_0 => false,
                    CH0OMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH0OMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH0OMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH0OMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output is not masked. It continues to operate normally."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH0OMW::_0)
            }
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH0OMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH1OM`"]
        pub enum CH1OMW {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH1OMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH1OMW::_0 => false,
                    CH1OMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH1OMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH1OMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH1OMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output is not masked. It continues to operate normally."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH1OMW::_0)
            }
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH1OMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH2OM`"]
        pub enum CH2OMW {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH2OMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH2OMW::_0 => false,
                    CH2OMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH2OMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH2OMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH2OMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output is not masked. It continues to operate normally."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH2OMW::_0)
            }
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH2OMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH3OM`"]
        pub enum CH3OMW {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH3OMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH3OMW::_0 => false,
                    CH3OMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH3OMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH3OMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH3OMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output is not masked. It continues to operate normally."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH3OMW::_0)
            }
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH3OMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH4OM`"]
        pub enum CH4OMW {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH4OMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH4OMW::_0 => false,
                    CH4OMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH4OMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH4OMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH4OMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output is not masked. It continues to operate normally."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH4OMW::_0)
            }
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH4OMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH5OM`"]
        pub enum CH5OMW {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH5OMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH5OMW::_0 => false,
                    CH5OMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH5OMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH5OMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH5OMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output is not masked. It continues to operate normally."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH5OMW::_0)
            }
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH5OMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH6OM`"]
        pub enum CH6OMW {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH6OMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH6OMW::_0 => false,
                    CH6OMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH6OMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH6OMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH6OMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output is not masked. It continues to operate normally."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH6OMW::_0)
            }
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH6OMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH7OM`"]
        pub enum CH7OMW {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH7OMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH7OMW::_0 => false,
                    CH7OMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH7OMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH7OMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH7OMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output is not masked. It continues to operate normally."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH7OMW::_0)
            }
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH7OMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Channel 0 Output Mask"]
            #[inline(always)]
            pub fn ch0om(&self) -> CH0OMR {
                CH0OMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Channel 1 Output Mask"]
            #[inline(always)]
            pub fn ch1om(&self) -> CH1OMR {
                CH1OMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel 2 Output Mask"]
            #[inline(always)]
            pub fn ch2om(&self) -> CH2OMR {
                CH2OMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Channel 3 Output Mask"]
            #[inline(always)]
            pub fn ch3om(&self) -> CH3OMR {
                CH3OMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Channel 4 Output Mask"]
            #[inline(always)]
            pub fn ch4om(&self) -> CH4OMR {
                CH4OMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Channel 5 Output Mask"]
            #[inline(always)]
            pub fn ch5om(&self) -> CH5OMR {
                CH5OMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Channel 6 Output Mask"]
            #[inline(always)]
            pub fn ch6om(&self) -> CH6OMR {
                CH6OMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel 7 Output Mask"]
            #[inline(always)]
            pub fn ch7om(&self) -> CH7OMR {
                CH7OMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Channel 0 Output Mask"]
            #[inline(always)]
            pub fn ch0om(&mut self) -> _CH0OMW {
                _CH0OMW { w: self }
            }
            #[doc = "Bit 1 - Channel 1 Output Mask"]
            #[inline(always)]
            pub fn ch1om(&mut self) -> _CH1OMW {
                _CH1OMW { w: self }
            }
            #[doc = "Bit 2 - Channel 2 Output Mask"]
            #[inline(always)]
            pub fn ch2om(&mut self) -> _CH2OMW {
                _CH2OMW { w: self }
            }
            #[doc = "Bit 3 - Channel 3 Output Mask"]
            #[inline(always)]
            pub fn ch3om(&mut self) -> _CH3OMW {
                _CH3OMW { w: self }
            }
            #[doc = "Bit 4 - Channel 4 Output Mask"]
            #[inline(always)]
            pub fn ch4om(&mut self) -> _CH4OMW {
                _CH4OMW { w: self }
            }
            #[doc = "Bit 5 - Channel 5 Output Mask"]
            #[inline(always)]
            pub fn ch5om(&mut self) -> _CH5OMW {
                _CH5OMW { w: self }
            }
            #[doc = "Bit 6 - Channel 6 Output Mask"]
            #[inline(always)]
            pub fn ch6om(&mut self) -> _CH6OMW {
                _CH6OMW { w: self }
            }
            #[doc = "Bit 7 - Channel 7 Output Mask"]
            #[inline(always)]
            pub fn ch7om(&mut self) -> _CH7OMW {
                _CH7OMW { w: self }
            }
        }
    }
    #[doc = "Function For Linked Channels"]
    pub struct COMBINE {
        register: VolatileCell<u32>,
    }
    #[doc = "Function For Linked Channels"]
    pub mod combine {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::COMBINE {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct COMBINE0R {
            bits: bool,
        }
        impl COMBINE0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `COMP0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum COMP0R {
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            _0,
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            _1,
        }
        impl COMP0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    COMP0R::_0 => false,
                    COMP0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> COMP0R {
                match value {
                    false => COMP0R::_0,
                    true => COMP0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == COMP0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == COMP0R::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct DECAPEN0R {
            bits: bool,
        }
        impl DECAPEN0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `DECAP0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DECAP0R {
            #[doc = "The dual edge captures are inactive."]
            _0,
            #[doc = "The dual edge captures are active."]
            _1,
        }
        impl DECAP0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DECAP0R::_0 => false,
                    DECAP0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DECAP0R {
                match value {
                    false => DECAP0R::_0,
                    true => DECAP0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DECAP0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DECAP0R::_1
            }
        }
        #[doc = "Possible values of the field `DTEN0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DTEN0R {
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            _0,
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            _1,
        }
        impl DTEN0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DTEN0R::_0 => false,
                    DTEN0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DTEN0R {
                match value {
                    false => DTEN0R::_0,
                    true => DTEN0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DTEN0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DTEN0R::_1
            }
        }
        #[doc = "Possible values of the field `SYNCEN0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SYNCEN0R {
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            _0,
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            _1,
        }
        impl SYNCEN0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SYNCEN0R::_0 => false,
                    SYNCEN0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SYNCEN0R {
                match value {
                    false => SYNCEN0R::_0,
                    true => SYNCEN0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SYNCEN0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SYNCEN0R::_1
            }
        }
        #[doc = "Possible values of the field `FAULTEN0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTEN0R {
            #[doc = "The fault control in this pair of channels is disabled."]
            _0,
            #[doc = "The fault control in this pair of channels is enabled."]
            _1,
        }
        impl FAULTEN0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTEN0R::_0 => false,
                    FAULTEN0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTEN0R {
                match value {
                    false => FAULTEN0R::_0,
                    true => FAULTEN0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTEN0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTEN0R::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct MCOMBINE0R {
            bits: bool,
        }
        impl MCOMBINE0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct COMBINE1R {
            bits: bool,
        }
        impl COMBINE1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `COMP1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum COMP1R {
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            _0,
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            _1,
        }
        impl COMP1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    COMP1R::_0 => false,
                    COMP1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> COMP1R {
                match value {
                    false => COMP1R::_0,
                    true => COMP1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == COMP1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == COMP1R::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct DECAPEN1R {
            bits: bool,
        }
        impl DECAPEN1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `DECAP1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DECAP1R {
            #[doc = "The dual edge captures are inactive."]
            _0,
            #[doc = "The dual edge captures are active."]
            _1,
        }
        impl DECAP1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DECAP1R::_0 => false,
                    DECAP1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DECAP1R {
                match value {
                    false => DECAP1R::_0,
                    true => DECAP1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DECAP1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DECAP1R::_1
            }
        }
        #[doc = "Possible values of the field `DTEN1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DTEN1R {
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            _0,
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            _1,
        }
        impl DTEN1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DTEN1R::_0 => false,
                    DTEN1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DTEN1R {
                match value {
                    false => DTEN1R::_0,
                    true => DTEN1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DTEN1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DTEN1R::_1
            }
        }
        #[doc = "Possible values of the field `SYNCEN1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SYNCEN1R {
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            _0,
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            _1,
        }
        impl SYNCEN1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SYNCEN1R::_0 => false,
                    SYNCEN1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SYNCEN1R {
                match value {
                    false => SYNCEN1R::_0,
                    true => SYNCEN1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SYNCEN1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SYNCEN1R::_1
            }
        }
        #[doc = "Possible values of the field `FAULTEN1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTEN1R {
            #[doc = "The fault control in this pair of channels is disabled."]
            _0,
            #[doc = "The fault control in this pair of channels is enabled."]
            _1,
        }
        impl FAULTEN1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTEN1R::_0 => false,
                    FAULTEN1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTEN1R {
                match value {
                    false => FAULTEN1R::_0,
                    true => FAULTEN1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTEN1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTEN1R::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct MCOMBINE1R {
            bits: bool,
        }
        impl MCOMBINE1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct COMBINE2R {
            bits: bool,
        }
        impl COMBINE2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `COMP2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum COMP2R {
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            _0,
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            _1,
        }
        impl COMP2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    COMP2R::_0 => false,
                    COMP2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> COMP2R {
                match value {
                    false => COMP2R::_0,
                    true => COMP2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == COMP2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == COMP2R::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct DECAPEN2R {
            bits: bool,
        }
        impl DECAPEN2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `DECAP2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DECAP2R {
            #[doc = "The dual edge captures are inactive."]
            _0,
            #[doc = "The dual edge captures are active."]
            _1,
        }
        impl DECAP2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DECAP2R::_0 => false,
                    DECAP2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DECAP2R {
                match value {
                    false => DECAP2R::_0,
                    true => DECAP2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DECAP2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DECAP2R::_1
            }
        }
        #[doc = "Possible values of the field `DTEN2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DTEN2R {
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            _0,
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            _1,
        }
        impl DTEN2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DTEN2R::_0 => false,
                    DTEN2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DTEN2R {
                match value {
                    false => DTEN2R::_0,
                    true => DTEN2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DTEN2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DTEN2R::_1
            }
        }
        #[doc = "Possible values of the field `SYNCEN2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SYNCEN2R {
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            _0,
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            _1,
        }
        impl SYNCEN2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SYNCEN2R::_0 => false,
                    SYNCEN2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SYNCEN2R {
                match value {
                    false => SYNCEN2R::_0,
                    true => SYNCEN2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SYNCEN2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SYNCEN2R::_1
            }
        }
        #[doc = "Possible values of the field `FAULTEN2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTEN2R {
            #[doc = "The fault control in this pair of channels is disabled."]
            _0,
            #[doc = "The fault control in this pair of channels is enabled."]
            _1,
        }
        impl FAULTEN2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTEN2R::_0 => false,
                    FAULTEN2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTEN2R {
                match value {
                    false => FAULTEN2R::_0,
                    true => FAULTEN2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTEN2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTEN2R::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct MCOMBINE2R {
            bits: bool,
        }
        impl MCOMBINE2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct COMBINE3R {
            bits: bool,
        }
        impl COMBINE3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `COMP3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum COMP3R {
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            _0,
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            _1,
        }
        impl COMP3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    COMP3R::_0 => false,
                    COMP3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> COMP3R {
                match value {
                    false => COMP3R::_0,
                    true => COMP3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == COMP3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == COMP3R::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct DECAPEN3R {
            bits: bool,
        }
        impl DECAPEN3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `DECAP3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DECAP3R {
            #[doc = "The dual edge captures are inactive."]
            _0,
            #[doc = "The dual edge captures are active."]
            _1,
        }
        impl DECAP3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DECAP3R::_0 => false,
                    DECAP3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DECAP3R {
                match value {
                    false => DECAP3R::_0,
                    true => DECAP3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DECAP3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DECAP3R::_1
            }
        }
        #[doc = "Possible values of the field `DTEN3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DTEN3R {
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            _0,
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            _1,
        }
        impl DTEN3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DTEN3R::_0 => false,
                    DTEN3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DTEN3R {
                match value {
                    false => DTEN3R::_0,
                    true => DTEN3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DTEN3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DTEN3R::_1
            }
        }
        #[doc = "Possible values of the field `SYNCEN3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SYNCEN3R {
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            _0,
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            _1,
        }
        impl SYNCEN3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SYNCEN3R::_0 => false,
                    SYNCEN3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SYNCEN3R {
                match value {
                    false => SYNCEN3R::_0,
                    true => SYNCEN3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SYNCEN3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SYNCEN3R::_1
            }
        }
        #[doc = "Possible values of the field `FAULTEN3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTEN3R {
            #[doc = "The fault control in this pair of channels is disabled."]
            _0,
            #[doc = "The fault control in this pair of channels is enabled."]
            _1,
        }
        impl FAULTEN3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTEN3R::_0 => false,
                    FAULTEN3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTEN3R {
                match value {
                    false => FAULTEN3R::_0,
                    true => FAULTEN3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTEN3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTEN3R::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct MCOMBINE3R {
            bits: bool,
        }
        impl MCOMBINE3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Proxy"]
        pub struct _COMBINE0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _COMBINE0W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `COMP0`"]
        pub enum COMP0W {
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            _0,
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            _1,
        }
        impl COMP0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    COMP0W::_0 => false,
                    COMP0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _COMP0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _COMP0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: COMP0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(COMP0W::_0)
            }
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(COMP0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DECAPEN0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DECAPEN0W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DECAP0`"]
        pub enum DECAP0W {
            #[doc = "The dual edge captures are inactive."]
            _0,
            #[doc = "The dual edge captures are active."]
            _1,
        }
        impl DECAP0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DECAP0W::_0 => false,
                    DECAP0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DECAP0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DECAP0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DECAP0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The dual edge captures are inactive."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DECAP0W::_0)
            }
            #[doc = "The dual edge captures are active."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DECAP0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DTEN0`"]
        pub enum DTEN0W {
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            _0,
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            _1,
        }
        impl DTEN0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DTEN0W::_0 => false,
                    DTEN0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTEN0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTEN0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DTEN0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DTEN0W::_0)
            }
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DTEN0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SYNCEN0`"]
        pub enum SYNCEN0W {
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            _0,
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            _1,
        }
        impl SYNCEN0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SYNCEN0W::_0 => false,
                    SYNCEN0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SYNCEN0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SYNCEN0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SYNCEN0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SYNCEN0W::_0)
            }
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SYNCEN0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FAULTEN0`"]
        pub enum FAULTEN0W {
            #[doc = "The fault control in this pair of channels is disabled."]
            _0,
            #[doc = "The fault control in this pair of channels is enabled."]
            _1,
        }
        impl FAULTEN0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FAULTEN0W::_0 => false,
                    FAULTEN0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FAULTEN0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _FAULTEN0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FAULTEN0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The fault control in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FAULTEN0W::_0)
            }
            #[doc = "The fault control in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FAULTEN0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MCOMBINE0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MCOMBINE0W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _COMBINE1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _COMBINE1W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `COMP1`"]
        pub enum COMP1W {
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            _0,
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            _1,
        }
        impl COMP1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    COMP1W::_0 => false,
                    COMP1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _COMP1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _COMP1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: COMP1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(COMP1W::_0)
            }
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(COMP1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DECAPEN1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DECAPEN1W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DECAP1`"]
        pub enum DECAP1W {
            #[doc = "The dual edge captures are inactive."]
            _0,
            #[doc = "The dual edge captures are active."]
            _1,
        }
        impl DECAP1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DECAP1W::_0 => false,
                    DECAP1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DECAP1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DECAP1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DECAP1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The dual edge captures are inactive."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DECAP1W::_0)
            }
            #[doc = "The dual edge captures are active."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DECAP1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DTEN1`"]
        pub enum DTEN1W {
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            _0,
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            _1,
        }
        impl DTEN1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DTEN1W::_0 => false,
                    DTEN1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTEN1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTEN1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DTEN1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DTEN1W::_0)
            }
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DTEN1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SYNCEN1`"]
        pub enum SYNCEN1W {
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            _0,
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            _1,
        }
        impl SYNCEN1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SYNCEN1W::_0 => false,
                    SYNCEN1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SYNCEN1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SYNCEN1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SYNCEN1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SYNCEN1W::_0)
            }
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SYNCEN1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FAULTEN1`"]
        pub enum FAULTEN1W {
            #[doc = "The fault control in this pair of channels is disabled."]
            _0,
            #[doc = "The fault control in this pair of channels is enabled."]
            _1,
        }
        impl FAULTEN1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FAULTEN1W::_0 => false,
                    FAULTEN1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FAULTEN1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _FAULTEN1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FAULTEN1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The fault control in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FAULTEN1W::_0)
            }
            #[doc = "The fault control in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FAULTEN1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MCOMBINE1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MCOMBINE1W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _COMBINE2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _COMBINE2W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `COMP2`"]
        pub enum COMP2W {
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            _0,
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            _1,
        }
        impl COMP2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    COMP2W::_0 => false,
                    COMP2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _COMP2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _COMP2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: COMP2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(COMP2W::_0)
            }
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(COMP2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DECAPEN2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DECAPEN2W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DECAP2`"]
        pub enum DECAP2W {
            #[doc = "The dual edge captures are inactive."]
            _0,
            #[doc = "The dual edge captures are active."]
            _1,
        }
        impl DECAP2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DECAP2W::_0 => false,
                    DECAP2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DECAP2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DECAP2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DECAP2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The dual edge captures are inactive."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DECAP2W::_0)
            }
            #[doc = "The dual edge captures are active."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DECAP2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 19;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DTEN2`"]
        pub enum DTEN2W {
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            _0,
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            _1,
        }
        impl DTEN2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DTEN2W::_0 => false,
                    DTEN2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTEN2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTEN2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DTEN2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DTEN2W::_0)
            }
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DTEN2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SYNCEN2`"]
        pub enum SYNCEN2W {
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            _0,
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            _1,
        }
        impl SYNCEN2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SYNCEN2W::_0 => false,
                    SYNCEN2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SYNCEN2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SYNCEN2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SYNCEN2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SYNCEN2W::_0)
            }
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SYNCEN2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 21;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FAULTEN2`"]
        pub enum FAULTEN2W {
            #[doc = "The fault control in this pair of channels is disabled."]
            _0,
            #[doc = "The fault control in this pair of channels is enabled."]
            _1,
        }
        impl FAULTEN2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FAULTEN2W::_0 => false,
                    FAULTEN2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FAULTEN2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _FAULTEN2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FAULTEN2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The fault control in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FAULTEN2W::_0)
            }
            #[doc = "The fault control in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FAULTEN2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 22;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MCOMBINE2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MCOMBINE2W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 23;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _COMBINE3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _COMBINE3W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `COMP3`"]
        pub enum COMP3W {
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            _0,
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            _1,
        }
        impl COMP3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    COMP3W::_0 => false,
                    COMP3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _COMP3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _COMP3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: COMP3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(COMP3W::_0)
            }
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(COMP3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 25;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DECAPEN3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DECAPEN3W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 26;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DECAP3`"]
        pub enum DECAP3W {
            #[doc = "The dual edge captures are inactive."]
            _0,
            #[doc = "The dual edge captures are active."]
            _1,
        }
        impl DECAP3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DECAP3W::_0 => false,
                    DECAP3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DECAP3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DECAP3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DECAP3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The dual edge captures are inactive."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DECAP3W::_0)
            }
            #[doc = "The dual edge captures are active."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DECAP3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 27;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DTEN3`"]
        pub enum DTEN3W {
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            _0,
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            _1,
        }
        impl DTEN3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DTEN3W::_0 => false,
                    DTEN3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTEN3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTEN3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DTEN3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DTEN3W::_0)
            }
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DTEN3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 28;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SYNCEN3`"]
        pub enum SYNCEN3W {
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            _0,
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            _1,
        }
        impl SYNCEN3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SYNCEN3W::_0 => false,
                    SYNCEN3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SYNCEN3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SYNCEN3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SYNCEN3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SYNCEN3W::_0)
            }
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SYNCEN3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 29;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FAULTEN3`"]
        pub enum FAULTEN3W {
            #[doc = "The fault control in this pair of channels is disabled."]
            _0,
            #[doc = "The fault control in this pair of channels is enabled."]
            _1,
        }
        impl FAULTEN3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FAULTEN3W::_0 => false,
                    FAULTEN3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FAULTEN3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _FAULTEN3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FAULTEN3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The fault control in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FAULTEN3W::_0)
            }
            #[doc = "The fault control in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FAULTEN3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MCOMBINE3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MCOMBINE3W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Combine Channels For n = 0"]
            #[inline(always)]
            pub fn combine0(&self) -> COMBINE0R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                COMBINE0R { bits }
            }
            #[doc = "Bit 1 - Complement Of Channel (n) For n = 0"]
            #[inline(always)]
            pub fn comp0(&self) -> COMP0R {
                COMP0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Dual Edge Capture Mode Enable For n = 0"]
            #[inline(always)]
            pub fn decapen0(&self) -> DECAPEN0R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                DECAPEN0R { bits }
            }
            #[doc = "Bit 3 - Dual Edge Capture Mode Captures For n = 0"]
            #[inline(always)]
            pub fn decap0(&self) -> DECAP0R {
                DECAP0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Deadtime Enable For n = 0"]
            #[inline(always)]
            pub fn dten0(&self) -> DTEN0R {
                DTEN0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Synchronization Enable For n = 0"]
            #[inline(always)]
            pub fn syncen0(&self) -> SYNCEN0R {
                SYNCEN0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Fault Control Enable For n = 0"]
            #[inline(always)]
            pub fn faulten0(&self) -> FAULTEN0R {
                FAULTEN0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Modified Combine Mode For n = 0"]
            #[inline(always)]
            pub fn mcombine0(&self) -> MCOMBINE0R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MCOMBINE0R { bits }
            }
            #[doc = "Bit 8 - Combine Channels For n = 2"]
            #[inline(always)]
            pub fn combine1(&self) -> COMBINE1R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                COMBINE1R { bits }
            }
            #[doc = "Bit 9 - Complement Of Channel (n) For n = 2"]
            #[inline(always)]
            pub fn comp1(&self) -> COMP1R {
                COMP1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Dual Edge Capture Mode Enable For n = 2"]
            #[inline(always)]
            pub fn decapen1(&self) -> DECAPEN1R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                DECAPEN1R { bits }
            }
            #[doc = "Bit 11 - Dual Edge Capture Mode Captures For n = 2"]
            #[inline(always)]
            pub fn decap1(&self) -> DECAP1R {
                DECAP1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Deadtime Enable For n = 2"]
            #[inline(always)]
            pub fn dten1(&self) -> DTEN1R {
                DTEN1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Synchronization Enable For n = 2"]
            #[inline(always)]
            pub fn syncen1(&self) -> SYNCEN1R {
                SYNCEN1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - Fault Control Enable For n = 2"]
            #[inline(always)]
            pub fn faulten1(&self) -> FAULTEN1R {
                FAULTEN1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - Modified Combine Mode For n = 2"]
            #[inline(always)]
            pub fn mcombine1(&self) -> MCOMBINE1R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MCOMBINE1R { bits }
            }
            #[doc = "Bit 16 - Combine Channels For n = 4"]
            #[inline(always)]
            pub fn combine2(&self) -> COMBINE2R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                COMBINE2R { bits }
            }
            #[doc = "Bit 17 - Complement Of Channel (n) For n = 4"]
            #[inline(always)]
            pub fn comp2(&self) -> COMP2R {
                COMP2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 18 - Dual Edge Capture Mode Enable For n = 4"]
            #[inline(always)]
            pub fn decapen2(&self) -> DECAPEN2R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                DECAPEN2R { bits }
            }
            #[doc = "Bit 19 - Dual Edge Capture Mode Captures For n = 4"]
            #[inline(always)]
            pub fn decap2(&self) -> DECAP2R {
                DECAP2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 19;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 20 - Deadtime Enable For n = 4"]
            #[inline(always)]
            pub fn dten2(&self) -> DTEN2R {
                DTEN2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - Synchronization Enable For n = 4"]
            #[inline(always)]
            pub fn syncen2(&self) -> SYNCEN2R {
                SYNCEN2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 22 - Fault Control Enable For n = 4"]
            #[inline(always)]
            pub fn faulten2(&self) -> FAULTEN2R {
                FAULTEN2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 23 - Modified Combine Mode For n = 4"]
            #[inline(always)]
            pub fn mcombine2(&self) -> MCOMBINE2R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MCOMBINE2R { bits }
            }
            #[doc = "Bit 24 - Combine Channels For n = 6"]
            #[inline(always)]
            pub fn combine3(&self) -> COMBINE3R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                COMBINE3R { bits }
            }
            #[doc = "Bit 25 - Complement Of Channel (n) for n = 6"]
            #[inline(always)]
            pub fn comp3(&self) -> COMP3R {
                COMP3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 25;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 26 - Dual Edge Capture Mode Enable For n = 6"]
            #[inline(always)]
            pub fn decapen3(&self) -> DECAPEN3R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 26;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                DECAPEN3R { bits }
            }
            #[doc = "Bit 27 - Dual Edge Capture Mode Captures For n = 6"]
            #[inline(always)]
            pub fn decap3(&self) -> DECAP3R {
                DECAP3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 27;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 28 - Deadtime Enable For n = 6"]
            #[inline(always)]
            pub fn dten3(&self) -> DTEN3R {
                DTEN3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 28;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 29 - Synchronization Enable For n = 6"]
            #[inline(always)]
            pub fn syncen3(&self) -> SYNCEN3R {
                SYNCEN3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 29;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 30 - Fault Control Enable For n = 6"]
            #[inline(always)]
            pub fn faulten3(&self) -> FAULTEN3R {
                FAULTEN3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Modified Combine Mode For n = 6"]
            #[inline(always)]
            pub fn mcombine3(&self) -> MCOMBINE3R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MCOMBINE3R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Combine Channels For n = 0"]
            #[inline(always)]
            pub fn combine0(&mut self) -> _COMBINE0W {
                _COMBINE0W { w: self }
            }
            #[doc = "Bit 1 - Complement Of Channel (n) For n = 0"]
            #[inline(always)]
            pub fn comp0(&mut self) -> _COMP0W {
                _COMP0W { w: self }
            }
            #[doc = "Bit 2 - Dual Edge Capture Mode Enable For n = 0"]
            #[inline(always)]
            pub fn decapen0(&mut self) -> _DECAPEN0W {
                _DECAPEN0W { w: self }
            }
            #[doc = "Bit 3 - Dual Edge Capture Mode Captures For n = 0"]
            #[inline(always)]
            pub fn decap0(&mut self) -> _DECAP0W {
                _DECAP0W { w: self }
            }
            #[doc = "Bit 4 - Deadtime Enable For n = 0"]
            #[inline(always)]
            pub fn dten0(&mut self) -> _DTEN0W {
                _DTEN0W { w: self }
            }
            #[doc = "Bit 5 - Synchronization Enable For n = 0"]
            #[inline(always)]
            pub fn syncen0(&mut self) -> _SYNCEN0W {
                _SYNCEN0W { w: self }
            }
            #[doc = "Bit 6 - Fault Control Enable For n = 0"]
            #[inline(always)]
            pub fn faulten0(&mut self) -> _FAULTEN0W {
                _FAULTEN0W { w: self }
            }
            #[doc = "Bit 7 - Modified Combine Mode For n = 0"]
            #[inline(always)]
            pub fn mcombine0(&mut self) -> _MCOMBINE0W {
                _MCOMBINE0W { w: self }
            }
            #[doc = "Bit 8 - Combine Channels For n = 2"]
            #[inline(always)]
            pub fn combine1(&mut self) -> _COMBINE1W {
                _COMBINE1W { w: self }
            }
            #[doc = "Bit 9 - Complement Of Channel (n) For n = 2"]
            #[inline(always)]
            pub fn comp1(&mut self) -> _COMP1W {
                _COMP1W { w: self }
            }
            #[doc = "Bit 10 - Dual Edge Capture Mode Enable For n = 2"]
            #[inline(always)]
            pub fn decapen1(&mut self) -> _DECAPEN1W {
                _DECAPEN1W { w: self }
            }
            #[doc = "Bit 11 - Dual Edge Capture Mode Captures For n = 2"]
            #[inline(always)]
            pub fn decap1(&mut self) -> _DECAP1W {
                _DECAP1W { w: self }
            }
            #[doc = "Bit 12 - Deadtime Enable For n = 2"]
            #[inline(always)]
            pub fn dten1(&mut self) -> _DTEN1W {
                _DTEN1W { w: self }
            }
            #[doc = "Bit 13 - Synchronization Enable For n = 2"]
            #[inline(always)]
            pub fn syncen1(&mut self) -> _SYNCEN1W {
                _SYNCEN1W { w: self }
            }
            #[doc = "Bit 14 - Fault Control Enable For n = 2"]
            #[inline(always)]
            pub fn faulten1(&mut self) -> _FAULTEN1W {
                _FAULTEN1W { w: self }
            }
            #[doc = "Bit 15 - Modified Combine Mode For n = 2"]
            #[inline(always)]
            pub fn mcombine1(&mut self) -> _MCOMBINE1W {
                _MCOMBINE1W { w: self }
            }
            #[doc = "Bit 16 - Combine Channels For n = 4"]
            #[inline(always)]
            pub fn combine2(&mut self) -> _COMBINE2W {
                _COMBINE2W { w: self }
            }
            #[doc = "Bit 17 - Complement Of Channel (n) For n = 4"]
            #[inline(always)]
            pub fn comp2(&mut self) -> _COMP2W {
                _COMP2W { w: self }
            }
            #[doc = "Bit 18 - Dual Edge Capture Mode Enable For n = 4"]
            #[inline(always)]
            pub fn decapen2(&mut self) -> _DECAPEN2W {
                _DECAPEN2W { w: self }
            }
            #[doc = "Bit 19 - Dual Edge Capture Mode Captures For n = 4"]
            #[inline(always)]
            pub fn decap2(&mut self) -> _DECAP2W {
                _DECAP2W { w: self }
            }
            #[doc = "Bit 20 - Deadtime Enable For n = 4"]
            #[inline(always)]
            pub fn dten2(&mut self) -> _DTEN2W {
                _DTEN2W { w: self }
            }
            #[doc = "Bit 21 - Synchronization Enable For n = 4"]
            #[inline(always)]
            pub fn syncen2(&mut self) -> _SYNCEN2W {
                _SYNCEN2W { w: self }
            }
            #[doc = "Bit 22 - Fault Control Enable For n = 4"]
            #[inline(always)]
            pub fn faulten2(&mut self) -> _FAULTEN2W {
                _FAULTEN2W { w: self }
            }
            #[doc = "Bit 23 - Modified Combine Mode For n = 4"]
            #[inline(always)]
            pub fn mcombine2(&mut self) -> _MCOMBINE2W {
                _MCOMBINE2W { w: self }
            }
            #[doc = "Bit 24 - Combine Channels For n = 6"]
            #[inline(always)]
            pub fn combine3(&mut self) -> _COMBINE3W {
                _COMBINE3W { w: self }
            }
            #[doc = "Bit 25 - Complement Of Channel (n) for n = 6"]
            #[inline(always)]
            pub fn comp3(&mut self) -> _COMP3W {
                _COMP3W { w: self }
            }
            #[doc = "Bit 26 - Dual Edge Capture Mode Enable For n = 6"]
            #[inline(always)]
            pub fn decapen3(&mut self) -> _DECAPEN3W {
                _DECAPEN3W { w: self }
            }
            #[doc = "Bit 27 - Dual Edge Capture Mode Captures For n = 6"]
            #[inline(always)]
            pub fn decap3(&mut self) -> _DECAP3W {
                _DECAP3W { w: self }
            }
            #[doc = "Bit 28 - Deadtime Enable For n = 6"]
            #[inline(always)]
            pub fn dten3(&mut self) -> _DTEN3W {
                _DTEN3W { w: self }
            }
            #[doc = "Bit 29 - Synchronization Enable For n = 6"]
            #[inline(always)]
            pub fn syncen3(&mut self) -> _SYNCEN3W {
                _SYNCEN3W { w: self }
            }
            #[doc = "Bit 30 - Fault Control Enable For n = 6"]
            #[inline(always)]
            pub fn faulten3(&mut self) -> _FAULTEN3W {
                _FAULTEN3W { w: self }
            }
            #[doc = "Bit 31 - Modified Combine Mode For n = 6"]
            #[inline(always)]
            pub fn mcombine3(&mut self) -> _MCOMBINE3W {
                _MCOMBINE3W { w: self }
            }
        }
    }
    #[doc = "Deadtime Configuration"]
    pub struct DEADTIME {
        register: VolatileCell<u32>,
    }
    #[doc = "Deadtime Configuration"]
    pub mod deadtime {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::DEADTIME {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DTVALR {
            bits: u8,
        }
        impl DTVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DTPS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DTPSR {
            #[doc = "Divide the FTM input clock by 1."]
            _0X,
            #[doc = "Divide the FTM input clock by 4."]
            _10,
            #[doc = "Divide the FTM input clock by 16."]
            _11,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl DTPSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    DTPSR::_0X => 0,
                    DTPSR::_10 => 2,
                    DTPSR::_11 => 3,
                    DTPSR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> DTPSR {
                match value {
                    0 => DTPSR::_0X,
                    2 => DTPSR::_10,
                    3 => DTPSR::_11,
                    i => DTPSR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0X`"]
            #[inline(always)]
            pub fn is_0x(&self) -> bool {
                *self == DTPSR::_0X
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == DTPSR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == DTPSR::_11
            }
        }
        #[doc = r" Value of the field"]
        pub struct DTVALEXR {
            bits: u8,
        }
        impl DTVALEXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DTPS`"]
        pub enum DTPSW {
            #[doc = "Divide the FTM input clock by 1."]
            _0X,
            #[doc = "Divide the FTM input clock by 4."]
            _10,
            #[doc = "Divide the FTM input clock by 16."]
            _11,
        }
        impl DTPSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    DTPSW::_0X => 0,
                    DTPSW::_10 => 2,
                    DTPSW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTPSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTPSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DTPSW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Divide the FTM input clock by 1."]
            #[inline(always)]
            pub fn _0x(self) -> &'a mut W {
                self.variant(DTPSW::_0X)
            }
            #[doc = "Divide the FTM input clock by 4."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(DTPSW::_10)
            }
            #[doc = "Divide the FTM input clock by 16."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(DTPSW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTVALEXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTVALEXW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Deadtime Value"]
            #[inline(always)]
            pub fn dtval(&self) -> DTVALR {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DTVALR { bits }
            }
            #[doc = "Bits 6:7 - Deadtime Prescaler Value"]
            #[inline(always)]
            pub fn dtps(&self) -> DTPSR {
                DTPSR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 16:19 - Extended Deadtime Value"]
            #[inline(always)]
            pub fn dtvalex(&self) -> DTVALEXR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DTVALEXR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - Deadtime Value"]
            #[inline(always)]
            pub fn dtval(&mut self) -> _DTVALW {
                _DTVALW { w: self }
            }
            #[doc = "Bits 6:7 - Deadtime Prescaler Value"]
            #[inline(always)]
            pub fn dtps(&mut self) -> _DTPSW {
                _DTPSW { w: self }
            }
            #[doc = "Bits 16:19 - Extended Deadtime Value"]
            #[inline(always)]
            pub fn dtvalex(&mut self) -> _DTVALEXW {
                _DTVALEXW { w: self }
            }
        }
    }
    #[doc = "FTM External Trigger"]
    pub struct EXTTRIG {
        register: VolatileCell<u32>,
    }
    #[doc = "FTM External Trigger"]
    pub mod exttrig {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EXTTRIG {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CH2TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH2TRIGR {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH2TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH2TRIGR::_0 => false,
                    CH2TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH2TRIGR {
                match value {
                    false => CH2TRIGR::_0,
                    true => CH2TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH2TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH2TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `CH3TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH3TRIGR {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH3TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH3TRIGR::_0 => false,
                    CH3TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH3TRIGR {
                match value {
                    false => CH3TRIGR::_0,
                    true => CH3TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH3TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH3TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `CH4TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH4TRIGR {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH4TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH4TRIGR::_0 => false,
                    CH4TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH4TRIGR {
                match value {
                    false => CH4TRIGR::_0,
                    true => CH4TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH4TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH4TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `CH5TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH5TRIGR {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH5TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH5TRIGR::_0 => false,
                    CH5TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH5TRIGR {
                match value {
                    false => CH5TRIGR::_0,
                    true => CH5TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH5TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH5TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `CH0TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH0TRIGR {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH0TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH0TRIGR::_0 => false,
                    CH0TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH0TRIGR {
                match value {
                    false => CH0TRIGR::_0,
                    true => CH0TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH0TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH0TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `CH1TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH1TRIGR {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH1TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH1TRIGR::_0 => false,
                    CH1TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH1TRIGR {
                match value {
                    false => CH1TRIGR::_0,
                    true => CH1TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH1TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH1TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `INITTRIGEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INITTRIGENR {
            #[doc = "The generation of initialization trigger is disabled."]
            _0,
            #[doc = "The generation of initialization trigger is enabled."]
            _1,
        }
        impl INITTRIGENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INITTRIGENR::_0 => false,
                    INITTRIGENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INITTRIGENR {
                match value {
                    false => INITTRIGENR::_0,
                    true => INITTRIGENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INITTRIGENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INITTRIGENR::_1
            }
        }
        #[doc = "Possible values of the field `TRIGF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGFR {
            #[doc = "No channel trigger was generated."]
            _0,
            #[doc = "A channel trigger was generated."]
            _1,
        }
        impl TRIGFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGFR::_0 => false,
                    TRIGFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGFR {
                match value {
                    false => TRIGFR::_0,
                    true => TRIGFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGFR::_1
            }
        }
        #[doc = "Possible values of the field `CH6TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH6TRIGR {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH6TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH6TRIGR::_0 => false,
                    CH6TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH6TRIGR {
                match value {
                    false => CH6TRIGR::_0,
                    true => CH6TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH6TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH6TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `CH7TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH7TRIGR {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH7TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH7TRIGR::_0 => false,
                    CH7TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH7TRIGR {
                match value {
                    false => CH7TRIGR::_0,
                    true => CH7TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH7TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH7TRIGR::_1
            }
        }
        #[doc = "Values that can be written to the field `CH2TRIG`"]
        pub enum CH2TRIGW {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH2TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH2TRIGW::_0 => false,
                    CH2TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH2TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH2TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH2TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The generation of this external trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH2TRIGW::_0)
            }
            #[doc = "The generation of this external trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH2TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH3TRIG`"]
        pub enum CH3TRIGW {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH3TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH3TRIGW::_0 => false,
                    CH3TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH3TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH3TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH3TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The generation of this external trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH3TRIGW::_0)
            }
            #[doc = "The generation of this external trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH3TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH4TRIG`"]
        pub enum CH4TRIGW {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH4TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH4TRIGW::_0 => false,
                    CH4TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH4TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH4TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH4TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The generation of this external trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH4TRIGW::_0)
            }
            #[doc = "The generation of this external trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH4TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH5TRIG`"]
        pub enum CH5TRIGW {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH5TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH5TRIGW::_0 => false,
                    CH5TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH5TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH5TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH5TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The generation of this external trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH5TRIGW::_0)
            }
            #[doc = "The generation of this external trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH5TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH0TRIG`"]
        pub enum CH0TRIGW {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH0TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH0TRIGW::_0 => false,
                    CH0TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH0TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH0TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH0TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The generation of this external trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH0TRIGW::_0)
            }
            #[doc = "The generation of this external trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH0TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH1TRIG`"]
        pub enum CH1TRIGW {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH1TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH1TRIGW::_0 => false,
                    CH1TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH1TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH1TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH1TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The generation of this external trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH1TRIGW::_0)
            }
            #[doc = "The generation of this external trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH1TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INITTRIGEN`"]
        pub enum INITTRIGENW {
            #[doc = "The generation of initialization trigger is disabled."]
            _0,
            #[doc = "The generation of initialization trigger is enabled."]
            _1,
        }
        impl INITTRIGENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INITTRIGENW::_0 => false,
                    INITTRIGENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INITTRIGENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INITTRIGENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INITTRIGENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The generation of initialization trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INITTRIGENW::_0)
            }
            #[doc = "The generation of initialization trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INITTRIGENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH6TRIG`"]
        pub enum CH6TRIGW {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH6TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH6TRIGW::_0 => false,
                    CH6TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH6TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH6TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH6TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The generation of this external trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH6TRIGW::_0)
            }
            #[doc = "The generation of this external trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH6TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH7TRIG`"]
        pub enum CH7TRIGW {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH7TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH7TRIGW::_0 => false,
                    CH7TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH7TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH7TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH7TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The generation of this external trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH7TRIGW::_0)
            }
            #[doc = "The generation of this external trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH7TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Channel 2 External Trigger Enable"]
            #[inline(always)]
            pub fn ch2trig(&self) -> CH2TRIGR {
                CH2TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Channel 3 External Trigger Enable"]
            #[inline(always)]
            pub fn ch3trig(&self) -> CH3TRIGR {
                CH3TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel 4 External Trigger Enable"]
            #[inline(always)]
            pub fn ch4trig(&self) -> CH4TRIGR {
                CH4TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Channel 5 External Trigger Enable"]
            #[inline(always)]
            pub fn ch5trig(&self) -> CH5TRIGR {
                CH5TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Channel 0 External Trigger Enable"]
            #[inline(always)]
            pub fn ch0trig(&self) -> CH0TRIGR {
                CH0TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Channel 1 External Trigger Enable"]
            #[inline(always)]
            pub fn ch1trig(&self) -> CH1TRIGR {
                CH1TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Initialization Trigger Enable"]
            #[inline(always)]
            pub fn inittrigen(&self) -> INITTRIGENR {
                INITTRIGENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel Trigger Flag"]
            #[inline(always)]
            pub fn trigf(&self) -> TRIGFR {
                TRIGFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Channel 6 External Trigger Enable"]
            #[inline(always)]
            pub fn ch6trig(&self) -> CH6TRIGR {
                CH6TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Channel 7 External Trigger Enable"]
            #[inline(always)]
            pub fn ch7trig(&self) -> CH7TRIGR {
                CH7TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Channel 2 External Trigger Enable"]
            #[inline(always)]
            pub fn ch2trig(&mut self) -> _CH2TRIGW {
                _CH2TRIGW { w: self }
            }
            #[doc = "Bit 1 - Channel 3 External Trigger Enable"]
            #[inline(always)]
            pub fn ch3trig(&mut self) -> _CH3TRIGW {
                _CH3TRIGW { w: self }
            }
            #[doc = "Bit 2 - Channel 4 External Trigger Enable"]
            #[inline(always)]
            pub fn ch4trig(&mut self) -> _CH4TRIGW {
                _CH4TRIGW { w: self }
            }
            #[doc = "Bit 3 - Channel 5 External Trigger Enable"]
            #[inline(always)]
            pub fn ch5trig(&mut self) -> _CH5TRIGW {
                _CH5TRIGW { w: self }
            }
            #[doc = "Bit 4 - Channel 0 External Trigger Enable"]
            #[inline(always)]
            pub fn ch0trig(&mut self) -> _CH0TRIGW {
                _CH0TRIGW { w: self }
            }
            #[doc = "Bit 5 - Channel 1 External Trigger Enable"]
            #[inline(always)]
            pub fn ch1trig(&mut self) -> _CH1TRIGW {
                _CH1TRIGW { w: self }
            }
            #[doc = "Bit 6 - Initialization Trigger Enable"]
            #[inline(always)]
            pub fn inittrigen(&mut self) -> _INITTRIGENW {
                _INITTRIGENW { w: self }
            }
            #[doc = "Bit 8 - Channel 6 External Trigger Enable"]
            #[inline(always)]
            pub fn ch6trig(&mut self) -> _CH6TRIGW {
                _CH6TRIGW { w: self }
            }
            #[doc = "Bit 9 - Channel 7 External Trigger Enable"]
            #[inline(always)]
            pub fn ch7trig(&mut self) -> _CH7TRIGW {
                _CH7TRIGW { w: self }
            }
        }
    }
    #[doc = "Channels Polarity"]
    pub struct POL {
        register: VolatileCell<u32>,
    }
    #[doc = "Channels Polarity"]
    pub mod pol {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::POL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `POL0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum POL0R {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    POL0R::_0 => false,
                    POL0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> POL0R {
                match value {
                    false => POL0R::_0,
                    true => POL0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == POL0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == POL0R::_1
            }
        }
        #[doc = "Possible values of the field `POL1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum POL1R {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    POL1R::_0 => false,
                    POL1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> POL1R {
                match value {
                    false => POL1R::_0,
                    true => POL1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == POL1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == POL1R::_1
            }
        }
        #[doc = "Possible values of the field `POL2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum POL2R {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    POL2R::_0 => false,
                    POL2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> POL2R {
                match value {
                    false => POL2R::_0,
                    true => POL2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == POL2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == POL2R::_1
            }
        }
        #[doc = "Possible values of the field `POL3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum POL3R {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    POL3R::_0 => false,
                    POL3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> POL3R {
                match value {
                    false => POL3R::_0,
                    true => POL3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == POL3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == POL3R::_1
            }
        }
        #[doc = "Possible values of the field `POL4`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum POL4R {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL4R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    POL4R::_0 => false,
                    POL4R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> POL4R {
                match value {
                    false => POL4R::_0,
                    true => POL4R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == POL4R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == POL4R::_1
            }
        }
        #[doc = "Possible values of the field `POL5`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum POL5R {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL5R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    POL5R::_0 => false,
                    POL5R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> POL5R {
                match value {
                    false => POL5R::_0,
                    true => POL5R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == POL5R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == POL5R::_1
            }
        }
        #[doc = "Possible values of the field `POL6`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum POL6R {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL6R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    POL6R::_0 => false,
                    POL6R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> POL6R {
                match value {
                    false => POL6R::_0,
                    true => POL6R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == POL6R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == POL6R::_1
            }
        }
        #[doc = "Possible values of the field `POL7`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum POL7R {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL7R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    POL7R::_0 => false,
                    POL7R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> POL7R {
                match value {
                    false => POL7R::_0,
                    true => POL7R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == POL7R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == POL7R::_1
            }
        }
        #[doc = "Values that can be written to the field `POL0`"]
        pub enum POL0W {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    POL0W::_0 => false,
                    POL0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _POL0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _POL0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: POL0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel polarity is active high."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(POL0W::_0)
            }
            #[doc = "The channel polarity is active low."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(POL0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `POL1`"]
        pub enum POL1W {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    POL1W::_0 => false,
                    POL1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _POL1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _POL1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: POL1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel polarity is active high."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(POL1W::_0)
            }
            #[doc = "The channel polarity is active low."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(POL1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `POL2`"]
        pub enum POL2W {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    POL2W::_0 => false,
                    POL2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _POL2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _POL2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: POL2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel polarity is active high."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(POL2W::_0)
            }
            #[doc = "The channel polarity is active low."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(POL2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `POL3`"]
        pub enum POL3W {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    POL3W::_0 => false,
                    POL3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _POL3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _POL3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: POL3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel polarity is active high."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(POL3W::_0)
            }
            #[doc = "The channel polarity is active low."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(POL3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `POL4`"]
        pub enum POL4W {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL4W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    POL4W::_0 => false,
                    POL4W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _POL4W<'a> {
            w: &'a mut W,
        }
        impl<'a> _POL4W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: POL4W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel polarity is active high."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(POL4W::_0)
            }
            #[doc = "The channel polarity is active low."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(POL4W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `POL5`"]
        pub enum POL5W {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL5W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    POL5W::_0 => false,
                    POL5W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _POL5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _POL5W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: POL5W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel polarity is active high."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(POL5W::_0)
            }
            #[doc = "The channel polarity is active low."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(POL5W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `POL6`"]
        pub enum POL6W {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL6W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    POL6W::_0 => false,
                    POL6W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _POL6W<'a> {
            w: &'a mut W,
        }
        impl<'a> _POL6W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: POL6W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel polarity is active high."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(POL6W::_0)
            }
            #[doc = "The channel polarity is active low."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(POL6W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `POL7`"]
        pub enum POL7W {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL7W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    POL7W::_0 => false,
                    POL7W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _POL7W<'a> {
            w: &'a mut W,
        }
        impl<'a> _POL7W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: POL7W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel polarity is active high."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(POL7W::_0)
            }
            #[doc = "The channel polarity is active low."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(POL7W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Channel 0 Polarity"]
            #[inline(always)]
            pub fn pol0(&self) -> POL0R {
                POL0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Channel 1 Polarity"]
            #[inline(always)]
            pub fn pol1(&self) -> POL1R {
                POL1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel 2 Polarity"]
            #[inline(always)]
            pub fn pol2(&self) -> POL2R {
                POL2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Channel 3 Polarity"]
            #[inline(always)]
            pub fn pol3(&self) -> POL3R {
                POL3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Channel 4 Polarity"]
            #[inline(always)]
            pub fn pol4(&self) -> POL4R {
                POL4R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Channel 5 Polarity"]
            #[inline(always)]
            pub fn pol5(&self) -> POL5R {
                POL5R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Channel 6 Polarity"]
            #[inline(always)]
            pub fn pol6(&self) -> POL6R {
                POL6R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel 7 Polarity"]
            #[inline(always)]
            pub fn pol7(&self) -> POL7R {
                POL7R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Channel 0 Polarity"]
            #[inline(always)]
            pub fn pol0(&mut self) -> _POL0W {
                _POL0W { w: self }
            }
            #[doc = "Bit 1 - Channel 1 Polarity"]
            #[inline(always)]
            pub fn pol1(&mut self) -> _POL1W {
                _POL1W { w: self }
            }
            #[doc = "Bit 2 - Channel 2 Polarity"]
            #[inline(always)]
            pub fn pol2(&mut self) -> _POL2W {
                _POL2W { w: self }
            }
            #[doc = "Bit 3 - Channel 3 Polarity"]
            #[inline(always)]
            pub fn pol3(&mut self) -> _POL3W {
                _POL3W { w: self }
            }
            #[doc = "Bit 4 - Channel 4 Polarity"]
            #[inline(always)]
            pub fn pol4(&mut self) -> _POL4W {
                _POL4W { w: self }
            }
            #[doc = "Bit 5 - Channel 5 Polarity"]
            #[inline(always)]
            pub fn pol5(&mut self) -> _POL5W {
                _POL5W { w: self }
            }
            #[doc = "Bit 6 - Channel 6 Polarity"]
            #[inline(always)]
            pub fn pol6(&mut self) -> _POL6W {
                _POL6W { w: self }
            }
            #[doc = "Bit 7 - Channel 7 Polarity"]
            #[inline(always)]
            pub fn pol7(&mut self) -> _POL7W {
                _POL7W { w: self }
            }
        }
    }
    #[doc = "Fault Mode Status"]
    pub struct FMS {
        register: VolatileCell<u32>,
    }
    #[doc = "Fault Mode Status"]
    pub mod fms {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FMS {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `FAULTF0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTF0R {
            #[doc = "No fault condition was detected at the fault input."]
            _0,
            #[doc = "A fault condition was detected at the fault input."]
            _1,
        }
        impl FAULTF0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTF0R::_0 => false,
                    FAULTF0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTF0R {
                match value {
                    false => FAULTF0R::_0,
                    true => FAULTF0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTF0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTF0R::_1
            }
        }
        #[doc = "Possible values of the field `FAULTF1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTF1R {
            #[doc = "No fault condition was detected at the fault input."]
            _0,
            #[doc = "A fault condition was detected at the fault input."]
            _1,
        }
        impl FAULTF1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTF1R::_0 => false,
                    FAULTF1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTF1R {
                match value {
                    false => FAULTF1R::_0,
                    true => FAULTF1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTF1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTF1R::_1
            }
        }
        #[doc = "Possible values of the field `FAULTF2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTF2R {
            #[doc = "No fault condition was detected at the fault input."]
            _0,
            #[doc = "A fault condition was detected at the fault input."]
            _1,
        }
        impl FAULTF2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTF2R::_0 => false,
                    FAULTF2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTF2R {
                match value {
                    false => FAULTF2R::_0,
                    true => FAULTF2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTF2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTF2R::_1
            }
        }
        #[doc = "Possible values of the field `FAULTF3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTF3R {
            #[doc = "No fault condition was detected at the fault input."]
            _0,
            #[doc = "A fault condition was detected at the fault input."]
            _1,
        }
        impl FAULTF3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTF3R::_0 => false,
                    FAULTF3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTF3R {
                match value {
                    false => FAULTF3R::_0,
                    true => FAULTF3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTF3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTF3R::_1
            }
        }
        #[doc = "Possible values of the field `FAULTIN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTINR {
            #[doc = "The logic OR of the enabled fault inputs is 0."]
            _0,
            #[doc = "The logic OR of the enabled fault inputs is 1."]
            _1,
        }
        impl FAULTINR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTINR::_0 => false,
                    FAULTINR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTINR {
                match value {
                    false => FAULTINR::_0,
                    true => FAULTINR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTINR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTINR::_1
            }
        }
        #[doc = "Possible values of the field `WPEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WPENR {
            #[doc = "Write protection is disabled. Write protected bits can be written."]
            _0,
            #[doc = "Write protection is enabled. Write protected bits cannot be written."]
            _1,
        }
        impl WPENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WPENR::_0 => false,
                    WPENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WPENR {
                match value {
                    false => WPENR::_0,
                    true => WPENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WPENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WPENR::_1
            }
        }
        #[doc = "Possible values of the field `FAULTF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTFR {
            #[doc = "No fault condition was detected."]
            _0,
            #[doc = "A fault condition was detected."]
            _1,
        }
        impl FAULTFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTFR::_0 => false,
                    FAULTFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTFR {
                match value {
                    false => FAULTFR::_0,
                    true => FAULTFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTFR::_1
            }
        }
        #[doc = "Values that can be written to the field `WPEN`"]
        pub enum WPENW {
            #[doc = "Write protection is disabled. Write protected bits can be written."]
            _0,
            #[doc = "Write protection is enabled. Write protected bits cannot be written."]
            _1,
        }
        impl WPENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WPENW::_0 => false,
                    WPENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WPENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WPENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WPENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Write protection is disabled. Write protected bits can be written."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WPENW::_0)
            }
            #[doc = "Write protection is enabled. Write protected bits cannot be written."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WPENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Fault Detection Flag 0"]
            #[inline(always)]
            pub fn faultf0(&self) -> FAULTF0R {
                FAULTF0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Fault Detection Flag 1"]
            #[inline(always)]
            pub fn faultf1(&self) -> FAULTF1R {
                FAULTF1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Fault Detection Flag 2"]
            #[inline(always)]
            pub fn faultf2(&self) -> FAULTF2R {
                FAULTF2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Fault Detection Flag 3"]
            #[inline(always)]
            pub fn faultf3(&self) -> FAULTF3R {
                FAULTF3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Fault Inputs"]
            #[inline(always)]
            pub fn faultin(&self) -> FAULTINR {
                FAULTINR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Write Protection Enable"]
            #[inline(always)]
            pub fn wpen(&self) -> WPENR {
                WPENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Fault Detection Flag"]
            #[inline(always)]
            pub fn faultf(&self) -> FAULTFR {
                FAULTFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 6 - Write Protection Enable"]
            #[inline(always)]
            pub fn wpen(&mut self) -> _WPENW {
                _WPENW { w: self }
            }
        }
    }
    #[doc = "Input Capture Filter Control"]
    pub struct FILTER {
        register: VolatileCell<u32>,
    }
    #[doc = "Input Capture Filter Control"]
    pub mod filter {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FILTER {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CH0FVALR {
            bits: u8,
        }
        impl CH0FVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct CH1FVALR {
            bits: u8,
        }
        impl CH1FVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct CH2FVALR {
            bits: u8,
        }
        impl CH2FVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct CH3FVALR {
            bits: u8,
        }
        impl CH3FVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH0FVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH0FVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH1FVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH1FVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH2FVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH2FVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH3FVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH3FVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:3 - Channel 0 Input Filter"]
            #[inline(always)]
            pub fn ch0fval(&self) -> CH0FVALR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CH0FVALR { bits }
            }
            #[doc = "Bits 4:7 - Channel 1 Input Filter"]
            #[inline(always)]
            pub fn ch1fval(&self) -> CH1FVALR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CH1FVALR { bits }
            }
            #[doc = "Bits 8:11 - Channel 2 Input Filter"]
            #[inline(always)]
            pub fn ch2fval(&self) -> CH2FVALR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CH2FVALR { bits }
            }
            #[doc = "Bits 12:15 - Channel 3 Input Filter"]
            #[inline(always)]
            pub fn ch3fval(&self) -> CH3FVALR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CH3FVALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Channel 0 Input Filter"]
            #[inline(always)]
            pub fn ch0fval(&mut self) -> _CH0FVALW {
                _CH0FVALW { w: self }
            }
            #[doc = "Bits 4:7 - Channel 1 Input Filter"]
            #[inline(always)]
            pub fn ch1fval(&mut self) -> _CH1FVALW {
                _CH1FVALW { w: self }
            }
            #[doc = "Bits 8:11 - Channel 2 Input Filter"]
            #[inline(always)]
            pub fn ch2fval(&mut self) -> _CH2FVALW {
                _CH2FVALW { w: self }
            }
            #[doc = "Bits 12:15 - Channel 3 Input Filter"]
            #[inline(always)]
            pub fn ch3fval(&mut self) -> _CH3FVALW {
                _CH3FVALW { w: self }
            }
        }
    }
    #[doc = "Fault Control"]
    pub struct FLTCTRL {
        register: VolatileCell<u32>,
    }
    #[doc = "Fault Control"]
    pub mod fltctrl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FLTCTRL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `FAULT0EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULT0ENR {
            #[doc = "Fault input is disabled."]
            _0,
            #[doc = "Fault input is enabled."]
            _1,
        }
        impl FAULT0ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULT0ENR::_0 => false,
                    FAULT0ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULT0ENR {
                match value {
                    false => FAULT0ENR::_0,
                    true => FAULT0ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULT0ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULT0ENR::_1
            }
        }
        #[doc = "Possible values of the field `FAULT1EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULT1ENR {
            #[doc = "Fault input is disabled."]
            _0,
            #[doc = "Fault input is enabled."]
            _1,
        }
        impl FAULT1ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULT1ENR::_0 => false,
                    FAULT1ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULT1ENR {
                match value {
                    false => FAULT1ENR::_0,
                    true => FAULT1ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULT1ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULT1ENR::_1
            }
        }
        #[doc = "Possible values of the field `FAULT2EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULT2ENR {
            #[doc = "Fault input is disabled."]
            _0,
            #[doc = "Fault input is enabled."]
            _1,
        }
        impl FAULT2ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULT2ENR::_0 => false,
                    FAULT2ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULT2ENR {
                match value {
                    false => FAULT2ENR::_0,
                    true => FAULT2ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULT2ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULT2ENR::_1
            }
        }
        #[doc = "Possible values of the field `FAULT3EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULT3ENR {
            #[doc = "Fault input is disabled."]
            _0,
            #[doc = "Fault input is enabled."]
            _1,
        }
        impl FAULT3ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULT3ENR::_0 => false,
                    FAULT3ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULT3ENR {
                match value {
                    false => FAULT3ENR::_0,
                    true => FAULT3ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULT3ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULT3ENR::_1
            }
        }
        #[doc = "Possible values of the field `FFLTR0EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FFLTR0ENR {
            #[doc = "Fault input filter is disabled."]
            _0,
            #[doc = "Fault input filter is enabled."]
            _1,
        }
        impl FFLTR0ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FFLTR0ENR::_0 => false,
                    FFLTR0ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FFLTR0ENR {
                match value {
                    false => FFLTR0ENR::_0,
                    true => FFLTR0ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FFLTR0ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FFLTR0ENR::_1
            }
        }
        #[doc = "Possible values of the field `FFLTR1EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FFLTR1ENR {
            #[doc = "Fault input filter is disabled."]
            _0,
            #[doc = "Fault input filter is enabled."]
            _1,
        }
        impl FFLTR1ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FFLTR1ENR::_0 => false,
                    FFLTR1ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FFLTR1ENR {
                match value {
                    false => FFLTR1ENR::_0,
                    true => FFLTR1ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FFLTR1ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FFLTR1ENR::_1
            }
        }
        #[doc = "Possible values of the field `FFLTR2EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FFLTR2ENR {
            #[doc = "Fault input filter is disabled."]
            _0,
            #[doc = "Fault input filter is enabled."]
            _1,
        }
        impl FFLTR2ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FFLTR2ENR::_0 => false,
                    FFLTR2ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FFLTR2ENR {
                match value {
                    false => FFLTR2ENR::_0,
                    true => FFLTR2ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FFLTR2ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FFLTR2ENR::_1
            }
        }
        #[doc = "Possible values of the field `FFLTR3EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FFLTR3ENR {
            #[doc = "Fault input filter is disabled."]
            _0,
            #[doc = "Fault input filter is enabled."]
            _1,
        }
        impl FFLTR3ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FFLTR3ENR::_0 => false,
                    FFLTR3ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FFLTR3ENR {
                match value {
                    false => FFLTR3ENR::_0,
                    true => FFLTR3ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FFLTR3ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FFLTR3ENR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct FFVALR {
            bits: u8,
        }
        impl FFVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `FSTATE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FSTATER {
            #[doc = "FTM outputs will be placed into safe values when fault events in ongoing (defined by POL bits)."]
            _0,
            #[doc = "FTM outputs will be tri-stated when fault event is ongoing"]
            _1,
        }
        impl FSTATER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FSTATER::_0 => false,
                    FSTATER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FSTATER {
                match value {
                    false => FSTATER::_0,
                    true => FSTATER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FSTATER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FSTATER::_1
            }
        }
        #[doc = "Values that can be written to the field `FAULT0EN`"]
        pub enum FAULT0ENW {
            #[doc = "Fault input is disabled."]
            _0,
            #[doc = "Fault input is enabled."]
            _1,
        }
        impl FAULT0ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FAULT0ENW::_0 => false,
                    FAULT0ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FAULT0ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FAULT0ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FAULT0ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Fault input is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FAULT0ENW::_0)
            }
            #[doc = "Fault input is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FAULT0ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FAULT1EN`"]
        pub enum FAULT1ENW {
            #[doc = "Fault input is disabled."]
            _0,
            #[doc = "Fault input is enabled."]
            _1,
        }
        impl FAULT1ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FAULT1ENW::_0 => false,
                    FAULT1ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FAULT1ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FAULT1ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FAULT1ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Fault input is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FAULT1ENW::_0)
            }
            #[doc = "Fault input is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FAULT1ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FAULT2EN`"]
        pub enum FAULT2ENW {
            #[doc = "Fault input is disabled."]
            _0,
            #[doc = "Fault input is enabled."]
            _1,
        }
        impl FAULT2ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FAULT2ENW::_0 => false,
                    FAULT2ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FAULT2ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FAULT2ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FAULT2ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Fault input is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FAULT2ENW::_0)
            }
            #[doc = "Fault input is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FAULT2ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FAULT3EN`"]
        pub enum FAULT3ENW {
            #[doc = "Fault input is disabled."]
            _0,
            #[doc = "Fault input is enabled."]
            _1,
        }
        impl FAULT3ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FAULT3ENW::_0 => false,
                    FAULT3ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FAULT3ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FAULT3ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FAULT3ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Fault input is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FAULT3ENW::_0)
            }
            #[doc = "Fault input is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FAULT3ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FFLTR0EN`"]
        pub enum FFLTR0ENW {
            #[doc = "Fault input filter is disabled."]
            _0,
            #[doc = "Fault input filter is enabled."]
            _1,
        }
        impl FFLTR0ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FFLTR0ENW::_0 => false,
                    FFLTR0ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FFLTR0ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FFLTR0ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FFLTR0ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Fault input filter is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FFLTR0ENW::_0)
            }
            #[doc = "Fault input filter is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FFLTR0ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FFLTR1EN`"]
        pub enum FFLTR1ENW {
            #[doc = "Fault input filter is disabled."]
            _0,
            #[doc = "Fault input filter is enabled."]
            _1,
        }
        impl FFLTR1ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FFLTR1ENW::_0 => false,
                    FFLTR1ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FFLTR1ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FFLTR1ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FFLTR1ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Fault input filter is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FFLTR1ENW::_0)
            }
            #[doc = "Fault input filter is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FFLTR1ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FFLTR2EN`"]
        pub enum FFLTR2ENW {
            #[doc = "Fault input filter is disabled."]
            _0,
            #[doc = "Fault input filter is enabled."]
            _1,
        }
        impl FFLTR2ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FFLTR2ENW::_0 => false,
                    FFLTR2ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FFLTR2ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FFLTR2ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FFLTR2ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Fault input filter is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FFLTR2ENW::_0)
            }
            #[doc = "Fault input filter is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FFLTR2ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FFLTR3EN`"]
        pub enum FFLTR3ENW {
            #[doc = "Fault input filter is disabled."]
            _0,
            #[doc = "Fault input filter is enabled."]
            _1,
        }
        impl FFLTR3ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FFLTR3ENW::_0 => false,
                    FFLTR3ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FFLTR3ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FFLTR3ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FFLTR3ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Fault input filter is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FFLTR3ENW::_0)
            }
            #[doc = "Fault input filter is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FFLTR3ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _FFVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FFVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FSTATE`"]
        pub enum FSTATEW {
            #[doc = "FTM outputs will be placed into safe values when fault events in ongoing (defined by POL bits)."]
            _0,
            #[doc = "FTM outputs will be tri-stated when fault event is ongoing"]
            _1,
        }
        impl FSTATEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FSTATEW::_0 => false,
                    FSTATEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FSTATEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FSTATEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FSTATEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM outputs will be placed into safe values when fault events in ongoing (defined by POL bits)."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FSTATEW::_0)
            }
            #[doc = "FTM outputs will be tri-stated when fault event is ongoing"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FSTATEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Fault Input 0 Enable"]
            #[inline(always)]
            pub fn fault0en(&self) -> FAULT0ENR {
                FAULT0ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Fault Input 1 Enable"]
            #[inline(always)]
            pub fn fault1en(&self) -> FAULT1ENR {
                FAULT1ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Fault Input 2 Enable"]
            #[inline(always)]
            pub fn fault2en(&self) -> FAULT2ENR {
                FAULT2ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Fault Input 3 Enable"]
            #[inline(always)]
            pub fn fault3en(&self) -> FAULT3ENR {
                FAULT3ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Fault Input 0 Filter Enable"]
            #[inline(always)]
            pub fn ffltr0en(&self) -> FFLTR0ENR {
                FFLTR0ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Fault Input 1 Filter Enable"]
            #[inline(always)]
            pub fn ffltr1en(&self) -> FFLTR1ENR {
                FFLTR1ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Fault Input 2 Filter Enable"]
            #[inline(always)]
            pub fn ffltr2en(&self) -> FFLTR2ENR {
                FFLTR2ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Fault Input 3 Filter Enable"]
            #[inline(always)]
            pub fn ffltr3en(&self) -> FFLTR3ENR {
                FFLTR3ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:11 - Fault Input Filter"]
            #[inline(always)]
            pub fn ffval(&self) -> FFVALR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                FFVALR { bits }
            }
            #[doc = "Bit 15 - Fault output state"]
            #[inline(always)]
            pub fn fstate(&self) -> FSTATER {
                FSTATER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Fault Input 0 Enable"]
            #[inline(always)]
            pub fn fault0en(&mut self) -> _FAULT0ENW {
                _FAULT0ENW { w: self }
            }
            #[doc = "Bit 1 - Fault Input 1 Enable"]
            #[inline(always)]
            pub fn fault1en(&mut self) -> _FAULT1ENW {
                _FAULT1ENW { w: self }
            }
            #[doc = "Bit 2 - Fault Input 2 Enable"]
            #[inline(always)]
            pub fn fault2en(&mut self) -> _FAULT2ENW {
                _FAULT2ENW { w: self }
            }
            #[doc = "Bit 3 - Fault Input 3 Enable"]
            #[inline(always)]
            pub fn fault3en(&mut self) -> _FAULT3ENW {
                _FAULT3ENW { w: self }
            }
            #[doc = "Bit 4 - Fault Input 0 Filter Enable"]
            #[inline(always)]
            pub fn ffltr0en(&mut self) -> _FFLTR0ENW {
                _FFLTR0ENW { w: self }
            }
            #[doc = "Bit 5 - Fault Input 1 Filter Enable"]
            #[inline(always)]
            pub fn ffltr1en(&mut self) -> _FFLTR1ENW {
                _FFLTR1ENW { w: self }
            }
            #[doc = "Bit 6 - Fault Input 2 Filter Enable"]
            #[inline(always)]
            pub fn ffltr2en(&mut self) -> _FFLTR2ENW {
                _FFLTR2ENW { w: self }
            }
            #[doc = "Bit 7 - Fault Input 3 Filter Enable"]
            #[inline(always)]
            pub fn ffltr3en(&mut self) -> _FFLTR3ENW {
                _FFLTR3ENW { w: self }
            }
            #[doc = "Bits 8:11 - Fault Input Filter"]
            #[inline(always)]
            pub fn ffval(&mut self) -> _FFVALW {
                _FFVALW { w: self }
            }
            #[doc = "Bit 15 - Fault output state"]
            #[inline(always)]
            pub fn fstate(&mut self) -> _FSTATEW {
                _FSTATEW { w: self }
            }
        }
    }
    #[doc = "Quadrature Decoder Control And Status"]
    pub struct QDCTRL {
        register: VolatileCell<u32>,
    }
    #[doc = "Quadrature Decoder Control And Status"]
    pub mod qdctrl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::QDCTRL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `QUADEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum QUADENR {
            #[doc = "Quadrature Decoder mode is disabled."]
            _0,
            #[doc = "Quadrature Decoder mode is enabled."]
            _1,
        }
        impl QUADENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    QUADENR::_0 => false,
                    QUADENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> QUADENR {
                match value {
                    false => QUADENR::_0,
                    true => QUADENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == QUADENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == QUADENR::_1
            }
        }
        #[doc = "Possible values of the field `TOFDIR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TOFDIRR {
            #[doc = "TOF bit was set on the bottom of counting. There was an FTM counter decrement and FTM counter changes from its minimum value (CNTIN register) to its maximum value (MOD register)."]
            _0,
            #[doc = "TOF bit was set on the top of counting. There was an FTM counter increment and FTM counter changes from its maximum value (MOD register) to its minimum value (CNTIN register)."]
            _1,
        }
        impl TOFDIRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TOFDIRR::_0 => false,
                    TOFDIRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TOFDIRR {
                match value {
                    false => TOFDIRR::_0,
                    true => TOFDIRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TOFDIRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TOFDIRR::_1
            }
        }
        #[doc = "Possible values of the field `QUADIR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum QUADIRR {
            #[doc = "Counting direction is decreasing (FTM counter decrement)."]
            _0,
            #[doc = "Counting direction is increasing (FTM counter increment)."]
            _1,
        }
        impl QUADIRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    QUADIRR::_0 => false,
                    QUADIRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> QUADIRR {
                match value {
                    false => QUADIRR::_0,
                    true => QUADIRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == QUADIRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == QUADIRR::_1
            }
        }
        #[doc = "Possible values of the field `QUADMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum QUADMODER {
            #[doc = "Phase A and phase B encoding mode."]
            _0,
            #[doc = "Count and direction encoding mode."]
            _1,
        }
        impl QUADMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    QUADMODER::_0 => false,
                    QUADMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> QUADMODER {
                match value {
                    false => QUADMODER::_0,
                    true => QUADMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == QUADMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == QUADMODER::_1
            }
        }
        #[doc = "Possible values of the field `PHBPOL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PHBPOLR {
            #[doc = "Normal polarity. Phase B input signal is not inverted before identifying the rising and falling edges of this signal."]
            _0,
            #[doc = "Inverted polarity. Phase B input signal is inverted before identifying the rising and falling edges of this signal."]
            _1,
        }
        impl PHBPOLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PHBPOLR::_0 => false,
                    PHBPOLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PHBPOLR {
                match value {
                    false => PHBPOLR::_0,
                    true => PHBPOLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PHBPOLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PHBPOLR::_1
            }
        }
        #[doc = "Possible values of the field `PHAPOL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PHAPOLR {
            #[doc = "Normal polarity. Phase A input signal is not inverted before identifying the rising and falling edges of this signal."]
            _0,
            #[doc = "Inverted polarity. Phase A input signal is inverted before identifying the rising and falling edges of this signal."]
            _1,
        }
        impl PHAPOLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PHAPOLR::_0 => false,
                    PHAPOLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PHAPOLR {
                match value {
                    false => PHAPOLR::_0,
                    true => PHAPOLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PHAPOLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PHAPOLR::_1
            }
        }
        #[doc = "Possible values of the field `PHBFLTREN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PHBFLTRENR {
            #[doc = "Phase B input filter is disabled."]
            _0,
            #[doc = "Phase B input filter is enabled."]
            _1,
        }
        impl PHBFLTRENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PHBFLTRENR::_0 => false,
                    PHBFLTRENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PHBFLTRENR {
                match value {
                    false => PHBFLTRENR::_0,
                    true => PHBFLTRENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PHBFLTRENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PHBFLTRENR::_1
            }
        }
        #[doc = "Possible values of the field `PHAFLTREN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PHAFLTRENR {
            #[doc = "Phase A input filter is disabled."]
            _0,
            #[doc = "Phase A input filter is enabled."]
            _1,
        }
        impl PHAFLTRENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PHAFLTRENR::_0 => false,
                    PHAFLTRENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PHAFLTRENR {
                match value {
                    false => PHAFLTRENR::_0,
                    true => PHAFLTRENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PHAFLTRENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PHAFLTRENR::_1
            }
        }
        #[doc = "Values that can be written to the field `QUADEN`"]
        pub enum QUADENW {
            #[doc = "Quadrature Decoder mode is disabled."]
            _0,
            #[doc = "Quadrature Decoder mode is enabled."]
            _1,
        }
        impl QUADENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    QUADENW::_0 => false,
                    QUADENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _QUADENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _QUADENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: QUADENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Quadrature Decoder mode is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(QUADENW::_0)
            }
            #[doc = "Quadrature Decoder mode is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(QUADENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `QUADMODE`"]
        pub enum QUADMODEW {
            #[doc = "Phase A and phase B encoding mode."]
            _0,
            #[doc = "Count and direction encoding mode."]
            _1,
        }
        impl QUADMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    QUADMODEW::_0 => false,
                    QUADMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _QUADMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _QUADMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: QUADMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Phase A and phase B encoding mode."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(QUADMODEW::_0)
            }
            #[doc = "Count and direction encoding mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(QUADMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PHBPOL`"]
        pub enum PHBPOLW {
            #[doc = "Normal polarity. Phase B input signal is not inverted before identifying the rising and falling edges of this signal."]
            _0,
            #[doc = "Inverted polarity. Phase B input signal is inverted before identifying the rising and falling edges of this signal."]
            _1,
        }
        impl PHBPOLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PHBPOLW::_0 => false,
                    PHBPOLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PHBPOLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PHBPOLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PHBPOLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Normal polarity. Phase B input signal is not inverted before identifying the rising and falling edges of this signal."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PHBPOLW::_0)
            }
            #[doc = "Inverted polarity. Phase B input signal is inverted before identifying the rising and falling edges of this signal."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PHBPOLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PHAPOL`"]
        pub enum PHAPOLW {
            #[doc = "Normal polarity. Phase A input signal is not inverted before identifying the rising and falling edges of this signal."]
            _0,
            #[doc = "Inverted polarity. Phase A input signal is inverted before identifying the rising and falling edges of this signal."]
            _1,
        }
        impl PHAPOLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PHAPOLW::_0 => false,
                    PHAPOLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PHAPOLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PHAPOLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PHAPOLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Normal polarity. Phase A input signal is not inverted before identifying the rising and falling edges of this signal."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PHAPOLW::_0)
            }
            #[doc = "Inverted polarity. Phase A input signal is inverted before identifying the rising and falling edges of this signal."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PHAPOLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PHBFLTREN`"]
        pub enum PHBFLTRENW {
            #[doc = "Phase B input filter is disabled."]
            _0,
            #[doc = "Phase B input filter is enabled."]
            _1,
        }
        impl PHBFLTRENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PHBFLTRENW::_0 => false,
                    PHBFLTRENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PHBFLTRENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PHBFLTRENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PHBFLTRENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Phase B input filter is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PHBFLTRENW::_0)
            }
            #[doc = "Phase B input filter is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PHBFLTRENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PHAFLTREN`"]
        pub enum PHAFLTRENW {
            #[doc = "Phase A input filter is disabled."]
            _0,
            #[doc = "Phase A input filter is enabled."]
            _1,
        }
        impl PHAFLTRENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PHAFLTRENW::_0 => false,
                    PHAFLTRENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PHAFLTRENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PHAFLTRENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PHAFLTRENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Phase A input filter is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PHAFLTRENW::_0)
            }
            #[doc = "Phase A input filter is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PHAFLTRENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Quadrature Decoder Mode Enable"]
            #[inline(always)]
            pub fn quaden(&self) -> QUADENR {
                QUADENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Timer Overflow Direction In Quadrature Decoder Mode"]
            #[inline(always)]
            pub fn tofdir(&self) -> TOFDIRR {
                TOFDIRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - FTM Counter Direction In Quadrature Decoder Mode"]
            #[inline(always)]
            pub fn quadir(&self) -> QUADIRR {
                QUADIRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Quadrature Decoder Mode"]
            #[inline(always)]
            pub fn quadmode(&self) -> QUADMODER {
                QUADMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Phase B Input Polarity"]
            #[inline(always)]
            pub fn phbpol(&self) -> PHBPOLR {
                PHBPOLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Phase A Input Polarity"]
            #[inline(always)]
            pub fn phapol(&self) -> PHAPOLR {
                PHAPOLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Phase B Input Filter Enable"]
            #[inline(always)]
            pub fn phbfltren(&self) -> PHBFLTRENR {
                PHBFLTRENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Phase A Input Filter Enable"]
            #[inline(always)]
            pub fn phafltren(&self) -> PHAFLTRENR {
                PHAFLTRENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Quadrature Decoder Mode Enable"]
            #[inline(always)]
            pub fn quaden(&mut self) -> _QUADENW {
                _QUADENW { w: self }
            }
            #[doc = "Bit 3 - Quadrature Decoder Mode"]
            #[inline(always)]
            pub fn quadmode(&mut self) -> _QUADMODEW {
                _QUADMODEW { w: self }
            }
            #[doc = "Bit 4 - Phase B Input Polarity"]
            #[inline(always)]
            pub fn phbpol(&mut self) -> _PHBPOLW {
                _PHBPOLW { w: self }
            }
            #[doc = "Bit 5 - Phase A Input Polarity"]
            #[inline(always)]
            pub fn phapol(&mut self) -> _PHAPOLW {
                _PHAPOLW { w: self }
            }
            #[doc = "Bit 6 - Phase B Input Filter Enable"]
            #[inline(always)]
            pub fn phbfltren(&mut self) -> _PHBFLTRENW {
                _PHBFLTRENW { w: self }
            }
            #[doc = "Bit 7 - Phase A Input Filter Enable"]
            #[inline(always)]
            pub fn phafltren(&mut self) -> _PHAFLTRENW {
                _PHAFLTRENW { w: self }
            }
        }
    }
    #[doc = "Configuration"]
    pub struct CONF {
        register: VolatileCell<u32>,
    }
    #[doc = "Configuration"]
    pub mod conf {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CONF {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct LDFQR {
            bits: u8,
        }
        impl LDFQR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BDMMODER {
            bits: u8,
        }
        impl BDMMODER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct GTBEENR {
            bits: bool,
        }
        impl GTBEENR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct GTBEOUTR {
            bits: bool,
        }
        impl GTBEOUTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `ITRIGR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ITRIGRR {
            #[doc = "Initialization trigger is generated on counter wrap events."]
            _0,
            #[doc = "Initialization trigger is generated when a reload point is reached."]
            _1,
        }
        impl ITRIGRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ITRIGRR::_0 => false,
                    ITRIGRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ITRIGRR {
                match value {
                    false => ITRIGRR::_0,
                    true => ITRIGRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ITRIGRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ITRIGRR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _LDFQW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LDFQW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BDMMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BDMMODEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _GTBEENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GTBEENW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _GTBEOUTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GTBEOUTW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ITRIGR`"]
        pub enum ITRIGRW {
            #[doc = "Initialization trigger is generated on counter wrap events."]
            _0,
            #[doc = "Initialization trigger is generated when a reload point is reached."]
            _1,
        }
        impl ITRIGRW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ITRIGRW::_0 => false,
                    ITRIGRW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ITRIGRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ITRIGRW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ITRIGRW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Initialization trigger is generated on counter wrap events."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ITRIGRW::_0)
            }
            #[doc = "Initialization trigger is generated when a reload point is reached."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ITRIGRW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:4 - Frequency of the Reload Opportunities"]
            #[inline(always)]
            pub fn ldfq(&self) -> LDFQR {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                LDFQR { bits }
            }
            #[doc = "Bits 6:7 - Debug Mode"]
            #[inline(always)]
            pub fn bdmmode(&self) -> BDMMODER {
                let bits = {
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BDMMODER { bits }
            }
            #[doc = "Bit 9 - Global Time Base Enable"]
            #[inline(always)]
            pub fn gtbeen(&self) -> GTBEENR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                GTBEENR { bits }
            }
            #[doc = "Bit 10 - Global Time Base Output"]
            #[inline(always)]
            pub fn gtbeout(&self) -> GTBEOUTR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                GTBEOUTR { bits }
            }
            #[doc = "Bit 11 - Initialization trigger on Reload Point"]
            #[inline(always)]
            pub fn itrigr(&self) -> ITRIGRR {
                ITRIGRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:4 - Frequency of the Reload Opportunities"]
            #[inline(always)]
            pub fn ldfq(&mut self) -> _LDFQW {
                _LDFQW { w: self }
            }
            #[doc = "Bits 6:7 - Debug Mode"]
            #[inline(always)]
            pub fn bdmmode(&mut self) -> _BDMMODEW {
                _BDMMODEW { w: self }
            }
            #[doc = "Bit 9 - Global Time Base Enable"]
            #[inline(always)]
            pub fn gtbeen(&mut self) -> _GTBEENW {
                _GTBEENW { w: self }
            }
            #[doc = "Bit 10 - Global Time Base Output"]
            #[inline(always)]
            pub fn gtbeout(&mut self) -> _GTBEOUTW {
                _GTBEOUTW { w: self }
            }
            #[doc = "Bit 11 - Initialization trigger on Reload Point"]
            #[inline(always)]
            pub fn itrigr(&mut self) -> _ITRIGRW {
                _ITRIGRW { w: self }
            }
        }
    }
    #[doc = "FTM Fault Input Polarity"]
    pub struct FLTPOL {
        register: VolatileCell<u32>,
    }
    #[doc = "FTM Fault Input Polarity"]
    pub mod fltpol {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FLTPOL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `FLT0POL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FLT0POLR {
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            _0,
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            _1,
        }
        impl FLT0POLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FLT0POLR::_0 => false,
                    FLT0POLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FLT0POLR {
                match value {
                    false => FLT0POLR::_0,
                    true => FLT0POLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FLT0POLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FLT0POLR::_1
            }
        }
        #[doc = "Possible values of the field `FLT1POL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FLT1POLR {
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            _0,
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            _1,
        }
        impl FLT1POLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FLT1POLR::_0 => false,
                    FLT1POLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FLT1POLR {
                match value {
                    false => FLT1POLR::_0,
                    true => FLT1POLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FLT1POLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FLT1POLR::_1
            }
        }
        #[doc = "Possible values of the field `FLT2POL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FLT2POLR {
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            _0,
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            _1,
        }
        impl FLT2POLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FLT2POLR::_0 => false,
                    FLT2POLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FLT2POLR {
                match value {
                    false => FLT2POLR::_0,
                    true => FLT2POLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FLT2POLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FLT2POLR::_1
            }
        }
        #[doc = "Possible values of the field `FLT3POL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FLT3POLR {
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            _0,
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            _1,
        }
        impl FLT3POLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FLT3POLR::_0 => false,
                    FLT3POLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FLT3POLR {
                match value {
                    false => FLT3POLR::_0,
                    true => FLT3POLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FLT3POLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FLT3POLR::_1
            }
        }
        #[doc = "Values that can be written to the field `FLT0POL`"]
        pub enum FLT0POLW {
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            _0,
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            _1,
        }
        impl FLT0POLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FLT0POLW::_0 => false,
                    FLT0POLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FLT0POLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FLT0POLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FLT0POLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FLT0POLW::_0)
            }
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FLT0POLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FLT1POL`"]
        pub enum FLT1POLW {
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            _0,
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            _1,
        }
        impl FLT1POLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FLT1POLW::_0 => false,
                    FLT1POLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FLT1POLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FLT1POLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FLT1POLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FLT1POLW::_0)
            }
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FLT1POLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FLT2POL`"]
        pub enum FLT2POLW {
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            _0,
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            _1,
        }
        impl FLT2POLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FLT2POLW::_0 => false,
                    FLT2POLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FLT2POLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FLT2POLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FLT2POLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FLT2POLW::_0)
            }
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FLT2POLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FLT3POL`"]
        pub enum FLT3POLW {
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            _0,
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            _1,
        }
        impl FLT3POLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FLT3POLW::_0 => false,
                    FLT3POLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FLT3POLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FLT3POLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FLT3POLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FLT3POLW::_0)
            }
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FLT3POLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Fault Input 0 Polarity"]
            #[inline(always)]
            pub fn flt0pol(&self) -> FLT0POLR {
                FLT0POLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Fault Input 1 Polarity"]
            #[inline(always)]
            pub fn flt1pol(&self) -> FLT1POLR {
                FLT1POLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Fault Input 2 Polarity"]
            #[inline(always)]
            pub fn flt2pol(&self) -> FLT2POLR {
                FLT2POLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Fault Input 3 Polarity"]
            #[inline(always)]
            pub fn flt3pol(&self) -> FLT3POLR {
                FLT3POLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Fault Input 0 Polarity"]
            #[inline(always)]
            pub fn flt0pol(&mut self) -> _FLT0POLW {
                _FLT0POLW { w: self }
            }
            #[doc = "Bit 1 - Fault Input 1 Polarity"]
            #[inline(always)]
            pub fn flt1pol(&mut self) -> _FLT1POLW {
                _FLT1POLW { w: self }
            }
            #[doc = "Bit 2 - Fault Input 2 Polarity"]
            #[inline(always)]
            pub fn flt2pol(&mut self) -> _FLT2POLW {
                _FLT2POLW { w: self }
            }
            #[doc = "Bit 3 - Fault Input 3 Polarity"]
            #[inline(always)]
            pub fn flt3pol(&mut self) -> _FLT3POLW {
                _FLT3POLW { w: self }
            }
        }
    }
    #[doc = "Synchronization Configuration"]
    pub struct SYNCONF {
        register: VolatileCell<u32>,
    }
    #[doc = "Synchronization Configuration"]
    pub mod synconf {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SYNCONF {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `HWTRIGMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HWTRIGMODER {
            #[doc = "FTM clears the TRIGj bit when the hardware trigger j is detected, where j = 0, 1,2."]
            _0,
            #[doc = "FTM does not clear the TRIGj bit when the hardware trigger j is detected, where j = 0, 1,2."]
            _1,
        }
        impl HWTRIGMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HWTRIGMODER::_0 => false,
                    HWTRIGMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HWTRIGMODER {
                match value {
                    false => HWTRIGMODER::_0,
                    true => HWTRIGMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HWTRIGMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HWTRIGMODER::_1
            }
        }
        #[doc = "Possible values of the field `CNTINC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CNTINCR {
            #[doc = "CNTIN register is updated with its buffer value at all rising edges of FTM input clock."]
            _0,
            #[doc = "CNTIN register is updated with its buffer value by the PWM synchronization."]
            _1,
        }
        impl CNTINCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CNTINCR::_0 => false,
                    CNTINCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CNTINCR {
                match value {
                    false => CNTINCR::_0,
                    true => CNTINCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CNTINCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CNTINCR::_1
            }
        }
        #[doc = "Possible values of the field `INVC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INVCR {
            #[doc = "INVCTRL register is updated with its buffer value at all rising edges of FTM input clock."]
            _0,
            #[doc = "INVCTRL register is updated with its buffer value by the PWM synchronization."]
            _1,
        }
        impl INVCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INVCR::_0 => false,
                    INVCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INVCR {
                match value {
                    false => INVCR::_0,
                    true => INVCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INVCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INVCR::_1
            }
        }
        #[doc = "Possible values of the field `SWOC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SWOCR {
            #[doc = "SWOCTRL register is updated with its buffer value at all rising edges of FTM input clock."]
            _0,
            #[doc = "SWOCTRL register is updated with its buffer value by the PWM synchronization."]
            _1,
        }
        impl SWOCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SWOCR::_0 => false,
                    SWOCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SWOCR {
                match value {
                    false => SWOCR::_0,
                    true => SWOCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SWOCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SWOCR::_1
            }
        }
        #[doc = "Possible values of the field `SYNCMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SYNCMODER {
            #[doc = "Legacy PWM synchronization is selected."]
            _0,
            #[doc = "Enhanced PWM synchronization is selected."]
            _1,
        }
        impl SYNCMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SYNCMODER::_0 => false,
                    SYNCMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SYNCMODER {
                match value {
                    false => SYNCMODER::_0,
                    true => SYNCMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SYNCMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SYNCMODER::_1
            }
        }
        #[doc = "Possible values of the field `SWRSTCNT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SWRSTCNTR {
            #[doc = "The software trigger does not activate the FTM counter synchronization."]
            _0,
            #[doc = "The software trigger activates the FTM counter synchronization."]
            _1,
        }
        impl SWRSTCNTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SWRSTCNTR::_0 => false,
                    SWRSTCNTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SWRSTCNTR {
                match value {
                    false => SWRSTCNTR::_0,
                    true => SWRSTCNTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SWRSTCNTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SWRSTCNTR::_1
            }
        }
        #[doc = "Possible values of the field `SWWRBUF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SWWRBUFR {
            #[doc = "The software trigger does not activate MOD, HCR, CNTIN, and CV registers synchronization."]
            _0,
            #[doc = "The software trigger activates MOD, HCR, CNTIN, and CV registers synchronization."]
            _1,
        }
        impl SWWRBUFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SWWRBUFR::_0 => false,
                    SWWRBUFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SWWRBUFR {
                match value {
                    false => SWWRBUFR::_0,
                    true => SWWRBUFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SWWRBUFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SWWRBUFR::_1
            }
        }
        #[doc = "Possible values of the field `SWOM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SWOMR {
            #[doc = "The software trigger does not activate the OUTMASK register synchronization."]
            _0,
            #[doc = "The software trigger activates the OUTMASK register synchronization."]
            _1,
        }
        impl SWOMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SWOMR::_0 => false,
                    SWOMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SWOMR {
                match value {
                    false => SWOMR::_0,
                    true => SWOMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SWOMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SWOMR::_1
            }
        }
        #[doc = "Possible values of the field `SWINVC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SWINVCR {
            #[doc = "The software trigger does not activate the INVCTRL register synchronization."]
            _0,
            #[doc = "The software trigger activates the INVCTRL register synchronization."]
            _1,
        }
        impl SWINVCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SWINVCR::_0 => false,
                    SWINVCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SWINVCR {
                match value {
                    false => SWINVCR::_0,
                    true => SWINVCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SWINVCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SWINVCR::_1
            }
        }
        #[doc = "Possible values of the field `SWSOC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SWSOCR {
            #[doc = "The software trigger does not activate the SWOCTRL register synchronization."]
            _0,
            #[doc = "The software trigger activates the SWOCTRL register synchronization."]
            _1,
        }
        impl SWSOCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SWSOCR::_0 => false,
                    SWSOCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SWSOCR {
                match value {
                    false => SWSOCR::_0,
                    true => SWSOCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SWSOCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SWSOCR::_1
            }
        }
        #[doc = "Possible values of the field `HWRSTCNT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HWRSTCNTR {
            #[doc = "A hardware trigger does not activate the FTM counter synchronization."]
            _0,
            #[doc = "A hardware trigger activates the FTM counter synchronization."]
            _1,
        }
        impl HWRSTCNTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HWRSTCNTR::_0 => false,
                    HWRSTCNTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HWRSTCNTR {
                match value {
                    false => HWRSTCNTR::_0,
                    true => HWRSTCNTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HWRSTCNTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HWRSTCNTR::_1
            }
        }
        #[doc = "Possible values of the field `HWWRBUF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HWWRBUFR {
            #[doc = "A hardware trigger does not activate MOD, HCR, CNTIN, and CV registers synchronization."]
            _0,
            #[doc = "A hardware trigger activates MOD, HCR, CNTIN, and CV registers synchronization."]
            _1,
        }
        impl HWWRBUFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HWWRBUFR::_0 => false,
                    HWWRBUFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HWWRBUFR {
                match value {
                    false => HWWRBUFR::_0,
                    true => HWWRBUFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HWWRBUFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HWWRBUFR::_1
            }
        }
        #[doc = "Possible values of the field `HWOM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HWOMR {
            #[doc = "A hardware trigger does not activate the OUTMASK register synchronization."]
            _0,
            #[doc = "A hardware trigger activates the OUTMASK register synchronization."]
            _1,
        }
        impl HWOMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HWOMR::_0 => false,
                    HWOMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HWOMR {
                match value {
                    false => HWOMR::_0,
                    true => HWOMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HWOMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HWOMR::_1
            }
        }
        #[doc = "Possible values of the field `HWINVC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HWINVCR {
            #[doc = "A hardware trigger does not activate the INVCTRL register synchronization."]
            _0,
            #[doc = "A hardware trigger activates the INVCTRL register synchronization."]
            _1,
        }
        impl HWINVCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HWINVCR::_0 => false,
                    HWINVCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HWINVCR {
                match value {
                    false => HWINVCR::_0,
                    true => HWINVCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HWINVCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HWINVCR::_1
            }
        }
        #[doc = "Possible values of the field `HWSOC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HWSOCR {
            #[doc = "A hardware trigger does not activate the SWOCTRL register synchronization."]
            _0,
            #[doc = "A hardware trigger activates the SWOCTRL register synchronization."]
            _1,
        }
        impl HWSOCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HWSOCR::_0 => false,
                    HWSOCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HWSOCR {
                match value {
                    false => HWSOCR::_0,
                    true => HWSOCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HWSOCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HWSOCR::_1
            }
        }
        #[doc = "Values that can be written to the field `HWTRIGMODE`"]
        pub enum HWTRIGMODEW {
            #[doc = "FTM clears the TRIGj bit when the hardware trigger j is detected, where j = 0, 1,2."]
            _0,
            #[doc = "FTM does not clear the TRIGj bit when the hardware trigger j is detected, where j = 0, 1,2."]
            _1,
        }
        impl HWTRIGMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HWTRIGMODEW::_0 => false,
                    HWTRIGMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HWTRIGMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HWTRIGMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HWTRIGMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM clears the TRIGj bit when the hardware trigger j is detected, where j = 0, 1,2."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HWTRIGMODEW::_0)
            }
            #[doc = "FTM does not clear the TRIGj bit when the hardware trigger j is detected, where j = 0, 1,2."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HWTRIGMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CNTINC`"]
        pub enum CNTINCW {
            #[doc = "CNTIN register is updated with its buffer value at all rising edges of FTM input clock."]
            _0,
            #[doc = "CNTIN register is updated with its buffer value by the PWM synchronization."]
            _1,
        }
        impl CNTINCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CNTINCW::_0 => false,
                    CNTINCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CNTINCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CNTINCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CNTINCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "CNTIN register is updated with its buffer value at all rising edges of FTM input clock."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CNTINCW::_0)
            }
            #[doc = "CNTIN register is updated with its buffer value by the PWM synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CNTINCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INVC`"]
        pub enum INVCW {
            #[doc = "INVCTRL register is updated with its buffer value at all rising edges of FTM input clock."]
            _0,
            #[doc = "INVCTRL register is updated with its buffer value by the PWM synchronization."]
            _1,
        }
        impl INVCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INVCW::_0 => false,
                    INVCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INVCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INVCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INVCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "INVCTRL register is updated with its buffer value at all rising edges of FTM input clock."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INVCW::_0)
            }
            #[doc = "INVCTRL register is updated with its buffer value by the PWM synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INVCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SWOC`"]
        pub enum SWOCW {
            #[doc = "SWOCTRL register is updated with its buffer value at all rising edges of FTM input clock."]
            _0,
            #[doc = "SWOCTRL register is updated with its buffer value by the PWM synchronization."]
            _1,
        }
        impl SWOCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SWOCW::_0 => false,
                    SWOCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SWOCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SWOCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SWOCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "SWOCTRL register is updated with its buffer value at all rising edges of FTM input clock."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SWOCW::_0)
            }
            #[doc = "SWOCTRL register is updated with its buffer value by the PWM synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SWOCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SYNCMODE`"]
        pub enum SYNCMODEW {
            #[doc = "Legacy PWM synchronization is selected."]
            _0,
            #[doc = "Enhanced PWM synchronization is selected."]
            _1,
        }
        impl SYNCMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SYNCMODEW::_0 => false,
                    SYNCMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SYNCMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SYNCMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SYNCMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Legacy PWM synchronization is selected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SYNCMODEW::_0)
            }
            #[doc = "Enhanced PWM synchronization is selected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SYNCMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SWRSTCNT`"]
        pub enum SWRSTCNTW {
            #[doc = "The software trigger does not activate the FTM counter synchronization."]
            _0,
            #[doc = "The software trigger activates the FTM counter synchronization."]
            _1,
        }
        impl SWRSTCNTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SWRSTCNTW::_0 => false,
                    SWRSTCNTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SWRSTCNTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SWRSTCNTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SWRSTCNTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software trigger does not activate the FTM counter synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SWRSTCNTW::_0)
            }
            #[doc = "The software trigger activates the FTM counter synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SWRSTCNTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SWWRBUF`"]
        pub enum SWWRBUFW {
            #[doc = "The software trigger does not activate MOD, HCR, CNTIN, and CV registers synchronization."]
            _0,
            #[doc = "The software trigger activates MOD, HCR, CNTIN, and CV registers synchronization."]
            _1,
        }
        impl SWWRBUFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SWWRBUFW::_0 => false,
                    SWWRBUFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SWWRBUFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SWWRBUFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SWWRBUFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software trigger does not activate MOD, HCR, CNTIN, and CV registers synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SWWRBUFW::_0)
            }
            #[doc = "The software trigger activates MOD, HCR, CNTIN, and CV registers synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SWWRBUFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SWOM`"]
        pub enum SWOMW {
            #[doc = "The software trigger does not activate the OUTMASK register synchronization."]
            _0,
            #[doc = "The software trigger activates the OUTMASK register synchronization."]
            _1,
        }
        impl SWOMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SWOMW::_0 => false,
                    SWOMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SWOMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SWOMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SWOMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software trigger does not activate the OUTMASK register synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SWOMW::_0)
            }
            #[doc = "The software trigger activates the OUTMASK register synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SWOMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SWINVC`"]
        pub enum SWINVCW {
            #[doc = "The software trigger does not activate the INVCTRL register synchronization."]
            _0,
            #[doc = "The software trigger activates the INVCTRL register synchronization."]
            _1,
        }
        impl SWINVCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SWINVCW::_0 => false,
                    SWINVCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SWINVCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SWINVCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SWINVCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software trigger does not activate the INVCTRL register synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SWINVCW::_0)
            }
            #[doc = "The software trigger activates the INVCTRL register synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SWINVCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SWSOC`"]
        pub enum SWSOCW {
            #[doc = "The software trigger does not activate the SWOCTRL register synchronization."]
            _0,
            #[doc = "The software trigger activates the SWOCTRL register synchronization."]
            _1,
        }
        impl SWSOCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SWSOCW::_0 => false,
                    SWSOCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SWSOCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SWSOCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SWSOCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software trigger does not activate the SWOCTRL register synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SWSOCW::_0)
            }
            #[doc = "The software trigger activates the SWOCTRL register synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SWSOCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `HWRSTCNT`"]
        pub enum HWRSTCNTW {
            #[doc = "A hardware trigger does not activate the FTM counter synchronization."]
            _0,
            #[doc = "A hardware trigger activates the FTM counter synchronization."]
            _1,
        }
        impl HWRSTCNTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HWRSTCNTW::_0 => false,
                    HWRSTCNTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HWRSTCNTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HWRSTCNTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HWRSTCNTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "A hardware trigger does not activate the FTM counter synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HWRSTCNTW::_0)
            }
            #[doc = "A hardware trigger activates the FTM counter synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HWRSTCNTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `HWWRBUF`"]
        pub enum HWWRBUFW {
            #[doc = "A hardware trigger does not activate MOD, HCR, CNTIN, and CV registers synchronization."]
            _0,
            #[doc = "A hardware trigger activates MOD, HCR, CNTIN, and CV registers synchronization."]
            _1,
        }
        impl HWWRBUFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HWWRBUFW::_0 => false,
                    HWWRBUFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HWWRBUFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HWWRBUFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HWWRBUFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "A hardware trigger does not activate MOD, HCR, CNTIN, and CV registers synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HWWRBUFW::_0)
            }
            #[doc = "A hardware trigger activates MOD, HCR, CNTIN, and CV registers synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HWWRBUFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `HWOM`"]
        pub enum HWOMW {
            #[doc = "A hardware trigger does not activate the OUTMASK register synchronization."]
            _0,
            #[doc = "A hardware trigger activates the OUTMASK register synchronization."]
            _1,
        }
        impl HWOMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HWOMW::_0 => false,
                    HWOMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HWOMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HWOMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HWOMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "A hardware trigger does not activate the OUTMASK register synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HWOMW::_0)
            }
            #[doc = "A hardware trigger activates the OUTMASK register synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HWOMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `HWINVC`"]
        pub enum HWINVCW {
            #[doc = "A hardware trigger does not activate the INVCTRL register synchronization."]
            _0,
            #[doc = "A hardware trigger activates the INVCTRL register synchronization."]
            _1,
        }
        impl HWINVCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HWINVCW::_0 => false,
                    HWINVCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HWINVCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HWINVCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HWINVCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "A hardware trigger does not activate the INVCTRL register synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HWINVCW::_0)
            }
            #[doc = "A hardware trigger activates the INVCTRL register synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HWINVCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 19;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `HWSOC`"]
        pub enum HWSOCW {
            #[doc = "A hardware trigger does not activate the SWOCTRL register synchronization."]
            _0,
            #[doc = "A hardware trigger activates the SWOCTRL register synchronization."]
            _1,
        }
        impl HWSOCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HWSOCW::_0 => false,
                    HWSOCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HWSOCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HWSOCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HWSOCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "A hardware trigger does not activate the SWOCTRL register synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HWSOCW::_0)
            }
            #[doc = "A hardware trigger activates the SWOCTRL register synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HWSOCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Hardware Trigger Mode"]
            #[inline(always)]
            pub fn hwtrigmode(&self) -> HWTRIGMODER {
                HWTRIGMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - CNTIN Register Synchronization"]
            #[inline(always)]
            pub fn cntinc(&self) -> CNTINCR {
                CNTINCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - INVCTRL Register Synchronization"]
            #[inline(always)]
            pub fn invc(&self) -> INVCR {
                INVCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - SWOCTRL Register Synchronization"]
            #[inline(always)]
            pub fn swoc(&self) -> SWOCR {
                SWOCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Synchronization Mode"]
            #[inline(always)]
            pub fn syncmode(&self) -> SYNCMODER {
                SYNCMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - FTM counter synchronization is activated by the software trigger"]
            #[inline(always)]
            pub fn swrstcnt(&self) -> SWRSTCNTR {
                SWRSTCNTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - MOD, HCR, CNTIN, and CV registers synchronization is activated by the software trigger"]
            #[inline(always)]
            pub fn swwrbuf(&self) -> SWWRBUFR {
                SWWRBUFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Output mask synchronization is activated by the software trigger"]
            #[inline(always)]
            pub fn swom(&self) -> SWOMR {
                SWOMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 11 - Inverting control synchronization is activated by the software trigger"]
            #[inline(always)]
            pub fn swinvc(&self) -> SWINVCR {
                SWINVCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Software output control synchronization is activated by the software trigger"]
            #[inline(always)]
            pub fn swsoc(&self) -> SWSOCR {
                SWSOCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 16 - FTM counter synchronization is activated by a hardware trigger"]
            #[inline(always)]
            pub fn hwrstcnt(&self) -> HWRSTCNTR {
                HWRSTCNTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - MOD, HCR, CNTIN, and CV registers synchronization is activated by a hardware trigger"]
            #[inline(always)]
            pub fn hwwrbuf(&self) -> HWWRBUFR {
                HWWRBUFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 18 - Output mask synchronization is activated by a hardware trigger"]
            #[inline(always)]
            pub fn hwom(&self) -> HWOMR {
                HWOMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 19 - Inverting control synchronization is activated by a hardware trigger"]
            #[inline(always)]
            pub fn hwinvc(&self) -> HWINVCR {
                HWINVCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 19;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 20 - Software output control synchronization is activated by a hardware trigger"]
            #[inline(always)]
            pub fn hwsoc(&self) -> HWSOCR {
                HWSOCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Hardware Trigger Mode"]
            #[inline(always)]
            pub fn hwtrigmode(&mut self) -> _HWTRIGMODEW {
                _HWTRIGMODEW { w: self }
            }
            #[doc = "Bit 2 - CNTIN Register Synchronization"]
            #[inline(always)]
            pub fn cntinc(&mut self) -> _CNTINCW {
                _CNTINCW { w: self }
            }
            #[doc = "Bit 4 - INVCTRL Register Synchronization"]
            #[inline(always)]
            pub fn invc(&mut self) -> _INVCW {
                _INVCW { w: self }
            }
            #[doc = "Bit 5 - SWOCTRL Register Synchronization"]
            #[inline(always)]
            pub fn swoc(&mut self) -> _SWOCW {
                _SWOCW { w: self }
            }
            #[doc = "Bit 7 - Synchronization Mode"]
            #[inline(always)]
            pub fn syncmode(&mut self) -> _SYNCMODEW {
                _SYNCMODEW { w: self }
            }
            #[doc = "Bit 8 - FTM counter synchronization is activated by the software trigger"]
            #[inline(always)]
            pub fn swrstcnt(&mut self) -> _SWRSTCNTW {
                _SWRSTCNTW { w: self }
            }
            #[doc = "Bit 9 - MOD, HCR, CNTIN, and CV registers synchronization is activated by the software trigger"]
            #[inline(always)]
            pub fn swwrbuf(&mut self) -> _SWWRBUFW {
                _SWWRBUFW { w: self }
            }
            #[doc = "Bit 10 - Output mask synchronization is activated by the software trigger"]
            #[inline(always)]
            pub fn swom(&mut self) -> _SWOMW {
                _SWOMW { w: self }
            }
            #[doc = "Bit 11 - Inverting control synchronization is activated by the software trigger"]
            #[inline(always)]
            pub fn swinvc(&mut self) -> _SWINVCW {
                _SWINVCW { w: self }
            }
            #[doc = "Bit 12 - Software output control synchronization is activated by the software trigger"]
            #[inline(always)]
            pub fn swsoc(&mut self) -> _SWSOCW {
                _SWSOCW { w: self }
            }
            #[doc = "Bit 16 - FTM counter synchronization is activated by a hardware trigger"]
            #[inline(always)]
            pub fn hwrstcnt(&mut self) -> _HWRSTCNTW {
                _HWRSTCNTW { w: self }
            }
            #[doc = "Bit 17 - MOD, HCR, CNTIN, and CV registers synchronization is activated by a hardware trigger"]
            #[inline(always)]
            pub fn hwwrbuf(&mut self) -> _HWWRBUFW {
                _HWWRBUFW { w: self }
            }
            #[doc = "Bit 18 - Output mask synchronization is activated by a hardware trigger"]
            #[inline(always)]
            pub fn hwom(&mut self) -> _HWOMW {
                _HWOMW { w: self }
            }
            #[doc = "Bit 19 - Inverting control synchronization is activated by a hardware trigger"]
            #[inline(always)]
            pub fn hwinvc(&mut self) -> _HWINVCW {
                _HWINVCW { w: self }
            }
            #[doc = "Bit 20 - Software output control synchronization is activated by a hardware trigger"]
            #[inline(always)]
            pub fn hwsoc(&mut self) -> _HWSOCW {
                _HWSOCW { w: self }
            }
        }
    }
    #[doc = "FTM Inverting Control"]
    pub struct INVCTRL {
        register: VolatileCell<u32>,
    }
    #[doc = "FTM Inverting Control"]
    pub mod invctrl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::INVCTRL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `INV0EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INV0ENR {
            #[doc = "Inverting is disabled."]
            _0,
            #[doc = "Inverting is enabled."]
            _1,
        }
        impl INV0ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INV0ENR::_0 => false,
                    INV0ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INV0ENR {
                match value {
                    false => INV0ENR::_0,
                    true => INV0ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INV0ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INV0ENR::_1
            }
        }
        #[doc = "Possible values of the field `INV1EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INV1ENR {
            #[doc = "Inverting is disabled."]
            _0,
            #[doc = "Inverting is enabled."]
            _1,
        }
        impl INV1ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INV1ENR::_0 => false,
                    INV1ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INV1ENR {
                match value {
                    false => INV1ENR::_0,
                    true => INV1ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INV1ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INV1ENR::_1
            }
        }
        #[doc = "Possible values of the field `INV2EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INV2ENR {
            #[doc = "Inverting is disabled."]
            _0,
            #[doc = "Inverting is enabled."]
            _1,
        }
        impl INV2ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INV2ENR::_0 => false,
                    INV2ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INV2ENR {
                match value {
                    false => INV2ENR::_0,
                    true => INV2ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INV2ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INV2ENR::_1
            }
        }
        #[doc = "Possible values of the field `INV3EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INV3ENR {
            #[doc = "Inverting is disabled."]
            _0,
            #[doc = "Inverting is enabled."]
            _1,
        }
        impl INV3ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INV3ENR::_0 => false,
                    INV3ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INV3ENR {
                match value {
                    false => INV3ENR::_0,
                    true => INV3ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INV3ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INV3ENR::_1
            }
        }
        #[doc = "Values that can be written to the field `INV0EN`"]
        pub enum INV0ENW {
            #[doc = "Inverting is disabled."]
            _0,
            #[doc = "Inverting is enabled."]
            _1,
        }
        impl INV0ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INV0ENW::_0 => false,
                    INV0ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INV0ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INV0ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INV0ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Inverting is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INV0ENW::_0)
            }
            #[doc = "Inverting is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INV0ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INV1EN`"]
        pub enum INV1ENW {
            #[doc = "Inverting is disabled."]
            _0,
            #[doc = "Inverting is enabled."]
            _1,
        }
        impl INV1ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INV1ENW::_0 => false,
                    INV1ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INV1ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INV1ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INV1ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Inverting is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INV1ENW::_0)
            }
            #[doc = "Inverting is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INV1ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INV2EN`"]
        pub enum INV2ENW {
            #[doc = "Inverting is disabled."]
            _0,
            #[doc = "Inverting is enabled."]
            _1,
        }
        impl INV2ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INV2ENW::_0 => false,
                    INV2ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INV2ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INV2ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INV2ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Inverting is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INV2ENW::_0)
            }
            #[doc = "Inverting is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INV2ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INV3EN`"]
        pub enum INV3ENW {
            #[doc = "Inverting is disabled."]
            _0,
            #[doc = "Inverting is enabled."]
            _1,
        }
        impl INV3ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INV3ENW::_0 => false,
                    INV3ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INV3ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INV3ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INV3ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Inverting is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INV3ENW::_0)
            }
            #[doc = "Inverting is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INV3ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pair Channels 0 Inverting Enable"]
            #[inline(always)]
            pub fn inv0en(&self) -> INV0ENR {
                INV0ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pair Channels 1 Inverting Enable"]
            #[inline(always)]
            pub fn inv1en(&self) -> INV1ENR {
                INV1ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Pair Channels 2 Inverting Enable"]
            #[inline(always)]
            pub fn inv2en(&self) -> INV2ENR {
                INV2ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Pair Channels 3 Inverting Enable"]
            #[inline(always)]
            pub fn inv3en(&self) -> INV3ENR {
                INV3ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pair Channels 0 Inverting Enable"]
            #[inline(always)]
            pub fn inv0en(&mut self) -> _INV0ENW {
                _INV0ENW { w: self }
            }
            #[doc = "Bit 1 - Pair Channels 1 Inverting Enable"]
            #[inline(always)]
            pub fn inv1en(&mut self) -> _INV1ENW {
                _INV1ENW { w: self }
            }
            #[doc = "Bit 2 - Pair Channels 2 Inverting Enable"]
            #[inline(always)]
            pub fn inv2en(&mut self) -> _INV2ENW {
                _INV2ENW { w: self }
            }
            #[doc = "Bit 3 - Pair Channels 3 Inverting Enable"]
            #[inline(always)]
            pub fn inv3en(&mut self) -> _INV3ENW {
                _INV3ENW { w: self }
            }
        }
    }
    #[doc = "FTM Software Output Control"]
    pub struct SWOCTRL {
        register: VolatileCell<u32>,
    }
    #[doc = "FTM Software Output Control"]
    pub mod swoctrl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SWOCTRL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CH0OC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH0OCR {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH0OCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH0OCR::_0 => false,
                    CH0OCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH0OCR {
                match value {
                    false => CH0OCR::_0,
                    true => CH0OCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH0OCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH0OCR::_1
            }
        }
        #[doc = "Possible values of the field `CH1OC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH1OCR {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH1OCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH1OCR::_0 => false,
                    CH1OCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH1OCR {
                match value {
                    false => CH1OCR::_0,
                    true => CH1OCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH1OCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH1OCR::_1
            }
        }
        #[doc = "Possible values of the field `CH2OC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH2OCR {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH2OCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH2OCR::_0 => false,
                    CH2OCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH2OCR {
                match value {
                    false => CH2OCR::_0,
                    true => CH2OCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH2OCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH2OCR::_1
            }
        }
        #[doc = "Possible values of the field `CH3OC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH3OCR {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH3OCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH3OCR::_0 => false,
                    CH3OCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH3OCR {
                match value {
                    false => CH3OCR::_0,
                    true => CH3OCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH3OCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH3OCR::_1
            }
        }
        #[doc = "Possible values of the field `CH4OC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH4OCR {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH4OCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH4OCR::_0 => false,
                    CH4OCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH4OCR {
                match value {
                    false => CH4OCR::_0,
                    true => CH4OCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH4OCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH4OCR::_1
            }
        }
        #[doc = "Possible values of the field `CH5OC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH5OCR {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH5OCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH5OCR::_0 => false,
                    CH5OCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH5OCR {
                match value {
                    false => CH5OCR::_0,
                    true => CH5OCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH5OCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH5OCR::_1
            }
        }
        #[doc = "Possible values of the field `CH6OC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH6OCR {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH6OCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH6OCR::_0 => false,
                    CH6OCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH6OCR {
                match value {
                    false => CH6OCR::_0,
                    true => CH6OCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH6OCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH6OCR::_1
            }
        }
        #[doc = "Possible values of the field `CH7OC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH7OCR {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH7OCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH7OCR::_0 => false,
                    CH7OCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH7OCR {
                match value {
                    false => CH7OCR::_0,
                    true => CH7OCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH7OCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH7OCR::_1
            }
        }
        #[doc = "Possible values of the field `CH0OCV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH0OCVR {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH0OCVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH0OCVR::_0 => false,
                    CH0OCVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH0OCVR {
                match value {
                    false => CH0OCVR::_0,
                    true => CH0OCVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH0OCVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH0OCVR::_1
            }
        }
        #[doc = "Possible values of the field `CH1OCV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH1OCVR {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH1OCVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH1OCVR::_0 => false,
                    CH1OCVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH1OCVR {
                match value {
                    false => CH1OCVR::_0,
                    true => CH1OCVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH1OCVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH1OCVR::_1
            }
        }
        #[doc = "Possible values of the field `CH2OCV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH2OCVR {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH2OCVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH2OCVR::_0 => false,
                    CH2OCVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH2OCVR {
                match value {
                    false => CH2OCVR::_0,
                    true => CH2OCVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH2OCVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH2OCVR::_1
            }
        }
        #[doc = "Possible values of the field `CH3OCV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH3OCVR {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH3OCVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH3OCVR::_0 => false,
                    CH3OCVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH3OCVR {
                match value {
                    false => CH3OCVR::_0,
                    true => CH3OCVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH3OCVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH3OCVR::_1
            }
        }
        #[doc = "Possible values of the field `CH4OCV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH4OCVR {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH4OCVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH4OCVR::_0 => false,
                    CH4OCVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH4OCVR {
                match value {
                    false => CH4OCVR::_0,
                    true => CH4OCVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH4OCVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH4OCVR::_1
            }
        }
        #[doc = "Possible values of the field `CH5OCV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH5OCVR {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH5OCVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH5OCVR::_0 => false,
                    CH5OCVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH5OCVR {
                match value {
                    false => CH5OCVR::_0,
                    true => CH5OCVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH5OCVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH5OCVR::_1
            }
        }
        #[doc = "Possible values of the field `CH6OCV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH6OCVR {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH6OCVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH6OCVR::_0 => false,
                    CH6OCVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH6OCVR {
                match value {
                    false => CH6OCVR::_0,
                    true => CH6OCVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH6OCVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH6OCVR::_1
            }
        }
        #[doc = "Possible values of the field `CH7OCV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH7OCVR {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH7OCVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH7OCVR::_0 => false,
                    CH7OCVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH7OCVR {
                match value {
                    false => CH7OCVR::_0,
                    true => CH7OCVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH7OCVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH7OCVR::_1
            }
        }
        #[doc = "Values that can be written to the field `CH0OC`"]
        pub enum CH0OCW {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH0OCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH0OCW::_0 => false,
                    CH0OCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH0OCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH0OCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH0OCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel output is not affected by software output control."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH0OCW::_0)
            }
            #[doc = "The channel output is affected by software output control."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH0OCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH1OC`"]
        pub enum CH1OCW {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH1OCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH1OCW::_0 => false,
                    CH1OCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH1OCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH1OCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH1OCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel output is not affected by software output control."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH1OCW::_0)
            }
            #[doc = "The channel output is affected by software output control."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH1OCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH2OC`"]
        pub enum CH2OCW {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH2OCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH2OCW::_0 => false,
                    CH2OCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH2OCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH2OCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH2OCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel output is not affected by software output control."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH2OCW::_0)
            }
            #[doc = "The channel output is affected by software output control."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH2OCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH3OC`"]
        pub enum CH3OCW {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH3OCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH3OCW::_0 => false,
                    CH3OCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH3OCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH3OCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH3OCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel output is not affected by software output control."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH3OCW::_0)
            }
            #[doc = "The channel output is affected by software output control."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH3OCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH4OC`"]
        pub enum CH4OCW {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH4OCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH4OCW::_0 => false,
                    CH4OCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH4OCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH4OCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH4OCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel output is not affected by software output control."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH4OCW::_0)
            }
            #[doc = "The channel output is affected by software output control."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH4OCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH5OC`"]
        pub enum CH5OCW {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH5OCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH5OCW::_0 => false,
                    CH5OCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH5OCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH5OCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH5OCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel output is not affected by software output control."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH5OCW::_0)
            }
            #[doc = "The channel output is affected by software output control."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH5OCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH6OC`"]
        pub enum CH6OCW {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH6OCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH6OCW::_0 => false,
                    CH6OCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH6OCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH6OCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH6OCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel output is not affected by software output control."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH6OCW::_0)
            }
            #[doc = "The channel output is affected by software output control."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH6OCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH7OC`"]
        pub enum CH7OCW {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH7OCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH7OCW::_0 => false,
                    CH7OCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH7OCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH7OCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH7OCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel output is not affected by software output control."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH7OCW::_0)
            }
            #[doc = "The channel output is affected by software output control."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH7OCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH0OCV`"]
        pub enum CH0OCVW {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH0OCVW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH0OCVW::_0 => false,
                    CH0OCVW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH0OCVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH0OCVW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH0OCVW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software output control forces 0 to the channel output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH0OCVW::_0)
            }
            #[doc = "The software output control forces 1 to the channel output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH0OCVW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH1OCV`"]
        pub enum CH1OCVW {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH1OCVW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH1OCVW::_0 => false,
                    CH1OCVW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH1OCVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH1OCVW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH1OCVW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software output control forces 0 to the channel output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH1OCVW::_0)
            }
            #[doc = "The software output control forces 1 to the channel output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH1OCVW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH2OCV`"]
        pub enum CH2OCVW {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH2OCVW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH2OCVW::_0 => false,
                    CH2OCVW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH2OCVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH2OCVW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH2OCVW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software output control forces 0 to the channel output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH2OCVW::_0)
            }
            #[doc = "The software output control forces 1 to the channel output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH2OCVW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH3OCV`"]
        pub enum CH3OCVW {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH3OCVW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH3OCVW::_0 => false,
                    CH3OCVW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH3OCVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH3OCVW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH3OCVW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software output control forces 0 to the channel output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH3OCVW::_0)
            }
            #[doc = "The software output control forces 1 to the channel output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH3OCVW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH4OCV`"]
        pub enum CH4OCVW {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH4OCVW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH4OCVW::_0 => false,
                    CH4OCVW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH4OCVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH4OCVW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH4OCVW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software output control forces 0 to the channel output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH4OCVW::_0)
            }
            #[doc = "The software output control forces 1 to the channel output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH4OCVW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH5OCV`"]
        pub enum CH5OCVW {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH5OCVW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH5OCVW::_0 => false,
                    CH5OCVW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH5OCVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH5OCVW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH5OCVW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software output control forces 0 to the channel output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH5OCVW::_0)
            }
            #[doc = "The software output control forces 1 to the channel output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH5OCVW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH6OCV`"]
        pub enum CH6OCVW {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH6OCVW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH6OCVW::_0 => false,
                    CH6OCVW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH6OCVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH6OCVW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH6OCVW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software output control forces 0 to the channel output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH6OCVW::_0)
            }
            #[doc = "The software output control forces 1 to the channel output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH6OCVW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH7OCV`"]
        pub enum CH7OCVW {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH7OCVW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH7OCVW::_0 => false,
                    CH7OCVW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH7OCVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH7OCVW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH7OCVW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software output control forces 0 to the channel output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH7OCVW::_0)
            }
            #[doc = "The software output control forces 1 to the channel output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH7OCVW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Channel 0 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch0oc(&self) -> CH0OCR {
                CH0OCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Channel 1 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch1oc(&self) -> CH1OCR {
                CH1OCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel 2 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch2oc(&self) -> CH2OCR {
                CH2OCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Channel 3 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch3oc(&self) -> CH3OCR {
                CH3OCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Channel 4 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch4oc(&self) -> CH4OCR {
                CH4OCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Channel 5 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch5oc(&self) -> CH5OCR {
                CH5OCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Channel 6 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch6oc(&self) -> CH6OCR {
                CH6OCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel 7 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch7oc(&self) -> CH7OCR {
                CH7OCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Channel 0 Software Output Control Value"]
            #[inline(always)]
            pub fn ch0ocv(&self) -> CH0OCVR {
                CH0OCVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Channel 1 Software Output Control Value"]
            #[inline(always)]
            pub fn ch1ocv(&self) -> CH1OCVR {
                CH1OCVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Channel 2 Software Output Control Value"]
            #[inline(always)]
            pub fn ch2ocv(&self) -> CH2OCVR {
                CH2OCVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 11 - Channel 3 Software Output Control Value"]
            #[inline(always)]
            pub fn ch3ocv(&self) -> CH3OCVR {
                CH3OCVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Channel 4 Software Output Control Value"]
            #[inline(always)]
            pub fn ch4ocv(&self) -> CH4OCVR {
                CH4OCVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Channel 5 Software Output Control Value"]
            #[inline(always)]
            pub fn ch5ocv(&self) -> CH5OCVR {
                CH5OCVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - Channel 6 Software Output Control Value"]
            #[inline(always)]
            pub fn ch6ocv(&self) -> CH6OCVR {
                CH6OCVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - Channel 7 Software Output Control Value"]
            #[inline(always)]
            pub fn ch7ocv(&self) -> CH7OCVR {
                CH7OCVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Channel 0 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch0oc(&mut self) -> _CH0OCW {
                _CH0OCW { w: self }
            }
            #[doc = "Bit 1 - Channel 1 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch1oc(&mut self) -> _CH1OCW {
                _CH1OCW { w: self }
            }
            #[doc = "Bit 2 - Channel 2 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch2oc(&mut self) -> _CH2OCW {
                _CH2OCW { w: self }
            }
            #[doc = "Bit 3 - Channel 3 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch3oc(&mut self) -> _CH3OCW {
                _CH3OCW { w: self }
            }
            #[doc = "Bit 4 - Channel 4 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch4oc(&mut self) -> _CH4OCW {
                _CH4OCW { w: self }
            }
            #[doc = "Bit 5 - Channel 5 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch5oc(&mut self) -> _CH5OCW {
                _CH5OCW { w: self }
            }
            #[doc = "Bit 6 - Channel 6 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch6oc(&mut self) -> _CH6OCW {
                _CH6OCW { w: self }
            }
            #[doc = "Bit 7 - Channel 7 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch7oc(&mut self) -> _CH7OCW {
                _CH7OCW { w: self }
            }
            #[doc = "Bit 8 - Channel 0 Software Output Control Value"]
            #[inline(always)]
            pub fn ch0ocv(&mut self) -> _CH0OCVW {
                _CH0OCVW { w: self }
            }
            #[doc = "Bit 9 - Channel 1 Software Output Control Value"]
            #[inline(always)]
            pub fn ch1ocv(&mut self) -> _CH1OCVW {
                _CH1OCVW { w: self }
            }
            #[doc = "Bit 10 - Channel 2 Software Output Control Value"]
            #[inline(always)]
            pub fn ch2ocv(&mut self) -> _CH2OCVW {
                _CH2OCVW { w: self }
            }
            #[doc = "Bit 11 - Channel 3 Software Output Control Value"]
            #[inline(always)]
            pub fn ch3ocv(&mut self) -> _CH3OCVW {
                _CH3OCVW { w: self }
            }
            #[doc = "Bit 12 - Channel 4 Software Output Control Value"]
            #[inline(always)]
            pub fn ch4ocv(&mut self) -> _CH4OCVW {
                _CH4OCVW { w: self }
            }
            #[doc = "Bit 13 - Channel 5 Software Output Control Value"]
            #[inline(always)]
            pub fn ch5ocv(&mut self) -> _CH5OCVW {
                _CH5OCVW { w: self }
            }
            #[doc = "Bit 14 - Channel 6 Software Output Control Value"]
            #[inline(always)]
            pub fn ch6ocv(&mut self) -> _CH6OCVW {
                _CH6OCVW { w: self }
            }
            #[doc = "Bit 15 - Channel 7 Software Output Control Value"]
            #[inline(always)]
            pub fn ch7ocv(&mut self) -> _CH7OCVW {
                _CH7OCVW { w: self }
            }
        }
    }
    #[doc = "FTM PWM Load"]
    pub struct PWMLOAD {
        register: VolatileCell<u32>,
    }
    #[doc = "FTM PWM Load"]
    pub mod pwmload {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PWMLOAD {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CH0SEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH0SELR {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH0SELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH0SELR::_0 => false,
                    CH0SELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH0SELR {
                match value {
                    false => CH0SELR::_0,
                    true => CH0SELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH0SELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH0SELR::_1
            }
        }
        #[doc = "Possible values of the field `CH1SEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH1SELR {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH1SELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH1SELR::_0 => false,
                    CH1SELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH1SELR {
                match value {
                    false => CH1SELR::_0,
                    true => CH1SELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH1SELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH1SELR::_1
            }
        }
        #[doc = "Possible values of the field `CH2SEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH2SELR {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH2SELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH2SELR::_0 => false,
                    CH2SELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH2SELR {
                match value {
                    false => CH2SELR::_0,
                    true => CH2SELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH2SELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH2SELR::_1
            }
        }
        #[doc = "Possible values of the field `CH3SEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH3SELR {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH3SELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH3SELR::_0 => false,
                    CH3SELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH3SELR {
                match value {
                    false => CH3SELR::_0,
                    true => CH3SELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH3SELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH3SELR::_1
            }
        }
        #[doc = "Possible values of the field `CH4SEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH4SELR {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH4SELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH4SELR::_0 => false,
                    CH4SELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH4SELR {
                match value {
                    false => CH4SELR::_0,
                    true => CH4SELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH4SELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH4SELR::_1
            }
        }
        #[doc = "Possible values of the field `CH5SEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH5SELR {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH5SELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH5SELR::_0 => false,
                    CH5SELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH5SELR {
                match value {
                    false => CH5SELR::_0,
                    true => CH5SELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH5SELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH5SELR::_1
            }
        }
        #[doc = "Possible values of the field `CH6SEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH6SELR {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH6SELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH6SELR::_0 => false,
                    CH6SELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH6SELR {
                match value {
                    false => CH6SELR::_0,
                    true => CH6SELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH6SELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH6SELR::_1
            }
        }
        #[doc = "Possible values of the field `CH7SEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH7SELR {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH7SELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH7SELR::_0 => false,
                    CH7SELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH7SELR {
                match value {
                    false => CH7SELR::_0,
                    true => CH7SELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH7SELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH7SELR::_1
            }
        }
        #[doc = "Possible values of the field `HCSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HCSELR {
            #[doc = "Half cycle reload is disabled and it is not considered as a reload opportunity."]
            _0,
            #[doc = "Half cycle reload is enabled and it is considered as a reload opportunity."]
            _1,
        }
        impl HCSELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HCSELR::_0 => false,
                    HCSELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HCSELR {
                match value {
                    false => HCSELR::_0,
                    true => HCSELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HCSELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HCSELR::_1
            }
        }
        #[doc = "Possible values of the field `LDOK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LDOKR {
            #[doc = "Loading updated values is disabled."]
            _0,
            #[doc = "Loading updated values is enabled."]
            _1,
        }
        impl LDOKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LDOKR::_0 => false,
                    LDOKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LDOKR {
                match value {
                    false => LDOKR::_0,
                    true => LDOKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LDOKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LDOKR::_1
            }
        }
        #[doc = "Possible values of the field `GLEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum GLENR {
            #[doc = "Global Load Ok disabled."]
            _0,
            #[doc = "Global Load OK enabled. A pulse event on the module global load input sets the LDOK bit."]
            _1,
        }
        impl GLENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    GLENR::_0 => false,
                    GLENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> GLENR {
                match value {
                    false => GLENR::_0,
                    true => GLENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == GLENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == GLENR::_1
            }
        }
        #[doc = "Values that can be written to the field `CH0SEL`"]
        pub enum CH0SELW {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH0SELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH0SELW::_0 => false,
                    CH0SELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH0SELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH0SELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH0SELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel match is not included as a reload opportunity."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH0SELW::_0)
            }
            #[doc = "Channel match is included as a reload opportunity."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH0SELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH1SEL`"]
        pub enum CH1SELW {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH1SELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH1SELW::_0 => false,
                    CH1SELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH1SELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH1SELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH1SELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel match is not included as a reload opportunity."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH1SELW::_0)
            }
            #[doc = "Channel match is included as a reload opportunity."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH1SELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH2SEL`"]
        pub enum CH2SELW {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH2SELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH2SELW::_0 => false,
                    CH2SELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH2SELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH2SELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH2SELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel match is not included as a reload opportunity."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH2SELW::_0)
            }
            #[doc = "Channel match is included as a reload opportunity."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH2SELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH3SEL`"]
        pub enum CH3SELW {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH3SELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH3SELW::_0 => false,
                    CH3SELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH3SELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH3SELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH3SELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel match is not included as a reload opportunity."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH3SELW::_0)
            }
            #[doc = "Channel match is included as a reload opportunity."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH3SELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH4SEL`"]
        pub enum CH4SELW {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH4SELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH4SELW::_0 => false,
                    CH4SELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH4SELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH4SELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH4SELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel match is not included as a reload opportunity."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH4SELW::_0)
            }
            #[doc = "Channel match is included as a reload opportunity."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH4SELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH5SEL`"]
        pub enum CH5SELW {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH5SELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH5SELW::_0 => false,
                    CH5SELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH5SELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH5SELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH5SELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel match is not included as a reload opportunity."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH5SELW::_0)
            }
            #[doc = "Channel match is included as a reload opportunity."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH5SELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH6SEL`"]
        pub enum CH6SELW {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH6SELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH6SELW::_0 => false,
                    CH6SELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH6SELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH6SELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH6SELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel match is not included as a reload opportunity."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH6SELW::_0)
            }
            #[doc = "Channel match is included as a reload opportunity."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH6SELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH7SEL`"]
        pub enum CH7SELW {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH7SELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH7SELW::_0 => false,
                    CH7SELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH7SELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH7SELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH7SELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel match is not included as a reload opportunity."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH7SELW::_0)
            }
            #[doc = "Channel match is included as a reload opportunity."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH7SELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `HCSEL`"]
        pub enum HCSELW {
            #[doc = "Half cycle reload is disabled and it is not considered as a reload opportunity."]
            _0,
            #[doc = "Half cycle reload is enabled and it is considered as a reload opportunity."]
            _1,
        }
        impl HCSELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HCSELW::_0 => false,
                    HCSELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HCSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HCSELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HCSELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Half cycle reload is disabled and it is not considered as a reload opportunity."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HCSELW::_0)
            }
            #[doc = "Half cycle reload is enabled and it is considered as a reload opportunity."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HCSELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LDOK`"]
        pub enum LDOKW {
            #[doc = "Loading updated values is disabled."]
            _0,
            #[doc = "Loading updated values is enabled."]
            _1,
        }
        impl LDOKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LDOKW::_0 => false,
                    LDOKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LDOKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LDOKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LDOKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Loading updated values is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LDOKW::_0)
            }
            #[doc = "Loading updated values is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LDOKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `GLEN`"]
        pub enum GLENW {
            #[doc = "Global Load Ok disabled."]
            _0,
            #[doc = "Global Load OK enabled. A pulse event on the module global load input sets the LDOK bit."]
            _1,
        }
        impl GLENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    GLENW::_0 => false,
                    GLENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _GLENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GLENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: GLENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Global Load Ok disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(GLENW::_0)
            }
            #[doc = "Global Load OK enabled. A pulse event on the module global load input sets the LDOK bit."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(GLENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `GLDOK`"]
        pub enum GLDOKW {
            #[doc = "No action."]
            _0,
            #[doc = "LDOK bit is set."]
            _1,
        }
        impl GLDOKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    GLDOKW::_0 => false,
                    GLDOKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _GLDOKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GLDOKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: GLDOKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No action."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(GLDOKW::_0)
            }
            #[doc = "LDOK bit is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(GLDOKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Channel 0 Select"]
            #[inline(always)]
            pub fn ch0sel(&self) -> CH0SELR {
                CH0SELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Channel 1 Select"]
            #[inline(always)]
            pub fn ch1sel(&self) -> CH1SELR {
                CH1SELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel 2 Select"]
            #[inline(always)]
            pub fn ch2sel(&self) -> CH2SELR {
                CH2SELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Channel 3 Select"]
            #[inline(always)]
            pub fn ch3sel(&self) -> CH3SELR {
                CH3SELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Channel 4 Select"]
            #[inline(always)]
            pub fn ch4sel(&self) -> CH4SELR {
                CH4SELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Channel 5 Select"]
            #[inline(always)]
            pub fn ch5sel(&self) -> CH5SELR {
                CH5SELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Channel 6 Select"]
            #[inline(always)]
            pub fn ch6sel(&self) -> CH6SELR {
                CH6SELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel 7 Select"]
            #[inline(always)]
            pub fn ch7sel(&self) -> CH7SELR {
                CH7SELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Half Cycle Select"]
            #[inline(always)]
            pub fn hcsel(&self) -> HCSELR {
                HCSELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Load Enable"]
            #[inline(always)]
            pub fn ldok(&self) -> LDOKR {
                LDOKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Global Load Enable"]
            #[inline(always)]
            pub fn glen(&self) -> GLENR {
                GLENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Channel 0 Select"]
            #[inline(always)]
            pub fn ch0sel(&mut self) -> _CH0SELW {
                _CH0SELW { w: self }
            }
            #[doc = "Bit 1 - Channel 1 Select"]
            #[inline(always)]
            pub fn ch1sel(&mut self) -> _CH1SELW {
                _CH1SELW { w: self }
            }
            #[doc = "Bit 2 - Channel 2 Select"]
            #[inline(always)]
            pub fn ch2sel(&mut self) -> _CH2SELW {
                _CH2SELW { w: self }
            }
            #[doc = "Bit 3 - Channel 3 Select"]
            #[inline(always)]
            pub fn ch3sel(&mut self) -> _CH3SELW {
                _CH3SELW { w: self }
            }
            #[doc = "Bit 4 - Channel 4 Select"]
            #[inline(always)]
            pub fn ch4sel(&mut self) -> _CH4SELW {
                _CH4SELW { w: self }
            }
            #[doc = "Bit 5 - Channel 5 Select"]
            #[inline(always)]
            pub fn ch5sel(&mut self) -> _CH5SELW {
                _CH5SELW { w: self }
            }
            #[doc = "Bit 6 - Channel 6 Select"]
            #[inline(always)]
            pub fn ch6sel(&mut self) -> _CH6SELW {
                _CH6SELW { w: self }
            }
            #[doc = "Bit 7 - Channel 7 Select"]
            #[inline(always)]
            pub fn ch7sel(&mut self) -> _CH7SELW {
                _CH7SELW { w: self }
            }
            #[doc = "Bit 8 - Half Cycle Select"]
            #[inline(always)]
            pub fn hcsel(&mut self) -> _HCSELW {
                _HCSELW { w: self }
            }
            #[doc = "Bit 9 - Load Enable"]
            #[inline(always)]
            pub fn ldok(&mut self) -> _LDOKW {
                _LDOKW { w: self }
            }
            #[doc = "Bit 10 - Global Load Enable"]
            #[inline(always)]
            pub fn glen(&mut self) -> _GLENW {
                _GLENW { w: self }
            }
            #[doc = "Bit 11 - Global Load OK"]
            #[inline(always)]
            pub fn gldok(&mut self) -> _GLDOKW {
                _GLDOKW { w: self }
            }
        }
    }
    #[doc = "Half Cycle Register"]
    pub struct HCR {
        register: VolatileCell<u32>,
    }
    #[doc = "Half Cycle Register"]
    pub mod hcr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::HCR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct HCVALR {
            bits: u16,
        }
        impl HCVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _HCVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HCVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Half Cycle Value"]
            #[inline(always)]
            pub fn hcval(&self) -> HCVALR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                HCVALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Half Cycle Value"]
            #[inline(always)]
            pub fn hcval(&mut self) -> _HCVALW {
                _HCVALW { w: self }
            }
        }
    }
    #[doc = "Pair 0 Deadtime Configuration"]
    pub struct PAIR0DEADTIME {
        register: VolatileCell<u32>,
    }
    #[doc = "Pair 0 Deadtime Configuration"]
    pub mod pair0deadtime {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PAIR0DEADTIME {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DTVALR {
            bits: u8,
        }
        impl DTVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DTPS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DTPSR {
            #[doc = "Divide the FTM input clock by 1."]
            _0X,
            #[doc = "Divide the FTM input clock by 4."]
            _10,
            #[doc = "Divide the FTM input clock by 16."]
            _11,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl DTPSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    DTPSR::_0X => 0,
                    DTPSR::_10 => 2,
                    DTPSR::_11 => 3,
                    DTPSR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> DTPSR {
                match value {
                    0 => DTPSR::_0X,
                    2 => DTPSR::_10,
                    3 => DTPSR::_11,
                    i => DTPSR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0X`"]
            #[inline(always)]
            pub fn is_0x(&self) -> bool {
                *self == DTPSR::_0X
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == DTPSR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == DTPSR::_11
            }
        }
        #[doc = r" Value of the field"]
        pub struct DTVALEXR {
            bits: u8,
        }
        impl DTVALEXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DTPS`"]
        pub enum DTPSW {
            #[doc = "Divide the FTM input clock by 1."]
            _0X,
            #[doc = "Divide the FTM input clock by 4."]
            _10,
            #[doc = "Divide the FTM input clock by 16."]
            _11,
        }
        impl DTPSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    DTPSW::_0X => 0,
                    DTPSW::_10 => 2,
                    DTPSW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTPSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTPSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DTPSW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Divide the FTM input clock by 1."]
            #[inline(always)]
            pub fn _0x(self) -> &'a mut W {
                self.variant(DTPSW::_0X)
            }
            #[doc = "Divide the FTM input clock by 4."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(DTPSW::_10)
            }
            #[doc = "Divide the FTM input clock by 16."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(DTPSW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTVALEXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTVALEXW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Deadtime Value"]
            #[inline(always)]
            pub fn dtval(&self) -> DTVALR {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DTVALR { bits }
            }
            #[doc = "Bits 6:7 - Deadtime Prescaler Value"]
            #[inline(always)]
            pub fn dtps(&self) -> DTPSR {
                DTPSR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 16:19 - Extended Deadtime Value"]
            #[inline(always)]
            pub fn dtvalex(&self) -> DTVALEXR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DTVALEXR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - Deadtime Value"]
            #[inline(always)]
            pub fn dtval(&mut self) -> _DTVALW {
                _DTVALW { w: self }
            }
            #[doc = "Bits 6:7 - Deadtime Prescaler Value"]
            #[inline(always)]
            pub fn dtps(&mut self) -> _DTPSW {
                _DTPSW { w: self }
            }
            #[doc = "Bits 16:19 - Extended Deadtime Value"]
            #[inline(always)]
            pub fn dtvalex(&mut self) -> _DTVALEXW {
                _DTVALEXW { w: self }
            }
        }
    }
    #[doc = "Pair 1 Deadtime Configuration"]
    pub struct PAIR1DEADTIME {
        register: VolatileCell<u32>,
    }
    #[doc = "Pair 1 Deadtime Configuration"]
    pub mod pair1deadtime {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PAIR1DEADTIME {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DTVALR {
            bits: u8,
        }
        impl DTVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DTPS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DTPSR {
            #[doc = "Divide the FTM input clock by 1."]
            _0X,
            #[doc = "Divide the FTM input clock by 4."]
            _10,
            #[doc = "Divide the FTM input clock by 16."]
            _11,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl DTPSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    DTPSR::_0X => 0,
                    DTPSR::_10 => 2,
                    DTPSR::_11 => 3,
                    DTPSR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> DTPSR {
                match value {
                    0 => DTPSR::_0X,
                    2 => DTPSR::_10,
                    3 => DTPSR::_11,
                    i => DTPSR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0X`"]
            #[inline(always)]
            pub fn is_0x(&self) -> bool {
                *self == DTPSR::_0X
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == DTPSR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == DTPSR::_11
            }
        }
        #[doc = r" Value of the field"]
        pub struct DTVALEXR {
            bits: u8,
        }
        impl DTVALEXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DTPS`"]
        pub enum DTPSW {
            #[doc = "Divide the FTM input clock by 1."]
            _0X,
            #[doc = "Divide the FTM input clock by 4."]
            _10,
            #[doc = "Divide the FTM input clock by 16."]
            _11,
        }
        impl DTPSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    DTPSW::_0X => 0,
                    DTPSW::_10 => 2,
                    DTPSW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTPSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTPSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DTPSW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Divide the FTM input clock by 1."]
            #[inline(always)]
            pub fn _0x(self) -> &'a mut W {
                self.variant(DTPSW::_0X)
            }
            #[doc = "Divide the FTM input clock by 4."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(DTPSW::_10)
            }
            #[doc = "Divide the FTM input clock by 16."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(DTPSW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTVALEXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTVALEXW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Deadtime Value"]
            #[inline(always)]
            pub fn dtval(&self) -> DTVALR {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DTVALR { bits }
            }
            #[doc = "Bits 6:7 - Deadtime Prescaler Value"]
            #[inline(always)]
            pub fn dtps(&self) -> DTPSR {
                DTPSR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 16:19 - Extended Deadtime Value"]
            #[inline(always)]
            pub fn dtvalex(&self) -> DTVALEXR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DTVALEXR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - Deadtime Value"]
            #[inline(always)]
            pub fn dtval(&mut self) -> _DTVALW {
                _DTVALW { w: self }
            }
            #[doc = "Bits 6:7 - Deadtime Prescaler Value"]
            #[inline(always)]
            pub fn dtps(&mut self) -> _DTPSW {
                _DTPSW { w: self }
            }
            #[doc = "Bits 16:19 - Extended Deadtime Value"]
            #[inline(always)]
            pub fn dtvalex(&mut self) -> _DTVALEXW {
                _DTVALEXW { w: self }
            }
        }
    }
    #[doc = "Pair 2 Deadtime Configuration"]
    pub struct PAIR2DEADTIME {
        register: VolatileCell<u32>,
    }
    #[doc = "Pair 2 Deadtime Configuration"]
    pub mod pair2deadtime {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PAIR2DEADTIME {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DTVALR {
            bits: u8,
        }
        impl DTVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DTPS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DTPSR {
            #[doc = "Divide the FTM input clock by 1."]
            _0X,
            #[doc = "Divide the FTM input clock by 4."]
            _10,
            #[doc = "Divide the FTM input clock by 16."]
            _11,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl DTPSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    DTPSR::_0X => 0,
                    DTPSR::_10 => 2,
                    DTPSR::_11 => 3,
                    DTPSR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> DTPSR {
                match value {
                    0 => DTPSR::_0X,
                    2 => DTPSR::_10,
                    3 => DTPSR::_11,
                    i => DTPSR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0X`"]
            #[inline(always)]
            pub fn is_0x(&self) -> bool {
                *self == DTPSR::_0X
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == DTPSR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == DTPSR::_11
            }
        }
        #[doc = r" Value of the field"]
        pub struct DTVALEXR {
            bits: u8,
        }
        impl DTVALEXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DTPS`"]
        pub enum DTPSW {
            #[doc = "Divide the FTM input clock by 1."]
            _0X,
            #[doc = "Divide the FTM input clock by 4."]
            _10,
            #[doc = "Divide the FTM input clock by 16."]
            _11,
        }
        impl DTPSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    DTPSW::_0X => 0,
                    DTPSW::_10 => 2,
                    DTPSW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTPSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTPSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DTPSW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Divide the FTM input clock by 1."]
            #[inline(always)]
            pub fn _0x(self) -> &'a mut W {
                self.variant(DTPSW::_0X)
            }
            #[doc = "Divide the FTM input clock by 4."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(DTPSW::_10)
            }
            #[doc = "Divide the FTM input clock by 16."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(DTPSW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTVALEXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTVALEXW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Deadtime Value"]
            #[inline(always)]
            pub fn dtval(&self) -> DTVALR {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DTVALR { bits }
            }
            #[doc = "Bits 6:7 - Deadtime Prescaler Value"]
            #[inline(always)]
            pub fn dtps(&self) -> DTPSR {
                DTPSR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 16:19 - Extended Deadtime Value"]
            #[inline(always)]
            pub fn dtvalex(&self) -> DTVALEXR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DTVALEXR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - Deadtime Value"]
            #[inline(always)]
            pub fn dtval(&mut self) -> _DTVALW {
                _DTVALW { w: self }
            }
            #[doc = "Bits 6:7 - Deadtime Prescaler Value"]
            #[inline(always)]
            pub fn dtps(&mut self) -> _DTPSW {
                _DTPSW { w: self }
            }
            #[doc = "Bits 16:19 - Extended Deadtime Value"]
            #[inline(always)]
            pub fn dtvalex(&mut self) -> _DTVALEXW {
                _DTVALEXW { w: self }
            }
        }
    }
    #[doc = "Pair 3 Deadtime Configuration"]
    pub struct PAIR3DEADTIME {
        register: VolatileCell<u32>,
    }
    #[doc = "Pair 3 Deadtime Configuration"]
    pub mod pair3deadtime {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PAIR3DEADTIME {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DTVALR {
            bits: u8,
        }
        impl DTVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DTPS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DTPSR {
            #[doc = "Divide the FTM input clock by 1."]
            _0X,
            #[doc = "Divide the FTM input clock by 4."]
            _10,
            #[doc = "Divide the FTM input clock by 16."]
            _11,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl DTPSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    DTPSR::_0X => 0,
                    DTPSR::_10 => 2,
                    DTPSR::_11 => 3,
                    DTPSR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> DTPSR {
                match value {
                    0 => DTPSR::_0X,
                    2 => DTPSR::_10,
                    3 => DTPSR::_11,
                    i => DTPSR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0X`"]
            #[inline(always)]
            pub fn is_0x(&self) -> bool {
                *self == DTPSR::_0X
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == DTPSR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == DTPSR::_11
            }
        }
        #[doc = r" Value of the field"]
        pub struct DTVALEXR {
            bits: u8,
        }
        impl DTVALEXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DTPS`"]
        pub enum DTPSW {
            #[doc = "Divide the FTM input clock by 1."]
            _0X,
            #[doc = "Divide the FTM input clock by 4."]
            _10,
            #[doc = "Divide the FTM input clock by 16."]
            _11,
        }
        impl DTPSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    DTPSW::_0X => 0,
                    DTPSW::_10 => 2,
                    DTPSW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTPSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTPSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DTPSW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Divide the FTM input clock by 1."]
            #[inline(always)]
            pub fn _0x(self) -> &'a mut W {
                self.variant(DTPSW::_0X)
            }
            #[doc = "Divide the FTM input clock by 4."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(DTPSW::_10)
            }
            #[doc = "Divide the FTM input clock by 16."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(DTPSW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTVALEXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTVALEXW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Deadtime Value"]
            #[inline(always)]
            pub fn dtval(&self) -> DTVALR {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DTVALR { bits }
            }
            #[doc = "Bits 6:7 - Deadtime Prescaler Value"]
            #[inline(always)]
            pub fn dtps(&self) -> DTPSR {
                DTPSR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 16:19 - Extended Deadtime Value"]
            #[inline(always)]
            pub fn dtvalex(&self) -> DTVALEXR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DTVALEXR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - Deadtime Value"]
            #[inline(always)]
            pub fn dtval(&mut self) -> _DTVALW {
                _DTVALW { w: self }
            }
            #[doc = "Bits 6:7 - Deadtime Prescaler Value"]
            #[inline(always)]
            pub fn dtps(&mut self) -> _DTPSW {
                _DTPSW { w: self }
            }
            #[doc = "Bits 16:19 - Extended Deadtime Value"]
            #[inline(always)]
            pub fn dtvalex(&mut self) -> _DTVALEXW {
                _DTVALEXW { w: self }
            }
        }
    }
}
#[doc = "FlexTimer Module"]
pub struct FTM0 {
    register_block: ftm0::RegisterBlock,
}
impl Deref for FTM0 {
    type Target = ftm0::RegisterBlock;
    fn deref(&self) -> &ftm0::RegisterBlock {
        &self.register_block
    }
}
#[doc = "FlexTimer Module"]
pub const FTM1: Peripheral<FTM1> = unsafe { Peripheral::new(1073975296) };
#[doc = "FlexTimer Module"]
pub mod ftm1 {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - Status And Control"]
        pub sc: SC,
        #[doc = "0x04 - Counter"]
        pub cnt: CNT,
        #[doc = "0x08 - Modulo"]
        pub mod_: MOD,
        #[doc = "0x0c - Channel (n) Status And Control"]
        pub c0sc: C0SC,
        #[doc = "0x10 - Channel (n) Value"]
        pub c0v: C0V,
        #[doc = "0x14 - Channel (n) Status And Control"]
        pub c1sc: C1SC,
        #[doc = "0x18 - Channel (n) Value"]
        pub c1v: C1V,
        #[doc = "0x1c - Channel (n) Status And Control"]
        pub c2sc: C2SC,
        #[doc = "0x20 - Channel (n) Value"]
        pub c2v: C2V,
        #[doc = "0x24 - Channel (n) Status And Control"]
        pub c3sc: C3SC,
        #[doc = "0x28 - Channel (n) Value"]
        pub c3v: C3V,
        #[doc = "0x2c - Channel (n) Status And Control"]
        pub c4sc: C4SC,
        #[doc = "0x30 - Channel (n) Value"]
        pub c4v: C4V,
        #[doc = "0x34 - Channel (n) Status And Control"]
        pub c5sc: C5SC,
        #[doc = "0x38 - Channel (n) Value"]
        pub c5v: C5V,
        #[doc = "0x3c - Channel (n) Status And Control"]
        pub c6sc: C6SC,
        #[doc = "0x40 - Channel (n) Value"]
        pub c6v: C6V,
        #[doc = "0x44 - Channel (n) Status And Control"]
        pub c7sc: C7SC,
        #[doc = "0x48 - Channel (n) Value"]
        pub c7v: C7V,
        #[doc = "0x4c - Counter Initial Value"]
        pub cntin: CNTIN,
        #[doc = "0x50 - Capture And Compare Status"]
        pub status: STATUS,
        #[doc = "0x54 - Features Mode Selection"]
        pub mode: MODE,
        #[doc = "0x58 - Synchronization"]
        pub sync: SYNC,
        #[doc = "0x5c - Initial State For Channels Output"]
        pub outinit: OUTINIT,
        #[doc = "0x60 - Output Mask"]
        pub outmask: OUTMASK,
        #[doc = "0x64 - Function For Linked Channels"]
        pub combine: COMBINE,
        #[doc = "0x68 - Deadtime Configuration"]
        pub deadtime: DEADTIME,
        #[doc = "0x6c - FTM External Trigger"]
        pub exttrig: EXTTRIG,
        #[doc = "0x70 - Channels Polarity"]
        pub pol: POL,
        #[doc = "0x74 - Fault Mode Status"]
        pub fms: FMS,
        #[doc = "0x78 - Input Capture Filter Control"]
        pub filter: FILTER,
        #[doc = "0x7c - Fault Control"]
        pub fltctrl: FLTCTRL,
        #[doc = "0x80 - Quadrature Decoder Control And Status"]
        pub qdctrl: QDCTRL,
        #[doc = "0x84 - Configuration"]
        pub conf: CONF,
        #[doc = "0x88 - FTM Fault Input Polarity"]
        pub fltpol: FLTPOL,
        #[doc = "0x8c - Synchronization Configuration"]
        pub synconf: SYNCONF,
        #[doc = "0x90 - FTM Inverting Control"]
        pub invctrl: INVCTRL,
        #[doc = "0x94 - FTM Software Output Control"]
        pub swoctrl: SWOCTRL,
        #[doc = "0x98 - FTM PWM Load"]
        pub pwmload: PWMLOAD,
        #[doc = "0x9c - Half Cycle Register"]
        pub hcr: HCR,
        #[doc = "0xa0 - Pair 0 Deadtime Configuration"]
        pub pair0deadtime: PAIR0DEADTIME,
        _reserved0: [u8; 4usize],
        #[doc = "0xa8 - Pair 1 Deadtime Configuration"]
        pub pair1deadtime: PAIR1DEADTIME,
        _reserved1: [u8; 4usize],
        #[doc = "0xb0 - Pair 2 Deadtime Configuration"]
        pub pair2deadtime: PAIR2DEADTIME,
        _reserved2: [u8; 4usize],
        #[doc = "0xb8 - Pair 3 Deadtime Configuration"]
        pub pair3deadtime: PAIR3DEADTIME,
    }
    #[doc = "Status And Control"]
    pub struct SC {
        register: VolatileCell<u32>,
    }
    #[doc = "Status And Control"]
    pub mod sc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Divide by 1"]
            _000,
            #[doc = "Divide by 2"]
            _001,
            #[doc = "Divide by 4"]
            _010,
            #[doc = "Divide by 8"]
            _011,
            #[doc = "Divide by 16"]
            _100,
            #[doc = "Divide by 32"]
            _101,
            #[doc = "Divide by 64"]
            _110,
            #[doc = "Divide by 128"]
            _111,
        }
        impl PSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PSR::_000 => 0,
                    PSR::_001 => 1,
                    PSR::_010 => 2,
                    PSR::_011 => 3,
                    PSR::_100 => 4,
                    PSR::_101 => 5,
                    PSR::_110 => 6,
                    PSR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PSR {
                match value {
                    0 => PSR::_000,
                    1 => PSR::_001,
                    2 => PSR::_010,
                    3 => PSR::_011,
                    4 => PSR::_100,
                    5 => PSR::_101,
                    6 => PSR::_110,
                    7 => PSR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == PSR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == PSR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == PSR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == PSR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == PSR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == PSR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == PSR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == PSR::_111
            }
        }
        #[doc = "Possible values of the field `CLKS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CLKSR {
            #[doc = "No clock selected. This in effect disables the FTM counter."]
            _00,
            #[doc = "FTM input clock"]
            _01,
            #[doc = "Fixed frequency clock"]
            _10,
            #[doc = "External clock"]
            _11,
        }
        impl CLKSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    CLKSR::_00 => 0,
                    CLKSR::_01 => 1,
                    CLKSR::_10 => 2,
                    CLKSR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> CLKSR {
                match value {
                    0 => CLKSR::_00,
                    1 => CLKSR::_01,
                    2 => CLKSR::_10,
                    3 => CLKSR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == CLKSR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == CLKSR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == CLKSR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == CLKSR::_11
            }
        }
        #[doc = "Possible values of the field `CPWMS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CPWMSR {
            #[doc = "FTM counter operates in Up Counting mode."]
            _0,
            #[doc = "FTM counter operates in Up-Down Counting mode."]
            _1,
        }
        impl CPWMSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CPWMSR::_0 => false,
                    CPWMSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CPWMSR {
                match value {
                    false => CPWMSR::_0,
                    true => CPWMSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CPWMSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CPWMSR::_1
            }
        }
        #[doc = "Possible values of the field `RIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RIER {
            #[doc = "Reload point interrupt is disabled."]
            _0,
            #[doc = "Reload point interrupt is enabled."]
            _1,
        }
        impl RIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RIER::_0 => false,
                    RIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RIER {
                match value {
                    false => RIER::_0,
                    true => RIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RIER::_1
            }
        }
        #[doc = "Possible values of the field `RF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RFR {
            #[doc = "A selected reload point did not happen."]
            _0,
            #[doc = "A selected reload point happened."]
            _1,
        }
        impl RFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RFR::_0 => false,
                    RFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RFR {
                match value {
                    false => RFR::_0,
                    true => RFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RFR::_1
            }
        }
        #[doc = "Possible values of the field `TOIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TOIER {
            #[doc = "Disable TOF interrupts. Use software polling."]
            _0,
            #[doc = "Enable TOF interrupts. An interrupt is generated when TOF equals one."]
            _1,
        }
        impl TOIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TOIER::_0 => false,
                    TOIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TOIER {
                match value {
                    false => TOIER::_0,
                    true => TOIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TOIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TOIER::_1
            }
        }
        #[doc = "Possible values of the field `TOF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TOFR {
            #[doc = "FTM counter has not overflowed."]
            _0,
            #[doc = "FTM counter has overflowed."]
            _1,
        }
        impl TOFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TOFR::_0 => false,
                    TOFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TOFR {
                match value {
                    false => TOFR::_0,
                    true => TOFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TOFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TOFR::_1
            }
        }
        #[doc = "Possible values of the field `PWMEN0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PWMEN0R {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PWMEN0R::_0 => false,
                    PWMEN0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PWMEN0R {
                match value {
                    false => PWMEN0R::_0,
                    true => PWMEN0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PWMEN0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PWMEN0R::_1
            }
        }
        #[doc = "Possible values of the field `PWMEN1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PWMEN1R {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PWMEN1R::_0 => false,
                    PWMEN1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PWMEN1R {
                match value {
                    false => PWMEN1R::_0,
                    true => PWMEN1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PWMEN1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PWMEN1R::_1
            }
        }
        #[doc = "Possible values of the field `PWMEN2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PWMEN2R {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PWMEN2R::_0 => false,
                    PWMEN2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PWMEN2R {
                match value {
                    false => PWMEN2R::_0,
                    true => PWMEN2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PWMEN2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PWMEN2R::_1
            }
        }
        #[doc = "Possible values of the field `PWMEN3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PWMEN3R {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PWMEN3R::_0 => false,
                    PWMEN3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PWMEN3R {
                match value {
                    false => PWMEN3R::_0,
                    true => PWMEN3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PWMEN3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PWMEN3R::_1
            }
        }
        #[doc = "Possible values of the field `PWMEN4`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PWMEN4R {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN4R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PWMEN4R::_0 => false,
                    PWMEN4R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PWMEN4R {
                match value {
                    false => PWMEN4R::_0,
                    true => PWMEN4R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PWMEN4R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PWMEN4R::_1
            }
        }
        #[doc = "Possible values of the field `PWMEN5`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PWMEN5R {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN5R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PWMEN5R::_0 => false,
                    PWMEN5R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PWMEN5R {
                match value {
                    false => PWMEN5R::_0,
                    true => PWMEN5R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PWMEN5R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PWMEN5R::_1
            }
        }
        #[doc = "Possible values of the field `PWMEN6`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PWMEN6R {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN6R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PWMEN6R::_0 => false,
                    PWMEN6R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PWMEN6R {
                match value {
                    false => PWMEN6R::_0,
                    true => PWMEN6R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PWMEN6R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PWMEN6R::_1
            }
        }
        #[doc = "Possible values of the field `PWMEN7`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PWMEN7R {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN7R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PWMEN7R::_0 => false,
                    PWMEN7R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PWMEN7R {
                match value {
                    false => PWMEN7R::_0,
                    true => PWMEN7R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PWMEN7R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PWMEN7R::_1
            }
        }
        #[doc = "Possible values of the field `FLTPS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FLTPSR {
            #[doc = "Divide by 1"]
            _0000,
            #[doc = "Divide by 2"]
            _0001,
            #[doc = "Divide by 3"]
            _0010,
            #[doc = "Divide by 4"]
            _0011,
            #[doc = "Divide by 5"]
            _0100,
            #[doc = "Divide by 6"]
            _0101,
            #[doc = "Divide by 7"]
            _0110,
            #[doc = "Divide by 8"]
            _0111,
            #[doc = "Divide by 9"]
            _1000,
            #[doc = "Divide by 10"]
            _1001,
            #[doc = "Divide by 11"]
            _1010,
            #[doc = "Divide by 12"]
            _1011,
            #[doc = "Divide by 13"]
            _1100,
            #[doc = "Divide by 14"]
            _1101,
            #[doc = "Divide by 15"]
            _1110,
            #[doc = "Divide by 16"]
            _1111,
        }
        impl FLTPSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    FLTPSR::_0000 => 0,
                    FLTPSR::_0001 => 1,
                    FLTPSR::_0010 => 2,
                    FLTPSR::_0011 => 3,
                    FLTPSR::_0100 => 4,
                    FLTPSR::_0101 => 5,
                    FLTPSR::_0110 => 6,
                    FLTPSR::_0111 => 7,
                    FLTPSR::_1000 => 8,
                    FLTPSR::_1001 => 9,
                    FLTPSR::_1010 => 10,
                    FLTPSR::_1011 => 11,
                    FLTPSR::_1100 => 12,
                    FLTPSR::_1101 => 13,
                    FLTPSR::_1110 => 14,
                    FLTPSR::_1111 => 15,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> FLTPSR {
                match value {
                    0 => FLTPSR::_0000,
                    1 => FLTPSR::_0001,
                    2 => FLTPSR::_0010,
                    3 => FLTPSR::_0011,
                    4 => FLTPSR::_0100,
                    5 => FLTPSR::_0101,
                    6 => FLTPSR::_0110,
                    7 => FLTPSR::_0111,
                    8 => FLTPSR::_1000,
                    9 => FLTPSR::_1001,
                    10 => FLTPSR::_1010,
                    11 => FLTPSR::_1011,
                    12 => FLTPSR::_1100,
                    13 => FLTPSR::_1101,
                    14 => FLTPSR::_1110,
                    15 => FLTPSR::_1111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == FLTPSR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == FLTPSR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == FLTPSR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == FLTPSR::_0011
            }
            #[doc = "Checks if the value of the field is `_0100`"]
            #[inline(always)]
            pub fn is_0100(&self) -> bool {
                *self == FLTPSR::_0100
            }
            #[doc = "Checks if the value of the field is `_0101`"]
            #[inline(always)]
            pub fn is_0101(&self) -> bool {
                *self == FLTPSR::_0101
            }
            #[doc = "Checks if the value of the field is `_0110`"]
            #[inline(always)]
            pub fn is_0110(&self) -> bool {
                *self == FLTPSR::_0110
            }
            #[doc = "Checks if the value of the field is `_0111`"]
            #[inline(always)]
            pub fn is_0111(&self) -> bool {
                *self == FLTPSR::_0111
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == FLTPSR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == FLTPSR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == FLTPSR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == FLTPSR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == FLTPSR::_1100
            }
            #[doc = "Checks if the value of the field is `_1101`"]
            #[inline(always)]
            pub fn is_1101(&self) -> bool {
                *self == FLTPSR::_1101
            }
            #[doc = "Checks if the value of the field is `_1110`"]
            #[inline(always)]
            pub fn is_1110(&self) -> bool {
                *self == FLTPSR::_1110
            }
            #[doc = "Checks if the value of the field is `_1111`"]
            #[inline(always)]
            pub fn is_1111(&self) -> bool {
                *self == FLTPSR::_1111
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Divide by 1"]
            _000,
            #[doc = "Divide by 2"]
            _001,
            #[doc = "Divide by 4"]
            _010,
            #[doc = "Divide by 8"]
            _011,
            #[doc = "Divide by 16"]
            _100,
            #[doc = "Divide by 32"]
            _101,
            #[doc = "Divide by 64"]
            _110,
            #[doc = "Divide by 128"]
            _111,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PSW::_000 => 0,
                    PSW::_001 => 1,
                    PSW::_010 => 2,
                    PSW::_011 => 3,
                    PSW::_100 => 4,
                    PSW::_101 => 5,
                    PSW::_110 => 6,
                    PSW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Divide by 1"]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(PSW::_000)
            }
            #[doc = "Divide by 2"]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(PSW::_001)
            }
            #[doc = "Divide by 4"]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(PSW::_010)
            }
            #[doc = "Divide by 8"]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(PSW::_011)
            }
            #[doc = "Divide by 16"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(PSW::_100)
            }
            #[doc = "Divide by 32"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(PSW::_101)
            }
            #[doc = "Divide by 64"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(PSW::_110)
            }
            #[doc = "Divide by 128"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(PSW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CLKS`"]
        pub enum CLKSW {
            #[doc = "No clock selected. This in effect disables the FTM counter."]
            _00,
            #[doc = "FTM input clock"]
            _01,
            #[doc = "Fixed frequency clock"]
            _10,
            #[doc = "External clock"]
            _11,
        }
        impl CLKSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    CLKSW::_00 => 0,
                    CLKSW::_01 => 1,
                    CLKSW::_10 => 2,
                    CLKSW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLKSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLKSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CLKSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "No clock selected. This in effect disables the FTM counter."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(CLKSW::_00)
            }
            #[doc = "FTM input clock"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(CLKSW::_01)
            }
            #[doc = "Fixed frequency clock"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(CLKSW::_10)
            }
            #[doc = "External clock"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(CLKSW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CPWMS`"]
        pub enum CPWMSW {
            #[doc = "FTM counter operates in Up Counting mode."]
            _0,
            #[doc = "FTM counter operates in Up-Down Counting mode."]
            _1,
        }
        impl CPWMSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CPWMSW::_0 => false,
                    CPWMSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CPWMSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CPWMSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CPWMSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM counter operates in Up Counting mode."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CPWMSW::_0)
            }
            #[doc = "FTM counter operates in Up-Down Counting mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CPWMSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RIE`"]
        pub enum RIEW {
            #[doc = "Reload point interrupt is disabled."]
            _0,
            #[doc = "Reload point interrupt is enabled."]
            _1,
        }
        impl RIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RIEW::_0 => false,
                    RIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Reload point interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RIEW::_0)
            }
            #[doc = "Reload point interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TOIE`"]
        pub enum TOIEW {
            #[doc = "Disable TOF interrupts. Use software polling."]
            _0,
            #[doc = "Enable TOF interrupts. An interrupt is generated when TOF equals one."]
            _1,
        }
        impl TOIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TOIEW::_0 => false,
                    TOIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TOIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TOIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TOIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable TOF interrupts. Use software polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TOIEW::_0)
            }
            #[doc = "Enable TOF interrupts. An interrupt is generated when TOF equals one."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TOIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PWMEN0`"]
        pub enum PWMEN0W {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PWMEN0W::_0 => false,
                    PWMEN0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PWMEN0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _PWMEN0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PWMEN0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output port is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PWMEN0W::_0)
            }
            #[doc = "Channel output port is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PWMEN0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PWMEN1`"]
        pub enum PWMEN1W {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PWMEN1W::_0 => false,
                    PWMEN1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PWMEN1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _PWMEN1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PWMEN1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output port is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PWMEN1W::_0)
            }
            #[doc = "Channel output port is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PWMEN1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PWMEN2`"]
        pub enum PWMEN2W {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PWMEN2W::_0 => false,
                    PWMEN2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PWMEN2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _PWMEN2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PWMEN2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output port is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PWMEN2W::_0)
            }
            #[doc = "Channel output port is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PWMEN2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PWMEN3`"]
        pub enum PWMEN3W {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PWMEN3W::_0 => false,
                    PWMEN3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PWMEN3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _PWMEN3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PWMEN3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output port is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PWMEN3W::_0)
            }
            #[doc = "Channel output port is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PWMEN3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 19;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PWMEN4`"]
        pub enum PWMEN4W {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN4W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PWMEN4W::_0 => false,
                    PWMEN4W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PWMEN4W<'a> {
            w: &'a mut W,
        }
        impl<'a> _PWMEN4W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PWMEN4W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output port is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PWMEN4W::_0)
            }
            #[doc = "Channel output port is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PWMEN4W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PWMEN5`"]
        pub enum PWMEN5W {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN5W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PWMEN5W::_0 => false,
                    PWMEN5W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PWMEN5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _PWMEN5W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PWMEN5W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output port is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PWMEN5W::_0)
            }
            #[doc = "Channel output port is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PWMEN5W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 21;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PWMEN6`"]
        pub enum PWMEN6W {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN6W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PWMEN6W::_0 => false,
                    PWMEN6W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PWMEN6W<'a> {
            w: &'a mut W,
        }
        impl<'a> _PWMEN6W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PWMEN6W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output port is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PWMEN6W::_0)
            }
            #[doc = "Channel output port is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PWMEN6W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 22;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PWMEN7`"]
        pub enum PWMEN7W {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN7W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PWMEN7W::_0 => false,
                    PWMEN7W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PWMEN7W<'a> {
            w: &'a mut W,
        }
        impl<'a> _PWMEN7W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PWMEN7W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output port is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PWMEN7W::_0)
            }
            #[doc = "Channel output port is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PWMEN7W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 23;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FLTPS`"]
        pub enum FLTPSW {
            #[doc = "Divide by 1"]
            _0000,
            #[doc = "Divide by 2"]
            _0001,
            #[doc = "Divide by 3"]
            _0010,
            #[doc = "Divide by 4"]
            _0011,
            #[doc = "Divide by 5"]
            _0100,
            #[doc = "Divide by 6"]
            _0101,
            #[doc = "Divide by 7"]
            _0110,
            #[doc = "Divide by 8"]
            _0111,
            #[doc = "Divide by 9"]
            _1000,
            #[doc = "Divide by 10"]
            _1001,
            #[doc = "Divide by 11"]
            _1010,
            #[doc = "Divide by 12"]
            _1011,
            #[doc = "Divide by 13"]
            _1100,
            #[doc = "Divide by 14"]
            _1101,
            #[doc = "Divide by 15"]
            _1110,
            #[doc = "Divide by 16"]
            _1111,
        }
        impl FLTPSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    FLTPSW::_0000 => 0,
                    FLTPSW::_0001 => 1,
                    FLTPSW::_0010 => 2,
                    FLTPSW::_0011 => 3,
                    FLTPSW::_0100 => 4,
                    FLTPSW::_0101 => 5,
                    FLTPSW::_0110 => 6,
                    FLTPSW::_0111 => 7,
                    FLTPSW::_1000 => 8,
                    FLTPSW::_1001 => 9,
                    FLTPSW::_1010 => 10,
                    FLTPSW::_1011 => 11,
                    FLTPSW::_1100 => 12,
                    FLTPSW::_1101 => 13,
                    FLTPSW::_1110 => 14,
                    FLTPSW::_1111 => 15,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FLTPSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FLTPSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FLTPSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Divide by 1"]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(FLTPSW::_0000)
            }
            #[doc = "Divide by 2"]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(FLTPSW::_0001)
            }
            #[doc = "Divide by 3"]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(FLTPSW::_0010)
            }
            #[doc = "Divide by 4"]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(FLTPSW::_0011)
            }
            #[doc = "Divide by 5"]
            #[inline(always)]
            pub fn _0100(self) -> &'a mut W {
                self.variant(FLTPSW::_0100)
            }
            #[doc = "Divide by 6"]
            #[inline(always)]
            pub fn _0101(self) -> &'a mut W {
                self.variant(FLTPSW::_0101)
            }
            #[doc = "Divide by 7"]
            #[inline(always)]
            pub fn _0110(self) -> &'a mut W {
                self.variant(FLTPSW::_0110)
            }
            #[doc = "Divide by 8"]
            #[inline(always)]
            pub fn _0111(self) -> &'a mut W {
                self.variant(FLTPSW::_0111)
            }
            #[doc = "Divide by 9"]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(FLTPSW::_1000)
            }
            #[doc = "Divide by 10"]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(FLTPSW::_1001)
            }
            #[doc = "Divide by 11"]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(FLTPSW::_1010)
            }
            #[doc = "Divide by 12"]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(FLTPSW::_1011)
            }
            #[doc = "Divide by 13"]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(FLTPSW::_1100)
            }
            #[doc = "Divide by 14"]
            #[inline(always)]
            pub fn _1101(self) -> &'a mut W {
                self.variant(FLTPSW::_1101)
            }
            #[doc = "Divide by 15"]
            #[inline(always)]
            pub fn _1110(self) -> &'a mut W {
                self.variant(FLTPSW::_1110)
            }
            #[doc = "Divide by 16"]
            #[inline(always)]
            pub fn _1111(self) -> &'a mut W {
                self.variant(FLTPSW::_1111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:2 - Prescale Factor Selection"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 3:4 - Clock Source Selection"]
            #[inline(always)]
            pub fn clks(&self) -> CLKSR {
                CLKSR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 5 - Center-Aligned PWM Select"]
            #[inline(always)]
            pub fn cpwms(&self) -> CPWMSR {
                CPWMSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Reload Point Interrupt Enable"]
            #[inline(always)]
            pub fn rie(&self) -> RIER {
                RIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Reload Flag"]
            #[inline(always)]
            pub fn rf(&self) -> RFR {
                RFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Timer Overflow Interrupt Enable"]
            #[inline(always)]
            pub fn toie(&self) -> TOIER {
                TOIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Timer Overflow Flag"]
            #[inline(always)]
            pub fn tof(&self) -> TOFR {
                TOFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 16 - Channel 0 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen0(&self) -> PWMEN0R {
                PWMEN0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - Channel 1 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen1(&self) -> PWMEN1R {
                PWMEN1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 18 - Channel 2 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen2(&self) -> PWMEN2R {
                PWMEN2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 19 - Channel 3 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen3(&self) -> PWMEN3R {
                PWMEN3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 19;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 20 - Channel 4 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen4(&self) -> PWMEN4R {
                PWMEN4R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - Channel 5 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen5(&self) -> PWMEN5R {
                PWMEN5R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 22 - Channel 6 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen6(&self) -> PWMEN6R {
                PWMEN6R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 23 - Channel 7 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen7(&self) -> PWMEN7R {
                PWMEN7R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 24:27 - Filter Prescaler"]
            #[inline(always)]
            pub fn fltps(&self) -> FLTPSR {
                FLTPSR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:2 - Prescale Factor Selection"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bits 3:4 - Clock Source Selection"]
            #[inline(always)]
            pub fn clks(&mut self) -> _CLKSW {
                _CLKSW { w: self }
            }
            #[doc = "Bit 5 - Center-Aligned PWM Select"]
            #[inline(always)]
            pub fn cpwms(&mut self) -> _CPWMSW {
                _CPWMSW { w: self }
            }
            #[doc = "Bit 6 - Reload Point Interrupt Enable"]
            #[inline(always)]
            pub fn rie(&mut self) -> _RIEW {
                _RIEW { w: self }
            }
            #[doc = "Bit 8 - Timer Overflow Interrupt Enable"]
            #[inline(always)]
            pub fn toie(&mut self) -> _TOIEW {
                _TOIEW { w: self }
            }
            #[doc = "Bit 16 - Channel 0 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen0(&mut self) -> _PWMEN0W {
                _PWMEN0W { w: self }
            }
            #[doc = "Bit 17 - Channel 1 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen1(&mut self) -> _PWMEN1W {
                _PWMEN1W { w: self }
            }
            #[doc = "Bit 18 - Channel 2 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen2(&mut self) -> _PWMEN2W {
                _PWMEN2W { w: self }
            }
            #[doc = "Bit 19 - Channel 3 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen3(&mut self) -> _PWMEN3W {
                _PWMEN3W { w: self }
            }
            #[doc = "Bit 20 - Channel 4 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen4(&mut self) -> _PWMEN4W {
                _PWMEN4W { w: self }
            }
            #[doc = "Bit 21 - Channel 5 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen5(&mut self) -> _PWMEN5W {
                _PWMEN5W { w: self }
            }
            #[doc = "Bit 22 - Channel 6 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen6(&mut self) -> _PWMEN6W {
                _PWMEN6W { w: self }
            }
            #[doc = "Bit 23 - Channel 7 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen7(&mut self) -> _PWMEN7W {
                _PWMEN7W { w: self }
            }
            #[doc = "Bits 24:27 - Filter Prescaler"]
            #[inline(always)]
            pub fn fltps(&mut self) -> _FLTPSW {
                _FLTPSW { w: self }
            }
        }
    }
    #[doc = "Counter"]
    pub struct CNT {
        register: VolatileCell<u32>,
    }
    #[doc = "Counter"]
    pub mod cnt {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CNT {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct COUNTR {
            bits: u16,
        }
        impl COUNTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _COUNTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _COUNTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Counter Value"]
            #[inline(always)]
            pub fn count(&self) -> COUNTR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                COUNTR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Counter Value"]
            #[inline(always)]
            pub fn count(&mut self) -> _COUNTW {
                _COUNTW { w: self }
            }
        }
    }
    #[doc = "Modulo"]
    pub struct MOD {
        register: VolatileCell<u32>,
    }
    #[doc = "Modulo"]
    pub mod mod_ {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::MOD {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MODR {
            bits: u16,
        }
        impl MODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MODW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - MOD"]
            #[inline(always)]
            pub fn mod_(&self) -> MODR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                MODR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - MOD"]
            #[inline(always)]
            pub fn mod_(&mut self) -> _MODW {
                _MODW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Status And Control"]
    pub struct C0SC {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Status And Control"]
    pub mod c0sc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C0SC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DMA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMAR {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMAR::_0 => false,
                    DMAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMAR {
                match value {
                    false => DMAR::_0,
                    true => DMAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMAR::_1
            }
        }
        #[doc = "Possible values of the field `ICRST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ICRSTR {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ICRSTR::_0 => false,
                    ICRSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ICRSTR {
                match value {
                    false => ICRSTR::_0,
                    true => ICRSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ICRSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ICRSTR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSAR {
            bits: bool,
        }
        impl ELSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSBR {
            bits: bool,
        }
        impl ELSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSAR {
            bits: bool,
        }
        impl MSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSBR {
            bits: bool,
        }
        impl MSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `CHIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHIER {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHIER::_0 => false,
                    CHIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHIER {
                match value {
                    false => CHIER::_0,
                    true => CHIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHIER::_1
            }
        }
        #[doc = "Possible values of the field `CHF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHFR {
            #[doc = "No channel (n) event has occurred."]
            _0,
            #[doc = "A channel (n) event has occurred."]
            _1,
        }
        impl CHFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHFR::_0 => false,
                    CHFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHFR {
                match value {
                    false => CHFR::_0,
                    true => CHFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHFR::_1
            }
        }
        #[doc = "Possible values of the field `TRIGMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGMODER {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGMODER::_0 => false,
                    TRIGMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGMODER {
                match value {
                    false => TRIGMODER::_0,
                    true => TRIGMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGMODER::_1
            }
        }
        #[doc = "Possible values of the field `CHIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHISR {
            #[doc = "The channel (n) input is zero."]
            _0,
            #[doc = "The channel (n) input is one."]
            _1,
        }
        impl CHISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHISR::_0 => false,
                    CHISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHISR {
                match value {
                    false => CHISR::_0,
                    true => CHISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHISR::_1
            }
        }
        #[doc = "Possible values of the field `CHOV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHOVR {
            #[doc = "The channel (n) output is zero."]
            _0,
            #[doc = "The channel (n) output is one."]
            _1,
        }
        impl CHOVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHOVR::_0 => false,
                    CHOVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHOVR {
                match value {
                    false => CHOVR::_0,
                    true => CHOVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHOVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHOVR::_1
            }
        }
        #[doc = "Values that can be written to the field `DMA`"]
        pub enum DMAW {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMAW::_0 => false,
                    DMAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable DMA transfers."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMAW::_0)
            }
            #[doc = "Enable DMA transfers."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ICRST`"]
        pub enum ICRSTW {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ICRSTW::_0 => false,
                    ICRSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ICRSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ICRSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ICRSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ICRSTW::_0)
            }
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ICRSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CHIE`"]
        pub enum CHIEW {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CHIEW::_0 => false,
                    CHIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CHIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CHIEW::_0)
            }
            #[doc = "Enable channel (n) interrupt."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CHIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIGMODE`"]
        pub enum TRIGMODEW {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGMODEW::_0 => false,
                    TRIGMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGMODEW::_0)
            }
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&self) -> DMAR {
                DMAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&self) -> ICRSTR {
                ICRSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&self) -> ELSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSAR { bits }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&self) -> ELSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSBR { bits }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&self) -> MSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSAR { bits }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&self) -> MSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSBR { bits }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&self) -> CHIER {
                CHIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel (n) Flag"]
            #[inline(always)]
            pub fn chf(&self) -> CHFR {
                CHFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&self) -> TRIGMODER {
                TRIGMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Channel (n) Input State"]
            #[inline(always)]
            pub fn chis(&self) -> CHISR {
                CHISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Channel (n) Output Value"]
            #[inline(always)]
            pub fn chov(&self) -> CHOVR {
                CHOVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&mut self) -> _DMAW {
                _DMAW { w: self }
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&mut self) -> _ICRSTW {
                _ICRSTW { w: self }
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&mut self) -> _ELSAW {
                _ELSAW { w: self }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&mut self) -> _ELSBW {
                _ELSBW { w: self }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&mut self) -> _MSAW {
                _MSAW { w: self }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&mut self) -> _MSBW {
                _MSBW { w: self }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&mut self) -> _CHIEW {
                _CHIEW { w: self }
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&mut self) -> _TRIGMODEW {
                _TRIGMODEW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Value"]
    pub struct C0V {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Value"]
    pub mod c0v {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C0V {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct VALR {
            bits: u16,
        }
        impl VALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _VALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _VALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&self) -> VALR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                VALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&mut self) -> _VALW {
                _VALW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Status And Control"]
    pub struct C1SC {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Status And Control"]
    pub mod c1sc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C1SC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DMA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMAR {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMAR::_0 => false,
                    DMAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMAR {
                match value {
                    false => DMAR::_0,
                    true => DMAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMAR::_1
            }
        }
        #[doc = "Possible values of the field `ICRST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ICRSTR {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ICRSTR::_0 => false,
                    ICRSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ICRSTR {
                match value {
                    false => ICRSTR::_0,
                    true => ICRSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ICRSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ICRSTR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSAR {
            bits: bool,
        }
        impl ELSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSBR {
            bits: bool,
        }
        impl ELSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSAR {
            bits: bool,
        }
        impl MSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSBR {
            bits: bool,
        }
        impl MSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `CHIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHIER {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHIER::_0 => false,
                    CHIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHIER {
                match value {
                    false => CHIER::_0,
                    true => CHIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHIER::_1
            }
        }
        #[doc = "Possible values of the field `CHF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHFR {
            #[doc = "No channel (n) event has occurred."]
            _0,
            #[doc = "A channel (n) event has occurred."]
            _1,
        }
        impl CHFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHFR::_0 => false,
                    CHFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHFR {
                match value {
                    false => CHFR::_0,
                    true => CHFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHFR::_1
            }
        }
        #[doc = "Possible values of the field `TRIGMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGMODER {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGMODER::_0 => false,
                    TRIGMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGMODER {
                match value {
                    false => TRIGMODER::_0,
                    true => TRIGMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGMODER::_1
            }
        }
        #[doc = "Possible values of the field `CHIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHISR {
            #[doc = "The channel (n) input is zero."]
            _0,
            #[doc = "The channel (n) input is one."]
            _1,
        }
        impl CHISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHISR::_0 => false,
                    CHISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHISR {
                match value {
                    false => CHISR::_0,
                    true => CHISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHISR::_1
            }
        }
        #[doc = "Possible values of the field `CHOV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHOVR {
            #[doc = "The channel (n) output is zero."]
            _0,
            #[doc = "The channel (n) output is one."]
            _1,
        }
        impl CHOVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHOVR::_0 => false,
                    CHOVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHOVR {
                match value {
                    false => CHOVR::_0,
                    true => CHOVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHOVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHOVR::_1
            }
        }
        #[doc = "Values that can be written to the field `DMA`"]
        pub enum DMAW {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMAW::_0 => false,
                    DMAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable DMA transfers."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMAW::_0)
            }
            #[doc = "Enable DMA transfers."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ICRST`"]
        pub enum ICRSTW {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ICRSTW::_0 => false,
                    ICRSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ICRSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ICRSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ICRSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ICRSTW::_0)
            }
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ICRSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CHIE`"]
        pub enum CHIEW {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CHIEW::_0 => false,
                    CHIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CHIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CHIEW::_0)
            }
            #[doc = "Enable channel (n) interrupt."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CHIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIGMODE`"]
        pub enum TRIGMODEW {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGMODEW::_0 => false,
                    TRIGMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGMODEW::_0)
            }
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&self) -> DMAR {
                DMAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&self) -> ICRSTR {
                ICRSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&self) -> ELSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSAR { bits }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&self) -> ELSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSBR { bits }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&self) -> MSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSAR { bits }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&self) -> MSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSBR { bits }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&self) -> CHIER {
                CHIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel (n) Flag"]
            #[inline(always)]
            pub fn chf(&self) -> CHFR {
                CHFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&self) -> TRIGMODER {
                TRIGMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Channel (n) Input State"]
            #[inline(always)]
            pub fn chis(&self) -> CHISR {
                CHISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Channel (n) Output Value"]
            #[inline(always)]
            pub fn chov(&self) -> CHOVR {
                CHOVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&mut self) -> _DMAW {
                _DMAW { w: self }
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&mut self) -> _ICRSTW {
                _ICRSTW { w: self }
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&mut self) -> _ELSAW {
                _ELSAW { w: self }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&mut self) -> _ELSBW {
                _ELSBW { w: self }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&mut self) -> _MSAW {
                _MSAW { w: self }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&mut self) -> _MSBW {
                _MSBW { w: self }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&mut self) -> _CHIEW {
                _CHIEW { w: self }
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&mut self) -> _TRIGMODEW {
                _TRIGMODEW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Value"]
    pub struct C1V {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Value"]
    pub mod c1v {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C1V {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct VALR {
            bits: u16,
        }
        impl VALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _VALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _VALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&self) -> VALR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                VALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&mut self) -> _VALW {
                _VALW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Status And Control"]
    pub struct C2SC {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Status And Control"]
    pub mod c2sc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C2SC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DMA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMAR {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMAR::_0 => false,
                    DMAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMAR {
                match value {
                    false => DMAR::_0,
                    true => DMAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMAR::_1
            }
        }
        #[doc = "Possible values of the field `ICRST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ICRSTR {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ICRSTR::_0 => false,
                    ICRSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ICRSTR {
                match value {
                    false => ICRSTR::_0,
                    true => ICRSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ICRSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ICRSTR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSAR {
            bits: bool,
        }
        impl ELSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSBR {
            bits: bool,
        }
        impl ELSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSAR {
            bits: bool,
        }
        impl MSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSBR {
            bits: bool,
        }
        impl MSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `CHIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHIER {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHIER::_0 => false,
                    CHIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHIER {
                match value {
                    false => CHIER::_0,
                    true => CHIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHIER::_1
            }
        }
        #[doc = "Possible values of the field `CHF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHFR {
            #[doc = "No channel (n) event has occurred."]
            _0,
            #[doc = "A channel (n) event has occurred."]
            _1,
        }
        impl CHFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHFR::_0 => false,
                    CHFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHFR {
                match value {
                    false => CHFR::_0,
                    true => CHFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHFR::_1
            }
        }
        #[doc = "Possible values of the field `TRIGMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGMODER {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGMODER::_0 => false,
                    TRIGMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGMODER {
                match value {
                    false => TRIGMODER::_0,
                    true => TRIGMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGMODER::_1
            }
        }
        #[doc = "Possible values of the field `CHIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHISR {
            #[doc = "The channel (n) input is zero."]
            _0,
            #[doc = "The channel (n) input is one."]
            _1,
        }
        impl CHISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHISR::_0 => false,
                    CHISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHISR {
                match value {
                    false => CHISR::_0,
                    true => CHISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHISR::_1
            }
        }
        #[doc = "Possible values of the field `CHOV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHOVR {
            #[doc = "The channel (n) output is zero."]
            _0,
            #[doc = "The channel (n) output is one."]
            _1,
        }
        impl CHOVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHOVR::_0 => false,
                    CHOVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHOVR {
                match value {
                    false => CHOVR::_0,
                    true => CHOVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHOVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHOVR::_1
            }
        }
        #[doc = "Values that can be written to the field `DMA`"]
        pub enum DMAW {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMAW::_0 => false,
                    DMAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable DMA transfers."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMAW::_0)
            }
            #[doc = "Enable DMA transfers."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ICRST`"]
        pub enum ICRSTW {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ICRSTW::_0 => false,
                    ICRSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ICRSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ICRSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ICRSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ICRSTW::_0)
            }
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ICRSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CHIE`"]
        pub enum CHIEW {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CHIEW::_0 => false,
                    CHIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CHIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CHIEW::_0)
            }
            #[doc = "Enable channel (n) interrupt."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CHIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIGMODE`"]
        pub enum TRIGMODEW {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGMODEW::_0 => false,
                    TRIGMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGMODEW::_0)
            }
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&self) -> DMAR {
                DMAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&self) -> ICRSTR {
                ICRSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&self) -> ELSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSAR { bits }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&self) -> ELSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSBR { bits }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&self) -> MSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSAR { bits }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&self) -> MSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSBR { bits }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&self) -> CHIER {
                CHIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel (n) Flag"]
            #[inline(always)]
            pub fn chf(&self) -> CHFR {
                CHFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&self) -> TRIGMODER {
                TRIGMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Channel (n) Input State"]
            #[inline(always)]
            pub fn chis(&self) -> CHISR {
                CHISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Channel (n) Output Value"]
            #[inline(always)]
            pub fn chov(&self) -> CHOVR {
                CHOVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&mut self) -> _DMAW {
                _DMAW { w: self }
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&mut self) -> _ICRSTW {
                _ICRSTW { w: self }
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&mut self) -> _ELSAW {
                _ELSAW { w: self }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&mut self) -> _ELSBW {
                _ELSBW { w: self }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&mut self) -> _MSAW {
                _MSAW { w: self }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&mut self) -> _MSBW {
                _MSBW { w: self }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&mut self) -> _CHIEW {
                _CHIEW { w: self }
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&mut self) -> _TRIGMODEW {
                _TRIGMODEW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Value"]
    pub struct C2V {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Value"]
    pub mod c2v {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C2V {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct VALR {
            bits: u16,
        }
        impl VALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _VALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _VALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&self) -> VALR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                VALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&mut self) -> _VALW {
                _VALW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Status And Control"]
    pub struct C3SC {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Status And Control"]
    pub mod c3sc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C3SC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DMA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMAR {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMAR::_0 => false,
                    DMAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMAR {
                match value {
                    false => DMAR::_0,
                    true => DMAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMAR::_1
            }
        }
        #[doc = "Possible values of the field `ICRST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ICRSTR {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ICRSTR::_0 => false,
                    ICRSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ICRSTR {
                match value {
                    false => ICRSTR::_0,
                    true => ICRSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ICRSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ICRSTR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSAR {
            bits: bool,
        }
        impl ELSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSBR {
            bits: bool,
        }
        impl ELSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSAR {
            bits: bool,
        }
        impl MSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSBR {
            bits: bool,
        }
        impl MSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `CHIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHIER {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHIER::_0 => false,
                    CHIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHIER {
                match value {
                    false => CHIER::_0,
                    true => CHIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHIER::_1
            }
        }
        #[doc = "Possible values of the field `CHF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHFR {
            #[doc = "No channel (n) event has occurred."]
            _0,
            #[doc = "A channel (n) event has occurred."]
            _1,
        }
        impl CHFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHFR::_0 => false,
                    CHFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHFR {
                match value {
                    false => CHFR::_0,
                    true => CHFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHFR::_1
            }
        }
        #[doc = "Possible values of the field `TRIGMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGMODER {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGMODER::_0 => false,
                    TRIGMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGMODER {
                match value {
                    false => TRIGMODER::_0,
                    true => TRIGMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGMODER::_1
            }
        }
        #[doc = "Possible values of the field `CHIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHISR {
            #[doc = "The channel (n) input is zero."]
            _0,
            #[doc = "The channel (n) input is one."]
            _1,
        }
        impl CHISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHISR::_0 => false,
                    CHISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHISR {
                match value {
                    false => CHISR::_0,
                    true => CHISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHISR::_1
            }
        }
        #[doc = "Possible values of the field `CHOV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHOVR {
            #[doc = "The channel (n) output is zero."]
            _0,
            #[doc = "The channel (n) output is one."]
            _1,
        }
        impl CHOVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHOVR::_0 => false,
                    CHOVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHOVR {
                match value {
                    false => CHOVR::_0,
                    true => CHOVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHOVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHOVR::_1
            }
        }
        #[doc = "Values that can be written to the field `DMA`"]
        pub enum DMAW {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMAW::_0 => false,
                    DMAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable DMA transfers."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMAW::_0)
            }
            #[doc = "Enable DMA transfers."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ICRST`"]
        pub enum ICRSTW {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ICRSTW::_0 => false,
                    ICRSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ICRSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ICRSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ICRSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ICRSTW::_0)
            }
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ICRSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CHIE`"]
        pub enum CHIEW {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CHIEW::_0 => false,
                    CHIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CHIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CHIEW::_0)
            }
            #[doc = "Enable channel (n) interrupt."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CHIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIGMODE`"]
        pub enum TRIGMODEW {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGMODEW::_0 => false,
                    TRIGMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGMODEW::_0)
            }
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&self) -> DMAR {
                DMAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&self) -> ICRSTR {
                ICRSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&self) -> ELSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSAR { bits }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&self) -> ELSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSBR { bits }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&self) -> MSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSAR { bits }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&self) -> MSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSBR { bits }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&self) -> CHIER {
                CHIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel (n) Flag"]
            #[inline(always)]
            pub fn chf(&self) -> CHFR {
                CHFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&self) -> TRIGMODER {
                TRIGMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Channel (n) Input State"]
            #[inline(always)]
            pub fn chis(&self) -> CHISR {
                CHISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Channel (n) Output Value"]
            #[inline(always)]
            pub fn chov(&self) -> CHOVR {
                CHOVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&mut self) -> _DMAW {
                _DMAW { w: self }
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&mut self) -> _ICRSTW {
                _ICRSTW { w: self }
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&mut self) -> _ELSAW {
                _ELSAW { w: self }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&mut self) -> _ELSBW {
                _ELSBW { w: self }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&mut self) -> _MSAW {
                _MSAW { w: self }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&mut self) -> _MSBW {
                _MSBW { w: self }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&mut self) -> _CHIEW {
                _CHIEW { w: self }
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&mut self) -> _TRIGMODEW {
                _TRIGMODEW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Value"]
    pub struct C3V {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Value"]
    pub mod c3v {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C3V {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct VALR {
            bits: u16,
        }
        impl VALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _VALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _VALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&self) -> VALR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                VALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&mut self) -> _VALW {
                _VALW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Status And Control"]
    pub struct C4SC {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Status And Control"]
    pub mod c4sc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C4SC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DMA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMAR {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMAR::_0 => false,
                    DMAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMAR {
                match value {
                    false => DMAR::_0,
                    true => DMAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMAR::_1
            }
        }
        #[doc = "Possible values of the field `ICRST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ICRSTR {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ICRSTR::_0 => false,
                    ICRSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ICRSTR {
                match value {
                    false => ICRSTR::_0,
                    true => ICRSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ICRSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ICRSTR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSAR {
            bits: bool,
        }
        impl ELSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSBR {
            bits: bool,
        }
        impl ELSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSAR {
            bits: bool,
        }
        impl MSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSBR {
            bits: bool,
        }
        impl MSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `CHIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHIER {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHIER::_0 => false,
                    CHIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHIER {
                match value {
                    false => CHIER::_0,
                    true => CHIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHIER::_1
            }
        }
        #[doc = "Possible values of the field `CHF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHFR {
            #[doc = "No channel (n) event has occurred."]
            _0,
            #[doc = "A channel (n) event has occurred."]
            _1,
        }
        impl CHFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHFR::_0 => false,
                    CHFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHFR {
                match value {
                    false => CHFR::_0,
                    true => CHFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHFR::_1
            }
        }
        #[doc = "Possible values of the field `TRIGMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGMODER {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGMODER::_0 => false,
                    TRIGMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGMODER {
                match value {
                    false => TRIGMODER::_0,
                    true => TRIGMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGMODER::_1
            }
        }
        #[doc = "Possible values of the field `CHIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHISR {
            #[doc = "The channel (n) input is zero."]
            _0,
            #[doc = "The channel (n) input is one."]
            _1,
        }
        impl CHISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHISR::_0 => false,
                    CHISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHISR {
                match value {
                    false => CHISR::_0,
                    true => CHISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHISR::_1
            }
        }
        #[doc = "Possible values of the field `CHOV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHOVR {
            #[doc = "The channel (n) output is zero."]
            _0,
            #[doc = "The channel (n) output is one."]
            _1,
        }
        impl CHOVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHOVR::_0 => false,
                    CHOVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHOVR {
                match value {
                    false => CHOVR::_0,
                    true => CHOVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHOVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHOVR::_1
            }
        }
        #[doc = "Values that can be written to the field `DMA`"]
        pub enum DMAW {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMAW::_0 => false,
                    DMAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable DMA transfers."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMAW::_0)
            }
            #[doc = "Enable DMA transfers."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ICRST`"]
        pub enum ICRSTW {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ICRSTW::_0 => false,
                    ICRSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ICRSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ICRSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ICRSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ICRSTW::_0)
            }
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ICRSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CHIE`"]
        pub enum CHIEW {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CHIEW::_0 => false,
                    CHIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CHIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CHIEW::_0)
            }
            #[doc = "Enable channel (n) interrupt."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CHIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIGMODE`"]
        pub enum TRIGMODEW {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGMODEW::_0 => false,
                    TRIGMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGMODEW::_0)
            }
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&self) -> DMAR {
                DMAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&self) -> ICRSTR {
                ICRSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&self) -> ELSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSAR { bits }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&self) -> ELSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSBR { bits }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&self) -> MSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSAR { bits }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&self) -> MSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSBR { bits }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&self) -> CHIER {
                CHIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel (n) Flag"]
            #[inline(always)]
            pub fn chf(&self) -> CHFR {
                CHFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&self) -> TRIGMODER {
                TRIGMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Channel (n) Input State"]
            #[inline(always)]
            pub fn chis(&self) -> CHISR {
                CHISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Channel (n) Output Value"]
            #[inline(always)]
            pub fn chov(&self) -> CHOVR {
                CHOVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&mut self) -> _DMAW {
                _DMAW { w: self }
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&mut self) -> _ICRSTW {
                _ICRSTW { w: self }
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&mut self) -> _ELSAW {
                _ELSAW { w: self }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&mut self) -> _ELSBW {
                _ELSBW { w: self }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&mut self) -> _MSAW {
                _MSAW { w: self }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&mut self) -> _MSBW {
                _MSBW { w: self }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&mut self) -> _CHIEW {
                _CHIEW { w: self }
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&mut self) -> _TRIGMODEW {
                _TRIGMODEW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Value"]
    pub struct C4V {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Value"]
    pub mod c4v {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C4V {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct VALR {
            bits: u16,
        }
        impl VALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _VALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _VALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&self) -> VALR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                VALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&mut self) -> _VALW {
                _VALW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Status And Control"]
    pub struct C5SC {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Status And Control"]
    pub mod c5sc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C5SC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DMA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMAR {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMAR::_0 => false,
                    DMAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMAR {
                match value {
                    false => DMAR::_0,
                    true => DMAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMAR::_1
            }
        }
        #[doc = "Possible values of the field `ICRST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ICRSTR {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ICRSTR::_0 => false,
                    ICRSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ICRSTR {
                match value {
                    false => ICRSTR::_0,
                    true => ICRSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ICRSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ICRSTR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSAR {
            bits: bool,
        }
        impl ELSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSBR {
            bits: bool,
        }
        impl ELSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSAR {
            bits: bool,
        }
        impl MSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSBR {
            bits: bool,
        }
        impl MSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `CHIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHIER {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHIER::_0 => false,
                    CHIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHIER {
                match value {
                    false => CHIER::_0,
                    true => CHIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHIER::_1
            }
        }
        #[doc = "Possible values of the field `CHF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHFR {
            #[doc = "No channel (n) event has occurred."]
            _0,
            #[doc = "A channel (n) event has occurred."]
            _1,
        }
        impl CHFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHFR::_0 => false,
                    CHFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHFR {
                match value {
                    false => CHFR::_0,
                    true => CHFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHFR::_1
            }
        }
        #[doc = "Possible values of the field `TRIGMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGMODER {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGMODER::_0 => false,
                    TRIGMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGMODER {
                match value {
                    false => TRIGMODER::_0,
                    true => TRIGMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGMODER::_1
            }
        }
        #[doc = "Possible values of the field `CHIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHISR {
            #[doc = "The channel (n) input is zero."]
            _0,
            #[doc = "The channel (n) input is one."]
            _1,
        }
        impl CHISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHISR::_0 => false,
                    CHISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHISR {
                match value {
                    false => CHISR::_0,
                    true => CHISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHISR::_1
            }
        }
        #[doc = "Possible values of the field `CHOV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHOVR {
            #[doc = "The channel (n) output is zero."]
            _0,
            #[doc = "The channel (n) output is one."]
            _1,
        }
        impl CHOVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHOVR::_0 => false,
                    CHOVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHOVR {
                match value {
                    false => CHOVR::_0,
                    true => CHOVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHOVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHOVR::_1
            }
        }
        #[doc = "Values that can be written to the field `DMA`"]
        pub enum DMAW {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMAW::_0 => false,
                    DMAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable DMA transfers."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMAW::_0)
            }
            #[doc = "Enable DMA transfers."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ICRST`"]
        pub enum ICRSTW {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ICRSTW::_0 => false,
                    ICRSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ICRSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ICRSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ICRSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ICRSTW::_0)
            }
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ICRSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CHIE`"]
        pub enum CHIEW {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CHIEW::_0 => false,
                    CHIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CHIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CHIEW::_0)
            }
            #[doc = "Enable channel (n) interrupt."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CHIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIGMODE`"]
        pub enum TRIGMODEW {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGMODEW::_0 => false,
                    TRIGMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGMODEW::_0)
            }
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&self) -> DMAR {
                DMAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&self) -> ICRSTR {
                ICRSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&self) -> ELSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSAR { bits }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&self) -> ELSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSBR { bits }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&self) -> MSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSAR { bits }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&self) -> MSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSBR { bits }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&self) -> CHIER {
                CHIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel (n) Flag"]
            #[inline(always)]
            pub fn chf(&self) -> CHFR {
                CHFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&self) -> TRIGMODER {
                TRIGMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Channel (n) Input State"]
            #[inline(always)]
            pub fn chis(&self) -> CHISR {
                CHISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Channel (n) Output Value"]
            #[inline(always)]
            pub fn chov(&self) -> CHOVR {
                CHOVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&mut self) -> _DMAW {
                _DMAW { w: self }
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&mut self) -> _ICRSTW {
                _ICRSTW { w: self }
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&mut self) -> _ELSAW {
                _ELSAW { w: self }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&mut self) -> _ELSBW {
                _ELSBW { w: self }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&mut self) -> _MSAW {
                _MSAW { w: self }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&mut self) -> _MSBW {
                _MSBW { w: self }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&mut self) -> _CHIEW {
                _CHIEW { w: self }
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&mut self) -> _TRIGMODEW {
                _TRIGMODEW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Value"]
    pub struct C5V {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Value"]
    pub mod c5v {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C5V {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct VALR {
            bits: u16,
        }
        impl VALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _VALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _VALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&self) -> VALR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                VALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&mut self) -> _VALW {
                _VALW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Status And Control"]
    pub struct C6SC {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Status And Control"]
    pub mod c6sc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C6SC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DMA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMAR {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMAR::_0 => false,
                    DMAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMAR {
                match value {
                    false => DMAR::_0,
                    true => DMAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMAR::_1
            }
        }
        #[doc = "Possible values of the field `ICRST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ICRSTR {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ICRSTR::_0 => false,
                    ICRSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ICRSTR {
                match value {
                    false => ICRSTR::_0,
                    true => ICRSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ICRSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ICRSTR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSAR {
            bits: bool,
        }
        impl ELSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSBR {
            bits: bool,
        }
        impl ELSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSAR {
            bits: bool,
        }
        impl MSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSBR {
            bits: bool,
        }
        impl MSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `CHIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHIER {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHIER::_0 => false,
                    CHIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHIER {
                match value {
                    false => CHIER::_0,
                    true => CHIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHIER::_1
            }
        }
        #[doc = "Possible values of the field `CHF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHFR {
            #[doc = "No channel (n) event has occurred."]
            _0,
            #[doc = "A channel (n) event has occurred."]
            _1,
        }
        impl CHFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHFR::_0 => false,
                    CHFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHFR {
                match value {
                    false => CHFR::_0,
                    true => CHFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHFR::_1
            }
        }
        #[doc = "Possible values of the field `TRIGMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGMODER {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGMODER::_0 => false,
                    TRIGMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGMODER {
                match value {
                    false => TRIGMODER::_0,
                    true => TRIGMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGMODER::_1
            }
        }
        #[doc = "Possible values of the field `CHIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHISR {
            #[doc = "The channel (n) input is zero."]
            _0,
            #[doc = "The channel (n) input is one."]
            _1,
        }
        impl CHISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHISR::_0 => false,
                    CHISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHISR {
                match value {
                    false => CHISR::_0,
                    true => CHISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHISR::_1
            }
        }
        #[doc = "Possible values of the field `CHOV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHOVR {
            #[doc = "The channel (n) output is zero."]
            _0,
            #[doc = "The channel (n) output is one."]
            _1,
        }
        impl CHOVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHOVR::_0 => false,
                    CHOVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHOVR {
                match value {
                    false => CHOVR::_0,
                    true => CHOVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHOVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHOVR::_1
            }
        }
        #[doc = "Values that can be written to the field `DMA`"]
        pub enum DMAW {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMAW::_0 => false,
                    DMAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable DMA transfers."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMAW::_0)
            }
            #[doc = "Enable DMA transfers."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ICRST`"]
        pub enum ICRSTW {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ICRSTW::_0 => false,
                    ICRSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ICRSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ICRSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ICRSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ICRSTW::_0)
            }
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ICRSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CHIE`"]
        pub enum CHIEW {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CHIEW::_0 => false,
                    CHIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CHIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CHIEW::_0)
            }
            #[doc = "Enable channel (n) interrupt."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CHIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIGMODE`"]
        pub enum TRIGMODEW {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGMODEW::_0 => false,
                    TRIGMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGMODEW::_0)
            }
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&self) -> DMAR {
                DMAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&self) -> ICRSTR {
                ICRSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&self) -> ELSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSAR { bits }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&self) -> ELSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSBR { bits }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&self) -> MSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSAR { bits }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&self) -> MSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSBR { bits }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&self) -> CHIER {
                CHIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel (n) Flag"]
            #[inline(always)]
            pub fn chf(&self) -> CHFR {
                CHFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&self) -> TRIGMODER {
                TRIGMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Channel (n) Input State"]
            #[inline(always)]
            pub fn chis(&self) -> CHISR {
                CHISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Channel (n) Output Value"]
            #[inline(always)]
            pub fn chov(&self) -> CHOVR {
                CHOVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&mut self) -> _DMAW {
                _DMAW { w: self }
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&mut self) -> _ICRSTW {
                _ICRSTW { w: self }
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&mut self) -> _ELSAW {
                _ELSAW { w: self }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&mut self) -> _ELSBW {
                _ELSBW { w: self }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&mut self) -> _MSAW {
                _MSAW { w: self }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&mut self) -> _MSBW {
                _MSBW { w: self }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&mut self) -> _CHIEW {
                _CHIEW { w: self }
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&mut self) -> _TRIGMODEW {
                _TRIGMODEW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Value"]
    pub struct C6V {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Value"]
    pub mod c6v {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C6V {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct VALR {
            bits: u16,
        }
        impl VALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _VALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _VALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&self) -> VALR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                VALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&mut self) -> _VALW {
                _VALW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Status And Control"]
    pub struct C7SC {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Status And Control"]
    pub mod c7sc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C7SC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DMA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMAR {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMAR::_0 => false,
                    DMAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMAR {
                match value {
                    false => DMAR::_0,
                    true => DMAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMAR::_1
            }
        }
        #[doc = "Possible values of the field `ICRST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ICRSTR {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ICRSTR::_0 => false,
                    ICRSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ICRSTR {
                match value {
                    false => ICRSTR::_0,
                    true => ICRSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ICRSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ICRSTR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSAR {
            bits: bool,
        }
        impl ELSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSBR {
            bits: bool,
        }
        impl ELSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSAR {
            bits: bool,
        }
        impl MSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSBR {
            bits: bool,
        }
        impl MSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `CHIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHIER {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHIER::_0 => false,
                    CHIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHIER {
                match value {
                    false => CHIER::_0,
                    true => CHIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHIER::_1
            }
        }
        #[doc = "Possible values of the field `CHF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHFR {
            #[doc = "No channel (n) event has occurred."]
            _0,
            #[doc = "A channel (n) event has occurred."]
            _1,
        }
        impl CHFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHFR::_0 => false,
                    CHFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHFR {
                match value {
                    false => CHFR::_0,
                    true => CHFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHFR::_1
            }
        }
        #[doc = "Possible values of the field `TRIGMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGMODER {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGMODER::_0 => false,
                    TRIGMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGMODER {
                match value {
                    false => TRIGMODER::_0,
                    true => TRIGMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGMODER::_1
            }
        }
        #[doc = "Possible values of the field `CHIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHISR {
            #[doc = "The channel (n) input is zero."]
            _0,
            #[doc = "The channel (n) input is one."]
            _1,
        }
        impl CHISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHISR::_0 => false,
                    CHISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHISR {
                match value {
                    false => CHISR::_0,
                    true => CHISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHISR::_1
            }
        }
        #[doc = "Possible values of the field `CHOV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHOVR {
            #[doc = "The channel (n) output is zero."]
            _0,
            #[doc = "The channel (n) output is one."]
            _1,
        }
        impl CHOVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHOVR::_0 => false,
                    CHOVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHOVR {
                match value {
                    false => CHOVR::_0,
                    true => CHOVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHOVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHOVR::_1
            }
        }
        #[doc = "Values that can be written to the field `DMA`"]
        pub enum DMAW {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMAW::_0 => false,
                    DMAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable DMA transfers."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMAW::_0)
            }
            #[doc = "Enable DMA transfers."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ICRST`"]
        pub enum ICRSTW {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ICRSTW::_0 => false,
                    ICRSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ICRSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ICRSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ICRSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ICRSTW::_0)
            }
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ICRSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CHIE`"]
        pub enum CHIEW {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CHIEW::_0 => false,
                    CHIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CHIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CHIEW::_0)
            }
            #[doc = "Enable channel (n) interrupt."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CHIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIGMODE`"]
        pub enum TRIGMODEW {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGMODEW::_0 => false,
                    TRIGMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGMODEW::_0)
            }
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&self) -> DMAR {
                DMAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&self) -> ICRSTR {
                ICRSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&self) -> ELSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSAR { bits }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&self) -> ELSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSBR { bits }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&self) -> MSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSAR { bits }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&self) -> MSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSBR { bits }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&self) -> CHIER {
                CHIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel (n) Flag"]
            #[inline(always)]
            pub fn chf(&self) -> CHFR {
                CHFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&self) -> TRIGMODER {
                TRIGMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Channel (n) Input State"]
            #[inline(always)]
            pub fn chis(&self) -> CHISR {
                CHISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Channel (n) Output Value"]
            #[inline(always)]
            pub fn chov(&self) -> CHOVR {
                CHOVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&mut self) -> _DMAW {
                _DMAW { w: self }
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&mut self) -> _ICRSTW {
                _ICRSTW { w: self }
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&mut self) -> _ELSAW {
                _ELSAW { w: self }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&mut self) -> _ELSBW {
                _ELSBW { w: self }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&mut self) -> _MSAW {
                _MSAW { w: self }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&mut self) -> _MSBW {
                _MSBW { w: self }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&mut self) -> _CHIEW {
                _CHIEW { w: self }
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&mut self) -> _TRIGMODEW {
                _TRIGMODEW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Value"]
    pub struct C7V {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Value"]
    pub mod c7v {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C7V {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct VALR {
            bits: u16,
        }
        impl VALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _VALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _VALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&self) -> VALR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                VALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&mut self) -> _VALW {
                _VALW { w: self }
            }
        }
    }
    #[doc = "Counter Initial Value"]
    pub struct CNTIN {
        register: VolatileCell<u32>,
    }
    #[doc = "Counter Initial Value"]
    pub mod cntin {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CNTIN {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct INITR {
            bits: u16,
        }
        impl INITR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _INITW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INITW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - INIT"]
            #[inline(always)]
            pub fn init(&self) -> INITR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                INITR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - INIT"]
            #[inline(always)]
            pub fn init(&mut self) -> _INITW {
                _INITW { w: self }
            }
        }
    }
    #[doc = "Capture And Compare Status"]
    pub struct STATUS {
        register: VolatileCell<u32>,
    }
    #[doc = "Capture And Compare Status"]
    pub mod status {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::STATUS {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = "Possible values of the field `CH0F`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH0FR {
            #[doc = "No channel event has occurred."]
            _0,
            #[doc = "A channel event has occurred."]
            _1,
        }
        impl CH0FR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH0FR::_0 => false,
                    CH0FR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH0FR {
                match value {
                    false => CH0FR::_0,
                    true => CH0FR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH0FR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH0FR::_1
            }
        }
        #[doc = "Possible values of the field `CH1F`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH1FR {
            #[doc = "No channel event has occurred."]
            _0,
            #[doc = "A channel event has occurred."]
            _1,
        }
        impl CH1FR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH1FR::_0 => false,
                    CH1FR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH1FR {
                match value {
                    false => CH1FR::_0,
                    true => CH1FR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH1FR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH1FR::_1
            }
        }
        #[doc = "Possible values of the field `CH2F`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH2FR {
            #[doc = "No channel event has occurred."]
            _0,
            #[doc = "A channel event has occurred."]
            _1,
        }
        impl CH2FR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH2FR::_0 => false,
                    CH2FR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH2FR {
                match value {
                    false => CH2FR::_0,
                    true => CH2FR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH2FR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH2FR::_1
            }
        }
        #[doc = "Possible values of the field `CH3F`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH3FR {
            #[doc = "No channel event has occurred."]
            _0,
            #[doc = "A channel event has occurred."]
            _1,
        }
        impl CH3FR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH3FR::_0 => false,
                    CH3FR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH3FR {
                match value {
                    false => CH3FR::_0,
                    true => CH3FR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH3FR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH3FR::_1
            }
        }
        #[doc = "Possible values of the field `CH4F`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH4FR {
            #[doc = "No channel event has occurred."]
            _0,
            #[doc = "A channel event has occurred."]
            _1,
        }
        impl CH4FR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH4FR::_0 => false,
                    CH4FR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH4FR {
                match value {
                    false => CH4FR::_0,
                    true => CH4FR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH4FR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH4FR::_1
            }
        }
        #[doc = "Possible values of the field `CH5F`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH5FR {
            #[doc = "No channel event has occurred."]
            _0,
            #[doc = "A channel event has occurred."]
            _1,
        }
        impl CH5FR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH5FR::_0 => false,
                    CH5FR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH5FR {
                match value {
                    false => CH5FR::_0,
                    true => CH5FR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH5FR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH5FR::_1
            }
        }
        #[doc = "Possible values of the field `CH6F`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH6FR {
            #[doc = "No channel event has occurred."]
            _0,
            #[doc = "A channel event has occurred."]
            _1,
        }
        impl CH6FR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH6FR::_0 => false,
                    CH6FR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH6FR {
                match value {
                    false => CH6FR::_0,
                    true => CH6FR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH6FR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH6FR::_1
            }
        }
        #[doc = "Possible values of the field `CH7F`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH7FR {
            #[doc = "No channel event has occurred."]
            _0,
            #[doc = "A channel event has occurred."]
            _1,
        }
        impl CH7FR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH7FR::_0 => false,
                    CH7FR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH7FR {
                match value {
                    false => CH7FR::_0,
                    true => CH7FR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH7FR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH7FR::_1
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Channel 0 Flag"]
            #[inline(always)]
            pub fn ch0f(&self) -> CH0FR {
                CH0FR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Channel 1 Flag"]
            #[inline(always)]
            pub fn ch1f(&self) -> CH1FR {
                CH1FR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel 2 Flag"]
            #[inline(always)]
            pub fn ch2f(&self) -> CH2FR {
                CH2FR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Channel 3 Flag"]
            #[inline(always)]
            pub fn ch3f(&self) -> CH3FR {
                CH3FR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Channel 4 Flag"]
            #[inline(always)]
            pub fn ch4f(&self) -> CH4FR {
                CH4FR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Channel 5 Flag"]
            #[inline(always)]
            pub fn ch5f(&self) -> CH5FR {
                CH5FR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Channel 6 Flag"]
            #[inline(always)]
            pub fn ch6f(&self) -> CH6FR {
                CH6FR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel 7 Flag"]
            #[inline(always)]
            pub fn ch7f(&self) -> CH7FR {
                CH7FR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
    }
    #[doc = "Features Mode Selection"]
    pub struct MODE {
        register: VolatileCell<u32>,
    }
    #[doc = "Features Mode Selection"]
    pub mod mode {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::MODE {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `FTMEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FTMENR {
            #[doc = "TPM compatibility. Free running counter and synchronization compatible with TPM."]
            _0,
            #[doc = "Free running counter and synchronization are different from TPM behavior."]
            _1,
        }
        impl FTMENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FTMENR::_0 => false,
                    FTMENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FTMENR {
                match value {
                    false => FTMENR::_0,
                    true => FTMENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FTMENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FTMENR::_1
            }
        }
        #[doc = "Possible values of the field `WPDIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WPDISR {
            #[doc = "Write protection is enabled."]
            _0,
            #[doc = "Write protection is disabled."]
            _1,
        }
        impl WPDISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WPDISR::_0 => false,
                    WPDISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WPDISR {
                match value {
                    false => WPDISR::_0,
                    true => WPDISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WPDISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WPDISR::_1
            }
        }
        #[doc = "Possible values of the field `PWMSYNC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PWMSYNCR {
            #[doc = "No restrictions. Software and hardware triggers can be used by MOD, CnV, OUTMASK, and FTM counter synchronization."]
            _0,
            #[doc = "Software trigger can only be used by MOD and CnV synchronization, and hardware triggers can only be used by OUTMASK and FTM counter synchronization."]
            _1,
        }
        impl PWMSYNCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PWMSYNCR::_0 => false,
                    PWMSYNCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PWMSYNCR {
                match value {
                    false => PWMSYNCR::_0,
                    true => PWMSYNCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PWMSYNCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PWMSYNCR::_1
            }
        }
        #[doc = "Possible values of the field `CAPTEST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CAPTESTR {
            #[doc = "Capture test mode is disabled."]
            _0,
            #[doc = "Capture test mode is enabled."]
            _1,
        }
        impl CAPTESTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CAPTESTR::_0 => false,
                    CAPTESTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CAPTESTR {
                match value {
                    false => CAPTESTR::_0,
                    true => CAPTESTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CAPTESTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CAPTESTR::_1
            }
        }
        #[doc = "Possible values of the field `FAULTM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTMR {
            #[doc = "Fault control is disabled for all channels."]
            _00,
            #[doc = "Fault control is enabled for even channels only (channels 0, 2, 4, and 6), and the selected mode is the manual fault clearing."]
            _01,
            #[doc = "Fault control is enabled for all channels, and the selected mode is the manual fault clearing."]
            _10,
            #[doc = "Fault control is enabled for all channels, and the selected mode is the automatic fault clearing."]
            _11,
        }
        impl FAULTMR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    FAULTMR::_00 => 0,
                    FAULTMR::_01 => 1,
                    FAULTMR::_10 => 2,
                    FAULTMR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> FAULTMR {
                match value {
                    0 => FAULTMR::_00,
                    1 => FAULTMR::_01,
                    2 => FAULTMR::_10,
                    3 => FAULTMR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == FAULTMR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == FAULTMR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == FAULTMR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == FAULTMR::_11
            }
        }
        #[doc = "Possible values of the field `FAULTIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTIER {
            #[doc = "Fault control interrupt is disabled."]
            _0,
            #[doc = "Fault control interrupt is enabled."]
            _1,
        }
        impl FAULTIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTIER::_0 => false,
                    FAULTIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTIER {
                match value {
                    false => FAULTIER::_0,
                    true => FAULTIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTIER::_1
            }
        }
        #[doc = "Values that can be written to the field `FTMEN`"]
        pub enum FTMENW {
            #[doc = "TPM compatibility. Free running counter and synchronization compatible with TPM."]
            _0,
            #[doc = "Free running counter and synchronization are different from TPM behavior."]
            _1,
        }
        impl FTMENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FTMENW::_0 => false,
                    FTMENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FTMENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FTMENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FTMENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "TPM compatibility. Free running counter and synchronization compatible with TPM."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FTMENW::_0)
            }
            #[doc = "Free running counter and synchronization are different from TPM behavior."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FTMENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _INITW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INITW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WPDIS`"]
        pub enum WPDISW {
            #[doc = "Write protection is enabled."]
            _0,
            #[doc = "Write protection is disabled."]
            _1,
        }
        impl WPDISW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WPDISW::_0 => false,
                    WPDISW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WPDISW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WPDISW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WPDISW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Write protection is enabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WPDISW::_0)
            }
            #[doc = "Write protection is disabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WPDISW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PWMSYNC`"]
        pub enum PWMSYNCW {
            #[doc = "No restrictions. Software and hardware triggers can be used by MOD, CnV, OUTMASK, and FTM counter synchronization."]
            _0,
            #[doc = "Software trigger can only be used by MOD and CnV synchronization, and hardware triggers can only be used by OUTMASK and FTM counter synchronization."]
            _1,
        }
        impl PWMSYNCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PWMSYNCW::_0 => false,
                    PWMSYNCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PWMSYNCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PWMSYNCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PWMSYNCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No restrictions. Software and hardware triggers can be used by MOD, CnV, OUTMASK, and FTM counter synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PWMSYNCW::_0)
            }
            #[doc = "Software trigger can only be used by MOD and CnV synchronization, and hardware triggers can only be used by OUTMASK and FTM counter synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PWMSYNCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CAPTEST`"]
        pub enum CAPTESTW {
            #[doc = "Capture test mode is disabled."]
            _0,
            #[doc = "Capture test mode is enabled."]
            _1,
        }
        impl CAPTESTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CAPTESTW::_0 => false,
                    CAPTESTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CAPTESTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CAPTESTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CAPTESTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Capture test mode is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CAPTESTW::_0)
            }
            #[doc = "Capture test mode is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CAPTESTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FAULTM`"]
        pub enum FAULTMW {
            #[doc = "Fault control is disabled for all channels."]
            _00,
            #[doc = "Fault control is enabled for even channels only (channels 0, 2, 4, and 6), and the selected mode is the manual fault clearing."]
            _01,
            #[doc = "Fault control is enabled for all channels, and the selected mode is the manual fault clearing."]
            _10,
            #[doc = "Fault control is enabled for all channels, and the selected mode is the automatic fault clearing."]
            _11,
        }
        impl FAULTMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    FAULTMW::_00 => 0,
                    FAULTMW::_01 => 1,
                    FAULTMW::_10 => 2,
                    FAULTMW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FAULTMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FAULTMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FAULTMW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Fault control is disabled for all channels."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(FAULTMW::_00)
            }
            #[doc = "Fault control is enabled for even channels only (channels 0, 2, 4, and 6), and the selected mode is the manual fault clearing."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(FAULTMW::_01)
            }
            #[doc = "Fault control is enabled for all channels, and the selected mode is the manual fault clearing."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(FAULTMW::_10)
            }
            #[doc = "Fault control is enabled for all channels, and the selected mode is the automatic fault clearing."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(FAULTMW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FAULTIE`"]
        pub enum FAULTIEW {
            #[doc = "Fault control interrupt is disabled."]
            _0,
            #[doc = "Fault control interrupt is enabled."]
            _1,
        }
        impl FAULTIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FAULTIEW::_0 => false,
                    FAULTIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FAULTIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FAULTIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FAULTIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Fault control interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FAULTIEW::_0)
            }
            #[doc = "Fault control interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FAULTIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - FTM Enable"]
            #[inline(always)]
            pub fn ftmen(&self) -> FTMENR {
                FTMENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Write Protection Disable"]
            #[inline(always)]
            pub fn wpdis(&self) -> WPDISR {
                WPDISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - PWM Synchronization Mode"]
            #[inline(always)]
            pub fn pwmsync(&self) -> PWMSYNCR {
                PWMSYNCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Capture Test Mode Enable"]
            #[inline(always)]
            pub fn captest(&self) -> CAPTESTR {
                CAPTESTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 5:6 - Fault Control Mode"]
            #[inline(always)]
            pub fn faultm(&self) -> FAULTMR {
                FAULTMR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 7 - Fault Interrupt Enable"]
            #[inline(always)]
            pub fn faultie(&self) -> FAULTIER {
                FAULTIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 4 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - FTM Enable"]
            #[inline(always)]
            pub fn ftmen(&mut self) -> _FTMENW {
                _FTMENW { w: self }
            }
            #[doc = "Bit 1 - Initialize The Channels Output"]
            #[inline(always)]
            pub fn init(&mut self) -> _INITW {
                _INITW { w: self }
            }
            #[doc = "Bit 2 - Write Protection Disable"]
            #[inline(always)]
            pub fn wpdis(&mut self) -> _WPDISW {
                _WPDISW { w: self }
            }
            #[doc = "Bit 3 - PWM Synchronization Mode"]
            #[inline(always)]
            pub fn pwmsync(&mut self) -> _PWMSYNCW {
                _PWMSYNCW { w: self }
            }
            #[doc = "Bit 4 - Capture Test Mode Enable"]
            #[inline(always)]
            pub fn captest(&mut self) -> _CAPTESTW {
                _CAPTESTW { w: self }
            }
            #[doc = "Bits 5:6 - Fault Control Mode"]
            #[inline(always)]
            pub fn faultm(&mut self) -> _FAULTMW {
                _FAULTMW { w: self }
            }
            #[doc = "Bit 7 - Fault Interrupt Enable"]
            #[inline(always)]
            pub fn faultie(&mut self) -> _FAULTIEW {
                _FAULTIEW { w: self }
            }
        }
    }
    #[doc = "Synchronization"]
    pub struct SYNC {
        register: VolatileCell<u32>,
    }
    #[doc = "Synchronization"]
    pub mod sync {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SYNC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CNTMIN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CNTMINR {
            #[doc = "The minimum loading point is disabled."]
            _0,
            #[doc = "The minimum loading point is enabled."]
            _1,
        }
        impl CNTMINR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CNTMINR::_0 => false,
                    CNTMINR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CNTMINR {
                match value {
                    false => CNTMINR::_0,
                    true => CNTMINR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CNTMINR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CNTMINR::_1
            }
        }
        #[doc = "Possible values of the field `CNTMAX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CNTMAXR {
            #[doc = "The maximum loading point is disabled."]
            _0,
            #[doc = "The maximum loading point is enabled."]
            _1,
        }
        impl CNTMAXR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CNTMAXR::_0 => false,
                    CNTMAXR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CNTMAXR {
                match value {
                    false => CNTMAXR::_0,
                    true => CNTMAXR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CNTMAXR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CNTMAXR::_1
            }
        }
        #[doc = "Possible values of the field `REINIT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum REINITR {
            #[doc = "FTM counter continues to count normally."]
            _0,
            #[doc = "FTM counter is updated with its initial value when the selected trigger is detected."]
            _1,
        }
        impl REINITR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    REINITR::_0 => false,
                    REINITR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> REINITR {
                match value {
                    false => REINITR::_0,
                    true => REINITR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == REINITR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == REINITR::_1
            }
        }
        #[doc = "Possible values of the field `SYNCHOM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SYNCHOMR {
            #[doc = "OUTMASK register is updated with the value of its buffer in all rising edges of the FTM input clock."]
            _0,
            #[doc = "OUTMASK register is updated with the value of its buffer only by the PWM synchronization."]
            _1,
        }
        impl SYNCHOMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SYNCHOMR::_0 => false,
                    SYNCHOMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SYNCHOMR {
                match value {
                    false => SYNCHOMR::_0,
                    true => SYNCHOMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SYNCHOMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SYNCHOMR::_1
            }
        }
        #[doc = "Possible values of the field `TRIG0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIG0R {
            #[doc = "Trigger is disabled."]
            _0,
            #[doc = "Trigger is enabled."]
            _1,
        }
        impl TRIG0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIG0R::_0 => false,
                    TRIG0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIG0R {
                match value {
                    false => TRIG0R::_0,
                    true => TRIG0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIG0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIG0R::_1
            }
        }
        #[doc = "Possible values of the field `TRIG1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIG1R {
            #[doc = "Trigger is disabled."]
            _0,
            #[doc = "Trigger is enabled."]
            _1,
        }
        impl TRIG1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIG1R::_0 => false,
                    TRIG1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIG1R {
                match value {
                    false => TRIG1R::_0,
                    true => TRIG1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIG1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIG1R::_1
            }
        }
        #[doc = "Possible values of the field `TRIG2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIG2R {
            #[doc = "Trigger is disabled."]
            _0,
            #[doc = "Trigger is enabled."]
            _1,
        }
        impl TRIG2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIG2R::_0 => false,
                    TRIG2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIG2R {
                match value {
                    false => TRIG2R::_0,
                    true => TRIG2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIG2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIG2R::_1
            }
        }
        #[doc = "Possible values of the field `SWSYNC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SWSYNCR {
            #[doc = "Software trigger is not selected."]
            _0,
            #[doc = "Software trigger is selected."]
            _1,
        }
        impl SWSYNCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SWSYNCR::_0 => false,
                    SWSYNCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SWSYNCR {
                match value {
                    false => SWSYNCR::_0,
                    true => SWSYNCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SWSYNCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SWSYNCR::_1
            }
        }
        #[doc = "Values that can be written to the field `CNTMIN`"]
        pub enum CNTMINW {
            #[doc = "The minimum loading point is disabled."]
            _0,
            #[doc = "The minimum loading point is enabled."]
            _1,
        }
        impl CNTMINW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CNTMINW::_0 => false,
                    CNTMINW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CNTMINW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CNTMINW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CNTMINW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minimum loading point is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CNTMINW::_0)
            }
            #[doc = "The minimum loading point is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CNTMINW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CNTMAX`"]
        pub enum CNTMAXW {
            #[doc = "The maximum loading point is disabled."]
            _0,
            #[doc = "The maximum loading point is enabled."]
            _1,
        }
        impl CNTMAXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CNTMAXW::_0 => false,
                    CNTMAXW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CNTMAXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CNTMAXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CNTMAXW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The maximum loading point is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CNTMAXW::_0)
            }
            #[doc = "The maximum loading point is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CNTMAXW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `REINIT`"]
        pub enum REINITW {
            #[doc = "FTM counter continues to count normally."]
            _0,
            #[doc = "FTM counter is updated with its initial value when the selected trigger is detected."]
            _1,
        }
        impl REINITW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    REINITW::_0 => false,
                    REINITW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _REINITW<'a> {
            w: &'a mut W,
        }
        impl<'a> _REINITW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: REINITW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM counter continues to count normally."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(REINITW::_0)
            }
            #[doc = "FTM counter is updated with its initial value when the selected trigger is detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(REINITW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SYNCHOM`"]
        pub enum SYNCHOMW {
            #[doc = "OUTMASK register is updated with the value of its buffer in all rising edges of the FTM input clock."]
            _0,
            #[doc = "OUTMASK register is updated with the value of its buffer only by the PWM synchronization."]
            _1,
        }
        impl SYNCHOMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SYNCHOMW::_0 => false,
                    SYNCHOMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SYNCHOMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SYNCHOMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SYNCHOMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "OUTMASK register is updated with the value of its buffer in all rising edges of the FTM input clock."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SYNCHOMW::_0)
            }
            #[doc = "OUTMASK register is updated with the value of its buffer only by the PWM synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SYNCHOMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIG0`"]
        pub enum TRIG0W {
            #[doc = "Trigger is disabled."]
            _0,
            #[doc = "Trigger is enabled."]
            _1,
        }
        impl TRIG0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIG0W::_0 => false,
                    TRIG0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIG0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIG0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIG0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIG0W::_0)
            }
            #[doc = "Trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIG0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIG1`"]
        pub enum TRIG1W {
            #[doc = "Trigger is disabled."]
            _0,
            #[doc = "Trigger is enabled."]
            _1,
        }
        impl TRIG1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIG1W::_0 => false,
                    TRIG1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIG1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIG1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIG1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIG1W::_0)
            }
            #[doc = "Trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIG1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIG2`"]
        pub enum TRIG2W {
            #[doc = "Trigger is disabled."]
            _0,
            #[doc = "Trigger is enabled."]
            _1,
        }
        impl TRIG2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIG2W::_0 => false,
                    TRIG2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIG2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIG2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIG2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIG2W::_0)
            }
            #[doc = "Trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIG2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SWSYNC`"]
        pub enum SWSYNCW {
            #[doc = "Software trigger is not selected."]
            _0,
            #[doc = "Software trigger is selected."]
            _1,
        }
        impl SWSYNCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SWSYNCW::_0 => false,
                    SWSYNCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SWSYNCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SWSYNCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SWSYNCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Software trigger is not selected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SWSYNCW::_0)
            }
            #[doc = "Software trigger is selected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SWSYNCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Minimum Loading Point Enable"]
            #[inline(always)]
            pub fn cntmin(&self) -> CNTMINR {
                CNTMINR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Maximum Loading Point Enable"]
            #[inline(always)]
            pub fn cntmax(&self) -> CNTMAXR {
                CNTMAXR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - FTM Counter Reinitialization by Synchronization"]
            #[inline(always)]
            pub fn reinit(&self) -> REINITR {
                REINITR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Output Mask Synchronization"]
            #[inline(always)]
            pub fn synchom(&self) -> SYNCHOMR {
                SYNCHOMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - PWM Synchronization Hardware Trigger 0"]
            #[inline(always)]
            pub fn trig0(&self) -> TRIG0R {
                TRIG0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - PWM Synchronization Hardware Trigger 1"]
            #[inline(always)]
            pub fn trig1(&self) -> TRIG1R {
                TRIG1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - PWM Synchronization Hardware Trigger 2"]
            #[inline(always)]
            pub fn trig2(&self) -> TRIG2R {
                TRIG2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - PWM Synchronization Software Trigger"]
            #[inline(always)]
            pub fn swsync(&self) -> SWSYNCR {
                SWSYNCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Minimum Loading Point Enable"]
            #[inline(always)]
            pub fn cntmin(&mut self) -> _CNTMINW {
                _CNTMINW { w: self }
            }
            #[doc = "Bit 1 - Maximum Loading Point Enable"]
            #[inline(always)]
            pub fn cntmax(&mut self) -> _CNTMAXW {
                _CNTMAXW { w: self }
            }
            #[doc = "Bit 2 - FTM Counter Reinitialization by Synchronization"]
            #[inline(always)]
            pub fn reinit(&mut self) -> _REINITW {
                _REINITW { w: self }
            }
            #[doc = "Bit 3 - Output Mask Synchronization"]
            #[inline(always)]
            pub fn synchom(&mut self) -> _SYNCHOMW {
                _SYNCHOMW { w: self }
            }
            #[doc = "Bit 4 - PWM Synchronization Hardware Trigger 0"]
            #[inline(always)]
            pub fn trig0(&mut self) -> _TRIG0W {
                _TRIG0W { w: self }
            }
            #[doc = "Bit 5 - PWM Synchronization Hardware Trigger 1"]
            #[inline(always)]
            pub fn trig1(&mut self) -> _TRIG1W {
                _TRIG1W { w: self }
            }
            #[doc = "Bit 6 - PWM Synchronization Hardware Trigger 2"]
            #[inline(always)]
            pub fn trig2(&mut self) -> _TRIG2W {
                _TRIG2W { w: self }
            }
            #[doc = "Bit 7 - PWM Synchronization Software Trigger"]
            #[inline(always)]
            pub fn swsync(&mut self) -> _SWSYNCW {
                _SWSYNCW { w: self }
            }
        }
    }
    #[doc = "Initial State For Channels Output"]
    pub struct OUTINIT {
        register: VolatileCell<u32>,
    }
    #[doc = "Initial State For Channels Output"]
    pub mod outinit {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::OUTINIT {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CH0OI`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH0OIR {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH0OIR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH0OIR::_0 => false,
                    CH0OIR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH0OIR {
                match value {
                    false => CH0OIR::_0,
                    true => CH0OIR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH0OIR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH0OIR::_1
            }
        }
        #[doc = "Possible values of the field `CH1OI`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH1OIR {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH1OIR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH1OIR::_0 => false,
                    CH1OIR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH1OIR {
                match value {
                    false => CH1OIR::_0,
                    true => CH1OIR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH1OIR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH1OIR::_1
            }
        }
        #[doc = "Possible values of the field `CH2OI`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH2OIR {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH2OIR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH2OIR::_0 => false,
                    CH2OIR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH2OIR {
                match value {
                    false => CH2OIR::_0,
                    true => CH2OIR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH2OIR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH2OIR::_1
            }
        }
        #[doc = "Possible values of the field `CH3OI`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH3OIR {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH3OIR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH3OIR::_0 => false,
                    CH3OIR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH3OIR {
                match value {
                    false => CH3OIR::_0,
                    true => CH3OIR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH3OIR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH3OIR::_1
            }
        }
        #[doc = "Possible values of the field `CH4OI`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH4OIR {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH4OIR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH4OIR::_0 => false,
                    CH4OIR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH4OIR {
                match value {
                    false => CH4OIR::_0,
                    true => CH4OIR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH4OIR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH4OIR::_1
            }
        }
        #[doc = "Possible values of the field `CH5OI`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH5OIR {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH5OIR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH5OIR::_0 => false,
                    CH5OIR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH5OIR {
                match value {
                    false => CH5OIR::_0,
                    true => CH5OIR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH5OIR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH5OIR::_1
            }
        }
        #[doc = "Possible values of the field `CH6OI`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH6OIR {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH6OIR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH6OIR::_0 => false,
                    CH6OIR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH6OIR {
                match value {
                    false => CH6OIR::_0,
                    true => CH6OIR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH6OIR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH6OIR::_1
            }
        }
        #[doc = "Possible values of the field `CH7OI`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH7OIR {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH7OIR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH7OIR::_0 => false,
                    CH7OIR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH7OIR {
                match value {
                    false => CH7OIR::_0,
                    true => CH7OIR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH7OIR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH7OIR::_1
            }
        }
        #[doc = "Values that can be written to the field `CH0OI`"]
        pub enum CH0OIW {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH0OIW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH0OIW::_0 => false,
                    CH0OIW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH0OIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH0OIW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH0OIW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The initialization value is 0."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH0OIW::_0)
            }
            #[doc = "The initialization value is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH0OIW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH1OI`"]
        pub enum CH1OIW {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH1OIW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH1OIW::_0 => false,
                    CH1OIW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH1OIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH1OIW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH1OIW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The initialization value is 0."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH1OIW::_0)
            }
            #[doc = "The initialization value is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH1OIW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH2OI`"]
        pub enum CH2OIW {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH2OIW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH2OIW::_0 => false,
                    CH2OIW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH2OIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH2OIW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH2OIW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The initialization value is 0."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH2OIW::_0)
            }
            #[doc = "The initialization value is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH2OIW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH3OI`"]
        pub enum CH3OIW {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH3OIW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH3OIW::_0 => false,
                    CH3OIW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH3OIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH3OIW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH3OIW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The initialization value is 0."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH3OIW::_0)
            }
            #[doc = "The initialization value is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH3OIW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH4OI`"]
        pub enum CH4OIW {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH4OIW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH4OIW::_0 => false,
                    CH4OIW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH4OIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH4OIW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH4OIW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The initialization value is 0."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH4OIW::_0)
            }
            #[doc = "The initialization value is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH4OIW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH5OI`"]
        pub enum CH5OIW {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH5OIW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH5OIW::_0 => false,
                    CH5OIW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH5OIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH5OIW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH5OIW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The initialization value is 0."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH5OIW::_0)
            }
            #[doc = "The initialization value is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH5OIW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH6OI`"]
        pub enum CH6OIW {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH6OIW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH6OIW::_0 => false,
                    CH6OIW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH6OIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH6OIW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH6OIW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The initialization value is 0."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH6OIW::_0)
            }
            #[doc = "The initialization value is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH6OIW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH7OI`"]
        pub enum CH7OIW {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH7OIW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH7OIW::_0 => false,
                    CH7OIW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH7OIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH7OIW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH7OIW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The initialization value is 0."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH7OIW::_0)
            }
            #[doc = "The initialization value is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH7OIW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Channel 0 Output Initialization Value"]
            #[inline(always)]
            pub fn ch0oi(&self) -> CH0OIR {
                CH0OIR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Channel 1 Output Initialization Value"]
            #[inline(always)]
            pub fn ch1oi(&self) -> CH1OIR {
                CH1OIR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel 2 Output Initialization Value"]
            #[inline(always)]
            pub fn ch2oi(&self) -> CH2OIR {
                CH2OIR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Channel 3 Output Initialization Value"]
            #[inline(always)]
            pub fn ch3oi(&self) -> CH3OIR {
                CH3OIR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Channel 4 Output Initialization Value"]
            #[inline(always)]
            pub fn ch4oi(&self) -> CH4OIR {
                CH4OIR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Channel 5 Output Initialization Value"]
            #[inline(always)]
            pub fn ch5oi(&self) -> CH5OIR {
                CH5OIR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Channel 6 Output Initialization Value"]
            #[inline(always)]
            pub fn ch6oi(&self) -> CH6OIR {
                CH6OIR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel 7 Output Initialization Value"]
            #[inline(always)]
            pub fn ch7oi(&self) -> CH7OIR {
                CH7OIR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Channel 0 Output Initialization Value"]
            #[inline(always)]
            pub fn ch0oi(&mut self) -> _CH0OIW {
                _CH0OIW { w: self }
            }
            #[doc = "Bit 1 - Channel 1 Output Initialization Value"]
            #[inline(always)]
            pub fn ch1oi(&mut self) -> _CH1OIW {
                _CH1OIW { w: self }
            }
            #[doc = "Bit 2 - Channel 2 Output Initialization Value"]
            #[inline(always)]
            pub fn ch2oi(&mut self) -> _CH2OIW {
                _CH2OIW { w: self }
            }
            #[doc = "Bit 3 - Channel 3 Output Initialization Value"]
            #[inline(always)]
            pub fn ch3oi(&mut self) -> _CH3OIW {
                _CH3OIW { w: self }
            }
            #[doc = "Bit 4 - Channel 4 Output Initialization Value"]
            #[inline(always)]
            pub fn ch4oi(&mut self) -> _CH4OIW {
                _CH4OIW { w: self }
            }
            #[doc = "Bit 5 - Channel 5 Output Initialization Value"]
            #[inline(always)]
            pub fn ch5oi(&mut self) -> _CH5OIW {
                _CH5OIW { w: self }
            }
            #[doc = "Bit 6 - Channel 6 Output Initialization Value"]
            #[inline(always)]
            pub fn ch6oi(&mut self) -> _CH6OIW {
                _CH6OIW { w: self }
            }
            #[doc = "Bit 7 - Channel 7 Output Initialization Value"]
            #[inline(always)]
            pub fn ch7oi(&mut self) -> _CH7OIW {
                _CH7OIW { w: self }
            }
        }
    }
    #[doc = "Output Mask"]
    pub struct OUTMASK {
        register: VolatileCell<u32>,
    }
    #[doc = "Output Mask"]
    pub mod outmask {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::OUTMASK {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CH0OM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH0OMR {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH0OMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH0OMR::_0 => false,
                    CH0OMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH0OMR {
                match value {
                    false => CH0OMR::_0,
                    true => CH0OMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH0OMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH0OMR::_1
            }
        }
        #[doc = "Possible values of the field `CH1OM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH1OMR {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH1OMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH1OMR::_0 => false,
                    CH1OMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH1OMR {
                match value {
                    false => CH1OMR::_0,
                    true => CH1OMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH1OMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH1OMR::_1
            }
        }
        #[doc = "Possible values of the field `CH2OM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH2OMR {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH2OMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH2OMR::_0 => false,
                    CH2OMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH2OMR {
                match value {
                    false => CH2OMR::_0,
                    true => CH2OMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH2OMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH2OMR::_1
            }
        }
        #[doc = "Possible values of the field `CH3OM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH3OMR {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH3OMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH3OMR::_0 => false,
                    CH3OMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH3OMR {
                match value {
                    false => CH3OMR::_0,
                    true => CH3OMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH3OMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH3OMR::_1
            }
        }
        #[doc = "Possible values of the field `CH4OM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH4OMR {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH4OMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH4OMR::_0 => false,
                    CH4OMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH4OMR {
                match value {
                    false => CH4OMR::_0,
                    true => CH4OMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH4OMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH4OMR::_1
            }
        }
        #[doc = "Possible values of the field `CH5OM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH5OMR {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH5OMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH5OMR::_0 => false,
                    CH5OMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH5OMR {
                match value {
                    false => CH5OMR::_0,
                    true => CH5OMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH5OMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH5OMR::_1
            }
        }
        #[doc = "Possible values of the field `CH6OM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH6OMR {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH6OMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH6OMR::_0 => false,
                    CH6OMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH6OMR {
                match value {
                    false => CH6OMR::_0,
                    true => CH6OMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH6OMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH6OMR::_1
            }
        }
        #[doc = "Possible values of the field `CH7OM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH7OMR {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH7OMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH7OMR::_0 => false,
                    CH7OMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH7OMR {
                match value {
                    false => CH7OMR::_0,
                    true => CH7OMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH7OMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH7OMR::_1
            }
        }
        #[doc = "Values that can be written to the field `CH0OM`"]
        pub enum CH0OMW {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH0OMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH0OMW::_0 => false,
                    CH0OMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH0OMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH0OMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH0OMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output is not masked. It continues to operate normally."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH0OMW::_0)
            }
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH0OMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH1OM`"]
        pub enum CH1OMW {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH1OMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH1OMW::_0 => false,
                    CH1OMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH1OMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH1OMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH1OMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output is not masked. It continues to operate normally."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH1OMW::_0)
            }
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH1OMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH2OM`"]
        pub enum CH2OMW {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH2OMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH2OMW::_0 => false,
                    CH2OMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH2OMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH2OMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH2OMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output is not masked. It continues to operate normally."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH2OMW::_0)
            }
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH2OMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH3OM`"]
        pub enum CH3OMW {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH3OMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH3OMW::_0 => false,
                    CH3OMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH3OMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH3OMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH3OMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output is not masked. It continues to operate normally."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH3OMW::_0)
            }
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH3OMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH4OM`"]
        pub enum CH4OMW {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH4OMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH4OMW::_0 => false,
                    CH4OMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH4OMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH4OMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH4OMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output is not masked. It continues to operate normally."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH4OMW::_0)
            }
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH4OMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH5OM`"]
        pub enum CH5OMW {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH5OMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH5OMW::_0 => false,
                    CH5OMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH5OMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH5OMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH5OMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output is not masked. It continues to operate normally."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH5OMW::_0)
            }
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH5OMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH6OM`"]
        pub enum CH6OMW {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH6OMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH6OMW::_0 => false,
                    CH6OMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH6OMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH6OMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH6OMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output is not masked. It continues to operate normally."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH6OMW::_0)
            }
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH6OMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH7OM`"]
        pub enum CH7OMW {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH7OMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH7OMW::_0 => false,
                    CH7OMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH7OMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH7OMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH7OMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output is not masked. It continues to operate normally."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH7OMW::_0)
            }
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH7OMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Channel 0 Output Mask"]
            #[inline(always)]
            pub fn ch0om(&self) -> CH0OMR {
                CH0OMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Channel 1 Output Mask"]
            #[inline(always)]
            pub fn ch1om(&self) -> CH1OMR {
                CH1OMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel 2 Output Mask"]
            #[inline(always)]
            pub fn ch2om(&self) -> CH2OMR {
                CH2OMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Channel 3 Output Mask"]
            #[inline(always)]
            pub fn ch3om(&self) -> CH3OMR {
                CH3OMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Channel 4 Output Mask"]
            #[inline(always)]
            pub fn ch4om(&self) -> CH4OMR {
                CH4OMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Channel 5 Output Mask"]
            #[inline(always)]
            pub fn ch5om(&self) -> CH5OMR {
                CH5OMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Channel 6 Output Mask"]
            #[inline(always)]
            pub fn ch6om(&self) -> CH6OMR {
                CH6OMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel 7 Output Mask"]
            #[inline(always)]
            pub fn ch7om(&self) -> CH7OMR {
                CH7OMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Channel 0 Output Mask"]
            #[inline(always)]
            pub fn ch0om(&mut self) -> _CH0OMW {
                _CH0OMW { w: self }
            }
            #[doc = "Bit 1 - Channel 1 Output Mask"]
            #[inline(always)]
            pub fn ch1om(&mut self) -> _CH1OMW {
                _CH1OMW { w: self }
            }
            #[doc = "Bit 2 - Channel 2 Output Mask"]
            #[inline(always)]
            pub fn ch2om(&mut self) -> _CH2OMW {
                _CH2OMW { w: self }
            }
            #[doc = "Bit 3 - Channel 3 Output Mask"]
            #[inline(always)]
            pub fn ch3om(&mut self) -> _CH3OMW {
                _CH3OMW { w: self }
            }
            #[doc = "Bit 4 - Channel 4 Output Mask"]
            #[inline(always)]
            pub fn ch4om(&mut self) -> _CH4OMW {
                _CH4OMW { w: self }
            }
            #[doc = "Bit 5 - Channel 5 Output Mask"]
            #[inline(always)]
            pub fn ch5om(&mut self) -> _CH5OMW {
                _CH5OMW { w: self }
            }
            #[doc = "Bit 6 - Channel 6 Output Mask"]
            #[inline(always)]
            pub fn ch6om(&mut self) -> _CH6OMW {
                _CH6OMW { w: self }
            }
            #[doc = "Bit 7 - Channel 7 Output Mask"]
            #[inline(always)]
            pub fn ch7om(&mut self) -> _CH7OMW {
                _CH7OMW { w: self }
            }
        }
    }
    #[doc = "Function For Linked Channels"]
    pub struct COMBINE {
        register: VolatileCell<u32>,
    }
    #[doc = "Function For Linked Channels"]
    pub mod combine {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::COMBINE {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct COMBINE0R {
            bits: bool,
        }
        impl COMBINE0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `COMP0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum COMP0R {
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            _0,
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            _1,
        }
        impl COMP0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    COMP0R::_0 => false,
                    COMP0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> COMP0R {
                match value {
                    false => COMP0R::_0,
                    true => COMP0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == COMP0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == COMP0R::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct DECAPEN0R {
            bits: bool,
        }
        impl DECAPEN0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `DECAP0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DECAP0R {
            #[doc = "The dual edge captures are inactive."]
            _0,
            #[doc = "The dual edge captures are active."]
            _1,
        }
        impl DECAP0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DECAP0R::_0 => false,
                    DECAP0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DECAP0R {
                match value {
                    false => DECAP0R::_0,
                    true => DECAP0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DECAP0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DECAP0R::_1
            }
        }
        #[doc = "Possible values of the field `DTEN0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DTEN0R {
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            _0,
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            _1,
        }
        impl DTEN0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DTEN0R::_0 => false,
                    DTEN0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DTEN0R {
                match value {
                    false => DTEN0R::_0,
                    true => DTEN0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DTEN0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DTEN0R::_1
            }
        }
        #[doc = "Possible values of the field `SYNCEN0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SYNCEN0R {
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            _0,
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            _1,
        }
        impl SYNCEN0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SYNCEN0R::_0 => false,
                    SYNCEN0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SYNCEN0R {
                match value {
                    false => SYNCEN0R::_0,
                    true => SYNCEN0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SYNCEN0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SYNCEN0R::_1
            }
        }
        #[doc = "Possible values of the field `FAULTEN0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTEN0R {
            #[doc = "The fault control in this pair of channels is disabled."]
            _0,
            #[doc = "The fault control in this pair of channels is enabled."]
            _1,
        }
        impl FAULTEN0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTEN0R::_0 => false,
                    FAULTEN0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTEN0R {
                match value {
                    false => FAULTEN0R::_0,
                    true => FAULTEN0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTEN0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTEN0R::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct MCOMBINE0R {
            bits: bool,
        }
        impl MCOMBINE0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct COMBINE1R {
            bits: bool,
        }
        impl COMBINE1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `COMP1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum COMP1R {
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            _0,
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            _1,
        }
        impl COMP1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    COMP1R::_0 => false,
                    COMP1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> COMP1R {
                match value {
                    false => COMP1R::_0,
                    true => COMP1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == COMP1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == COMP1R::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct DECAPEN1R {
            bits: bool,
        }
        impl DECAPEN1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `DECAP1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DECAP1R {
            #[doc = "The dual edge captures are inactive."]
            _0,
            #[doc = "The dual edge captures are active."]
            _1,
        }
        impl DECAP1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DECAP1R::_0 => false,
                    DECAP1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DECAP1R {
                match value {
                    false => DECAP1R::_0,
                    true => DECAP1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DECAP1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DECAP1R::_1
            }
        }
        #[doc = "Possible values of the field `DTEN1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DTEN1R {
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            _0,
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            _1,
        }
        impl DTEN1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DTEN1R::_0 => false,
                    DTEN1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DTEN1R {
                match value {
                    false => DTEN1R::_0,
                    true => DTEN1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DTEN1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DTEN1R::_1
            }
        }
        #[doc = "Possible values of the field `SYNCEN1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SYNCEN1R {
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            _0,
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            _1,
        }
        impl SYNCEN1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SYNCEN1R::_0 => false,
                    SYNCEN1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SYNCEN1R {
                match value {
                    false => SYNCEN1R::_0,
                    true => SYNCEN1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SYNCEN1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SYNCEN1R::_1
            }
        }
        #[doc = "Possible values of the field `FAULTEN1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTEN1R {
            #[doc = "The fault control in this pair of channels is disabled."]
            _0,
            #[doc = "The fault control in this pair of channels is enabled."]
            _1,
        }
        impl FAULTEN1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTEN1R::_0 => false,
                    FAULTEN1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTEN1R {
                match value {
                    false => FAULTEN1R::_0,
                    true => FAULTEN1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTEN1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTEN1R::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct MCOMBINE1R {
            bits: bool,
        }
        impl MCOMBINE1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct COMBINE2R {
            bits: bool,
        }
        impl COMBINE2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `COMP2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum COMP2R {
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            _0,
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            _1,
        }
        impl COMP2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    COMP2R::_0 => false,
                    COMP2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> COMP2R {
                match value {
                    false => COMP2R::_0,
                    true => COMP2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == COMP2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == COMP2R::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct DECAPEN2R {
            bits: bool,
        }
        impl DECAPEN2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `DECAP2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DECAP2R {
            #[doc = "The dual edge captures are inactive."]
            _0,
            #[doc = "The dual edge captures are active."]
            _1,
        }
        impl DECAP2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DECAP2R::_0 => false,
                    DECAP2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DECAP2R {
                match value {
                    false => DECAP2R::_0,
                    true => DECAP2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DECAP2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DECAP2R::_1
            }
        }
        #[doc = "Possible values of the field `DTEN2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DTEN2R {
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            _0,
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            _1,
        }
        impl DTEN2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DTEN2R::_0 => false,
                    DTEN2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DTEN2R {
                match value {
                    false => DTEN2R::_0,
                    true => DTEN2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DTEN2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DTEN2R::_1
            }
        }
        #[doc = "Possible values of the field `SYNCEN2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SYNCEN2R {
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            _0,
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            _1,
        }
        impl SYNCEN2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SYNCEN2R::_0 => false,
                    SYNCEN2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SYNCEN2R {
                match value {
                    false => SYNCEN2R::_0,
                    true => SYNCEN2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SYNCEN2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SYNCEN2R::_1
            }
        }
        #[doc = "Possible values of the field `FAULTEN2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTEN2R {
            #[doc = "The fault control in this pair of channels is disabled."]
            _0,
            #[doc = "The fault control in this pair of channels is enabled."]
            _1,
        }
        impl FAULTEN2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTEN2R::_0 => false,
                    FAULTEN2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTEN2R {
                match value {
                    false => FAULTEN2R::_0,
                    true => FAULTEN2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTEN2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTEN2R::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct MCOMBINE2R {
            bits: bool,
        }
        impl MCOMBINE2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct COMBINE3R {
            bits: bool,
        }
        impl COMBINE3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `COMP3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum COMP3R {
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            _0,
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            _1,
        }
        impl COMP3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    COMP3R::_0 => false,
                    COMP3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> COMP3R {
                match value {
                    false => COMP3R::_0,
                    true => COMP3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == COMP3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == COMP3R::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct DECAPEN3R {
            bits: bool,
        }
        impl DECAPEN3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `DECAP3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DECAP3R {
            #[doc = "The dual edge captures are inactive."]
            _0,
            #[doc = "The dual edge captures are active."]
            _1,
        }
        impl DECAP3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DECAP3R::_0 => false,
                    DECAP3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DECAP3R {
                match value {
                    false => DECAP3R::_0,
                    true => DECAP3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DECAP3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DECAP3R::_1
            }
        }
        #[doc = "Possible values of the field `DTEN3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DTEN3R {
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            _0,
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            _1,
        }
        impl DTEN3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DTEN3R::_0 => false,
                    DTEN3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DTEN3R {
                match value {
                    false => DTEN3R::_0,
                    true => DTEN3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DTEN3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DTEN3R::_1
            }
        }
        #[doc = "Possible values of the field `SYNCEN3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SYNCEN3R {
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            _0,
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            _1,
        }
        impl SYNCEN3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SYNCEN3R::_0 => false,
                    SYNCEN3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SYNCEN3R {
                match value {
                    false => SYNCEN3R::_0,
                    true => SYNCEN3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SYNCEN3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SYNCEN3R::_1
            }
        }
        #[doc = "Possible values of the field `FAULTEN3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTEN3R {
            #[doc = "The fault control in this pair of channels is disabled."]
            _0,
            #[doc = "The fault control in this pair of channels is enabled."]
            _1,
        }
        impl FAULTEN3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTEN3R::_0 => false,
                    FAULTEN3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTEN3R {
                match value {
                    false => FAULTEN3R::_0,
                    true => FAULTEN3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTEN3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTEN3R::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct MCOMBINE3R {
            bits: bool,
        }
        impl MCOMBINE3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Proxy"]
        pub struct _COMBINE0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _COMBINE0W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `COMP0`"]
        pub enum COMP0W {
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            _0,
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            _1,
        }
        impl COMP0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    COMP0W::_0 => false,
                    COMP0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _COMP0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _COMP0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: COMP0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(COMP0W::_0)
            }
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(COMP0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DECAPEN0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DECAPEN0W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DECAP0`"]
        pub enum DECAP0W {
            #[doc = "The dual edge captures are inactive."]
            _0,
            #[doc = "The dual edge captures are active."]
            _1,
        }
        impl DECAP0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DECAP0W::_0 => false,
                    DECAP0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DECAP0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DECAP0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DECAP0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The dual edge captures are inactive."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DECAP0W::_0)
            }
            #[doc = "The dual edge captures are active."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DECAP0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DTEN0`"]
        pub enum DTEN0W {
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            _0,
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            _1,
        }
        impl DTEN0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DTEN0W::_0 => false,
                    DTEN0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTEN0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTEN0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DTEN0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DTEN0W::_0)
            }
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DTEN0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SYNCEN0`"]
        pub enum SYNCEN0W {
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            _0,
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            _1,
        }
        impl SYNCEN0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SYNCEN0W::_0 => false,
                    SYNCEN0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SYNCEN0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SYNCEN0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SYNCEN0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SYNCEN0W::_0)
            }
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SYNCEN0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FAULTEN0`"]
        pub enum FAULTEN0W {
            #[doc = "The fault control in this pair of channels is disabled."]
            _0,
            #[doc = "The fault control in this pair of channels is enabled."]
            _1,
        }
        impl FAULTEN0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FAULTEN0W::_0 => false,
                    FAULTEN0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FAULTEN0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _FAULTEN0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FAULTEN0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The fault control in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FAULTEN0W::_0)
            }
            #[doc = "The fault control in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FAULTEN0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MCOMBINE0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MCOMBINE0W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _COMBINE1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _COMBINE1W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `COMP1`"]
        pub enum COMP1W {
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            _0,
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            _1,
        }
        impl COMP1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    COMP1W::_0 => false,
                    COMP1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _COMP1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _COMP1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: COMP1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(COMP1W::_0)
            }
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(COMP1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DECAPEN1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DECAPEN1W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DECAP1`"]
        pub enum DECAP1W {
            #[doc = "The dual edge captures are inactive."]
            _0,
            #[doc = "The dual edge captures are active."]
            _1,
        }
        impl DECAP1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DECAP1W::_0 => false,
                    DECAP1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DECAP1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DECAP1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DECAP1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The dual edge captures are inactive."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DECAP1W::_0)
            }
            #[doc = "The dual edge captures are active."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DECAP1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DTEN1`"]
        pub enum DTEN1W {
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            _0,
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            _1,
        }
        impl DTEN1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DTEN1W::_0 => false,
                    DTEN1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTEN1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTEN1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DTEN1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DTEN1W::_0)
            }
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DTEN1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SYNCEN1`"]
        pub enum SYNCEN1W {
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            _0,
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            _1,
        }
        impl SYNCEN1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SYNCEN1W::_0 => false,
                    SYNCEN1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SYNCEN1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SYNCEN1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SYNCEN1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SYNCEN1W::_0)
            }
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SYNCEN1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FAULTEN1`"]
        pub enum FAULTEN1W {
            #[doc = "The fault control in this pair of channels is disabled."]
            _0,
            #[doc = "The fault control in this pair of channels is enabled."]
            _1,
        }
        impl FAULTEN1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FAULTEN1W::_0 => false,
                    FAULTEN1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FAULTEN1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _FAULTEN1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FAULTEN1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The fault control in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FAULTEN1W::_0)
            }
            #[doc = "The fault control in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FAULTEN1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MCOMBINE1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MCOMBINE1W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _COMBINE2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _COMBINE2W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `COMP2`"]
        pub enum COMP2W {
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            _0,
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            _1,
        }
        impl COMP2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    COMP2W::_0 => false,
                    COMP2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _COMP2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _COMP2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: COMP2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(COMP2W::_0)
            }
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(COMP2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DECAPEN2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DECAPEN2W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DECAP2`"]
        pub enum DECAP2W {
            #[doc = "The dual edge captures are inactive."]
            _0,
            #[doc = "The dual edge captures are active."]
            _1,
        }
        impl DECAP2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DECAP2W::_0 => false,
                    DECAP2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DECAP2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DECAP2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DECAP2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The dual edge captures are inactive."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DECAP2W::_0)
            }
            #[doc = "The dual edge captures are active."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DECAP2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 19;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DTEN2`"]
        pub enum DTEN2W {
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            _0,
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            _1,
        }
        impl DTEN2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DTEN2W::_0 => false,
                    DTEN2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTEN2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTEN2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DTEN2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DTEN2W::_0)
            }
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DTEN2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SYNCEN2`"]
        pub enum SYNCEN2W {
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            _0,
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            _1,
        }
        impl SYNCEN2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SYNCEN2W::_0 => false,
                    SYNCEN2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SYNCEN2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SYNCEN2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SYNCEN2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SYNCEN2W::_0)
            }
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SYNCEN2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 21;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FAULTEN2`"]
        pub enum FAULTEN2W {
            #[doc = "The fault control in this pair of channels is disabled."]
            _0,
            #[doc = "The fault control in this pair of channels is enabled."]
            _1,
        }
        impl FAULTEN2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FAULTEN2W::_0 => false,
                    FAULTEN2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FAULTEN2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _FAULTEN2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FAULTEN2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The fault control in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FAULTEN2W::_0)
            }
            #[doc = "The fault control in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FAULTEN2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 22;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MCOMBINE2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MCOMBINE2W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 23;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _COMBINE3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _COMBINE3W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `COMP3`"]
        pub enum COMP3W {
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            _0,
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            _1,
        }
        impl COMP3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    COMP3W::_0 => false,
                    COMP3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _COMP3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _COMP3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: COMP3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(COMP3W::_0)
            }
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(COMP3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 25;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DECAPEN3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DECAPEN3W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 26;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DECAP3`"]
        pub enum DECAP3W {
            #[doc = "The dual edge captures are inactive."]
            _0,
            #[doc = "The dual edge captures are active."]
            _1,
        }
        impl DECAP3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DECAP3W::_0 => false,
                    DECAP3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DECAP3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DECAP3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DECAP3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The dual edge captures are inactive."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DECAP3W::_0)
            }
            #[doc = "The dual edge captures are active."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DECAP3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 27;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DTEN3`"]
        pub enum DTEN3W {
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            _0,
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            _1,
        }
        impl DTEN3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DTEN3W::_0 => false,
                    DTEN3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTEN3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTEN3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DTEN3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DTEN3W::_0)
            }
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DTEN3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 28;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SYNCEN3`"]
        pub enum SYNCEN3W {
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            _0,
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            _1,
        }
        impl SYNCEN3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SYNCEN3W::_0 => false,
                    SYNCEN3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SYNCEN3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SYNCEN3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SYNCEN3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SYNCEN3W::_0)
            }
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SYNCEN3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 29;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FAULTEN3`"]
        pub enum FAULTEN3W {
            #[doc = "The fault control in this pair of channels is disabled."]
            _0,
            #[doc = "The fault control in this pair of channels is enabled."]
            _1,
        }
        impl FAULTEN3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FAULTEN3W::_0 => false,
                    FAULTEN3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FAULTEN3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _FAULTEN3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FAULTEN3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The fault control in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FAULTEN3W::_0)
            }
            #[doc = "The fault control in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FAULTEN3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MCOMBINE3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MCOMBINE3W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Combine Channels For n = 0"]
            #[inline(always)]
            pub fn combine0(&self) -> COMBINE0R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                COMBINE0R { bits }
            }
            #[doc = "Bit 1 - Complement Of Channel (n) For n = 0"]
            #[inline(always)]
            pub fn comp0(&self) -> COMP0R {
                COMP0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Dual Edge Capture Mode Enable For n = 0"]
            #[inline(always)]
            pub fn decapen0(&self) -> DECAPEN0R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                DECAPEN0R { bits }
            }
            #[doc = "Bit 3 - Dual Edge Capture Mode Captures For n = 0"]
            #[inline(always)]
            pub fn decap0(&self) -> DECAP0R {
                DECAP0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Deadtime Enable For n = 0"]
            #[inline(always)]
            pub fn dten0(&self) -> DTEN0R {
                DTEN0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Synchronization Enable For n = 0"]
            #[inline(always)]
            pub fn syncen0(&self) -> SYNCEN0R {
                SYNCEN0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Fault Control Enable For n = 0"]
            #[inline(always)]
            pub fn faulten0(&self) -> FAULTEN0R {
                FAULTEN0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Modified Combine Mode For n = 0"]
            #[inline(always)]
            pub fn mcombine0(&self) -> MCOMBINE0R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MCOMBINE0R { bits }
            }
            #[doc = "Bit 8 - Combine Channels For n = 2"]
            #[inline(always)]
            pub fn combine1(&self) -> COMBINE1R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                COMBINE1R { bits }
            }
            #[doc = "Bit 9 - Complement Of Channel (n) For n = 2"]
            #[inline(always)]
            pub fn comp1(&self) -> COMP1R {
                COMP1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Dual Edge Capture Mode Enable For n = 2"]
            #[inline(always)]
            pub fn decapen1(&self) -> DECAPEN1R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                DECAPEN1R { bits }
            }
            #[doc = "Bit 11 - Dual Edge Capture Mode Captures For n = 2"]
            #[inline(always)]
            pub fn decap1(&self) -> DECAP1R {
                DECAP1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Deadtime Enable For n = 2"]
            #[inline(always)]
            pub fn dten1(&self) -> DTEN1R {
                DTEN1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Synchronization Enable For n = 2"]
            #[inline(always)]
            pub fn syncen1(&self) -> SYNCEN1R {
                SYNCEN1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - Fault Control Enable For n = 2"]
            #[inline(always)]
            pub fn faulten1(&self) -> FAULTEN1R {
                FAULTEN1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - Modified Combine Mode For n = 2"]
            #[inline(always)]
            pub fn mcombine1(&self) -> MCOMBINE1R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MCOMBINE1R { bits }
            }
            #[doc = "Bit 16 - Combine Channels For n = 4"]
            #[inline(always)]
            pub fn combine2(&self) -> COMBINE2R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                COMBINE2R { bits }
            }
            #[doc = "Bit 17 - Complement Of Channel (n) For n = 4"]
            #[inline(always)]
            pub fn comp2(&self) -> COMP2R {
                COMP2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 18 - Dual Edge Capture Mode Enable For n = 4"]
            #[inline(always)]
            pub fn decapen2(&self) -> DECAPEN2R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                DECAPEN2R { bits }
            }
            #[doc = "Bit 19 - Dual Edge Capture Mode Captures For n = 4"]
            #[inline(always)]
            pub fn decap2(&self) -> DECAP2R {
                DECAP2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 19;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 20 - Deadtime Enable For n = 4"]
            #[inline(always)]
            pub fn dten2(&self) -> DTEN2R {
                DTEN2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - Synchronization Enable For n = 4"]
            #[inline(always)]
            pub fn syncen2(&self) -> SYNCEN2R {
                SYNCEN2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 22 - Fault Control Enable For n = 4"]
            #[inline(always)]
            pub fn faulten2(&self) -> FAULTEN2R {
                FAULTEN2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 23 - Modified Combine Mode For n = 4"]
            #[inline(always)]
            pub fn mcombine2(&self) -> MCOMBINE2R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MCOMBINE2R { bits }
            }
            #[doc = "Bit 24 - Combine Channels For n = 6"]
            #[inline(always)]
            pub fn combine3(&self) -> COMBINE3R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                COMBINE3R { bits }
            }
            #[doc = "Bit 25 - Complement Of Channel (n) for n = 6"]
            #[inline(always)]
            pub fn comp3(&self) -> COMP3R {
                COMP3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 25;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 26 - Dual Edge Capture Mode Enable For n = 6"]
            #[inline(always)]
            pub fn decapen3(&self) -> DECAPEN3R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 26;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                DECAPEN3R { bits }
            }
            #[doc = "Bit 27 - Dual Edge Capture Mode Captures For n = 6"]
            #[inline(always)]
            pub fn decap3(&self) -> DECAP3R {
                DECAP3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 27;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 28 - Deadtime Enable For n = 6"]
            #[inline(always)]
            pub fn dten3(&self) -> DTEN3R {
                DTEN3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 28;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 29 - Synchronization Enable For n = 6"]
            #[inline(always)]
            pub fn syncen3(&self) -> SYNCEN3R {
                SYNCEN3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 29;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 30 - Fault Control Enable For n = 6"]
            #[inline(always)]
            pub fn faulten3(&self) -> FAULTEN3R {
                FAULTEN3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Modified Combine Mode For n = 6"]
            #[inline(always)]
            pub fn mcombine3(&self) -> MCOMBINE3R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MCOMBINE3R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Combine Channels For n = 0"]
            #[inline(always)]
            pub fn combine0(&mut self) -> _COMBINE0W {
                _COMBINE0W { w: self }
            }
            #[doc = "Bit 1 - Complement Of Channel (n) For n = 0"]
            #[inline(always)]
            pub fn comp0(&mut self) -> _COMP0W {
                _COMP0W { w: self }
            }
            #[doc = "Bit 2 - Dual Edge Capture Mode Enable For n = 0"]
            #[inline(always)]
            pub fn decapen0(&mut self) -> _DECAPEN0W {
                _DECAPEN0W { w: self }
            }
            #[doc = "Bit 3 - Dual Edge Capture Mode Captures For n = 0"]
            #[inline(always)]
            pub fn decap0(&mut self) -> _DECAP0W {
                _DECAP0W { w: self }
            }
            #[doc = "Bit 4 - Deadtime Enable For n = 0"]
            #[inline(always)]
            pub fn dten0(&mut self) -> _DTEN0W {
                _DTEN0W { w: self }
            }
            #[doc = "Bit 5 - Synchronization Enable For n = 0"]
            #[inline(always)]
            pub fn syncen0(&mut self) -> _SYNCEN0W {
                _SYNCEN0W { w: self }
            }
            #[doc = "Bit 6 - Fault Control Enable For n = 0"]
            #[inline(always)]
            pub fn faulten0(&mut self) -> _FAULTEN0W {
                _FAULTEN0W { w: self }
            }
            #[doc = "Bit 7 - Modified Combine Mode For n = 0"]
            #[inline(always)]
            pub fn mcombine0(&mut self) -> _MCOMBINE0W {
                _MCOMBINE0W { w: self }
            }
            #[doc = "Bit 8 - Combine Channels For n = 2"]
            #[inline(always)]
            pub fn combine1(&mut self) -> _COMBINE1W {
                _COMBINE1W { w: self }
            }
            #[doc = "Bit 9 - Complement Of Channel (n) For n = 2"]
            #[inline(always)]
            pub fn comp1(&mut self) -> _COMP1W {
                _COMP1W { w: self }
            }
            #[doc = "Bit 10 - Dual Edge Capture Mode Enable For n = 2"]
            #[inline(always)]
            pub fn decapen1(&mut self) -> _DECAPEN1W {
                _DECAPEN1W { w: self }
            }
            #[doc = "Bit 11 - Dual Edge Capture Mode Captures For n = 2"]
            #[inline(always)]
            pub fn decap1(&mut self) -> _DECAP1W {
                _DECAP1W { w: self }
            }
            #[doc = "Bit 12 - Deadtime Enable For n = 2"]
            #[inline(always)]
            pub fn dten1(&mut self) -> _DTEN1W {
                _DTEN1W { w: self }
            }
            #[doc = "Bit 13 - Synchronization Enable For n = 2"]
            #[inline(always)]
            pub fn syncen1(&mut self) -> _SYNCEN1W {
                _SYNCEN1W { w: self }
            }
            #[doc = "Bit 14 - Fault Control Enable For n = 2"]
            #[inline(always)]
            pub fn faulten1(&mut self) -> _FAULTEN1W {
                _FAULTEN1W { w: self }
            }
            #[doc = "Bit 15 - Modified Combine Mode For n = 2"]
            #[inline(always)]
            pub fn mcombine1(&mut self) -> _MCOMBINE1W {
                _MCOMBINE1W { w: self }
            }
            #[doc = "Bit 16 - Combine Channels For n = 4"]
            #[inline(always)]
            pub fn combine2(&mut self) -> _COMBINE2W {
                _COMBINE2W { w: self }
            }
            #[doc = "Bit 17 - Complement Of Channel (n) For n = 4"]
            #[inline(always)]
            pub fn comp2(&mut self) -> _COMP2W {
                _COMP2W { w: self }
            }
            #[doc = "Bit 18 - Dual Edge Capture Mode Enable For n = 4"]
            #[inline(always)]
            pub fn decapen2(&mut self) -> _DECAPEN2W {
                _DECAPEN2W { w: self }
            }
            #[doc = "Bit 19 - Dual Edge Capture Mode Captures For n = 4"]
            #[inline(always)]
            pub fn decap2(&mut self) -> _DECAP2W {
                _DECAP2W { w: self }
            }
            #[doc = "Bit 20 - Deadtime Enable For n = 4"]
            #[inline(always)]
            pub fn dten2(&mut self) -> _DTEN2W {
                _DTEN2W { w: self }
            }
            #[doc = "Bit 21 - Synchronization Enable For n = 4"]
            #[inline(always)]
            pub fn syncen2(&mut self) -> _SYNCEN2W {
                _SYNCEN2W { w: self }
            }
            #[doc = "Bit 22 - Fault Control Enable For n = 4"]
            #[inline(always)]
            pub fn faulten2(&mut self) -> _FAULTEN2W {
                _FAULTEN2W { w: self }
            }
            #[doc = "Bit 23 - Modified Combine Mode For n = 4"]
            #[inline(always)]
            pub fn mcombine2(&mut self) -> _MCOMBINE2W {
                _MCOMBINE2W { w: self }
            }
            #[doc = "Bit 24 - Combine Channels For n = 6"]
            #[inline(always)]
            pub fn combine3(&mut self) -> _COMBINE3W {
                _COMBINE3W { w: self }
            }
            #[doc = "Bit 25 - Complement Of Channel (n) for n = 6"]
            #[inline(always)]
            pub fn comp3(&mut self) -> _COMP3W {
                _COMP3W { w: self }
            }
            #[doc = "Bit 26 - Dual Edge Capture Mode Enable For n = 6"]
            #[inline(always)]
            pub fn decapen3(&mut self) -> _DECAPEN3W {
                _DECAPEN3W { w: self }
            }
            #[doc = "Bit 27 - Dual Edge Capture Mode Captures For n = 6"]
            #[inline(always)]
            pub fn decap3(&mut self) -> _DECAP3W {
                _DECAP3W { w: self }
            }
            #[doc = "Bit 28 - Deadtime Enable For n = 6"]
            #[inline(always)]
            pub fn dten3(&mut self) -> _DTEN3W {
                _DTEN3W { w: self }
            }
            #[doc = "Bit 29 - Synchronization Enable For n = 6"]
            #[inline(always)]
            pub fn syncen3(&mut self) -> _SYNCEN3W {
                _SYNCEN3W { w: self }
            }
            #[doc = "Bit 30 - Fault Control Enable For n = 6"]
            #[inline(always)]
            pub fn faulten3(&mut self) -> _FAULTEN3W {
                _FAULTEN3W { w: self }
            }
            #[doc = "Bit 31 - Modified Combine Mode For n = 6"]
            #[inline(always)]
            pub fn mcombine3(&mut self) -> _MCOMBINE3W {
                _MCOMBINE3W { w: self }
            }
        }
    }
    #[doc = "Deadtime Configuration"]
    pub struct DEADTIME {
        register: VolatileCell<u32>,
    }
    #[doc = "Deadtime Configuration"]
    pub mod deadtime {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::DEADTIME {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DTVALR {
            bits: u8,
        }
        impl DTVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DTPS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DTPSR {
            #[doc = "Divide the FTM input clock by 1."]
            _0X,
            #[doc = "Divide the FTM input clock by 4."]
            _10,
            #[doc = "Divide the FTM input clock by 16."]
            _11,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl DTPSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    DTPSR::_0X => 0,
                    DTPSR::_10 => 2,
                    DTPSR::_11 => 3,
                    DTPSR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> DTPSR {
                match value {
                    0 => DTPSR::_0X,
                    2 => DTPSR::_10,
                    3 => DTPSR::_11,
                    i => DTPSR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0X`"]
            #[inline(always)]
            pub fn is_0x(&self) -> bool {
                *self == DTPSR::_0X
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == DTPSR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == DTPSR::_11
            }
        }
        #[doc = r" Value of the field"]
        pub struct DTVALEXR {
            bits: u8,
        }
        impl DTVALEXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DTPS`"]
        pub enum DTPSW {
            #[doc = "Divide the FTM input clock by 1."]
            _0X,
            #[doc = "Divide the FTM input clock by 4."]
            _10,
            #[doc = "Divide the FTM input clock by 16."]
            _11,
        }
        impl DTPSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    DTPSW::_0X => 0,
                    DTPSW::_10 => 2,
                    DTPSW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTPSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTPSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DTPSW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Divide the FTM input clock by 1."]
            #[inline(always)]
            pub fn _0x(self) -> &'a mut W {
                self.variant(DTPSW::_0X)
            }
            #[doc = "Divide the FTM input clock by 4."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(DTPSW::_10)
            }
            #[doc = "Divide the FTM input clock by 16."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(DTPSW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTVALEXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTVALEXW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Deadtime Value"]
            #[inline(always)]
            pub fn dtval(&self) -> DTVALR {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DTVALR { bits }
            }
            #[doc = "Bits 6:7 - Deadtime Prescaler Value"]
            #[inline(always)]
            pub fn dtps(&self) -> DTPSR {
                DTPSR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 16:19 - Extended Deadtime Value"]
            #[inline(always)]
            pub fn dtvalex(&self) -> DTVALEXR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DTVALEXR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - Deadtime Value"]
            #[inline(always)]
            pub fn dtval(&mut self) -> _DTVALW {
                _DTVALW { w: self }
            }
            #[doc = "Bits 6:7 - Deadtime Prescaler Value"]
            #[inline(always)]
            pub fn dtps(&mut self) -> _DTPSW {
                _DTPSW { w: self }
            }
            #[doc = "Bits 16:19 - Extended Deadtime Value"]
            #[inline(always)]
            pub fn dtvalex(&mut self) -> _DTVALEXW {
                _DTVALEXW { w: self }
            }
        }
    }
    #[doc = "FTM External Trigger"]
    pub struct EXTTRIG {
        register: VolatileCell<u32>,
    }
    #[doc = "FTM External Trigger"]
    pub mod exttrig {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EXTTRIG {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CH2TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH2TRIGR {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH2TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH2TRIGR::_0 => false,
                    CH2TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH2TRIGR {
                match value {
                    false => CH2TRIGR::_0,
                    true => CH2TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH2TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH2TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `CH3TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH3TRIGR {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH3TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH3TRIGR::_0 => false,
                    CH3TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH3TRIGR {
                match value {
                    false => CH3TRIGR::_0,
                    true => CH3TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH3TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH3TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `CH4TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH4TRIGR {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH4TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH4TRIGR::_0 => false,
                    CH4TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH4TRIGR {
                match value {
                    false => CH4TRIGR::_0,
                    true => CH4TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH4TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH4TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `CH5TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH5TRIGR {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH5TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH5TRIGR::_0 => false,
                    CH5TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH5TRIGR {
                match value {
                    false => CH5TRIGR::_0,
                    true => CH5TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH5TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH5TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `CH0TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH0TRIGR {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH0TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH0TRIGR::_0 => false,
                    CH0TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH0TRIGR {
                match value {
                    false => CH0TRIGR::_0,
                    true => CH0TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH0TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH0TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `CH1TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH1TRIGR {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH1TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH1TRIGR::_0 => false,
                    CH1TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH1TRIGR {
                match value {
                    false => CH1TRIGR::_0,
                    true => CH1TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH1TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH1TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `INITTRIGEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INITTRIGENR {
            #[doc = "The generation of initialization trigger is disabled."]
            _0,
            #[doc = "The generation of initialization trigger is enabled."]
            _1,
        }
        impl INITTRIGENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INITTRIGENR::_0 => false,
                    INITTRIGENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INITTRIGENR {
                match value {
                    false => INITTRIGENR::_0,
                    true => INITTRIGENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INITTRIGENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INITTRIGENR::_1
            }
        }
        #[doc = "Possible values of the field `TRIGF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGFR {
            #[doc = "No channel trigger was generated."]
            _0,
            #[doc = "A channel trigger was generated."]
            _1,
        }
        impl TRIGFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGFR::_0 => false,
                    TRIGFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGFR {
                match value {
                    false => TRIGFR::_0,
                    true => TRIGFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGFR::_1
            }
        }
        #[doc = "Possible values of the field `CH6TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH6TRIGR {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH6TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH6TRIGR::_0 => false,
                    CH6TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH6TRIGR {
                match value {
                    false => CH6TRIGR::_0,
                    true => CH6TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH6TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH6TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `CH7TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH7TRIGR {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH7TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH7TRIGR::_0 => false,
                    CH7TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH7TRIGR {
                match value {
                    false => CH7TRIGR::_0,
                    true => CH7TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH7TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH7TRIGR::_1
            }
        }
        #[doc = "Values that can be written to the field `CH2TRIG`"]
        pub enum CH2TRIGW {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH2TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH2TRIGW::_0 => false,
                    CH2TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH2TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH2TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH2TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The generation of this external trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH2TRIGW::_0)
            }
            #[doc = "The generation of this external trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH2TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH3TRIG`"]
        pub enum CH3TRIGW {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH3TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH3TRIGW::_0 => false,
                    CH3TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH3TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH3TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH3TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The generation of this external trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH3TRIGW::_0)
            }
            #[doc = "The generation of this external trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH3TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH4TRIG`"]
        pub enum CH4TRIGW {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH4TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH4TRIGW::_0 => false,
                    CH4TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH4TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH4TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH4TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The generation of this external trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH4TRIGW::_0)
            }
            #[doc = "The generation of this external trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH4TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH5TRIG`"]
        pub enum CH5TRIGW {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH5TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH5TRIGW::_0 => false,
                    CH5TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH5TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH5TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH5TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The generation of this external trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH5TRIGW::_0)
            }
            #[doc = "The generation of this external trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH5TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH0TRIG`"]
        pub enum CH0TRIGW {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH0TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH0TRIGW::_0 => false,
                    CH0TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH0TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH0TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH0TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The generation of this external trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH0TRIGW::_0)
            }
            #[doc = "The generation of this external trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH0TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH1TRIG`"]
        pub enum CH1TRIGW {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH1TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH1TRIGW::_0 => false,
                    CH1TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH1TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH1TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH1TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The generation of this external trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH1TRIGW::_0)
            }
            #[doc = "The generation of this external trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH1TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INITTRIGEN`"]
        pub enum INITTRIGENW {
            #[doc = "The generation of initialization trigger is disabled."]
            _0,
            #[doc = "The generation of initialization trigger is enabled."]
            _1,
        }
        impl INITTRIGENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INITTRIGENW::_0 => false,
                    INITTRIGENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INITTRIGENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INITTRIGENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INITTRIGENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The generation of initialization trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INITTRIGENW::_0)
            }
            #[doc = "The generation of initialization trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INITTRIGENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH6TRIG`"]
        pub enum CH6TRIGW {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH6TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH6TRIGW::_0 => false,
                    CH6TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH6TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH6TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH6TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The generation of this external trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH6TRIGW::_0)
            }
            #[doc = "The generation of this external trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH6TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH7TRIG`"]
        pub enum CH7TRIGW {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH7TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH7TRIGW::_0 => false,
                    CH7TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH7TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH7TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH7TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The generation of this external trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH7TRIGW::_0)
            }
            #[doc = "The generation of this external trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH7TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Channel 2 External Trigger Enable"]
            #[inline(always)]
            pub fn ch2trig(&self) -> CH2TRIGR {
                CH2TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Channel 3 External Trigger Enable"]
            #[inline(always)]
            pub fn ch3trig(&self) -> CH3TRIGR {
                CH3TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel 4 External Trigger Enable"]
            #[inline(always)]
            pub fn ch4trig(&self) -> CH4TRIGR {
                CH4TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Channel 5 External Trigger Enable"]
            #[inline(always)]
            pub fn ch5trig(&self) -> CH5TRIGR {
                CH5TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Channel 0 External Trigger Enable"]
            #[inline(always)]
            pub fn ch0trig(&self) -> CH0TRIGR {
                CH0TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Channel 1 External Trigger Enable"]
            #[inline(always)]
            pub fn ch1trig(&self) -> CH1TRIGR {
                CH1TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Initialization Trigger Enable"]
            #[inline(always)]
            pub fn inittrigen(&self) -> INITTRIGENR {
                INITTRIGENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel Trigger Flag"]
            #[inline(always)]
            pub fn trigf(&self) -> TRIGFR {
                TRIGFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Channel 6 External Trigger Enable"]
            #[inline(always)]
            pub fn ch6trig(&self) -> CH6TRIGR {
                CH6TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Channel 7 External Trigger Enable"]
            #[inline(always)]
            pub fn ch7trig(&self) -> CH7TRIGR {
                CH7TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Channel 2 External Trigger Enable"]
            #[inline(always)]
            pub fn ch2trig(&mut self) -> _CH2TRIGW {
                _CH2TRIGW { w: self }
            }
            #[doc = "Bit 1 - Channel 3 External Trigger Enable"]
            #[inline(always)]
            pub fn ch3trig(&mut self) -> _CH3TRIGW {
                _CH3TRIGW { w: self }
            }
            #[doc = "Bit 2 - Channel 4 External Trigger Enable"]
            #[inline(always)]
            pub fn ch4trig(&mut self) -> _CH4TRIGW {
                _CH4TRIGW { w: self }
            }
            #[doc = "Bit 3 - Channel 5 External Trigger Enable"]
            #[inline(always)]
            pub fn ch5trig(&mut self) -> _CH5TRIGW {
                _CH5TRIGW { w: self }
            }
            #[doc = "Bit 4 - Channel 0 External Trigger Enable"]
            #[inline(always)]
            pub fn ch0trig(&mut self) -> _CH0TRIGW {
                _CH0TRIGW { w: self }
            }
            #[doc = "Bit 5 - Channel 1 External Trigger Enable"]
            #[inline(always)]
            pub fn ch1trig(&mut self) -> _CH1TRIGW {
                _CH1TRIGW { w: self }
            }
            #[doc = "Bit 6 - Initialization Trigger Enable"]
            #[inline(always)]
            pub fn inittrigen(&mut self) -> _INITTRIGENW {
                _INITTRIGENW { w: self }
            }
            #[doc = "Bit 8 - Channel 6 External Trigger Enable"]
            #[inline(always)]
            pub fn ch6trig(&mut self) -> _CH6TRIGW {
                _CH6TRIGW { w: self }
            }
            #[doc = "Bit 9 - Channel 7 External Trigger Enable"]
            #[inline(always)]
            pub fn ch7trig(&mut self) -> _CH7TRIGW {
                _CH7TRIGW { w: self }
            }
        }
    }
    #[doc = "Channels Polarity"]
    pub struct POL {
        register: VolatileCell<u32>,
    }
    #[doc = "Channels Polarity"]
    pub mod pol {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::POL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `POL0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum POL0R {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    POL0R::_0 => false,
                    POL0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> POL0R {
                match value {
                    false => POL0R::_0,
                    true => POL0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == POL0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == POL0R::_1
            }
        }
        #[doc = "Possible values of the field `POL1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum POL1R {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    POL1R::_0 => false,
                    POL1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> POL1R {
                match value {
                    false => POL1R::_0,
                    true => POL1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == POL1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == POL1R::_1
            }
        }
        #[doc = "Possible values of the field `POL2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum POL2R {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    POL2R::_0 => false,
                    POL2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> POL2R {
                match value {
                    false => POL2R::_0,
                    true => POL2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == POL2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == POL2R::_1
            }
        }
        #[doc = "Possible values of the field `POL3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum POL3R {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    POL3R::_0 => false,
                    POL3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> POL3R {
                match value {
                    false => POL3R::_0,
                    true => POL3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == POL3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == POL3R::_1
            }
        }
        #[doc = "Possible values of the field `POL4`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum POL4R {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL4R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    POL4R::_0 => false,
                    POL4R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> POL4R {
                match value {
                    false => POL4R::_0,
                    true => POL4R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == POL4R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == POL4R::_1
            }
        }
        #[doc = "Possible values of the field `POL5`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum POL5R {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL5R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    POL5R::_0 => false,
                    POL5R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> POL5R {
                match value {
                    false => POL5R::_0,
                    true => POL5R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == POL5R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == POL5R::_1
            }
        }
        #[doc = "Possible values of the field `POL6`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum POL6R {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL6R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    POL6R::_0 => false,
                    POL6R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> POL6R {
                match value {
                    false => POL6R::_0,
                    true => POL6R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == POL6R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == POL6R::_1
            }
        }
        #[doc = "Possible values of the field `POL7`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum POL7R {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL7R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    POL7R::_0 => false,
                    POL7R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> POL7R {
                match value {
                    false => POL7R::_0,
                    true => POL7R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == POL7R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == POL7R::_1
            }
        }
        #[doc = "Values that can be written to the field `POL0`"]
        pub enum POL0W {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    POL0W::_0 => false,
                    POL0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _POL0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _POL0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: POL0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel polarity is active high."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(POL0W::_0)
            }
            #[doc = "The channel polarity is active low."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(POL0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `POL1`"]
        pub enum POL1W {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    POL1W::_0 => false,
                    POL1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _POL1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _POL1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: POL1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel polarity is active high."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(POL1W::_0)
            }
            #[doc = "The channel polarity is active low."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(POL1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `POL2`"]
        pub enum POL2W {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    POL2W::_0 => false,
                    POL2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _POL2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _POL2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: POL2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel polarity is active high."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(POL2W::_0)
            }
            #[doc = "The channel polarity is active low."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(POL2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `POL3`"]
        pub enum POL3W {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    POL3W::_0 => false,
                    POL3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _POL3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _POL3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: POL3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel polarity is active high."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(POL3W::_0)
            }
            #[doc = "The channel polarity is active low."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(POL3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `POL4`"]
        pub enum POL4W {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL4W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    POL4W::_0 => false,
                    POL4W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _POL4W<'a> {
            w: &'a mut W,
        }
        impl<'a> _POL4W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: POL4W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel polarity is active high."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(POL4W::_0)
            }
            #[doc = "The channel polarity is active low."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(POL4W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `POL5`"]
        pub enum POL5W {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL5W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    POL5W::_0 => false,
                    POL5W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _POL5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _POL5W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: POL5W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel polarity is active high."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(POL5W::_0)
            }
            #[doc = "The channel polarity is active low."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(POL5W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `POL6`"]
        pub enum POL6W {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL6W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    POL6W::_0 => false,
                    POL6W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _POL6W<'a> {
            w: &'a mut W,
        }
        impl<'a> _POL6W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: POL6W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel polarity is active high."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(POL6W::_0)
            }
            #[doc = "The channel polarity is active low."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(POL6W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `POL7`"]
        pub enum POL7W {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL7W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    POL7W::_0 => false,
                    POL7W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _POL7W<'a> {
            w: &'a mut W,
        }
        impl<'a> _POL7W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: POL7W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel polarity is active high."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(POL7W::_0)
            }
            #[doc = "The channel polarity is active low."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(POL7W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Channel 0 Polarity"]
            #[inline(always)]
            pub fn pol0(&self) -> POL0R {
                POL0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Channel 1 Polarity"]
            #[inline(always)]
            pub fn pol1(&self) -> POL1R {
                POL1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel 2 Polarity"]
            #[inline(always)]
            pub fn pol2(&self) -> POL2R {
                POL2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Channel 3 Polarity"]
            #[inline(always)]
            pub fn pol3(&self) -> POL3R {
                POL3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Channel 4 Polarity"]
            #[inline(always)]
            pub fn pol4(&self) -> POL4R {
                POL4R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Channel 5 Polarity"]
            #[inline(always)]
            pub fn pol5(&self) -> POL5R {
                POL5R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Channel 6 Polarity"]
            #[inline(always)]
            pub fn pol6(&self) -> POL6R {
                POL6R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel 7 Polarity"]
            #[inline(always)]
            pub fn pol7(&self) -> POL7R {
                POL7R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Channel 0 Polarity"]
            #[inline(always)]
            pub fn pol0(&mut self) -> _POL0W {
                _POL0W { w: self }
            }
            #[doc = "Bit 1 - Channel 1 Polarity"]
            #[inline(always)]
            pub fn pol1(&mut self) -> _POL1W {
                _POL1W { w: self }
            }
            #[doc = "Bit 2 - Channel 2 Polarity"]
            #[inline(always)]
            pub fn pol2(&mut self) -> _POL2W {
                _POL2W { w: self }
            }
            #[doc = "Bit 3 - Channel 3 Polarity"]
            #[inline(always)]
            pub fn pol3(&mut self) -> _POL3W {
                _POL3W { w: self }
            }
            #[doc = "Bit 4 - Channel 4 Polarity"]
            #[inline(always)]
            pub fn pol4(&mut self) -> _POL4W {
                _POL4W { w: self }
            }
            #[doc = "Bit 5 - Channel 5 Polarity"]
            #[inline(always)]
            pub fn pol5(&mut self) -> _POL5W {
                _POL5W { w: self }
            }
            #[doc = "Bit 6 - Channel 6 Polarity"]
            #[inline(always)]
            pub fn pol6(&mut self) -> _POL6W {
                _POL6W { w: self }
            }
            #[doc = "Bit 7 - Channel 7 Polarity"]
            #[inline(always)]
            pub fn pol7(&mut self) -> _POL7W {
                _POL7W { w: self }
            }
        }
    }
    #[doc = "Fault Mode Status"]
    pub struct FMS {
        register: VolatileCell<u32>,
    }
    #[doc = "Fault Mode Status"]
    pub mod fms {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FMS {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `FAULTF0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTF0R {
            #[doc = "No fault condition was detected at the fault input."]
            _0,
            #[doc = "A fault condition was detected at the fault input."]
            _1,
        }
        impl FAULTF0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTF0R::_0 => false,
                    FAULTF0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTF0R {
                match value {
                    false => FAULTF0R::_0,
                    true => FAULTF0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTF0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTF0R::_1
            }
        }
        #[doc = "Possible values of the field `FAULTF1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTF1R {
            #[doc = "No fault condition was detected at the fault input."]
            _0,
            #[doc = "A fault condition was detected at the fault input."]
            _1,
        }
        impl FAULTF1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTF1R::_0 => false,
                    FAULTF1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTF1R {
                match value {
                    false => FAULTF1R::_0,
                    true => FAULTF1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTF1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTF1R::_1
            }
        }
        #[doc = "Possible values of the field `FAULTF2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTF2R {
            #[doc = "No fault condition was detected at the fault input."]
            _0,
            #[doc = "A fault condition was detected at the fault input."]
            _1,
        }
        impl FAULTF2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTF2R::_0 => false,
                    FAULTF2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTF2R {
                match value {
                    false => FAULTF2R::_0,
                    true => FAULTF2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTF2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTF2R::_1
            }
        }
        #[doc = "Possible values of the field `FAULTF3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTF3R {
            #[doc = "No fault condition was detected at the fault input."]
            _0,
            #[doc = "A fault condition was detected at the fault input."]
            _1,
        }
        impl FAULTF3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTF3R::_0 => false,
                    FAULTF3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTF3R {
                match value {
                    false => FAULTF3R::_0,
                    true => FAULTF3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTF3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTF3R::_1
            }
        }
        #[doc = "Possible values of the field `FAULTIN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTINR {
            #[doc = "The logic OR of the enabled fault inputs is 0."]
            _0,
            #[doc = "The logic OR of the enabled fault inputs is 1."]
            _1,
        }
        impl FAULTINR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTINR::_0 => false,
                    FAULTINR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTINR {
                match value {
                    false => FAULTINR::_0,
                    true => FAULTINR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTINR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTINR::_1
            }
        }
        #[doc = "Possible values of the field `WPEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WPENR {
            #[doc = "Write protection is disabled. Write protected bits can be written."]
            _0,
            #[doc = "Write protection is enabled. Write protected bits cannot be written."]
            _1,
        }
        impl WPENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WPENR::_0 => false,
                    WPENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WPENR {
                match value {
                    false => WPENR::_0,
                    true => WPENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WPENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WPENR::_1
            }
        }
        #[doc = "Possible values of the field `FAULTF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTFR {
            #[doc = "No fault condition was detected."]
            _0,
            #[doc = "A fault condition was detected."]
            _1,
        }
        impl FAULTFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTFR::_0 => false,
                    FAULTFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTFR {
                match value {
                    false => FAULTFR::_0,
                    true => FAULTFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTFR::_1
            }
        }
        #[doc = "Values that can be written to the field `WPEN`"]
        pub enum WPENW {
            #[doc = "Write protection is disabled. Write protected bits can be written."]
            _0,
            #[doc = "Write protection is enabled. Write protected bits cannot be written."]
            _1,
        }
        impl WPENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WPENW::_0 => false,
                    WPENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WPENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WPENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WPENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Write protection is disabled. Write protected bits can be written."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WPENW::_0)
            }
            #[doc = "Write protection is enabled. Write protected bits cannot be written."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WPENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Fault Detection Flag 0"]
            #[inline(always)]
            pub fn faultf0(&self) -> FAULTF0R {
                FAULTF0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Fault Detection Flag 1"]
            #[inline(always)]
            pub fn faultf1(&self) -> FAULTF1R {
                FAULTF1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Fault Detection Flag 2"]
            #[inline(always)]
            pub fn faultf2(&self) -> FAULTF2R {
                FAULTF2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Fault Detection Flag 3"]
            #[inline(always)]
            pub fn faultf3(&self) -> FAULTF3R {
                FAULTF3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Fault Inputs"]
            #[inline(always)]
            pub fn faultin(&self) -> FAULTINR {
                FAULTINR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Write Protection Enable"]
            #[inline(always)]
            pub fn wpen(&self) -> WPENR {
                WPENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Fault Detection Flag"]
            #[inline(always)]
            pub fn faultf(&self) -> FAULTFR {
                FAULTFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 6 - Write Protection Enable"]
            #[inline(always)]
            pub fn wpen(&mut self) -> _WPENW {
                _WPENW { w: self }
            }
        }
    }
    #[doc = "Input Capture Filter Control"]
    pub struct FILTER {
        register: VolatileCell<u32>,
    }
    #[doc = "Input Capture Filter Control"]
    pub mod filter {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FILTER {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CH0FVALR {
            bits: u8,
        }
        impl CH0FVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct CH1FVALR {
            bits: u8,
        }
        impl CH1FVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct CH2FVALR {
            bits: u8,
        }
        impl CH2FVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct CH3FVALR {
            bits: u8,
        }
        impl CH3FVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH0FVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH0FVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH1FVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH1FVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH2FVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH2FVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH3FVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH3FVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:3 - Channel 0 Input Filter"]
            #[inline(always)]
            pub fn ch0fval(&self) -> CH0FVALR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CH0FVALR { bits }
            }
            #[doc = "Bits 4:7 - Channel 1 Input Filter"]
            #[inline(always)]
            pub fn ch1fval(&self) -> CH1FVALR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CH1FVALR { bits }
            }
            #[doc = "Bits 8:11 - Channel 2 Input Filter"]
            #[inline(always)]
            pub fn ch2fval(&self) -> CH2FVALR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CH2FVALR { bits }
            }
            #[doc = "Bits 12:15 - Channel 3 Input Filter"]
            #[inline(always)]
            pub fn ch3fval(&self) -> CH3FVALR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CH3FVALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Channel 0 Input Filter"]
            #[inline(always)]
            pub fn ch0fval(&mut self) -> _CH0FVALW {
                _CH0FVALW { w: self }
            }
            #[doc = "Bits 4:7 - Channel 1 Input Filter"]
            #[inline(always)]
            pub fn ch1fval(&mut self) -> _CH1FVALW {
                _CH1FVALW { w: self }
            }
            #[doc = "Bits 8:11 - Channel 2 Input Filter"]
            #[inline(always)]
            pub fn ch2fval(&mut self) -> _CH2FVALW {
                _CH2FVALW { w: self }
            }
            #[doc = "Bits 12:15 - Channel 3 Input Filter"]
            #[inline(always)]
            pub fn ch3fval(&mut self) -> _CH3FVALW {
                _CH3FVALW { w: self }
            }
        }
    }
    #[doc = "Fault Control"]
    pub struct FLTCTRL {
        register: VolatileCell<u32>,
    }
    #[doc = "Fault Control"]
    pub mod fltctrl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FLTCTRL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `FAULT0EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULT0ENR {
            #[doc = "Fault input is disabled."]
            _0,
            #[doc = "Fault input is enabled."]
            _1,
        }
        impl FAULT0ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULT0ENR::_0 => false,
                    FAULT0ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULT0ENR {
                match value {
                    false => FAULT0ENR::_0,
                    true => FAULT0ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULT0ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULT0ENR::_1
            }
        }
        #[doc = "Possible values of the field `FAULT1EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULT1ENR {
            #[doc = "Fault input is disabled."]
            _0,
            #[doc = "Fault input is enabled."]
            _1,
        }
        impl FAULT1ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULT1ENR::_0 => false,
                    FAULT1ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULT1ENR {
                match value {
                    false => FAULT1ENR::_0,
                    true => FAULT1ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULT1ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULT1ENR::_1
            }
        }
        #[doc = "Possible values of the field `FAULT2EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULT2ENR {
            #[doc = "Fault input is disabled."]
            _0,
            #[doc = "Fault input is enabled."]
            _1,
        }
        impl FAULT2ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULT2ENR::_0 => false,
                    FAULT2ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULT2ENR {
                match value {
                    false => FAULT2ENR::_0,
                    true => FAULT2ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULT2ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULT2ENR::_1
            }
        }
        #[doc = "Possible values of the field `FAULT3EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULT3ENR {
            #[doc = "Fault input is disabled."]
            _0,
            #[doc = "Fault input is enabled."]
            _1,
        }
        impl FAULT3ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULT3ENR::_0 => false,
                    FAULT3ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULT3ENR {
                match value {
                    false => FAULT3ENR::_0,
                    true => FAULT3ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULT3ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULT3ENR::_1
            }
        }
        #[doc = "Possible values of the field `FFLTR0EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FFLTR0ENR {
            #[doc = "Fault input filter is disabled."]
            _0,
            #[doc = "Fault input filter is enabled."]
            _1,
        }
        impl FFLTR0ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FFLTR0ENR::_0 => false,
                    FFLTR0ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FFLTR0ENR {
                match value {
                    false => FFLTR0ENR::_0,
                    true => FFLTR0ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FFLTR0ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FFLTR0ENR::_1
            }
        }
        #[doc = "Possible values of the field `FFLTR1EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FFLTR1ENR {
            #[doc = "Fault input filter is disabled."]
            _0,
            #[doc = "Fault input filter is enabled."]
            _1,
        }
        impl FFLTR1ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FFLTR1ENR::_0 => false,
                    FFLTR1ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FFLTR1ENR {
                match value {
                    false => FFLTR1ENR::_0,
                    true => FFLTR1ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FFLTR1ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FFLTR1ENR::_1
            }
        }
        #[doc = "Possible values of the field `FFLTR2EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FFLTR2ENR {
            #[doc = "Fault input filter is disabled."]
            _0,
            #[doc = "Fault input filter is enabled."]
            _1,
        }
        impl FFLTR2ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FFLTR2ENR::_0 => false,
                    FFLTR2ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FFLTR2ENR {
                match value {
                    false => FFLTR2ENR::_0,
                    true => FFLTR2ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FFLTR2ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FFLTR2ENR::_1
            }
        }
        #[doc = "Possible values of the field `FFLTR3EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FFLTR3ENR {
            #[doc = "Fault input filter is disabled."]
            _0,
            #[doc = "Fault input filter is enabled."]
            _1,
        }
        impl FFLTR3ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FFLTR3ENR::_0 => false,
                    FFLTR3ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FFLTR3ENR {
                match value {
                    false => FFLTR3ENR::_0,
                    true => FFLTR3ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FFLTR3ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FFLTR3ENR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct FFVALR {
            bits: u8,
        }
        impl FFVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `FSTATE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FSTATER {
            #[doc = "FTM outputs will be placed into safe values when fault events in ongoing (defined by POL bits)."]
            _0,
            #[doc = "FTM outputs will be tri-stated when fault event is ongoing"]
            _1,
        }
        impl FSTATER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FSTATER::_0 => false,
                    FSTATER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FSTATER {
                match value {
                    false => FSTATER::_0,
                    true => FSTATER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FSTATER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FSTATER::_1
            }
        }
        #[doc = "Values that can be written to the field `FAULT0EN`"]
        pub enum FAULT0ENW {
            #[doc = "Fault input is disabled."]
            _0,
            #[doc = "Fault input is enabled."]
            _1,
        }
        impl FAULT0ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FAULT0ENW::_0 => false,
                    FAULT0ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FAULT0ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FAULT0ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FAULT0ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Fault input is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FAULT0ENW::_0)
            }
            #[doc = "Fault input is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FAULT0ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FAULT1EN`"]
        pub enum FAULT1ENW {
            #[doc = "Fault input is disabled."]
            _0,
            #[doc = "Fault input is enabled."]
            _1,
        }
        impl FAULT1ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FAULT1ENW::_0 => false,
                    FAULT1ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FAULT1ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FAULT1ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FAULT1ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Fault input is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FAULT1ENW::_0)
            }
            #[doc = "Fault input is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FAULT1ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FAULT2EN`"]
        pub enum FAULT2ENW {
            #[doc = "Fault input is disabled."]
            _0,
            #[doc = "Fault input is enabled."]
            _1,
        }
        impl FAULT2ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FAULT2ENW::_0 => false,
                    FAULT2ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FAULT2ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FAULT2ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FAULT2ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Fault input is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FAULT2ENW::_0)
            }
            #[doc = "Fault input is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FAULT2ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FAULT3EN`"]
        pub enum FAULT3ENW {
            #[doc = "Fault input is disabled."]
            _0,
            #[doc = "Fault input is enabled."]
            _1,
        }
        impl FAULT3ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FAULT3ENW::_0 => false,
                    FAULT3ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FAULT3ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FAULT3ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FAULT3ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Fault input is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FAULT3ENW::_0)
            }
            #[doc = "Fault input is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FAULT3ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FFLTR0EN`"]
        pub enum FFLTR0ENW {
            #[doc = "Fault input filter is disabled."]
            _0,
            #[doc = "Fault input filter is enabled."]
            _1,
        }
        impl FFLTR0ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FFLTR0ENW::_0 => false,
                    FFLTR0ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FFLTR0ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FFLTR0ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FFLTR0ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Fault input filter is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FFLTR0ENW::_0)
            }
            #[doc = "Fault input filter is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FFLTR0ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FFLTR1EN`"]
        pub enum FFLTR1ENW {
            #[doc = "Fault input filter is disabled."]
            _0,
            #[doc = "Fault input filter is enabled."]
            _1,
        }
        impl FFLTR1ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FFLTR1ENW::_0 => false,
                    FFLTR1ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FFLTR1ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FFLTR1ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FFLTR1ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Fault input filter is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FFLTR1ENW::_0)
            }
            #[doc = "Fault input filter is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FFLTR1ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FFLTR2EN`"]
        pub enum FFLTR2ENW {
            #[doc = "Fault input filter is disabled."]
            _0,
            #[doc = "Fault input filter is enabled."]
            _1,
        }
        impl FFLTR2ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FFLTR2ENW::_0 => false,
                    FFLTR2ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FFLTR2ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FFLTR2ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FFLTR2ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Fault input filter is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FFLTR2ENW::_0)
            }
            #[doc = "Fault input filter is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FFLTR2ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FFLTR3EN`"]
        pub enum FFLTR3ENW {
            #[doc = "Fault input filter is disabled."]
            _0,
            #[doc = "Fault input filter is enabled."]
            _1,
        }
        impl FFLTR3ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FFLTR3ENW::_0 => false,
                    FFLTR3ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FFLTR3ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FFLTR3ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FFLTR3ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Fault input filter is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FFLTR3ENW::_0)
            }
            #[doc = "Fault input filter is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FFLTR3ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _FFVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FFVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FSTATE`"]
        pub enum FSTATEW {
            #[doc = "FTM outputs will be placed into safe values when fault events in ongoing (defined by POL bits)."]
            _0,
            #[doc = "FTM outputs will be tri-stated when fault event is ongoing"]
            _1,
        }
        impl FSTATEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FSTATEW::_0 => false,
                    FSTATEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FSTATEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FSTATEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FSTATEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM outputs will be placed into safe values when fault events in ongoing (defined by POL bits)."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FSTATEW::_0)
            }
            #[doc = "FTM outputs will be tri-stated when fault event is ongoing"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FSTATEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Fault Input 0 Enable"]
            #[inline(always)]
            pub fn fault0en(&self) -> FAULT0ENR {
                FAULT0ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Fault Input 1 Enable"]
            #[inline(always)]
            pub fn fault1en(&self) -> FAULT1ENR {
                FAULT1ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Fault Input 2 Enable"]
            #[inline(always)]
            pub fn fault2en(&self) -> FAULT2ENR {
                FAULT2ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Fault Input 3 Enable"]
            #[inline(always)]
            pub fn fault3en(&self) -> FAULT3ENR {
                FAULT3ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Fault Input 0 Filter Enable"]
            #[inline(always)]
            pub fn ffltr0en(&self) -> FFLTR0ENR {
                FFLTR0ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Fault Input 1 Filter Enable"]
            #[inline(always)]
            pub fn ffltr1en(&self) -> FFLTR1ENR {
                FFLTR1ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Fault Input 2 Filter Enable"]
            #[inline(always)]
            pub fn ffltr2en(&self) -> FFLTR2ENR {
                FFLTR2ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Fault Input 3 Filter Enable"]
            #[inline(always)]
            pub fn ffltr3en(&self) -> FFLTR3ENR {
                FFLTR3ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:11 - Fault Input Filter"]
            #[inline(always)]
            pub fn ffval(&self) -> FFVALR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                FFVALR { bits }
            }
            #[doc = "Bit 15 - Fault output state"]
            #[inline(always)]
            pub fn fstate(&self) -> FSTATER {
                FSTATER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Fault Input 0 Enable"]
            #[inline(always)]
            pub fn fault0en(&mut self) -> _FAULT0ENW {
                _FAULT0ENW { w: self }
            }
            #[doc = "Bit 1 - Fault Input 1 Enable"]
            #[inline(always)]
            pub fn fault1en(&mut self) -> _FAULT1ENW {
                _FAULT1ENW { w: self }
            }
            #[doc = "Bit 2 - Fault Input 2 Enable"]
            #[inline(always)]
            pub fn fault2en(&mut self) -> _FAULT2ENW {
                _FAULT2ENW { w: self }
            }
            #[doc = "Bit 3 - Fault Input 3 Enable"]
            #[inline(always)]
            pub fn fault3en(&mut self) -> _FAULT3ENW {
                _FAULT3ENW { w: self }
            }
            #[doc = "Bit 4 - Fault Input 0 Filter Enable"]
            #[inline(always)]
            pub fn ffltr0en(&mut self) -> _FFLTR0ENW {
                _FFLTR0ENW { w: self }
            }
            #[doc = "Bit 5 - Fault Input 1 Filter Enable"]
            #[inline(always)]
            pub fn ffltr1en(&mut self) -> _FFLTR1ENW {
                _FFLTR1ENW { w: self }
            }
            #[doc = "Bit 6 - Fault Input 2 Filter Enable"]
            #[inline(always)]
            pub fn ffltr2en(&mut self) -> _FFLTR2ENW {
                _FFLTR2ENW { w: self }
            }
            #[doc = "Bit 7 - Fault Input 3 Filter Enable"]
            #[inline(always)]
            pub fn ffltr3en(&mut self) -> _FFLTR3ENW {
                _FFLTR3ENW { w: self }
            }
            #[doc = "Bits 8:11 - Fault Input Filter"]
            #[inline(always)]
            pub fn ffval(&mut self) -> _FFVALW {
                _FFVALW { w: self }
            }
            #[doc = "Bit 15 - Fault output state"]
            #[inline(always)]
            pub fn fstate(&mut self) -> _FSTATEW {
                _FSTATEW { w: self }
            }
        }
    }
    #[doc = "Quadrature Decoder Control And Status"]
    pub struct QDCTRL {
        register: VolatileCell<u32>,
    }
    #[doc = "Quadrature Decoder Control And Status"]
    pub mod qdctrl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::QDCTRL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `QUADEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum QUADENR {
            #[doc = "Quadrature Decoder mode is disabled."]
            _0,
            #[doc = "Quadrature Decoder mode is enabled."]
            _1,
        }
        impl QUADENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    QUADENR::_0 => false,
                    QUADENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> QUADENR {
                match value {
                    false => QUADENR::_0,
                    true => QUADENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == QUADENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == QUADENR::_1
            }
        }
        #[doc = "Possible values of the field `TOFDIR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TOFDIRR {
            #[doc = "TOF bit was set on the bottom of counting. There was an FTM counter decrement and FTM counter changes from its minimum value (CNTIN register) to its maximum value (MOD register)."]
            _0,
            #[doc = "TOF bit was set on the top of counting. There was an FTM counter increment and FTM counter changes from its maximum value (MOD register) to its minimum value (CNTIN register)."]
            _1,
        }
        impl TOFDIRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TOFDIRR::_0 => false,
                    TOFDIRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TOFDIRR {
                match value {
                    false => TOFDIRR::_0,
                    true => TOFDIRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TOFDIRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TOFDIRR::_1
            }
        }
        #[doc = "Possible values of the field `QUADIR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum QUADIRR {
            #[doc = "Counting direction is decreasing (FTM counter decrement)."]
            _0,
            #[doc = "Counting direction is increasing (FTM counter increment)."]
            _1,
        }
        impl QUADIRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    QUADIRR::_0 => false,
                    QUADIRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> QUADIRR {
                match value {
                    false => QUADIRR::_0,
                    true => QUADIRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == QUADIRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == QUADIRR::_1
            }
        }
        #[doc = "Possible values of the field `QUADMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum QUADMODER {
            #[doc = "Phase A and phase B encoding mode."]
            _0,
            #[doc = "Count and direction encoding mode."]
            _1,
        }
        impl QUADMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    QUADMODER::_0 => false,
                    QUADMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> QUADMODER {
                match value {
                    false => QUADMODER::_0,
                    true => QUADMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == QUADMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == QUADMODER::_1
            }
        }
        #[doc = "Possible values of the field `PHBPOL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PHBPOLR {
            #[doc = "Normal polarity. Phase B input signal is not inverted before identifying the rising and falling edges of this signal."]
            _0,
            #[doc = "Inverted polarity. Phase B input signal is inverted before identifying the rising and falling edges of this signal."]
            _1,
        }
        impl PHBPOLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PHBPOLR::_0 => false,
                    PHBPOLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PHBPOLR {
                match value {
                    false => PHBPOLR::_0,
                    true => PHBPOLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PHBPOLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PHBPOLR::_1
            }
        }
        #[doc = "Possible values of the field `PHAPOL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PHAPOLR {
            #[doc = "Normal polarity. Phase A input signal is not inverted before identifying the rising and falling edges of this signal."]
            _0,
            #[doc = "Inverted polarity. Phase A input signal is inverted before identifying the rising and falling edges of this signal."]
            _1,
        }
        impl PHAPOLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PHAPOLR::_0 => false,
                    PHAPOLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PHAPOLR {
                match value {
                    false => PHAPOLR::_0,
                    true => PHAPOLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PHAPOLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PHAPOLR::_1
            }
        }
        #[doc = "Possible values of the field `PHBFLTREN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PHBFLTRENR {
            #[doc = "Phase B input filter is disabled."]
            _0,
            #[doc = "Phase B input filter is enabled."]
            _1,
        }
        impl PHBFLTRENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PHBFLTRENR::_0 => false,
                    PHBFLTRENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PHBFLTRENR {
                match value {
                    false => PHBFLTRENR::_0,
                    true => PHBFLTRENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PHBFLTRENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PHBFLTRENR::_1
            }
        }
        #[doc = "Possible values of the field `PHAFLTREN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PHAFLTRENR {
            #[doc = "Phase A input filter is disabled."]
            _0,
            #[doc = "Phase A input filter is enabled."]
            _1,
        }
        impl PHAFLTRENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PHAFLTRENR::_0 => false,
                    PHAFLTRENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PHAFLTRENR {
                match value {
                    false => PHAFLTRENR::_0,
                    true => PHAFLTRENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PHAFLTRENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PHAFLTRENR::_1
            }
        }
        #[doc = "Values that can be written to the field `QUADEN`"]
        pub enum QUADENW {
            #[doc = "Quadrature Decoder mode is disabled."]
            _0,
            #[doc = "Quadrature Decoder mode is enabled."]
            _1,
        }
        impl QUADENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    QUADENW::_0 => false,
                    QUADENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _QUADENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _QUADENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: QUADENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Quadrature Decoder mode is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(QUADENW::_0)
            }
            #[doc = "Quadrature Decoder mode is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(QUADENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `QUADMODE`"]
        pub enum QUADMODEW {
            #[doc = "Phase A and phase B encoding mode."]
            _0,
            #[doc = "Count and direction encoding mode."]
            _1,
        }
        impl QUADMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    QUADMODEW::_0 => false,
                    QUADMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _QUADMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _QUADMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: QUADMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Phase A and phase B encoding mode."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(QUADMODEW::_0)
            }
            #[doc = "Count and direction encoding mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(QUADMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PHBPOL`"]
        pub enum PHBPOLW {
            #[doc = "Normal polarity. Phase B input signal is not inverted before identifying the rising and falling edges of this signal."]
            _0,
            #[doc = "Inverted polarity. Phase B input signal is inverted before identifying the rising and falling edges of this signal."]
            _1,
        }
        impl PHBPOLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PHBPOLW::_0 => false,
                    PHBPOLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PHBPOLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PHBPOLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PHBPOLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Normal polarity. Phase B input signal is not inverted before identifying the rising and falling edges of this signal."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PHBPOLW::_0)
            }
            #[doc = "Inverted polarity. Phase B input signal is inverted before identifying the rising and falling edges of this signal."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PHBPOLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PHAPOL`"]
        pub enum PHAPOLW {
            #[doc = "Normal polarity. Phase A input signal is not inverted before identifying the rising and falling edges of this signal."]
            _0,
            #[doc = "Inverted polarity. Phase A input signal is inverted before identifying the rising and falling edges of this signal."]
            _1,
        }
        impl PHAPOLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PHAPOLW::_0 => false,
                    PHAPOLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PHAPOLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PHAPOLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PHAPOLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Normal polarity. Phase A input signal is not inverted before identifying the rising and falling edges of this signal."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PHAPOLW::_0)
            }
            #[doc = "Inverted polarity. Phase A input signal is inverted before identifying the rising and falling edges of this signal."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PHAPOLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PHBFLTREN`"]
        pub enum PHBFLTRENW {
            #[doc = "Phase B input filter is disabled."]
            _0,
            #[doc = "Phase B input filter is enabled."]
            _1,
        }
        impl PHBFLTRENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PHBFLTRENW::_0 => false,
                    PHBFLTRENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PHBFLTRENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PHBFLTRENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PHBFLTRENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Phase B input filter is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PHBFLTRENW::_0)
            }
            #[doc = "Phase B input filter is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PHBFLTRENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PHAFLTREN`"]
        pub enum PHAFLTRENW {
            #[doc = "Phase A input filter is disabled."]
            _0,
            #[doc = "Phase A input filter is enabled."]
            _1,
        }
        impl PHAFLTRENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PHAFLTRENW::_0 => false,
                    PHAFLTRENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PHAFLTRENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PHAFLTRENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PHAFLTRENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Phase A input filter is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PHAFLTRENW::_0)
            }
            #[doc = "Phase A input filter is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PHAFLTRENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Quadrature Decoder Mode Enable"]
            #[inline(always)]
            pub fn quaden(&self) -> QUADENR {
                QUADENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Timer Overflow Direction In Quadrature Decoder Mode"]
            #[inline(always)]
            pub fn tofdir(&self) -> TOFDIRR {
                TOFDIRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - FTM Counter Direction In Quadrature Decoder Mode"]
            #[inline(always)]
            pub fn quadir(&self) -> QUADIRR {
                QUADIRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Quadrature Decoder Mode"]
            #[inline(always)]
            pub fn quadmode(&self) -> QUADMODER {
                QUADMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Phase B Input Polarity"]
            #[inline(always)]
            pub fn phbpol(&self) -> PHBPOLR {
                PHBPOLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Phase A Input Polarity"]
            #[inline(always)]
            pub fn phapol(&self) -> PHAPOLR {
                PHAPOLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Phase B Input Filter Enable"]
            #[inline(always)]
            pub fn phbfltren(&self) -> PHBFLTRENR {
                PHBFLTRENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Phase A Input Filter Enable"]
            #[inline(always)]
            pub fn phafltren(&self) -> PHAFLTRENR {
                PHAFLTRENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Quadrature Decoder Mode Enable"]
            #[inline(always)]
            pub fn quaden(&mut self) -> _QUADENW {
                _QUADENW { w: self }
            }
            #[doc = "Bit 3 - Quadrature Decoder Mode"]
            #[inline(always)]
            pub fn quadmode(&mut self) -> _QUADMODEW {
                _QUADMODEW { w: self }
            }
            #[doc = "Bit 4 - Phase B Input Polarity"]
            #[inline(always)]
            pub fn phbpol(&mut self) -> _PHBPOLW {
                _PHBPOLW { w: self }
            }
            #[doc = "Bit 5 - Phase A Input Polarity"]
            #[inline(always)]
            pub fn phapol(&mut self) -> _PHAPOLW {
                _PHAPOLW { w: self }
            }
            #[doc = "Bit 6 - Phase B Input Filter Enable"]
            #[inline(always)]
            pub fn phbfltren(&mut self) -> _PHBFLTRENW {
                _PHBFLTRENW { w: self }
            }
            #[doc = "Bit 7 - Phase A Input Filter Enable"]
            #[inline(always)]
            pub fn phafltren(&mut self) -> _PHAFLTRENW {
                _PHAFLTRENW { w: self }
            }
        }
    }
    #[doc = "Configuration"]
    pub struct CONF {
        register: VolatileCell<u32>,
    }
    #[doc = "Configuration"]
    pub mod conf {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CONF {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct LDFQR {
            bits: u8,
        }
        impl LDFQR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BDMMODER {
            bits: u8,
        }
        impl BDMMODER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct GTBEENR {
            bits: bool,
        }
        impl GTBEENR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct GTBEOUTR {
            bits: bool,
        }
        impl GTBEOUTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `ITRIGR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ITRIGRR {
            #[doc = "Initialization trigger is generated on counter wrap events."]
            _0,
            #[doc = "Initialization trigger is generated when a reload point is reached."]
            _1,
        }
        impl ITRIGRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ITRIGRR::_0 => false,
                    ITRIGRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ITRIGRR {
                match value {
                    false => ITRIGRR::_0,
                    true => ITRIGRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ITRIGRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ITRIGRR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _LDFQW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LDFQW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BDMMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BDMMODEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _GTBEENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GTBEENW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _GTBEOUTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GTBEOUTW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ITRIGR`"]
        pub enum ITRIGRW {
            #[doc = "Initialization trigger is generated on counter wrap events."]
            _0,
            #[doc = "Initialization trigger is generated when a reload point is reached."]
            _1,
        }
        impl ITRIGRW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ITRIGRW::_0 => false,
                    ITRIGRW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ITRIGRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ITRIGRW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ITRIGRW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Initialization trigger is generated on counter wrap events."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ITRIGRW::_0)
            }
            #[doc = "Initialization trigger is generated when a reload point is reached."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ITRIGRW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:4 - Frequency of the Reload Opportunities"]
            #[inline(always)]
            pub fn ldfq(&self) -> LDFQR {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                LDFQR { bits }
            }
            #[doc = "Bits 6:7 - Debug Mode"]
            #[inline(always)]
            pub fn bdmmode(&self) -> BDMMODER {
                let bits = {
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BDMMODER { bits }
            }
            #[doc = "Bit 9 - Global Time Base Enable"]
            #[inline(always)]
            pub fn gtbeen(&self) -> GTBEENR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                GTBEENR { bits }
            }
            #[doc = "Bit 10 - Global Time Base Output"]
            #[inline(always)]
            pub fn gtbeout(&self) -> GTBEOUTR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                GTBEOUTR { bits }
            }
            #[doc = "Bit 11 - Initialization trigger on Reload Point"]
            #[inline(always)]
            pub fn itrigr(&self) -> ITRIGRR {
                ITRIGRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:4 - Frequency of the Reload Opportunities"]
            #[inline(always)]
            pub fn ldfq(&mut self) -> _LDFQW {
                _LDFQW { w: self }
            }
            #[doc = "Bits 6:7 - Debug Mode"]
            #[inline(always)]
            pub fn bdmmode(&mut self) -> _BDMMODEW {
                _BDMMODEW { w: self }
            }
            #[doc = "Bit 9 - Global Time Base Enable"]
            #[inline(always)]
            pub fn gtbeen(&mut self) -> _GTBEENW {
                _GTBEENW { w: self }
            }
            #[doc = "Bit 10 - Global Time Base Output"]
            #[inline(always)]
            pub fn gtbeout(&mut self) -> _GTBEOUTW {
                _GTBEOUTW { w: self }
            }
            #[doc = "Bit 11 - Initialization trigger on Reload Point"]
            #[inline(always)]
            pub fn itrigr(&mut self) -> _ITRIGRW {
                _ITRIGRW { w: self }
            }
        }
    }
    #[doc = "FTM Fault Input Polarity"]
    pub struct FLTPOL {
        register: VolatileCell<u32>,
    }
    #[doc = "FTM Fault Input Polarity"]
    pub mod fltpol {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FLTPOL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `FLT0POL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FLT0POLR {
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            _0,
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            _1,
        }
        impl FLT0POLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FLT0POLR::_0 => false,
                    FLT0POLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FLT0POLR {
                match value {
                    false => FLT0POLR::_0,
                    true => FLT0POLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FLT0POLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FLT0POLR::_1
            }
        }
        #[doc = "Possible values of the field `FLT1POL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FLT1POLR {
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            _0,
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            _1,
        }
        impl FLT1POLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FLT1POLR::_0 => false,
                    FLT1POLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FLT1POLR {
                match value {
                    false => FLT1POLR::_0,
                    true => FLT1POLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FLT1POLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FLT1POLR::_1
            }
        }
        #[doc = "Possible values of the field `FLT2POL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FLT2POLR {
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            _0,
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            _1,
        }
        impl FLT2POLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FLT2POLR::_0 => false,
                    FLT2POLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FLT2POLR {
                match value {
                    false => FLT2POLR::_0,
                    true => FLT2POLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FLT2POLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FLT2POLR::_1
            }
        }
        #[doc = "Possible values of the field `FLT3POL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FLT3POLR {
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            _0,
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            _1,
        }
        impl FLT3POLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FLT3POLR::_0 => false,
                    FLT3POLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FLT3POLR {
                match value {
                    false => FLT3POLR::_0,
                    true => FLT3POLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FLT3POLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FLT3POLR::_1
            }
        }
        #[doc = "Values that can be written to the field `FLT0POL`"]
        pub enum FLT0POLW {
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            _0,
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            _1,
        }
        impl FLT0POLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FLT0POLW::_0 => false,
                    FLT0POLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FLT0POLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FLT0POLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FLT0POLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FLT0POLW::_0)
            }
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FLT0POLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FLT1POL`"]
        pub enum FLT1POLW {
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            _0,
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            _1,
        }
        impl FLT1POLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FLT1POLW::_0 => false,
                    FLT1POLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FLT1POLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FLT1POLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FLT1POLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FLT1POLW::_0)
            }
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FLT1POLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FLT2POL`"]
        pub enum FLT2POLW {
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            _0,
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            _1,
        }
        impl FLT2POLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FLT2POLW::_0 => false,
                    FLT2POLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FLT2POLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FLT2POLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FLT2POLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FLT2POLW::_0)
            }
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FLT2POLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FLT3POL`"]
        pub enum FLT3POLW {
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            _0,
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            _1,
        }
        impl FLT3POLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FLT3POLW::_0 => false,
                    FLT3POLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FLT3POLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FLT3POLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FLT3POLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FLT3POLW::_0)
            }
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FLT3POLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Fault Input 0 Polarity"]
            #[inline(always)]
            pub fn flt0pol(&self) -> FLT0POLR {
                FLT0POLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Fault Input 1 Polarity"]
            #[inline(always)]
            pub fn flt1pol(&self) -> FLT1POLR {
                FLT1POLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Fault Input 2 Polarity"]
            #[inline(always)]
            pub fn flt2pol(&self) -> FLT2POLR {
                FLT2POLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Fault Input 3 Polarity"]
            #[inline(always)]
            pub fn flt3pol(&self) -> FLT3POLR {
                FLT3POLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Fault Input 0 Polarity"]
            #[inline(always)]
            pub fn flt0pol(&mut self) -> _FLT0POLW {
                _FLT0POLW { w: self }
            }
            #[doc = "Bit 1 - Fault Input 1 Polarity"]
            #[inline(always)]
            pub fn flt1pol(&mut self) -> _FLT1POLW {
                _FLT1POLW { w: self }
            }
            #[doc = "Bit 2 - Fault Input 2 Polarity"]
            #[inline(always)]
            pub fn flt2pol(&mut self) -> _FLT2POLW {
                _FLT2POLW { w: self }
            }
            #[doc = "Bit 3 - Fault Input 3 Polarity"]
            #[inline(always)]
            pub fn flt3pol(&mut self) -> _FLT3POLW {
                _FLT3POLW { w: self }
            }
        }
    }
    #[doc = "Synchronization Configuration"]
    pub struct SYNCONF {
        register: VolatileCell<u32>,
    }
    #[doc = "Synchronization Configuration"]
    pub mod synconf {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SYNCONF {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `HWTRIGMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HWTRIGMODER {
            #[doc = "FTM clears the TRIGj bit when the hardware trigger j is detected, where j = 0, 1,2."]
            _0,
            #[doc = "FTM does not clear the TRIGj bit when the hardware trigger j is detected, where j = 0, 1,2."]
            _1,
        }
        impl HWTRIGMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HWTRIGMODER::_0 => false,
                    HWTRIGMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HWTRIGMODER {
                match value {
                    false => HWTRIGMODER::_0,
                    true => HWTRIGMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HWTRIGMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HWTRIGMODER::_1
            }
        }
        #[doc = "Possible values of the field `CNTINC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CNTINCR {
            #[doc = "CNTIN register is updated with its buffer value at all rising edges of FTM input clock."]
            _0,
            #[doc = "CNTIN register is updated with its buffer value by the PWM synchronization."]
            _1,
        }
        impl CNTINCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CNTINCR::_0 => false,
                    CNTINCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CNTINCR {
                match value {
                    false => CNTINCR::_0,
                    true => CNTINCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CNTINCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CNTINCR::_1
            }
        }
        #[doc = "Possible values of the field `INVC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INVCR {
            #[doc = "INVCTRL register is updated with its buffer value at all rising edges of FTM input clock."]
            _0,
            #[doc = "INVCTRL register is updated with its buffer value by the PWM synchronization."]
            _1,
        }
        impl INVCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INVCR::_0 => false,
                    INVCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INVCR {
                match value {
                    false => INVCR::_0,
                    true => INVCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INVCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INVCR::_1
            }
        }
        #[doc = "Possible values of the field `SWOC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SWOCR {
            #[doc = "SWOCTRL register is updated with its buffer value at all rising edges of FTM input clock."]
            _0,
            #[doc = "SWOCTRL register is updated with its buffer value by the PWM synchronization."]
            _1,
        }
        impl SWOCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SWOCR::_0 => false,
                    SWOCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SWOCR {
                match value {
                    false => SWOCR::_0,
                    true => SWOCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SWOCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SWOCR::_1
            }
        }
        #[doc = "Possible values of the field `SYNCMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SYNCMODER {
            #[doc = "Legacy PWM synchronization is selected."]
            _0,
            #[doc = "Enhanced PWM synchronization is selected."]
            _1,
        }
        impl SYNCMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SYNCMODER::_0 => false,
                    SYNCMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SYNCMODER {
                match value {
                    false => SYNCMODER::_0,
                    true => SYNCMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SYNCMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SYNCMODER::_1
            }
        }
        #[doc = "Possible values of the field `SWRSTCNT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SWRSTCNTR {
            #[doc = "The software trigger does not activate the FTM counter synchronization."]
            _0,
            #[doc = "The software trigger activates the FTM counter synchronization."]
            _1,
        }
        impl SWRSTCNTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SWRSTCNTR::_0 => false,
                    SWRSTCNTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SWRSTCNTR {
                match value {
                    false => SWRSTCNTR::_0,
                    true => SWRSTCNTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SWRSTCNTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SWRSTCNTR::_1
            }
        }
        #[doc = "Possible values of the field `SWWRBUF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SWWRBUFR {
            #[doc = "The software trigger does not activate MOD, HCR, CNTIN, and CV registers synchronization."]
            _0,
            #[doc = "The software trigger activates MOD, HCR, CNTIN, and CV registers synchronization."]
            _1,
        }
        impl SWWRBUFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SWWRBUFR::_0 => false,
                    SWWRBUFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SWWRBUFR {
                match value {
                    false => SWWRBUFR::_0,
                    true => SWWRBUFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SWWRBUFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SWWRBUFR::_1
            }
        }
        #[doc = "Possible values of the field `SWOM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SWOMR {
            #[doc = "The software trigger does not activate the OUTMASK register synchronization."]
            _0,
            #[doc = "The software trigger activates the OUTMASK register synchronization."]
            _1,
        }
        impl SWOMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SWOMR::_0 => false,
                    SWOMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SWOMR {
                match value {
                    false => SWOMR::_0,
                    true => SWOMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SWOMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SWOMR::_1
            }
        }
        #[doc = "Possible values of the field `SWINVC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SWINVCR {
            #[doc = "The software trigger does not activate the INVCTRL register synchronization."]
            _0,
            #[doc = "The software trigger activates the INVCTRL register synchronization."]
            _1,
        }
        impl SWINVCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SWINVCR::_0 => false,
                    SWINVCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SWINVCR {
                match value {
                    false => SWINVCR::_0,
                    true => SWINVCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SWINVCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SWINVCR::_1
            }
        }
        #[doc = "Possible values of the field `SWSOC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SWSOCR {
            #[doc = "The software trigger does not activate the SWOCTRL register synchronization."]
            _0,
            #[doc = "The software trigger activates the SWOCTRL register synchronization."]
            _1,
        }
        impl SWSOCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SWSOCR::_0 => false,
                    SWSOCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SWSOCR {
                match value {
                    false => SWSOCR::_0,
                    true => SWSOCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SWSOCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SWSOCR::_1
            }
        }
        #[doc = "Possible values of the field `HWRSTCNT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HWRSTCNTR {
            #[doc = "A hardware trigger does not activate the FTM counter synchronization."]
            _0,
            #[doc = "A hardware trigger activates the FTM counter synchronization."]
            _1,
        }
        impl HWRSTCNTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HWRSTCNTR::_0 => false,
                    HWRSTCNTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HWRSTCNTR {
                match value {
                    false => HWRSTCNTR::_0,
                    true => HWRSTCNTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HWRSTCNTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HWRSTCNTR::_1
            }
        }
        #[doc = "Possible values of the field `HWWRBUF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HWWRBUFR {
            #[doc = "A hardware trigger does not activate MOD, HCR, CNTIN, and CV registers synchronization."]
            _0,
            #[doc = "A hardware trigger activates MOD, HCR, CNTIN, and CV registers synchronization."]
            _1,
        }
        impl HWWRBUFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HWWRBUFR::_0 => false,
                    HWWRBUFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HWWRBUFR {
                match value {
                    false => HWWRBUFR::_0,
                    true => HWWRBUFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HWWRBUFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HWWRBUFR::_1
            }
        }
        #[doc = "Possible values of the field `HWOM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HWOMR {
            #[doc = "A hardware trigger does not activate the OUTMASK register synchronization."]
            _0,
            #[doc = "A hardware trigger activates the OUTMASK register synchronization."]
            _1,
        }
        impl HWOMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HWOMR::_0 => false,
                    HWOMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HWOMR {
                match value {
                    false => HWOMR::_0,
                    true => HWOMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HWOMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HWOMR::_1
            }
        }
        #[doc = "Possible values of the field `HWINVC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HWINVCR {
            #[doc = "A hardware trigger does not activate the INVCTRL register synchronization."]
            _0,
            #[doc = "A hardware trigger activates the INVCTRL register synchronization."]
            _1,
        }
        impl HWINVCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HWINVCR::_0 => false,
                    HWINVCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HWINVCR {
                match value {
                    false => HWINVCR::_0,
                    true => HWINVCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HWINVCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HWINVCR::_1
            }
        }
        #[doc = "Possible values of the field `HWSOC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HWSOCR {
            #[doc = "A hardware trigger does not activate the SWOCTRL register synchronization."]
            _0,
            #[doc = "A hardware trigger activates the SWOCTRL register synchronization."]
            _1,
        }
        impl HWSOCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HWSOCR::_0 => false,
                    HWSOCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HWSOCR {
                match value {
                    false => HWSOCR::_0,
                    true => HWSOCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HWSOCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HWSOCR::_1
            }
        }
        #[doc = "Values that can be written to the field `HWTRIGMODE`"]
        pub enum HWTRIGMODEW {
            #[doc = "FTM clears the TRIGj bit when the hardware trigger j is detected, where j = 0, 1,2."]
            _0,
            #[doc = "FTM does not clear the TRIGj bit when the hardware trigger j is detected, where j = 0, 1,2."]
            _1,
        }
        impl HWTRIGMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HWTRIGMODEW::_0 => false,
                    HWTRIGMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HWTRIGMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HWTRIGMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HWTRIGMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM clears the TRIGj bit when the hardware trigger j is detected, where j = 0, 1,2."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HWTRIGMODEW::_0)
            }
            #[doc = "FTM does not clear the TRIGj bit when the hardware trigger j is detected, where j = 0, 1,2."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HWTRIGMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CNTINC`"]
        pub enum CNTINCW {
            #[doc = "CNTIN register is updated with its buffer value at all rising edges of FTM input clock."]
            _0,
            #[doc = "CNTIN register is updated with its buffer value by the PWM synchronization."]
            _1,
        }
        impl CNTINCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CNTINCW::_0 => false,
                    CNTINCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CNTINCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CNTINCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CNTINCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "CNTIN register is updated with its buffer value at all rising edges of FTM input clock."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CNTINCW::_0)
            }
            #[doc = "CNTIN register is updated with its buffer value by the PWM synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CNTINCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INVC`"]
        pub enum INVCW {
            #[doc = "INVCTRL register is updated with its buffer value at all rising edges of FTM input clock."]
            _0,
            #[doc = "INVCTRL register is updated with its buffer value by the PWM synchronization."]
            _1,
        }
        impl INVCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INVCW::_0 => false,
                    INVCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INVCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INVCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INVCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "INVCTRL register is updated with its buffer value at all rising edges of FTM input clock."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INVCW::_0)
            }
            #[doc = "INVCTRL register is updated with its buffer value by the PWM synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INVCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SWOC`"]
        pub enum SWOCW {
            #[doc = "SWOCTRL register is updated with its buffer value at all rising edges of FTM input clock."]
            _0,
            #[doc = "SWOCTRL register is updated with its buffer value by the PWM synchronization."]
            _1,
        }
        impl SWOCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SWOCW::_0 => false,
                    SWOCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SWOCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SWOCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SWOCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "SWOCTRL register is updated with its buffer value at all rising edges of FTM input clock."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SWOCW::_0)
            }
            #[doc = "SWOCTRL register is updated with its buffer value by the PWM synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SWOCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SYNCMODE`"]
        pub enum SYNCMODEW {
            #[doc = "Legacy PWM synchronization is selected."]
            _0,
            #[doc = "Enhanced PWM synchronization is selected."]
            _1,
        }
        impl SYNCMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SYNCMODEW::_0 => false,
                    SYNCMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SYNCMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SYNCMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SYNCMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Legacy PWM synchronization is selected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SYNCMODEW::_0)
            }
            #[doc = "Enhanced PWM synchronization is selected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SYNCMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SWRSTCNT`"]
        pub enum SWRSTCNTW {
            #[doc = "The software trigger does not activate the FTM counter synchronization."]
            _0,
            #[doc = "The software trigger activates the FTM counter synchronization."]
            _1,
        }
        impl SWRSTCNTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SWRSTCNTW::_0 => false,
                    SWRSTCNTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SWRSTCNTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SWRSTCNTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SWRSTCNTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software trigger does not activate the FTM counter synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SWRSTCNTW::_0)
            }
            #[doc = "The software trigger activates the FTM counter synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SWRSTCNTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SWWRBUF`"]
        pub enum SWWRBUFW {
            #[doc = "The software trigger does not activate MOD, HCR, CNTIN, and CV registers synchronization."]
            _0,
            #[doc = "The software trigger activates MOD, HCR, CNTIN, and CV registers synchronization."]
            _1,
        }
        impl SWWRBUFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SWWRBUFW::_0 => false,
                    SWWRBUFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SWWRBUFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SWWRBUFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SWWRBUFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software trigger does not activate MOD, HCR, CNTIN, and CV registers synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SWWRBUFW::_0)
            }
            #[doc = "The software trigger activates MOD, HCR, CNTIN, and CV registers synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SWWRBUFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SWOM`"]
        pub enum SWOMW {
            #[doc = "The software trigger does not activate the OUTMASK register synchronization."]
            _0,
            #[doc = "The software trigger activates the OUTMASK register synchronization."]
            _1,
        }
        impl SWOMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SWOMW::_0 => false,
                    SWOMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SWOMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SWOMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SWOMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software trigger does not activate the OUTMASK register synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SWOMW::_0)
            }
            #[doc = "The software trigger activates the OUTMASK register synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SWOMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SWINVC`"]
        pub enum SWINVCW {
            #[doc = "The software trigger does not activate the INVCTRL register synchronization."]
            _0,
            #[doc = "The software trigger activates the INVCTRL register synchronization."]
            _1,
        }
        impl SWINVCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SWINVCW::_0 => false,
                    SWINVCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SWINVCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SWINVCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SWINVCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software trigger does not activate the INVCTRL register synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SWINVCW::_0)
            }
            #[doc = "The software trigger activates the INVCTRL register synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SWINVCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SWSOC`"]
        pub enum SWSOCW {
            #[doc = "The software trigger does not activate the SWOCTRL register synchronization."]
            _0,
            #[doc = "The software trigger activates the SWOCTRL register synchronization."]
            _1,
        }
        impl SWSOCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SWSOCW::_0 => false,
                    SWSOCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SWSOCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SWSOCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SWSOCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software trigger does not activate the SWOCTRL register synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SWSOCW::_0)
            }
            #[doc = "The software trigger activates the SWOCTRL register synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SWSOCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `HWRSTCNT`"]
        pub enum HWRSTCNTW {
            #[doc = "A hardware trigger does not activate the FTM counter synchronization."]
            _0,
            #[doc = "A hardware trigger activates the FTM counter synchronization."]
            _1,
        }
        impl HWRSTCNTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HWRSTCNTW::_0 => false,
                    HWRSTCNTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HWRSTCNTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HWRSTCNTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HWRSTCNTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "A hardware trigger does not activate the FTM counter synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HWRSTCNTW::_0)
            }
            #[doc = "A hardware trigger activates the FTM counter synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HWRSTCNTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `HWWRBUF`"]
        pub enum HWWRBUFW {
            #[doc = "A hardware trigger does not activate MOD, HCR, CNTIN, and CV registers synchronization."]
            _0,
            #[doc = "A hardware trigger activates MOD, HCR, CNTIN, and CV registers synchronization."]
            _1,
        }
        impl HWWRBUFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HWWRBUFW::_0 => false,
                    HWWRBUFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HWWRBUFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HWWRBUFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HWWRBUFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "A hardware trigger does not activate MOD, HCR, CNTIN, and CV registers synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HWWRBUFW::_0)
            }
            #[doc = "A hardware trigger activates MOD, HCR, CNTIN, and CV registers synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HWWRBUFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `HWOM`"]
        pub enum HWOMW {
            #[doc = "A hardware trigger does not activate the OUTMASK register synchronization."]
            _0,
            #[doc = "A hardware trigger activates the OUTMASK register synchronization."]
            _1,
        }
        impl HWOMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HWOMW::_0 => false,
                    HWOMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HWOMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HWOMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HWOMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "A hardware trigger does not activate the OUTMASK register synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HWOMW::_0)
            }
            #[doc = "A hardware trigger activates the OUTMASK register synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HWOMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `HWINVC`"]
        pub enum HWINVCW {
            #[doc = "A hardware trigger does not activate the INVCTRL register synchronization."]
            _0,
            #[doc = "A hardware trigger activates the INVCTRL register synchronization."]
            _1,
        }
        impl HWINVCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HWINVCW::_0 => false,
                    HWINVCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HWINVCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HWINVCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HWINVCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "A hardware trigger does not activate the INVCTRL register synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HWINVCW::_0)
            }
            #[doc = "A hardware trigger activates the INVCTRL register synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HWINVCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 19;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `HWSOC`"]
        pub enum HWSOCW {
            #[doc = "A hardware trigger does not activate the SWOCTRL register synchronization."]
            _0,
            #[doc = "A hardware trigger activates the SWOCTRL register synchronization."]
            _1,
        }
        impl HWSOCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HWSOCW::_0 => false,
                    HWSOCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HWSOCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HWSOCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HWSOCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "A hardware trigger does not activate the SWOCTRL register synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HWSOCW::_0)
            }
            #[doc = "A hardware trigger activates the SWOCTRL register synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HWSOCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Hardware Trigger Mode"]
            #[inline(always)]
            pub fn hwtrigmode(&self) -> HWTRIGMODER {
                HWTRIGMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - CNTIN Register Synchronization"]
            #[inline(always)]
            pub fn cntinc(&self) -> CNTINCR {
                CNTINCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - INVCTRL Register Synchronization"]
            #[inline(always)]
            pub fn invc(&self) -> INVCR {
                INVCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - SWOCTRL Register Synchronization"]
            #[inline(always)]
            pub fn swoc(&self) -> SWOCR {
                SWOCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Synchronization Mode"]
            #[inline(always)]
            pub fn syncmode(&self) -> SYNCMODER {
                SYNCMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - FTM counter synchronization is activated by the software trigger"]
            #[inline(always)]
            pub fn swrstcnt(&self) -> SWRSTCNTR {
                SWRSTCNTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - MOD, HCR, CNTIN, and CV registers synchronization is activated by the software trigger"]
            #[inline(always)]
            pub fn swwrbuf(&self) -> SWWRBUFR {
                SWWRBUFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Output mask synchronization is activated by the software trigger"]
            #[inline(always)]
            pub fn swom(&self) -> SWOMR {
                SWOMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 11 - Inverting control synchronization is activated by the software trigger"]
            #[inline(always)]
            pub fn swinvc(&self) -> SWINVCR {
                SWINVCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Software output control synchronization is activated by the software trigger"]
            #[inline(always)]
            pub fn swsoc(&self) -> SWSOCR {
                SWSOCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 16 - FTM counter synchronization is activated by a hardware trigger"]
            #[inline(always)]
            pub fn hwrstcnt(&self) -> HWRSTCNTR {
                HWRSTCNTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - MOD, HCR, CNTIN, and CV registers synchronization is activated by a hardware trigger"]
            #[inline(always)]
            pub fn hwwrbuf(&self) -> HWWRBUFR {
                HWWRBUFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 18 - Output mask synchronization is activated by a hardware trigger"]
            #[inline(always)]
            pub fn hwom(&self) -> HWOMR {
                HWOMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 19 - Inverting control synchronization is activated by a hardware trigger"]
            #[inline(always)]
            pub fn hwinvc(&self) -> HWINVCR {
                HWINVCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 19;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 20 - Software output control synchronization is activated by a hardware trigger"]
            #[inline(always)]
            pub fn hwsoc(&self) -> HWSOCR {
                HWSOCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Hardware Trigger Mode"]
            #[inline(always)]
            pub fn hwtrigmode(&mut self) -> _HWTRIGMODEW {
                _HWTRIGMODEW { w: self }
            }
            #[doc = "Bit 2 - CNTIN Register Synchronization"]
            #[inline(always)]
            pub fn cntinc(&mut self) -> _CNTINCW {
                _CNTINCW { w: self }
            }
            #[doc = "Bit 4 - INVCTRL Register Synchronization"]
            #[inline(always)]
            pub fn invc(&mut self) -> _INVCW {
                _INVCW { w: self }
            }
            #[doc = "Bit 5 - SWOCTRL Register Synchronization"]
            #[inline(always)]
            pub fn swoc(&mut self) -> _SWOCW {
                _SWOCW { w: self }
            }
            #[doc = "Bit 7 - Synchronization Mode"]
            #[inline(always)]
            pub fn syncmode(&mut self) -> _SYNCMODEW {
                _SYNCMODEW { w: self }
            }
            #[doc = "Bit 8 - FTM counter synchronization is activated by the software trigger"]
            #[inline(always)]
            pub fn swrstcnt(&mut self) -> _SWRSTCNTW {
                _SWRSTCNTW { w: self }
            }
            #[doc = "Bit 9 - MOD, HCR, CNTIN, and CV registers synchronization is activated by the software trigger"]
            #[inline(always)]
            pub fn swwrbuf(&mut self) -> _SWWRBUFW {
                _SWWRBUFW { w: self }
            }
            #[doc = "Bit 10 - Output mask synchronization is activated by the software trigger"]
            #[inline(always)]
            pub fn swom(&mut self) -> _SWOMW {
                _SWOMW { w: self }
            }
            #[doc = "Bit 11 - Inverting control synchronization is activated by the software trigger"]
            #[inline(always)]
            pub fn swinvc(&mut self) -> _SWINVCW {
                _SWINVCW { w: self }
            }
            #[doc = "Bit 12 - Software output control synchronization is activated by the software trigger"]
            #[inline(always)]
            pub fn swsoc(&mut self) -> _SWSOCW {
                _SWSOCW { w: self }
            }
            #[doc = "Bit 16 - FTM counter synchronization is activated by a hardware trigger"]
            #[inline(always)]
            pub fn hwrstcnt(&mut self) -> _HWRSTCNTW {
                _HWRSTCNTW { w: self }
            }
            #[doc = "Bit 17 - MOD, HCR, CNTIN, and CV registers synchronization is activated by a hardware trigger"]
            #[inline(always)]
            pub fn hwwrbuf(&mut self) -> _HWWRBUFW {
                _HWWRBUFW { w: self }
            }
            #[doc = "Bit 18 - Output mask synchronization is activated by a hardware trigger"]
            #[inline(always)]
            pub fn hwom(&mut self) -> _HWOMW {
                _HWOMW { w: self }
            }
            #[doc = "Bit 19 - Inverting control synchronization is activated by a hardware trigger"]
            #[inline(always)]
            pub fn hwinvc(&mut self) -> _HWINVCW {
                _HWINVCW { w: self }
            }
            #[doc = "Bit 20 - Software output control synchronization is activated by a hardware trigger"]
            #[inline(always)]
            pub fn hwsoc(&mut self) -> _HWSOCW {
                _HWSOCW { w: self }
            }
        }
    }
    #[doc = "FTM Inverting Control"]
    pub struct INVCTRL {
        register: VolatileCell<u32>,
    }
    #[doc = "FTM Inverting Control"]
    pub mod invctrl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::INVCTRL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `INV0EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INV0ENR {
            #[doc = "Inverting is disabled."]
            _0,
            #[doc = "Inverting is enabled."]
            _1,
        }
        impl INV0ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INV0ENR::_0 => false,
                    INV0ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INV0ENR {
                match value {
                    false => INV0ENR::_0,
                    true => INV0ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INV0ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INV0ENR::_1
            }
        }
        #[doc = "Possible values of the field `INV1EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INV1ENR {
            #[doc = "Inverting is disabled."]
            _0,
            #[doc = "Inverting is enabled."]
            _1,
        }
        impl INV1ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INV1ENR::_0 => false,
                    INV1ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INV1ENR {
                match value {
                    false => INV1ENR::_0,
                    true => INV1ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INV1ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INV1ENR::_1
            }
        }
        #[doc = "Possible values of the field `INV2EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INV2ENR {
            #[doc = "Inverting is disabled."]
            _0,
            #[doc = "Inverting is enabled."]
            _1,
        }
        impl INV2ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INV2ENR::_0 => false,
                    INV2ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INV2ENR {
                match value {
                    false => INV2ENR::_0,
                    true => INV2ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INV2ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INV2ENR::_1
            }
        }
        #[doc = "Possible values of the field `INV3EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INV3ENR {
            #[doc = "Inverting is disabled."]
            _0,
            #[doc = "Inverting is enabled."]
            _1,
        }
        impl INV3ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INV3ENR::_0 => false,
                    INV3ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INV3ENR {
                match value {
                    false => INV3ENR::_0,
                    true => INV3ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INV3ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INV3ENR::_1
            }
        }
        #[doc = "Values that can be written to the field `INV0EN`"]
        pub enum INV0ENW {
            #[doc = "Inverting is disabled."]
            _0,
            #[doc = "Inverting is enabled."]
            _1,
        }
        impl INV0ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INV0ENW::_0 => false,
                    INV0ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INV0ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INV0ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INV0ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Inverting is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INV0ENW::_0)
            }
            #[doc = "Inverting is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INV0ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INV1EN`"]
        pub enum INV1ENW {
            #[doc = "Inverting is disabled."]
            _0,
            #[doc = "Inverting is enabled."]
            _1,
        }
        impl INV1ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INV1ENW::_0 => false,
                    INV1ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INV1ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INV1ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INV1ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Inverting is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INV1ENW::_0)
            }
            #[doc = "Inverting is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INV1ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INV2EN`"]
        pub enum INV2ENW {
            #[doc = "Inverting is disabled."]
            _0,
            #[doc = "Inverting is enabled."]
            _1,
        }
        impl INV2ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INV2ENW::_0 => false,
                    INV2ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INV2ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INV2ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INV2ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Inverting is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INV2ENW::_0)
            }
            #[doc = "Inverting is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INV2ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INV3EN`"]
        pub enum INV3ENW {
            #[doc = "Inverting is disabled."]
            _0,
            #[doc = "Inverting is enabled."]
            _1,
        }
        impl INV3ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INV3ENW::_0 => false,
                    INV3ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INV3ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INV3ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INV3ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Inverting is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INV3ENW::_0)
            }
            #[doc = "Inverting is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INV3ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pair Channels 0 Inverting Enable"]
            #[inline(always)]
            pub fn inv0en(&self) -> INV0ENR {
                INV0ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pair Channels 1 Inverting Enable"]
            #[inline(always)]
            pub fn inv1en(&self) -> INV1ENR {
                INV1ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Pair Channels 2 Inverting Enable"]
            #[inline(always)]
            pub fn inv2en(&self) -> INV2ENR {
                INV2ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Pair Channels 3 Inverting Enable"]
            #[inline(always)]
            pub fn inv3en(&self) -> INV3ENR {
                INV3ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pair Channels 0 Inverting Enable"]
            #[inline(always)]
            pub fn inv0en(&mut self) -> _INV0ENW {
                _INV0ENW { w: self }
            }
            #[doc = "Bit 1 - Pair Channels 1 Inverting Enable"]
            #[inline(always)]
            pub fn inv1en(&mut self) -> _INV1ENW {
                _INV1ENW { w: self }
            }
            #[doc = "Bit 2 - Pair Channels 2 Inverting Enable"]
            #[inline(always)]
            pub fn inv2en(&mut self) -> _INV2ENW {
                _INV2ENW { w: self }
            }
            #[doc = "Bit 3 - Pair Channels 3 Inverting Enable"]
            #[inline(always)]
            pub fn inv3en(&mut self) -> _INV3ENW {
                _INV3ENW { w: self }
            }
        }
    }
    #[doc = "FTM Software Output Control"]
    pub struct SWOCTRL {
        register: VolatileCell<u32>,
    }
    #[doc = "FTM Software Output Control"]
    pub mod swoctrl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SWOCTRL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CH0OC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH0OCR {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH0OCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH0OCR::_0 => false,
                    CH0OCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH0OCR {
                match value {
                    false => CH0OCR::_0,
                    true => CH0OCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH0OCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH0OCR::_1
            }
        }
        #[doc = "Possible values of the field `CH1OC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH1OCR {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH1OCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH1OCR::_0 => false,
                    CH1OCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH1OCR {
                match value {
                    false => CH1OCR::_0,
                    true => CH1OCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH1OCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH1OCR::_1
            }
        }
        #[doc = "Possible values of the field `CH2OC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH2OCR {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH2OCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH2OCR::_0 => false,
                    CH2OCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH2OCR {
                match value {
                    false => CH2OCR::_0,
                    true => CH2OCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH2OCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH2OCR::_1
            }
        }
        #[doc = "Possible values of the field `CH3OC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH3OCR {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH3OCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH3OCR::_0 => false,
                    CH3OCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH3OCR {
                match value {
                    false => CH3OCR::_0,
                    true => CH3OCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH3OCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH3OCR::_1
            }
        }
        #[doc = "Possible values of the field `CH4OC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH4OCR {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH4OCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH4OCR::_0 => false,
                    CH4OCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH4OCR {
                match value {
                    false => CH4OCR::_0,
                    true => CH4OCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH4OCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH4OCR::_1
            }
        }
        #[doc = "Possible values of the field `CH5OC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH5OCR {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH5OCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH5OCR::_0 => false,
                    CH5OCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH5OCR {
                match value {
                    false => CH5OCR::_0,
                    true => CH5OCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH5OCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH5OCR::_1
            }
        }
        #[doc = "Possible values of the field `CH6OC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH6OCR {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH6OCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH6OCR::_0 => false,
                    CH6OCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH6OCR {
                match value {
                    false => CH6OCR::_0,
                    true => CH6OCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH6OCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH6OCR::_1
            }
        }
        #[doc = "Possible values of the field `CH7OC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH7OCR {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH7OCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH7OCR::_0 => false,
                    CH7OCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH7OCR {
                match value {
                    false => CH7OCR::_0,
                    true => CH7OCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH7OCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH7OCR::_1
            }
        }
        #[doc = "Possible values of the field `CH0OCV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH0OCVR {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH0OCVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH0OCVR::_0 => false,
                    CH0OCVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH0OCVR {
                match value {
                    false => CH0OCVR::_0,
                    true => CH0OCVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH0OCVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH0OCVR::_1
            }
        }
        #[doc = "Possible values of the field `CH1OCV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH1OCVR {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH1OCVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH1OCVR::_0 => false,
                    CH1OCVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH1OCVR {
                match value {
                    false => CH1OCVR::_0,
                    true => CH1OCVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH1OCVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH1OCVR::_1
            }
        }
        #[doc = "Possible values of the field `CH2OCV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH2OCVR {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH2OCVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH2OCVR::_0 => false,
                    CH2OCVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH2OCVR {
                match value {
                    false => CH2OCVR::_0,
                    true => CH2OCVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH2OCVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH2OCVR::_1
            }
        }
        #[doc = "Possible values of the field `CH3OCV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH3OCVR {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH3OCVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH3OCVR::_0 => false,
                    CH3OCVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH3OCVR {
                match value {
                    false => CH3OCVR::_0,
                    true => CH3OCVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH3OCVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH3OCVR::_1
            }
        }
        #[doc = "Possible values of the field `CH4OCV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH4OCVR {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH4OCVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH4OCVR::_0 => false,
                    CH4OCVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH4OCVR {
                match value {
                    false => CH4OCVR::_0,
                    true => CH4OCVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH4OCVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH4OCVR::_1
            }
        }
        #[doc = "Possible values of the field `CH5OCV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH5OCVR {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH5OCVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH5OCVR::_0 => false,
                    CH5OCVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH5OCVR {
                match value {
                    false => CH5OCVR::_0,
                    true => CH5OCVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH5OCVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH5OCVR::_1
            }
        }
        #[doc = "Possible values of the field `CH6OCV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH6OCVR {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH6OCVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH6OCVR::_0 => false,
                    CH6OCVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH6OCVR {
                match value {
                    false => CH6OCVR::_0,
                    true => CH6OCVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH6OCVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH6OCVR::_1
            }
        }
        #[doc = "Possible values of the field `CH7OCV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH7OCVR {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH7OCVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH7OCVR::_0 => false,
                    CH7OCVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH7OCVR {
                match value {
                    false => CH7OCVR::_0,
                    true => CH7OCVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH7OCVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH7OCVR::_1
            }
        }
        #[doc = "Values that can be written to the field `CH0OC`"]
        pub enum CH0OCW {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH0OCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH0OCW::_0 => false,
                    CH0OCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH0OCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH0OCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH0OCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel output is not affected by software output control."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH0OCW::_0)
            }
            #[doc = "The channel output is affected by software output control."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH0OCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH1OC`"]
        pub enum CH1OCW {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH1OCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH1OCW::_0 => false,
                    CH1OCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH1OCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH1OCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH1OCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel output is not affected by software output control."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH1OCW::_0)
            }
            #[doc = "The channel output is affected by software output control."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH1OCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH2OC`"]
        pub enum CH2OCW {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH2OCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH2OCW::_0 => false,
                    CH2OCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH2OCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH2OCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH2OCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel output is not affected by software output control."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH2OCW::_0)
            }
            #[doc = "The channel output is affected by software output control."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH2OCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH3OC`"]
        pub enum CH3OCW {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH3OCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH3OCW::_0 => false,
                    CH3OCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH3OCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH3OCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH3OCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel output is not affected by software output control."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH3OCW::_0)
            }
            #[doc = "The channel output is affected by software output control."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH3OCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH4OC`"]
        pub enum CH4OCW {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH4OCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH4OCW::_0 => false,
                    CH4OCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH4OCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH4OCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH4OCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel output is not affected by software output control."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH4OCW::_0)
            }
            #[doc = "The channel output is affected by software output control."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH4OCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH5OC`"]
        pub enum CH5OCW {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH5OCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH5OCW::_0 => false,
                    CH5OCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH5OCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH5OCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH5OCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel output is not affected by software output control."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH5OCW::_0)
            }
            #[doc = "The channel output is affected by software output control."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH5OCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH6OC`"]
        pub enum CH6OCW {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH6OCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH6OCW::_0 => false,
                    CH6OCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH6OCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH6OCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH6OCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel output is not affected by software output control."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH6OCW::_0)
            }
            #[doc = "The channel output is affected by software output control."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH6OCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH7OC`"]
        pub enum CH7OCW {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH7OCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH7OCW::_0 => false,
                    CH7OCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH7OCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH7OCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH7OCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel output is not affected by software output control."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH7OCW::_0)
            }
            #[doc = "The channel output is affected by software output control."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH7OCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH0OCV`"]
        pub enum CH0OCVW {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH0OCVW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH0OCVW::_0 => false,
                    CH0OCVW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH0OCVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH0OCVW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH0OCVW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software output control forces 0 to the channel output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH0OCVW::_0)
            }
            #[doc = "The software output control forces 1 to the channel output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH0OCVW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH1OCV`"]
        pub enum CH1OCVW {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH1OCVW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH1OCVW::_0 => false,
                    CH1OCVW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH1OCVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH1OCVW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH1OCVW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software output control forces 0 to the channel output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH1OCVW::_0)
            }
            #[doc = "The software output control forces 1 to the channel output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH1OCVW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH2OCV`"]
        pub enum CH2OCVW {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH2OCVW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH2OCVW::_0 => false,
                    CH2OCVW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH2OCVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH2OCVW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH2OCVW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software output control forces 0 to the channel output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH2OCVW::_0)
            }
            #[doc = "The software output control forces 1 to the channel output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH2OCVW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH3OCV`"]
        pub enum CH3OCVW {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH3OCVW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH3OCVW::_0 => false,
                    CH3OCVW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH3OCVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH3OCVW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH3OCVW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software output control forces 0 to the channel output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH3OCVW::_0)
            }
            #[doc = "The software output control forces 1 to the channel output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH3OCVW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH4OCV`"]
        pub enum CH4OCVW {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH4OCVW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH4OCVW::_0 => false,
                    CH4OCVW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH4OCVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH4OCVW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH4OCVW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software output control forces 0 to the channel output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH4OCVW::_0)
            }
            #[doc = "The software output control forces 1 to the channel output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH4OCVW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH5OCV`"]
        pub enum CH5OCVW {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH5OCVW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH5OCVW::_0 => false,
                    CH5OCVW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH5OCVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH5OCVW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH5OCVW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software output control forces 0 to the channel output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH5OCVW::_0)
            }
            #[doc = "The software output control forces 1 to the channel output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH5OCVW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH6OCV`"]
        pub enum CH6OCVW {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH6OCVW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH6OCVW::_0 => false,
                    CH6OCVW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH6OCVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH6OCVW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH6OCVW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software output control forces 0 to the channel output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH6OCVW::_0)
            }
            #[doc = "The software output control forces 1 to the channel output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH6OCVW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH7OCV`"]
        pub enum CH7OCVW {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH7OCVW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH7OCVW::_0 => false,
                    CH7OCVW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH7OCVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH7OCVW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH7OCVW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software output control forces 0 to the channel output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH7OCVW::_0)
            }
            #[doc = "The software output control forces 1 to the channel output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH7OCVW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Channel 0 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch0oc(&self) -> CH0OCR {
                CH0OCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Channel 1 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch1oc(&self) -> CH1OCR {
                CH1OCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel 2 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch2oc(&self) -> CH2OCR {
                CH2OCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Channel 3 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch3oc(&self) -> CH3OCR {
                CH3OCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Channel 4 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch4oc(&self) -> CH4OCR {
                CH4OCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Channel 5 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch5oc(&self) -> CH5OCR {
                CH5OCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Channel 6 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch6oc(&self) -> CH6OCR {
                CH6OCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel 7 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch7oc(&self) -> CH7OCR {
                CH7OCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Channel 0 Software Output Control Value"]
            #[inline(always)]
            pub fn ch0ocv(&self) -> CH0OCVR {
                CH0OCVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Channel 1 Software Output Control Value"]
            #[inline(always)]
            pub fn ch1ocv(&self) -> CH1OCVR {
                CH1OCVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Channel 2 Software Output Control Value"]
            #[inline(always)]
            pub fn ch2ocv(&self) -> CH2OCVR {
                CH2OCVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 11 - Channel 3 Software Output Control Value"]
            #[inline(always)]
            pub fn ch3ocv(&self) -> CH3OCVR {
                CH3OCVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Channel 4 Software Output Control Value"]
            #[inline(always)]
            pub fn ch4ocv(&self) -> CH4OCVR {
                CH4OCVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Channel 5 Software Output Control Value"]
            #[inline(always)]
            pub fn ch5ocv(&self) -> CH5OCVR {
                CH5OCVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - Channel 6 Software Output Control Value"]
            #[inline(always)]
            pub fn ch6ocv(&self) -> CH6OCVR {
                CH6OCVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - Channel 7 Software Output Control Value"]
            #[inline(always)]
            pub fn ch7ocv(&self) -> CH7OCVR {
                CH7OCVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Channel 0 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch0oc(&mut self) -> _CH0OCW {
                _CH0OCW { w: self }
            }
            #[doc = "Bit 1 - Channel 1 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch1oc(&mut self) -> _CH1OCW {
                _CH1OCW { w: self }
            }
            #[doc = "Bit 2 - Channel 2 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch2oc(&mut self) -> _CH2OCW {
                _CH2OCW { w: self }
            }
            #[doc = "Bit 3 - Channel 3 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch3oc(&mut self) -> _CH3OCW {
                _CH3OCW { w: self }
            }
            #[doc = "Bit 4 - Channel 4 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch4oc(&mut self) -> _CH4OCW {
                _CH4OCW { w: self }
            }
            #[doc = "Bit 5 - Channel 5 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch5oc(&mut self) -> _CH5OCW {
                _CH5OCW { w: self }
            }
            #[doc = "Bit 6 - Channel 6 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch6oc(&mut self) -> _CH6OCW {
                _CH6OCW { w: self }
            }
            #[doc = "Bit 7 - Channel 7 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch7oc(&mut self) -> _CH7OCW {
                _CH7OCW { w: self }
            }
            #[doc = "Bit 8 - Channel 0 Software Output Control Value"]
            #[inline(always)]
            pub fn ch0ocv(&mut self) -> _CH0OCVW {
                _CH0OCVW { w: self }
            }
            #[doc = "Bit 9 - Channel 1 Software Output Control Value"]
            #[inline(always)]
            pub fn ch1ocv(&mut self) -> _CH1OCVW {
                _CH1OCVW { w: self }
            }
            #[doc = "Bit 10 - Channel 2 Software Output Control Value"]
            #[inline(always)]
            pub fn ch2ocv(&mut self) -> _CH2OCVW {
                _CH2OCVW { w: self }
            }
            #[doc = "Bit 11 - Channel 3 Software Output Control Value"]
            #[inline(always)]
            pub fn ch3ocv(&mut self) -> _CH3OCVW {
                _CH3OCVW { w: self }
            }
            #[doc = "Bit 12 - Channel 4 Software Output Control Value"]
            #[inline(always)]
            pub fn ch4ocv(&mut self) -> _CH4OCVW {
                _CH4OCVW { w: self }
            }
            #[doc = "Bit 13 - Channel 5 Software Output Control Value"]
            #[inline(always)]
            pub fn ch5ocv(&mut self) -> _CH5OCVW {
                _CH5OCVW { w: self }
            }
            #[doc = "Bit 14 - Channel 6 Software Output Control Value"]
            #[inline(always)]
            pub fn ch6ocv(&mut self) -> _CH6OCVW {
                _CH6OCVW { w: self }
            }
            #[doc = "Bit 15 - Channel 7 Software Output Control Value"]
            #[inline(always)]
            pub fn ch7ocv(&mut self) -> _CH7OCVW {
                _CH7OCVW { w: self }
            }
        }
    }
    #[doc = "FTM PWM Load"]
    pub struct PWMLOAD {
        register: VolatileCell<u32>,
    }
    #[doc = "FTM PWM Load"]
    pub mod pwmload {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PWMLOAD {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CH0SEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH0SELR {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH0SELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH0SELR::_0 => false,
                    CH0SELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH0SELR {
                match value {
                    false => CH0SELR::_0,
                    true => CH0SELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH0SELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH0SELR::_1
            }
        }
        #[doc = "Possible values of the field `CH1SEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH1SELR {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH1SELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH1SELR::_0 => false,
                    CH1SELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH1SELR {
                match value {
                    false => CH1SELR::_0,
                    true => CH1SELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH1SELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH1SELR::_1
            }
        }
        #[doc = "Possible values of the field `CH2SEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH2SELR {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH2SELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH2SELR::_0 => false,
                    CH2SELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH2SELR {
                match value {
                    false => CH2SELR::_0,
                    true => CH2SELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH2SELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH2SELR::_1
            }
        }
        #[doc = "Possible values of the field `CH3SEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH3SELR {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH3SELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH3SELR::_0 => false,
                    CH3SELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH3SELR {
                match value {
                    false => CH3SELR::_0,
                    true => CH3SELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH3SELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH3SELR::_1
            }
        }
        #[doc = "Possible values of the field `CH4SEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH4SELR {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH4SELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH4SELR::_0 => false,
                    CH4SELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH4SELR {
                match value {
                    false => CH4SELR::_0,
                    true => CH4SELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH4SELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH4SELR::_1
            }
        }
        #[doc = "Possible values of the field `CH5SEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH5SELR {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH5SELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH5SELR::_0 => false,
                    CH5SELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH5SELR {
                match value {
                    false => CH5SELR::_0,
                    true => CH5SELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH5SELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH5SELR::_1
            }
        }
        #[doc = "Possible values of the field `CH6SEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH6SELR {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH6SELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH6SELR::_0 => false,
                    CH6SELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH6SELR {
                match value {
                    false => CH6SELR::_0,
                    true => CH6SELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH6SELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH6SELR::_1
            }
        }
        #[doc = "Possible values of the field `CH7SEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH7SELR {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH7SELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH7SELR::_0 => false,
                    CH7SELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH7SELR {
                match value {
                    false => CH7SELR::_0,
                    true => CH7SELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH7SELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH7SELR::_1
            }
        }
        #[doc = "Possible values of the field `HCSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HCSELR {
            #[doc = "Half cycle reload is disabled and it is not considered as a reload opportunity."]
            _0,
            #[doc = "Half cycle reload is enabled and it is considered as a reload opportunity."]
            _1,
        }
        impl HCSELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HCSELR::_0 => false,
                    HCSELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HCSELR {
                match value {
                    false => HCSELR::_0,
                    true => HCSELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HCSELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HCSELR::_1
            }
        }
        #[doc = "Possible values of the field `LDOK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LDOKR {
            #[doc = "Loading updated values is disabled."]
            _0,
            #[doc = "Loading updated values is enabled."]
            _1,
        }
        impl LDOKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LDOKR::_0 => false,
                    LDOKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LDOKR {
                match value {
                    false => LDOKR::_0,
                    true => LDOKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LDOKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LDOKR::_1
            }
        }
        #[doc = "Possible values of the field `GLEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum GLENR {
            #[doc = "Global Load Ok disabled."]
            _0,
            #[doc = "Global Load OK enabled. A pulse event on the module global load input sets the LDOK bit."]
            _1,
        }
        impl GLENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    GLENR::_0 => false,
                    GLENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> GLENR {
                match value {
                    false => GLENR::_0,
                    true => GLENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == GLENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == GLENR::_1
            }
        }
        #[doc = "Values that can be written to the field `CH0SEL`"]
        pub enum CH0SELW {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH0SELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH0SELW::_0 => false,
                    CH0SELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH0SELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH0SELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH0SELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel match is not included as a reload opportunity."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH0SELW::_0)
            }
            #[doc = "Channel match is included as a reload opportunity."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH0SELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH1SEL`"]
        pub enum CH1SELW {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH1SELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH1SELW::_0 => false,
                    CH1SELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH1SELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH1SELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH1SELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel match is not included as a reload opportunity."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH1SELW::_0)
            }
            #[doc = "Channel match is included as a reload opportunity."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH1SELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH2SEL`"]
        pub enum CH2SELW {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH2SELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH2SELW::_0 => false,
                    CH2SELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH2SELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH2SELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH2SELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel match is not included as a reload opportunity."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH2SELW::_0)
            }
            #[doc = "Channel match is included as a reload opportunity."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH2SELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH3SEL`"]
        pub enum CH3SELW {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH3SELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH3SELW::_0 => false,
                    CH3SELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH3SELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH3SELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH3SELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel match is not included as a reload opportunity."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH3SELW::_0)
            }
            #[doc = "Channel match is included as a reload opportunity."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH3SELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH4SEL`"]
        pub enum CH4SELW {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH4SELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH4SELW::_0 => false,
                    CH4SELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH4SELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH4SELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH4SELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel match is not included as a reload opportunity."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH4SELW::_0)
            }
            #[doc = "Channel match is included as a reload opportunity."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH4SELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH5SEL`"]
        pub enum CH5SELW {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH5SELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH5SELW::_0 => false,
                    CH5SELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH5SELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH5SELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH5SELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel match is not included as a reload opportunity."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH5SELW::_0)
            }
            #[doc = "Channel match is included as a reload opportunity."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH5SELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH6SEL`"]
        pub enum CH6SELW {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH6SELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH6SELW::_0 => false,
                    CH6SELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH6SELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH6SELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH6SELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel match is not included as a reload opportunity."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH6SELW::_0)
            }
            #[doc = "Channel match is included as a reload opportunity."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH6SELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH7SEL`"]
        pub enum CH7SELW {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH7SELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH7SELW::_0 => false,
                    CH7SELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH7SELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH7SELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH7SELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel match is not included as a reload opportunity."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH7SELW::_0)
            }
            #[doc = "Channel match is included as a reload opportunity."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH7SELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `HCSEL`"]
        pub enum HCSELW {
            #[doc = "Half cycle reload is disabled and it is not considered as a reload opportunity."]
            _0,
            #[doc = "Half cycle reload is enabled and it is considered as a reload opportunity."]
            _1,
        }
        impl HCSELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HCSELW::_0 => false,
                    HCSELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HCSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HCSELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HCSELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Half cycle reload is disabled and it is not considered as a reload opportunity."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HCSELW::_0)
            }
            #[doc = "Half cycle reload is enabled and it is considered as a reload opportunity."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HCSELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LDOK`"]
        pub enum LDOKW {
            #[doc = "Loading updated values is disabled."]
            _0,
            #[doc = "Loading updated values is enabled."]
            _1,
        }
        impl LDOKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LDOKW::_0 => false,
                    LDOKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LDOKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LDOKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LDOKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Loading updated values is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LDOKW::_0)
            }
            #[doc = "Loading updated values is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LDOKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `GLEN`"]
        pub enum GLENW {
            #[doc = "Global Load Ok disabled."]
            _0,
            #[doc = "Global Load OK enabled. A pulse event on the module global load input sets the LDOK bit."]
            _1,
        }
        impl GLENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    GLENW::_0 => false,
                    GLENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _GLENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GLENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: GLENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Global Load Ok disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(GLENW::_0)
            }
            #[doc = "Global Load OK enabled. A pulse event on the module global load input sets the LDOK bit."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(GLENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `GLDOK`"]
        pub enum GLDOKW {
            #[doc = "No action."]
            _0,
            #[doc = "LDOK bit is set."]
            _1,
        }
        impl GLDOKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    GLDOKW::_0 => false,
                    GLDOKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _GLDOKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GLDOKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: GLDOKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No action."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(GLDOKW::_0)
            }
            #[doc = "LDOK bit is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(GLDOKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Channel 0 Select"]
            #[inline(always)]
            pub fn ch0sel(&self) -> CH0SELR {
                CH0SELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Channel 1 Select"]
            #[inline(always)]
            pub fn ch1sel(&self) -> CH1SELR {
                CH1SELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel 2 Select"]
            #[inline(always)]
            pub fn ch2sel(&self) -> CH2SELR {
                CH2SELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Channel 3 Select"]
            #[inline(always)]
            pub fn ch3sel(&self) -> CH3SELR {
                CH3SELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Channel 4 Select"]
            #[inline(always)]
            pub fn ch4sel(&self) -> CH4SELR {
                CH4SELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Channel 5 Select"]
            #[inline(always)]
            pub fn ch5sel(&self) -> CH5SELR {
                CH5SELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Channel 6 Select"]
            #[inline(always)]
            pub fn ch6sel(&self) -> CH6SELR {
                CH6SELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel 7 Select"]
            #[inline(always)]
            pub fn ch7sel(&self) -> CH7SELR {
                CH7SELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Half Cycle Select"]
            #[inline(always)]
            pub fn hcsel(&self) -> HCSELR {
                HCSELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Load Enable"]
            #[inline(always)]
            pub fn ldok(&self) -> LDOKR {
                LDOKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Global Load Enable"]
            #[inline(always)]
            pub fn glen(&self) -> GLENR {
                GLENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Channel 0 Select"]
            #[inline(always)]
            pub fn ch0sel(&mut self) -> _CH0SELW {
                _CH0SELW { w: self }
            }
            #[doc = "Bit 1 - Channel 1 Select"]
            #[inline(always)]
            pub fn ch1sel(&mut self) -> _CH1SELW {
                _CH1SELW { w: self }
            }
            #[doc = "Bit 2 - Channel 2 Select"]
            #[inline(always)]
            pub fn ch2sel(&mut self) -> _CH2SELW {
                _CH2SELW { w: self }
            }
            #[doc = "Bit 3 - Channel 3 Select"]
            #[inline(always)]
            pub fn ch3sel(&mut self) -> _CH3SELW {
                _CH3SELW { w: self }
            }
            #[doc = "Bit 4 - Channel 4 Select"]
            #[inline(always)]
            pub fn ch4sel(&mut self) -> _CH4SELW {
                _CH4SELW { w: self }
            }
            #[doc = "Bit 5 - Channel 5 Select"]
            #[inline(always)]
            pub fn ch5sel(&mut self) -> _CH5SELW {
                _CH5SELW { w: self }
            }
            #[doc = "Bit 6 - Channel 6 Select"]
            #[inline(always)]
            pub fn ch6sel(&mut self) -> _CH6SELW {
                _CH6SELW { w: self }
            }
            #[doc = "Bit 7 - Channel 7 Select"]
            #[inline(always)]
            pub fn ch7sel(&mut self) -> _CH7SELW {
                _CH7SELW { w: self }
            }
            #[doc = "Bit 8 - Half Cycle Select"]
            #[inline(always)]
            pub fn hcsel(&mut self) -> _HCSELW {
                _HCSELW { w: self }
            }
            #[doc = "Bit 9 - Load Enable"]
            #[inline(always)]
            pub fn ldok(&mut self) -> _LDOKW {
                _LDOKW { w: self }
            }
            #[doc = "Bit 10 - Global Load Enable"]
            #[inline(always)]
            pub fn glen(&mut self) -> _GLENW {
                _GLENW { w: self }
            }
            #[doc = "Bit 11 - Global Load OK"]
            #[inline(always)]
            pub fn gldok(&mut self) -> _GLDOKW {
                _GLDOKW { w: self }
            }
        }
    }
    #[doc = "Half Cycle Register"]
    pub struct HCR {
        register: VolatileCell<u32>,
    }
    #[doc = "Half Cycle Register"]
    pub mod hcr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::HCR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct HCVALR {
            bits: u16,
        }
        impl HCVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _HCVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HCVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Half Cycle Value"]
            #[inline(always)]
            pub fn hcval(&self) -> HCVALR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                HCVALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Half Cycle Value"]
            #[inline(always)]
            pub fn hcval(&mut self) -> _HCVALW {
                _HCVALW { w: self }
            }
        }
    }
    #[doc = "Pair 0 Deadtime Configuration"]
    pub struct PAIR0DEADTIME {
        register: VolatileCell<u32>,
    }
    #[doc = "Pair 0 Deadtime Configuration"]
    pub mod pair0deadtime {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PAIR0DEADTIME {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DTVALR {
            bits: u8,
        }
        impl DTVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DTPS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DTPSR {
            #[doc = "Divide the FTM input clock by 1."]
            _0X,
            #[doc = "Divide the FTM input clock by 4."]
            _10,
            #[doc = "Divide the FTM input clock by 16."]
            _11,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl DTPSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    DTPSR::_0X => 0,
                    DTPSR::_10 => 2,
                    DTPSR::_11 => 3,
                    DTPSR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> DTPSR {
                match value {
                    0 => DTPSR::_0X,
                    2 => DTPSR::_10,
                    3 => DTPSR::_11,
                    i => DTPSR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0X`"]
            #[inline(always)]
            pub fn is_0x(&self) -> bool {
                *self == DTPSR::_0X
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == DTPSR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == DTPSR::_11
            }
        }
        #[doc = r" Value of the field"]
        pub struct DTVALEXR {
            bits: u8,
        }
        impl DTVALEXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DTPS`"]
        pub enum DTPSW {
            #[doc = "Divide the FTM input clock by 1."]
            _0X,
            #[doc = "Divide the FTM input clock by 4."]
            _10,
            #[doc = "Divide the FTM input clock by 16."]
            _11,
        }
        impl DTPSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    DTPSW::_0X => 0,
                    DTPSW::_10 => 2,
                    DTPSW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTPSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTPSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DTPSW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Divide the FTM input clock by 1."]
            #[inline(always)]
            pub fn _0x(self) -> &'a mut W {
                self.variant(DTPSW::_0X)
            }
            #[doc = "Divide the FTM input clock by 4."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(DTPSW::_10)
            }
            #[doc = "Divide the FTM input clock by 16."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(DTPSW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTVALEXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTVALEXW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Deadtime Value"]
            #[inline(always)]
            pub fn dtval(&self) -> DTVALR {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DTVALR { bits }
            }
            #[doc = "Bits 6:7 - Deadtime Prescaler Value"]
            #[inline(always)]
            pub fn dtps(&self) -> DTPSR {
                DTPSR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 16:19 - Extended Deadtime Value"]
            #[inline(always)]
            pub fn dtvalex(&self) -> DTVALEXR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DTVALEXR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - Deadtime Value"]
            #[inline(always)]
            pub fn dtval(&mut self) -> _DTVALW {
                _DTVALW { w: self }
            }
            #[doc = "Bits 6:7 - Deadtime Prescaler Value"]
            #[inline(always)]
            pub fn dtps(&mut self) -> _DTPSW {
                _DTPSW { w: self }
            }
            #[doc = "Bits 16:19 - Extended Deadtime Value"]
            #[inline(always)]
            pub fn dtvalex(&mut self) -> _DTVALEXW {
                _DTVALEXW { w: self }
            }
        }
    }
    #[doc = "Pair 1 Deadtime Configuration"]
    pub struct PAIR1DEADTIME {
        register: VolatileCell<u32>,
    }
    #[doc = "Pair 1 Deadtime Configuration"]
    pub mod pair1deadtime {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PAIR1DEADTIME {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DTVALR {
            bits: u8,
        }
        impl DTVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DTPS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DTPSR {
            #[doc = "Divide the FTM input clock by 1."]
            _0X,
            #[doc = "Divide the FTM input clock by 4."]
            _10,
            #[doc = "Divide the FTM input clock by 16."]
            _11,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl DTPSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    DTPSR::_0X => 0,
                    DTPSR::_10 => 2,
                    DTPSR::_11 => 3,
                    DTPSR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> DTPSR {
                match value {
                    0 => DTPSR::_0X,
                    2 => DTPSR::_10,
                    3 => DTPSR::_11,
                    i => DTPSR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0X`"]
            #[inline(always)]
            pub fn is_0x(&self) -> bool {
                *self == DTPSR::_0X
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == DTPSR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == DTPSR::_11
            }
        }
        #[doc = r" Value of the field"]
        pub struct DTVALEXR {
            bits: u8,
        }
        impl DTVALEXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DTPS`"]
        pub enum DTPSW {
            #[doc = "Divide the FTM input clock by 1."]
            _0X,
            #[doc = "Divide the FTM input clock by 4."]
            _10,
            #[doc = "Divide the FTM input clock by 16."]
            _11,
        }
        impl DTPSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    DTPSW::_0X => 0,
                    DTPSW::_10 => 2,
                    DTPSW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTPSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTPSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DTPSW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Divide the FTM input clock by 1."]
            #[inline(always)]
            pub fn _0x(self) -> &'a mut W {
                self.variant(DTPSW::_0X)
            }
            #[doc = "Divide the FTM input clock by 4."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(DTPSW::_10)
            }
            #[doc = "Divide the FTM input clock by 16."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(DTPSW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTVALEXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTVALEXW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Deadtime Value"]
            #[inline(always)]
            pub fn dtval(&self) -> DTVALR {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DTVALR { bits }
            }
            #[doc = "Bits 6:7 - Deadtime Prescaler Value"]
            #[inline(always)]
            pub fn dtps(&self) -> DTPSR {
                DTPSR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 16:19 - Extended Deadtime Value"]
            #[inline(always)]
            pub fn dtvalex(&self) -> DTVALEXR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DTVALEXR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - Deadtime Value"]
            #[inline(always)]
            pub fn dtval(&mut self) -> _DTVALW {
                _DTVALW { w: self }
            }
            #[doc = "Bits 6:7 - Deadtime Prescaler Value"]
            #[inline(always)]
            pub fn dtps(&mut self) -> _DTPSW {
                _DTPSW { w: self }
            }
            #[doc = "Bits 16:19 - Extended Deadtime Value"]
            #[inline(always)]
            pub fn dtvalex(&mut self) -> _DTVALEXW {
                _DTVALEXW { w: self }
            }
        }
    }
    #[doc = "Pair 2 Deadtime Configuration"]
    pub struct PAIR2DEADTIME {
        register: VolatileCell<u32>,
    }
    #[doc = "Pair 2 Deadtime Configuration"]
    pub mod pair2deadtime {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PAIR2DEADTIME {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DTVALR {
            bits: u8,
        }
        impl DTVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DTPS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DTPSR {
            #[doc = "Divide the FTM input clock by 1."]
            _0X,
            #[doc = "Divide the FTM input clock by 4."]
            _10,
            #[doc = "Divide the FTM input clock by 16."]
            _11,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl DTPSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    DTPSR::_0X => 0,
                    DTPSR::_10 => 2,
                    DTPSR::_11 => 3,
                    DTPSR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> DTPSR {
                match value {
                    0 => DTPSR::_0X,
                    2 => DTPSR::_10,
                    3 => DTPSR::_11,
                    i => DTPSR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0X`"]
            #[inline(always)]
            pub fn is_0x(&self) -> bool {
                *self == DTPSR::_0X
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == DTPSR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == DTPSR::_11
            }
        }
        #[doc = r" Value of the field"]
        pub struct DTVALEXR {
            bits: u8,
        }
        impl DTVALEXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DTPS`"]
        pub enum DTPSW {
            #[doc = "Divide the FTM input clock by 1."]
            _0X,
            #[doc = "Divide the FTM input clock by 4."]
            _10,
            #[doc = "Divide the FTM input clock by 16."]
            _11,
        }
        impl DTPSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    DTPSW::_0X => 0,
                    DTPSW::_10 => 2,
                    DTPSW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTPSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTPSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DTPSW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Divide the FTM input clock by 1."]
            #[inline(always)]
            pub fn _0x(self) -> &'a mut W {
                self.variant(DTPSW::_0X)
            }
            #[doc = "Divide the FTM input clock by 4."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(DTPSW::_10)
            }
            #[doc = "Divide the FTM input clock by 16."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(DTPSW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTVALEXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTVALEXW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Deadtime Value"]
            #[inline(always)]
            pub fn dtval(&self) -> DTVALR {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DTVALR { bits }
            }
            #[doc = "Bits 6:7 - Deadtime Prescaler Value"]
            #[inline(always)]
            pub fn dtps(&self) -> DTPSR {
                DTPSR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 16:19 - Extended Deadtime Value"]
            #[inline(always)]
            pub fn dtvalex(&self) -> DTVALEXR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DTVALEXR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - Deadtime Value"]
            #[inline(always)]
            pub fn dtval(&mut self) -> _DTVALW {
                _DTVALW { w: self }
            }
            #[doc = "Bits 6:7 - Deadtime Prescaler Value"]
            #[inline(always)]
            pub fn dtps(&mut self) -> _DTPSW {
                _DTPSW { w: self }
            }
            #[doc = "Bits 16:19 - Extended Deadtime Value"]
            #[inline(always)]
            pub fn dtvalex(&mut self) -> _DTVALEXW {
                _DTVALEXW { w: self }
            }
        }
    }
    #[doc = "Pair 3 Deadtime Configuration"]
    pub struct PAIR3DEADTIME {
        register: VolatileCell<u32>,
    }
    #[doc = "Pair 3 Deadtime Configuration"]
    pub mod pair3deadtime {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PAIR3DEADTIME {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DTVALR {
            bits: u8,
        }
        impl DTVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DTPS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DTPSR {
            #[doc = "Divide the FTM input clock by 1."]
            _0X,
            #[doc = "Divide the FTM input clock by 4."]
            _10,
            #[doc = "Divide the FTM input clock by 16."]
            _11,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl DTPSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    DTPSR::_0X => 0,
                    DTPSR::_10 => 2,
                    DTPSR::_11 => 3,
                    DTPSR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> DTPSR {
                match value {
                    0 => DTPSR::_0X,
                    2 => DTPSR::_10,
                    3 => DTPSR::_11,
                    i => DTPSR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0X`"]
            #[inline(always)]
            pub fn is_0x(&self) -> bool {
                *self == DTPSR::_0X
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == DTPSR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == DTPSR::_11
            }
        }
        #[doc = r" Value of the field"]
        pub struct DTVALEXR {
            bits: u8,
        }
        impl DTVALEXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DTPS`"]
        pub enum DTPSW {
            #[doc = "Divide the FTM input clock by 1."]
            _0X,
            #[doc = "Divide the FTM input clock by 4."]
            _10,
            #[doc = "Divide the FTM input clock by 16."]
            _11,
        }
        impl DTPSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    DTPSW::_0X => 0,
                    DTPSW::_10 => 2,
                    DTPSW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTPSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTPSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DTPSW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Divide the FTM input clock by 1."]
            #[inline(always)]
            pub fn _0x(self) -> &'a mut W {
                self.variant(DTPSW::_0X)
            }
            #[doc = "Divide the FTM input clock by 4."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(DTPSW::_10)
            }
            #[doc = "Divide the FTM input clock by 16."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(DTPSW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTVALEXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTVALEXW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Deadtime Value"]
            #[inline(always)]
            pub fn dtval(&self) -> DTVALR {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DTVALR { bits }
            }
            #[doc = "Bits 6:7 - Deadtime Prescaler Value"]
            #[inline(always)]
            pub fn dtps(&self) -> DTPSR {
                DTPSR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 16:19 - Extended Deadtime Value"]
            #[inline(always)]
            pub fn dtvalex(&self) -> DTVALEXR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DTVALEXR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - Deadtime Value"]
            #[inline(always)]
            pub fn dtval(&mut self) -> _DTVALW {
                _DTVALW { w: self }
            }
            #[doc = "Bits 6:7 - Deadtime Prescaler Value"]
            #[inline(always)]
            pub fn dtps(&mut self) -> _DTPSW {
                _DTPSW { w: self }
            }
            #[doc = "Bits 16:19 - Extended Deadtime Value"]
            #[inline(always)]
            pub fn dtvalex(&mut self) -> _DTVALEXW {
                _DTVALEXW { w: self }
            }
        }
    }
}
#[doc = "FlexTimer Module"]
pub struct FTM1 {
    register_block: ftm1::RegisterBlock,
}
impl Deref for FTM1 {
    type Target = ftm1::RegisterBlock;
    fn deref(&self) -> &ftm1::RegisterBlock {
        &self.register_block
    }
}
#[doc = "FlexTimer Module"]
pub const FTM2: Peripheral<FTM2> = unsafe { Peripheral::new(1073979392) };
#[doc = "FlexTimer Module"]
pub mod ftm2 {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - Status And Control"]
        pub sc: SC,
        #[doc = "0x04 - Counter"]
        pub cnt: CNT,
        #[doc = "0x08 - Modulo"]
        pub mod_: MOD,
        #[doc = "0x0c - Channel (n) Status And Control"]
        pub c0sc: C0SC,
        #[doc = "0x10 - Channel (n) Value"]
        pub c0v: C0V,
        #[doc = "0x14 - Channel (n) Status And Control"]
        pub c1sc: C1SC,
        #[doc = "0x18 - Channel (n) Value"]
        pub c1v: C1V,
        #[doc = "0x1c - Channel (n) Status And Control"]
        pub c2sc: C2SC,
        #[doc = "0x20 - Channel (n) Value"]
        pub c2v: C2V,
        #[doc = "0x24 - Channel (n) Status And Control"]
        pub c3sc: C3SC,
        #[doc = "0x28 - Channel (n) Value"]
        pub c3v: C3V,
        #[doc = "0x2c - Channel (n) Status And Control"]
        pub c4sc: C4SC,
        #[doc = "0x30 - Channel (n) Value"]
        pub c4v: C4V,
        #[doc = "0x34 - Channel (n) Status And Control"]
        pub c5sc: C5SC,
        #[doc = "0x38 - Channel (n) Value"]
        pub c5v: C5V,
        #[doc = "0x3c - Channel (n) Status And Control"]
        pub c6sc: C6SC,
        #[doc = "0x40 - Channel (n) Value"]
        pub c6v: C6V,
        #[doc = "0x44 - Channel (n) Status And Control"]
        pub c7sc: C7SC,
        #[doc = "0x48 - Channel (n) Value"]
        pub c7v: C7V,
        #[doc = "0x4c - Counter Initial Value"]
        pub cntin: CNTIN,
        #[doc = "0x50 - Capture And Compare Status"]
        pub status: STATUS,
        #[doc = "0x54 - Features Mode Selection"]
        pub mode: MODE,
        #[doc = "0x58 - Synchronization"]
        pub sync: SYNC,
        #[doc = "0x5c - Initial State For Channels Output"]
        pub outinit: OUTINIT,
        #[doc = "0x60 - Output Mask"]
        pub outmask: OUTMASK,
        #[doc = "0x64 - Function For Linked Channels"]
        pub combine: COMBINE,
        #[doc = "0x68 - Deadtime Configuration"]
        pub deadtime: DEADTIME,
        #[doc = "0x6c - FTM External Trigger"]
        pub exttrig: EXTTRIG,
        #[doc = "0x70 - Channels Polarity"]
        pub pol: POL,
        #[doc = "0x74 - Fault Mode Status"]
        pub fms: FMS,
        #[doc = "0x78 - Input Capture Filter Control"]
        pub filter: FILTER,
        #[doc = "0x7c - Fault Control"]
        pub fltctrl: FLTCTRL,
        #[doc = "0x80 - Quadrature Decoder Control And Status"]
        pub qdctrl: QDCTRL,
        #[doc = "0x84 - Configuration"]
        pub conf: CONF,
        #[doc = "0x88 - FTM Fault Input Polarity"]
        pub fltpol: FLTPOL,
        #[doc = "0x8c - Synchronization Configuration"]
        pub synconf: SYNCONF,
        #[doc = "0x90 - FTM Inverting Control"]
        pub invctrl: INVCTRL,
        #[doc = "0x94 - FTM Software Output Control"]
        pub swoctrl: SWOCTRL,
        #[doc = "0x98 - FTM PWM Load"]
        pub pwmload: PWMLOAD,
        #[doc = "0x9c - Half Cycle Register"]
        pub hcr: HCR,
        #[doc = "0xa0 - Pair 0 Deadtime Configuration"]
        pub pair0deadtime: PAIR0DEADTIME,
        _reserved0: [u8; 4usize],
        #[doc = "0xa8 - Pair 1 Deadtime Configuration"]
        pub pair1deadtime: PAIR1DEADTIME,
        _reserved1: [u8; 4usize],
        #[doc = "0xb0 - Pair 2 Deadtime Configuration"]
        pub pair2deadtime: PAIR2DEADTIME,
        _reserved2: [u8; 4usize],
        #[doc = "0xb8 - Pair 3 Deadtime Configuration"]
        pub pair3deadtime: PAIR3DEADTIME,
    }
    #[doc = "Status And Control"]
    pub struct SC {
        register: VolatileCell<u32>,
    }
    #[doc = "Status And Control"]
    pub mod sc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Divide by 1"]
            _000,
            #[doc = "Divide by 2"]
            _001,
            #[doc = "Divide by 4"]
            _010,
            #[doc = "Divide by 8"]
            _011,
            #[doc = "Divide by 16"]
            _100,
            #[doc = "Divide by 32"]
            _101,
            #[doc = "Divide by 64"]
            _110,
            #[doc = "Divide by 128"]
            _111,
        }
        impl PSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PSR::_000 => 0,
                    PSR::_001 => 1,
                    PSR::_010 => 2,
                    PSR::_011 => 3,
                    PSR::_100 => 4,
                    PSR::_101 => 5,
                    PSR::_110 => 6,
                    PSR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PSR {
                match value {
                    0 => PSR::_000,
                    1 => PSR::_001,
                    2 => PSR::_010,
                    3 => PSR::_011,
                    4 => PSR::_100,
                    5 => PSR::_101,
                    6 => PSR::_110,
                    7 => PSR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == PSR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == PSR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == PSR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == PSR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == PSR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == PSR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == PSR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == PSR::_111
            }
        }
        #[doc = "Possible values of the field `CLKS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CLKSR {
            #[doc = "No clock selected. This in effect disables the FTM counter."]
            _00,
            #[doc = "FTM input clock"]
            _01,
            #[doc = "Fixed frequency clock"]
            _10,
            #[doc = "External clock"]
            _11,
        }
        impl CLKSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    CLKSR::_00 => 0,
                    CLKSR::_01 => 1,
                    CLKSR::_10 => 2,
                    CLKSR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> CLKSR {
                match value {
                    0 => CLKSR::_00,
                    1 => CLKSR::_01,
                    2 => CLKSR::_10,
                    3 => CLKSR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == CLKSR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == CLKSR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == CLKSR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == CLKSR::_11
            }
        }
        #[doc = "Possible values of the field `CPWMS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CPWMSR {
            #[doc = "FTM counter operates in Up Counting mode."]
            _0,
            #[doc = "FTM counter operates in Up-Down Counting mode."]
            _1,
        }
        impl CPWMSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CPWMSR::_0 => false,
                    CPWMSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CPWMSR {
                match value {
                    false => CPWMSR::_0,
                    true => CPWMSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CPWMSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CPWMSR::_1
            }
        }
        #[doc = "Possible values of the field `RIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RIER {
            #[doc = "Reload point interrupt is disabled."]
            _0,
            #[doc = "Reload point interrupt is enabled."]
            _1,
        }
        impl RIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RIER::_0 => false,
                    RIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RIER {
                match value {
                    false => RIER::_0,
                    true => RIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RIER::_1
            }
        }
        #[doc = "Possible values of the field `RF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RFR {
            #[doc = "A selected reload point did not happen."]
            _0,
            #[doc = "A selected reload point happened."]
            _1,
        }
        impl RFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RFR::_0 => false,
                    RFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RFR {
                match value {
                    false => RFR::_0,
                    true => RFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RFR::_1
            }
        }
        #[doc = "Possible values of the field `TOIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TOIER {
            #[doc = "Disable TOF interrupts. Use software polling."]
            _0,
            #[doc = "Enable TOF interrupts. An interrupt is generated when TOF equals one."]
            _1,
        }
        impl TOIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TOIER::_0 => false,
                    TOIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TOIER {
                match value {
                    false => TOIER::_0,
                    true => TOIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TOIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TOIER::_1
            }
        }
        #[doc = "Possible values of the field `TOF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TOFR {
            #[doc = "FTM counter has not overflowed."]
            _0,
            #[doc = "FTM counter has overflowed."]
            _1,
        }
        impl TOFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TOFR::_0 => false,
                    TOFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TOFR {
                match value {
                    false => TOFR::_0,
                    true => TOFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TOFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TOFR::_1
            }
        }
        #[doc = "Possible values of the field `PWMEN0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PWMEN0R {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PWMEN0R::_0 => false,
                    PWMEN0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PWMEN0R {
                match value {
                    false => PWMEN0R::_0,
                    true => PWMEN0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PWMEN0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PWMEN0R::_1
            }
        }
        #[doc = "Possible values of the field `PWMEN1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PWMEN1R {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PWMEN1R::_0 => false,
                    PWMEN1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PWMEN1R {
                match value {
                    false => PWMEN1R::_0,
                    true => PWMEN1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PWMEN1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PWMEN1R::_1
            }
        }
        #[doc = "Possible values of the field `PWMEN2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PWMEN2R {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PWMEN2R::_0 => false,
                    PWMEN2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PWMEN2R {
                match value {
                    false => PWMEN2R::_0,
                    true => PWMEN2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PWMEN2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PWMEN2R::_1
            }
        }
        #[doc = "Possible values of the field `PWMEN3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PWMEN3R {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PWMEN3R::_0 => false,
                    PWMEN3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PWMEN3R {
                match value {
                    false => PWMEN3R::_0,
                    true => PWMEN3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PWMEN3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PWMEN3R::_1
            }
        }
        #[doc = "Possible values of the field `PWMEN4`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PWMEN4R {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN4R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PWMEN4R::_0 => false,
                    PWMEN4R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PWMEN4R {
                match value {
                    false => PWMEN4R::_0,
                    true => PWMEN4R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PWMEN4R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PWMEN4R::_1
            }
        }
        #[doc = "Possible values of the field `PWMEN5`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PWMEN5R {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN5R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PWMEN5R::_0 => false,
                    PWMEN5R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PWMEN5R {
                match value {
                    false => PWMEN5R::_0,
                    true => PWMEN5R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PWMEN5R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PWMEN5R::_1
            }
        }
        #[doc = "Possible values of the field `PWMEN6`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PWMEN6R {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN6R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PWMEN6R::_0 => false,
                    PWMEN6R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PWMEN6R {
                match value {
                    false => PWMEN6R::_0,
                    true => PWMEN6R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PWMEN6R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PWMEN6R::_1
            }
        }
        #[doc = "Possible values of the field `PWMEN7`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PWMEN7R {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN7R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PWMEN7R::_0 => false,
                    PWMEN7R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PWMEN7R {
                match value {
                    false => PWMEN7R::_0,
                    true => PWMEN7R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PWMEN7R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PWMEN7R::_1
            }
        }
        #[doc = "Possible values of the field `FLTPS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FLTPSR {
            #[doc = "Divide by 1"]
            _0000,
            #[doc = "Divide by 2"]
            _0001,
            #[doc = "Divide by 3"]
            _0010,
            #[doc = "Divide by 4"]
            _0011,
            #[doc = "Divide by 5"]
            _0100,
            #[doc = "Divide by 6"]
            _0101,
            #[doc = "Divide by 7"]
            _0110,
            #[doc = "Divide by 8"]
            _0111,
            #[doc = "Divide by 9"]
            _1000,
            #[doc = "Divide by 10"]
            _1001,
            #[doc = "Divide by 11"]
            _1010,
            #[doc = "Divide by 12"]
            _1011,
            #[doc = "Divide by 13"]
            _1100,
            #[doc = "Divide by 14"]
            _1101,
            #[doc = "Divide by 15"]
            _1110,
            #[doc = "Divide by 16"]
            _1111,
        }
        impl FLTPSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    FLTPSR::_0000 => 0,
                    FLTPSR::_0001 => 1,
                    FLTPSR::_0010 => 2,
                    FLTPSR::_0011 => 3,
                    FLTPSR::_0100 => 4,
                    FLTPSR::_0101 => 5,
                    FLTPSR::_0110 => 6,
                    FLTPSR::_0111 => 7,
                    FLTPSR::_1000 => 8,
                    FLTPSR::_1001 => 9,
                    FLTPSR::_1010 => 10,
                    FLTPSR::_1011 => 11,
                    FLTPSR::_1100 => 12,
                    FLTPSR::_1101 => 13,
                    FLTPSR::_1110 => 14,
                    FLTPSR::_1111 => 15,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> FLTPSR {
                match value {
                    0 => FLTPSR::_0000,
                    1 => FLTPSR::_0001,
                    2 => FLTPSR::_0010,
                    3 => FLTPSR::_0011,
                    4 => FLTPSR::_0100,
                    5 => FLTPSR::_0101,
                    6 => FLTPSR::_0110,
                    7 => FLTPSR::_0111,
                    8 => FLTPSR::_1000,
                    9 => FLTPSR::_1001,
                    10 => FLTPSR::_1010,
                    11 => FLTPSR::_1011,
                    12 => FLTPSR::_1100,
                    13 => FLTPSR::_1101,
                    14 => FLTPSR::_1110,
                    15 => FLTPSR::_1111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == FLTPSR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == FLTPSR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == FLTPSR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == FLTPSR::_0011
            }
            #[doc = "Checks if the value of the field is `_0100`"]
            #[inline(always)]
            pub fn is_0100(&self) -> bool {
                *self == FLTPSR::_0100
            }
            #[doc = "Checks if the value of the field is `_0101`"]
            #[inline(always)]
            pub fn is_0101(&self) -> bool {
                *self == FLTPSR::_0101
            }
            #[doc = "Checks if the value of the field is `_0110`"]
            #[inline(always)]
            pub fn is_0110(&self) -> bool {
                *self == FLTPSR::_0110
            }
            #[doc = "Checks if the value of the field is `_0111`"]
            #[inline(always)]
            pub fn is_0111(&self) -> bool {
                *self == FLTPSR::_0111
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == FLTPSR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == FLTPSR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == FLTPSR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == FLTPSR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == FLTPSR::_1100
            }
            #[doc = "Checks if the value of the field is `_1101`"]
            #[inline(always)]
            pub fn is_1101(&self) -> bool {
                *self == FLTPSR::_1101
            }
            #[doc = "Checks if the value of the field is `_1110`"]
            #[inline(always)]
            pub fn is_1110(&self) -> bool {
                *self == FLTPSR::_1110
            }
            #[doc = "Checks if the value of the field is `_1111`"]
            #[inline(always)]
            pub fn is_1111(&self) -> bool {
                *self == FLTPSR::_1111
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Divide by 1"]
            _000,
            #[doc = "Divide by 2"]
            _001,
            #[doc = "Divide by 4"]
            _010,
            #[doc = "Divide by 8"]
            _011,
            #[doc = "Divide by 16"]
            _100,
            #[doc = "Divide by 32"]
            _101,
            #[doc = "Divide by 64"]
            _110,
            #[doc = "Divide by 128"]
            _111,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PSW::_000 => 0,
                    PSW::_001 => 1,
                    PSW::_010 => 2,
                    PSW::_011 => 3,
                    PSW::_100 => 4,
                    PSW::_101 => 5,
                    PSW::_110 => 6,
                    PSW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Divide by 1"]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(PSW::_000)
            }
            #[doc = "Divide by 2"]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(PSW::_001)
            }
            #[doc = "Divide by 4"]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(PSW::_010)
            }
            #[doc = "Divide by 8"]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(PSW::_011)
            }
            #[doc = "Divide by 16"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(PSW::_100)
            }
            #[doc = "Divide by 32"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(PSW::_101)
            }
            #[doc = "Divide by 64"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(PSW::_110)
            }
            #[doc = "Divide by 128"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(PSW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CLKS`"]
        pub enum CLKSW {
            #[doc = "No clock selected. This in effect disables the FTM counter."]
            _00,
            #[doc = "FTM input clock"]
            _01,
            #[doc = "Fixed frequency clock"]
            _10,
            #[doc = "External clock"]
            _11,
        }
        impl CLKSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    CLKSW::_00 => 0,
                    CLKSW::_01 => 1,
                    CLKSW::_10 => 2,
                    CLKSW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLKSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLKSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CLKSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "No clock selected. This in effect disables the FTM counter."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(CLKSW::_00)
            }
            #[doc = "FTM input clock"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(CLKSW::_01)
            }
            #[doc = "Fixed frequency clock"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(CLKSW::_10)
            }
            #[doc = "External clock"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(CLKSW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CPWMS`"]
        pub enum CPWMSW {
            #[doc = "FTM counter operates in Up Counting mode."]
            _0,
            #[doc = "FTM counter operates in Up-Down Counting mode."]
            _1,
        }
        impl CPWMSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CPWMSW::_0 => false,
                    CPWMSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CPWMSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CPWMSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CPWMSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM counter operates in Up Counting mode."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CPWMSW::_0)
            }
            #[doc = "FTM counter operates in Up-Down Counting mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CPWMSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RIE`"]
        pub enum RIEW {
            #[doc = "Reload point interrupt is disabled."]
            _0,
            #[doc = "Reload point interrupt is enabled."]
            _1,
        }
        impl RIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RIEW::_0 => false,
                    RIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Reload point interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RIEW::_0)
            }
            #[doc = "Reload point interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TOIE`"]
        pub enum TOIEW {
            #[doc = "Disable TOF interrupts. Use software polling."]
            _0,
            #[doc = "Enable TOF interrupts. An interrupt is generated when TOF equals one."]
            _1,
        }
        impl TOIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TOIEW::_0 => false,
                    TOIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TOIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TOIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TOIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable TOF interrupts. Use software polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TOIEW::_0)
            }
            #[doc = "Enable TOF interrupts. An interrupt is generated when TOF equals one."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TOIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PWMEN0`"]
        pub enum PWMEN0W {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PWMEN0W::_0 => false,
                    PWMEN0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PWMEN0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _PWMEN0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PWMEN0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output port is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PWMEN0W::_0)
            }
            #[doc = "Channel output port is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PWMEN0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PWMEN1`"]
        pub enum PWMEN1W {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PWMEN1W::_0 => false,
                    PWMEN1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PWMEN1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _PWMEN1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PWMEN1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output port is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PWMEN1W::_0)
            }
            #[doc = "Channel output port is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PWMEN1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PWMEN2`"]
        pub enum PWMEN2W {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PWMEN2W::_0 => false,
                    PWMEN2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PWMEN2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _PWMEN2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PWMEN2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output port is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PWMEN2W::_0)
            }
            #[doc = "Channel output port is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PWMEN2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PWMEN3`"]
        pub enum PWMEN3W {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PWMEN3W::_0 => false,
                    PWMEN3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PWMEN3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _PWMEN3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PWMEN3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output port is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PWMEN3W::_0)
            }
            #[doc = "Channel output port is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PWMEN3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 19;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PWMEN4`"]
        pub enum PWMEN4W {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN4W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PWMEN4W::_0 => false,
                    PWMEN4W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PWMEN4W<'a> {
            w: &'a mut W,
        }
        impl<'a> _PWMEN4W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PWMEN4W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output port is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PWMEN4W::_0)
            }
            #[doc = "Channel output port is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PWMEN4W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PWMEN5`"]
        pub enum PWMEN5W {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN5W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PWMEN5W::_0 => false,
                    PWMEN5W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PWMEN5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _PWMEN5W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PWMEN5W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output port is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PWMEN5W::_0)
            }
            #[doc = "Channel output port is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PWMEN5W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 21;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PWMEN6`"]
        pub enum PWMEN6W {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN6W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PWMEN6W::_0 => false,
                    PWMEN6W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PWMEN6W<'a> {
            w: &'a mut W,
        }
        impl<'a> _PWMEN6W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PWMEN6W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output port is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PWMEN6W::_0)
            }
            #[doc = "Channel output port is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PWMEN6W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 22;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PWMEN7`"]
        pub enum PWMEN7W {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN7W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PWMEN7W::_0 => false,
                    PWMEN7W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PWMEN7W<'a> {
            w: &'a mut W,
        }
        impl<'a> _PWMEN7W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PWMEN7W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output port is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PWMEN7W::_0)
            }
            #[doc = "Channel output port is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PWMEN7W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 23;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FLTPS`"]
        pub enum FLTPSW {
            #[doc = "Divide by 1"]
            _0000,
            #[doc = "Divide by 2"]
            _0001,
            #[doc = "Divide by 3"]
            _0010,
            #[doc = "Divide by 4"]
            _0011,
            #[doc = "Divide by 5"]
            _0100,
            #[doc = "Divide by 6"]
            _0101,
            #[doc = "Divide by 7"]
            _0110,
            #[doc = "Divide by 8"]
            _0111,
            #[doc = "Divide by 9"]
            _1000,
            #[doc = "Divide by 10"]
            _1001,
            #[doc = "Divide by 11"]
            _1010,
            #[doc = "Divide by 12"]
            _1011,
            #[doc = "Divide by 13"]
            _1100,
            #[doc = "Divide by 14"]
            _1101,
            #[doc = "Divide by 15"]
            _1110,
            #[doc = "Divide by 16"]
            _1111,
        }
        impl FLTPSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    FLTPSW::_0000 => 0,
                    FLTPSW::_0001 => 1,
                    FLTPSW::_0010 => 2,
                    FLTPSW::_0011 => 3,
                    FLTPSW::_0100 => 4,
                    FLTPSW::_0101 => 5,
                    FLTPSW::_0110 => 6,
                    FLTPSW::_0111 => 7,
                    FLTPSW::_1000 => 8,
                    FLTPSW::_1001 => 9,
                    FLTPSW::_1010 => 10,
                    FLTPSW::_1011 => 11,
                    FLTPSW::_1100 => 12,
                    FLTPSW::_1101 => 13,
                    FLTPSW::_1110 => 14,
                    FLTPSW::_1111 => 15,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FLTPSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FLTPSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FLTPSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Divide by 1"]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(FLTPSW::_0000)
            }
            #[doc = "Divide by 2"]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(FLTPSW::_0001)
            }
            #[doc = "Divide by 3"]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(FLTPSW::_0010)
            }
            #[doc = "Divide by 4"]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(FLTPSW::_0011)
            }
            #[doc = "Divide by 5"]
            #[inline(always)]
            pub fn _0100(self) -> &'a mut W {
                self.variant(FLTPSW::_0100)
            }
            #[doc = "Divide by 6"]
            #[inline(always)]
            pub fn _0101(self) -> &'a mut W {
                self.variant(FLTPSW::_0101)
            }
            #[doc = "Divide by 7"]
            #[inline(always)]
            pub fn _0110(self) -> &'a mut W {
                self.variant(FLTPSW::_0110)
            }
            #[doc = "Divide by 8"]
            #[inline(always)]
            pub fn _0111(self) -> &'a mut W {
                self.variant(FLTPSW::_0111)
            }
            #[doc = "Divide by 9"]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(FLTPSW::_1000)
            }
            #[doc = "Divide by 10"]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(FLTPSW::_1001)
            }
            #[doc = "Divide by 11"]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(FLTPSW::_1010)
            }
            #[doc = "Divide by 12"]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(FLTPSW::_1011)
            }
            #[doc = "Divide by 13"]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(FLTPSW::_1100)
            }
            #[doc = "Divide by 14"]
            #[inline(always)]
            pub fn _1101(self) -> &'a mut W {
                self.variant(FLTPSW::_1101)
            }
            #[doc = "Divide by 15"]
            #[inline(always)]
            pub fn _1110(self) -> &'a mut W {
                self.variant(FLTPSW::_1110)
            }
            #[doc = "Divide by 16"]
            #[inline(always)]
            pub fn _1111(self) -> &'a mut W {
                self.variant(FLTPSW::_1111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:2 - Prescale Factor Selection"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 3:4 - Clock Source Selection"]
            #[inline(always)]
            pub fn clks(&self) -> CLKSR {
                CLKSR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 5 - Center-Aligned PWM Select"]
            #[inline(always)]
            pub fn cpwms(&self) -> CPWMSR {
                CPWMSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Reload Point Interrupt Enable"]
            #[inline(always)]
            pub fn rie(&self) -> RIER {
                RIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Reload Flag"]
            #[inline(always)]
            pub fn rf(&self) -> RFR {
                RFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Timer Overflow Interrupt Enable"]
            #[inline(always)]
            pub fn toie(&self) -> TOIER {
                TOIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Timer Overflow Flag"]
            #[inline(always)]
            pub fn tof(&self) -> TOFR {
                TOFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 16 - Channel 0 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen0(&self) -> PWMEN0R {
                PWMEN0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - Channel 1 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen1(&self) -> PWMEN1R {
                PWMEN1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 18 - Channel 2 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen2(&self) -> PWMEN2R {
                PWMEN2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 19 - Channel 3 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen3(&self) -> PWMEN3R {
                PWMEN3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 19;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 20 - Channel 4 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen4(&self) -> PWMEN4R {
                PWMEN4R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - Channel 5 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen5(&self) -> PWMEN5R {
                PWMEN5R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 22 - Channel 6 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen6(&self) -> PWMEN6R {
                PWMEN6R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 23 - Channel 7 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen7(&self) -> PWMEN7R {
                PWMEN7R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 24:27 - Filter Prescaler"]
            #[inline(always)]
            pub fn fltps(&self) -> FLTPSR {
                FLTPSR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:2 - Prescale Factor Selection"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bits 3:4 - Clock Source Selection"]
            #[inline(always)]
            pub fn clks(&mut self) -> _CLKSW {
                _CLKSW { w: self }
            }
            #[doc = "Bit 5 - Center-Aligned PWM Select"]
            #[inline(always)]
            pub fn cpwms(&mut self) -> _CPWMSW {
                _CPWMSW { w: self }
            }
            #[doc = "Bit 6 - Reload Point Interrupt Enable"]
            #[inline(always)]
            pub fn rie(&mut self) -> _RIEW {
                _RIEW { w: self }
            }
            #[doc = "Bit 8 - Timer Overflow Interrupt Enable"]
            #[inline(always)]
            pub fn toie(&mut self) -> _TOIEW {
                _TOIEW { w: self }
            }
            #[doc = "Bit 16 - Channel 0 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen0(&mut self) -> _PWMEN0W {
                _PWMEN0W { w: self }
            }
            #[doc = "Bit 17 - Channel 1 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen1(&mut self) -> _PWMEN1W {
                _PWMEN1W { w: self }
            }
            #[doc = "Bit 18 - Channel 2 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen2(&mut self) -> _PWMEN2W {
                _PWMEN2W { w: self }
            }
            #[doc = "Bit 19 - Channel 3 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen3(&mut self) -> _PWMEN3W {
                _PWMEN3W { w: self }
            }
            #[doc = "Bit 20 - Channel 4 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen4(&mut self) -> _PWMEN4W {
                _PWMEN4W { w: self }
            }
            #[doc = "Bit 21 - Channel 5 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen5(&mut self) -> _PWMEN5W {
                _PWMEN5W { w: self }
            }
            #[doc = "Bit 22 - Channel 6 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen6(&mut self) -> _PWMEN6W {
                _PWMEN6W { w: self }
            }
            #[doc = "Bit 23 - Channel 7 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen7(&mut self) -> _PWMEN7W {
                _PWMEN7W { w: self }
            }
            #[doc = "Bits 24:27 - Filter Prescaler"]
            #[inline(always)]
            pub fn fltps(&mut self) -> _FLTPSW {
                _FLTPSW { w: self }
            }
        }
    }
    #[doc = "Counter"]
    pub struct CNT {
        register: VolatileCell<u32>,
    }
    #[doc = "Counter"]
    pub mod cnt {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CNT {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct COUNTR {
            bits: u16,
        }
        impl COUNTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _COUNTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _COUNTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Counter Value"]
            #[inline(always)]
            pub fn count(&self) -> COUNTR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                COUNTR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Counter Value"]
            #[inline(always)]
            pub fn count(&mut self) -> _COUNTW {
                _COUNTW { w: self }
            }
        }
    }
    #[doc = "Modulo"]
    pub struct MOD {
        register: VolatileCell<u32>,
    }
    #[doc = "Modulo"]
    pub mod mod_ {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::MOD {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MODR {
            bits: u16,
        }
        impl MODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MODW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - MOD"]
            #[inline(always)]
            pub fn mod_(&self) -> MODR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                MODR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - MOD"]
            #[inline(always)]
            pub fn mod_(&mut self) -> _MODW {
                _MODW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Status And Control"]
    pub struct C0SC {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Status And Control"]
    pub mod c0sc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C0SC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DMA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMAR {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMAR::_0 => false,
                    DMAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMAR {
                match value {
                    false => DMAR::_0,
                    true => DMAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMAR::_1
            }
        }
        #[doc = "Possible values of the field `ICRST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ICRSTR {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ICRSTR::_0 => false,
                    ICRSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ICRSTR {
                match value {
                    false => ICRSTR::_0,
                    true => ICRSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ICRSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ICRSTR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSAR {
            bits: bool,
        }
        impl ELSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSBR {
            bits: bool,
        }
        impl ELSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSAR {
            bits: bool,
        }
        impl MSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSBR {
            bits: bool,
        }
        impl MSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `CHIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHIER {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHIER::_0 => false,
                    CHIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHIER {
                match value {
                    false => CHIER::_0,
                    true => CHIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHIER::_1
            }
        }
        #[doc = "Possible values of the field `CHF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHFR {
            #[doc = "No channel (n) event has occurred."]
            _0,
            #[doc = "A channel (n) event has occurred."]
            _1,
        }
        impl CHFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHFR::_0 => false,
                    CHFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHFR {
                match value {
                    false => CHFR::_0,
                    true => CHFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHFR::_1
            }
        }
        #[doc = "Possible values of the field `TRIGMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGMODER {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGMODER::_0 => false,
                    TRIGMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGMODER {
                match value {
                    false => TRIGMODER::_0,
                    true => TRIGMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGMODER::_1
            }
        }
        #[doc = "Possible values of the field `CHIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHISR {
            #[doc = "The channel (n) input is zero."]
            _0,
            #[doc = "The channel (n) input is one."]
            _1,
        }
        impl CHISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHISR::_0 => false,
                    CHISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHISR {
                match value {
                    false => CHISR::_0,
                    true => CHISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHISR::_1
            }
        }
        #[doc = "Possible values of the field `CHOV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHOVR {
            #[doc = "The channel (n) output is zero."]
            _0,
            #[doc = "The channel (n) output is one."]
            _1,
        }
        impl CHOVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHOVR::_0 => false,
                    CHOVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHOVR {
                match value {
                    false => CHOVR::_0,
                    true => CHOVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHOVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHOVR::_1
            }
        }
        #[doc = "Values that can be written to the field `DMA`"]
        pub enum DMAW {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMAW::_0 => false,
                    DMAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable DMA transfers."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMAW::_0)
            }
            #[doc = "Enable DMA transfers."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ICRST`"]
        pub enum ICRSTW {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ICRSTW::_0 => false,
                    ICRSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ICRSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ICRSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ICRSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ICRSTW::_0)
            }
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ICRSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CHIE`"]
        pub enum CHIEW {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CHIEW::_0 => false,
                    CHIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CHIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CHIEW::_0)
            }
            #[doc = "Enable channel (n) interrupt."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CHIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIGMODE`"]
        pub enum TRIGMODEW {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGMODEW::_0 => false,
                    TRIGMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGMODEW::_0)
            }
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&self) -> DMAR {
                DMAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&self) -> ICRSTR {
                ICRSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&self) -> ELSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSAR { bits }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&self) -> ELSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSBR { bits }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&self) -> MSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSAR { bits }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&self) -> MSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSBR { bits }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&self) -> CHIER {
                CHIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel (n) Flag"]
            #[inline(always)]
            pub fn chf(&self) -> CHFR {
                CHFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&self) -> TRIGMODER {
                TRIGMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Channel (n) Input State"]
            #[inline(always)]
            pub fn chis(&self) -> CHISR {
                CHISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Channel (n) Output Value"]
            #[inline(always)]
            pub fn chov(&self) -> CHOVR {
                CHOVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&mut self) -> _DMAW {
                _DMAW { w: self }
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&mut self) -> _ICRSTW {
                _ICRSTW { w: self }
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&mut self) -> _ELSAW {
                _ELSAW { w: self }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&mut self) -> _ELSBW {
                _ELSBW { w: self }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&mut self) -> _MSAW {
                _MSAW { w: self }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&mut self) -> _MSBW {
                _MSBW { w: self }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&mut self) -> _CHIEW {
                _CHIEW { w: self }
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&mut self) -> _TRIGMODEW {
                _TRIGMODEW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Value"]
    pub struct C0V {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Value"]
    pub mod c0v {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C0V {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct VALR {
            bits: u16,
        }
        impl VALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _VALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _VALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&self) -> VALR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                VALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&mut self) -> _VALW {
                _VALW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Status And Control"]
    pub struct C1SC {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Status And Control"]
    pub mod c1sc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C1SC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DMA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMAR {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMAR::_0 => false,
                    DMAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMAR {
                match value {
                    false => DMAR::_0,
                    true => DMAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMAR::_1
            }
        }
        #[doc = "Possible values of the field `ICRST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ICRSTR {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ICRSTR::_0 => false,
                    ICRSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ICRSTR {
                match value {
                    false => ICRSTR::_0,
                    true => ICRSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ICRSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ICRSTR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSAR {
            bits: bool,
        }
        impl ELSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSBR {
            bits: bool,
        }
        impl ELSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSAR {
            bits: bool,
        }
        impl MSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSBR {
            bits: bool,
        }
        impl MSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `CHIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHIER {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHIER::_0 => false,
                    CHIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHIER {
                match value {
                    false => CHIER::_0,
                    true => CHIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHIER::_1
            }
        }
        #[doc = "Possible values of the field `CHF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHFR {
            #[doc = "No channel (n) event has occurred."]
            _0,
            #[doc = "A channel (n) event has occurred."]
            _1,
        }
        impl CHFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHFR::_0 => false,
                    CHFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHFR {
                match value {
                    false => CHFR::_0,
                    true => CHFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHFR::_1
            }
        }
        #[doc = "Possible values of the field `TRIGMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGMODER {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGMODER::_0 => false,
                    TRIGMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGMODER {
                match value {
                    false => TRIGMODER::_0,
                    true => TRIGMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGMODER::_1
            }
        }
        #[doc = "Possible values of the field `CHIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHISR {
            #[doc = "The channel (n) input is zero."]
            _0,
            #[doc = "The channel (n) input is one."]
            _1,
        }
        impl CHISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHISR::_0 => false,
                    CHISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHISR {
                match value {
                    false => CHISR::_0,
                    true => CHISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHISR::_1
            }
        }
        #[doc = "Possible values of the field `CHOV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHOVR {
            #[doc = "The channel (n) output is zero."]
            _0,
            #[doc = "The channel (n) output is one."]
            _1,
        }
        impl CHOVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHOVR::_0 => false,
                    CHOVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHOVR {
                match value {
                    false => CHOVR::_0,
                    true => CHOVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHOVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHOVR::_1
            }
        }
        #[doc = "Values that can be written to the field `DMA`"]
        pub enum DMAW {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMAW::_0 => false,
                    DMAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable DMA transfers."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMAW::_0)
            }
            #[doc = "Enable DMA transfers."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ICRST`"]
        pub enum ICRSTW {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ICRSTW::_0 => false,
                    ICRSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ICRSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ICRSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ICRSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ICRSTW::_0)
            }
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ICRSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CHIE`"]
        pub enum CHIEW {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CHIEW::_0 => false,
                    CHIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CHIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CHIEW::_0)
            }
            #[doc = "Enable channel (n) interrupt."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CHIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIGMODE`"]
        pub enum TRIGMODEW {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGMODEW::_0 => false,
                    TRIGMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGMODEW::_0)
            }
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&self) -> DMAR {
                DMAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&self) -> ICRSTR {
                ICRSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&self) -> ELSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSAR { bits }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&self) -> ELSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSBR { bits }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&self) -> MSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSAR { bits }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&self) -> MSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSBR { bits }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&self) -> CHIER {
                CHIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel (n) Flag"]
            #[inline(always)]
            pub fn chf(&self) -> CHFR {
                CHFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&self) -> TRIGMODER {
                TRIGMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Channel (n) Input State"]
            #[inline(always)]
            pub fn chis(&self) -> CHISR {
                CHISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Channel (n) Output Value"]
            #[inline(always)]
            pub fn chov(&self) -> CHOVR {
                CHOVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&mut self) -> _DMAW {
                _DMAW { w: self }
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&mut self) -> _ICRSTW {
                _ICRSTW { w: self }
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&mut self) -> _ELSAW {
                _ELSAW { w: self }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&mut self) -> _ELSBW {
                _ELSBW { w: self }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&mut self) -> _MSAW {
                _MSAW { w: self }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&mut self) -> _MSBW {
                _MSBW { w: self }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&mut self) -> _CHIEW {
                _CHIEW { w: self }
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&mut self) -> _TRIGMODEW {
                _TRIGMODEW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Value"]
    pub struct C1V {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Value"]
    pub mod c1v {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C1V {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct VALR {
            bits: u16,
        }
        impl VALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _VALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _VALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&self) -> VALR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                VALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&mut self) -> _VALW {
                _VALW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Status And Control"]
    pub struct C2SC {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Status And Control"]
    pub mod c2sc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C2SC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DMA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMAR {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMAR::_0 => false,
                    DMAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMAR {
                match value {
                    false => DMAR::_0,
                    true => DMAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMAR::_1
            }
        }
        #[doc = "Possible values of the field `ICRST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ICRSTR {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ICRSTR::_0 => false,
                    ICRSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ICRSTR {
                match value {
                    false => ICRSTR::_0,
                    true => ICRSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ICRSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ICRSTR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSAR {
            bits: bool,
        }
        impl ELSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSBR {
            bits: bool,
        }
        impl ELSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSAR {
            bits: bool,
        }
        impl MSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSBR {
            bits: bool,
        }
        impl MSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `CHIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHIER {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHIER::_0 => false,
                    CHIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHIER {
                match value {
                    false => CHIER::_0,
                    true => CHIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHIER::_1
            }
        }
        #[doc = "Possible values of the field `CHF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHFR {
            #[doc = "No channel (n) event has occurred."]
            _0,
            #[doc = "A channel (n) event has occurred."]
            _1,
        }
        impl CHFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHFR::_0 => false,
                    CHFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHFR {
                match value {
                    false => CHFR::_0,
                    true => CHFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHFR::_1
            }
        }
        #[doc = "Possible values of the field `TRIGMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGMODER {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGMODER::_0 => false,
                    TRIGMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGMODER {
                match value {
                    false => TRIGMODER::_0,
                    true => TRIGMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGMODER::_1
            }
        }
        #[doc = "Possible values of the field `CHIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHISR {
            #[doc = "The channel (n) input is zero."]
            _0,
            #[doc = "The channel (n) input is one."]
            _1,
        }
        impl CHISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHISR::_0 => false,
                    CHISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHISR {
                match value {
                    false => CHISR::_0,
                    true => CHISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHISR::_1
            }
        }
        #[doc = "Possible values of the field `CHOV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHOVR {
            #[doc = "The channel (n) output is zero."]
            _0,
            #[doc = "The channel (n) output is one."]
            _1,
        }
        impl CHOVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHOVR::_0 => false,
                    CHOVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHOVR {
                match value {
                    false => CHOVR::_0,
                    true => CHOVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHOVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHOVR::_1
            }
        }
        #[doc = "Values that can be written to the field `DMA`"]
        pub enum DMAW {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMAW::_0 => false,
                    DMAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable DMA transfers."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMAW::_0)
            }
            #[doc = "Enable DMA transfers."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ICRST`"]
        pub enum ICRSTW {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ICRSTW::_0 => false,
                    ICRSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ICRSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ICRSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ICRSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ICRSTW::_0)
            }
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ICRSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CHIE`"]
        pub enum CHIEW {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CHIEW::_0 => false,
                    CHIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CHIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CHIEW::_0)
            }
            #[doc = "Enable channel (n) interrupt."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CHIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIGMODE`"]
        pub enum TRIGMODEW {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGMODEW::_0 => false,
                    TRIGMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGMODEW::_0)
            }
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&self) -> DMAR {
                DMAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&self) -> ICRSTR {
                ICRSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&self) -> ELSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSAR { bits }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&self) -> ELSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSBR { bits }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&self) -> MSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSAR { bits }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&self) -> MSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSBR { bits }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&self) -> CHIER {
                CHIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel (n) Flag"]
            #[inline(always)]
            pub fn chf(&self) -> CHFR {
                CHFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&self) -> TRIGMODER {
                TRIGMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Channel (n) Input State"]
            #[inline(always)]
            pub fn chis(&self) -> CHISR {
                CHISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Channel (n) Output Value"]
            #[inline(always)]
            pub fn chov(&self) -> CHOVR {
                CHOVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&mut self) -> _DMAW {
                _DMAW { w: self }
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&mut self) -> _ICRSTW {
                _ICRSTW { w: self }
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&mut self) -> _ELSAW {
                _ELSAW { w: self }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&mut self) -> _ELSBW {
                _ELSBW { w: self }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&mut self) -> _MSAW {
                _MSAW { w: self }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&mut self) -> _MSBW {
                _MSBW { w: self }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&mut self) -> _CHIEW {
                _CHIEW { w: self }
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&mut self) -> _TRIGMODEW {
                _TRIGMODEW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Value"]
    pub struct C2V {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Value"]
    pub mod c2v {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C2V {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct VALR {
            bits: u16,
        }
        impl VALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _VALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _VALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&self) -> VALR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                VALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&mut self) -> _VALW {
                _VALW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Status And Control"]
    pub struct C3SC {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Status And Control"]
    pub mod c3sc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C3SC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DMA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMAR {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMAR::_0 => false,
                    DMAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMAR {
                match value {
                    false => DMAR::_0,
                    true => DMAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMAR::_1
            }
        }
        #[doc = "Possible values of the field `ICRST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ICRSTR {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ICRSTR::_0 => false,
                    ICRSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ICRSTR {
                match value {
                    false => ICRSTR::_0,
                    true => ICRSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ICRSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ICRSTR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSAR {
            bits: bool,
        }
        impl ELSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSBR {
            bits: bool,
        }
        impl ELSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSAR {
            bits: bool,
        }
        impl MSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSBR {
            bits: bool,
        }
        impl MSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `CHIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHIER {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHIER::_0 => false,
                    CHIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHIER {
                match value {
                    false => CHIER::_0,
                    true => CHIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHIER::_1
            }
        }
        #[doc = "Possible values of the field `CHF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHFR {
            #[doc = "No channel (n) event has occurred."]
            _0,
            #[doc = "A channel (n) event has occurred."]
            _1,
        }
        impl CHFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHFR::_0 => false,
                    CHFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHFR {
                match value {
                    false => CHFR::_0,
                    true => CHFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHFR::_1
            }
        }
        #[doc = "Possible values of the field `TRIGMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGMODER {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGMODER::_0 => false,
                    TRIGMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGMODER {
                match value {
                    false => TRIGMODER::_0,
                    true => TRIGMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGMODER::_1
            }
        }
        #[doc = "Possible values of the field `CHIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHISR {
            #[doc = "The channel (n) input is zero."]
            _0,
            #[doc = "The channel (n) input is one."]
            _1,
        }
        impl CHISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHISR::_0 => false,
                    CHISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHISR {
                match value {
                    false => CHISR::_0,
                    true => CHISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHISR::_1
            }
        }
        #[doc = "Possible values of the field `CHOV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHOVR {
            #[doc = "The channel (n) output is zero."]
            _0,
            #[doc = "The channel (n) output is one."]
            _1,
        }
        impl CHOVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHOVR::_0 => false,
                    CHOVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHOVR {
                match value {
                    false => CHOVR::_0,
                    true => CHOVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHOVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHOVR::_1
            }
        }
        #[doc = "Values that can be written to the field `DMA`"]
        pub enum DMAW {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMAW::_0 => false,
                    DMAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable DMA transfers."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMAW::_0)
            }
            #[doc = "Enable DMA transfers."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ICRST`"]
        pub enum ICRSTW {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ICRSTW::_0 => false,
                    ICRSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ICRSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ICRSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ICRSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ICRSTW::_0)
            }
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ICRSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CHIE`"]
        pub enum CHIEW {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CHIEW::_0 => false,
                    CHIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CHIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CHIEW::_0)
            }
            #[doc = "Enable channel (n) interrupt."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CHIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIGMODE`"]
        pub enum TRIGMODEW {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGMODEW::_0 => false,
                    TRIGMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGMODEW::_0)
            }
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&self) -> DMAR {
                DMAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&self) -> ICRSTR {
                ICRSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&self) -> ELSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSAR { bits }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&self) -> ELSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSBR { bits }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&self) -> MSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSAR { bits }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&self) -> MSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSBR { bits }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&self) -> CHIER {
                CHIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel (n) Flag"]
            #[inline(always)]
            pub fn chf(&self) -> CHFR {
                CHFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&self) -> TRIGMODER {
                TRIGMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Channel (n) Input State"]
            #[inline(always)]
            pub fn chis(&self) -> CHISR {
                CHISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Channel (n) Output Value"]
            #[inline(always)]
            pub fn chov(&self) -> CHOVR {
                CHOVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&mut self) -> _DMAW {
                _DMAW { w: self }
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&mut self) -> _ICRSTW {
                _ICRSTW { w: self }
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&mut self) -> _ELSAW {
                _ELSAW { w: self }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&mut self) -> _ELSBW {
                _ELSBW { w: self }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&mut self) -> _MSAW {
                _MSAW { w: self }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&mut self) -> _MSBW {
                _MSBW { w: self }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&mut self) -> _CHIEW {
                _CHIEW { w: self }
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&mut self) -> _TRIGMODEW {
                _TRIGMODEW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Value"]
    pub struct C3V {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Value"]
    pub mod c3v {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C3V {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct VALR {
            bits: u16,
        }
        impl VALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _VALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _VALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&self) -> VALR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                VALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&mut self) -> _VALW {
                _VALW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Status And Control"]
    pub struct C4SC {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Status And Control"]
    pub mod c4sc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C4SC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DMA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMAR {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMAR::_0 => false,
                    DMAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMAR {
                match value {
                    false => DMAR::_0,
                    true => DMAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMAR::_1
            }
        }
        #[doc = "Possible values of the field `ICRST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ICRSTR {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ICRSTR::_0 => false,
                    ICRSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ICRSTR {
                match value {
                    false => ICRSTR::_0,
                    true => ICRSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ICRSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ICRSTR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSAR {
            bits: bool,
        }
        impl ELSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSBR {
            bits: bool,
        }
        impl ELSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSAR {
            bits: bool,
        }
        impl MSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSBR {
            bits: bool,
        }
        impl MSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `CHIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHIER {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHIER::_0 => false,
                    CHIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHIER {
                match value {
                    false => CHIER::_0,
                    true => CHIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHIER::_1
            }
        }
        #[doc = "Possible values of the field `CHF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHFR {
            #[doc = "No channel (n) event has occurred."]
            _0,
            #[doc = "A channel (n) event has occurred."]
            _1,
        }
        impl CHFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHFR::_0 => false,
                    CHFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHFR {
                match value {
                    false => CHFR::_0,
                    true => CHFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHFR::_1
            }
        }
        #[doc = "Possible values of the field `TRIGMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGMODER {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGMODER::_0 => false,
                    TRIGMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGMODER {
                match value {
                    false => TRIGMODER::_0,
                    true => TRIGMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGMODER::_1
            }
        }
        #[doc = "Possible values of the field `CHIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHISR {
            #[doc = "The channel (n) input is zero."]
            _0,
            #[doc = "The channel (n) input is one."]
            _1,
        }
        impl CHISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHISR::_0 => false,
                    CHISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHISR {
                match value {
                    false => CHISR::_0,
                    true => CHISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHISR::_1
            }
        }
        #[doc = "Possible values of the field `CHOV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHOVR {
            #[doc = "The channel (n) output is zero."]
            _0,
            #[doc = "The channel (n) output is one."]
            _1,
        }
        impl CHOVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHOVR::_0 => false,
                    CHOVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHOVR {
                match value {
                    false => CHOVR::_0,
                    true => CHOVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHOVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHOVR::_1
            }
        }
        #[doc = "Values that can be written to the field `DMA`"]
        pub enum DMAW {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMAW::_0 => false,
                    DMAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable DMA transfers."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMAW::_0)
            }
            #[doc = "Enable DMA transfers."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ICRST`"]
        pub enum ICRSTW {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ICRSTW::_0 => false,
                    ICRSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ICRSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ICRSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ICRSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ICRSTW::_0)
            }
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ICRSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CHIE`"]
        pub enum CHIEW {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CHIEW::_0 => false,
                    CHIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CHIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CHIEW::_0)
            }
            #[doc = "Enable channel (n) interrupt."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CHIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIGMODE`"]
        pub enum TRIGMODEW {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGMODEW::_0 => false,
                    TRIGMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGMODEW::_0)
            }
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&self) -> DMAR {
                DMAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&self) -> ICRSTR {
                ICRSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&self) -> ELSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSAR { bits }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&self) -> ELSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSBR { bits }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&self) -> MSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSAR { bits }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&self) -> MSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSBR { bits }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&self) -> CHIER {
                CHIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel (n) Flag"]
            #[inline(always)]
            pub fn chf(&self) -> CHFR {
                CHFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&self) -> TRIGMODER {
                TRIGMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Channel (n) Input State"]
            #[inline(always)]
            pub fn chis(&self) -> CHISR {
                CHISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Channel (n) Output Value"]
            #[inline(always)]
            pub fn chov(&self) -> CHOVR {
                CHOVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&mut self) -> _DMAW {
                _DMAW { w: self }
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&mut self) -> _ICRSTW {
                _ICRSTW { w: self }
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&mut self) -> _ELSAW {
                _ELSAW { w: self }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&mut self) -> _ELSBW {
                _ELSBW { w: self }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&mut self) -> _MSAW {
                _MSAW { w: self }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&mut self) -> _MSBW {
                _MSBW { w: self }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&mut self) -> _CHIEW {
                _CHIEW { w: self }
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&mut self) -> _TRIGMODEW {
                _TRIGMODEW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Value"]
    pub struct C4V {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Value"]
    pub mod c4v {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C4V {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct VALR {
            bits: u16,
        }
        impl VALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _VALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _VALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&self) -> VALR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                VALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&mut self) -> _VALW {
                _VALW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Status And Control"]
    pub struct C5SC {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Status And Control"]
    pub mod c5sc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C5SC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DMA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMAR {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMAR::_0 => false,
                    DMAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMAR {
                match value {
                    false => DMAR::_0,
                    true => DMAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMAR::_1
            }
        }
        #[doc = "Possible values of the field `ICRST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ICRSTR {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ICRSTR::_0 => false,
                    ICRSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ICRSTR {
                match value {
                    false => ICRSTR::_0,
                    true => ICRSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ICRSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ICRSTR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSAR {
            bits: bool,
        }
        impl ELSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSBR {
            bits: bool,
        }
        impl ELSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSAR {
            bits: bool,
        }
        impl MSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSBR {
            bits: bool,
        }
        impl MSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `CHIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHIER {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHIER::_0 => false,
                    CHIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHIER {
                match value {
                    false => CHIER::_0,
                    true => CHIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHIER::_1
            }
        }
        #[doc = "Possible values of the field `CHF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHFR {
            #[doc = "No channel (n) event has occurred."]
            _0,
            #[doc = "A channel (n) event has occurred."]
            _1,
        }
        impl CHFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHFR::_0 => false,
                    CHFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHFR {
                match value {
                    false => CHFR::_0,
                    true => CHFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHFR::_1
            }
        }
        #[doc = "Possible values of the field `TRIGMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGMODER {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGMODER::_0 => false,
                    TRIGMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGMODER {
                match value {
                    false => TRIGMODER::_0,
                    true => TRIGMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGMODER::_1
            }
        }
        #[doc = "Possible values of the field `CHIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHISR {
            #[doc = "The channel (n) input is zero."]
            _0,
            #[doc = "The channel (n) input is one."]
            _1,
        }
        impl CHISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHISR::_0 => false,
                    CHISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHISR {
                match value {
                    false => CHISR::_0,
                    true => CHISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHISR::_1
            }
        }
        #[doc = "Possible values of the field `CHOV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHOVR {
            #[doc = "The channel (n) output is zero."]
            _0,
            #[doc = "The channel (n) output is one."]
            _1,
        }
        impl CHOVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHOVR::_0 => false,
                    CHOVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHOVR {
                match value {
                    false => CHOVR::_0,
                    true => CHOVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHOVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHOVR::_1
            }
        }
        #[doc = "Values that can be written to the field `DMA`"]
        pub enum DMAW {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMAW::_0 => false,
                    DMAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable DMA transfers."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMAW::_0)
            }
            #[doc = "Enable DMA transfers."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ICRST`"]
        pub enum ICRSTW {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ICRSTW::_0 => false,
                    ICRSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ICRSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ICRSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ICRSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ICRSTW::_0)
            }
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ICRSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CHIE`"]
        pub enum CHIEW {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CHIEW::_0 => false,
                    CHIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CHIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CHIEW::_0)
            }
            #[doc = "Enable channel (n) interrupt."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CHIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIGMODE`"]
        pub enum TRIGMODEW {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGMODEW::_0 => false,
                    TRIGMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGMODEW::_0)
            }
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&self) -> DMAR {
                DMAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&self) -> ICRSTR {
                ICRSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&self) -> ELSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSAR { bits }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&self) -> ELSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSBR { bits }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&self) -> MSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSAR { bits }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&self) -> MSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSBR { bits }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&self) -> CHIER {
                CHIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel (n) Flag"]
            #[inline(always)]
            pub fn chf(&self) -> CHFR {
                CHFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&self) -> TRIGMODER {
                TRIGMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Channel (n) Input State"]
            #[inline(always)]
            pub fn chis(&self) -> CHISR {
                CHISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Channel (n) Output Value"]
            #[inline(always)]
            pub fn chov(&self) -> CHOVR {
                CHOVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&mut self) -> _DMAW {
                _DMAW { w: self }
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&mut self) -> _ICRSTW {
                _ICRSTW { w: self }
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&mut self) -> _ELSAW {
                _ELSAW { w: self }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&mut self) -> _ELSBW {
                _ELSBW { w: self }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&mut self) -> _MSAW {
                _MSAW { w: self }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&mut self) -> _MSBW {
                _MSBW { w: self }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&mut self) -> _CHIEW {
                _CHIEW { w: self }
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&mut self) -> _TRIGMODEW {
                _TRIGMODEW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Value"]
    pub struct C5V {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Value"]
    pub mod c5v {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C5V {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct VALR {
            bits: u16,
        }
        impl VALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _VALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _VALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&self) -> VALR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                VALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&mut self) -> _VALW {
                _VALW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Status And Control"]
    pub struct C6SC {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Status And Control"]
    pub mod c6sc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C6SC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DMA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMAR {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMAR::_0 => false,
                    DMAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMAR {
                match value {
                    false => DMAR::_0,
                    true => DMAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMAR::_1
            }
        }
        #[doc = "Possible values of the field `ICRST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ICRSTR {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ICRSTR::_0 => false,
                    ICRSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ICRSTR {
                match value {
                    false => ICRSTR::_0,
                    true => ICRSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ICRSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ICRSTR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSAR {
            bits: bool,
        }
        impl ELSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSBR {
            bits: bool,
        }
        impl ELSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSAR {
            bits: bool,
        }
        impl MSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSBR {
            bits: bool,
        }
        impl MSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `CHIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHIER {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHIER::_0 => false,
                    CHIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHIER {
                match value {
                    false => CHIER::_0,
                    true => CHIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHIER::_1
            }
        }
        #[doc = "Possible values of the field `CHF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHFR {
            #[doc = "No channel (n) event has occurred."]
            _0,
            #[doc = "A channel (n) event has occurred."]
            _1,
        }
        impl CHFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHFR::_0 => false,
                    CHFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHFR {
                match value {
                    false => CHFR::_0,
                    true => CHFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHFR::_1
            }
        }
        #[doc = "Possible values of the field `TRIGMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGMODER {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGMODER::_0 => false,
                    TRIGMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGMODER {
                match value {
                    false => TRIGMODER::_0,
                    true => TRIGMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGMODER::_1
            }
        }
        #[doc = "Possible values of the field `CHIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHISR {
            #[doc = "The channel (n) input is zero."]
            _0,
            #[doc = "The channel (n) input is one."]
            _1,
        }
        impl CHISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHISR::_0 => false,
                    CHISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHISR {
                match value {
                    false => CHISR::_0,
                    true => CHISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHISR::_1
            }
        }
        #[doc = "Possible values of the field `CHOV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHOVR {
            #[doc = "The channel (n) output is zero."]
            _0,
            #[doc = "The channel (n) output is one."]
            _1,
        }
        impl CHOVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHOVR::_0 => false,
                    CHOVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHOVR {
                match value {
                    false => CHOVR::_0,
                    true => CHOVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHOVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHOVR::_1
            }
        }
        #[doc = "Values that can be written to the field `DMA`"]
        pub enum DMAW {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMAW::_0 => false,
                    DMAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable DMA transfers."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMAW::_0)
            }
            #[doc = "Enable DMA transfers."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ICRST`"]
        pub enum ICRSTW {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ICRSTW::_0 => false,
                    ICRSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ICRSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ICRSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ICRSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ICRSTW::_0)
            }
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ICRSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CHIE`"]
        pub enum CHIEW {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CHIEW::_0 => false,
                    CHIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CHIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CHIEW::_0)
            }
            #[doc = "Enable channel (n) interrupt."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CHIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIGMODE`"]
        pub enum TRIGMODEW {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGMODEW::_0 => false,
                    TRIGMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGMODEW::_0)
            }
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&self) -> DMAR {
                DMAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&self) -> ICRSTR {
                ICRSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&self) -> ELSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSAR { bits }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&self) -> ELSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSBR { bits }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&self) -> MSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSAR { bits }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&self) -> MSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSBR { bits }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&self) -> CHIER {
                CHIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel (n) Flag"]
            #[inline(always)]
            pub fn chf(&self) -> CHFR {
                CHFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&self) -> TRIGMODER {
                TRIGMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Channel (n) Input State"]
            #[inline(always)]
            pub fn chis(&self) -> CHISR {
                CHISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Channel (n) Output Value"]
            #[inline(always)]
            pub fn chov(&self) -> CHOVR {
                CHOVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&mut self) -> _DMAW {
                _DMAW { w: self }
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&mut self) -> _ICRSTW {
                _ICRSTW { w: self }
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&mut self) -> _ELSAW {
                _ELSAW { w: self }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&mut self) -> _ELSBW {
                _ELSBW { w: self }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&mut self) -> _MSAW {
                _MSAW { w: self }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&mut self) -> _MSBW {
                _MSBW { w: self }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&mut self) -> _CHIEW {
                _CHIEW { w: self }
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&mut self) -> _TRIGMODEW {
                _TRIGMODEW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Value"]
    pub struct C6V {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Value"]
    pub mod c6v {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C6V {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct VALR {
            bits: u16,
        }
        impl VALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _VALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _VALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&self) -> VALR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                VALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&mut self) -> _VALW {
                _VALW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Status And Control"]
    pub struct C7SC {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Status And Control"]
    pub mod c7sc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C7SC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DMA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMAR {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMAR::_0 => false,
                    DMAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMAR {
                match value {
                    false => DMAR::_0,
                    true => DMAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMAR::_1
            }
        }
        #[doc = "Possible values of the field `ICRST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ICRSTR {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ICRSTR::_0 => false,
                    ICRSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ICRSTR {
                match value {
                    false => ICRSTR::_0,
                    true => ICRSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ICRSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ICRSTR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSAR {
            bits: bool,
        }
        impl ELSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSBR {
            bits: bool,
        }
        impl ELSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSAR {
            bits: bool,
        }
        impl MSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSBR {
            bits: bool,
        }
        impl MSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `CHIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHIER {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHIER::_0 => false,
                    CHIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHIER {
                match value {
                    false => CHIER::_0,
                    true => CHIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHIER::_1
            }
        }
        #[doc = "Possible values of the field `CHF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHFR {
            #[doc = "No channel (n) event has occurred."]
            _0,
            #[doc = "A channel (n) event has occurred."]
            _1,
        }
        impl CHFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHFR::_0 => false,
                    CHFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHFR {
                match value {
                    false => CHFR::_0,
                    true => CHFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHFR::_1
            }
        }
        #[doc = "Possible values of the field `TRIGMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGMODER {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGMODER::_0 => false,
                    TRIGMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGMODER {
                match value {
                    false => TRIGMODER::_0,
                    true => TRIGMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGMODER::_1
            }
        }
        #[doc = "Possible values of the field `CHIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHISR {
            #[doc = "The channel (n) input is zero."]
            _0,
            #[doc = "The channel (n) input is one."]
            _1,
        }
        impl CHISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHISR::_0 => false,
                    CHISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHISR {
                match value {
                    false => CHISR::_0,
                    true => CHISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHISR::_1
            }
        }
        #[doc = "Possible values of the field `CHOV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHOVR {
            #[doc = "The channel (n) output is zero."]
            _0,
            #[doc = "The channel (n) output is one."]
            _1,
        }
        impl CHOVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHOVR::_0 => false,
                    CHOVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHOVR {
                match value {
                    false => CHOVR::_0,
                    true => CHOVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHOVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHOVR::_1
            }
        }
        #[doc = "Values that can be written to the field `DMA`"]
        pub enum DMAW {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMAW::_0 => false,
                    DMAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable DMA transfers."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMAW::_0)
            }
            #[doc = "Enable DMA transfers."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ICRST`"]
        pub enum ICRSTW {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ICRSTW::_0 => false,
                    ICRSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ICRSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ICRSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ICRSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ICRSTW::_0)
            }
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ICRSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CHIE`"]
        pub enum CHIEW {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CHIEW::_0 => false,
                    CHIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CHIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CHIEW::_0)
            }
            #[doc = "Enable channel (n) interrupt."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CHIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIGMODE`"]
        pub enum TRIGMODEW {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGMODEW::_0 => false,
                    TRIGMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGMODEW::_0)
            }
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&self) -> DMAR {
                DMAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&self) -> ICRSTR {
                ICRSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&self) -> ELSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSAR { bits }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&self) -> ELSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSBR { bits }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&self) -> MSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSAR { bits }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&self) -> MSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSBR { bits }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&self) -> CHIER {
                CHIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel (n) Flag"]
            #[inline(always)]
            pub fn chf(&self) -> CHFR {
                CHFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&self) -> TRIGMODER {
                TRIGMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Channel (n) Input State"]
            #[inline(always)]
            pub fn chis(&self) -> CHISR {
                CHISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Channel (n) Output Value"]
            #[inline(always)]
            pub fn chov(&self) -> CHOVR {
                CHOVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&mut self) -> _DMAW {
                _DMAW { w: self }
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&mut self) -> _ICRSTW {
                _ICRSTW { w: self }
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&mut self) -> _ELSAW {
                _ELSAW { w: self }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&mut self) -> _ELSBW {
                _ELSBW { w: self }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&mut self) -> _MSAW {
                _MSAW { w: self }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&mut self) -> _MSBW {
                _MSBW { w: self }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&mut self) -> _CHIEW {
                _CHIEW { w: self }
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&mut self) -> _TRIGMODEW {
                _TRIGMODEW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Value"]
    pub struct C7V {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Value"]
    pub mod c7v {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C7V {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct VALR {
            bits: u16,
        }
        impl VALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _VALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _VALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&self) -> VALR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                VALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&mut self) -> _VALW {
                _VALW { w: self }
            }
        }
    }
    #[doc = "Counter Initial Value"]
    pub struct CNTIN {
        register: VolatileCell<u32>,
    }
    #[doc = "Counter Initial Value"]
    pub mod cntin {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CNTIN {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct INITR {
            bits: u16,
        }
        impl INITR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _INITW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INITW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - INIT"]
            #[inline(always)]
            pub fn init(&self) -> INITR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                INITR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - INIT"]
            #[inline(always)]
            pub fn init(&mut self) -> _INITW {
                _INITW { w: self }
            }
        }
    }
    #[doc = "Capture And Compare Status"]
    pub struct STATUS {
        register: VolatileCell<u32>,
    }
    #[doc = "Capture And Compare Status"]
    pub mod status {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::STATUS {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = "Possible values of the field `CH0F`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH0FR {
            #[doc = "No channel event has occurred."]
            _0,
            #[doc = "A channel event has occurred."]
            _1,
        }
        impl CH0FR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH0FR::_0 => false,
                    CH0FR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH0FR {
                match value {
                    false => CH0FR::_0,
                    true => CH0FR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH0FR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH0FR::_1
            }
        }
        #[doc = "Possible values of the field `CH1F`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH1FR {
            #[doc = "No channel event has occurred."]
            _0,
            #[doc = "A channel event has occurred."]
            _1,
        }
        impl CH1FR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH1FR::_0 => false,
                    CH1FR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH1FR {
                match value {
                    false => CH1FR::_0,
                    true => CH1FR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH1FR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH1FR::_1
            }
        }
        #[doc = "Possible values of the field `CH2F`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH2FR {
            #[doc = "No channel event has occurred."]
            _0,
            #[doc = "A channel event has occurred."]
            _1,
        }
        impl CH2FR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH2FR::_0 => false,
                    CH2FR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH2FR {
                match value {
                    false => CH2FR::_0,
                    true => CH2FR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH2FR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH2FR::_1
            }
        }
        #[doc = "Possible values of the field `CH3F`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH3FR {
            #[doc = "No channel event has occurred."]
            _0,
            #[doc = "A channel event has occurred."]
            _1,
        }
        impl CH3FR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH3FR::_0 => false,
                    CH3FR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH3FR {
                match value {
                    false => CH3FR::_0,
                    true => CH3FR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH3FR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH3FR::_1
            }
        }
        #[doc = "Possible values of the field `CH4F`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH4FR {
            #[doc = "No channel event has occurred."]
            _0,
            #[doc = "A channel event has occurred."]
            _1,
        }
        impl CH4FR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH4FR::_0 => false,
                    CH4FR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH4FR {
                match value {
                    false => CH4FR::_0,
                    true => CH4FR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH4FR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH4FR::_1
            }
        }
        #[doc = "Possible values of the field `CH5F`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH5FR {
            #[doc = "No channel event has occurred."]
            _0,
            #[doc = "A channel event has occurred."]
            _1,
        }
        impl CH5FR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH5FR::_0 => false,
                    CH5FR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH5FR {
                match value {
                    false => CH5FR::_0,
                    true => CH5FR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH5FR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH5FR::_1
            }
        }
        #[doc = "Possible values of the field `CH6F`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH6FR {
            #[doc = "No channel event has occurred."]
            _0,
            #[doc = "A channel event has occurred."]
            _1,
        }
        impl CH6FR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH6FR::_0 => false,
                    CH6FR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH6FR {
                match value {
                    false => CH6FR::_0,
                    true => CH6FR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH6FR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH6FR::_1
            }
        }
        #[doc = "Possible values of the field `CH7F`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH7FR {
            #[doc = "No channel event has occurred."]
            _0,
            #[doc = "A channel event has occurred."]
            _1,
        }
        impl CH7FR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH7FR::_0 => false,
                    CH7FR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH7FR {
                match value {
                    false => CH7FR::_0,
                    true => CH7FR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH7FR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH7FR::_1
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Channel 0 Flag"]
            #[inline(always)]
            pub fn ch0f(&self) -> CH0FR {
                CH0FR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Channel 1 Flag"]
            #[inline(always)]
            pub fn ch1f(&self) -> CH1FR {
                CH1FR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel 2 Flag"]
            #[inline(always)]
            pub fn ch2f(&self) -> CH2FR {
                CH2FR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Channel 3 Flag"]
            #[inline(always)]
            pub fn ch3f(&self) -> CH3FR {
                CH3FR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Channel 4 Flag"]
            #[inline(always)]
            pub fn ch4f(&self) -> CH4FR {
                CH4FR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Channel 5 Flag"]
            #[inline(always)]
            pub fn ch5f(&self) -> CH5FR {
                CH5FR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Channel 6 Flag"]
            #[inline(always)]
            pub fn ch6f(&self) -> CH6FR {
                CH6FR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel 7 Flag"]
            #[inline(always)]
            pub fn ch7f(&self) -> CH7FR {
                CH7FR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
    }
    #[doc = "Features Mode Selection"]
    pub struct MODE {
        register: VolatileCell<u32>,
    }
    #[doc = "Features Mode Selection"]
    pub mod mode {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::MODE {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `FTMEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FTMENR {
            #[doc = "TPM compatibility. Free running counter and synchronization compatible with TPM."]
            _0,
            #[doc = "Free running counter and synchronization are different from TPM behavior."]
            _1,
        }
        impl FTMENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FTMENR::_0 => false,
                    FTMENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FTMENR {
                match value {
                    false => FTMENR::_0,
                    true => FTMENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FTMENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FTMENR::_1
            }
        }
        #[doc = "Possible values of the field `WPDIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WPDISR {
            #[doc = "Write protection is enabled."]
            _0,
            #[doc = "Write protection is disabled."]
            _1,
        }
        impl WPDISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WPDISR::_0 => false,
                    WPDISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WPDISR {
                match value {
                    false => WPDISR::_0,
                    true => WPDISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WPDISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WPDISR::_1
            }
        }
        #[doc = "Possible values of the field `PWMSYNC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PWMSYNCR {
            #[doc = "No restrictions. Software and hardware triggers can be used by MOD, CnV, OUTMASK, and FTM counter synchronization."]
            _0,
            #[doc = "Software trigger can only be used by MOD and CnV synchronization, and hardware triggers can only be used by OUTMASK and FTM counter synchronization."]
            _1,
        }
        impl PWMSYNCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PWMSYNCR::_0 => false,
                    PWMSYNCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PWMSYNCR {
                match value {
                    false => PWMSYNCR::_0,
                    true => PWMSYNCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PWMSYNCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PWMSYNCR::_1
            }
        }
        #[doc = "Possible values of the field `CAPTEST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CAPTESTR {
            #[doc = "Capture test mode is disabled."]
            _0,
            #[doc = "Capture test mode is enabled."]
            _1,
        }
        impl CAPTESTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CAPTESTR::_0 => false,
                    CAPTESTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CAPTESTR {
                match value {
                    false => CAPTESTR::_0,
                    true => CAPTESTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CAPTESTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CAPTESTR::_1
            }
        }
        #[doc = "Possible values of the field `FAULTM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTMR {
            #[doc = "Fault control is disabled for all channels."]
            _00,
            #[doc = "Fault control is enabled for even channels only (channels 0, 2, 4, and 6), and the selected mode is the manual fault clearing."]
            _01,
            #[doc = "Fault control is enabled for all channels, and the selected mode is the manual fault clearing."]
            _10,
            #[doc = "Fault control is enabled for all channels, and the selected mode is the automatic fault clearing."]
            _11,
        }
        impl FAULTMR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    FAULTMR::_00 => 0,
                    FAULTMR::_01 => 1,
                    FAULTMR::_10 => 2,
                    FAULTMR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> FAULTMR {
                match value {
                    0 => FAULTMR::_00,
                    1 => FAULTMR::_01,
                    2 => FAULTMR::_10,
                    3 => FAULTMR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == FAULTMR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == FAULTMR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == FAULTMR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == FAULTMR::_11
            }
        }
        #[doc = "Possible values of the field `FAULTIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTIER {
            #[doc = "Fault control interrupt is disabled."]
            _0,
            #[doc = "Fault control interrupt is enabled."]
            _1,
        }
        impl FAULTIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTIER::_0 => false,
                    FAULTIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTIER {
                match value {
                    false => FAULTIER::_0,
                    true => FAULTIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTIER::_1
            }
        }
        #[doc = "Values that can be written to the field `FTMEN`"]
        pub enum FTMENW {
            #[doc = "TPM compatibility. Free running counter and synchronization compatible with TPM."]
            _0,
            #[doc = "Free running counter and synchronization are different from TPM behavior."]
            _1,
        }
        impl FTMENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FTMENW::_0 => false,
                    FTMENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FTMENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FTMENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FTMENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "TPM compatibility. Free running counter and synchronization compatible with TPM."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FTMENW::_0)
            }
            #[doc = "Free running counter and synchronization are different from TPM behavior."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FTMENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _INITW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INITW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WPDIS`"]
        pub enum WPDISW {
            #[doc = "Write protection is enabled."]
            _0,
            #[doc = "Write protection is disabled."]
            _1,
        }
        impl WPDISW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WPDISW::_0 => false,
                    WPDISW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WPDISW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WPDISW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WPDISW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Write protection is enabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WPDISW::_0)
            }
            #[doc = "Write protection is disabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WPDISW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PWMSYNC`"]
        pub enum PWMSYNCW {
            #[doc = "No restrictions. Software and hardware triggers can be used by MOD, CnV, OUTMASK, and FTM counter synchronization."]
            _0,
            #[doc = "Software trigger can only be used by MOD and CnV synchronization, and hardware triggers can only be used by OUTMASK and FTM counter synchronization."]
            _1,
        }
        impl PWMSYNCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PWMSYNCW::_0 => false,
                    PWMSYNCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PWMSYNCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PWMSYNCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PWMSYNCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No restrictions. Software and hardware triggers can be used by MOD, CnV, OUTMASK, and FTM counter synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PWMSYNCW::_0)
            }
            #[doc = "Software trigger can only be used by MOD and CnV synchronization, and hardware triggers can only be used by OUTMASK and FTM counter synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PWMSYNCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CAPTEST`"]
        pub enum CAPTESTW {
            #[doc = "Capture test mode is disabled."]
            _0,
            #[doc = "Capture test mode is enabled."]
            _1,
        }
        impl CAPTESTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CAPTESTW::_0 => false,
                    CAPTESTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CAPTESTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CAPTESTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CAPTESTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Capture test mode is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CAPTESTW::_0)
            }
            #[doc = "Capture test mode is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CAPTESTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FAULTM`"]
        pub enum FAULTMW {
            #[doc = "Fault control is disabled for all channels."]
            _00,
            #[doc = "Fault control is enabled for even channels only (channels 0, 2, 4, and 6), and the selected mode is the manual fault clearing."]
            _01,
            #[doc = "Fault control is enabled for all channels, and the selected mode is the manual fault clearing."]
            _10,
            #[doc = "Fault control is enabled for all channels, and the selected mode is the automatic fault clearing."]
            _11,
        }
        impl FAULTMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    FAULTMW::_00 => 0,
                    FAULTMW::_01 => 1,
                    FAULTMW::_10 => 2,
                    FAULTMW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FAULTMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FAULTMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FAULTMW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Fault control is disabled for all channels."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(FAULTMW::_00)
            }
            #[doc = "Fault control is enabled for even channels only (channels 0, 2, 4, and 6), and the selected mode is the manual fault clearing."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(FAULTMW::_01)
            }
            #[doc = "Fault control is enabled for all channels, and the selected mode is the manual fault clearing."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(FAULTMW::_10)
            }
            #[doc = "Fault control is enabled for all channels, and the selected mode is the automatic fault clearing."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(FAULTMW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FAULTIE`"]
        pub enum FAULTIEW {
            #[doc = "Fault control interrupt is disabled."]
            _0,
            #[doc = "Fault control interrupt is enabled."]
            _1,
        }
        impl FAULTIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FAULTIEW::_0 => false,
                    FAULTIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FAULTIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FAULTIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FAULTIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Fault control interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FAULTIEW::_0)
            }
            #[doc = "Fault control interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FAULTIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - FTM Enable"]
            #[inline(always)]
            pub fn ftmen(&self) -> FTMENR {
                FTMENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Write Protection Disable"]
            #[inline(always)]
            pub fn wpdis(&self) -> WPDISR {
                WPDISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - PWM Synchronization Mode"]
            #[inline(always)]
            pub fn pwmsync(&self) -> PWMSYNCR {
                PWMSYNCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Capture Test Mode Enable"]
            #[inline(always)]
            pub fn captest(&self) -> CAPTESTR {
                CAPTESTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 5:6 - Fault Control Mode"]
            #[inline(always)]
            pub fn faultm(&self) -> FAULTMR {
                FAULTMR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 7 - Fault Interrupt Enable"]
            #[inline(always)]
            pub fn faultie(&self) -> FAULTIER {
                FAULTIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 4 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - FTM Enable"]
            #[inline(always)]
            pub fn ftmen(&mut self) -> _FTMENW {
                _FTMENW { w: self }
            }
            #[doc = "Bit 1 - Initialize The Channels Output"]
            #[inline(always)]
            pub fn init(&mut self) -> _INITW {
                _INITW { w: self }
            }
            #[doc = "Bit 2 - Write Protection Disable"]
            #[inline(always)]
            pub fn wpdis(&mut self) -> _WPDISW {
                _WPDISW { w: self }
            }
            #[doc = "Bit 3 - PWM Synchronization Mode"]
            #[inline(always)]
            pub fn pwmsync(&mut self) -> _PWMSYNCW {
                _PWMSYNCW { w: self }
            }
            #[doc = "Bit 4 - Capture Test Mode Enable"]
            #[inline(always)]
            pub fn captest(&mut self) -> _CAPTESTW {
                _CAPTESTW { w: self }
            }
            #[doc = "Bits 5:6 - Fault Control Mode"]
            #[inline(always)]
            pub fn faultm(&mut self) -> _FAULTMW {
                _FAULTMW { w: self }
            }
            #[doc = "Bit 7 - Fault Interrupt Enable"]
            #[inline(always)]
            pub fn faultie(&mut self) -> _FAULTIEW {
                _FAULTIEW { w: self }
            }
        }
    }
    #[doc = "Synchronization"]
    pub struct SYNC {
        register: VolatileCell<u32>,
    }
    #[doc = "Synchronization"]
    pub mod sync {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SYNC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CNTMIN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CNTMINR {
            #[doc = "The minimum loading point is disabled."]
            _0,
            #[doc = "The minimum loading point is enabled."]
            _1,
        }
        impl CNTMINR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CNTMINR::_0 => false,
                    CNTMINR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CNTMINR {
                match value {
                    false => CNTMINR::_0,
                    true => CNTMINR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CNTMINR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CNTMINR::_1
            }
        }
        #[doc = "Possible values of the field `CNTMAX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CNTMAXR {
            #[doc = "The maximum loading point is disabled."]
            _0,
            #[doc = "The maximum loading point is enabled."]
            _1,
        }
        impl CNTMAXR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CNTMAXR::_0 => false,
                    CNTMAXR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CNTMAXR {
                match value {
                    false => CNTMAXR::_0,
                    true => CNTMAXR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CNTMAXR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CNTMAXR::_1
            }
        }
        #[doc = "Possible values of the field `REINIT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum REINITR {
            #[doc = "FTM counter continues to count normally."]
            _0,
            #[doc = "FTM counter is updated with its initial value when the selected trigger is detected."]
            _1,
        }
        impl REINITR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    REINITR::_0 => false,
                    REINITR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> REINITR {
                match value {
                    false => REINITR::_0,
                    true => REINITR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == REINITR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == REINITR::_1
            }
        }
        #[doc = "Possible values of the field `SYNCHOM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SYNCHOMR {
            #[doc = "OUTMASK register is updated with the value of its buffer in all rising edges of the FTM input clock."]
            _0,
            #[doc = "OUTMASK register is updated with the value of its buffer only by the PWM synchronization."]
            _1,
        }
        impl SYNCHOMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SYNCHOMR::_0 => false,
                    SYNCHOMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SYNCHOMR {
                match value {
                    false => SYNCHOMR::_0,
                    true => SYNCHOMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SYNCHOMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SYNCHOMR::_1
            }
        }
        #[doc = "Possible values of the field `TRIG0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIG0R {
            #[doc = "Trigger is disabled."]
            _0,
            #[doc = "Trigger is enabled."]
            _1,
        }
        impl TRIG0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIG0R::_0 => false,
                    TRIG0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIG0R {
                match value {
                    false => TRIG0R::_0,
                    true => TRIG0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIG0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIG0R::_1
            }
        }
        #[doc = "Possible values of the field `TRIG1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIG1R {
            #[doc = "Trigger is disabled."]
            _0,
            #[doc = "Trigger is enabled."]
            _1,
        }
        impl TRIG1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIG1R::_0 => false,
                    TRIG1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIG1R {
                match value {
                    false => TRIG1R::_0,
                    true => TRIG1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIG1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIG1R::_1
            }
        }
        #[doc = "Possible values of the field `TRIG2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIG2R {
            #[doc = "Trigger is disabled."]
            _0,
            #[doc = "Trigger is enabled."]
            _1,
        }
        impl TRIG2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIG2R::_0 => false,
                    TRIG2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIG2R {
                match value {
                    false => TRIG2R::_0,
                    true => TRIG2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIG2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIG2R::_1
            }
        }
        #[doc = "Possible values of the field `SWSYNC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SWSYNCR {
            #[doc = "Software trigger is not selected."]
            _0,
            #[doc = "Software trigger is selected."]
            _1,
        }
        impl SWSYNCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SWSYNCR::_0 => false,
                    SWSYNCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SWSYNCR {
                match value {
                    false => SWSYNCR::_0,
                    true => SWSYNCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SWSYNCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SWSYNCR::_1
            }
        }
        #[doc = "Values that can be written to the field `CNTMIN`"]
        pub enum CNTMINW {
            #[doc = "The minimum loading point is disabled."]
            _0,
            #[doc = "The minimum loading point is enabled."]
            _1,
        }
        impl CNTMINW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CNTMINW::_0 => false,
                    CNTMINW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CNTMINW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CNTMINW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CNTMINW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minimum loading point is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CNTMINW::_0)
            }
            #[doc = "The minimum loading point is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CNTMINW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CNTMAX`"]
        pub enum CNTMAXW {
            #[doc = "The maximum loading point is disabled."]
            _0,
            #[doc = "The maximum loading point is enabled."]
            _1,
        }
        impl CNTMAXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CNTMAXW::_0 => false,
                    CNTMAXW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CNTMAXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CNTMAXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CNTMAXW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The maximum loading point is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CNTMAXW::_0)
            }
            #[doc = "The maximum loading point is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CNTMAXW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `REINIT`"]
        pub enum REINITW {
            #[doc = "FTM counter continues to count normally."]
            _0,
            #[doc = "FTM counter is updated with its initial value when the selected trigger is detected."]
            _1,
        }
        impl REINITW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    REINITW::_0 => false,
                    REINITW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _REINITW<'a> {
            w: &'a mut W,
        }
        impl<'a> _REINITW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: REINITW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM counter continues to count normally."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(REINITW::_0)
            }
            #[doc = "FTM counter is updated with its initial value when the selected trigger is detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(REINITW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SYNCHOM`"]
        pub enum SYNCHOMW {
            #[doc = "OUTMASK register is updated with the value of its buffer in all rising edges of the FTM input clock."]
            _0,
            #[doc = "OUTMASK register is updated with the value of its buffer only by the PWM synchronization."]
            _1,
        }
        impl SYNCHOMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SYNCHOMW::_0 => false,
                    SYNCHOMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SYNCHOMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SYNCHOMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SYNCHOMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "OUTMASK register is updated with the value of its buffer in all rising edges of the FTM input clock."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SYNCHOMW::_0)
            }
            #[doc = "OUTMASK register is updated with the value of its buffer only by the PWM synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SYNCHOMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIG0`"]
        pub enum TRIG0W {
            #[doc = "Trigger is disabled."]
            _0,
            #[doc = "Trigger is enabled."]
            _1,
        }
        impl TRIG0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIG0W::_0 => false,
                    TRIG0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIG0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIG0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIG0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIG0W::_0)
            }
            #[doc = "Trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIG0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIG1`"]
        pub enum TRIG1W {
            #[doc = "Trigger is disabled."]
            _0,
            #[doc = "Trigger is enabled."]
            _1,
        }
        impl TRIG1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIG1W::_0 => false,
                    TRIG1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIG1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIG1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIG1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIG1W::_0)
            }
            #[doc = "Trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIG1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIG2`"]
        pub enum TRIG2W {
            #[doc = "Trigger is disabled."]
            _0,
            #[doc = "Trigger is enabled."]
            _1,
        }
        impl TRIG2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIG2W::_0 => false,
                    TRIG2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIG2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIG2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIG2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIG2W::_0)
            }
            #[doc = "Trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIG2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SWSYNC`"]
        pub enum SWSYNCW {
            #[doc = "Software trigger is not selected."]
            _0,
            #[doc = "Software trigger is selected."]
            _1,
        }
        impl SWSYNCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SWSYNCW::_0 => false,
                    SWSYNCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SWSYNCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SWSYNCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SWSYNCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Software trigger is not selected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SWSYNCW::_0)
            }
            #[doc = "Software trigger is selected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SWSYNCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Minimum Loading Point Enable"]
            #[inline(always)]
            pub fn cntmin(&self) -> CNTMINR {
                CNTMINR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Maximum Loading Point Enable"]
            #[inline(always)]
            pub fn cntmax(&self) -> CNTMAXR {
                CNTMAXR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - FTM Counter Reinitialization by Synchronization"]
            #[inline(always)]
            pub fn reinit(&self) -> REINITR {
                REINITR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Output Mask Synchronization"]
            #[inline(always)]
            pub fn synchom(&self) -> SYNCHOMR {
                SYNCHOMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - PWM Synchronization Hardware Trigger 0"]
            #[inline(always)]
            pub fn trig0(&self) -> TRIG0R {
                TRIG0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - PWM Synchronization Hardware Trigger 1"]
            #[inline(always)]
            pub fn trig1(&self) -> TRIG1R {
                TRIG1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - PWM Synchronization Hardware Trigger 2"]
            #[inline(always)]
            pub fn trig2(&self) -> TRIG2R {
                TRIG2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - PWM Synchronization Software Trigger"]
            #[inline(always)]
            pub fn swsync(&self) -> SWSYNCR {
                SWSYNCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Minimum Loading Point Enable"]
            #[inline(always)]
            pub fn cntmin(&mut self) -> _CNTMINW {
                _CNTMINW { w: self }
            }
            #[doc = "Bit 1 - Maximum Loading Point Enable"]
            #[inline(always)]
            pub fn cntmax(&mut self) -> _CNTMAXW {
                _CNTMAXW { w: self }
            }
            #[doc = "Bit 2 - FTM Counter Reinitialization by Synchronization"]
            #[inline(always)]
            pub fn reinit(&mut self) -> _REINITW {
                _REINITW { w: self }
            }
            #[doc = "Bit 3 - Output Mask Synchronization"]
            #[inline(always)]
            pub fn synchom(&mut self) -> _SYNCHOMW {
                _SYNCHOMW { w: self }
            }
            #[doc = "Bit 4 - PWM Synchronization Hardware Trigger 0"]
            #[inline(always)]
            pub fn trig0(&mut self) -> _TRIG0W {
                _TRIG0W { w: self }
            }
            #[doc = "Bit 5 - PWM Synchronization Hardware Trigger 1"]
            #[inline(always)]
            pub fn trig1(&mut self) -> _TRIG1W {
                _TRIG1W { w: self }
            }
            #[doc = "Bit 6 - PWM Synchronization Hardware Trigger 2"]
            #[inline(always)]
            pub fn trig2(&mut self) -> _TRIG2W {
                _TRIG2W { w: self }
            }
            #[doc = "Bit 7 - PWM Synchronization Software Trigger"]
            #[inline(always)]
            pub fn swsync(&mut self) -> _SWSYNCW {
                _SWSYNCW { w: self }
            }
        }
    }
    #[doc = "Initial State For Channels Output"]
    pub struct OUTINIT {
        register: VolatileCell<u32>,
    }
    #[doc = "Initial State For Channels Output"]
    pub mod outinit {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::OUTINIT {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CH0OI`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH0OIR {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH0OIR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH0OIR::_0 => false,
                    CH0OIR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH0OIR {
                match value {
                    false => CH0OIR::_0,
                    true => CH0OIR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH0OIR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH0OIR::_1
            }
        }
        #[doc = "Possible values of the field `CH1OI`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH1OIR {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH1OIR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH1OIR::_0 => false,
                    CH1OIR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH1OIR {
                match value {
                    false => CH1OIR::_0,
                    true => CH1OIR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH1OIR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH1OIR::_1
            }
        }
        #[doc = "Possible values of the field `CH2OI`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH2OIR {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH2OIR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH2OIR::_0 => false,
                    CH2OIR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH2OIR {
                match value {
                    false => CH2OIR::_0,
                    true => CH2OIR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH2OIR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH2OIR::_1
            }
        }
        #[doc = "Possible values of the field `CH3OI`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH3OIR {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH3OIR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH3OIR::_0 => false,
                    CH3OIR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH3OIR {
                match value {
                    false => CH3OIR::_0,
                    true => CH3OIR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH3OIR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH3OIR::_1
            }
        }
        #[doc = "Possible values of the field `CH4OI`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH4OIR {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH4OIR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH4OIR::_0 => false,
                    CH4OIR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH4OIR {
                match value {
                    false => CH4OIR::_0,
                    true => CH4OIR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH4OIR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH4OIR::_1
            }
        }
        #[doc = "Possible values of the field `CH5OI`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH5OIR {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH5OIR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH5OIR::_0 => false,
                    CH5OIR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH5OIR {
                match value {
                    false => CH5OIR::_0,
                    true => CH5OIR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH5OIR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH5OIR::_1
            }
        }
        #[doc = "Possible values of the field `CH6OI`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH6OIR {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH6OIR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH6OIR::_0 => false,
                    CH6OIR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH6OIR {
                match value {
                    false => CH6OIR::_0,
                    true => CH6OIR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH6OIR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH6OIR::_1
            }
        }
        #[doc = "Possible values of the field `CH7OI`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH7OIR {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH7OIR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH7OIR::_0 => false,
                    CH7OIR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH7OIR {
                match value {
                    false => CH7OIR::_0,
                    true => CH7OIR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH7OIR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH7OIR::_1
            }
        }
        #[doc = "Values that can be written to the field `CH0OI`"]
        pub enum CH0OIW {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH0OIW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH0OIW::_0 => false,
                    CH0OIW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH0OIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH0OIW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH0OIW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The initialization value is 0."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH0OIW::_0)
            }
            #[doc = "The initialization value is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH0OIW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH1OI`"]
        pub enum CH1OIW {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH1OIW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH1OIW::_0 => false,
                    CH1OIW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH1OIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH1OIW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH1OIW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The initialization value is 0."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH1OIW::_0)
            }
            #[doc = "The initialization value is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH1OIW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH2OI`"]
        pub enum CH2OIW {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH2OIW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH2OIW::_0 => false,
                    CH2OIW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH2OIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH2OIW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH2OIW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The initialization value is 0."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH2OIW::_0)
            }
            #[doc = "The initialization value is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH2OIW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH3OI`"]
        pub enum CH3OIW {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH3OIW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH3OIW::_0 => false,
                    CH3OIW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH3OIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH3OIW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH3OIW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The initialization value is 0."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH3OIW::_0)
            }
            #[doc = "The initialization value is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH3OIW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH4OI`"]
        pub enum CH4OIW {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH4OIW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH4OIW::_0 => false,
                    CH4OIW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH4OIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH4OIW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH4OIW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The initialization value is 0."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH4OIW::_0)
            }
            #[doc = "The initialization value is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH4OIW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH5OI`"]
        pub enum CH5OIW {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH5OIW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH5OIW::_0 => false,
                    CH5OIW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH5OIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH5OIW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH5OIW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The initialization value is 0."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH5OIW::_0)
            }
            #[doc = "The initialization value is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH5OIW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH6OI`"]
        pub enum CH6OIW {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH6OIW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH6OIW::_0 => false,
                    CH6OIW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH6OIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH6OIW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH6OIW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The initialization value is 0."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH6OIW::_0)
            }
            #[doc = "The initialization value is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH6OIW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH7OI`"]
        pub enum CH7OIW {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH7OIW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH7OIW::_0 => false,
                    CH7OIW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH7OIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH7OIW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH7OIW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The initialization value is 0."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH7OIW::_0)
            }
            #[doc = "The initialization value is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH7OIW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Channel 0 Output Initialization Value"]
            #[inline(always)]
            pub fn ch0oi(&self) -> CH0OIR {
                CH0OIR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Channel 1 Output Initialization Value"]
            #[inline(always)]
            pub fn ch1oi(&self) -> CH1OIR {
                CH1OIR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel 2 Output Initialization Value"]
            #[inline(always)]
            pub fn ch2oi(&self) -> CH2OIR {
                CH2OIR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Channel 3 Output Initialization Value"]
            #[inline(always)]
            pub fn ch3oi(&self) -> CH3OIR {
                CH3OIR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Channel 4 Output Initialization Value"]
            #[inline(always)]
            pub fn ch4oi(&self) -> CH4OIR {
                CH4OIR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Channel 5 Output Initialization Value"]
            #[inline(always)]
            pub fn ch5oi(&self) -> CH5OIR {
                CH5OIR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Channel 6 Output Initialization Value"]
            #[inline(always)]
            pub fn ch6oi(&self) -> CH6OIR {
                CH6OIR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel 7 Output Initialization Value"]
            #[inline(always)]
            pub fn ch7oi(&self) -> CH7OIR {
                CH7OIR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Channel 0 Output Initialization Value"]
            #[inline(always)]
            pub fn ch0oi(&mut self) -> _CH0OIW {
                _CH0OIW { w: self }
            }
            #[doc = "Bit 1 - Channel 1 Output Initialization Value"]
            #[inline(always)]
            pub fn ch1oi(&mut self) -> _CH1OIW {
                _CH1OIW { w: self }
            }
            #[doc = "Bit 2 - Channel 2 Output Initialization Value"]
            #[inline(always)]
            pub fn ch2oi(&mut self) -> _CH2OIW {
                _CH2OIW { w: self }
            }
            #[doc = "Bit 3 - Channel 3 Output Initialization Value"]
            #[inline(always)]
            pub fn ch3oi(&mut self) -> _CH3OIW {
                _CH3OIW { w: self }
            }
            #[doc = "Bit 4 - Channel 4 Output Initialization Value"]
            #[inline(always)]
            pub fn ch4oi(&mut self) -> _CH4OIW {
                _CH4OIW { w: self }
            }
            #[doc = "Bit 5 - Channel 5 Output Initialization Value"]
            #[inline(always)]
            pub fn ch5oi(&mut self) -> _CH5OIW {
                _CH5OIW { w: self }
            }
            #[doc = "Bit 6 - Channel 6 Output Initialization Value"]
            #[inline(always)]
            pub fn ch6oi(&mut self) -> _CH6OIW {
                _CH6OIW { w: self }
            }
            #[doc = "Bit 7 - Channel 7 Output Initialization Value"]
            #[inline(always)]
            pub fn ch7oi(&mut self) -> _CH7OIW {
                _CH7OIW { w: self }
            }
        }
    }
    #[doc = "Output Mask"]
    pub struct OUTMASK {
        register: VolatileCell<u32>,
    }
    #[doc = "Output Mask"]
    pub mod outmask {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::OUTMASK {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CH0OM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH0OMR {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH0OMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH0OMR::_0 => false,
                    CH0OMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH0OMR {
                match value {
                    false => CH0OMR::_0,
                    true => CH0OMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH0OMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH0OMR::_1
            }
        }
        #[doc = "Possible values of the field `CH1OM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH1OMR {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH1OMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH1OMR::_0 => false,
                    CH1OMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH1OMR {
                match value {
                    false => CH1OMR::_0,
                    true => CH1OMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH1OMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH1OMR::_1
            }
        }
        #[doc = "Possible values of the field `CH2OM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH2OMR {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH2OMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH2OMR::_0 => false,
                    CH2OMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH2OMR {
                match value {
                    false => CH2OMR::_0,
                    true => CH2OMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH2OMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH2OMR::_1
            }
        }
        #[doc = "Possible values of the field `CH3OM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH3OMR {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH3OMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH3OMR::_0 => false,
                    CH3OMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH3OMR {
                match value {
                    false => CH3OMR::_0,
                    true => CH3OMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH3OMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH3OMR::_1
            }
        }
        #[doc = "Possible values of the field `CH4OM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH4OMR {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH4OMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH4OMR::_0 => false,
                    CH4OMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH4OMR {
                match value {
                    false => CH4OMR::_0,
                    true => CH4OMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH4OMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH4OMR::_1
            }
        }
        #[doc = "Possible values of the field `CH5OM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH5OMR {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH5OMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH5OMR::_0 => false,
                    CH5OMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH5OMR {
                match value {
                    false => CH5OMR::_0,
                    true => CH5OMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH5OMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH5OMR::_1
            }
        }
        #[doc = "Possible values of the field `CH6OM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH6OMR {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH6OMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH6OMR::_0 => false,
                    CH6OMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH6OMR {
                match value {
                    false => CH6OMR::_0,
                    true => CH6OMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH6OMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH6OMR::_1
            }
        }
        #[doc = "Possible values of the field `CH7OM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH7OMR {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH7OMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH7OMR::_0 => false,
                    CH7OMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH7OMR {
                match value {
                    false => CH7OMR::_0,
                    true => CH7OMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH7OMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH7OMR::_1
            }
        }
        #[doc = "Values that can be written to the field `CH0OM`"]
        pub enum CH0OMW {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH0OMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH0OMW::_0 => false,
                    CH0OMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH0OMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH0OMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH0OMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output is not masked. It continues to operate normally."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH0OMW::_0)
            }
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH0OMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH1OM`"]
        pub enum CH1OMW {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH1OMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH1OMW::_0 => false,
                    CH1OMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH1OMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH1OMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH1OMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output is not masked. It continues to operate normally."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH1OMW::_0)
            }
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH1OMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH2OM`"]
        pub enum CH2OMW {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH2OMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH2OMW::_0 => false,
                    CH2OMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH2OMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH2OMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH2OMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output is not masked. It continues to operate normally."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH2OMW::_0)
            }
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH2OMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH3OM`"]
        pub enum CH3OMW {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH3OMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH3OMW::_0 => false,
                    CH3OMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH3OMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH3OMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH3OMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output is not masked. It continues to operate normally."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH3OMW::_0)
            }
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH3OMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH4OM`"]
        pub enum CH4OMW {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH4OMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH4OMW::_0 => false,
                    CH4OMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH4OMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH4OMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH4OMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output is not masked. It continues to operate normally."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH4OMW::_0)
            }
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH4OMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH5OM`"]
        pub enum CH5OMW {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH5OMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH5OMW::_0 => false,
                    CH5OMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH5OMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH5OMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH5OMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output is not masked. It continues to operate normally."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH5OMW::_0)
            }
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH5OMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH6OM`"]
        pub enum CH6OMW {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH6OMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH6OMW::_0 => false,
                    CH6OMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH6OMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH6OMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH6OMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output is not masked. It continues to operate normally."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH6OMW::_0)
            }
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH6OMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH7OM`"]
        pub enum CH7OMW {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH7OMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH7OMW::_0 => false,
                    CH7OMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH7OMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH7OMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH7OMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output is not masked. It continues to operate normally."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH7OMW::_0)
            }
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH7OMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Channel 0 Output Mask"]
            #[inline(always)]
            pub fn ch0om(&self) -> CH0OMR {
                CH0OMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Channel 1 Output Mask"]
            #[inline(always)]
            pub fn ch1om(&self) -> CH1OMR {
                CH1OMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel 2 Output Mask"]
            #[inline(always)]
            pub fn ch2om(&self) -> CH2OMR {
                CH2OMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Channel 3 Output Mask"]
            #[inline(always)]
            pub fn ch3om(&self) -> CH3OMR {
                CH3OMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Channel 4 Output Mask"]
            #[inline(always)]
            pub fn ch4om(&self) -> CH4OMR {
                CH4OMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Channel 5 Output Mask"]
            #[inline(always)]
            pub fn ch5om(&self) -> CH5OMR {
                CH5OMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Channel 6 Output Mask"]
            #[inline(always)]
            pub fn ch6om(&self) -> CH6OMR {
                CH6OMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel 7 Output Mask"]
            #[inline(always)]
            pub fn ch7om(&self) -> CH7OMR {
                CH7OMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Channel 0 Output Mask"]
            #[inline(always)]
            pub fn ch0om(&mut self) -> _CH0OMW {
                _CH0OMW { w: self }
            }
            #[doc = "Bit 1 - Channel 1 Output Mask"]
            #[inline(always)]
            pub fn ch1om(&mut self) -> _CH1OMW {
                _CH1OMW { w: self }
            }
            #[doc = "Bit 2 - Channel 2 Output Mask"]
            #[inline(always)]
            pub fn ch2om(&mut self) -> _CH2OMW {
                _CH2OMW { w: self }
            }
            #[doc = "Bit 3 - Channel 3 Output Mask"]
            #[inline(always)]
            pub fn ch3om(&mut self) -> _CH3OMW {
                _CH3OMW { w: self }
            }
            #[doc = "Bit 4 - Channel 4 Output Mask"]
            #[inline(always)]
            pub fn ch4om(&mut self) -> _CH4OMW {
                _CH4OMW { w: self }
            }
            #[doc = "Bit 5 - Channel 5 Output Mask"]
            #[inline(always)]
            pub fn ch5om(&mut self) -> _CH5OMW {
                _CH5OMW { w: self }
            }
            #[doc = "Bit 6 - Channel 6 Output Mask"]
            #[inline(always)]
            pub fn ch6om(&mut self) -> _CH6OMW {
                _CH6OMW { w: self }
            }
            #[doc = "Bit 7 - Channel 7 Output Mask"]
            #[inline(always)]
            pub fn ch7om(&mut self) -> _CH7OMW {
                _CH7OMW { w: self }
            }
        }
    }
    #[doc = "Function For Linked Channels"]
    pub struct COMBINE {
        register: VolatileCell<u32>,
    }
    #[doc = "Function For Linked Channels"]
    pub mod combine {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::COMBINE {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct COMBINE0R {
            bits: bool,
        }
        impl COMBINE0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `COMP0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum COMP0R {
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            _0,
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            _1,
        }
        impl COMP0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    COMP0R::_0 => false,
                    COMP0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> COMP0R {
                match value {
                    false => COMP0R::_0,
                    true => COMP0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == COMP0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == COMP0R::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct DECAPEN0R {
            bits: bool,
        }
        impl DECAPEN0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `DECAP0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DECAP0R {
            #[doc = "The dual edge captures are inactive."]
            _0,
            #[doc = "The dual edge captures are active."]
            _1,
        }
        impl DECAP0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DECAP0R::_0 => false,
                    DECAP0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DECAP0R {
                match value {
                    false => DECAP0R::_0,
                    true => DECAP0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DECAP0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DECAP0R::_1
            }
        }
        #[doc = "Possible values of the field `DTEN0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DTEN0R {
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            _0,
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            _1,
        }
        impl DTEN0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DTEN0R::_0 => false,
                    DTEN0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DTEN0R {
                match value {
                    false => DTEN0R::_0,
                    true => DTEN0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DTEN0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DTEN0R::_1
            }
        }
        #[doc = "Possible values of the field `SYNCEN0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SYNCEN0R {
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            _0,
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            _1,
        }
        impl SYNCEN0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SYNCEN0R::_0 => false,
                    SYNCEN0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SYNCEN0R {
                match value {
                    false => SYNCEN0R::_0,
                    true => SYNCEN0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SYNCEN0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SYNCEN0R::_1
            }
        }
        #[doc = "Possible values of the field `FAULTEN0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTEN0R {
            #[doc = "The fault control in this pair of channels is disabled."]
            _0,
            #[doc = "The fault control in this pair of channels is enabled."]
            _1,
        }
        impl FAULTEN0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTEN0R::_0 => false,
                    FAULTEN0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTEN0R {
                match value {
                    false => FAULTEN0R::_0,
                    true => FAULTEN0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTEN0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTEN0R::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct MCOMBINE0R {
            bits: bool,
        }
        impl MCOMBINE0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct COMBINE1R {
            bits: bool,
        }
        impl COMBINE1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `COMP1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum COMP1R {
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            _0,
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            _1,
        }
        impl COMP1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    COMP1R::_0 => false,
                    COMP1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> COMP1R {
                match value {
                    false => COMP1R::_0,
                    true => COMP1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == COMP1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == COMP1R::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct DECAPEN1R {
            bits: bool,
        }
        impl DECAPEN1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `DECAP1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DECAP1R {
            #[doc = "The dual edge captures are inactive."]
            _0,
            #[doc = "The dual edge captures are active."]
            _1,
        }
        impl DECAP1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DECAP1R::_0 => false,
                    DECAP1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DECAP1R {
                match value {
                    false => DECAP1R::_0,
                    true => DECAP1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DECAP1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DECAP1R::_1
            }
        }
        #[doc = "Possible values of the field `DTEN1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DTEN1R {
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            _0,
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            _1,
        }
        impl DTEN1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DTEN1R::_0 => false,
                    DTEN1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DTEN1R {
                match value {
                    false => DTEN1R::_0,
                    true => DTEN1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DTEN1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DTEN1R::_1
            }
        }
        #[doc = "Possible values of the field `SYNCEN1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SYNCEN1R {
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            _0,
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            _1,
        }
        impl SYNCEN1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SYNCEN1R::_0 => false,
                    SYNCEN1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SYNCEN1R {
                match value {
                    false => SYNCEN1R::_0,
                    true => SYNCEN1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SYNCEN1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SYNCEN1R::_1
            }
        }
        #[doc = "Possible values of the field `FAULTEN1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTEN1R {
            #[doc = "The fault control in this pair of channels is disabled."]
            _0,
            #[doc = "The fault control in this pair of channels is enabled."]
            _1,
        }
        impl FAULTEN1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTEN1R::_0 => false,
                    FAULTEN1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTEN1R {
                match value {
                    false => FAULTEN1R::_0,
                    true => FAULTEN1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTEN1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTEN1R::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct MCOMBINE1R {
            bits: bool,
        }
        impl MCOMBINE1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct COMBINE2R {
            bits: bool,
        }
        impl COMBINE2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `COMP2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum COMP2R {
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            _0,
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            _1,
        }
        impl COMP2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    COMP2R::_0 => false,
                    COMP2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> COMP2R {
                match value {
                    false => COMP2R::_0,
                    true => COMP2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == COMP2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == COMP2R::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct DECAPEN2R {
            bits: bool,
        }
        impl DECAPEN2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `DECAP2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DECAP2R {
            #[doc = "The dual edge captures are inactive."]
            _0,
            #[doc = "The dual edge captures are active."]
            _1,
        }
        impl DECAP2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DECAP2R::_0 => false,
                    DECAP2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DECAP2R {
                match value {
                    false => DECAP2R::_0,
                    true => DECAP2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DECAP2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DECAP2R::_1
            }
        }
        #[doc = "Possible values of the field `DTEN2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DTEN2R {
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            _0,
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            _1,
        }
        impl DTEN2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DTEN2R::_0 => false,
                    DTEN2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DTEN2R {
                match value {
                    false => DTEN2R::_0,
                    true => DTEN2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DTEN2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DTEN2R::_1
            }
        }
        #[doc = "Possible values of the field `SYNCEN2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SYNCEN2R {
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            _0,
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            _1,
        }
        impl SYNCEN2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SYNCEN2R::_0 => false,
                    SYNCEN2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SYNCEN2R {
                match value {
                    false => SYNCEN2R::_0,
                    true => SYNCEN2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SYNCEN2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SYNCEN2R::_1
            }
        }
        #[doc = "Possible values of the field `FAULTEN2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTEN2R {
            #[doc = "The fault control in this pair of channels is disabled."]
            _0,
            #[doc = "The fault control in this pair of channels is enabled."]
            _1,
        }
        impl FAULTEN2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTEN2R::_0 => false,
                    FAULTEN2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTEN2R {
                match value {
                    false => FAULTEN2R::_0,
                    true => FAULTEN2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTEN2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTEN2R::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct MCOMBINE2R {
            bits: bool,
        }
        impl MCOMBINE2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct COMBINE3R {
            bits: bool,
        }
        impl COMBINE3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `COMP3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum COMP3R {
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            _0,
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            _1,
        }
        impl COMP3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    COMP3R::_0 => false,
                    COMP3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> COMP3R {
                match value {
                    false => COMP3R::_0,
                    true => COMP3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == COMP3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == COMP3R::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct DECAPEN3R {
            bits: bool,
        }
        impl DECAPEN3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `DECAP3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DECAP3R {
            #[doc = "The dual edge captures are inactive."]
            _0,
            #[doc = "The dual edge captures are active."]
            _1,
        }
        impl DECAP3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DECAP3R::_0 => false,
                    DECAP3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DECAP3R {
                match value {
                    false => DECAP3R::_0,
                    true => DECAP3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DECAP3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DECAP3R::_1
            }
        }
        #[doc = "Possible values of the field `DTEN3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DTEN3R {
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            _0,
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            _1,
        }
        impl DTEN3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DTEN3R::_0 => false,
                    DTEN3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DTEN3R {
                match value {
                    false => DTEN3R::_0,
                    true => DTEN3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DTEN3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DTEN3R::_1
            }
        }
        #[doc = "Possible values of the field `SYNCEN3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SYNCEN3R {
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            _0,
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            _1,
        }
        impl SYNCEN3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SYNCEN3R::_0 => false,
                    SYNCEN3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SYNCEN3R {
                match value {
                    false => SYNCEN3R::_0,
                    true => SYNCEN3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SYNCEN3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SYNCEN3R::_1
            }
        }
        #[doc = "Possible values of the field `FAULTEN3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTEN3R {
            #[doc = "The fault control in this pair of channels is disabled."]
            _0,
            #[doc = "The fault control in this pair of channels is enabled."]
            _1,
        }
        impl FAULTEN3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTEN3R::_0 => false,
                    FAULTEN3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTEN3R {
                match value {
                    false => FAULTEN3R::_0,
                    true => FAULTEN3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTEN3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTEN3R::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct MCOMBINE3R {
            bits: bool,
        }
        impl MCOMBINE3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Proxy"]
        pub struct _COMBINE0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _COMBINE0W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `COMP0`"]
        pub enum COMP0W {
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            _0,
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            _1,
        }
        impl COMP0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    COMP0W::_0 => false,
                    COMP0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _COMP0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _COMP0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: COMP0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(COMP0W::_0)
            }
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(COMP0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DECAPEN0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DECAPEN0W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DECAP0`"]
        pub enum DECAP0W {
            #[doc = "The dual edge captures are inactive."]
            _0,
            #[doc = "The dual edge captures are active."]
            _1,
        }
        impl DECAP0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DECAP0W::_0 => false,
                    DECAP0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DECAP0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DECAP0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DECAP0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The dual edge captures are inactive."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DECAP0W::_0)
            }
            #[doc = "The dual edge captures are active."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DECAP0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DTEN0`"]
        pub enum DTEN0W {
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            _0,
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            _1,
        }
        impl DTEN0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DTEN0W::_0 => false,
                    DTEN0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTEN0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTEN0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DTEN0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DTEN0W::_0)
            }
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DTEN0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SYNCEN0`"]
        pub enum SYNCEN0W {
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            _0,
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            _1,
        }
        impl SYNCEN0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SYNCEN0W::_0 => false,
                    SYNCEN0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SYNCEN0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SYNCEN0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SYNCEN0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SYNCEN0W::_0)
            }
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SYNCEN0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FAULTEN0`"]
        pub enum FAULTEN0W {
            #[doc = "The fault control in this pair of channels is disabled."]
            _0,
            #[doc = "The fault control in this pair of channels is enabled."]
            _1,
        }
        impl FAULTEN0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FAULTEN0W::_0 => false,
                    FAULTEN0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FAULTEN0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _FAULTEN0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FAULTEN0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The fault control in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FAULTEN0W::_0)
            }
            #[doc = "The fault control in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FAULTEN0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MCOMBINE0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MCOMBINE0W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _COMBINE1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _COMBINE1W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `COMP1`"]
        pub enum COMP1W {
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            _0,
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            _1,
        }
        impl COMP1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    COMP1W::_0 => false,
                    COMP1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _COMP1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _COMP1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: COMP1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(COMP1W::_0)
            }
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(COMP1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DECAPEN1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DECAPEN1W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DECAP1`"]
        pub enum DECAP1W {
            #[doc = "The dual edge captures are inactive."]
            _0,
            #[doc = "The dual edge captures are active."]
            _1,
        }
        impl DECAP1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DECAP1W::_0 => false,
                    DECAP1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DECAP1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DECAP1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DECAP1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The dual edge captures are inactive."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DECAP1W::_0)
            }
            #[doc = "The dual edge captures are active."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DECAP1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DTEN1`"]
        pub enum DTEN1W {
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            _0,
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            _1,
        }
        impl DTEN1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DTEN1W::_0 => false,
                    DTEN1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTEN1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTEN1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DTEN1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DTEN1W::_0)
            }
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DTEN1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SYNCEN1`"]
        pub enum SYNCEN1W {
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            _0,
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            _1,
        }
        impl SYNCEN1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SYNCEN1W::_0 => false,
                    SYNCEN1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SYNCEN1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SYNCEN1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SYNCEN1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SYNCEN1W::_0)
            }
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SYNCEN1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FAULTEN1`"]
        pub enum FAULTEN1W {
            #[doc = "The fault control in this pair of channels is disabled."]
            _0,
            #[doc = "The fault control in this pair of channels is enabled."]
            _1,
        }
        impl FAULTEN1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FAULTEN1W::_0 => false,
                    FAULTEN1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FAULTEN1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _FAULTEN1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FAULTEN1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The fault control in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FAULTEN1W::_0)
            }
            #[doc = "The fault control in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FAULTEN1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MCOMBINE1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MCOMBINE1W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _COMBINE2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _COMBINE2W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `COMP2`"]
        pub enum COMP2W {
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            _0,
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            _1,
        }
        impl COMP2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    COMP2W::_0 => false,
                    COMP2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _COMP2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _COMP2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: COMP2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(COMP2W::_0)
            }
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(COMP2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DECAPEN2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DECAPEN2W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DECAP2`"]
        pub enum DECAP2W {
            #[doc = "The dual edge captures are inactive."]
            _0,
            #[doc = "The dual edge captures are active."]
            _1,
        }
        impl DECAP2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DECAP2W::_0 => false,
                    DECAP2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DECAP2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DECAP2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DECAP2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The dual edge captures are inactive."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DECAP2W::_0)
            }
            #[doc = "The dual edge captures are active."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DECAP2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 19;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DTEN2`"]
        pub enum DTEN2W {
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            _0,
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            _1,
        }
        impl DTEN2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DTEN2W::_0 => false,
                    DTEN2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTEN2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTEN2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DTEN2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DTEN2W::_0)
            }
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DTEN2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SYNCEN2`"]
        pub enum SYNCEN2W {
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            _0,
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            _1,
        }
        impl SYNCEN2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SYNCEN2W::_0 => false,
                    SYNCEN2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SYNCEN2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SYNCEN2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SYNCEN2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SYNCEN2W::_0)
            }
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SYNCEN2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 21;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FAULTEN2`"]
        pub enum FAULTEN2W {
            #[doc = "The fault control in this pair of channels is disabled."]
            _0,
            #[doc = "The fault control in this pair of channels is enabled."]
            _1,
        }
        impl FAULTEN2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FAULTEN2W::_0 => false,
                    FAULTEN2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FAULTEN2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _FAULTEN2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FAULTEN2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The fault control in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FAULTEN2W::_0)
            }
            #[doc = "The fault control in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FAULTEN2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 22;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MCOMBINE2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MCOMBINE2W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 23;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _COMBINE3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _COMBINE3W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `COMP3`"]
        pub enum COMP3W {
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            _0,
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            _1,
        }
        impl COMP3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    COMP3W::_0 => false,
                    COMP3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _COMP3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _COMP3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: COMP3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(COMP3W::_0)
            }
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(COMP3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 25;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DECAPEN3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DECAPEN3W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 26;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DECAP3`"]
        pub enum DECAP3W {
            #[doc = "The dual edge captures are inactive."]
            _0,
            #[doc = "The dual edge captures are active."]
            _1,
        }
        impl DECAP3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DECAP3W::_0 => false,
                    DECAP3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DECAP3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DECAP3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DECAP3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The dual edge captures are inactive."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DECAP3W::_0)
            }
            #[doc = "The dual edge captures are active."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DECAP3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 27;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DTEN3`"]
        pub enum DTEN3W {
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            _0,
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            _1,
        }
        impl DTEN3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DTEN3W::_0 => false,
                    DTEN3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTEN3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTEN3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DTEN3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DTEN3W::_0)
            }
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DTEN3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 28;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SYNCEN3`"]
        pub enum SYNCEN3W {
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            _0,
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            _1,
        }
        impl SYNCEN3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SYNCEN3W::_0 => false,
                    SYNCEN3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SYNCEN3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SYNCEN3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SYNCEN3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SYNCEN3W::_0)
            }
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SYNCEN3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 29;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FAULTEN3`"]
        pub enum FAULTEN3W {
            #[doc = "The fault control in this pair of channels is disabled."]
            _0,
            #[doc = "The fault control in this pair of channels is enabled."]
            _1,
        }
        impl FAULTEN3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FAULTEN3W::_0 => false,
                    FAULTEN3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FAULTEN3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _FAULTEN3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FAULTEN3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The fault control in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FAULTEN3W::_0)
            }
            #[doc = "The fault control in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FAULTEN3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MCOMBINE3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MCOMBINE3W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Combine Channels For n = 0"]
            #[inline(always)]
            pub fn combine0(&self) -> COMBINE0R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                COMBINE0R { bits }
            }
            #[doc = "Bit 1 - Complement Of Channel (n) For n = 0"]
            #[inline(always)]
            pub fn comp0(&self) -> COMP0R {
                COMP0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Dual Edge Capture Mode Enable For n = 0"]
            #[inline(always)]
            pub fn decapen0(&self) -> DECAPEN0R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                DECAPEN0R { bits }
            }
            #[doc = "Bit 3 - Dual Edge Capture Mode Captures For n = 0"]
            #[inline(always)]
            pub fn decap0(&self) -> DECAP0R {
                DECAP0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Deadtime Enable For n = 0"]
            #[inline(always)]
            pub fn dten0(&self) -> DTEN0R {
                DTEN0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Synchronization Enable For n = 0"]
            #[inline(always)]
            pub fn syncen0(&self) -> SYNCEN0R {
                SYNCEN0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Fault Control Enable For n = 0"]
            #[inline(always)]
            pub fn faulten0(&self) -> FAULTEN0R {
                FAULTEN0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Modified Combine Mode For n = 0"]
            #[inline(always)]
            pub fn mcombine0(&self) -> MCOMBINE0R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MCOMBINE0R { bits }
            }
            #[doc = "Bit 8 - Combine Channels For n = 2"]
            #[inline(always)]
            pub fn combine1(&self) -> COMBINE1R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                COMBINE1R { bits }
            }
            #[doc = "Bit 9 - Complement Of Channel (n) For n = 2"]
            #[inline(always)]
            pub fn comp1(&self) -> COMP1R {
                COMP1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Dual Edge Capture Mode Enable For n = 2"]
            #[inline(always)]
            pub fn decapen1(&self) -> DECAPEN1R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                DECAPEN1R { bits }
            }
            #[doc = "Bit 11 - Dual Edge Capture Mode Captures For n = 2"]
            #[inline(always)]
            pub fn decap1(&self) -> DECAP1R {
                DECAP1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Deadtime Enable For n = 2"]
            #[inline(always)]
            pub fn dten1(&self) -> DTEN1R {
                DTEN1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Synchronization Enable For n = 2"]
            #[inline(always)]
            pub fn syncen1(&self) -> SYNCEN1R {
                SYNCEN1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - Fault Control Enable For n = 2"]
            #[inline(always)]
            pub fn faulten1(&self) -> FAULTEN1R {
                FAULTEN1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - Modified Combine Mode For n = 2"]
            #[inline(always)]
            pub fn mcombine1(&self) -> MCOMBINE1R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MCOMBINE1R { bits }
            }
            #[doc = "Bit 16 - Combine Channels For n = 4"]
            #[inline(always)]
            pub fn combine2(&self) -> COMBINE2R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                COMBINE2R { bits }
            }
            #[doc = "Bit 17 - Complement Of Channel (n) For n = 4"]
            #[inline(always)]
            pub fn comp2(&self) -> COMP2R {
                COMP2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 18 - Dual Edge Capture Mode Enable For n = 4"]
            #[inline(always)]
            pub fn decapen2(&self) -> DECAPEN2R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                DECAPEN2R { bits }
            }
            #[doc = "Bit 19 - Dual Edge Capture Mode Captures For n = 4"]
            #[inline(always)]
            pub fn decap2(&self) -> DECAP2R {
                DECAP2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 19;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 20 - Deadtime Enable For n = 4"]
            #[inline(always)]
            pub fn dten2(&self) -> DTEN2R {
                DTEN2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - Synchronization Enable For n = 4"]
            #[inline(always)]
            pub fn syncen2(&self) -> SYNCEN2R {
                SYNCEN2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 22 - Fault Control Enable For n = 4"]
            #[inline(always)]
            pub fn faulten2(&self) -> FAULTEN2R {
                FAULTEN2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 23 - Modified Combine Mode For n = 4"]
            #[inline(always)]
            pub fn mcombine2(&self) -> MCOMBINE2R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MCOMBINE2R { bits }
            }
            #[doc = "Bit 24 - Combine Channels For n = 6"]
            #[inline(always)]
            pub fn combine3(&self) -> COMBINE3R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                COMBINE3R { bits }
            }
            #[doc = "Bit 25 - Complement Of Channel (n) for n = 6"]
            #[inline(always)]
            pub fn comp3(&self) -> COMP3R {
                COMP3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 25;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 26 - Dual Edge Capture Mode Enable For n = 6"]
            #[inline(always)]
            pub fn decapen3(&self) -> DECAPEN3R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 26;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                DECAPEN3R { bits }
            }
            #[doc = "Bit 27 - Dual Edge Capture Mode Captures For n = 6"]
            #[inline(always)]
            pub fn decap3(&self) -> DECAP3R {
                DECAP3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 27;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 28 - Deadtime Enable For n = 6"]
            #[inline(always)]
            pub fn dten3(&self) -> DTEN3R {
                DTEN3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 28;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 29 - Synchronization Enable For n = 6"]
            #[inline(always)]
            pub fn syncen3(&self) -> SYNCEN3R {
                SYNCEN3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 29;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 30 - Fault Control Enable For n = 6"]
            #[inline(always)]
            pub fn faulten3(&self) -> FAULTEN3R {
                FAULTEN3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Modified Combine Mode For n = 6"]
            #[inline(always)]
            pub fn mcombine3(&self) -> MCOMBINE3R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MCOMBINE3R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Combine Channels For n = 0"]
            #[inline(always)]
            pub fn combine0(&mut self) -> _COMBINE0W {
                _COMBINE0W { w: self }
            }
            #[doc = "Bit 1 - Complement Of Channel (n) For n = 0"]
            #[inline(always)]
            pub fn comp0(&mut self) -> _COMP0W {
                _COMP0W { w: self }
            }
            #[doc = "Bit 2 - Dual Edge Capture Mode Enable For n = 0"]
            #[inline(always)]
            pub fn decapen0(&mut self) -> _DECAPEN0W {
                _DECAPEN0W { w: self }
            }
            #[doc = "Bit 3 - Dual Edge Capture Mode Captures For n = 0"]
            #[inline(always)]
            pub fn decap0(&mut self) -> _DECAP0W {
                _DECAP0W { w: self }
            }
            #[doc = "Bit 4 - Deadtime Enable For n = 0"]
            #[inline(always)]
            pub fn dten0(&mut self) -> _DTEN0W {
                _DTEN0W { w: self }
            }
            #[doc = "Bit 5 - Synchronization Enable For n = 0"]
            #[inline(always)]
            pub fn syncen0(&mut self) -> _SYNCEN0W {
                _SYNCEN0W { w: self }
            }
            #[doc = "Bit 6 - Fault Control Enable For n = 0"]
            #[inline(always)]
            pub fn faulten0(&mut self) -> _FAULTEN0W {
                _FAULTEN0W { w: self }
            }
            #[doc = "Bit 7 - Modified Combine Mode For n = 0"]
            #[inline(always)]
            pub fn mcombine0(&mut self) -> _MCOMBINE0W {
                _MCOMBINE0W { w: self }
            }
            #[doc = "Bit 8 - Combine Channels For n = 2"]
            #[inline(always)]
            pub fn combine1(&mut self) -> _COMBINE1W {
                _COMBINE1W { w: self }
            }
            #[doc = "Bit 9 - Complement Of Channel (n) For n = 2"]
            #[inline(always)]
            pub fn comp1(&mut self) -> _COMP1W {
                _COMP1W { w: self }
            }
            #[doc = "Bit 10 - Dual Edge Capture Mode Enable For n = 2"]
            #[inline(always)]
            pub fn decapen1(&mut self) -> _DECAPEN1W {
                _DECAPEN1W { w: self }
            }
            #[doc = "Bit 11 - Dual Edge Capture Mode Captures For n = 2"]
            #[inline(always)]
            pub fn decap1(&mut self) -> _DECAP1W {
                _DECAP1W { w: self }
            }
            #[doc = "Bit 12 - Deadtime Enable For n = 2"]
            #[inline(always)]
            pub fn dten1(&mut self) -> _DTEN1W {
                _DTEN1W { w: self }
            }
            #[doc = "Bit 13 - Synchronization Enable For n = 2"]
            #[inline(always)]
            pub fn syncen1(&mut self) -> _SYNCEN1W {
                _SYNCEN1W { w: self }
            }
            #[doc = "Bit 14 - Fault Control Enable For n = 2"]
            #[inline(always)]
            pub fn faulten1(&mut self) -> _FAULTEN1W {
                _FAULTEN1W { w: self }
            }
            #[doc = "Bit 15 - Modified Combine Mode For n = 2"]
            #[inline(always)]
            pub fn mcombine1(&mut self) -> _MCOMBINE1W {
                _MCOMBINE1W { w: self }
            }
            #[doc = "Bit 16 - Combine Channels For n = 4"]
            #[inline(always)]
            pub fn combine2(&mut self) -> _COMBINE2W {
                _COMBINE2W { w: self }
            }
            #[doc = "Bit 17 - Complement Of Channel (n) For n = 4"]
            #[inline(always)]
            pub fn comp2(&mut self) -> _COMP2W {
                _COMP2W { w: self }
            }
            #[doc = "Bit 18 - Dual Edge Capture Mode Enable For n = 4"]
            #[inline(always)]
            pub fn decapen2(&mut self) -> _DECAPEN2W {
                _DECAPEN2W { w: self }
            }
            #[doc = "Bit 19 - Dual Edge Capture Mode Captures For n = 4"]
            #[inline(always)]
            pub fn decap2(&mut self) -> _DECAP2W {
                _DECAP2W { w: self }
            }
            #[doc = "Bit 20 - Deadtime Enable For n = 4"]
            #[inline(always)]
            pub fn dten2(&mut self) -> _DTEN2W {
                _DTEN2W { w: self }
            }
            #[doc = "Bit 21 - Synchronization Enable For n = 4"]
            #[inline(always)]
            pub fn syncen2(&mut self) -> _SYNCEN2W {
                _SYNCEN2W { w: self }
            }
            #[doc = "Bit 22 - Fault Control Enable For n = 4"]
            #[inline(always)]
            pub fn faulten2(&mut self) -> _FAULTEN2W {
                _FAULTEN2W { w: self }
            }
            #[doc = "Bit 23 - Modified Combine Mode For n = 4"]
            #[inline(always)]
            pub fn mcombine2(&mut self) -> _MCOMBINE2W {
                _MCOMBINE2W { w: self }
            }
            #[doc = "Bit 24 - Combine Channels For n = 6"]
            #[inline(always)]
            pub fn combine3(&mut self) -> _COMBINE3W {
                _COMBINE3W { w: self }
            }
            #[doc = "Bit 25 - Complement Of Channel (n) for n = 6"]
            #[inline(always)]
            pub fn comp3(&mut self) -> _COMP3W {
                _COMP3W { w: self }
            }
            #[doc = "Bit 26 - Dual Edge Capture Mode Enable For n = 6"]
            #[inline(always)]
            pub fn decapen3(&mut self) -> _DECAPEN3W {
                _DECAPEN3W { w: self }
            }
            #[doc = "Bit 27 - Dual Edge Capture Mode Captures For n = 6"]
            #[inline(always)]
            pub fn decap3(&mut self) -> _DECAP3W {
                _DECAP3W { w: self }
            }
            #[doc = "Bit 28 - Deadtime Enable For n = 6"]
            #[inline(always)]
            pub fn dten3(&mut self) -> _DTEN3W {
                _DTEN3W { w: self }
            }
            #[doc = "Bit 29 - Synchronization Enable For n = 6"]
            #[inline(always)]
            pub fn syncen3(&mut self) -> _SYNCEN3W {
                _SYNCEN3W { w: self }
            }
            #[doc = "Bit 30 - Fault Control Enable For n = 6"]
            #[inline(always)]
            pub fn faulten3(&mut self) -> _FAULTEN3W {
                _FAULTEN3W { w: self }
            }
            #[doc = "Bit 31 - Modified Combine Mode For n = 6"]
            #[inline(always)]
            pub fn mcombine3(&mut self) -> _MCOMBINE3W {
                _MCOMBINE3W { w: self }
            }
        }
    }
    #[doc = "Deadtime Configuration"]
    pub struct DEADTIME {
        register: VolatileCell<u32>,
    }
    #[doc = "Deadtime Configuration"]
    pub mod deadtime {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::DEADTIME {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DTVALR {
            bits: u8,
        }
        impl DTVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DTPS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DTPSR {
            #[doc = "Divide the FTM input clock by 1."]
            _0X,
            #[doc = "Divide the FTM input clock by 4."]
            _10,
            #[doc = "Divide the FTM input clock by 16."]
            _11,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl DTPSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    DTPSR::_0X => 0,
                    DTPSR::_10 => 2,
                    DTPSR::_11 => 3,
                    DTPSR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> DTPSR {
                match value {
                    0 => DTPSR::_0X,
                    2 => DTPSR::_10,
                    3 => DTPSR::_11,
                    i => DTPSR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0X`"]
            #[inline(always)]
            pub fn is_0x(&self) -> bool {
                *self == DTPSR::_0X
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == DTPSR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == DTPSR::_11
            }
        }
        #[doc = r" Value of the field"]
        pub struct DTVALEXR {
            bits: u8,
        }
        impl DTVALEXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DTPS`"]
        pub enum DTPSW {
            #[doc = "Divide the FTM input clock by 1."]
            _0X,
            #[doc = "Divide the FTM input clock by 4."]
            _10,
            #[doc = "Divide the FTM input clock by 16."]
            _11,
        }
        impl DTPSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    DTPSW::_0X => 0,
                    DTPSW::_10 => 2,
                    DTPSW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTPSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTPSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DTPSW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Divide the FTM input clock by 1."]
            #[inline(always)]
            pub fn _0x(self) -> &'a mut W {
                self.variant(DTPSW::_0X)
            }
            #[doc = "Divide the FTM input clock by 4."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(DTPSW::_10)
            }
            #[doc = "Divide the FTM input clock by 16."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(DTPSW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTVALEXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTVALEXW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Deadtime Value"]
            #[inline(always)]
            pub fn dtval(&self) -> DTVALR {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DTVALR { bits }
            }
            #[doc = "Bits 6:7 - Deadtime Prescaler Value"]
            #[inline(always)]
            pub fn dtps(&self) -> DTPSR {
                DTPSR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 16:19 - Extended Deadtime Value"]
            #[inline(always)]
            pub fn dtvalex(&self) -> DTVALEXR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DTVALEXR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - Deadtime Value"]
            #[inline(always)]
            pub fn dtval(&mut self) -> _DTVALW {
                _DTVALW { w: self }
            }
            #[doc = "Bits 6:7 - Deadtime Prescaler Value"]
            #[inline(always)]
            pub fn dtps(&mut self) -> _DTPSW {
                _DTPSW { w: self }
            }
            #[doc = "Bits 16:19 - Extended Deadtime Value"]
            #[inline(always)]
            pub fn dtvalex(&mut self) -> _DTVALEXW {
                _DTVALEXW { w: self }
            }
        }
    }
    #[doc = "FTM External Trigger"]
    pub struct EXTTRIG {
        register: VolatileCell<u32>,
    }
    #[doc = "FTM External Trigger"]
    pub mod exttrig {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EXTTRIG {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CH2TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH2TRIGR {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH2TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH2TRIGR::_0 => false,
                    CH2TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH2TRIGR {
                match value {
                    false => CH2TRIGR::_0,
                    true => CH2TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH2TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH2TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `CH3TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH3TRIGR {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH3TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH3TRIGR::_0 => false,
                    CH3TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH3TRIGR {
                match value {
                    false => CH3TRIGR::_0,
                    true => CH3TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH3TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH3TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `CH4TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH4TRIGR {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH4TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH4TRIGR::_0 => false,
                    CH4TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH4TRIGR {
                match value {
                    false => CH4TRIGR::_0,
                    true => CH4TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH4TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH4TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `CH5TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH5TRIGR {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH5TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH5TRIGR::_0 => false,
                    CH5TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH5TRIGR {
                match value {
                    false => CH5TRIGR::_0,
                    true => CH5TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH5TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH5TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `CH0TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH0TRIGR {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH0TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH0TRIGR::_0 => false,
                    CH0TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH0TRIGR {
                match value {
                    false => CH0TRIGR::_0,
                    true => CH0TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH0TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH0TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `CH1TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH1TRIGR {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH1TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH1TRIGR::_0 => false,
                    CH1TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH1TRIGR {
                match value {
                    false => CH1TRIGR::_0,
                    true => CH1TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH1TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH1TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `INITTRIGEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INITTRIGENR {
            #[doc = "The generation of initialization trigger is disabled."]
            _0,
            #[doc = "The generation of initialization trigger is enabled."]
            _1,
        }
        impl INITTRIGENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INITTRIGENR::_0 => false,
                    INITTRIGENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INITTRIGENR {
                match value {
                    false => INITTRIGENR::_0,
                    true => INITTRIGENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INITTRIGENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INITTRIGENR::_1
            }
        }
        #[doc = "Possible values of the field `TRIGF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGFR {
            #[doc = "No channel trigger was generated."]
            _0,
            #[doc = "A channel trigger was generated."]
            _1,
        }
        impl TRIGFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGFR::_0 => false,
                    TRIGFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGFR {
                match value {
                    false => TRIGFR::_0,
                    true => TRIGFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGFR::_1
            }
        }
        #[doc = "Possible values of the field `CH6TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH6TRIGR {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH6TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH6TRIGR::_0 => false,
                    CH6TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH6TRIGR {
                match value {
                    false => CH6TRIGR::_0,
                    true => CH6TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH6TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH6TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `CH7TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH7TRIGR {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH7TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH7TRIGR::_0 => false,
                    CH7TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH7TRIGR {
                match value {
                    false => CH7TRIGR::_0,
                    true => CH7TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH7TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH7TRIGR::_1
            }
        }
        #[doc = "Values that can be written to the field `CH2TRIG`"]
        pub enum CH2TRIGW {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH2TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH2TRIGW::_0 => false,
                    CH2TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH2TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH2TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH2TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The generation of this external trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH2TRIGW::_0)
            }
            #[doc = "The generation of this external trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH2TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH3TRIG`"]
        pub enum CH3TRIGW {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH3TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH3TRIGW::_0 => false,
                    CH3TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH3TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH3TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH3TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The generation of this external trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH3TRIGW::_0)
            }
            #[doc = "The generation of this external trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH3TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH4TRIG`"]
        pub enum CH4TRIGW {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH4TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH4TRIGW::_0 => false,
                    CH4TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH4TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH4TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH4TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The generation of this external trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH4TRIGW::_0)
            }
            #[doc = "The generation of this external trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH4TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH5TRIG`"]
        pub enum CH5TRIGW {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH5TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH5TRIGW::_0 => false,
                    CH5TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH5TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH5TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH5TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The generation of this external trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH5TRIGW::_0)
            }
            #[doc = "The generation of this external trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH5TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH0TRIG`"]
        pub enum CH0TRIGW {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH0TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH0TRIGW::_0 => false,
                    CH0TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH0TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH0TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH0TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The generation of this external trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH0TRIGW::_0)
            }
            #[doc = "The generation of this external trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH0TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH1TRIG`"]
        pub enum CH1TRIGW {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH1TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH1TRIGW::_0 => false,
                    CH1TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH1TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH1TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH1TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The generation of this external trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH1TRIGW::_0)
            }
            #[doc = "The generation of this external trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH1TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INITTRIGEN`"]
        pub enum INITTRIGENW {
            #[doc = "The generation of initialization trigger is disabled."]
            _0,
            #[doc = "The generation of initialization trigger is enabled."]
            _1,
        }
        impl INITTRIGENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INITTRIGENW::_0 => false,
                    INITTRIGENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INITTRIGENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INITTRIGENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INITTRIGENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The generation of initialization trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INITTRIGENW::_0)
            }
            #[doc = "The generation of initialization trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INITTRIGENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH6TRIG`"]
        pub enum CH6TRIGW {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH6TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH6TRIGW::_0 => false,
                    CH6TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH6TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH6TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH6TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The generation of this external trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH6TRIGW::_0)
            }
            #[doc = "The generation of this external trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH6TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH7TRIG`"]
        pub enum CH7TRIGW {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH7TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH7TRIGW::_0 => false,
                    CH7TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH7TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH7TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH7TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The generation of this external trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH7TRIGW::_0)
            }
            #[doc = "The generation of this external trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH7TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Channel 2 External Trigger Enable"]
            #[inline(always)]
            pub fn ch2trig(&self) -> CH2TRIGR {
                CH2TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Channel 3 External Trigger Enable"]
            #[inline(always)]
            pub fn ch3trig(&self) -> CH3TRIGR {
                CH3TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel 4 External Trigger Enable"]
            #[inline(always)]
            pub fn ch4trig(&self) -> CH4TRIGR {
                CH4TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Channel 5 External Trigger Enable"]
            #[inline(always)]
            pub fn ch5trig(&self) -> CH5TRIGR {
                CH5TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Channel 0 External Trigger Enable"]
            #[inline(always)]
            pub fn ch0trig(&self) -> CH0TRIGR {
                CH0TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Channel 1 External Trigger Enable"]
            #[inline(always)]
            pub fn ch1trig(&self) -> CH1TRIGR {
                CH1TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Initialization Trigger Enable"]
            #[inline(always)]
            pub fn inittrigen(&self) -> INITTRIGENR {
                INITTRIGENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel Trigger Flag"]
            #[inline(always)]
            pub fn trigf(&self) -> TRIGFR {
                TRIGFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Channel 6 External Trigger Enable"]
            #[inline(always)]
            pub fn ch6trig(&self) -> CH6TRIGR {
                CH6TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Channel 7 External Trigger Enable"]
            #[inline(always)]
            pub fn ch7trig(&self) -> CH7TRIGR {
                CH7TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Channel 2 External Trigger Enable"]
            #[inline(always)]
            pub fn ch2trig(&mut self) -> _CH2TRIGW {
                _CH2TRIGW { w: self }
            }
            #[doc = "Bit 1 - Channel 3 External Trigger Enable"]
            #[inline(always)]
            pub fn ch3trig(&mut self) -> _CH3TRIGW {
                _CH3TRIGW { w: self }
            }
            #[doc = "Bit 2 - Channel 4 External Trigger Enable"]
            #[inline(always)]
            pub fn ch4trig(&mut self) -> _CH4TRIGW {
                _CH4TRIGW { w: self }
            }
            #[doc = "Bit 3 - Channel 5 External Trigger Enable"]
            #[inline(always)]
            pub fn ch5trig(&mut self) -> _CH5TRIGW {
                _CH5TRIGW { w: self }
            }
            #[doc = "Bit 4 - Channel 0 External Trigger Enable"]
            #[inline(always)]
            pub fn ch0trig(&mut self) -> _CH0TRIGW {
                _CH0TRIGW { w: self }
            }
            #[doc = "Bit 5 - Channel 1 External Trigger Enable"]
            #[inline(always)]
            pub fn ch1trig(&mut self) -> _CH1TRIGW {
                _CH1TRIGW { w: self }
            }
            #[doc = "Bit 6 - Initialization Trigger Enable"]
            #[inline(always)]
            pub fn inittrigen(&mut self) -> _INITTRIGENW {
                _INITTRIGENW { w: self }
            }
            #[doc = "Bit 8 - Channel 6 External Trigger Enable"]
            #[inline(always)]
            pub fn ch6trig(&mut self) -> _CH6TRIGW {
                _CH6TRIGW { w: self }
            }
            #[doc = "Bit 9 - Channel 7 External Trigger Enable"]
            #[inline(always)]
            pub fn ch7trig(&mut self) -> _CH7TRIGW {
                _CH7TRIGW { w: self }
            }
        }
    }
    #[doc = "Channels Polarity"]
    pub struct POL {
        register: VolatileCell<u32>,
    }
    #[doc = "Channels Polarity"]
    pub mod pol {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::POL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `POL0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum POL0R {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    POL0R::_0 => false,
                    POL0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> POL0R {
                match value {
                    false => POL0R::_0,
                    true => POL0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == POL0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == POL0R::_1
            }
        }
        #[doc = "Possible values of the field `POL1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum POL1R {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    POL1R::_0 => false,
                    POL1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> POL1R {
                match value {
                    false => POL1R::_0,
                    true => POL1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == POL1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == POL1R::_1
            }
        }
        #[doc = "Possible values of the field `POL2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum POL2R {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    POL2R::_0 => false,
                    POL2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> POL2R {
                match value {
                    false => POL2R::_0,
                    true => POL2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == POL2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == POL2R::_1
            }
        }
        #[doc = "Possible values of the field `POL3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum POL3R {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    POL3R::_0 => false,
                    POL3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> POL3R {
                match value {
                    false => POL3R::_0,
                    true => POL3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == POL3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == POL3R::_1
            }
        }
        #[doc = "Possible values of the field `POL4`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum POL4R {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL4R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    POL4R::_0 => false,
                    POL4R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> POL4R {
                match value {
                    false => POL4R::_0,
                    true => POL4R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == POL4R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == POL4R::_1
            }
        }
        #[doc = "Possible values of the field `POL5`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum POL5R {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL5R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    POL5R::_0 => false,
                    POL5R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> POL5R {
                match value {
                    false => POL5R::_0,
                    true => POL5R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == POL5R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == POL5R::_1
            }
        }
        #[doc = "Possible values of the field `POL6`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum POL6R {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL6R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    POL6R::_0 => false,
                    POL6R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> POL6R {
                match value {
                    false => POL6R::_0,
                    true => POL6R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == POL6R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == POL6R::_1
            }
        }
        #[doc = "Possible values of the field `POL7`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum POL7R {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL7R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    POL7R::_0 => false,
                    POL7R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> POL7R {
                match value {
                    false => POL7R::_0,
                    true => POL7R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == POL7R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == POL7R::_1
            }
        }
        #[doc = "Values that can be written to the field `POL0`"]
        pub enum POL0W {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    POL0W::_0 => false,
                    POL0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _POL0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _POL0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: POL0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel polarity is active high."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(POL0W::_0)
            }
            #[doc = "The channel polarity is active low."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(POL0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `POL1`"]
        pub enum POL1W {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    POL1W::_0 => false,
                    POL1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _POL1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _POL1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: POL1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel polarity is active high."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(POL1W::_0)
            }
            #[doc = "The channel polarity is active low."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(POL1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `POL2`"]
        pub enum POL2W {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    POL2W::_0 => false,
                    POL2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _POL2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _POL2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: POL2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel polarity is active high."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(POL2W::_0)
            }
            #[doc = "The channel polarity is active low."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(POL2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `POL3`"]
        pub enum POL3W {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    POL3W::_0 => false,
                    POL3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _POL3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _POL3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: POL3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel polarity is active high."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(POL3W::_0)
            }
            #[doc = "The channel polarity is active low."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(POL3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `POL4`"]
        pub enum POL4W {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL4W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    POL4W::_0 => false,
                    POL4W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _POL4W<'a> {
            w: &'a mut W,
        }
        impl<'a> _POL4W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: POL4W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel polarity is active high."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(POL4W::_0)
            }
            #[doc = "The channel polarity is active low."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(POL4W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `POL5`"]
        pub enum POL5W {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL5W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    POL5W::_0 => false,
                    POL5W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _POL5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _POL5W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: POL5W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel polarity is active high."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(POL5W::_0)
            }
            #[doc = "The channel polarity is active low."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(POL5W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `POL6`"]
        pub enum POL6W {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL6W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    POL6W::_0 => false,
                    POL6W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _POL6W<'a> {
            w: &'a mut W,
        }
        impl<'a> _POL6W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: POL6W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel polarity is active high."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(POL6W::_0)
            }
            #[doc = "The channel polarity is active low."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(POL6W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `POL7`"]
        pub enum POL7W {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL7W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    POL7W::_0 => false,
                    POL7W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _POL7W<'a> {
            w: &'a mut W,
        }
        impl<'a> _POL7W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: POL7W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel polarity is active high."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(POL7W::_0)
            }
            #[doc = "The channel polarity is active low."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(POL7W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Channel 0 Polarity"]
            #[inline(always)]
            pub fn pol0(&self) -> POL0R {
                POL0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Channel 1 Polarity"]
            #[inline(always)]
            pub fn pol1(&self) -> POL1R {
                POL1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel 2 Polarity"]
            #[inline(always)]
            pub fn pol2(&self) -> POL2R {
                POL2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Channel 3 Polarity"]
            #[inline(always)]
            pub fn pol3(&self) -> POL3R {
                POL3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Channel 4 Polarity"]
            #[inline(always)]
            pub fn pol4(&self) -> POL4R {
                POL4R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Channel 5 Polarity"]
            #[inline(always)]
            pub fn pol5(&self) -> POL5R {
                POL5R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Channel 6 Polarity"]
            #[inline(always)]
            pub fn pol6(&self) -> POL6R {
                POL6R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel 7 Polarity"]
            #[inline(always)]
            pub fn pol7(&self) -> POL7R {
                POL7R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Channel 0 Polarity"]
            #[inline(always)]
            pub fn pol0(&mut self) -> _POL0W {
                _POL0W { w: self }
            }
            #[doc = "Bit 1 - Channel 1 Polarity"]
            #[inline(always)]
            pub fn pol1(&mut self) -> _POL1W {
                _POL1W { w: self }
            }
            #[doc = "Bit 2 - Channel 2 Polarity"]
            #[inline(always)]
            pub fn pol2(&mut self) -> _POL2W {
                _POL2W { w: self }
            }
            #[doc = "Bit 3 - Channel 3 Polarity"]
            #[inline(always)]
            pub fn pol3(&mut self) -> _POL3W {
                _POL3W { w: self }
            }
            #[doc = "Bit 4 - Channel 4 Polarity"]
            #[inline(always)]
            pub fn pol4(&mut self) -> _POL4W {
                _POL4W { w: self }
            }
            #[doc = "Bit 5 - Channel 5 Polarity"]
            #[inline(always)]
            pub fn pol5(&mut self) -> _POL5W {
                _POL5W { w: self }
            }
            #[doc = "Bit 6 - Channel 6 Polarity"]
            #[inline(always)]
            pub fn pol6(&mut self) -> _POL6W {
                _POL6W { w: self }
            }
            #[doc = "Bit 7 - Channel 7 Polarity"]
            #[inline(always)]
            pub fn pol7(&mut self) -> _POL7W {
                _POL7W { w: self }
            }
        }
    }
    #[doc = "Fault Mode Status"]
    pub struct FMS {
        register: VolatileCell<u32>,
    }
    #[doc = "Fault Mode Status"]
    pub mod fms {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FMS {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `FAULTF0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTF0R {
            #[doc = "No fault condition was detected at the fault input."]
            _0,
            #[doc = "A fault condition was detected at the fault input."]
            _1,
        }
        impl FAULTF0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTF0R::_0 => false,
                    FAULTF0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTF0R {
                match value {
                    false => FAULTF0R::_0,
                    true => FAULTF0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTF0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTF0R::_1
            }
        }
        #[doc = "Possible values of the field `FAULTF1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTF1R {
            #[doc = "No fault condition was detected at the fault input."]
            _0,
            #[doc = "A fault condition was detected at the fault input."]
            _1,
        }
        impl FAULTF1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTF1R::_0 => false,
                    FAULTF1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTF1R {
                match value {
                    false => FAULTF1R::_0,
                    true => FAULTF1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTF1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTF1R::_1
            }
        }
        #[doc = "Possible values of the field `FAULTF2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTF2R {
            #[doc = "No fault condition was detected at the fault input."]
            _0,
            #[doc = "A fault condition was detected at the fault input."]
            _1,
        }
        impl FAULTF2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTF2R::_0 => false,
                    FAULTF2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTF2R {
                match value {
                    false => FAULTF2R::_0,
                    true => FAULTF2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTF2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTF2R::_1
            }
        }
        #[doc = "Possible values of the field `FAULTF3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTF3R {
            #[doc = "No fault condition was detected at the fault input."]
            _0,
            #[doc = "A fault condition was detected at the fault input."]
            _1,
        }
        impl FAULTF3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTF3R::_0 => false,
                    FAULTF3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTF3R {
                match value {
                    false => FAULTF3R::_0,
                    true => FAULTF3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTF3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTF3R::_1
            }
        }
        #[doc = "Possible values of the field `FAULTIN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTINR {
            #[doc = "The logic OR of the enabled fault inputs is 0."]
            _0,
            #[doc = "The logic OR of the enabled fault inputs is 1."]
            _1,
        }
        impl FAULTINR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTINR::_0 => false,
                    FAULTINR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTINR {
                match value {
                    false => FAULTINR::_0,
                    true => FAULTINR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTINR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTINR::_1
            }
        }
        #[doc = "Possible values of the field `WPEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WPENR {
            #[doc = "Write protection is disabled. Write protected bits can be written."]
            _0,
            #[doc = "Write protection is enabled. Write protected bits cannot be written."]
            _1,
        }
        impl WPENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WPENR::_0 => false,
                    WPENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WPENR {
                match value {
                    false => WPENR::_0,
                    true => WPENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WPENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WPENR::_1
            }
        }
        #[doc = "Possible values of the field `FAULTF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTFR {
            #[doc = "No fault condition was detected."]
            _0,
            #[doc = "A fault condition was detected."]
            _1,
        }
        impl FAULTFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTFR::_0 => false,
                    FAULTFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTFR {
                match value {
                    false => FAULTFR::_0,
                    true => FAULTFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTFR::_1
            }
        }
        #[doc = "Values that can be written to the field `WPEN`"]
        pub enum WPENW {
            #[doc = "Write protection is disabled. Write protected bits can be written."]
            _0,
            #[doc = "Write protection is enabled. Write protected bits cannot be written."]
            _1,
        }
        impl WPENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WPENW::_0 => false,
                    WPENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WPENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WPENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WPENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Write protection is disabled. Write protected bits can be written."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WPENW::_0)
            }
            #[doc = "Write protection is enabled. Write protected bits cannot be written."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WPENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Fault Detection Flag 0"]
            #[inline(always)]
            pub fn faultf0(&self) -> FAULTF0R {
                FAULTF0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Fault Detection Flag 1"]
            #[inline(always)]
            pub fn faultf1(&self) -> FAULTF1R {
                FAULTF1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Fault Detection Flag 2"]
            #[inline(always)]
            pub fn faultf2(&self) -> FAULTF2R {
                FAULTF2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Fault Detection Flag 3"]
            #[inline(always)]
            pub fn faultf3(&self) -> FAULTF3R {
                FAULTF3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Fault Inputs"]
            #[inline(always)]
            pub fn faultin(&self) -> FAULTINR {
                FAULTINR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Write Protection Enable"]
            #[inline(always)]
            pub fn wpen(&self) -> WPENR {
                WPENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Fault Detection Flag"]
            #[inline(always)]
            pub fn faultf(&self) -> FAULTFR {
                FAULTFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 6 - Write Protection Enable"]
            #[inline(always)]
            pub fn wpen(&mut self) -> _WPENW {
                _WPENW { w: self }
            }
        }
    }
    #[doc = "Input Capture Filter Control"]
    pub struct FILTER {
        register: VolatileCell<u32>,
    }
    #[doc = "Input Capture Filter Control"]
    pub mod filter {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FILTER {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CH0FVALR {
            bits: u8,
        }
        impl CH0FVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct CH1FVALR {
            bits: u8,
        }
        impl CH1FVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct CH2FVALR {
            bits: u8,
        }
        impl CH2FVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct CH3FVALR {
            bits: u8,
        }
        impl CH3FVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH0FVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH0FVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH1FVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH1FVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH2FVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH2FVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH3FVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH3FVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:3 - Channel 0 Input Filter"]
            #[inline(always)]
            pub fn ch0fval(&self) -> CH0FVALR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CH0FVALR { bits }
            }
            #[doc = "Bits 4:7 - Channel 1 Input Filter"]
            #[inline(always)]
            pub fn ch1fval(&self) -> CH1FVALR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CH1FVALR { bits }
            }
            #[doc = "Bits 8:11 - Channel 2 Input Filter"]
            #[inline(always)]
            pub fn ch2fval(&self) -> CH2FVALR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CH2FVALR { bits }
            }
            #[doc = "Bits 12:15 - Channel 3 Input Filter"]
            #[inline(always)]
            pub fn ch3fval(&self) -> CH3FVALR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CH3FVALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Channel 0 Input Filter"]
            #[inline(always)]
            pub fn ch0fval(&mut self) -> _CH0FVALW {
                _CH0FVALW { w: self }
            }
            #[doc = "Bits 4:7 - Channel 1 Input Filter"]
            #[inline(always)]
            pub fn ch1fval(&mut self) -> _CH1FVALW {
                _CH1FVALW { w: self }
            }
            #[doc = "Bits 8:11 - Channel 2 Input Filter"]
            #[inline(always)]
            pub fn ch2fval(&mut self) -> _CH2FVALW {
                _CH2FVALW { w: self }
            }
            #[doc = "Bits 12:15 - Channel 3 Input Filter"]
            #[inline(always)]
            pub fn ch3fval(&mut self) -> _CH3FVALW {
                _CH3FVALW { w: self }
            }
        }
    }
    #[doc = "Fault Control"]
    pub struct FLTCTRL {
        register: VolatileCell<u32>,
    }
    #[doc = "Fault Control"]
    pub mod fltctrl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FLTCTRL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `FAULT0EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULT0ENR {
            #[doc = "Fault input is disabled."]
            _0,
            #[doc = "Fault input is enabled."]
            _1,
        }
        impl FAULT0ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULT0ENR::_0 => false,
                    FAULT0ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULT0ENR {
                match value {
                    false => FAULT0ENR::_0,
                    true => FAULT0ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULT0ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULT0ENR::_1
            }
        }
        #[doc = "Possible values of the field `FAULT1EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULT1ENR {
            #[doc = "Fault input is disabled."]
            _0,
            #[doc = "Fault input is enabled."]
            _1,
        }
        impl FAULT1ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULT1ENR::_0 => false,
                    FAULT1ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULT1ENR {
                match value {
                    false => FAULT1ENR::_0,
                    true => FAULT1ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULT1ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULT1ENR::_1
            }
        }
        #[doc = "Possible values of the field `FAULT2EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULT2ENR {
            #[doc = "Fault input is disabled."]
            _0,
            #[doc = "Fault input is enabled."]
            _1,
        }
        impl FAULT2ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULT2ENR::_0 => false,
                    FAULT2ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULT2ENR {
                match value {
                    false => FAULT2ENR::_0,
                    true => FAULT2ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULT2ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULT2ENR::_1
            }
        }
        #[doc = "Possible values of the field `FAULT3EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULT3ENR {
            #[doc = "Fault input is disabled."]
            _0,
            #[doc = "Fault input is enabled."]
            _1,
        }
        impl FAULT3ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULT3ENR::_0 => false,
                    FAULT3ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULT3ENR {
                match value {
                    false => FAULT3ENR::_0,
                    true => FAULT3ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULT3ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULT3ENR::_1
            }
        }
        #[doc = "Possible values of the field `FFLTR0EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FFLTR0ENR {
            #[doc = "Fault input filter is disabled."]
            _0,
            #[doc = "Fault input filter is enabled."]
            _1,
        }
        impl FFLTR0ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FFLTR0ENR::_0 => false,
                    FFLTR0ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FFLTR0ENR {
                match value {
                    false => FFLTR0ENR::_0,
                    true => FFLTR0ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FFLTR0ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FFLTR0ENR::_1
            }
        }
        #[doc = "Possible values of the field `FFLTR1EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FFLTR1ENR {
            #[doc = "Fault input filter is disabled."]
            _0,
            #[doc = "Fault input filter is enabled."]
            _1,
        }
        impl FFLTR1ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FFLTR1ENR::_0 => false,
                    FFLTR1ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FFLTR1ENR {
                match value {
                    false => FFLTR1ENR::_0,
                    true => FFLTR1ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FFLTR1ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FFLTR1ENR::_1
            }
        }
        #[doc = "Possible values of the field `FFLTR2EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FFLTR2ENR {
            #[doc = "Fault input filter is disabled."]
            _0,
            #[doc = "Fault input filter is enabled."]
            _1,
        }
        impl FFLTR2ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FFLTR2ENR::_0 => false,
                    FFLTR2ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FFLTR2ENR {
                match value {
                    false => FFLTR2ENR::_0,
                    true => FFLTR2ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FFLTR2ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FFLTR2ENR::_1
            }
        }
        #[doc = "Possible values of the field `FFLTR3EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FFLTR3ENR {
            #[doc = "Fault input filter is disabled."]
            _0,
            #[doc = "Fault input filter is enabled."]
            _1,
        }
        impl FFLTR3ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FFLTR3ENR::_0 => false,
                    FFLTR3ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FFLTR3ENR {
                match value {
                    false => FFLTR3ENR::_0,
                    true => FFLTR3ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FFLTR3ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FFLTR3ENR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct FFVALR {
            bits: u8,
        }
        impl FFVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `FSTATE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FSTATER {
            #[doc = "FTM outputs will be placed into safe values when fault events in ongoing (defined by POL bits)."]
            _0,
            #[doc = "FTM outputs will be tri-stated when fault event is ongoing"]
            _1,
        }
        impl FSTATER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FSTATER::_0 => false,
                    FSTATER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FSTATER {
                match value {
                    false => FSTATER::_0,
                    true => FSTATER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FSTATER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FSTATER::_1
            }
        }
        #[doc = "Values that can be written to the field `FAULT0EN`"]
        pub enum FAULT0ENW {
            #[doc = "Fault input is disabled."]
            _0,
            #[doc = "Fault input is enabled."]
            _1,
        }
        impl FAULT0ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FAULT0ENW::_0 => false,
                    FAULT0ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FAULT0ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FAULT0ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FAULT0ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Fault input is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FAULT0ENW::_0)
            }
            #[doc = "Fault input is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FAULT0ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FAULT1EN`"]
        pub enum FAULT1ENW {
            #[doc = "Fault input is disabled."]
            _0,
            #[doc = "Fault input is enabled."]
            _1,
        }
        impl FAULT1ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FAULT1ENW::_0 => false,
                    FAULT1ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FAULT1ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FAULT1ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FAULT1ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Fault input is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FAULT1ENW::_0)
            }
            #[doc = "Fault input is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FAULT1ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FAULT2EN`"]
        pub enum FAULT2ENW {
            #[doc = "Fault input is disabled."]
            _0,
            #[doc = "Fault input is enabled."]
            _1,
        }
        impl FAULT2ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FAULT2ENW::_0 => false,
                    FAULT2ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FAULT2ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FAULT2ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FAULT2ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Fault input is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FAULT2ENW::_0)
            }
            #[doc = "Fault input is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FAULT2ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FAULT3EN`"]
        pub enum FAULT3ENW {
            #[doc = "Fault input is disabled."]
            _0,
            #[doc = "Fault input is enabled."]
            _1,
        }
        impl FAULT3ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FAULT3ENW::_0 => false,
                    FAULT3ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FAULT3ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FAULT3ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FAULT3ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Fault input is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FAULT3ENW::_0)
            }
            #[doc = "Fault input is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FAULT3ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FFLTR0EN`"]
        pub enum FFLTR0ENW {
            #[doc = "Fault input filter is disabled."]
            _0,
            #[doc = "Fault input filter is enabled."]
            _1,
        }
        impl FFLTR0ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FFLTR0ENW::_0 => false,
                    FFLTR0ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FFLTR0ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FFLTR0ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FFLTR0ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Fault input filter is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FFLTR0ENW::_0)
            }
            #[doc = "Fault input filter is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FFLTR0ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FFLTR1EN`"]
        pub enum FFLTR1ENW {
            #[doc = "Fault input filter is disabled."]
            _0,
            #[doc = "Fault input filter is enabled."]
            _1,
        }
        impl FFLTR1ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FFLTR1ENW::_0 => false,
                    FFLTR1ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FFLTR1ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FFLTR1ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FFLTR1ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Fault input filter is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FFLTR1ENW::_0)
            }
            #[doc = "Fault input filter is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FFLTR1ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FFLTR2EN`"]
        pub enum FFLTR2ENW {
            #[doc = "Fault input filter is disabled."]
            _0,
            #[doc = "Fault input filter is enabled."]
            _1,
        }
        impl FFLTR2ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FFLTR2ENW::_0 => false,
                    FFLTR2ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FFLTR2ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FFLTR2ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FFLTR2ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Fault input filter is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FFLTR2ENW::_0)
            }
            #[doc = "Fault input filter is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FFLTR2ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FFLTR3EN`"]
        pub enum FFLTR3ENW {
            #[doc = "Fault input filter is disabled."]
            _0,
            #[doc = "Fault input filter is enabled."]
            _1,
        }
        impl FFLTR3ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FFLTR3ENW::_0 => false,
                    FFLTR3ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FFLTR3ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FFLTR3ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FFLTR3ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Fault input filter is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FFLTR3ENW::_0)
            }
            #[doc = "Fault input filter is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FFLTR3ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _FFVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FFVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FSTATE`"]
        pub enum FSTATEW {
            #[doc = "FTM outputs will be placed into safe values when fault events in ongoing (defined by POL bits)."]
            _0,
            #[doc = "FTM outputs will be tri-stated when fault event is ongoing"]
            _1,
        }
        impl FSTATEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FSTATEW::_0 => false,
                    FSTATEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FSTATEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FSTATEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FSTATEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM outputs will be placed into safe values when fault events in ongoing (defined by POL bits)."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FSTATEW::_0)
            }
            #[doc = "FTM outputs will be tri-stated when fault event is ongoing"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FSTATEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Fault Input 0 Enable"]
            #[inline(always)]
            pub fn fault0en(&self) -> FAULT0ENR {
                FAULT0ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Fault Input 1 Enable"]
            #[inline(always)]
            pub fn fault1en(&self) -> FAULT1ENR {
                FAULT1ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Fault Input 2 Enable"]
            #[inline(always)]
            pub fn fault2en(&self) -> FAULT2ENR {
                FAULT2ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Fault Input 3 Enable"]
            #[inline(always)]
            pub fn fault3en(&self) -> FAULT3ENR {
                FAULT3ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Fault Input 0 Filter Enable"]
            #[inline(always)]
            pub fn ffltr0en(&self) -> FFLTR0ENR {
                FFLTR0ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Fault Input 1 Filter Enable"]
            #[inline(always)]
            pub fn ffltr1en(&self) -> FFLTR1ENR {
                FFLTR1ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Fault Input 2 Filter Enable"]
            #[inline(always)]
            pub fn ffltr2en(&self) -> FFLTR2ENR {
                FFLTR2ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Fault Input 3 Filter Enable"]
            #[inline(always)]
            pub fn ffltr3en(&self) -> FFLTR3ENR {
                FFLTR3ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:11 - Fault Input Filter"]
            #[inline(always)]
            pub fn ffval(&self) -> FFVALR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                FFVALR { bits }
            }
            #[doc = "Bit 15 - Fault output state"]
            #[inline(always)]
            pub fn fstate(&self) -> FSTATER {
                FSTATER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Fault Input 0 Enable"]
            #[inline(always)]
            pub fn fault0en(&mut self) -> _FAULT0ENW {
                _FAULT0ENW { w: self }
            }
            #[doc = "Bit 1 - Fault Input 1 Enable"]
            #[inline(always)]
            pub fn fault1en(&mut self) -> _FAULT1ENW {
                _FAULT1ENW { w: self }
            }
            #[doc = "Bit 2 - Fault Input 2 Enable"]
            #[inline(always)]
            pub fn fault2en(&mut self) -> _FAULT2ENW {
                _FAULT2ENW { w: self }
            }
            #[doc = "Bit 3 - Fault Input 3 Enable"]
            #[inline(always)]
            pub fn fault3en(&mut self) -> _FAULT3ENW {
                _FAULT3ENW { w: self }
            }
            #[doc = "Bit 4 - Fault Input 0 Filter Enable"]
            #[inline(always)]
            pub fn ffltr0en(&mut self) -> _FFLTR0ENW {
                _FFLTR0ENW { w: self }
            }
            #[doc = "Bit 5 - Fault Input 1 Filter Enable"]
            #[inline(always)]
            pub fn ffltr1en(&mut self) -> _FFLTR1ENW {
                _FFLTR1ENW { w: self }
            }
            #[doc = "Bit 6 - Fault Input 2 Filter Enable"]
            #[inline(always)]
            pub fn ffltr2en(&mut self) -> _FFLTR2ENW {
                _FFLTR2ENW { w: self }
            }
            #[doc = "Bit 7 - Fault Input 3 Filter Enable"]
            #[inline(always)]
            pub fn ffltr3en(&mut self) -> _FFLTR3ENW {
                _FFLTR3ENW { w: self }
            }
            #[doc = "Bits 8:11 - Fault Input Filter"]
            #[inline(always)]
            pub fn ffval(&mut self) -> _FFVALW {
                _FFVALW { w: self }
            }
            #[doc = "Bit 15 - Fault output state"]
            #[inline(always)]
            pub fn fstate(&mut self) -> _FSTATEW {
                _FSTATEW { w: self }
            }
        }
    }
    #[doc = "Quadrature Decoder Control And Status"]
    pub struct QDCTRL {
        register: VolatileCell<u32>,
    }
    #[doc = "Quadrature Decoder Control And Status"]
    pub mod qdctrl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::QDCTRL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `QUADEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum QUADENR {
            #[doc = "Quadrature Decoder mode is disabled."]
            _0,
            #[doc = "Quadrature Decoder mode is enabled."]
            _1,
        }
        impl QUADENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    QUADENR::_0 => false,
                    QUADENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> QUADENR {
                match value {
                    false => QUADENR::_0,
                    true => QUADENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == QUADENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == QUADENR::_1
            }
        }
        #[doc = "Possible values of the field `TOFDIR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TOFDIRR {
            #[doc = "TOF bit was set on the bottom of counting. There was an FTM counter decrement and FTM counter changes from its minimum value (CNTIN register) to its maximum value (MOD register)."]
            _0,
            #[doc = "TOF bit was set on the top of counting. There was an FTM counter increment and FTM counter changes from its maximum value (MOD register) to its minimum value (CNTIN register)."]
            _1,
        }
        impl TOFDIRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TOFDIRR::_0 => false,
                    TOFDIRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TOFDIRR {
                match value {
                    false => TOFDIRR::_0,
                    true => TOFDIRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TOFDIRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TOFDIRR::_1
            }
        }
        #[doc = "Possible values of the field `QUADIR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum QUADIRR {
            #[doc = "Counting direction is decreasing (FTM counter decrement)."]
            _0,
            #[doc = "Counting direction is increasing (FTM counter increment)."]
            _1,
        }
        impl QUADIRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    QUADIRR::_0 => false,
                    QUADIRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> QUADIRR {
                match value {
                    false => QUADIRR::_0,
                    true => QUADIRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == QUADIRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == QUADIRR::_1
            }
        }
        #[doc = "Possible values of the field `QUADMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum QUADMODER {
            #[doc = "Phase A and phase B encoding mode."]
            _0,
            #[doc = "Count and direction encoding mode."]
            _1,
        }
        impl QUADMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    QUADMODER::_0 => false,
                    QUADMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> QUADMODER {
                match value {
                    false => QUADMODER::_0,
                    true => QUADMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == QUADMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == QUADMODER::_1
            }
        }
        #[doc = "Possible values of the field `PHBPOL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PHBPOLR {
            #[doc = "Normal polarity. Phase B input signal is not inverted before identifying the rising and falling edges of this signal."]
            _0,
            #[doc = "Inverted polarity. Phase B input signal is inverted before identifying the rising and falling edges of this signal."]
            _1,
        }
        impl PHBPOLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PHBPOLR::_0 => false,
                    PHBPOLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PHBPOLR {
                match value {
                    false => PHBPOLR::_0,
                    true => PHBPOLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PHBPOLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PHBPOLR::_1
            }
        }
        #[doc = "Possible values of the field `PHAPOL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PHAPOLR {
            #[doc = "Normal polarity. Phase A input signal is not inverted before identifying the rising and falling edges of this signal."]
            _0,
            #[doc = "Inverted polarity. Phase A input signal is inverted before identifying the rising and falling edges of this signal."]
            _1,
        }
        impl PHAPOLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PHAPOLR::_0 => false,
                    PHAPOLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PHAPOLR {
                match value {
                    false => PHAPOLR::_0,
                    true => PHAPOLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PHAPOLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PHAPOLR::_1
            }
        }
        #[doc = "Possible values of the field `PHBFLTREN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PHBFLTRENR {
            #[doc = "Phase B input filter is disabled."]
            _0,
            #[doc = "Phase B input filter is enabled."]
            _1,
        }
        impl PHBFLTRENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PHBFLTRENR::_0 => false,
                    PHBFLTRENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PHBFLTRENR {
                match value {
                    false => PHBFLTRENR::_0,
                    true => PHBFLTRENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PHBFLTRENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PHBFLTRENR::_1
            }
        }
        #[doc = "Possible values of the field `PHAFLTREN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PHAFLTRENR {
            #[doc = "Phase A input filter is disabled."]
            _0,
            #[doc = "Phase A input filter is enabled."]
            _1,
        }
        impl PHAFLTRENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PHAFLTRENR::_0 => false,
                    PHAFLTRENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PHAFLTRENR {
                match value {
                    false => PHAFLTRENR::_0,
                    true => PHAFLTRENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PHAFLTRENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PHAFLTRENR::_1
            }
        }
        #[doc = "Values that can be written to the field `QUADEN`"]
        pub enum QUADENW {
            #[doc = "Quadrature Decoder mode is disabled."]
            _0,
            #[doc = "Quadrature Decoder mode is enabled."]
            _1,
        }
        impl QUADENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    QUADENW::_0 => false,
                    QUADENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _QUADENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _QUADENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: QUADENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Quadrature Decoder mode is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(QUADENW::_0)
            }
            #[doc = "Quadrature Decoder mode is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(QUADENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `QUADMODE`"]
        pub enum QUADMODEW {
            #[doc = "Phase A and phase B encoding mode."]
            _0,
            #[doc = "Count and direction encoding mode."]
            _1,
        }
        impl QUADMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    QUADMODEW::_0 => false,
                    QUADMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _QUADMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _QUADMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: QUADMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Phase A and phase B encoding mode."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(QUADMODEW::_0)
            }
            #[doc = "Count and direction encoding mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(QUADMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PHBPOL`"]
        pub enum PHBPOLW {
            #[doc = "Normal polarity. Phase B input signal is not inverted before identifying the rising and falling edges of this signal."]
            _0,
            #[doc = "Inverted polarity. Phase B input signal is inverted before identifying the rising and falling edges of this signal."]
            _1,
        }
        impl PHBPOLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PHBPOLW::_0 => false,
                    PHBPOLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PHBPOLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PHBPOLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PHBPOLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Normal polarity. Phase B input signal is not inverted before identifying the rising and falling edges of this signal."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PHBPOLW::_0)
            }
            #[doc = "Inverted polarity. Phase B input signal is inverted before identifying the rising and falling edges of this signal."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PHBPOLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PHAPOL`"]
        pub enum PHAPOLW {
            #[doc = "Normal polarity. Phase A input signal is not inverted before identifying the rising and falling edges of this signal."]
            _0,
            #[doc = "Inverted polarity. Phase A input signal is inverted before identifying the rising and falling edges of this signal."]
            _1,
        }
        impl PHAPOLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PHAPOLW::_0 => false,
                    PHAPOLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PHAPOLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PHAPOLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PHAPOLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Normal polarity. Phase A input signal is not inverted before identifying the rising and falling edges of this signal."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PHAPOLW::_0)
            }
            #[doc = "Inverted polarity. Phase A input signal is inverted before identifying the rising and falling edges of this signal."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PHAPOLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PHBFLTREN`"]
        pub enum PHBFLTRENW {
            #[doc = "Phase B input filter is disabled."]
            _0,
            #[doc = "Phase B input filter is enabled."]
            _1,
        }
        impl PHBFLTRENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PHBFLTRENW::_0 => false,
                    PHBFLTRENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PHBFLTRENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PHBFLTRENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PHBFLTRENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Phase B input filter is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PHBFLTRENW::_0)
            }
            #[doc = "Phase B input filter is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PHBFLTRENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PHAFLTREN`"]
        pub enum PHAFLTRENW {
            #[doc = "Phase A input filter is disabled."]
            _0,
            #[doc = "Phase A input filter is enabled."]
            _1,
        }
        impl PHAFLTRENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PHAFLTRENW::_0 => false,
                    PHAFLTRENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PHAFLTRENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PHAFLTRENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PHAFLTRENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Phase A input filter is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PHAFLTRENW::_0)
            }
            #[doc = "Phase A input filter is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PHAFLTRENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Quadrature Decoder Mode Enable"]
            #[inline(always)]
            pub fn quaden(&self) -> QUADENR {
                QUADENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Timer Overflow Direction In Quadrature Decoder Mode"]
            #[inline(always)]
            pub fn tofdir(&self) -> TOFDIRR {
                TOFDIRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - FTM Counter Direction In Quadrature Decoder Mode"]
            #[inline(always)]
            pub fn quadir(&self) -> QUADIRR {
                QUADIRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Quadrature Decoder Mode"]
            #[inline(always)]
            pub fn quadmode(&self) -> QUADMODER {
                QUADMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Phase B Input Polarity"]
            #[inline(always)]
            pub fn phbpol(&self) -> PHBPOLR {
                PHBPOLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Phase A Input Polarity"]
            #[inline(always)]
            pub fn phapol(&self) -> PHAPOLR {
                PHAPOLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Phase B Input Filter Enable"]
            #[inline(always)]
            pub fn phbfltren(&self) -> PHBFLTRENR {
                PHBFLTRENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Phase A Input Filter Enable"]
            #[inline(always)]
            pub fn phafltren(&self) -> PHAFLTRENR {
                PHAFLTRENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Quadrature Decoder Mode Enable"]
            #[inline(always)]
            pub fn quaden(&mut self) -> _QUADENW {
                _QUADENW { w: self }
            }
            #[doc = "Bit 3 - Quadrature Decoder Mode"]
            #[inline(always)]
            pub fn quadmode(&mut self) -> _QUADMODEW {
                _QUADMODEW { w: self }
            }
            #[doc = "Bit 4 - Phase B Input Polarity"]
            #[inline(always)]
            pub fn phbpol(&mut self) -> _PHBPOLW {
                _PHBPOLW { w: self }
            }
            #[doc = "Bit 5 - Phase A Input Polarity"]
            #[inline(always)]
            pub fn phapol(&mut self) -> _PHAPOLW {
                _PHAPOLW { w: self }
            }
            #[doc = "Bit 6 - Phase B Input Filter Enable"]
            #[inline(always)]
            pub fn phbfltren(&mut self) -> _PHBFLTRENW {
                _PHBFLTRENW { w: self }
            }
            #[doc = "Bit 7 - Phase A Input Filter Enable"]
            #[inline(always)]
            pub fn phafltren(&mut self) -> _PHAFLTRENW {
                _PHAFLTRENW { w: self }
            }
        }
    }
    #[doc = "Configuration"]
    pub struct CONF {
        register: VolatileCell<u32>,
    }
    #[doc = "Configuration"]
    pub mod conf {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CONF {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct LDFQR {
            bits: u8,
        }
        impl LDFQR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BDMMODER {
            bits: u8,
        }
        impl BDMMODER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct GTBEENR {
            bits: bool,
        }
        impl GTBEENR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct GTBEOUTR {
            bits: bool,
        }
        impl GTBEOUTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `ITRIGR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ITRIGRR {
            #[doc = "Initialization trigger is generated on counter wrap events."]
            _0,
            #[doc = "Initialization trigger is generated when a reload point is reached."]
            _1,
        }
        impl ITRIGRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ITRIGRR::_0 => false,
                    ITRIGRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ITRIGRR {
                match value {
                    false => ITRIGRR::_0,
                    true => ITRIGRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ITRIGRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ITRIGRR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _LDFQW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LDFQW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BDMMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BDMMODEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _GTBEENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GTBEENW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _GTBEOUTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GTBEOUTW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ITRIGR`"]
        pub enum ITRIGRW {
            #[doc = "Initialization trigger is generated on counter wrap events."]
            _0,
            #[doc = "Initialization trigger is generated when a reload point is reached."]
            _1,
        }
        impl ITRIGRW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ITRIGRW::_0 => false,
                    ITRIGRW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ITRIGRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ITRIGRW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ITRIGRW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Initialization trigger is generated on counter wrap events."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ITRIGRW::_0)
            }
            #[doc = "Initialization trigger is generated when a reload point is reached."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ITRIGRW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:4 - Frequency of the Reload Opportunities"]
            #[inline(always)]
            pub fn ldfq(&self) -> LDFQR {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                LDFQR { bits }
            }
            #[doc = "Bits 6:7 - Debug Mode"]
            #[inline(always)]
            pub fn bdmmode(&self) -> BDMMODER {
                let bits = {
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BDMMODER { bits }
            }
            #[doc = "Bit 9 - Global Time Base Enable"]
            #[inline(always)]
            pub fn gtbeen(&self) -> GTBEENR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                GTBEENR { bits }
            }
            #[doc = "Bit 10 - Global Time Base Output"]
            #[inline(always)]
            pub fn gtbeout(&self) -> GTBEOUTR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                GTBEOUTR { bits }
            }
            #[doc = "Bit 11 - Initialization trigger on Reload Point"]
            #[inline(always)]
            pub fn itrigr(&self) -> ITRIGRR {
                ITRIGRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:4 - Frequency of the Reload Opportunities"]
            #[inline(always)]
            pub fn ldfq(&mut self) -> _LDFQW {
                _LDFQW { w: self }
            }
            #[doc = "Bits 6:7 - Debug Mode"]
            #[inline(always)]
            pub fn bdmmode(&mut self) -> _BDMMODEW {
                _BDMMODEW { w: self }
            }
            #[doc = "Bit 9 - Global Time Base Enable"]
            #[inline(always)]
            pub fn gtbeen(&mut self) -> _GTBEENW {
                _GTBEENW { w: self }
            }
            #[doc = "Bit 10 - Global Time Base Output"]
            #[inline(always)]
            pub fn gtbeout(&mut self) -> _GTBEOUTW {
                _GTBEOUTW { w: self }
            }
            #[doc = "Bit 11 - Initialization trigger on Reload Point"]
            #[inline(always)]
            pub fn itrigr(&mut self) -> _ITRIGRW {
                _ITRIGRW { w: self }
            }
        }
    }
    #[doc = "FTM Fault Input Polarity"]
    pub struct FLTPOL {
        register: VolatileCell<u32>,
    }
    #[doc = "FTM Fault Input Polarity"]
    pub mod fltpol {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FLTPOL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `FLT0POL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FLT0POLR {
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            _0,
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            _1,
        }
        impl FLT0POLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FLT0POLR::_0 => false,
                    FLT0POLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FLT0POLR {
                match value {
                    false => FLT0POLR::_0,
                    true => FLT0POLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FLT0POLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FLT0POLR::_1
            }
        }
        #[doc = "Possible values of the field `FLT1POL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FLT1POLR {
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            _0,
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            _1,
        }
        impl FLT1POLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FLT1POLR::_0 => false,
                    FLT1POLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FLT1POLR {
                match value {
                    false => FLT1POLR::_0,
                    true => FLT1POLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FLT1POLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FLT1POLR::_1
            }
        }
        #[doc = "Possible values of the field `FLT2POL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FLT2POLR {
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            _0,
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            _1,
        }
        impl FLT2POLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FLT2POLR::_0 => false,
                    FLT2POLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FLT2POLR {
                match value {
                    false => FLT2POLR::_0,
                    true => FLT2POLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FLT2POLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FLT2POLR::_1
            }
        }
        #[doc = "Possible values of the field `FLT3POL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FLT3POLR {
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            _0,
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            _1,
        }
        impl FLT3POLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FLT3POLR::_0 => false,
                    FLT3POLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FLT3POLR {
                match value {
                    false => FLT3POLR::_0,
                    true => FLT3POLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FLT3POLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FLT3POLR::_1
            }
        }
        #[doc = "Values that can be written to the field `FLT0POL`"]
        pub enum FLT0POLW {
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            _0,
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            _1,
        }
        impl FLT0POLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FLT0POLW::_0 => false,
                    FLT0POLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FLT0POLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FLT0POLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FLT0POLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FLT0POLW::_0)
            }
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FLT0POLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FLT1POL`"]
        pub enum FLT1POLW {
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            _0,
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            _1,
        }
        impl FLT1POLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FLT1POLW::_0 => false,
                    FLT1POLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FLT1POLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FLT1POLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FLT1POLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FLT1POLW::_0)
            }
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FLT1POLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FLT2POL`"]
        pub enum FLT2POLW {
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            _0,
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            _1,
        }
        impl FLT2POLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FLT2POLW::_0 => false,
                    FLT2POLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FLT2POLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FLT2POLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FLT2POLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FLT2POLW::_0)
            }
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FLT2POLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FLT3POL`"]
        pub enum FLT3POLW {
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            _0,
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            _1,
        }
        impl FLT3POLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FLT3POLW::_0 => false,
                    FLT3POLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FLT3POLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FLT3POLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FLT3POLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FLT3POLW::_0)
            }
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FLT3POLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Fault Input 0 Polarity"]
            #[inline(always)]
            pub fn flt0pol(&self) -> FLT0POLR {
                FLT0POLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Fault Input 1 Polarity"]
            #[inline(always)]
            pub fn flt1pol(&self) -> FLT1POLR {
                FLT1POLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Fault Input 2 Polarity"]
            #[inline(always)]
            pub fn flt2pol(&self) -> FLT2POLR {
                FLT2POLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Fault Input 3 Polarity"]
            #[inline(always)]
            pub fn flt3pol(&self) -> FLT3POLR {
                FLT3POLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Fault Input 0 Polarity"]
            #[inline(always)]
            pub fn flt0pol(&mut self) -> _FLT0POLW {
                _FLT0POLW { w: self }
            }
            #[doc = "Bit 1 - Fault Input 1 Polarity"]
            #[inline(always)]
            pub fn flt1pol(&mut self) -> _FLT1POLW {
                _FLT1POLW { w: self }
            }
            #[doc = "Bit 2 - Fault Input 2 Polarity"]
            #[inline(always)]
            pub fn flt2pol(&mut self) -> _FLT2POLW {
                _FLT2POLW { w: self }
            }
            #[doc = "Bit 3 - Fault Input 3 Polarity"]
            #[inline(always)]
            pub fn flt3pol(&mut self) -> _FLT3POLW {
                _FLT3POLW { w: self }
            }
        }
    }
    #[doc = "Synchronization Configuration"]
    pub struct SYNCONF {
        register: VolatileCell<u32>,
    }
    #[doc = "Synchronization Configuration"]
    pub mod synconf {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SYNCONF {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `HWTRIGMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HWTRIGMODER {
            #[doc = "FTM clears the TRIGj bit when the hardware trigger j is detected, where j = 0, 1,2."]
            _0,
            #[doc = "FTM does not clear the TRIGj bit when the hardware trigger j is detected, where j = 0, 1,2."]
            _1,
        }
        impl HWTRIGMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HWTRIGMODER::_0 => false,
                    HWTRIGMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HWTRIGMODER {
                match value {
                    false => HWTRIGMODER::_0,
                    true => HWTRIGMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HWTRIGMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HWTRIGMODER::_1
            }
        }
        #[doc = "Possible values of the field `CNTINC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CNTINCR {
            #[doc = "CNTIN register is updated with its buffer value at all rising edges of FTM input clock."]
            _0,
            #[doc = "CNTIN register is updated with its buffer value by the PWM synchronization."]
            _1,
        }
        impl CNTINCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CNTINCR::_0 => false,
                    CNTINCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CNTINCR {
                match value {
                    false => CNTINCR::_0,
                    true => CNTINCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CNTINCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CNTINCR::_1
            }
        }
        #[doc = "Possible values of the field `INVC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INVCR {
            #[doc = "INVCTRL register is updated with its buffer value at all rising edges of FTM input clock."]
            _0,
            #[doc = "INVCTRL register is updated with its buffer value by the PWM synchronization."]
            _1,
        }
        impl INVCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INVCR::_0 => false,
                    INVCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INVCR {
                match value {
                    false => INVCR::_0,
                    true => INVCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INVCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INVCR::_1
            }
        }
        #[doc = "Possible values of the field `SWOC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SWOCR {
            #[doc = "SWOCTRL register is updated with its buffer value at all rising edges of FTM input clock."]
            _0,
            #[doc = "SWOCTRL register is updated with its buffer value by the PWM synchronization."]
            _1,
        }
        impl SWOCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SWOCR::_0 => false,
                    SWOCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SWOCR {
                match value {
                    false => SWOCR::_0,
                    true => SWOCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SWOCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SWOCR::_1
            }
        }
        #[doc = "Possible values of the field `SYNCMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SYNCMODER {
            #[doc = "Legacy PWM synchronization is selected."]
            _0,
            #[doc = "Enhanced PWM synchronization is selected."]
            _1,
        }
        impl SYNCMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SYNCMODER::_0 => false,
                    SYNCMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SYNCMODER {
                match value {
                    false => SYNCMODER::_0,
                    true => SYNCMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SYNCMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SYNCMODER::_1
            }
        }
        #[doc = "Possible values of the field `SWRSTCNT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SWRSTCNTR {
            #[doc = "The software trigger does not activate the FTM counter synchronization."]
            _0,
            #[doc = "The software trigger activates the FTM counter synchronization."]
            _1,
        }
        impl SWRSTCNTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SWRSTCNTR::_0 => false,
                    SWRSTCNTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SWRSTCNTR {
                match value {
                    false => SWRSTCNTR::_0,
                    true => SWRSTCNTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SWRSTCNTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SWRSTCNTR::_1
            }
        }
        #[doc = "Possible values of the field `SWWRBUF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SWWRBUFR {
            #[doc = "The software trigger does not activate MOD, HCR, CNTIN, and CV registers synchronization."]
            _0,
            #[doc = "The software trigger activates MOD, HCR, CNTIN, and CV registers synchronization."]
            _1,
        }
        impl SWWRBUFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SWWRBUFR::_0 => false,
                    SWWRBUFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SWWRBUFR {
                match value {
                    false => SWWRBUFR::_0,
                    true => SWWRBUFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SWWRBUFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SWWRBUFR::_1
            }
        }
        #[doc = "Possible values of the field `SWOM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SWOMR {
            #[doc = "The software trigger does not activate the OUTMASK register synchronization."]
            _0,
            #[doc = "The software trigger activates the OUTMASK register synchronization."]
            _1,
        }
        impl SWOMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SWOMR::_0 => false,
                    SWOMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SWOMR {
                match value {
                    false => SWOMR::_0,
                    true => SWOMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SWOMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SWOMR::_1
            }
        }
        #[doc = "Possible values of the field `SWINVC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SWINVCR {
            #[doc = "The software trigger does not activate the INVCTRL register synchronization."]
            _0,
            #[doc = "The software trigger activates the INVCTRL register synchronization."]
            _1,
        }
        impl SWINVCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SWINVCR::_0 => false,
                    SWINVCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SWINVCR {
                match value {
                    false => SWINVCR::_0,
                    true => SWINVCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SWINVCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SWINVCR::_1
            }
        }
        #[doc = "Possible values of the field `SWSOC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SWSOCR {
            #[doc = "The software trigger does not activate the SWOCTRL register synchronization."]
            _0,
            #[doc = "The software trigger activates the SWOCTRL register synchronization."]
            _1,
        }
        impl SWSOCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SWSOCR::_0 => false,
                    SWSOCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SWSOCR {
                match value {
                    false => SWSOCR::_0,
                    true => SWSOCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SWSOCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SWSOCR::_1
            }
        }
        #[doc = "Possible values of the field `HWRSTCNT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HWRSTCNTR {
            #[doc = "A hardware trigger does not activate the FTM counter synchronization."]
            _0,
            #[doc = "A hardware trigger activates the FTM counter synchronization."]
            _1,
        }
        impl HWRSTCNTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HWRSTCNTR::_0 => false,
                    HWRSTCNTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HWRSTCNTR {
                match value {
                    false => HWRSTCNTR::_0,
                    true => HWRSTCNTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HWRSTCNTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HWRSTCNTR::_1
            }
        }
        #[doc = "Possible values of the field `HWWRBUF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HWWRBUFR {
            #[doc = "A hardware trigger does not activate MOD, HCR, CNTIN, and CV registers synchronization."]
            _0,
            #[doc = "A hardware trigger activates MOD, HCR, CNTIN, and CV registers synchronization."]
            _1,
        }
        impl HWWRBUFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HWWRBUFR::_0 => false,
                    HWWRBUFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HWWRBUFR {
                match value {
                    false => HWWRBUFR::_0,
                    true => HWWRBUFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HWWRBUFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HWWRBUFR::_1
            }
        }
        #[doc = "Possible values of the field `HWOM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HWOMR {
            #[doc = "A hardware trigger does not activate the OUTMASK register synchronization."]
            _0,
            #[doc = "A hardware trigger activates the OUTMASK register synchronization."]
            _1,
        }
        impl HWOMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HWOMR::_0 => false,
                    HWOMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HWOMR {
                match value {
                    false => HWOMR::_0,
                    true => HWOMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HWOMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HWOMR::_1
            }
        }
        #[doc = "Possible values of the field `HWINVC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HWINVCR {
            #[doc = "A hardware trigger does not activate the INVCTRL register synchronization."]
            _0,
            #[doc = "A hardware trigger activates the INVCTRL register synchronization."]
            _1,
        }
        impl HWINVCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HWINVCR::_0 => false,
                    HWINVCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HWINVCR {
                match value {
                    false => HWINVCR::_0,
                    true => HWINVCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HWINVCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HWINVCR::_1
            }
        }
        #[doc = "Possible values of the field `HWSOC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HWSOCR {
            #[doc = "A hardware trigger does not activate the SWOCTRL register synchronization."]
            _0,
            #[doc = "A hardware trigger activates the SWOCTRL register synchronization."]
            _1,
        }
        impl HWSOCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HWSOCR::_0 => false,
                    HWSOCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HWSOCR {
                match value {
                    false => HWSOCR::_0,
                    true => HWSOCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HWSOCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HWSOCR::_1
            }
        }
        #[doc = "Values that can be written to the field `HWTRIGMODE`"]
        pub enum HWTRIGMODEW {
            #[doc = "FTM clears the TRIGj bit when the hardware trigger j is detected, where j = 0, 1,2."]
            _0,
            #[doc = "FTM does not clear the TRIGj bit when the hardware trigger j is detected, where j = 0, 1,2."]
            _1,
        }
        impl HWTRIGMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HWTRIGMODEW::_0 => false,
                    HWTRIGMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HWTRIGMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HWTRIGMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HWTRIGMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM clears the TRIGj bit when the hardware trigger j is detected, where j = 0, 1,2."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HWTRIGMODEW::_0)
            }
            #[doc = "FTM does not clear the TRIGj bit when the hardware trigger j is detected, where j = 0, 1,2."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HWTRIGMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CNTINC`"]
        pub enum CNTINCW {
            #[doc = "CNTIN register is updated with its buffer value at all rising edges of FTM input clock."]
            _0,
            #[doc = "CNTIN register is updated with its buffer value by the PWM synchronization."]
            _1,
        }
        impl CNTINCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CNTINCW::_0 => false,
                    CNTINCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CNTINCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CNTINCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CNTINCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "CNTIN register is updated with its buffer value at all rising edges of FTM input clock."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CNTINCW::_0)
            }
            #[doc = "CNTIN register is updated with its buffer value by the PWM synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CNTINCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INVC`"]
        pub enum INVCW {
            #[doc = "INVCTRL register is updated with its buffer value at all rising edges of FTM input clock."]
            _0,
            #[doc = "INVCTRL register is updated with its buffer value by the PWM synchronization."]
            _1,
        }
        impl INVCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INVCW::_0 => false,
                    INVCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INVCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INVCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INVCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "INVCTRL register is updated with its buffer value at all rising edges of FTM input clock."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INVCW::_0)
            }
            #[doc = "INVCTRL register is updated with its buffer value by the PWM synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INVCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SWOC`"]
        pub enum SWOCW {
            #[doc = "SWOCTRL register is updated with its buffer value at all rising edges of FTM input clock."]
            _0,
            #[doc = "SWOCTRL register is updated with its buffer value by the PWM synchronization."]
            _1,
        }
        impl SWOCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SWOCW::_0 => false,
                    SWOCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SWOCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SWOCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SWOCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "SWOCTRL register is updated with its buffer value at all rising edges of FTM input clock."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SWOCW::_0)
            }
            #[doc = "SWOCTRL register is updated with its buffer value by the PWM synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SWOCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SYNCMODE`"]
        pub enum SYNCMODEW {
            #[doc = "Legacy PWM synchronization is selected."]
            _0,
            #[doc = "Enhanced PWM synchronization is selected."]
            _1,
        }
        impl SYNCMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SYNCMODEW::_0 => false,
                    SYNCMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SYNCMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SYNCMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SYNCMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Legacy PWM synchronization is selected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SYNCMODEW::_0)
            }
            #[doc = "Enhanced PWM synchronization is selected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SYNCMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SWRSTCNT`"]
        pub enum SWRSTCNTW {
            #[doc = "The software trigger does not activate the FTM counter synchronization."]
            _0,
            #[doc = "The software trigger activates the FTM counter synchronization."]
            _1,
        }
        impl SWRSTCNTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SWRSTCNTW::_0 => false,
                    SWRSTCNTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SWRSTCNTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SWRSTCNTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SWRSTCNTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software trigger does not activate the FTM counter synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SWRSTCNTW::_0)
            }
            #[doc = "The software trigger activates the FTM counter synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SWRSTCNTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SWWRBUF`"]
        pub enum SWWRBUFW {
            #[doc = "The software trigger does not activate MOD, HCR, CNTIN, and CV registers synchronization."]
            _0,
            #[doc = "The software trigger activates MOD, HCR, CNTIN, and CV registers synchronization."]
            _1,
        }
        impl SWWRBUFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SWWRBUFW::_0 => false,
                    SWWRBUFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SWWRBUFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SWWRBUFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SWWRBUFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software trigger does not activate MOD, HCR, CNTIN, and CV registers synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SWWRBUFW::_0)
            }
            #[doc = "The software trigger activates MOD, HCR, CNTIN, and CV registers synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SWWRBUFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SWOM`"]
        pub enum SWOMW {
            #[doc = "The software trigger does not activate the OUTMASK register synchronization."]
            _0,
            #[doc = "The software trigger activates the OUTMASK register synchronization."]
            _1,
        }
        impl SWOMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SWOMW::_0 => false,
                    SWOMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SWOMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SWOMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SWOMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software trigger does not activate the OUTMASK register synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SWOMW::_0)
            }
            #[doc = "The software trigger activates the OUTMASK register synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SWOMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SWINVC`"]
        pub enum SWINVCW {
            #[doc = "The software trigger does not activate the INVCTRL register synchronization."]
            _0,
            #[doc = "The software trigger activates the INVCTRL register synchronization."]
            _1,
        }
        impl SWINVCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SWINVCW::_0 => false,
                    SWINVCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SWINVCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SWINVCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SWINVCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software trigger does not activate the INVCTRL register synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SWINVCW::_0)
            }
            #[doc = "The software trigger activates the INVCTRL register synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SWINVCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SWSOC`"]
        pub enum SWSOCW {
            #[doc = "The software trigger does not activate the SWOCTRL register synchronization."]
            _0,
            #[doc = "The software trigger activates the SWOCTRL register synchronization."]
            _1,
        }
        impl SWSOCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SWSOCW::_0 => false,
                    SWSOCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SWSOCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SWSOCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SWSOCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software trigger does not activate the SWOCTRL register synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SWSOCW::_0)
            }
            #[doc = "The software trigger activates the SWOCTRL register synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SWSOCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `HWRSTCNT`"]
        pub enum HWRSTCNTW {
            #[doc = "A hardware trigger does not activate the FTM counter synchronization."]
            _0,
            #[doc = "A hardware trigger activates the FTM counter synchronization."]
            _1,
        }
        impl HWRSTCNTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HWRSTCNTW::_0 => false,
                    HWRSTCNTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HWRSTCNTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HWRSTCNTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HWRSTCNTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "A hardware trigger does not activate the FTM counter synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HWRSTCNTW::_0)
            }
            #[doc = "A hardware trigger activates the FTM counter synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HWRSTCNTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `HWWRBUF`"]
        pub enum HWWRBUFW {
            #[doc = "A hardware trigger does not activate MOD, HCR, CNTIN, and CV registers synchronization."]
            _0,
            #[doc = "A hardware trigger activates MOD, HCR, CNTIN, and CV registers synchronization."]
            _1,
        }
        impl HWWRBUFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HWWRBUFW::_0 => false,
                    HWWRBUFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HWWRBUFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HWWRBUFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HWWRBUFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "A hardware trigger does not activate MOD, HCR, CNTIN, and CV registers synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HWWRBUFW::_0)
            }
            #[doc = "A hardware trigger activates MOD, HCR, CNTIN, and CV registers synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HWWRBUFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `HWOM`"]
        pub enum HWOMW {
            #[doc = "A hardware trigger does not activate the OUTMASK register synchronization."]
            _0,
            #[doc = "A hardware trigger activates the OUTMASK register synchronization."]
            _1,
        }
        impl HWOMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HWOMW::_0 => false,
                    HWOMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HWOMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HWOMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HWOMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "A hardware trigger does not activate the OUTMASK register synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HWOMW::_0)
            }
            #[doc = "A hardware trigger activates the OUTMASK register synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HWOMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `HWINVC`"]
        pub enum HWINVCW {
            #[doc = "A hardware trigger does not activate the INVCTRL register synchronization."]
            _0,
            #[doc = "A hardware trigger activates the INVCTRL register synchronization."]
            _1,
        }
        impl HWINVCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HWINVCW::_0 => false,
                    HWINVCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HWINVCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HWINVCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HWINVCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "A hardware trigger does not activate the INVCTRL register synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HWINVCW::_0)
            }
            #[doc = "A hardware trigger activates the INVCTRL register synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HWINVCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 19;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `HWSOC`"]
        pub enum HWSOCW {
            #[doc = "A hardware trigger does not activate the SWOCTRL register synchronization."]
            _0,
            #[doc = "A hardware trigger activates the SWOCTRL register synchronization."]
            _1,
        }
        impl HWSOCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HWSOCW::_0 => false,
                    HWSOCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HWSOCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HWSOCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HWSOCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "A hardware trigger does not activate the SWOCTRL register synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HWSOCW::_0)
            }
            #[doc = "A hardware trigger activates the SWOCTRL register synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HWSOCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Hardware Trigger Mode"]
            #[inline(always)]
            pub fn hwtrigmode(&self) -> HWTRIGMODER {
                HWTRIGMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - CNTIN Register Synchronization"]
            #[inline(always)]
            pub fn cntinc(&self) -> CNTINCR {
                CNTINCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - INVCTRL Register Synchronization"]
            #[inline(always)]
            pub fn invc(&self) -> INVCR {
                INVCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - SWOCTRL Register Synchronization"]
            #[inline(always)]
            pub fn swoc(&self) -> SWOCR {
                SWOCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Synchronization Mode"]
            #[inline(always)]
            pub fn syncmode(&self) -> SYNCMODER {
                SYNCMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - FTM counter synchronization is activated by the software trigger"]
            #[inline(always)]
            pub fn swrstcnt(&self) -> SWRSTCNTR {
                SWRSTCNTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - MOD, HCR, CNTIN, and CV registers synchronization is activated by the software trigger"]
            #[inline(always)]
            pub fn swwrbuf(&self) -> SWWRBUFR {
                SWWRBUFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Output mask synchronization is activated by the software trigger"]
            #[inline(always)]
            pub fn swom(&self) -> SWOMR {
                SWOMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 11 - Inverting control synchronization is activated by the software trigger"]
            #[inline(always)]
            pub fn swinvc(&self) -> SWINVCR {
                SWINVCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Software output control synchronization is activated by the software trigger"]
            #[inline(always)]
            pub fn swsoc(&self) -> SWSOCR {
                SWSOCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 16 - FTM counter synchronization is activated by a hardware trigger"]
            #[inline(always)]
            pub fn hwrstcnt(&self) -> HWRSTCNTR {
                HWRSTCNTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - MOD, HCR, CNTIN, and CV registers synchronization is activated by a hardware trigger"]
            #[inline(always)]
            pub fn hwwrbuf(&self) -> HWWRBUFR {
                HWWRBUFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 18 - Output mask synchronization is activated by a hardware trigger"]
            #[inline(always)]
            pub fn hwom(&self) -> HWOMR {
                HWOMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 19 - Inverting control synchronization is activated by a hardware trigger"]
            #[inline(always)]
            pub fn hwinvc(&self) -> HWINVCR {
                HWINVCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 19;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 20 - Software output control synchronization is activated by a hardware trigger"]
            #[inline(always)]
            pub fn hwsoc(&self) -> HWSOCR {
                HWSOCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Hardware Trigger Mode"]
            #[inline(always)]
            pub fn hwtrigmode(&mut self) -> _HWTRIGMODEW {
                _HWTRIGMODEW { w: self }
            }
            #[doc = "Bit 2 - CNTIN Register Synchronization"]
            #[inline(always)]
            pub fn cntinc(&mut self) -> _CNTINCW {
                _CNTINCW { w: self }
            }
            #[doc = "Bit 4 - INVCTRL Register Synchronization"]
            #[inline(always)]
            pub fn invc(&mut self) -> _INVCW {
                _INVCW { w: self }
            }
            #[doc = "Bit 5 - SWOCTRL Register Synchronization"]
            #[inline(always)]
            pub fn swoc(&mut self) -> _SWOCW {
                _SWOCW { w: self }
            }
            #[doc = "Bit 7 - Synchronization Mode"]
            #[inline(always)]
            pub fn syncmode(&mut self) -> _SYNCMODEW {
                _SYNCMODEW { w: self }
            }
            #[doc = "Bit 8 - FTM counter synchronization is activated by the software trigger"]
            #[inline(always)]
            pub fn swrstcnt(&mut self) -> _SWRSTCNTW {
                _SWRSTCNTW { w: self }
            }
            #[doc = "Bit 9 - MOD, HCR, CNTIN, and CV registers synchronization is activated by the software trigger"]
            #[inline(always)]
            pub fn swwrbuf(&mut self) -> _SWWRBUFW {
                _SWWRBUFW { w: self }
            }
            #[doc = "Bit 10 - Output mask synchronization is activated by the software trigger"]
            #[inline(always)]
            pub fn swom(&mut self) -> _SWOMW {
                _SWOMW { w: self }
            }
            #[doc = "Bit 11 - Inverting control synchronization is activated by the software trigger"]
            #[inline(always)]
            pub fn swinvc(&mut self) -> _SWINVCW {
                _SWINVCW { w: self }
            }
            #[doc = "Bit 12 - Software output control synchronization is activated by the software trigger"]
            #[inline(always)]
            pub fn swsoc(&mut self) -> _SWSOCW {
                _SWSOCW { w: self }
            }
            #[doc = "Bit 16 - FTM counter synchronization is activated by a hardware trigger"]
            #[inline(always)]
            pub fn hwrstcnt(&mut self) -> _HWRSTCNTW {
                _HWRSTCNTW { w: self }
            }
            #[doc = "Bit 17 - MOD, HCR, CNTIN, and CV registers synchronization is activated by a hardware trigger"]
            #[inline(always)]
            pub fn hwwrbuf(&mut self) -> _HWWRBUFW {
                _HWWRBUFW { w: self }
            }
            #[doc = "Bit 18 - Output mask synchronization is activated by a hardware trigger"]
            #[inline(always)]
            pub fn hwom(&mut self) -> _HWOMW {
                _HWOMW { w: self }
            }
            #[doc = "Bit 19 - Inverting control synchronization is activated by a hardware trigger"]
            #[inline(always)]
            pub fn hwinvc(&mut self) -> _HWINVCW {
                _HWINVCW { w: self }
            }
            #[doc = "Bit 20 - Software output control synchronization is activated by a hardware trigger"]
            #[inline(always)]
            pub fn hwsoc(&mut self) -> _HWSOCW {
                _HWSOCW { w: self }
            }
        }
    }
    #[doc = "FTM Inverting Control"]
    pub struct INVCTRL {
        register: VolatileCell<u32>,
    }
    #[doc = "FTM Inverting Control"]
    pub mod invctrl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::INVCTRL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `INV0EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INV0ENR {
            #[doc = "Inverting is disabled."]
            _0,
            #[doc = "Inverting is enabled."]
            _1,
        }
        impl INV0ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INV0ENR::_0 => false,
                    INV0ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INV0ENR {
                match value {
                    false => INV0ENR::_0,
                    true => INV0ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INV0ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INV0ENR::_1
            }
        }
        #[doc = "Possible values of the field `INV1EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INV1ENR {
            #[doc = "Inverting is disabled."]
            _0,
            #[doc = "Inverting is enabled."]
            _1,
        }
        impl INV1ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INV1ENR::_0 => false,
                    INV1ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INV1ENR {
                match value {
                    false => INV1ENR::_0,
                    true => INV1ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INV1ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INV1ENR::_1
            }
        }
        #[doc = "Possible values of the field `INV2EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INV2ENR {
            #[doc = "Inverting is disabled."]
            _0,
            #[doc = "Inverting is enabled."]
            _1,
        }
        impl INV2ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INV2ENR::_0 => false,
                    INV2ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INV2ENR {
                match value {
                    false => INV2ENR::_0,
                    true => INV2ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INV2ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INV2ENR::_1
            }
        }
        #[doc = "Possible values of the field `INV3EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INV3ENR {
            #[doc = "Inverting is disabled."]
            _0,
            #[doc = "Inverting is enabled."]
            _1,
        }
        impl INV3ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INV3ENR::_0 => false,
                    INV3ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INV3ENR {
                match value {
                    false => INV3ENR::_0,
                    true => INV3ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INV3ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INV3ENR::_1
            }
        }
        #[doc = "Values that can be written to the field `INV0EN`"]
        pub enum INV0ENW {
            #[doc = "Inverting is disabled."]
            _0,
            #[doc = "Inverting is enabled."]
            _1,
        }
        impl INV0ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INV0ENW::_0 => false,
                    INV0ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INV0ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INV0ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INV0ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Inverting is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INV0ENW::_0)
            }
            #[doc = "Inverting is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INV0ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INV1EN`"]
        pub enum INV1ENW {
            #[doc = "Inverting is disabled."]
            _0,
            #[doc = "Inverting is enabled."]
            _1,
        }
        impl INV1ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INV1ENW::_0 => false,
                    INV1ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INV1ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INV1ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INV1ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Inverting is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INV1ENW::_0)
            }
            #[doc = "Inverting is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INV1ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INV2EN`"]
        pub enum INV2ENW {
            #[doc = "Inverting is disabled."]
            _0,
            #[doc = "Inverting is enabled."]
            _1,
        }
        impl INV2ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INV2ENW::_0 => false,
                    INV2ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INV2ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INV2ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INV2ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Inverting is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INV2ENW::_0)
            }
            #[doc = "Inverting is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INV2ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INV3EN`"]
        pub enum INV3ENW {
            #[doc = "Inverting is disabled."]
            _0,
            #[doc = "Inverting is enabled."]
            _1,
        }
        impl INV3ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INV3ENW::_0 => false,
                    INV3ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INV3ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INV3ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INV3ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Inverting is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INV3ENW::_0)
            }
            #[doc = "Inverting is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INV3ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pair Channels 0 Inverting Enable"]
            #[inline(always)]
            pub fn inv0en(&self) -> INV0ENR {
                INV0ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pair Channels 1 Inverting Enable"]
            #[inline(always)]
            pub fn inv1en(&self) -> INV1ENR {
                INV1ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Pair Channels 2 Inverting Enable"]
            #[inline(always)]
            pub fn inv2en(&self) -> INV2ENR {
                INV2ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Pair Channels 3 Inverting Enable"]
            #[inline(always)]
            pub fn inv3en(&self) -> INV3ENR {
                INV3ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pair Channels 0 Inverting Enable"]
            #[inline(always)]
            pub fn inv0en(&mut self) -> _INV0ENW {
                _INV0ENW { w: self }
            }
            #[doc = "Bit 1 - Pair Channels 1 Inverting Enable"]
            #[inline(always)]
            pub fn inv1en(&mut self) -> _INV1ENW {
                _INV1ENW { w: self }
            }
            #[doc = "Bit 2 - Pair Channels 2 Inverting Enable"]
            #[inline(always)]
            pub fn inv2en(&mut self) -> _INV2ENW {
                _INV2ENW { w: self }
            }
            #[doc = "Bit 3 - Pair Channels 3 Inverting Enable"]
            #[inline(always)]
            pub fn inv3en(&mut self) -> _INV3ENW {
                _INV3ENW { w: self }
            }
        }
    }
    #[doc = "FTM Software Output Control"]
    pub struct SWOCTRL {
        register: VolatileCell<u32>,
    }
    #[doc = "FTM Software Output Control"]
    pub mod swoctrl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SWOCTRL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CH0OC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH0OCR {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH0OCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH0OCR::_0 => false,
                    CH0OCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH0OCR {
                match value {
                    false => CH0OCR::_0,
                    true => CH0OCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH0OCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH0OCR::_1
            }
        }
        #[doc = "Possible values of the field `CH1OC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH1OCR {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH1OCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH1OCR::_0 => false,
                    CH1OCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH1OCR {
                match value {
                    false => CH1OCR::_0,
                    true => CH1OCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH1OCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH1OCR::_1
            }
        }
        #[doc = "Possible values of the field `CH2OC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH2OCR {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH2OCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH2OCR::_0 => false,
                    CH2OCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH2OCR {
                match value {
                    false => CH2OCR::_0,
                    true => CH2OCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH2OCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH2OCR::_1
            }
        }
        #[doc = "Possible values of the field `CH3OC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH3OCR {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH3OCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH3OCR::_0 => false,
                    CH3OCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH3OCR {
                match value {
                    false => CH3OCR::_0,
                    true => CH3OCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH3OCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH3OCR::_1
            }
        }
        #[doc = "Possible values of the field `CH4OC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH4OCR {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH4OCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH4OCR::_0 => false,
                    CH4OCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH4OCR {
                match value {
                    false => CH4OCR::_0,
                    true => CH4OCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH4OCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH4OCR::_1
            }
        }
        #[doc = "Possible values of the field `CH5OC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH5OCR {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH5OCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH5OCR::_0 => false,
                    CH5OCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH5OCR {
                match value {
                    false => CH5OCR::_0,
                    true => CH5OCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH5OCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH5OCR::_1
            }
        }
        #[doc = "Possible values of the field `CH6OC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH6OCR {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH6OCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH6OCR::_0 => false,
                    CH6OCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH6OCR {
                match value {
                    false => CH6OCR::_0,
                    true => CH6OCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH6OCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH6OCR::_1
            }
        }
        #[doc = "Possible values of the field `CH7OC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH7OCR {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH7OCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH7OCR::_0 => false,
                    CH7OCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH7OCR {
                match value {
                    false => CH7OCR::_0,
                    true => CH7OCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH7OCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH7OCR::_1
            }
        }
        #[doc = "Possible values of the field `CH0OCV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH0OCVR {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH0OCVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH0OCVR::_0 => false,
                    CH0OCVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH0OCVR {
                match value {
                    false => CH0OCVR::_0,
                    true => CH0OCVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH0OCVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH0OCVR::_1
            }
        }
        #[doc = "Possible values of the field `CH1OCV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH1OCVR {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH1OCVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH1OCVR::_0 => false,
                    CH1OCVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH1OCVR {
                match value {
                    false => CH1OCVR::_0,
                    true => CH1OCVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH1OCVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH1OCVR::_1
            }
        }
        #[doc = "Possible values of the field `CH2OCV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH2OCVR {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH2OCVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH2OCVR::_0 => false,
                    CH2OCVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH2OCVR {
                match value {
                    false => CH2OCVR::_0,
                    true => CH2OCVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH2OCVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH2OCVR::_1
            }
        }
        #[doc = "Possible values of the field `CH3OCV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH3OCVR {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH3OCVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH3OCVR::_0 => false,
                    CH3OCVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH3OCVR {
                match value {
                    false => CH3OCVR::_0,
                    true => CH3OCVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH3OCVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH3OCVR::_1
            }
        }
        #[doc = "Possible values of the field `CH4OCV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH4OCVR {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH4OCVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH4OCVR::_0 => false,
                    CH4OCVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH4OCVR {
                match value {
                    false => CH4OCVR::_0,
                    true => CH4OCVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH4OCVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH4OCVR::_1
            }
        }
        #[doc = "Possible values of the field `CH5OCV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH5OCVR {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH5OCVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH5OCVR::_0 => false,
                    CH5OCVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH5OCVR {
                match value {
                    false => CH5OCVR::_0,
                    true => CH5OCVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH5OCVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH5OCVR::_1
            }
        }
        #[doc = "Possible values of the field `CH6OCV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH6OCVR {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH6OCVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH6OCVR::_0 => false,
                    CH6OCVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH6OCVR {
                match value {
                    false => CH6OCVR::_0,
                    true => CH6OCVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH6OCVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH6OCVR::_1
            }
        }
        #[doc = "Possible values of the field `CH7OCV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH7OCVR {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH7OCVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH7OCVR::_0 => false,
                    CH7OCVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH7OCVR {
                match value {
                    false => CH7OCVR::_0,
                    true => CH7OCVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH7OCVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH7OCVR::_1
            }
        }
        #[doc = "Values that can be written to the field `CH0OC`"]
        pub enum CH0OCW {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH0OCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH0OCW::_0 => false,
                    CH0OCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH0OCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH0OCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH0OCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel output is not affected by software output control."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH0OCW::_0)
            }
            #[doc = "The channel output is affected by software output control."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH0OCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH1OC`"]
        pub enum CH1OCW {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH1OCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH1OCW::_0 => false,
                    CH1OCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH1OCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH1OCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH1OCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel output is not affected by software output control."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH1OCW::_0)
            }
            #[doc = "The channel output is affected by software output control."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH1OCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH2OC`"]
        pub enum CH2OCW {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH2OCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH2OCW::_0 => false,
                    CH2OCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH2OCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH2OCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH2OCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel output is not affected by software output control."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH2OCW::_0)
            }
            #[doc = "The channel output is affected by software output control."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH2OCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH3OC`"]
        pub enum CH3OCW {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH3OCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH3OCW::_0 => false,
                    CH3OCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH3OCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH3OCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH3OCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel output is not affected by software output control."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH3OCW::_0)
            }
            #[doc = "The channel output is affected by software output control."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH3OCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH4OC`"]
        pub enum CH4OCW {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH4OCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH4OCW::_0 => false,
                    CH4OCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH4OCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH4OCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH4OCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel output is not affected by software output control."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH4OCW::_0)
            }
            #[doc = "The channel output is affected by software output control."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH4OCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH5OC`"]
        pub enum CH5OCW {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH5OCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH5OCW::_0 => false,
                    CH5OCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH5OCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH5OCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH5OCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel output is not affected by software output control."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH5OCW::_0)
            }
            #[doc = "The channel output is affected by software output control."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH5OCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH6OC`"]
        pub enum CH6OCW {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH6OCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH6OCW::_0 => false,
                    CH6OCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH6OCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH6OCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH6OCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel output is not affected by software output control."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH6OCW::_0)
            }
            #[doc = "The channel output is affected by software output control."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH6OCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH7OC`"]
        pub enum CH7OCW {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH7OCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH7OCW::_0 => false,
                    CH7OCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH7OCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH7OCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH7OCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel output is not affected by software output control."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH7OCW::_0)
            }
            #[doc = "The channel output is affected by software output control."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH7OCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH0OCV`"]
        pub enum CH0OCVW {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH0OCVW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH0OCVW::_0 => false,
                    CH0OCVW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH0OCVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH0OCVW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH0OCVW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software output control forces 0 to the channel output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH0OCVW::_0)
            }
            #[doc = "The software output control forces 1 to the channel output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH0OCVW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH1OCV`"]
        pub enum CH1OCVW {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH1OCVW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH1OCVW::_0 => false,
                    CH1OCVW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH1OCVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH1OCVW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH1OCVW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software output control forces 0 to the channel output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH1OCVW::_0)
            }
            #[doc = "The software output control forces 1 to the channel output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH1OCVW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH2OCV`"]
        pub enum CH2OCVW {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH2OCVW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH2OCVW::_0 => false,
                    CH2OCVW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH2OCVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH2OCVW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH2OCVW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software output control forces 0 to the channel output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH2OCVW::_0)
            }
            #[doc = "The software output control forces 1 to the channel output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH2OCVW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH3OCV`"]
        pub enum CH3OCVW {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH3OCVW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH3OCVW::_0 => false,
                    CH3OCVW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH3OCVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH3OCVW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH3OCVW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software output control forces 0 to the channel output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH3OCVW::_0)
            }
            #[doc = "The software output control forces 1 to the channel output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH3OCVW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH4OCV`"]
        pub enum CH4OCVW {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH4OCVW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH4OCVW::_0 => false,
                    CH4OCVW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH4OCVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH4OCVW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH4OCVW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software output control forces 0 to the channel output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH4OCVW::_0)
            }
            #[doc = "The software output control forces 1 to the channel output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH4OCVW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH5OCV`"]
        pub enum CH5OCVW {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH5OCVW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH5OCVW::_0 => false,
                    CH5OCVW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH5OCVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH5OCVW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH5OCVW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software output control forces 0 to the channel output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH5OCVW::_0)
            }
            #[doc = "The software output control forces 1 to the channel output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH5OCVW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH6OCV`"]
        pub enum CH6OCVW {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH6OCVW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH6OCVW::_0 => false,
                    CH6OCVW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH6OCVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH6OCVW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH6OCVW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software output control forces 0 to the channel output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH6OCVW::_0)
            }
            #[doc = "The software output control forces 1 to the channel output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH6OCVW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH7OCV`"]
        pub enum CH7OCVW {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH7OCVW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH7OCVW::_0 => false,
                    CH7OCVW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH7OCVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH7OCVW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH7OCVW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software output control forces 0 to the channel output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH7OCVW::_0)
            }
            #[doc = "The software output control forces 1 to the channel output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH7OCVW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Channel 0 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch0oc(&self) -> CH0OCR {
                CH0OCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Channel 1 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch1oc(&self) -> CH1OCR {
                CH1OCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel 2 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch2oc(&self) -> CH2OCR {
                CH2OCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Channel 3 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch3oc(&self) -> CH3OCR {
                CH3OCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Channel 4 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch4oc(&self) -> CH4OCR {
                CH4OCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Channel 5 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch5oc(&self) -> CH5OCR {
                CH5OCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Channel 6 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch6oc(&self) -> CH6OCR {
                CH6OCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel 7 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch7oc(&self) -> CH7OCR {
                CH7OCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Channel 0 Software Output Control Value"]
            #[inline(always)]
            pub fn ch0ocv(&self) -> CH0OCVR {
                CH0OCVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Channel 1 Software Output Control Value"]
            #[inline(always)]
            pub fn ch1ocv(&self) -> CH1OCVR {
                CH1OCVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Channel 2 Software Output Control Value"]
            #[inline(always)]
            pub fn ch2ocv(&self) -> CH2OCVR {
                CH2OCVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 11 - Channel 3 Software Output Control Value"]
            #[inline(always)]
            pub fn ch3ocv(&self) -> CH3OCVR {
                CH3OCVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Channel 4 Software Output Control Value"]
            #[inline(always)]
            pub fn ch4ocv(&self) -> CH4OCVR {
                CH4OCVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Channel 5 Software Output Control Value"]
            #[inline(always)]
            pub fn ch5ocv(&self) -> CH5OCVR {
                CH5OCVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - Channel 6 Software Output Control Value"]
            #[inline(always)]
            pub fn ch6ocv(&self) -> CH6OCVR {
                CH6OCVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - Channel 7 Software Output Control Value"]
            #[inline(always)]
            pub fn ch7ocv(&self) -> CH7OCVR {
                CH7OCVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Channel 0 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch0oc(&mut self) -> _CH0OCW {
                _CH0OCW { w: self }
            }
            #[doc = "Bit 1 - Channel 1 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch1oc(&mut self) -> _CH1OCW {
                _CH1OCW { w: self }
            }
            #[doc = "Bit 2 - Channel 2 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch2oc(&mut self) -> _CH2OCW {
                _CH2OCW { w: self }
            }
            #[doc = "Bit 3 - Channel 3 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch3oc(&mut self) -> _CH3OCW {
                _CH3OCW { w: self }
            }
            #[doc = "Bit 4 - Channel 4 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch4oc(&mut self) -> _CH4OCW {
                _CH4OCW { w: self }
            }
            #[doc = "Bit 5 - Channel 5 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch5oc(&mut self) -> _CH5OCW {
                _CH5OCW { w: self }
            }
            #[doc = "Bit 6 - Channel 6 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch6oc(&mut self) -> _CH6OCW {
                _CH6OCW { w: self }
            }
            #[doc = "Bit 7 - Channel 7 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch7oc(&mut self) -> _CH7OCW {
                _CH7OCW { w: self }
            }
            #[doc = "Bit 8 - Channel 0 Software Output Control Value"]
            #[inline(always)]
            pub fn ch0ocv(&mut self) -> _CH0OCVW {
                _CH0OCVW { w: self }
            }
            #[doc = "Bit 9 - Channel 1 Software Output Control Value"]
            #[inline(always)]
            pub fn ch1ocv(&mut self) -> _CH1OCVW {
                _CH1OCVW { w: self }
            }
            #[doc = "Bit 10 - Channel 2 Software Output Control Value"]
            #[inline(always)]
            pub fn ch2ocv(&mut self) -> _CH2OCVW {
                _CH2OCVW { w: self }
            }
            #[doc = "Bit 11 - Channel 3 Software Output Control Value"]
            #[inline(always)]
            pub fn ch3ocv(&mut self) -> _CH3OCVW {
                _CH3OCVW { w: self }
            }
            #[doc = "Bit 12 - Channel 4 Software Output Control Value"]
            #[inline(always)]
            pub fn ch4ocv(&mut self) -> _CH4OCVW {
                _CH4OCVW { w: self }
            }
            #[doc = "Bit 13 - Channel 5 Software Output Control Value"]
            #[inline(always)]
            pub fn ch5ocv(&mut self) -> _CH5OCVW {
                _CH5OCVW { w: self }
            }
            #[doc = "Bit 14 - Channel 6 Software Output Control Value"]
            #[inline(always)]
            pub fn ch6ocv(&mut self) -> _CH6OCVW {
                _CH6OCVW { w: self }
            }
            #[doc = "Bit 15 - Channel 7 Software Output Control Value"]
            #[inline(always)]
            pub fn ch7ocv(&mut self) -> _CH7OCVW {
                _CH7OCVW { w: self }
            }
        }
    }
    #[doc = "FTM PWM Load"]
    pub struct PWMLOAD {
        register: VolatileCell<u32>,
    }
    #[doc = "FTM PWM Load"]
    pub mod pwmload {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PWMLOAD {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CH0SEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH0SELR {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH0SELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH0SELR::_0 => false,
                    CH0SELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH0SELR {
                match value {
                    false => CH0SELR::_0,
                    true => CH0SELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH0SELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH0SELR::_1
            }
        }
        #[doc = "Possible values of the field `CH1SEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH1SELR {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH1SELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH1SELR::_0 => false,
                    CH1SELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH1SELR {
                match value {
                    false => CH1SELR::_0,
                    true => CH1SELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH1SELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH1SELR::_1
            }
        }
        #[doc = "Possible values of the field `CH2SEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH2SELR {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH2SELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH2SELR::_0 => false,
                    CH2SELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH2SELR {
                match value {
                    false => CH2SELR::_0,
                    true => CH2SELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH2SELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH2SELR::_1
            }
        }
        #[doc = "Possible values of the field `CH3SEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH3SELR {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH3SELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH3SELR::_0 => false,
                    CH3SELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH3SELR {
                match value {
                    false => CH3SELR::_0,
                    true => CH3SELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH3SELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH3SELR::_1
            }
        }
        #[doc = "Possible values of the field `CH4SEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH4SELR {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH4SELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH4SELR::_0 => false,
                    CH4SELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH4SELR {
                match value {
                    false => CH4SELR::_0,
                    true => CH4SELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH4SELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH4SELR::_1
            }
        }
        #[doc = "Possible values of the field `CH5SEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH5SELR {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH5SELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH5SELR::_0 => false,
                    CH5SELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH5SELR {
                match value {
                    false => CH5SELR::_0,
                    true => CH5SELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH5SELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH5SELR::_1
            }
        }
        #[doc = "Possible values of the field `CH6SEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH6SELR {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH6SELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH6SELR::_0 => false,
                    CH6SELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH6SELR {
                match value {
                    false => CH6SELR::_0,
                    true => CH6SELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH6SELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH6SELR::_1
            }
        }
        #[doc = "Possible values of the field `CH7SEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH7SELR {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH7SELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH7SELR::_0 => false,
                    CH7SELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH7SELR {
                match value {
                    false => CH7SELR::_0,
                    true => CH7SELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH7SELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH7SELR::_1
            }
        }
        #[doc = "Possible values of the field `HCSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HCSELR {
            #[doc = "Half cycle reload is disabled and it is not considered as a reload opportunity."]
            _0,
            #[doc = "Half cycle reload is enabled and it is considered as a reload opportunity."]
            _1,
        }
        impl HCSELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HCSELR::_0 => false,
                    HCSELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HCSELR {
                match value {
                    false => HCSELR::_0,
                    true => HCSELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HCSELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HCSELR::_1
            }
        }
        #[doc = "Possible values of the field `LDOK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LDOKR {
            #[doc = "Loading updated values is disabled."]
            _0,
            #[doc = "Loading updated values is enabled."]
            _1,
        }
        impl LDOKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LDOKR::_0 => false,
                    LDOKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LDOKR {
                match value {
                    false => LDOKR::_0,
                    true => LDOKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LDOKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LDOKR::_1
            }
        }
        #[doc = "Possible values of the field `GLEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum GLENR {
            #[doc = "Global Load Ok disabled."]
            _0,
            #[doc = "Global Load OK enabled. A pulse event on the module global load input sets the LDOK bit."]
            _1,
        }
        impl GLENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    GLENR::_0 => false,
                    GLENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> GLENR {
                match value {
                    false => GLENR::_0,
                    true => GLENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == GLENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == GLENR::_1
            }
        }
        #[doc = "Values that can be written to the field `CH0SEL`"]
        pub enum CH0SELW {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH0SELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH0SELW::_0 => false,
                    CH0SELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH0SELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH0SELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH0SELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel match is not included as a reload opportunity."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH0SELW::_0)
            }
            #[doc = "Channel match is included as a reload opportunity."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH0SELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH1SEL`"]
        pub enum CH1SELW {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH1SELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH1SELW::_0 => false,
                    CH1SELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH1SELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH1SELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH1SELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel match is not included as a reload opportunity."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH1SELW::_0)
            }
            #[doc = "Channel match is included as a reload opportunity."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH1SELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH2SEL`"]
        pub enum CH2SELW {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH2SELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH2SELW::_0 => false,
                    CH2SELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH2SELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH2SELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH2SELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel match is not included as a reload opportunity."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH2SELW::_0)
            }
            #[doc = "Channel match is included as a reload opportunity."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH2SELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH3SEL`"]
        pub enum CH3SELW {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH3SELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH3SELW::_0 => false,
                    CH3SELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH3SELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH3SELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH3SELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel match is not included as a reload opportunity."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH3SELW::_0)
            }
            #[doc = "Channel match is included as a reload opportunity."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH3SELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH4SEL`"]
        pub enum CH4SELW {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH4SELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH4SELW::_0 => false,
                    CH4SELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH4SELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH4SELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH4SELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel match is not included as a reload opportunity."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH4SELW::_0)
            }
            #[doc = "Channel match is included as a reload opportunity."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH4SELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH5SEL`"]
        pub enum CH5SELW {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH5SELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH5SELW::_0 => false,
                    CH5SELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH5SELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH5SELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH5SELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel match is not included as a reload opportunity."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH5SELW::_0)
            }
            #[doc = "Channel match is included as a reload opportunity."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH5SELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH6SEL`"]
        pub enum CH6SELW {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH6SELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH6SELW::_0 => false,
                    CH6SELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH6SELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH6SELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH6SELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel match is not included as a reload opportunity."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH6SELW::_0)
            }
            #[doc = "Channel match is included as a reload opportunity."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH6SELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH7SEL`"]
        pub enum CH7SELW {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH7SELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH7SELW::_0 => false,
                    CH7SELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH7SELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH7SELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH7SELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel match is not included as a reload opportunity."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH7SELW::_0)
            }
            #[doc = "Channel match is included as a reload opportunity."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH7SELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `HCSEL`"]
        pub enum HCSELW {
            #[doc = "Half cycle reload is disabled and it is not considered as a reload opportunity."]
            _0,
            #[doc = "Half cycle reload is enabled and it is considered as a reload opportunity."]
            _1,
        }
        impl HCSELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HCSELW::_0 => false,
                    HCSELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HCSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HCSELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HCSELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Half cycle reload is disabled and it is not considered as a reload opportunity."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HCSELW::_0)
            }
            #[doc = "Half cycle reload is enabled and it is considered as a reload opportunity."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HCSELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LDOK`"]
        pub enum LDOKW {
            #[doc = "Loading updated values is disabled."]
            _0,
            #[doc = "Loading updated values is enabled."]
            _1,
        }
        impl LDOKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LDOKW::_0 => false,
                    LDOKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LDOKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LDOKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LDOKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Loading updated values is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LDOKW::_0)
            }
            #[doc = "Loading updated values is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LDOKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `GLEN`"]
        pub enum GLENW {
            #[doc = "Global Load Ok disabled."]
            _0,
            #[doc = "Global Load OK enabled. A pulse event on the module global load input sets the LDOK bit."]
            _1,
        }
        impl GLENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    GLENW::_0 => false,
                    GLENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _GLENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GLENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: GLENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Global Load Ok disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(GLENW::_0)
            }
            #[doc = "Global Load OK enabled. A pulse event on the module global load input sets the LDOK bit."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(GLENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `GLDOK`"]
        pub enum GLDOKW {
            #[doc = "No action."]
            _0,
            #[doc = "LDOK bit is set."]
            _1,
        }
        impl GLDOKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    GLDOKW::_0 => false,
                    GLDOKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _GLDOKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GLDOKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: GLDOKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No action."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(GLDOKW::_0)
            }
            #[doc = "LDOK bit is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(GLDOKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Channel 0 Select"]
            #[inline(always)]
            pub fn ch0sel(&self) -> CH0SELR {
                CH0SELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Channel 1 Select"]
            #[inline(always)]
            pub fn ch1sel(&self) -> CH1SELR {
                CH1SELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel 2 Select"]
            #[inline(always)]
            pub fn ch2sel(&self) -> CH2SELR {
                CH2SELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Channel 3 Select"]
            #[inline(always)]
            pub fn ch3sel(&self) -> CH3SELR {
                CH3SELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Channel 4 Select"]
            #[inline(always)]
            pub fn ch4sel(&self) -> CH4SELR {
                CH4SELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Channel 5 Select"]
            #[inline(always)]
            pub fn ch5sel(&self) -> CH5SELR {
                CH5SELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Channel 6 Select"]
            #[inline(always)]
            pub fn ch6sel(&self) -> CH6SELR {
                CH6SELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel 7 Select"]
            #[inline(always)]
            pub fn ch7sel(&self) -> CH7SELR {
                CH7SELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Half Cycle Select"]
            #[inline(always)]
            pub fn hcsel(&self) -> HCSELR {
                HCSELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Load Enable"]
            #[inline(always)]
            pub fn ldok(&self) -> LDOKR {
                LDOKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Global Load Enable"]
            #[inline(always)]
            pub fn glen(&self) -> GLENR {
                GLENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Channel 0 Select"]
            #[inline(always)]
            pub fn ch0sel(&mut self) -> _CH0SELW {
                _CH0SELW { w: self }
            }
            #[doc = "Bit 1 - Channel 1 Select"]
            #[inline(always)]
            pub fn ch1sel(&mut self) -> _CH1SELW {
                _CH1SELW { w: self }
            }
            #[doc = "Bit 2 - Channel 2 Select"]
            #[inline(always)]
            pub fn ch2sel(&mut self) -> _CH2SELW {
                _CH2SELW { w: self }
            }
            #[doc = "Bit 3 - Channel 3 Select"]
            #[inline(always)]
            pub fn ch3sel(&mut self) -> _CH3SELW {
                _CH3SELW { w: self }
            }
            #[doc = "Bit 4 - Channel 4 Select"]
            #[inline(always)]
            pub fn ch4sel(&mut self) -> _CH4SELW {
                _CH4SELW { w: self }
            }
            #[doc = "Bit 5 - Channel 5 Select"]
            #[inline(always)]
            pub fn ch5sel(&mut self) -> _CH5SELW {
                _CH5SELW { w: self }
            }
            #[doc = "Bit 6 - Channel 6 Select"]
            #[inline(always)]
            pub fn ch6sel(&mut self) -> _CH6SELW {
                _CH6SELW { w: self }
            }
            #[doc = "Bit 7 - Channel 7 Select"]
            #[inline(always)]
            pub fn ch7sel(&mut self) -> _CH7SELW {
                _CH7SELW { w: self }
            }
            #[doc = "Bit 8 - Half Cycle Select"]
            #[inline(always)]
            pub fn hcsel(&mut self) -> _HCSELW {
                _HCSELW { w: self }
            }
            #[doc = "Bit 9 - Load Enable"]
            #[inline(always)]
            pub fn ldok(&mut self) -> _LDOKW {
                _LDOKW { w: self }
            }
            #[doc = "Bit 10 - Global Load Enable"]
            #[inline(always)]
            pub fn glen(&mut self) -> _GLENW {
                _GLENW { w: self }
            }
            #[doc = "Bit 11 - Global Load OK"]
            #[inline(always)]
            pub fn gldok(&mut self) -> _GLDOKW {
                _GLDOKW { w: self }
            }
        }
    }
    #[doc = "Half Cycle Register"]
    pub struct HCR {
        register: VolatileCell<u32>,
    }
    #[doc = "Half Cycle Register"]
    pub mod hcr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::HCR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct HCVALR {
            bits: u16,
        }
        impl HCVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _HCVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HCVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Half Cycle Value"]
            #[inline(always)]
            pub fn hcval(&self) -> HCVALR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                HCVALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Half Cycle Value"]
            #[inline(always)]
            pub fn hcval(&mut self) -> _HCVALW {
                _HCVALW { w: self }
            }
        }
    }
    #[doc = "Pair 0 Deadtime Configuration"]
    pub struct PAIR0DEADTIME {
        register: VolatileCell<u32>,
    }
    #[doc = "Pair 0 Deadtime Configuration"]
    pub mod pair0deadtime {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PAIR0DEADTIME {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DTVALR {
            bits: u8,
        }
        impl DTVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DTPS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DTPSR {
            #[doc = "Divide the FTM input clock by 1."]
            _0X,
            #[doc = "Divide the FTM input clock by 4."]
            _10,
            #[doc = "Divide the FTM input clock by 16."]
            _11,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl DTPSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    DTPSR::_0X => 0,
                    DTPSR::_10 => 2,
                    DTPSR::_11 => 3,
                    DTPSR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> DTPSR {
                match value {
                    0 => DTPSR::_0X,
                    2 => DTPSR::_10,
                    3 => DTPSR::_11,
                    i => DTPSR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0X`"]
            #[inline(always)]
            pub fn is_0x(&self) -> bool {
                *self == DTPSR::_0X
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == DTPSR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == DTPSR::_11
            }
        }
        #[doc = r" Value of the field"]
        pub struct DTVALEXR {
            bits: u8,
        }
        impl DTVALEXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DTPS`"]
        pub enum DTPSW {
            #[doc = "Divide the FTM input clock by 1."]
            _0X,
            #[doc = "Divide the FTM input clock by 4."]
            _10,
            #[doc = "Divide the FTM input clock by 16."]
            _11,
        }
        impl DTPSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    DTPSW::_0X => 0,
                    DTPSW::_10 => 2,
                    DTPSW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTPSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTPSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DTPSW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Divide the FTM input clock by 1."]
            #[inline(always)]
            pub fn _0x(self) -> &'a mut W {
                self.variant(DTPSW::_0X)
            }
            #[doc = "Divide the FTM input clock by 4."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(DTPSW::_10)
            }
            #[doc = "Divide the FTM input clock by 16."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(DTPSW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTVALEXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTVALEXW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Deadtime Value"]
            #[inline(always)]
            pub fn dtval(&self) -> DTVALR {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DTVALR { bits }
            }
            #[doc = "Bits 6:7 - Deadtime Prescaler Value"]
            #[inline(always)]
            pub fn dtps(&self) -> DTPSR {
                DTPSR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 16:19 - Extended Deadtime Value"]
            #[inline(always)]
            pub fn dtvalex(&self) -> DTVALEXR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DTVALEXR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - Deadtime Value"]
            #[inline(always)]
            pub fn dtval(&mut self) -> _DTVALW {
                _DTVALW { w: self }
            }
            #[doc = "Bits 6:7 - Deadtime Prescaler Value"]
            #[inline(always)]
            pub fn dtps(&mut self) -> _DTPSW {
                _DTPSW { w: self }
            }
            #[doc = "Bits 16:19 - Extended Deadtime Value"]
            #[inline(always)]
            pub fn dtvalex(&mut self) -> _DTVALEXW {
                _DTVALEXW { w: self }
            }
        }
    }
    #[doc = "Pair 1 Deadtime Configuration"]
    pub struct PAIR1DEADTIME {
        register: VolatileCell<u32>,
    }
    #[doc = "Pair 1 Deadtime Configuration"]
    pub mod pair1deadtime {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PAIR1DEADTIME {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DTVALR {
            bits: u8,
        }
        impl DTVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DTPS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DTPSR {
            #[doc = "Divide the FTM input clock by 1."]
            _0X,
            #[doc = "Divide the FTM input clock by 4."]
            _10,
            #[doc = "Divide the FTM input clock by 16."]
            _11,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl DTPSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    DTPSR::_0X => 0,
                    DTPSR::_10 => 2,
                    DTPSR::_11 => 3,
                    DTPSR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> DTPSR {
                match value {
                    0 => DTPSR::_0X,
                    2 => DTPSR::_10,
                    3 => DTPSR::_11,
                    i => DTPSR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0X`"]
            #[inline(always)]
            pub fn is_0x(&self) -> bool {
                *self == DTPSR::_0X
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == DTPSR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == DTPSR::_11
            }
        }
        #[doc = r" Value of the field"]
        pub struct DTVALEXR {
            bits: u8,
        }
        impl DTVALEXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DTPS`"]
        pub enum DTPSW {
            #[doc = "Divide the FTM input clock by 1."]
            _0X,
            #[doc = "Divide the FTM input clock by 4."]
            _10,
            #[doc = "Divide the FTM input clock by 16."]
            _11,
        }
        impl DTPSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    DTPSW::_0X => 0,
                    DTPSW::_10 => 2,
                    DTPSW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTPSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTPSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DTPSW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Divide the FTM input clock by 1."]
            #[inline(always)]
            pub fn _0x(self) -> &'a mut W {
                self.variant(DTPSW::_0X)
            }
            #[doc = "Divide the FTM input clock by 4."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(DTPSW::_10)
            }
            #[doc = "Divide the FTM input clock by 16."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(DTPSW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTVALEXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTVALEXW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Deadtime Value"]
            #[inline(always)]
            pub fn dtval(&self) -> DTVALR {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DTVALR { bits }
            }
            #[doc = "Bits 6:7 - Deadtime Prescaler Value"]
            #[inline(always)]
            pub fn dtps(&self) -> DTPSR {
                DTPSR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 16:19 - Extended Deadtime Value"]
            #[inline(always)]
            pub fn dtvalex(&self) -> DTVALEXR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DTVALEXR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - Deadtime Value"]
            #[inline(always)]
            pub fn dtval(&mut self) -> _DTVALW {
                _DTVALW { w: self }
            }
            #[doc = "Bits 6:7 - Deadtime Prescaler Value"]
            #[inline(always)]
            pub fn dtps(&mut self) -> _DTPSW {
                _DTPSW { w: self }
            }
            #[doc = "Bits 16:19 - Extended Deadtime Value"]
            #[inline(always)]
            pub fn dtvalex(&mut self) -> _DTVALEXW {
                _DTVALEXW { w: self }
            }
        }
    }
    #[doc = "Pair 2 Deadtime Configuration"]
    pub struct PAIR2DEADTIME {
        register: VolatileCell<u32>,
    }
    #[doc = "Pair 2 Deadtime Configuration"]
    pub mod pair2deadtime {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PAIR2DEADTIME {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DTVALR {
            bits: u8,
        }
        impl DTVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DTPS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DTPSR {
            #[doc = "Divide the FTM input clock by 1."]
            _0X,
            #[doc = "Divide the FTM input clock by 4."]
            _10,
            #[doc = "Divide the FTM input clock by 16."]
            _11,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl DTPSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    DTPSR::_0X => 0,
                    DTPSR::_10 => 2,
                    DTPSR::_11 => 3,
                    DTPSR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> DTPSR {
                match value {
                    0 => DTPSR::_0X,
                    2 => DTPSR::_10,
                    3 => DTPSR::_11,
                    i => DTPSR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0X`"]
            #[inline(always)]
            pub fn is_0x(&self) -> bool {
                *self == DTPSR::_0X
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == DTPSR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == DTPSR::_11
            }
        }
        #[doc = r" Value of the field"]
        pub struct DTVALEXR {
            bits: u8,
        }
        impl DTVALEXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DTPS`"]
        pub enum DTPSW {
            #[doc = "Divide the FTM input clock by 1."]
            _0X,
            #[doc = "Divide the FTM input clock by 4."]
            _10,
            #[doc = "Divide the FTM input clock by 16."]
            _11,
        }
        impl DTPSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    DTPSW::_0X => 0,
                    DTPSW::_10 => 2,
                    DTPSW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTPSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTPSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DTPSW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Divide the FTM input clock by 1."]
            #[inline(always)]
            pub fn _0x(self) -> &'a mut W {
                self.variant(DTPSW::_0X)
            }
            #[doc = "Divide the FTM input clock by 4."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(DTPSW::_10)
            }
            #[doc = "Divide the FTM input clock by 16."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(DTPSW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTVALEXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTVALEXW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Deadtime Value"]
            #[inline(always)]
            pub fn dtval(&self) -> DTVALR {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DTVALR { bits }
            }
            #[doc = "Bits 6:7 - Deadtime Prescaler Value"]
            #[inline(always)]
            pub fn dtps(&self) -> DTPSR {
                DTPSR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 16:19 - Extended Deadtime Value"]
            #[inline(always)]
            pub fn dtvalex(&self) -> DTVALEXR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DTVALEXR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - Deadtime Value"]
            #[inline(always)]
            pub fn dtval(&mut self) -> _DTVALW {
                _DTVALW { w: self }
            }
            #[doc = "Bits 6:7 - Deadtime Prescaler Value"]
            #[inline(always)]
            pub fn dtps(&mut self) -> _DTPSW {
                _DTPSW { w: self }
            }
            #[doc = "Bits 16:19 - Extended Deadtime Value"]
            #[inline(always)]
            pub fn dtvalex(&mut self) -> _DTVALEXW {
                _DTVALEXW { w: self }
            }
        }
    }
    #[doc = "Pair 3 Deadtime Configuration"]
    pub struct PAIR3DEADTIME {
        register: VolatileCell<u32>,
    }
    #[doc = "Pair 3 Deadtime Configuration"]
    pub mod pair3deadtime {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PAIR3DEADTIME {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DTVALR {
            bits: u8,
        }
        impl DTVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DTPS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DTPSR {
            #[doc = "Divide the FTM input clock by 1."]
            _0X,
            #[doc = "Divide the FTM input clock by 4."]
            _10,
            #[doc = "Divide the FTM input clock by 16."]
            _11,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl DTPSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    DTPSR::_0X => 0,
                    DTPSR::_10 => 2,
                    DTPSR::_11 => 3,
                    DTPSR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> DTPSR {
                match value {
                    0 => DTPSR::_0X,
                    2 => DTPSR::_10,
                    3 => DTPSR::_11,
                    i => DTPSR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0X`"]
            #[inline(always)]
            pub fn is_0x(&self) -> bool {
                *self == DTPSR::_0X
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == DTPSR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == DTPSR::_11
            }
        }
        #[doc = r" Value of the field"]
        pub struct DTVALEXR {
            bits: u8,
        }
        impl DTVALEXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DTPS`"]
        pub enum DTPSW {
            #[doc = "Divide the FTM input clock by 1."]
            _0X,
            #[doc = "Divide the FTM input clock by 4."]
            _10,
            #[doc = "Divide the FTM input clock by 16."]
            _11,
        }
        impl DTPSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    DTPSW::_0X => 0,
                    DTPSW::_10 => 2,
                    DTPSW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTPSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTPSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DTPSW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Divide the FTM input clock by 1."]
            #[inline(always)]
            pub fn _0x(self) -> &'a mut W {
                self.variant(DTPSW::_0X)
            }
            #[doc = "Divide the FTM input clock by 4."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(DTPSW::_10)
            }
            #[doc = "Divide the FTM input clock by 16."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(DTPSW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTVALEXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTVALEXW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Deadtime Value"]
            #[inline(always)]
            pub fn dtval(&self) -> DTVALR {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DTVALR { bits }
            }
            #[doc = "Bits 6:7 - Deadtime Prescaler Value"]
            #[inline(always)]
            pub fn dtps(&self) -> DTPSR {
                DTPSR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 16:19 - Extended Deadtime Value"]
            #[inline(always)]
            pub fn dtvalex(&self) -> DTVALEXR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DTVALEXR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - Deadtime Value"]
            #[inline(always)]
            pub fn dtval(&mut self) -> _DTVALW {
                _DTVALW { w: self }
            }
            #[doc = "Bits 6:7 - Deadtime Prescaler Value"]
            #[inline(always)]
            pub fn dtps(&mut self) -> _DTPSW {
                _DTPSW { w: self }
            }
            #[doc = "Bits 16:19 - Extended Deadtime Value"]
            #[inline(always)]
            pub fn dtvalex(&mut self) -> _DTVALEXW {
                _DTVALEXW { w: self }
            }
        }
    }
}
#[doc = "FlexTimer Module"]
pub struct FTM2 {
    register_block: ftm2::RegisterBlock,
}
impl Deref for FTM2 {
    type Target = ftm2::RegisterBlock;
    fn deref(&self) -> &ftm2::RegisterBlock {
        &self.register_block
    }
}
#[doc = "FlexTimer Module"]
pub const FTM3: Peripheral<FTM3> = unsafe { Peripheral::new(1073897472) };
#[doc = "FlexTimer Module"]
pub mod ftm3 {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - Status And Control"]
        pub sc: SC,
        #[doc = "0x04 - Counter"]
        pub cnt: CNT,
        #[doc = "0x08 - Modulo"]
        pub mod_: MOD,
        #[doc = "0x0c - Channel (n) Status And Control"]
        pub c0sc: C0SC,
        #[doc = "0x10 - Channel (n) Value"]
        pub c0v: C0V,
        #[doc = "0x14 - Channel (n) Status And Control"]
        pub c1sc: C1SC,
        #[doc = "0x18 - Channel (n) Value"]
        pub c1v: C1V,
        #[doc = "0x1c - Channel (n) Status And Control"]
        pub c2sc: C2SC,
        #[doc = "0x20 - Channel (n) Value"]
        pub c2v: C2V,
        #[doc = "0x24 - Channel (n) Status And Control"]
        pub c3sc: C3SC,
        #[doc = "0x28 - Channel (n) Value"]
        pub c3v: C3V,
        #[doc = "0x2c - Channel (n) Status And Control"]
        pub c4sc: C4SC,
        #[doc = "0x30 - Channel (n) Value"]
        pub c4v: C4V,
        #[doc = "0x34 - Channel (n) Status And Control"]
        pub c5sc: C5SC,
        #[doc = "0x38 - Channel (n) Value"]
        pub c5v: C5V,
        #[doc = "0x3c - Channel (n) Status And Control"]
        pub c6sc: C6SC,
        #[doc = "0x40 - Channel (n) Value"]
        pub c6v: C6V,
        #[doc = "0x44 - Channel (n) Status And Control"]
        pub c7sc: C7SC,
        #[doc = "0x48 - Channel (n) Value"]
        pub c7v: C7V,
        #[doc = "0x4c - Counter Initial Value"]
        pub cntin: CNTIN,
        #[doc = "0x50 - Capture And Compare Status"]
        pub status: STATUS,
        #[doc = "0x54 - Features Mode Selection"]
        pub mode: MODE,
        #[doc = "0x58 - Synchronization"]
        pub sync: SYNC,
        #[doc = "0x5c - Initial State For Channels Output"]
        pub outinit: OUTINIT,
        #[doc = "0x60 - Output Mask"]
        pub outmask: OUTMASK,
        #[doc = "0x64 - Function For Linked Channels"]
        pub combine: COMBINE,
        #[doc = "0x68 - Deadtime Configuration"]
        pub deadtime: DEADTIME,
        #[doc = "0x6c - FTM External Trigger"]
        pub exttrig: EXTTRIG,
        #[doc = "0x70 - Channels Polarity"]
        pub pol: POL,
        #[doc = "0x74 - Fault Mode Status"]
        pub fms: FMS,
        #[doc = "0x78 - Input Capture Filter Control"]
        pub filter: FILTER,
        #[doc = "0x7c - Fault Control"]
        pub fltctrl: FLTCTRL,
        #[doc = "0x80 - Quadrature Decoder Control And Status"]
        pub qdctrl: QDCTRL,
        #[doc = "0x84 - Configuration"]
        pub conf: CONF,
        #[doc = "0x88 - FTM Fault Input Polarity"]
        pub fltpol: FLTPOL,
        #[doc = "0x8c - Synchronization Configuration"]
        pub synconf: SYNCONF,
        #[doc = "0x90 - FTM Inverting Control"]
        pub invctrl: INVCTRL,
        #[doc = "0x94 - FTM Software Output Control"]
        pub swoctrl: SWOCTRL,
        #[doc = "0x98 - FTM PWM Load"]
        pub pwmload: PWMLOAD,
        #[doc = "0x9c - Half Cycle Register"]
        pub hcr: HCR,
        #[doc = "0xa0 - Pair 0 Deadtime Configuration"]
        pub pair0deadtime: PAIR0DEADTIME,
        _reserved0: [u8; 4usize],
        #[doc = "0xa8 - Pair 1 Deadtime Configuration"]
        pub pair1deadtime: PAIR1DEADTIME,
        _reserved1: [u8; 4usize],
        #[doc = "0xb0 - Pair 2 Deadtime Configuration"]
        pub pair2deadtime: PAIR2DEADTIME,
        _reserved2: [u8; 4usize],
        #[doc = "0xb8 - Pair 3 Deadtime Configuration"]
        pub pair3deadtime: PAIR3DEADTIME,
    }
    #[doc = "Status And Control"]
    pub struct SC {
        register: VolatileCell<u32>,
    }
    #[doc = "Status And Control"]
    pub mod sc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Divide by 1"]
            _000,
            #[doc = "Divide by 2"]
            _001,
            #[doc = "Divide by 4"]
            _010,
            #[doc = "Divide by 8"]
            _011,
            #[doc = "Divide by 16"]
            _100,
            #[doc = "Divide by 32"]
            _101,
            #[doc = "Divide by 64"]
            _110,
            #[doc = "Divide by 128"]
            _111,
        }
        impl PSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PSR::_000 => 0,
                    PSR::_001 => 1,
                    PSR::_010 => 2,
                    PSR::_011 => 3,
                    PSR::_100 => 4,
                    PSR::_101 => 5,
                    PSR::_110 => 6,
                    PSR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PSR {
                match value {
                    0 => PSR::_000,
                    1 => PSR::_001,
                    2 => PSR::_010,
                    3 => PSR::_011,
                    4 => PSR::_100,
                    5 => PSR::_101,
                    6 => PSR::_110,
                    7 => PSR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == PSR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == PSR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == PSR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == PSR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == PSR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == PSR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == PSR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == PSR::_111
            }
        }
        #[doc = "Possible values of the field `CLKS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CLKSR {
            #[doc = "No clock selected. This in effect disables the FTM counter."]
            _00,
            #[doc = "FTM input clock"]
            _01,
            #[doc = "Fixed frequency clock"]
            _10,
            #[doc = "External clock"]
            _11,
        }
        impl CLKSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    CLKSR::_00 => 0,
                    CLKSR::_01 => 1,
                    CLKSR::_10 => 2,
                    CLKSR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> CLKSR {
                match value {
                    0 => CLKSR::_00,
                    1 => CLKSR::_01,
                    2 => CLKSR::_10,
                    3 => CLKSR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == CLKSR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == CLKSR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == CLKSR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == CLKSR::_11
            }
        }
        #[doc = "Possible values of the field `CPWMS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CPWMSR {
            #[doc = "FTM counter operates in Up Counting mode."]
            _0,
            #[doc = "FTM counter operates in Up-Down Counting mode."]
            _1,
        }
        impl CPWMSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CPWMSR::_0 => false,
                    CPWMSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CPWMSR {
                match value {
                    false => CPWMSR::_0,
                    true => CPWMSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CPWMSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CPWMSR::_1
            }
        }
        #[doc = "Possible values of the field `RIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RIER {
            #[doc = "Reload point interrupt is disabled."]
            _0,
            #[doc = "Reload point interrupt is enabled."]
            _1,
        }
        impl RIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RIER::_0 => false,
                    RIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RIER {
                match value {
                    false => RIER::_0,
                    true => RIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RIER::_1
            }
        }
        #[doc = "Possible values of the field `RF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RFR {
            #[doc = "A selected reload point did not happen."]
            _0,
            #[doc = "A selected reload point happened."]
            _1,
        }
        impl RFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RFR::_0 => false,
                    RFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RFR {
                match value {
                    false => RFR::_0,
                    true => RFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RFR::_1
            }
        }
        #[doc = "Possible values of the field `TOIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TOIER {
            #[doc = "Disable TOF interrupts. Use software polling."]
            _0,
            #[doc = "Enable TOF interrupts. An interrupt is generated when TOF equals one."]
            _1,
        }
        impl TOIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TOIER::_0 => false,
                    TOIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TOIER {
                match value {
                    false => TOIER::_0,
                    true => TOIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TOIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TOIER::_1
            }
        }
        #[doc = "Possible values of the field `TOF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TOFR {
            #[doc = "FTM counter has not overflowed."]
            _0,
            #[doc = "FTM counter has overflowed."]
            _1,
        }
        impl TOFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TOFR::_0 => false,
                    TOFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TOFR {
                match value {
                    false => TOFR::_0,
                    true => TOFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TOFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TOFR::_1
            }
        }
        #[doc = "Possible values of the field `PWMEN0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PWMEN0R {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PWMEN0R::_0 => false,
                    PWMEN0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PWMEN0R {
                match value {
                    false => PWMEN0R::_0,
                    true => PWMEN0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PWMEN0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PWMEN0R::_1
            }
        }
        #[doc = "Possible values of the field `PWMEN1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PWMEN1R {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PWMEN1R::_0 => false,
                    PWMEN1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PWMEN1R {
                match value {
                    false => PWMEN1R::_0,
                    true => PWMEN1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PWMEN1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PWMEN1R::_1
            }
        }
        #[doc = "Possible values of the field `PWMEN2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PWMEN2R {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PWMEN2R::_0 => false,
                    PWMEN2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PWMEN2R {
                match value {
                    false => PWMEN2R::_0,
                    true => PWMEN2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PWMEN2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PWMEN2R::_1
            }
        }
        #[doc = "Possible values of the field `PWMEN3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PWMEN3R {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PWMEN3R::_0 => false,
                    PWMEN3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PWMEN3R {
                match value {
                    false => PWMEN3R::_0,
                    true => PWMEN3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PWMEN3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PWMEN3R::_1
            }
        }
        #[doc = "Possible values of the field `PWMEN4`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PWMEN4R {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN4R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PWMEN4R::_0 => false,
                    PWMEN4R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PWMEN4R {
                match value {
                    false => PWMEN4R::_0,
                    true => PWMEN4R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PWMEN4R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PWMEN4R::_1
            }
        }
        #[doc = "Possible values of the field `PWMEN5`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PWMEN5R {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN5R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PWMEN5R::_0 => false,
                    PWMEN5R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PWMEN5R {
                match value {
                    false => PWMEN5R::_0,
                    true => PWMEN5R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PWMEN5R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PWMEN5R::_1
            }
        }
        #[doc = "Possible values of the field `PWMEN6`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PWMEN6R {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN6R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PWMEN6R::_0 => false,
                    PWMEN6R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PWMEN6R {
                match value {
                    false => PWMEN6R::_0,
                    true => PWMEN6R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PWMEN6R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PWMEN6R::_1
            }
        }
        #[doc = "Possible values of the field `PWMEN7`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PWMEN7R {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN7R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PWMEN7R::_0 => false,
                    PWMEN7R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PWMEN7R {
                match value {
                    false => PWMEN7R::_0,
                    true => PWMEN7R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PWMEN7R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PWMEN7R::_1
            }
        }
        #[doc = "Possible values of the field `FLTPS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FLTPSR {
            #[doc = "Divide by 1"]
            _0000,
            #[doc = "Divide by 2"]
            _0001,
            #[doc = "Divide by 3"]
            _0010,
            #[doc = "Divide by 4"]
            _0011,
            #[doc = "Divide by 5"]
            _0100,
            #[doc = "Divide by 6"]
            _0101,
            #[doc = "Divide by 7"]
            _0110,
            #[doc = "Divide by 8"]
            _0111,
            #[doc = "Divide by 9"]
            _1000,
            #[doc = "Divide by 10"]
            _1001,
            #[doc = "Divide by 11"]
            _1010,
            #[doc = "Divide by 12"]
            _1011,
            #[doc = "Divide by 13"]
            _1100,
            #[doc = "Divide by 14"]
            _1101,
            #[doc = "Divide by 15"]
            _1110,
            #[doc = "Divide by 16"]
            _1111,
        }
        impl FLTPSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    FLTPSR::_0000 => 0,
                    FLTPSR::_0001 => 1,
                    FLTPSR::_0010 => 2,
                    FLTPSR::_0011 => 3,
                    FLTPSR::_0100 => 4,
                    FLTPSR::_0101 => 5,
                    FLTPSR::_0110 => 6,
                    FLTPSR::_0111 => 7,
                    FLTPSR::_1000 => 8,
                    FLTPSR::_1001 => 9,
                    FLTPSR::_1010 => 10,
                    FLTPSR::_1011 => 11,
                    FLTPSR::_1100 => 12,
                    FLTPSR::_1101 => 13,
                    FLTPSR::_1110 => 14,
                    FLTPSR::_1111 => 15,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> FLTPSR {
                match value {
                    0 => FLTPSR::_0000,
                    1 => FLTPSR::_0001,
                    2 => FLTPSR::_0010,
                    3 => FLTPSR::_0011,
                    4 => FLTPSR::_0100,
                    5 => FLTPSR::_0101,
                    6 => FLTPSR::_0110,
                    7 => FLTPSR::_0111,
                    8 => FLTPSR::_1000,
                    9 => FLTPSR::_1001,
                    10 => FLTPSR::_1010,
                    11 => FLTPSR::_1011,
                    12 => FLTPSR::_1100,
                    13 => FLTPSR::_1101,
                    14 => FLTPSR::_1110,
                    15 => FLTPSR::_1111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == FLTPSR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == FLTPSR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == FLTPSR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == FLTPSR::_0011
            }
            #[doc = "Checks if the value of the field is `_0100`"]
            #[inline(always)]
            pub fn is_0100(&self) -> bool {
                *self == FLTPSR::_0100
            }
            #[doc = "Checks if the value of the field is `_0101`"]
            #[inline(always)]
            pub fn is_0101(&self) -> bool {
                *self == FLTPSR::_0101
            }
            #[doc = "Checks if the value of the field is `_0110`"]
            #[inline(always)]
            pub fn is_0110(&self) -> bool {
                *self == FLTPSR::_0110
            }
            #[doc = "Checks if the value of the field is `_0111`"]
            #[inline(always)]
            pub fn is_0111(&self) -> bool {
                *self == FLTPSR::_0111
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == FLTPSR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == FLTPSR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == FLTPSR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == FLTPSR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == FLTPSR::_1100
            }
            #[doc = "Checks if the value of the field is `_1101`"]
            #[inline(always)]
            pub fn is_1101(&self) -> bool {
                *self == FLTPSR::_1101
            }
            #[doc = "Checks if the value of the field is `_1110`"]
            #[inline(always)]
            pub fn is_1110(&self) -> bool {
                *self == FLTPSR::_1110
            }
            #[doc = "Checks if the value of the field is `_1111`"]
            #[inline(always)]
            pub fn is_1111(&self) -> bool {
                *self == FLTPSR::_1111
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Divide by 1"]
            _000,
            #[doc = "Divide by 2"]
            _001,
            #[doc = "Divide by 4"]
            _010,
            #[doc = "Divide by 8"]
            _011,
            #[doc = "Divide by 16"]
            _100,
            #[doc = "Divide by 32"]
            _101,
            #[doc = "Divide by 64"]
            _110,
            #[doc = "Divide by 128"]
            _111,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PSW::_000 => 0,
                    PSW::_001 => 1,
                    PSW::_010 => 2,
                    PSW::_011 => 3,
                    PSW::_100 => 4,
                    PSW::_101 => 5,
                    PSW::_110 => 6,
                    PSW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Divide by 1"]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(PSW::_000)
            }
            #[doc = "Divide by 2"]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(PSW::_001)
            }
            #[doc = "Divide by 4"]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(PSW::_010)
            }
            #[doc = "Divide by 8"]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(PSW::_011)
            }
            #[doc = "Divide by 16"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(PSW::_100)
            }
            #[doc = "Divide by 32"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(PSW::_101)
            }
            #[doc = "Divide by 64"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(PSW::_110)
            }
            #[doc = "Divide by 128"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(PSW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CLKS`"]
        pub enum CLKSW {
            #[doc = "No clock selected. This in effect disables the FTM counter."]
            _00,
            #[doc = "FTM input clock"]
            _01,
            #[doc = "Fixed frequency clock"]
            _10,
            #[doc = "External clock"]
            _11,
        }
        impl CLKSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    CLKSW::_00 => 0,
                    CLKSW::_01 => 1,
                    CLKSW::_10 => 2,
                    CLKSW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLKSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLKSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CLKSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "No clock selected. This in effect disables the FTM counter."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(CLKSW::_00)
            }
            #[doc = "FTM input clock"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(CLKSW::_01)
            }
            #[doc = "Fixed frequency clock"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(CLKSW::_10)
            }
            #[doc = "External clock"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(CLKSW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CPWMS`"]
        pub enum CPWMSW {
            #[doc = "FTM counter operates in Up Counting mode."]
            _0,
            #[doc = "FTM counter operates in Up-Down Counting mode."]
            _1,
        }
        impl CPWMSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CPWMSW::_0 => false,
                    CPWMSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CPWMSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CPWMSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CPWMSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM counter operates in Up Counting mode."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CPWMSW::_0)
            }
            #[doc = "FTM counter operates in Up-Down Counting mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CPWMSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RIE`"]
        pub enum RIEW {
            #[doc = "Reload point interrupt is disabled."]
            _0,
            #[doc = "Reload point interrupt is enabled."]
            _1,
        }
        impl RIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RIEW::_0 => false,
                    RIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Reload point interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RIEW::_0)
            }
            #[doc = "Reload point interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TOIE`"]
        pub enum TOIEW {
            #[doc = "Disable TOF interrupts. Use software polling."]
            _0,
            #[doc = "Enable TOF interrupts. An interrupt is generated when TOF equals one."]
            _1,
        }
        impl TOIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TOIEW::_0 => false,
                    TOIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TOIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TOIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TOIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable TOF interrupts. Use software polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TOIEW::_0)
            }
            #[doc = "Enable TOF interrupts. An interrupt is generated when TOF equals one."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TOIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PWMEN0`"]
        pub enum PWMEN0W {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PWMEN0W::_0 => false,
                    PWMEN0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PWMEN0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _PWMEN0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PWMEN0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output port is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PWMEN0W::_0)
            }
            #[doc = "Channel output port is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PWMEN0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PWMEN1`"]
        pub enum PWMEN1W {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PWMEN1W::_0 => false,
                    PWMEN1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PWMEN1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _PWMEN1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PWMEN1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output port is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PWMEN1W::_0)
            }
            #[doc = "Channel output port is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PWMEN1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PWMEN2`"]
        pub enum PWMEN2W {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PWMEN2W::_0 => false,
                    PWMEN2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PWMEN2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _PWMEN2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PWMEN2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output port is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PWMEN2W::_0)
            }
            #[doc = "Channel output port is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PWMEN2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PWMEN3`"]
        pub enum PWMEN3W {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PWMEN3W::_0 => false,
                    PWMEN3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PWMEN3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _PWMEN3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PWMEN3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output port is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PWMEN3W::_0)
            }
            #[doc = "Channel output port is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PWMEN3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 19;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PWMEN4`"]
        pub enum PWMEN4W {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN4W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PWMEN4W::_0 => false,
                    PWMEN4W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PWMEN4W<'a> {
            w: &'a mut W,
        }
        impl<'a> _PWMEN4W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PWMEN4W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output port is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PWMEN4W::_0)
            }
            #[doc = "Channel output port is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PWMEN4W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PWMEN5`"]
        pub enum PWMEN5W {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN5W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PWMEN5W::_0 => false,
                    PWMEN5W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PWMEN5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _PWMEN5W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PWMEN5W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output port is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PWMEN5W::_0)
            }
            #[doc = "Channel output port is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PWMEN5W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 21;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PWMEN6`"]
        pub enum PWMEN6W {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN6W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PWMEN6W::_0 => false,
                    PWMEN6W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PWMEN6W<'a> {
            w: &'a mut W,
        }
        impl<'a> _PWMEN6W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PWMEN6W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output port is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PWMEN6W::_0)
            }
            #[doc = "Channel output port is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PWMEN6W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 22;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PWMEN7`"]
        pub enum PWMEN7W {
            #[doc = "Channel output port is disabled"]
            _0,
            #[doc = "Channel output port is enabled"]
            _1,
        }
        impl PWMEN7W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PWMEN7W::_0 => false,
                    PWMEN7W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PWMEN7W<'a> {
            w: &'a mut W,
        }
        impl<'a> _PWMEN7W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PWMEN7W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output port is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PWMEN7W::_0)
            }
            #[doc = "Channel output port is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PWMEN7W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 23;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FLTPS`"]
        pub enum FLTPSW {
            #[doc = "Divide by 1"]
            _0000,
            #[doc = "Divide by 2"]
            _0001,
            #[doc = "Divide by 3"]
            _0010,
            #[doc = "Divide by 4"]
            _0011,
            #[doc = "Divide by 5"]
            _0100,
            #[doc = "Divide by 6"]
            _0101,
            #[doc = "Divide by 7"]
            _0110,
            #[doc = "Divide by 8"]
            _0111,
            #[doc = "Divide by 9"]
            _1000,
            #[doc = "Divide by 10"]
            _1001,
            #[doc = "Divide by 11"]
            _1010,
            #[doc = "Divide by 12"]
            _1011,
            #[doc = "Divide by 13"]
            _1100,
            #[doc = "Divide by 14"]
            _1101,
            #[doc = "Divide by 15"]
            _1110,
            #[doc = "Divide by 16"]
            _1111,
        }
        impl FLTPSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    FLTPSW::_0000 => 0,
                    FLTPSW::_0001 => 1,
                    FLTPSW::_0010 => 2,
                    FLTPSW::_0011 => 3,
                    FLTPSW::_0100 => 4,
                    FLTPSW::_0101 => 5,
                    FLTPSW::_0110 => 6,
                    FLTPSW::_0111 => 7,
                    FLTPSW::_1000 => 8,
                    FLTPSW::_1001 => 9,
                    FLTPSW::_1010 => 10,
                    FLTPSW::_1011 => 11,
                    FLTPSW::_1100 => 12,
                    FLTPSW::_1101 => 13,
                    FLTPSW::_1110 => 14,
                    FLTPSW::_1111 => 15,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FLTPSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FLTPSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FLTPSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Divide by 1"]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(FLTPSW::_0000)
            }
            #[doc = "Divide by 2"]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(FLTPSW::_0001)
            }
            #[doc = "Divide by 3"]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(FLTPSW::_0010)
            }
            #[doc = "Divide by 4"]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(FLTPSW::_0011)
            }
            #[doc = "Divide by 5"]
            #[inline(always)]
            pub fn _0100(self) -> &'a mut W {
                self.variant(FLTPSW::_0100)
            }
            #[doc = "Divide by 6"]
            #[inline(always)]
            pub fn _0101(self) -> &'a mut W {
                self.variant(FLTPSW::_0101)
            }
            #[doc = "Divide by 7"]
            #[inline(always)]
            pub fn _0110(self) -> &'a mut W {
                self.variant(FLTPSW::_0110)
            }
            #[doc = "Divide by 8"]
            #[inline(always)]
            pub fn _0111(self) -> &'a mut W {
                self.variant(FLTPSW::_0111)
            }
            #[doc = "Divide by 9"]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(FLTPSW::_1000)
            }
            #[doc = "Divide by 10"]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(FLTPSW::_1001)
            }
            #[doc = "Divide by 11"]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(FLTPSW::_1010)
            }
            #[doc = "Divide by 12"]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(FLTPSW::_1011)
            }
            #[doc = "Divide by 13"]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(FLTPSW::_1100)
            }
            #[doc = "Divide by 14"]
            #[inline(always)]
            pub fn _1101(self) -> &'a mut W {
                self.variant(FLTPSW::_1101)
            }
            #[doc = "Divide by 15"]
            #[inline(always)]
            pub fn _1110(self) -> &'a mut W {
                self.variant(FLTPSW::_1110)
            }
            #[doc = "Divide by 16"]
            #[inline(always)]
            pub fn _1111(self) -> &'a mut W {
                self.variant(FLTPSW::_1111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:2 - Prescale Factor Selection"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 3:4 - Clock Source Selection"]
            #[inline(always)]
            pub fn clks(&self) -> CLKSR {
                CLKSR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 5 - Center-Aligned PWM Select"]
            #[inline(always)]
            pub fn cpwms(&self) -> CPWMSR {
                CPWMSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Reload Point Interrupt Enable"]
            #[inline(always)]
            pub fn rie(&self) -> RIER {
                RIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Reload Flag"]
            #[inline(always)]
            pub fn rf(&self) -> RFR {
                RFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Timer Overflow Interrupt Enable"]
            #[inline(always)]
            pub fn toie(&self) -> TOIER {
                TOIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Timer Overflow Flag"]
            #[inline(always)]
            pub fn tof(&self) -> TOFR {
                TOFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 16 - Channel 0 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen0(&self) -> PWMEN0R {
                PWMEN0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - Channel 1 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen1(&self) -> PWMEN1R {
                PWMEN1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 18 - Channel 2 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen2(&self) -> PWMEN2R {
                PWMEN2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 19 - Channel 3 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen3(&self) -> PWMEN3R {
                PWMEN3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 19;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 20 - Channel 4 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen4(&self) -> PWMEN4R {
                PWMEN4R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - Channel 5 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen5(&self) -> PWMEN5R {
                PWMEN5R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 22 - Channel 6 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen6(&self) -> PWMEN6R {
                PWMEN6R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 23 - Channel 7 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen7(&self) -> PWMEN7R {
                PWMEN7R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 24:27 - Filter Prescaler"]
            #[inline(always)]
            pub fn fltps(&self) -> FLTPSR {
                FLTPSR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:2 - Prescale Factor Selection"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bits 3:4 - Clock Source Selection"]
            #[inline(always)]
            pub fn clks(&mut self) -> _CLKSW {
                _CLKSW { w: self }
            }
            #[doc = "Bit 5 - Center-Aligned PWM Select"]
            #[inline(always)]
            pub fn cpwms(&mut self) -> _CPWMSW {
                _CPWMSW { w: self }
            }
            #[doc = "Bit 6 - Reload Point Interrupt Enable"]
            #[inline(always)]
            pub fn rie(&mut self) -> _RIEW {
                _RIEW { w: self }
            }
            #[doc = "Bit 8 - Timer Overflow Interrupt Enable"]
            #[inline(always)]
            pub fn toie(&mut self) -> _TOIEW {
                _TOIEW { w: self }
            }
            #[doc = "Bit 16 - Channel 0 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen0(&mut self) -> _PWMEN0W {
                _PWMEN0W { w: self }
            }
            #[doc = "Bit 17 - Channel 1 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen1(&mut self) -> _PWMEN1W {
                _PWMEN1W { w: self }
            }
            #[doc = "Bit 18 - Channel 2 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen2(&mut self) -> _PWMEN2W {
                _PWMEN2W { w: self }
            }
            #[doc = "Bit 19 - Channel 3 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen3(&mut self) -> _PWMEN3W {
                _PWMEN3W { w: self }
            }
            #[doc = "Bit 20 - Channel 4 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen4(&mut self) -> _PWMEN4W {
                _PWMEN4W { w: self }
            }
            #[doc = "Bit 21 - Channel 5 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen5(&mut self) -> _PWMEN5W {
                _PWMEN5W { w: self }
            }
            #[doc = "Bit 22 - Channel 6 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen6(&mut self) -> _PWMEN6W {
                _PWMEN6W { w: self }
            }
            #[doc = "Bit 23 - Channel 7 PWM enable bit"]
            #[inline(always)]
            pub fn pwmen7(&mut self) -> _PWMEN7W {
                _PWMEN7W { w: self }
            }
            #[doc = "Bits 24:27 - Filter Prescaler"]
            #[inline(always)]
            pub fn fltps(&mut self) -> _FLTPSW {
                _FLTPSW { w: self }
            }
        }
    }
    #[doc = "Counter"]
    pub struct CNT {
        register: VolatileCell<u32>,
    }
    #[doc = "Counter"]
    pub mod cnt {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CNT {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct COUNTR {
            bits: u16,
        }
        impl COUNTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _COUNTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _COUNTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Counter Value"]
            #[inline(always)]
            pub fn count(&self) -> COUNTR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                COUNTR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Counter Value"]
            #[inline(always)]
            pub fn count(&mut self) -> _COUNTW {
                _COUNTW { w: self }
            }
        }
    }
    #[doc = "Modulo"]
    pub struct MOD {
        register: VolatileCell<u32>,
    }
    #[doc = "Modulo"]
    pub mod mod_ {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::MOD {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MODR {
            bits: u16,
        }
        impl MODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MODW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - MOD"]
            #[inline(always)]
            pub fn mod_(&self) -> MODR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                MODR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - MOD"]
            #[inline(always)]
            pub fn mod_(&mut self) -> _MODW {
                _MODW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Status And Control"]
    pub struct C0SC {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Status And Control"]
    pub mod c0sc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C0SC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DMA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMAR {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMAR::_0 => false,
                    DMAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMAR {
                match value {
                    false => DMAR::_0,
                    true => DMAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMAR::_1
            }
        }
        #[doc = "Possible values of the field `ICRST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ICRSTR {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ICRSTR::_0 => false,
                    ICRSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ICRSTR {
                match value {
                    false => ICRSTR::_0,
                    true => ICRSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ICRSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ICRSTR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSAR {
            bits: bool,
        }
        impl ELSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSBR {
            bits: bool,
        }
        impl ELSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSAR {
            bits: bool,
        }
        impl MSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSBR {
            bits: bool,
        }
        impl MSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `CHIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHIER {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHIER::_0 => false,
                    CHIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHIER {
                match value {
                    false => CHIER::_0,
                    true => CHIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHIER::_1
            }
        }
        #[doc = "Possible values of the field `CHF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHFR {
            #[doc = "No channel (n) event has occurred."]
            _0,
            #[doc = "A channel (n) event has occurred."]
            _1,
        }
        impl CHFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHFR::_0 => false,
                    CHFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHFR {
                match value {
                    false => CHFR::_0,
                    true => CHFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHFR::_1
            }
        }
        #[doc = "Possible values of the field `TRIGMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGMODER {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGMODER::_0 => false,
                    TRIGMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGMODER {
                match value {
                    false => TRIGMODER::_0,
                    true => TRIGMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGMODER::_1
            }
        }
        #[doc = "Possible values of the field `CHIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHISR {
            #[doc = "The channel (n) input is zero."]
            _0,
            #[doc = "The channel (n) input is one."]
            _1,
        }
        impl CHISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHISR::_0 => false,
                    CHISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHISR {
                match value {
                    false => CHISR::_0,
                    true => CHISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHISR::_1
            }
        }
        #[doc = "Possible values of the field `CHOV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHOVR {
            #[doc = "The channel (n) output is zero."]
            _0,
            #[doc = "The channel (n) output is one."]
            _1,
        }
        impl CHOVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHOVR::_0 => false,
                    CHOVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHOVR {
                match value {
                    false => CHOVR::_0,
                    true => CHOVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHOVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHOVR::_1
            }
        }
        #[doc = "Values that can be written to the field `DMA`"]
        pub enum DMAW {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMAW::_0 => false,
                    DMAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable DMA transfers."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMAW::_0)
            }
            #[doc = "Enable DMA transfers."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ICRST`"]
        pub enum ICRSTW {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ICRSTW::_0 => false,
                    ICRSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ICRSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ICRSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ICRSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ICRSTW::_0)
            }
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ICRSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CHIE`"]
        pub enum CHIEW {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CHIEW::_0 => false,
                    CHIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CHIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CHIEW::_0)
            }
            #[doc = "Enable channel (n) interrupt."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CHIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIGMODE`"]
        pub enum TRIGMODEW {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGMODEW::_0 => false,
                    TRIGMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGMODEW::_0)
            }
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&self) -> DMAR {
                DMAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&self) -> ICRSTR {
                ICRSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&self) -> ELSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSAR { bits }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&self) -> ELSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSBR { bits }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&self) -> MSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSAR { bits }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&self) -> MSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSBR { bits }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&self) -> CHIER {
                CHIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel (n) Flag"]
            #[inline(always)]
            pub fn chf(&self) -> CHFR {
                CHFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&self) -> TRIGMODER {
                TRIGMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Channel (n) Input State"]
            #[inline(always)]
            pub fn chis(&self) -> CHISR {
                CHISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Channel (n) Output Value"]
            #[inline(always)]
            pub fn chov(&self) -> CHOVR {
                CHOVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&mut self) -> _DMAW {
                _DMAW { w: self }
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&mut self) -> _ICRSTW {
                _ICRSTW { w: self }
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&mut self) -> _ELSAW {
                _ELSAW { w: self }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&mut self) -> _ELSBW {
                _ELSBW { w: self }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&mut self) -> _MSAW {
                _MSAW { w: self }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&mut self) -> _MSBW {
                _MSBW { w: self }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&mut self) -> _CHIEW {
                _CHIEW { w: self }
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&mut self) -> _TRIGMODEW {
                _TRIGMODEW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Value"]
    pub struct C0V {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Value"]
    pub mod c0v {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C0V {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct VALR {
            bits: u16,
        }
        impl VALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _VALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _VALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&self) -> VALR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                VALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&mut self) -> _VALW {
                _VALW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Status And Control"]
    pub struct C1SC {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Status And Control"]
    pub mod c1sc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C1SC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DMA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMAR {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMAR::_0 => false,
                    DMAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMAR {
                match value {
                    false => DMAR::_0,
                    true => DMAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMAR::_1
            }
        }
        #[doc = "Possible values of the field `ICRST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ICRSTR {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ICRSTR::_0 => false,
                    ICRSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ICRSTR {
                match value {
                    false => ICRSTR::_0,
                    true => ICRSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ICRSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ICRSTR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSAR {
            bits: bool,
        }
        impl ELSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSBR {
            bits: bool,
        }
        impl ELSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSAR {
            bits: bool,
        }
        impl MSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSBR {
            bits: bool,
        }
        impl MSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `CHIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHIER {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHIER::_0 => false,
                    CHIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHIER {
                match value {
                    false => CHIER::_0,
                    true => CHIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHIER::_1
            }
        }
        #[doc = "Possible values of the field `CHF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHFR {
            #[doc = "No channel (n) event has occurred."]
            _0,
            #[doc = "A channel (n) event has occurred."]
            _1,
        }
        impl CHFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHFR::_0 => false,
                    CHFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHFR {
                match value {
                    false => CHFR::_0,
                    true => CHFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHFR::_1
            }
        }
        #[doc = "Possible values of the field `TRIGMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGMODER {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGMODER::_0 => false,
                    TRIGMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGMODER {
                match value {
                    false => TRIGMODER::_0,
                    true => TRIGMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGMODER::_1
            }
        }
        #[doc = "Possible values of the field `CHIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHISR {
            #[doc = "The channel (n) input is zero."]
            _0,
            #[doc = "The channel (n) input is one."]
            _1,
        }
        impl CHISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHISR::_0 => false,
                    CHISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHISR {
                match value {
                    false => CHISR::_0,
                    true => CHISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHISR::_1
            }
        }
        #[doc = "Possible values of the field `CHOV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHOVR {
            #[doc = "The channel (n) output is zero."]
            _0,
            #[doc = "The channel (n) output is one."]
            _1,
        }
        impl CHOVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHOVR::_0 => false,
                    CHOVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHOVR {
                match value {
                    false => CHOVR::_0,
                    true => CHOVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHOVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHOVR::_1
            }
        }
        #[doc = "Values that can be written to the field `DMA`"]
        pub enum DMAW {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMAW::_0 => false,
                    DMAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable DMA transfers."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMAW::_0)
            }
            #[doc = "Enable DMA transfers."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ICRST`"]
        pub enum ICRSTW {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ICRSTW::_0 => false,
                    ICRSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ICRSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ICRSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ICRSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ICRSTW::_0)
            }
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ICRSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CHIE`"]
        pub enum CHIEW {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CHIEW::_0 => false,
                    CHIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CHIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CHIEW::_0)
            }
            #[doc = "Enable channel (n) interrupt."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CHIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIGMODE`"]
        pub enum TRIGMODEW {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGMODEW::_0 => false,
                    TRIGMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGMODEW::_0)
            }
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&self) -> DMAR {
                DMAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&self) -> ICRSTR {
                ICRSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&self) -> ELSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSAR { bits }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&self) -> ELSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSBR { bits }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&self) -> MSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSAR { bits }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&self) -> MSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSBR { bits }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&self) -> CHIER {
                CHIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel (n) Flag"]
            #[inline(always)]
            pub fn chf(&self) -> CHFR {
                CHFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&self) -> TRIGMODER {
                TRIGMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Channel (n) Input State"]
            #[inline(always)]
            pub fn chis(&self) -> CHISR {
                CHISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Channel (n) Output Value"]
            #[inline(always)]
            pub fn chov(&self) -> CHOVR {
                CHOVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&mut self) -> _DMAW {
                _DMAW { w: self }
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&mut self) -> _ICRSTW {
                _ICRSTW { w: self }
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&mut self) -> _ELSAW {
                _ELSAW { w: self }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&mut self) -> _ELSBW {
                _ELSBW { w: self }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&mut self) -> _MSAW {
                _MSAW { w: self }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&mut self) -> _MSBW {
                _MSBW { w: self }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&mut self) -> _CHIEW {
                _CHIEW { w: self }
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&mut self) -> _TRIGMODEW {
                _TRIGMODEW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Value"]
    pub struct C1V {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Value"]
    pub mod c1v {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C1V {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct VALR {
            bits: u16,
        }
        impl VALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _VALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _VALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&self) -> VALR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                VALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&mut self) -> _VALW {
                _VALW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Status And Control"]
    pub struct C2SC {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Status And Control"]
    pub mod c2sc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C2SC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DMA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMAR {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMAR::_0 => false,
                    DMAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMAR {
                match value {
                    false => DMAR::_0,
                    true => DMAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMAR::_1
            }
        }
        #[doc = "Possible values of the field `ICRST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ICRSTR {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ICRSTR::_0 => false,
                    ICRSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ICRSTR {
                match value {
                    false => ICRSTR::_0,
                    true => ICRSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ICRSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ICRSTR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSAR {
            bits: bool,
        }
        impl ELSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSBR {
            bits: bool,
        }
        impl ELSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSAR {
            bits: bool,
        }
        impl MSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSBR {
            bits: bool,
        }
        impl MSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `CHIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHIER {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHIER::_0 => false,
                    CHIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHIER {
                match value {
                    false => CHIER::_0,
                    true => CHIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHIER::_1
            }
        }
        #[doc = "Possible values of the field `CHF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHFR {
            #[doc = "No channel (n) event has occurred."]
            _0,
            #[doc = "A channel (n) event has occurred."]
            _1,
        }
        impl CHFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHFR::_0 => false,
                    CHFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHFR {
                match value {
                    false => CHFR::_0,
                    true => CHFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHFR::_1
            }
        }
        #[doc = "Possible values of the field `TRIGMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGMODER {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGMODER::_0 => false,
                    TRIGMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGMODER {
                match value {
                    false => TRIGMODER::_0,
                    true => TRIGMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGMODER::_1
            }
        }
        #[doc = "Possible values of the field `CHIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHISR {
            #[doc = "The channel (n) input is zero."]
            _0,
            #[doc = "The channel (n) input is one."]
            _1,
        }
        impl CHISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHISR::_0 => false,
                    CHISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHISR {
                match value {
                    false => CHISR::_0,
                    true => CHISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHISR::_1
            }
        }
        #[doc = "Possible values of the field `CHOV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHOVR {
            #[doc = "The channel (n) output is zero."]
            _0,
            #[doc = "The channel (n) output is one."]
            _1,
        }
        impl CHOVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHOVR::_0 => false,
                    CHOVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHOVR {
                match value {
                    false => CHOVR::_0,
                    true => CHOVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHOVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHOVR::_1
            }
        }
        #[doc = "Values that can be written to the field `DMA`"]
        pub enum DMAW {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMAW::_0 => false,
                    DMAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable DMA transfers."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMAW::_0)
            }
            #[doc = "Enable DMA transfers."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ICRST`"]
        pub enum ICRSTW {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ICRSTW::_0 => false,
                    ICRSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ICRSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ICRSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ICRSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ICRSTW::_0)
            }
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ICRSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CHIE`"]
        pub enum CHIEW {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CHIEW::_0 => false,
                    CHIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CHIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CHIEW::_0)
            }
            #[doc = "Enable channel (n) interrupt."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CHIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIGMODE`"]
        pub enum TRIGMODEW {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGMODEW::_0 => false,
                    TRIGMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGMODEW::_0)
            }
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&self) -> DMAR {
                DMAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&self) -> ICRSTR {
                ICRSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&self) -> ELSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSAR { bits }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&self) -> ELSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSBR { bits }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&self) -> MSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSAR { bits }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&self) -> MSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSBR { bits }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&self) -> CHIER {
                CHIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel (n) Flag"]
            #[inline(always)]
            pub fn chf(&self) -> CHFR {
                CHFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&self) -> TRIGMODER {
                TRIGMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Channel (n) Input State"]
            #[inline(always)]
            pub fn chis(&self) -> CHISR {
                CHISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Channel (n) Output Value"]
            #[inline(always)]
            pub fn chov(&self) -> CHOVR {
                CHOVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&mut self) -> _DMAW {
                _DMAW { w: self }
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&mut self) -> _ICRSTW {
                _ICRSTW { w: self }
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&mut self) -> _ELSAW {
                _ELSAW { w: self }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&mut self) -> _ELSBW {
                _ELSBW { w: self }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&mut self) -> _MSAW {
                _MSAW { w: self }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&mut self) -> _MSBW {
                _MSBW { w: self }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&mut self) -> _CHIEW {
                _CHIEW { w: self }
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&mut self) -> _TRIGMODEW {
                _TRIGMODEW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Value"]
    pub struct C2V {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Value"]
    pub mod c2v {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C2V {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct VALR {
            bits: u16,
        }
        impl VALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _VALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _VALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&self) -> VALR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                VALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&mut self) -> _VALW {
                _VALW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Status And Control"]
    pub struct C3SC {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Status And Control"]
    pub mod c3sc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C3SC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DMA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMAR {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMAR::_0 => false,
                    DMAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMAR {
                match value {
                    false => DMAR::_0,
                    true => DMAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMAR::_1
            }
        }
        #[doc = "Possible values of the field `ICRST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ICRSTR {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ICRSTR::_0 => false,
                    ICRSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ICRSTR {
                match value {
                    false => ICRSTR::_0,
                    true => ICRSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ICRSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ICRSTR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSAR {
            bits: bool,
        }
        impl ELSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSBR {
            bits: bool,
        }
        impl ELSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSAR {
            bits: bool,
        }
        impl MSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSBR {
            bits: bool,
        }
        impl MSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `CHIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHIER {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHIER::_0 => false,
                    CHIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHIER {
                match value {
                    false => CHIER::_0,
                    true => CHIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHIER::_1
            }
        }
        #[doc = "Possible values of the field `CHF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHFR {
            #[doc = "No channel (n) event has occurred."]
            _0,
            #[doc = "A channel (n) event has occurred."]
            _1,
        }
        impl CHFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHFR::_0 => false,
                    CHFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHFR {
                match value {
                    false => CHFR::_0,
                    true => CHFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHFR::_1
            }
        }
        #[doc = "Possible values of the field `TRIGMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGMODER {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGMODER::_0 => false,
                    TRIGMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGMODER {
                match value {
                    false => TRIGMODER::_0,
                    true => TRIGMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGMODER::_1
            }
        }
        #[doc = "Possible values of the field `CHIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHISR {
            #[doc = "The channel (n) input is zero."]
            _0,
            #[doc = "The channel (n) input is one."]
            _1,
        }
        impl CHISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHISR::_0 => false,
                    CHISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHISR {
                match value {
                    false => CHISR::_0,
                    true => CHISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHISR::_1
            }
        }
        #[doc = "Possible values of the field `CHOV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHOVR {
            #[doc = "The channel (n) output is zero."]
            _0,
            #[doc = "The channel (n) output is one."]
            _1,
        }
        impl CHOVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHOVR::_0 => false,
                    CHOVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHOVR {
                match value {
                    false => CHOVR::_0,
                    true => CHOVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHOVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHOVR::_1
            }
        }
        #[doc = "Values that can be written to the field `DMA`"]
        pub enum DMAW {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMAW::_0 => false,
                    DMAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable DMA transfers."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMAW::_0)
            }
            #[doc = "Enable DMA transfers."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ICRST`"]
        pub enum ICRSTW {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ICRSTW::_0 => false,
                    ICRSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ICRSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ICRSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ICRSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ICRSTW::_0)
            }
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ICRSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CHIE`"]
        pub enum CHIEW {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CHIEW::_0 => false,
                    CHIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CHIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CHIEW::_0)
            }
            #[doc = "Enable channel (n) interrupt."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CHIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIGMODE`"]
        pub enum TRIGMODEW {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGMODEW::_0 => false,
                    TRIGMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGMODEW::_0)
            }
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&self) -> DMAR {
                DMAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&self) -> ICRSTR {
                ICRSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&self) -> ELSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSAR { bits }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&self) -> ELSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSBR { bits }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&self) -> MSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSAR { bits }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&self) -> MSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSBR { bits }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&self) -> CHIER {
                CHIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel (n) Flag"]
            #[inline(always)]
            pub fn chf(&self) -> CHFR {
                CHFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&self) -> TRIGMODER {
                TRIGMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Channel (n) Input State"]
            #[inline(always)]
            pub fn chis(&self) -> CHISR {
                CHISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Channel (n) Output Value"]
            #[inline(always)]
            pub fn chov(&self) -> CHOVR {
                CHOVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&mut self) -> _DMAW {
                _DMAW { w: self }
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&mut self) -> _ICRSTW {
                _ICRSTW { w: self }
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&mut self) -> _ELSAW {
                _ELSAW { w: self }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&mut self) -> _ELSBW {
                _ELSBW { w: self }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&mut self) -> _MSAW {
                _MSAW { w: self }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&mut self) -> _MSBW {
                _MSBW { w: self }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&mut self) -> _CHIEW {
                _CHIEW { w: self }
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&mut self) -> _TRIGMODEW {
                _TRIGMODEW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Value"]
    pub struct C3V {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Value"]
    pub mod c3v {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C3V {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct VALR {
            bits: u16,
        }
        impl VALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _VALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _VALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&self) -> VALR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                VALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&mut self) -> _VALW {
                _VALW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Status And Control"]
    pub struct C4SC {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Status And Control"]
    pub mod c4sc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C4SC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DMA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMAR {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMAR::_0 => false,
                    DMAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMAR {
                match value {
                    false => DMAR::_0,
                    true => DMAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMAR::_1
            }
        }
        #[doc = "Possible values of the field `ICRST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ICRSTR {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ICRSTR::_0 => false,
                    ICRSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ICRSTR {
                match value {
                    false => ICRSTR::_0,
                    true => ICRSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ICRSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ICRSTR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSAR {
            bits: bool,
        }
        impl ELSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSBR {
            bits: bool,
        }
        impl ELSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSAR {
            bits: bool,
        }
        impl MSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSBR {
            bits: bool,
        }
        impl MSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `CHIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHIER {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHIER::_0 => false,
                    CHIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHIER {
                match value {
                    false => CHIER::_0,
                    true => CHIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHIER::_1
            }
        }
        #[doc = "Possible values of the field `CHF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHFR {
            #[doc = "No channel (n) event has occurred."]
            _0,
            #[doc = "A channel (n) event has occurred."]
            _1,
        }
        impl CHFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHFR::_0 => false,
                    CHFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHFR {
                match value {
                    false => CHFR::_0,
                    true => CHFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHFR::_1
            }
        }
        #[doc = "Possible values of the field `TRIGMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGMODER {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGMODER::_0 => false,
                    TRIGMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGMODER {
                match value {
                    false => TRIGMODER::_0,
                    true => TRIGMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGMODER::_1
            }
        }
        #[doc = "Possible values of the field `CHIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHISR {
            #[doc = "The channel (n) input is zero."]
            _0,
            #[doc = "The channel (n) input is one."]
            _1,
        }
        impl CHISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHISR::_0 => false,
                    CHISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHISR {
                match value {
                    false => CHISR::_0,
                    true => CHISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHISR::_1
            }
        }
        #[doc = "Possible values of the field `CHOV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHOVR {
            #[doc = "The channel (n) output is zero."]
            _0,
            #[doc = "The channel (n) output is one."]
            _1,
        }
        impl CHOVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHOVR::_0 => false,
                    CHOVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHOVR {
                match value {
                    false => CHOVR::_0,
                    true => CHOVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHOVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHOVR::_1
            }
        }
        #[doc = "Values that can be written to the field `DMA`"]
        pub enum DMAW {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMAW::_0 => false,
                    DMAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable DMA transfers."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMAW::_0)
            }
            #[doc = "Enable DMA transfers."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ICRST`"]
        pub enum ICRSTW {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ICRSTW::_0 => false,
                    ICRSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ICRSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ICRSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ICRSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ICRSTW::_0)
            }
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ICRSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CHIE`"]
        pub enum CHIEW {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CHIEW::_0 => false,
                    CHIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CHIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CHIEW::_0)
            }
            #[doc = "Enable channel (n) interrupt."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CHIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIGMODE`"]
        pub enum TRIGMODEW {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGMODEW::_0 => false,
                    TRIGMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGMODEW::_0)
            }
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&self) -> DMAR {
                DMAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&self) -> ICRSTR {
                ICRSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&self) -> ELSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSAR { bits }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&self) -> ELSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSBR { bits }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&self) -> MSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSAR { bits }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&self) -> MSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSBR { bits }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&self) -> CHIER {
                CHIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel (n) Flag"]
            #[inline(always)]
            pub fn chf(&self) -> CHFR {
                CHFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&self) -> TRIGMODER {
                TRIGMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Channel (n) Input State"]
            #[inline(always)]
            pub fn chis(&self) -> CHISR {
                CHISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Channel (n) Output Value"]
            #[inline(always)]
            pub fn chov(&self) -> CHOVR {
                CHOVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&mut self) -> _DMAW {
                _DMAW { w: self }
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&mut self) -> _ICRSTW {
                _ICRSTW { w: self }
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&mut self) -> _ELSAW {
                _ELSAW { w: self }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&mut self) -> _ELSBW {
                _ELSBW { w: self }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&mut self) -> _MSAW {
                _MSAW { w: self }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&mut self) -> _MSBW {
                _MSBW { w: self }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&mut self) -> _CHIEW {
                _CHIEW { w: self }
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&mut self) -> _TRIGMODEW {
                _TRIGMODEW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Value"]
    pub struct C4V {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Value"]
    pub mod c4v {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C4V {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct VALR {
            bits: u16,
        }
        impl VALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _VALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _VALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&self) -> VALR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                VALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&mut self) -> _VALW {
                _VALW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Status And Control"]
    pub struct C5SC {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Status And Control"]
    pub mod c5sc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C5SC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DMA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMAR {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMAR::_0 => false,
                    DMAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMAR {
                match value {
                    false => DMAR::_0,
                    true => DMAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMAR::_1
            }
        }
        #[doc = "Possible values of the field `ICRST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ICRSTR {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ICRSTR::_0 => false,
                    ICRSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ICRSTR {
                match value {
                    false => ICRSTR::_0,
                    true => ICRSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ICRSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ICRSTR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSAR {
            bits: bool,
        }
        impl ELSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSBR {
            bits: bool,
        }
        impl ELSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSAR {
            bits: bool,
        }
        impl MSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSBR {
            bits: bool,
        }
        impl MSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `CHIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHIER {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHIER::_0 => false,
                    CHIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHIER {
                match value {
                    false => CHIER::_0,
                    true => CHIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHIER::_1
            }
        }
        #[doc = "Possible values of the field `CHF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHFR {
            #[doc = "No channel (n) event has occurred."]
            _0,
            #[doc = "A channel (n) event has occurred."]
            _1,
        }
        impl CHFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHFR::_0 => false,
                    CHFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHFR {
                match value {
                    false => CHFR::_0,
                    true => CHFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHFR::_1
            }
        }
        #[doc = "Possible values of the field `TRIGMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGMODER {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGMODER::_0 => false,
                    TRIGMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGMODER {
                match value {
                    false => TRIGMODER::_0,
                    true => TRIGMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGMODER::_1
            }
        }
        #[doc = "Possible values of the field `CHIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHISR {
            #[doc = "The channel (n) input is zero."]
            _0,
            #[doc = "The channel (n) input is one."]
            _1,
        }
        impl CHISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHISR::_0 => false,
                    CHISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHISR {
                match value {
                    false => CHISR::_0,
                    true => CHISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHISR::_1
            }
        }
        #[doc = "Possible values of the field `CHOV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHOVR {
            #[doc = "The channel (n) output is zero."]
            _0,
            #[doc = "The channel (n) output is one."]
            _1,
        }
        impl CHOVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHOVR::_0 => false,
                    CHOVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHOVR {
                match value {
                    false => CHOVR::_0,
                    true => CHOVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHOVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHOVR::_1
            }
        }
        #[doc = "Values that can be written to the field `DMA`"]
        pub enum DMAW {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMAW::_0 => false,
                    DMAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable DMA transfers."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMAW::_0)
            }
            #[doc = "Enable DMA transfers."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ICRST`"]
        pub enum ICRSTW {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ICRSTW::_0 => false,
                    ICRSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ICRSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ICRSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ICRSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ICRSTW::_0)
            }
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ICRSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CHIE`"]
        pub enum CHIEW {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CHIEW::_0 => false,
                    CHIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CHIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CHIEW::_0)
            }
            #[doc = "Enable channel (n) interrupt."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CHIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIGMODE`"]
        pub enum TRIGMODEW {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGMODEW::_0 => false,
                    TRIGMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGMODEW::_0)
            }
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&self) -> DMAR {
                DMAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&self) -> ICRSTR {
                ICRSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&self) -> ELSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSAR { bits }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&self) -> ELSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSBR { bits }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&self) -> MSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSAR { bits }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&self) -> MSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSBR { bits }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&self) -> CHIER {
                CHIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel (n) Flag"]
            #[inline(always)]
            pub fn chf(&self) -> CHFR {
                CHFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&self) -> TRIGMODER {
                TRIGMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Channel (n) Input State"]
            #[inline(always)]
            pub fn chis(&self) -> CHISR {
                CHISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Channel (n) Output Value"]
            #[inline(always)]
            pub fn chov(&self) -> CHOVR {
                CHOVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&mut self) -> _DMAW {
                _DMAW { w: self }
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&mut self) -> _ICRSTW {
                _ICRSTW { w: self }
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&mut self) -> _ELSAW {
                _ELSAW { w: self }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&mut self) -> _ELSBW {
                _ELSBW { w: self }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&mut self) -> _MSAW {
                _MSAW { w: self }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&mut self) -> _MSBW {
                _MSBW { w: self }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&mut self) -> _CHIEW {
                _CHIEW { w: self }
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&mut self) -> _TRIGMODEW {
                _TRIGMODEW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Value"]
    pub struct C5V {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Value"]
    pub mod c5v {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C5V {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct VALR {
            bits: u16,
        }
        impl VALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _VALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _VALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&self) -> VALR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                VALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&mut self) -> _VALW {
                _VALW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Status And Control"]
    pub struct C6SC {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Status And Control"]
    pub mod c6sc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C6SC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DMA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMAR {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMAR::_0 => false,
                    DMAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMAR {
                match value {
                    false => DMAR::_0,
                    true => DMAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMAR::_1
            }
        }
        #[doc = "Possible values of the field `ICRST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ICRSTR {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ICRSTR::_0 => false,
                    ICRSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ICRSTR {
                match value {
                    false => ICRSTR::_0,
                    true => ICRSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ICRSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ICRSTR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSAR {
            bits: bool,
        }
        impl ELSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSBR {
            bits: bool,
        }
        impl ELSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSAR {
            bits: bool,
        }
        impl MSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSBR {
            bits: bool,
        }
        impl MSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `CHIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHIER {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHIER::_0 => false,
                    CHIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHIER {
                match value {
                    false => CHIER::_0,
                    true => CHIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHIER::_1
            }
        }
        #[doc = "Possible values of the field `CHF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHFR {
            #[doc = "No channel (n) event has occurred."]
            _0,
            #[doc = "A channel (n) event has occurred."]
            _1,
        }
        impl CHFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHFR::_0 => false,
                    CHFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHFR {
                match value {
                    false => CHFR::_0,
                    true => CHFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHFR::_1
            }
        }
        #[doc = "Possible values of the field `TRIGMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGMODER {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGMODER::_0 => false,
                    TRIGMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGMODER {
                match value {
                    false => TRIGMODER::_0,
                    true => TRIGMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGMODER::_1
            }
        }
        #[doc = "Possible values of the field `CHIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHISR {
            #[doc = "The channel (n) input is zero."]
            _0,
            #[doc = "The channel (n) input is one."]
            _1,
        }
        impl CHISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHISR::_0 => false,
                    CHISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHISR {
                match value {
                    false => CHISR::_0,
                    true => CHISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHISR::_1
            }
        }
        #[doc = "Possible values of the field `CHOV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHOVR {
            #[doc = "The channel (n) output is zero."]
            _0,
            #[doc = "The channel (n) output is one."]
            _1,
        }
        impl CHOVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHOVR::_0 => false,
                    CHOVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHOVR {
                match value {
                    false => CHOVR::_0,
                    true => CHOVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHOVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHOVR::_1
            }
        }
        #[doc = "Values that can be written to the field `DMA`"]
        pub enum DMAW {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMAW::_0 => false,
                    DMAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable DMA transfers."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMAW::_0)
            }
            #[doc = "Enable DMA transfers."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ICRST`"]
        pub enum ICRSTW {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ICRSTW::_0 => false,
                    ICRSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ICRSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ICRSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ICRSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ICRSTW::_0)
            }
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ICRSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CHIE`"]
        pub enum CHIEW {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CHIEW::_0 => false,
                    CHIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CHIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CHIEW::_0)
            }
            #[doc = "Enable channel (n) interrupt."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CHIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIGMODE`"]
        pub enum TRIGMODEW {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGMODEW::_0 => false,
                    TRIGMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGMODEW::_0)
            }
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&self) -> DMAR {
                DMAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&self) -> ICRSTR {
                ICRSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&self) -> ELSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSAR { bits }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&self) -> ELSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSBR { bits }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&self) -> MSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSAR { bits }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&self) -> MSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSBR { bits }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&self) -> CHIER {
                CHIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel (n) Flag"]
            #[inline(always)]
            pub fn chf(&self) -> CHFR {
                CHFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&self) -> TRIGMODER {
                TRIGMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Channel (n) Input State"]
            #[inline(always)]
            pub fn chis(&self) -> CHISR {
                CHISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Channel (n) Output Value"]
            #[inline(always)]
            pub fn chov(&self) -> CHOVR {
                CHOVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&mut self) -> _DMAW {
                _DMAW { w: self }
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&mut self) -> _ICRSTW {
                _ICRSTW { w: self }
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&mut self) -> _ELSAW {
                _ELSAW { w: self }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&mut self) -> _ELSBW {
                _ELSBW { w: self }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&mut self) -> _MSAW {
                _MSAW { w: self }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&mut self) -> _MSBW {
                _MSBW { w: self }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&mut self) -> _CHIEW {
                _CHIEW { w: self }
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&mut self) -> _TRIGMODEW {
                _TRIGMODEW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Value"]
    pub struct C6V {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Value"]
    pub mod c6v {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C6V {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct VALR {
            bits: u16,
        }
        impl VALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _VALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _VALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&self) -> VALR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                VALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&mut self) -> _VALW {
                _VALW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Status And Control"]
    pub struct C7SC {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Status And Control"]
    pub mod c7sc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C7SC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DMA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMAR {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMAR::_0 => false,
                    DMAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMAR {
                match value {
                    false => DMAR::_0,
                    true => DMAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMAR::_1
            }
        }
        #[doc = "Possible values of the field `ICRST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ICRSTR {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ICRSTR::_0 => false,
                    ICRSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ICRSTR {
                match value {
                    false => ICRSTR::_0,
                    true => ICRSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ICRSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ICRSTR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSAR {
            bits: bool,
        }
        impl ELSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct ELSBR {
            bits: bool,
        }
        impl ELSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSAR {
            bits: bool,
        }
        impl MSAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct MSBR {
            bits: bool,
        }
        impl MSBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `CHIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHIER {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHIER::_0 => false,
                    CHIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHIER {
                match value {
                    false => CHIER::_0,
                    true => CHIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHIER::_1
            }
        }
        #[doc = "Possible values of the field `CHF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHFR {
            #[doc = "No channel (n) event has occurred."]
            _0,
            #[doc = "A channel (n) event has occurred."]
            _1,
        }
        impl CHFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHFR::_0 => false,
                    CHFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHFR {
                match value {
                    false => CHFR::_0,
                    true => CHFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHFR::_1
            }
        }
        #[doc = "Possible values of the field `TRIGMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGMODER {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGMODER::_0 => false,
                    TRIGMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGMODER {
                match value {
                    false => TRIGMODER::_0,
                    true => TRIGMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGMODER::_1
            }
        }
        #[doc = "Possible values of the field `CHIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHISR {
            #[doc = "The channel (n) input is zero."]
            _0,
            #[doc = "The channel (n) input is one."]
            _1,
        }
        impl CHISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHISR::_0 => false,
                    CHISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHISR {
                match value {
                    false => CHISR::_0,
                    true => CHISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHISR::_1
            }
        }
        #[doc = "Possible values of the field `CHOV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHOVR {
            #[doc = "The channel (n) output is zero."]
            _0,
            #[doc = "The channel (n) output is one."]
            _1,
        }
        impl CHOVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHOVR::_0 => false,
                    CHOVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHOVR {
                match value {
                    false => CHOVR::_0,
                    true => CHOVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHOVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHOVR::_1
            }
        }
        #[doc = "Values that can be written to the field `DMA`"]
        pub enum DMAW {
            #[doc = "Disable DMA transfers."]
            _0,
            #[doc = "Enable DMA transfers."]
            _1,
        }
        impl DMAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMAW::_0 => false,
                    DMAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable DMA transfers."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMAW::_0)
            }
            #[doc = "Enable DMA transfers."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ICRST`"]
        pub enum ICRSTW {
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            _0,
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            _1,
        }
        impl ICRSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ICRSTW::_0 => false,
                    ICRSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ICRSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ICRSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ICRSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ICRSTW::_0)
            }
            #[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ICRSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ELSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ELSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSAW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CHIE`"]
        pub enum CHIEW {
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            _0,
            #[doc = "Enable channel (n) interrupt."]
            _1,
        }
        impl CHIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CHIEW::_0 => false,
                    CHIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CHIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable channel (n) interrupt. Use software polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CHIEW::_0)
            }
            #[doc = "Enable channel (n) interrupt."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CHIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIGMODE`"]
        pub enum TRIGMODEW {
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            _0,
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            _1,
        }
        impl TRIGMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIGMODEW::_0 => false,
                    TRIGMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIGMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIGMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIGMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIGMODEW::_0)
            }
            #[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIGMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&self) -> DMAR {
                DMAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&self) -> ICRSTR {
                ICRSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&self) -> ELSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSAR { bits }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&self) -> ELSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ELSBR { bits }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&self) -> MSAR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSAR { bits }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&self) -> MSBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MSBR { bits }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&self) -> CHIER {
                CHIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel (n) Flag"]
            #[inline(always)]
            pub fn chf(&self) -> CHFR {
                CHFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&self) -> TRIGMODER {
                TRIGMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Channel (n) Input State"]
            #[inline(always)]
            pub fn chis(&self) -> CHISR {
                CHISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Channel (n) Output Value"]
            #[inline(always)]
            pub fn chov(&self) -> CHOVR {
                CHOVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - DMA Enable"]
            #[inline(always)]
            pub fn dma(&mut self) -> _DMAW {
                _DMAW { w: self }
            }
            #[doc = "Bit 1 - FTM counter reset by the selected input capture event."]
            #[inline(always)]
            pub fn icrst(&mut self) -> _ICRSTW {
                _ICRSTW { w: self }
            }
            #[doc = "Bit 2 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsa(&mut self) -> _ELSAW {
                _ELSAW { w: self }
            }
            #[doc = "Bit 3 - Channel (n) Edge or Level Select"]
            #[inline(always)]
            pub fn elsb(&mut self) -> _ELSBW {
                _ELSBW { w: self }
            }
            #[doc = "Bit 4 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msa(&mut self) -> _MSAW {
                _MSAW { w: self }
            }
            #[doc = "Bit 5 - Channel (n) Mode Select"]
            #[inline(always)]
            pub fn msb(&mut self) -> _MSBW {
                _MSBW { w: self }
            }
            #[doc = "Bit 6 - Channel (n) Interrupt Enable"]
            #[inline(always)]
            pub fn chie(&mut self) -> _CHIEW {
                _CHIEW { w: self }
            }
            #[doc = "Bit 8 - Trigger mode control"]
            #[inline(always)]
            pub fn trigmode(&mut self) -> _TRIGMODEW {
                _TRIGMODEW { w: self }
            }
        }
    }
    #[doc = "Channel (n) Value"]
    pub struct C7V {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel (n) Value"]
    pub mod c7v {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C7V {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct VALR {
            bits: u16,
        }
        impl VALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _VALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _VALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&self) -> VALR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                VALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Channel Value"]
            #[inline(always)]
            pub fn val(&mut self) -> _VALW {
                _VALW { w: self }
            }
        }
    }
    #[doc = "Counter Initial Value"]
    pub struct CNTIN {
        register: VolatileCell<u32>,
    }
    #[doc = "Counter Initial Value"]
    pub mod cntin {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CNTIN {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct INITR {
            bits: u16,
        }
        impl INITR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _INITW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INITW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - INIT"]
            #[inline(always)]
            pub fn init(&self) -> INITR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                INITR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - INIT"]
            #[inline(always)]
            pub fn init(&mut self) -> _INITW {
                _INITW { w: self }
            }
        }
    }
    #[doc = "Capture And Compare Status"]
    pub struct STATUS {
        register: VolatileCell<u32>,
    }
    #[doc = "Capture And Compare Status"]
    pub mod status {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::STATUS {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = "Possible values of the field `CH0F`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH0FR {
            #[doc = "No channel event has occurred."]
            _0,
            #[doc = "A channel event has occurred."]
            _1,
        }
        impl CH0FR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH0FR::_0 => false,
                    CH0FR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH0FR {
                match value {
                    false => CH0FR::_0,
                    true => CH0FR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH0FR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH0FR::_1
            }
        }
        #[doc = "Possible values of the field `CH1F`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH1FR {
            #[doc = "No channel event has occurred."]
            _0,
            #[doc = "A channel event has occurred."]
            _1,
        }
        impl CH1FR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH1FR::_0 => false,
                    CH1FR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH1FR {
                match value {
                    false => CH1FR::_0,
                    true => CH1FR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH1FR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH1FR::_1
            }
        }
        #[doc = "Possible values of the field `CH2F`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH2FR {
            #[doc = "No channel event has occurred."]
            _0,
            #[doc = "A channel event has occurred."]
            _1,
        }
        impl CH2FR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH2FR::_0 => false,
                    CH2FR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH2FR {
                match value {
                    false => CH2FR::_0,
                    true => CH2FR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH2FR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH2FR::_1
            }
        }
        #[doc = "Possible values of the field `CH3F`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH3FR {
            #[doc = "No channel event has occurred."]
            _0,
            #[doc = "A channel event has occurred."]
            _1,
        }
        impl CH3FR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH3FR::_0 => false,
                    CH3FR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH3FR {
                match value {
                    false => CH3FR::_0,
                    true => CH3FR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH3FR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH3FR::_1
            }
        }
        #[doc = "Possible values of the field `CH4F`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH4FR {
            #[doc = "No channel event has occurred."]
            _0,
            #[doc = "A channel event has occurred."]
            _1,
        }
        impl CH4FR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH4FR::_0 => false,
                    CH4FR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH4FR {
                match value {
                    false => CH4FR::_0,
                    true => CH4FR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH4FR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH4FR::_1
            }
        }
        #[doc = "Possible values of the field `CH5F`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH5FR {
            #[doc = "No channel event has occurred."]
            _0,
            #[doc = "A channel event has occurred."]
            _1,
        }
        impl CH5FR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH5FR::_0 => false,
                    CH5FR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH5FR {
                match value {
                    false => CH5FR::_0,
                    true => CH5FR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH5FR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH5FR::_1
            }
        }
        #[doc = "Possible values of the field `CH6F`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH6FR {
            #[doc = "No channel event has occurred."]
            _0,
            #[doc = "A channel event has occurred."]
            _1,
        }
        impl CH6FR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH6FR::_0 => false,
                    CH6FR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH6FR {
                match value {
                    false => CH6FR::_0,
                    true => CH6FR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH6FR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH6FR::_1
            }
        }
        #[doc = "Possible values of the field `CH7F`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH7FR {
            #[doc = "No channel event has occurred."]
            _0,
            #[doc = "A channel event has occurred."]
            _1,
        }
        impl CH7FR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH7FR::_0 => false,
                    CH7FR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH7FR {
                match value {
                    false => CH7FR::_0,
                    true => CH7FR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH7FR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH7FR::_1
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Channel 0 Flag"]
            #[inline(always)]
            pub fn ch0f(&self) -> CH0FR {
                CH0FR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Channel 1 Flag"]
            #[inline(always)]
            pub fn ch1f(&self) -> CH1FR {
                CH1FR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel 2 Flag"]
            #[inline(always)]
            pub fn ch2f(&self) -> CH2FR {
                CH2FR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Channel 3 Flag"]
            #[inline(always)]
            pub fn ch3f(&self) -> CH3FR {
                CH3FR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Channel 4 Flag"]
            #[inline(always)]
            pub fn ch4f(&self) -> CH4FR {
                CH4FR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Channel 5 Flag"]
            #[inline(always)]
            pub fn ch5f(&self) -> CH5FR {
                CH5FR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Channel 6 Flag"]
            #[inline(always)]
            pub fn ch6f(&self) -> CH6FR {
                CH6FR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel 7 Flag"]
            #[inline(always)]
            pub fn ch7f(&self) -> CH7FR {
                CH7FR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
    }
    #[doc = "Features Mode Selection"]
    pub struct MODE {
        register: VolatileCell<u32>,
    }
    #[doc = "Features Mode Selection"]
    pub mod mode {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::MODE {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `FTMEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FTMENR {
            #[doc = "TPM compatibility. Free running counter and synchronization compatible with TPM."]
            _0,
            #[doc = "Free running counter and synchronization are different from TPM behavior."]
            _1,
        }
        impl FTMENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FTMENR::_0 => false,
                    FTMENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FTMENR {
                match value {
                    false => FTMENR::_0,
                    true => FTMENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FTMENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FTMENR::_1
            }
        }
        #[doc = "Possible values of the field `WPDIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WPDISR {
            #[doc = "Write protection is enabled."]
            _0,
            #[doc = "Write protection is disabled."]
            _1,
        }
        impl WPDISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WPDISR::_0 => false,
                    WPDISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WPDISR {
                match value {
                    false => WPDISR::_0,
                    true => WPDISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WPDISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WPDISR::_1
            }
        }
        #[doc = "Possible values of the field `PWMSYNC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PWMSYNCR {
            #[doc = "No restrictions. Software and hardware triggers can be used by MOD, CnV, OUTMASK, and FTM counter synchronization."]
            _0,
            #[doc = "Software trigger can only be used by MOD and CnV synchronization, and hardware triggers can only be used by OUTMASK and FTM counter synchronization."]
            _1,
        }
        impl PWMSYNCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PWMSYNCR::_0 => false,
                    PWMSYNCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PWMSYNCR {
                match value {
                    false => PWMSYNCR::_0,
                    true => PWMSYNCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PWMSYNCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PWMSYNCR::_1
            }
        }
        #[doc = "Possible values of the field `CAPTEST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CAPTESTR {
            #[doc = "Capture test mode is disabled."]
            _0,
            #[doc = "Capture test mode is enabled."]
            _1,
        }
        impl CAPTESTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CAPTESTR::_0 => false,
                    CAPTESTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CAPTESTR {
                match value {
                    false => CAPTESTR::_0,
                    true => CAPTESTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CAPTESTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CAPTESTR::_1
            }
        }
        #[doc = "Possible values of the field `FAULTM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTMR {
            #[doc = "Fault control is disabled for all channels."]
            _00,
            #[doc = "Fault control is enabled for even channels only (channels 0, 2, 4, and 6), and the selected mode is the manual fault clearing."]
            _01,
            #[doc = "Fault control is enabled for all channels, and the selected mode is the manual fault clearing."]
            _10,
            #[doc = "Fault control is enabled for all channels, and the selected mode is the automatic fault clearing."]
            _11,
        }
        impl FAULTMR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    FAULTMR::_00 => 0,
                    FAULTMR::_01 => 1,
                    FAULTMR::_10 => 2,
                    FAULTMR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> FAULTMR {
                match value {
                    0 => FAULTMR::_00,
                    1 => FAULTMR::_01,
                    2 => FAULTMR::_10,
                    3 => FAULTMR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == FAULTMR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == FAULTMR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == FAULTMR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == FAULTMR::_11
            }
        }
        #[doc = "Possible values of the field `FAULTIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTIER {
            #[doc = "Fault control interrupt is disabled."]
            _0,
            #[doc = "Fault control interrupt is enabled."]
            _1,
        }
        impl FAULTIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTIER::_0 => false,
                    FAULTIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTIER {
                match value {
                    false => FAULTIER::_0,
                    true => FAULTIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTIER::_1
            }
        }
        #[doc = "Values that can be written to the field `FTMEN`"]
        pub enum FTMENW {
            #[doc = "TPM compatibility. Free running counter and synchronization compatible with TPM."]
            _0,
            #[doc = "Free running counter and synchronization are different from TPM behavior."]
            _1,
        }
        impl FTMENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FTMENW::_0 => false,
                    FTMENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FTMENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FTMENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FTMENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "TPM compatibility. Free running counter and synchronization compatible with TPM."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FTMENW::_0)
            }
            #[doc = "Free running counter and synchronization are different from TPM behavior."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FTMENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _INITW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INITW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WPDIS`"]
        pub enum WPDISW {
            #[doc = "Write protection is enabled."]
            _0,
            #[doc = "Write protection is disabled."]
            _1,
        }
        impl WPDISW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WPDISW::_0 => false,
                    WPDISW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WPDISW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WPDISW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WPDISW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Write protection is enabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WPDISW::_0)
            }
            #[doc = "Write protection is disabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WPDISW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PWMSYNC`"]
        pub enum PWMSYNCW {
            #[doc = "No restrictions. Software and hardware triggers can be used by MOD, CnV, OUTMASK, and FTM counter synchronization."]
            _0,
            #[doc = "Software trigger can only be used by MOD and CnV synchronization, and hardware triggers can only be used by OUTMASK and FTM counter synchronization."]
            _1,
        }
        impl PWMSYNCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PWMSYNCW::_0 => false,
                    PWMSYNCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PWMSYNCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PWMSYNCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PWMSYNCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No restrictions. Software and hardware triggers can be used by MOD, CnV, OUTMASK, and FTM counter synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PWMSYNCW::_0)
            }
            #[doc = "Software trigger can only be used by MOD and CnV synchronization, and hardware triggers can only be used by OUTMASK and FTM counter synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PWMSYNCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CAPTEST`"]
        pub enum CAPTESTW {
            #[doc = "Capture test mode is disabled."]
            _0,
            #[doc = "Capture test mode is enabled."]
            _1,
        }
        impl CAPTESTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CAPTESTW::_0 => false,
                    CAPTESTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CAPTESTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CAPTESTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CAPTESTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Capture test mode is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CAPTESTW::_0)
            }
            #[doc = "Capture test mode is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CAPTESTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FAULTM`"]
        pub enum FAULTMW {
            #[doc = "Fault control is disabled for all channels."]
            _00,
            #[doc = "Fault control is enabled for even channels only (channels 0, 2, 4, and 6), and the selected mode is the manual fault clearing."]
            _01,
            #[doc = "Fault control is enabled for all channels, and the selected mode is the manual fault clearing."]
            _10,
            #[doc = "Fault control is enabled for all channels, and the selected mode is the automatic fault clearing."]
            _11,
        }
        impl FAULTMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    FAULTMW::_00 => 0,
                    FAULTMW::_01 => 1,
                    FAULTMW::_10 => 2,
                    FAULTMW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FAULTMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FAULTMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FAULTMW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Fault control is disabled for all channels."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(FAULTMW::_00)
            }
            #[doc = "Fault control is enabled for even channels only (channels 0, 2, 4, and 6), and the selected mode is the manual fault clearing."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(FAULTMW::_01)
            }
            #[doc = "Fault control is enabled for all channels, and the selected mode is the manual fault clearing."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(FAULTMW::_10)
            }
            #[doc = "Fault control is enabled for all channels, and the selected mode is the automatic fault clearing."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(FAULTMW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FAULTIE`"]
        pub enum FAULTIEW {
            #[doc = "Fault control interrupt is disabled."]
            _0,
            #[doc = "Fault control interrupt is enabled."]
            _1,
        }
        impl FAULTIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FAULTIEW::_0 => false,
                    FAULTIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FAULTIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FAULTIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FAULTIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Fault control interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FAULTIEW::_0)
            }
            #[doc = "Fault control interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FAULTIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - FTM Enable"]
            #[inline(always)]
            pub fn ftmen(&self) -> FTMENR {
                FTMENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Write Protection Disable"]
            #[inline(always)]
            pub fn wpdis(&self) -> WPDISR {
                WPDISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - PWM Synchronization Mode"]
            #[inline(always)]
            pub fn pwmsync(&self) -> PWMSYNCR {
                PWMSYNCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Capture Test Mode Enable"]
            #[inline(always)]
            pub fn captest(&self) -> CAPTESTR {
                CAPTESTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 5:6 - Fault Control Mode"]
            #[inline(always)]
            pub fn faultm(&self) -> FAULTMR {
                FAULTMR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 7 - Fault Interrupt Enable"]
            #[inline(always)]
            pub fn faultie(&self) -> FAULTIER {
                FAULTIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 4 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - FTM Enable"]
            #[inline(always)]
            pub fn ftmen(&mut self) -> _FTMENW {
                _FTMENW { w: self }
            }
            #[doc = "Bit 1 - Initialize The Channels Output"]
            #[inline(always)]
            pub fn init(&mut self) -> _INITW {
                _INITW { w: self }
            }
            #[doc = "Bit 2 - Write Protection Disable"]
            #[inline(always)]
            pub fn wpdis(&mut self) -> _WPDISW {
                _WPDISW { w: self }
            }
            #[doc = "Bit 3 - PWM Synchronization Mode"]
            #[inline(always)]
            pub fn pwmsync(&mut self) -> _PWMSYNCW {
                _PWMSYNCW { w: self }
            }
            #[doc = "Bit 4 - Capture Test Mode Enable"]
            #[inline(always)]
            pub fn captest(&mut self) -> _CAPTESTW {
                _CAPTESTW { w: self }
            }
            #[doc = "Bits 5:6 - Fault Control Mode"]
            #[inline(always)]
            pub fn faultm(&mut self) -> _FAULTMW {
                _FAULTMW { w: self }
            }
            #[doc = "Bit 7 - Fault Interrupt Enable"]
            #[inline(always)]
            pub fn faultie(&mut self) -> _FAULTIEW {
                _FAULTIEW { w: self }
            }
        }
    }
    #[doc = "Synchronization"]
    pub struct SYNC {
        register: VolatileCell<u32>,
    }
    #[doc = "Synchronization"]
    pub mod sync {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SYNC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CNTMIN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CNTMINR {
            #[doc = "The minimum loading point is disabled."]
            _0,
            #[doc = "The minimum loading point is enabled."]
            _1,
        }
        impl CNTMINR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CNTMINR::_0 => false,
                    CNTMINR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CNTMINR {
                match value {
                    false => CNTMINR::_0,
                    true => CNTMINR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CNTMINR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CNTMINR::_1
            }
        }
        #[doc = "Possible values of the field `CNTMAX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CNTMAXR {
            #[doc = "The maximum loading point is disabled."]
            _0,
            #[doc = "The maximum loading point is enabled."]
            _1,
        }
        impl CNTMAXR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CNTMAXR::_0 => false,
                    CNTMAXR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CNTMAXR {
                match value {
                    false => CNTMAXR::_0,
                    true => CNTMAXR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CNTMAXR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CNTMAXR::_1
            }
        }
        #[doc = "Possible values of the field `REINIT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum REINITR {
            #[doc = "FTM counter continues to count normally."]
            _0,
            #[doc = "FTM counter is updated with its initial value when the selected trigger is detected."]
            _1,
        }
        impl REINITR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    REINITR::_0 => false,
                    REINITR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> REINITR {
                match value {
                    false => REINITR::_0,
                    true => REINITR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == REINITR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == REINITR::_1
            }
        }
        #[doc = "Possible values of the field `SYNCHOM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SYNCHOMR {
            #[doc = "OUTMASK register is updated with the value of its buffer in all rising edges of the FTM input clock."]
            _0,
            #[doc = "OUTMASK register is updated with the value of its buffer only by the PWM synchronization."]
            _1,
        }
        impl SYNCHOMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SYNCHOMR::_0 => false,
                    SYNCHOMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SYNCHOMR {
                match value {
                    false => SYNCHOMR::_0,
                    true => SYNCHOMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SYNCHOMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SYNCHOMR::_1
            }
        }
        #[doc = "Possible values of the field `TRIG0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIG0R {
            #[doc = "Trigger is disabled."]
            _0,
            #[doc = "Trigger is enabled."]
            _1,
        }
        impl TRIG0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIG0R::_0 => false,
                    TRIG0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIG0R {
                match value {
                    false => TRIG0R::_0,
                    true => TRIG0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIG0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIG0R::_1
            }
        }
        #[doc = "Possible values of the field `TRIG1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIG1R {
            #[doc = "Trigger is disabled."]
            _0,
            #[doc = "Trigger is enabled."]
            _1,
        }
        impl TRIG1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIG1R::_0 => false,
                    TRIG1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIG1R {
                match value {
                    false => TRIG1R::_0,
                    true => TRIG1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIG1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIG1R::_1
            }
        }
        #[doc = "Possible values of the field `TRIG2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIG2R {
            #[doc = "Trigger is disabled."]
            _0,
            #[doc = "Trigger is enabled."]
            _1,
        }
        impl TRIG2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIG2R::_0 => false,
                    TRIG2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIG2R {
                match value {
                    false => TRIG2R::_0,
                    true => TRIG2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIG2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIG2R::_1
            }
        }
        #[doc = "Possible values of the field `SWSYNC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SWSYNCR {
            #[doc = "Software trigger is not selected."]
            _0,
            #[doc = "Software trigger is selected."]
            _1,
        }
        impl SWSYNCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SWSYNCR::_0 => false,
                    SWSYNCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SWSYNCR {
                match value {
                    false => SWSYNCR::_0,
                    true => SWSYNCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SWSYNCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SWSYNCR::_1
            }
        }
        #[doc = "Values that can be written to the field `CNTMIN`"]
        pub enum CNTMINW {
            #[doc = "The minimum loading point is disabled."]
            _0,
            #[doc = "The minimum loading point is enabled."]
            _1,
        }
        impl CNTMINW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CNTMINW::_0 => false,
                    CNTMINW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CNTMINW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CNTMINW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CNTMINW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The minimum loading point is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CNTMINW::_0)
            }
            #[doc = "The minimum loading point is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CNTMINW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CNTMAX`"]
        pub enum CNTMAXW {
            #[doc = "The maximum loading point is disabled."]
            _0,
            #[doc = "The maximum loading point is enabled."]
            _1,
        }
        impl CNTMAXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CNTMAXW::_0 => false,
                    CNTMAXW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CNTMAXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CNTMAXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CNTMAXW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The maximum loading point is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CNTMAXW::_0)
            }
            #[doc = "The maximum loading point is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CNTMAXW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `REINIT`"]
        pub enum REINITW {
            #[doc = "FTM counter continues to count normally."]
            _0,
            #[doc = "FTM counter is updated with its initial value when the selected trigger is detected."]
            _1,
        }
        impl REINITW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    REINITW::_0 => false,
                    REINITW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _REINITW<'a> {
            w: &'a mut W,
        }
        impl<'a> _REINITW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: REINITW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM counter continues to count normally."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(REINITW::_0)
            }
            #[doc = "FTM counter is updated with its initial value when the selected trigger is detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(REINITW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SYNCHOM`"]
        pub enum SYNCHOMW {
            #[doc = "OUTMASK register is updated with the value of its buffer in all rising edges of the FTM input clock."]
            _0,
            #[doc = "OUTMASK register is updated with the value of its buffer only by the PWM synchronization."]
            _1,
        }
        impl SYNCHOMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SYNCHOMW::_0 => false,
                    SYNCHOMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SYNCHOMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SYNCHOMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SYNCHOMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "OUTMASK register is updated with the value of its buffer in all rising edges of the FTM input clock."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SYNCHOMW::_0)
            }
            #[doc = "OUTMASK register is updated with the value of its buffer only by the PWM synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SYNCHOMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIG0`"]
        pub enum TRIG0W {
            #[doc = "Trigger is disabled."]
            _0,
            #[doc = "Trigger is enabled."]
            _1,
        }
        impl TRIG0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIG0W::_0 => false,
                    TRIG0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIG0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIG0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIG0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIG0W::_0)
            }
            #[doc = "Trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIG0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIG1`"]
        pub enum TRIG1W {
            #[doc = "Trigger is disabled."]
            _0,
            #[doc = "Trigger is enabled."]
            _1,
        }
        impl TRIG1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIG1W::_0 => false,
                    TRIG1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIG1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIG1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIG1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIG1W::_0)
            }
            #[doc = "Trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIG1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRIG2`"]
        pub enum TRIG2W {
            #[doc = "Trigger is disabled."]
            _0,
            #[doc = "Trigger is enabled."]
            _1,
        }
        impl TRIG2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRIG2W::_0 => false,
                    TRIG2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRIG2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRIG2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRIG2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRIG2W::_0)
            }
            #[doc = "Trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRIG2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SWSYNC`"]
        pub enum SWSYNCW {
            #[doc = "Software trigger is not selected."]
            _0,
            #[doc = "Software trigger is selected."]
            _1,
        }
        impl SWSYNCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SWSYNCW::_0 => false,
                    SWSYNCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SWSYNCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SWSYNCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SWSYNCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Software trigger is not selected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SWSYNCW::_0)
            }
            #[doc = "Software trigger is selected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SWSYNCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Minimum Loading Point Enable"]
            #[inline(always)]
            pub fn cntmin(&self) -> CNTMINR {
                CNTMINR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Maximum Loading Point Enable"]
            #[inline(always)]
            pub fn cntmax(&self) -> CNTMAXR {
                CNTMAXR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - FTM Counter Reinitialization by Synchronization"]
            #[inline(always)]
            pub fn reinit(&self) -> REINITR {
                REINITR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Output Mask Synchronization"]
            #[inline(always)]
            pub fn synchom(&self) -> SYNCHOMR {
                SYNCHOMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - PWM Synchronization Hardware Trigger 0"]
            #[inline(always)]
            pub fn trig0(&self) -> TRIG0R {
                TRIG0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - PWM Synchronization Hardware Trigger 1"]
            #[inline(always)]
            pub fn trig1(&self) -> TRIG1R {
                TRIG1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - PWM Synchronization Hardware Trigger 2"]
            #[inline(always)]
            pub fn trig2(&self) -> TRIG2R {
                TRIG2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - PWM Synchronization Software Trigger"]
            #[inline(always)]
            pub fn swsync(&self) -> SWSYNCR {
                SWSYNCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Minimum Loading Point Enable"]
            #[inline(always)]
            pub fn cntmin(&mut self) -> _CNTMINW {
                _CNTMINW { w: self }
            }
            #[doc = "Bit 1 - Maximum Loading Point Enable"]
            #[inline(always)]
            pub fn cntmax(&mut self) -> _CNTMAXW {
                _CNTMAXW { w: self }
            }
            #[doc = "Bit 2 - FTM Counter Reinitialization by Synchronization"]
            #[inline(always)]
            pub fn reinit(&mut self) -> _REINITW {
                _REINITW { w: self }
            }
            #[doc = "Bit 3 - Output Mask Synchronization"]
            #[inline(always)]
            pub fn synchom(&mut self) -> _SYNCHOMW {
                _SYNCHOMW { w: self }
            }
            #[doc = "Bit 4 - PWM Synchronization Hardware Trigger 0"]
            #[inline(always)]
            pub fn trig0(&mut self) -> _TRIG0W {
                _TRIG0W { w: self }
            }
            #[doc = "Bit 5 - PWM Synchronization Hardware Trigger 1"]
            #[inline(always)]
            pub fn trig1(&mut self) -> _TRIG1W {
                _TRIG1W { w: self }
            }
            #[doc = "Bit 6 - PWM Synchronization Hardware Trigger 2"]
            #[inline(always)]
            pub fn trig2(&mut self) -> _TRIG2W {
                _TRIG2W { w: self }
            }
            #[doc = "Bit 7 - PWM Synchronization Software Trigger"]
            #[inline(always)]
            pub fn swsync(&mut self) -> _SWSYNCW {
                _SWSYNCW { w: self }
            }
        }
    }
    #[doc = "Initial State For Channels Output"]
    pub struct OUTINIT {
        register: VolatileCell<u32>,
    }
    #[doc = "Initial State For Channels Output"]
    pub mod outinit {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::OUTINIT {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CH0OI`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH0OIR {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH0OIR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH0OIR::_0 => false,
                    CH0OIR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH0OIR {
                match value {
                    false => CH0OIR::_0,
                    true => CH0OIR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH0OIR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH0OIR::_1
            }
        }
        #[doc = "Possible values of the field `CH1OI`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH1OIR {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH1OIR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH1OIR::_0 => false,
                    CH1OIR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH1OIR {
                match value {
                    false => CH1OIR::_0,
                    true => CH1OIR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH1OIR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH1OIR::_1
            }
        }
        #[doc = "Possible values of the field `CH2OI`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH2OIR {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH2OIR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH2OIR::_0 => false,
                    CH2OIR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH2OIR {
                match value {
                    false => CH2OIR::_0,
                    true => CH2OIR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH2OIR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH2OIR::_1
            }
        }
        #[doc = "Possible values of the field `CH3OI`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH3OIR {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH3OIR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH3OIR::_0 => false,
                    CH3OIR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH3OIR {
                match value {
                    false => CH3OIR::_0,
                    true => CH3OIR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH3OIR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH3OIR::_1
            }
        }
        #[doc = "Possible values of the field `CH4OI`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH4OIR {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH4OIR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH4OIR::_0 => false,
                    CH4OIR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH4OIR {
                match value {
                    false => CH4OIR::_0,
                    true => CH4OIR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH4OIR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH4OIR::_1
            }
        }
        #[doc = "Possible values of the field `CH5OI`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH5OIR {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH5OIR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH5OIR::_0 => false,
                    CH5OIR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH5OIR {
                match value {
                    false => CH5OIR::_0,
                    true => CH5OIR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH5OIR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH5OIR::_1
            }
        }
        #[doc = "Possible values of the field `CH6OI`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH6OIR {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH6OIR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH6OIR::_0 => false,
                    CH6OIR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH6OIR {
                match value {
                    false => CH6OIR::_0,
                    true => CH6OIR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH6OIR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH6OIR::_1
            }
        }
        #[doc = "Possible values of the field `CH7OI`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH7OIR {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH7OIR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH7OIR::_0 => false,
                    CH7OIR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH7OIR {
                match value {
                    false => CH7OIR::_0,
                    true => CH7OIR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH7OIR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH7OIR::_1
            }
        }
        #[doc = "Values that can be written to the field `CH0OI`"]
        pub enum CH0OIW {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH0OIW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH0OIW::_0 => false,
                    CH0OIW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH0OIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH0OIW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH0OIW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The initialization value is 0."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH0OIW::_0)
            }
            #[doc = "The initialization value is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH0OIW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH1OI`"]
        pub enum CH1OIW {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH1OIW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH1OIW::_0 => false,
                    CH1OIW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH1OIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH1OIW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH1OIW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The initialization value is 0."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH1OIW::_0)
            }
            #[doc = "The initialization value is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH1OIW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH2OI`"]
        pub enum CH2OIW {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH2OIW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH2OIW::_0 => false,
                    CH2OIW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH2OIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH2OIW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH2OIW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The initialization value is 0."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH2OIW::_0)
            }
            #[doc = "The initialization value is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH2OIW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH3OI`"]
        pub enum CH3OIW {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH3OIW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH3OIW::_0 => false,
                    CH3OIW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH3OIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH3OIW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH3OIW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The initialization value is 0."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH3OIW::_0)
            }
            #[doc = "The initialization value is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH3OIW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH4OI`"]
        pub enum CH4OIW {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH4OIW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH4OIW::_0 => false,
                    CH4OIW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH4OIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH4OIW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH4OIW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The initialization value is 0."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH4OIW::_0)
            }
            #[doc = "The initialization value is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH4OIW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH5OI`"]
        pub enum CH5OIW {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH5OIW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH5OIW::_0 => false,
                    CH5OIW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH5OIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH5OIW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH5OIW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The initialization value is 0."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH5OIW::_0)
            }
            #[doc = "The initialization value is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH5OIW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH6OI`"]
        pub enum CH6OIW {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH6OIW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH6OIW::_0 => false,
                    CH6OIW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH6OIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH6OIW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH6OIW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The initialization value is 0."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH6OIW::_0)
            }
            #[doc = "The initialization value is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH6OIW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH7OI`"]
        pub enum CH7OIW {
            #[doc = "The initialization value is 0."]
            _0,
            #[doc = "The initialization value is 1."]
            _1,
        }
        impl CH7OIW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH7OIW::_0 => false,
                    CH7OIW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH7OIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH7OIW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH7OIW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The initialization value is 0."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH7OIW::_0)
            }
            #[doc = "The initialization value is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH7OIW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Channel 0 Output Initialization Value"]
            #[inline(always)]
            pub fn ch0oi(&self) -> CH0OIR {
                CH0OIR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Channel 1 Output Initialization Value"]
            #[inline(always)]
            pub fn ch1oi(&self) -> CH1OIR {
                CH1OIR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel 2 Output Initialization Value"]
            #[inline(always)]
            pub fn ch2oi(&self) -> CH2OIR {
                CH2OIR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Channel 3 Output Initialization Value"]
            #[inline(always)]
            pub fn ch3oi(&self) -> CH3OIR {
                CH3OIR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Channel 4 Output Initialization Value"]
            #[inline(always)]
            pub fn ch4oi(&self) -> CH4OIR {
                CH4OIR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Channel 5 Output Initialization Value"]
            #[inline(always)]
            pub fn ch5oi(&self) -> CH5OIR {
                CH5OIR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Channel 6 Output Initialization Value"]
            #[inline(always)]
            pub fn ch6oi(&self) -> CH6OIR {
                CH6OIR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel 7 Output Initialization Value"]
            #[inline(always)]
            pub fn ch7oi(&self) -> CH7OIR {
                CH7OIR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Channel 0 Output Initialization Value"]
            #[inline(always)]
            pub fn ch0oi(&mut self) -> _CH0OIW {
                _CH0OIW { w: self }
            }
            #[doc = "Bit 1 - Channel 1 Output Initialization Value"]
            #[inline(always)]
            pub fn ch1oi(&mut self) -> _CH1OIW {
                _CH1OIW { w: self }
            }
            #[doc = "Bit 2 - Channel 2 Output Initialization Value"]
            #[inline(always)]
            pub fn ch2oi(&mut self) -> _CH2OIW {
                _CH2OIW { w: self }
            }
            #[doc = "Bit 3 - Channel 3 Output Initialization Value"]
            #[inline(always)]
            pub fn ch3oi(&mut self) -> _CH3OIW {
                _CH3OIW { w: self }
            }
            #[doc = "Bit 4 - Channel 4 Output Initialization Value"]
            #[inline(always)]
            pub fn ch4oi(&mut self) -> _CH4OIW {
                _CH4OIW { w: self }
            }
            #[doc = "Bit 5 - Channel 5 Output Initialization Value"]
            #[inline(always)]
            pub fn ch5oi(&mut self) -> _CH5OIW {
                _CH5OIW { w: self }
            }
            #[doc = "Bit 6 - Channel 6 Output Initialization Value"]
            #[inline(always)]
            pub fn ch6oi(&mut self) -> _CH6OIW {
                _CH6OIW { w: self }
            }
            #[doc = "Bit 7 - Channel 7 Output Initialization Value"]
            #[inline(always)]
            pub fn ch7oi(&mut self) -> _CH7OIW {
                _CH7OIW { w: self }
            }
        }
    }
    #[doc = "Output Mask"]
    pub struct OUTMASK {
        register: VolatileCell<u32>,
    }
    #[doc = "Output Mask"]
    pub mod outmask {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::OUTMASK {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CH0OM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH0OMR {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH0OMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH0OMR::_0 => false,
                    CH0OMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH0OMR {
                match value {
                    false => CH0OMR::_0,
                    true => CH0OMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH0OMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH0OMR::_1
            }
        }
        #[doc = "Possible values of the field `CH1OM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH1OMR {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH1OMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH1OMR::_0 => false,
                    CH1OMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH1OMR {
                match value {
                    false => CH1OMR::_0,
                    true => CH1OMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH1OMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH1OMR::_1
            }
        }
        #[doc = "Possible values of the field `CH2OM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH2OMR {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH2OMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH2OMR::_0 => false,
                    CH2OMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH2OMR {
                match value {
                    false => CH2OMR::_0,
                    true => CH2OMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH2OMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH2OMR::_1
            }
        }
        #[doc = "Possible values of the field `CH3OM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH3OMR {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH3OMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH3OMR::_0 => false,
                    CH3OMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH3OMR {
                match value {
                    false => CH3OMR::_0,
                    true => CH3OMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH3OMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH3OMR::_1
            }
        }
        #[doc = "Possible values of the field `CH4OM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH4OMR {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH4OMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH4OMR::_0 => false,
                    CH4OMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH4OMR {
                match value {
                    false => CH4OMR::_0,
                    true => CH4OMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH4OMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH4OMR::_1
            }
        }
        #[doc = "Possible values of the field `CH5OM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH5OMR {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH5OMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH5OMR::_0 => false,
                    CH5OMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH5OMR {
                match value {
                    false => CH5OMR::_0,
                    true => CH5OMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH5OMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH5OMR::_1
            }
        }
        #[doc = "Possible values of the field `CH6OM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH6OMR {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH6OMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH6OMR::_0 => false,
                    CH6OMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH6OMR {
                match value {
                    false => CH6OMR::_0,
                    true => CH6OMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH6OMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH6OMR::_1
            }
        }
        #[doc = "Possible values of the field `CH7OM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH7OMR {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH7OMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH7OMR::_0 => false,
                    CH7OMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH7OMR {
                match value {
                    false => CH7OMR::_0,
                    true => CH7OMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH7OMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH7OMR::_1
            }
        }
        #[doc = "Values that can be written to the field `CH0OM`"]
        pub enum CH0OMW {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH0OMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH0OMW::_0 => false,
                    CH0OMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH0OMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH0OMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH0OMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output is not masked. It continues to operate normally."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH0OMW::_0)
            }
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH0OMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH1OM`"]
        pub enum CH1OMW {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH1OMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH1OMW::_0 => false,
                    CH1OMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH1OMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH1OMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH1OMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output is not masked. It continues to operate normally."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH1OMW::_0)
            }
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH1OMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH2OM`"]
        pub enum CH2OMW {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH2OMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH2OMW::_0 => false,
                    CH2OMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH2OMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH2OMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH2OMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output is not masked. It continues to operate normally."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH2OMW::_0)
            }
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH2OMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH3OM`"]
        pub enum CH3OMW {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH3OMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH3OMW::_0 => false,
                    CH3OMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH3OMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH3OMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH3OMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output is not masked. It continues to operate normally."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH3OMW::_0)
            }
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH3OMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH4OM`"]
        pub enum CH4OMW {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH4OMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH4OMW::_0 => false,
                    CH4OMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH4OMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH4OMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH4OMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output is not masked. It continues to operate normally."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH4OMW::_0)
            }
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH4OMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH5OM`"]
        pub enum CH5OMW {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH5OMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH5OMW::_0 => false,
                    CH5OMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH5OMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH5OMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH5OMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output is not masked. It continues to operate normally."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH5OMW::_0)
            }
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH5OMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH6OM`"]
        pub enum CH6OMW {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH6OMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH6OMW::_0 => false,
                    CH6OMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH6OMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH6OMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH6OMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output is not masked. It continues to operate normally."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH6OMW::_0)
            }
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH6OMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH7OM`"]
        pub enum CH7OMW {
            #[doc = "Channel output is not masked. It continues to operate normally."]
            _0,
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            _1,
        }
        impl CH7OMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH7OMW::_0 => false,
                    CH7OMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH7OMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH7OMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH7OMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel output is not masked. It continues to operate normally."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH7OMW::_0)
            }
            #[doc = "Channel output is masked. It is forced to its inactive state."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH7OMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Channel 0 Output Mask"]
            #[inline(always)]
            pub fn ch0om(&self) -> CH0OMR {
                CH0OMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Channel 1 Output Mask"]
            #[inline(always)]
            pub fn ch1om(&self) -> CH1OMR {
                CH1OMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel 2 Output Mask"]
            #[inline(always)]
            pub fn ch2om(&self) -> CH2OMR {
                CH2OMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Channel 3 Output Mask"]
            #[inline(always)]
            pub fn ch3om(&self) -> CH3OMR {
                CH3OMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Channel 4 Output Mask"]
            #[inline(always)]
            pub fn ch4om(&self) -> CH4OMR {
                CH4OMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Channel 5 Output Mask"]
            #[inline(always)]
            pub fn ch5om(&self) -> CH5OMR {
                CH5OMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Channel 6 Output Mask"]
            #[inline(always)]
            pub fn ch6om(&self) -> CH6OMR {
                CH6OMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel 7 Output Mask"]
            #[inline(always)]
            pub fn ch7om(&self) -> CH7OMR {
                CH7OMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Channel 0 Output Mask"]
            #[inline(always)]
            pub fn ch0om(&mut self) -> _CH0OMW {
                _CH0OMW { w: self }
            }
            #[doc = "Bit 1 - Channel 1 Output Mask"]
            #[inline(always)]
            pub fn ch1om(&mut self) -> _CH1OMW {
                _CH1OMW { w: self }
            }
            #[doc = "Bit 2 - Channel 2 Output Mask"]
            #[inline(always)]
            pub fn ch2om(&mut self) -> _CH2OMW {
                _CH2OMW { w: self }
            }
            #[doc = "Bit 3 - Channel 3 Output Mask"]
            #[inline(always)]
            pub fn ch3om(&mut self) -> _CH3OMW {
                _CH3OMW { w: self }
            }
            #[doc = "Bit 4 - Channel 4 Output Mask"]
            #[inline(always)]
            pub fn ch4om(&mut self) -> _CH4OMW {
                _CH4OMW { w: self }
            }
            #[doc = "Bit 5 - Channel 5 Output Mask"]
            #[inline(always)]
            pub fn ch5om(&mut self) -> _CH5OMW {
                _CH5OMW { w: self }
            }
            #[doc = "Bit 6 - Channel 6 Output Mask"]
            #[inline(always)]
            pub fn ch6om(&mut self) -> _CH6OMW {
                _CH6OMW { w: self }
            }
            #[doc = "Bit 7 - Channel 7 Output Mask"]
            #[inline(always)]
            pub fn ch7om(&mut self) -> _CH7OMW {
                _CH7OMW { w: self }
            }
        }
    }
    #[doc = "Function For Linked Channels"]
    pub struct COMBINE {
        register: VolatileCell<u32>,
    }
    #[doc = "Function For Linked Channels"]
    pub mod combine {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::COMBINE {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct COMBINE0R {
            bits: bool,
        }
        impl COMBINE0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `COMP0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum COMP0R {
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            _0,
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            _1,
        }
        impl COMP0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    COMP0R::_0 => false,
                    COMP0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> COMP0R {
                match value {
                    false => COMP0R::_0,
                    true => COMP0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == COMP0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == COMP0R::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct DECAPEN0R {
            bits: bool,
        }
        impl DECAPEN0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `DECAP0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DECAP0R {
            #[doc = "The dual edge captures are inactive."]
            _0,
            #[doc = "The dual edge captures are active."]
            _1,
        }
        impl DECAP0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DECAP0R::_0 => false,
                    DECAP0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DECAP0R {
                match value {
                    false => DECAP0R::_0,
                    true => DECAP0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DECAP0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DECAP0R::_1
            }
        }
        #[doc = "Possible values of the field `DTEN0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DTEN0R {
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            _0,
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            _1,
        }
        impl DTEN0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DTEN0R::_0 => false,
                    DTEN0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DTEN0R {
                match value {
                    false => DTEN0R::_0,
                    true => DTEN0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DTEN0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DTEN0R::_1
            }
        }
        #[doc = "Possible values of the field `SYNCEN0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SYNCEN0R {
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            _0,
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            _1,
        }
        impl SYNCEN0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SYNCEN0R::_0 => false,
                    SYNCEN0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SYNCEN0R {
                match value {
                    false => SYNCEN0R::_0,
                    true => SYNCEN0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SYNCEN0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SYNCEN0R::_1
            }
        }
        #[doc = "Possible values of the field `FAULTEN0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTEN0R {
            #[doc = "The fault control in this pair of channels is disabled."]
            _0,
            #[doc = "The fault control in this pair of channels is enabled."]
            _1,
        }
        impl FAULTEN0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTEN0R::_0 => false,
                    FAULTEN0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTEN0R {
                match value {
                    false => FAULTEN0R::_0,
                    true => FAULTEN0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTEN0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTEN0R::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct MCOMBINE0R {
            bits: bool,
        }
        impl MCOMBINE0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct COMBINE1R {
            bits: bool,
        }
        impl COMBINE1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `COMP1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum COMP1R {
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            _0,
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            _1,
        }
        impl COMP1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    COMP1R::_0 => false,
                    COMP1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> COMP1R {
                match value {
                    false => COMP1R::_0,
                    true => COMP1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == COMP1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == COMP1R::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct DECAPEN1R {
            bits: bool,
        }
        impl DECAPEN1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `DECAP1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DECAP1R {
            #[doc = "The dual edge captures are inactive."]
            _0,
            #[doc = "The dual edge captures are active."]
            _1,
        }
        impl DECAP1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DECAP1R::_0 => false,
                    DECAP1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DECAP1R {
                match value {
                    false => DECAP1R::_0,
                    true => DECAP1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DECAP1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DECAP1R::_1
            }
        }
        #[doc = "Possible values of the field `DTEN1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DTEN1R {
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            _0,
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            _1,
        }
        impl DTEN1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DTEN1R::_0 => false,
                    DTEN1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DTEN1R {
                match value {
                    false => DTEN1R::_0,
                    true => DTEN1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DTEN1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DTEN1R::_1
            }
        }
        #[doc = "Possible values of the field `SYNCEN1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SYNCEN1R {
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            _0,
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            _1,
        }
        impl SYNCEN1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SYNCEN1R::_0 => false,
                    SYNCEN1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SYNCEN1R {
                match value {
                    false => SYNCEN1R::_0,
                    true => SYNCEN1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SYNCEN1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SYNCEN1R::_1
            }
        }
        #[doc = "Possible values of the field `FAULTEN1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTEN1R {
            #[doc = "The fault control in this pair of channels is disabled."]
            _0,
            #[doc = "The fault control in this pair of channels is enabled."]
            _1,
        }
        impl FAULTEN1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTEN1R::_0 => false,
                    FAULTEN1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTEN1R {
                match value {
                    false => FAULTEN1R::_0,
                    true => FAULTEN1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTEN1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTEN1R::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct MCOMBINE1R {
            bits: bool,
        }
        impl MCOMBINE1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct COMBINE2R {
            bits: bool,
        }
        impl COMBINE2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `COMP2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum COMP2R {
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            _0,
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            _1,
        }
        impl COMP2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    COMP2R::_0 => false,
                    COMP2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> COMP2R {
                match value {
                    false => COMP2R::_0,
                    true => COMP2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == COMP2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == COMP2R::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct DECAPEN2R {
            bits: bool,
        }
        impl DECAPEN2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `DECAP2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DECAP2R {
            #[doc = "The dual edge captures are inactive."]
            _0,
            #[doc = "The dual edge captures are active."]
            _1,
        }
        impl DECAP2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DECAP2R::_0 => false,
                    DECAP2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DECAP2R {
                match value {
                    false => DECAP2R::_0,
                    true => DECAP2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DECAP2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DECAP2R::_1
            }
        }
        #[doc = "Possible values of the field `DTEN2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DTEN2R {
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            _0,
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            _1,
        }
        impl DTEN2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DTEN2R::_0 => false,
                    DTEN2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DTEN2R {
                match value {
                    false => DTEN2R::_0,
                    true => DTEN2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DTEN2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DTEN2R::_1
            }
        }
        #[doc = "Possible values of the field `SYNCEN2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SYNCEN2R {
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            _0,
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            _1,
        }
        impl SYNCEN2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SYNCEN2R::_0 => false,
                    SYNCEN2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SYNCEN2R {
                match value {
                    false => SYNCEN2R::_0,
                    true => SYNCEN2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SYNCEN2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SYNCEN2R::_1
            }
        }
        #[doc = "Possible values of the field `FAULTEN2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTEN2R {
            #[doc = "The fault control in this pair of channels is disabled."]
            _0,
            #[doc = "The fault control in this pair of channels is enabled."]
            _1,
        }
        impl FAULTEN2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTEN2R::_0 => false,
                    FAULTEN2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTEN2R {
                match value {
                    false => FAULTEN2R::_0,
                    true => FAULTEN2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTEN2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTEN2R::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct MCOMBINE2R {
            bits: bool,
        }
        impl MCOMBINE2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct COMBINE3R {
            bits: bool,
        }
        impl COMBINE3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `COMP3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum COMP3R {
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            _0,
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            _1,
        }
        impl COMP3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    COMP3R::_0 => false,
                    COMP3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> COMP3R {
                match value {
                    false => COMP3R::_0,
                    true => COMP3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == COMP3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == COMP3R::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct DECAPEN3R {
            bits: bool,
        }
        impl DECAPEN3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `DECAP3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DECAP3R {
            #[doc = "The dual edge captures are inactive."]
            _0,
            #[doc = "The dual edge captures are active."]
            _1,
        }
        impl DECAP3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DECAP3R::_0 => false,
                    DECAP3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DECAP3R {
                match value {
                    false => DECAP3R::_0,
                    true => DECAP3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DECAP3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DECAP3R::_1
            }
        }
        #[doc = "Possible values of the field `DTEN3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DTEN3R {
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            _0,
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            _1,
        }
        impl DTEN3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DTEN3R::_0 => false,
                    DTEN3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DTEN3R {
                match value {
                    false => DTEN3R::_0,
                    true => DTEN3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DTEN3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DTEN3R::_1
            }
        }
        #[doc = "Possible values of the field `SYNCEN3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SYNCEN3R {
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            _0,
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            _1,
        }
        impl SYNCEN3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SYNCEN3R::_0 => false,
                    SYNCEN3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SYNCEN3R {
                match value {
                    false => SYNCEN3R::_0,
                    true => SYNCEN3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SYNCEN3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SYNCEN3R::_1
            }
        }
        #[doc = "Possible values of the field `FAULTEN3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTEN3R {
            #[doc = "The fault control in this pair of channels is disabled."]
            _0,
            #[doc = "The fault control in this pair of channels is enabled."]
            _1,
        }
        impl FAULTEN3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTEN3R::_0 => false,
                    FAULTEN3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTEN3R {
                match value {
                    false => FAULTEN3R::_0,
                    true => FAULTEN3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTEN3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTEN3R::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct MCOMBINE3R {
            bits: bool,
        }
        impl MCOMBINE3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Proxy"]
        pub struct _COMBINE0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _COMBINE0W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `COMP0`"]
        pub enum COMP0W {
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            _0,
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            _1,
        }
        impl COMP0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    COMP0W::_0 => false,
                    COMP0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _COMP0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _COMP0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: COMP0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(COMP0W::_0)
            }
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(COMP0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DECAPEN0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DECAPEN0W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DECAP0`"]
        pub enum DECAP0W {
            #[doc = "The dual edge captures are inactive."]
            _0,
            #[doc = "The dual edge captures are active."]
            _1,
        }
        impl DECAP0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DECAP0W::_0 => false,
                    DECAP0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DECAP0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DECAP0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DECAP0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The dual edge captures are inactive."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DECAP0W::_0)
            }
            #[doc = "The dual edge captures are active."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DECAP0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DTEN0`"]
        pub enum DTEN0W {
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            _0,
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            _1,
        }
        impl DTEN0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DTEN0W::_0 => false,
                    DTEN0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTEN0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTEN0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DTEN0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DTEN0W::_0)
            }
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DTEN0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SYNCEN0`"]
        pub enum SYNCEN0W {
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            _0,
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            _1,
        }
        impl SYNCEN0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SYNCEN0W::_0 => false,
                    SYNCEN0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SYNCEN0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SYNCEN0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SYNCEN0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SYNCEN0W::_0)
            }
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SYNCEN0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FAULTEN0`"]
        pub enum FAULTEN0W {
            #[doc = "The fault control in this pair of channels is disabled."]
            _0,
            #[doc = "The fault control in this pair of channels is enabled."]
            _1,
        }
        impl FAULTEN0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FAULTEN0W::_0 => false,
                    FAULTEN0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FAULTEN0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _FAULTEN0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FAULTEN0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The fault control in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FAULTEN0W::_0)
            }
            #[doc = "The fault control in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FAULTEN0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MCOMBINE0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MCOMBINE0W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _COMBINE1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _COMBINE1W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `COMP1`"]
        pub enum COMP1W {
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            _0,
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            _1,
        }
        impl COMP1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    COMP1W::_0 => false,
                    COMP1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _COMP1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _COMP1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: COMP1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(COMP1W::_0)
            }
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(COMP1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DECAPEN1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DECAPEN1W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DECAP1`"]
        pub enum DECAP1W {
            #[doc = "The dual edge captures are inactive."]
            _0,
            #[doc = "The dual edge captures are active."]
            _1,
        }
        impl DECAP1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DECAP1W::_0 => false,
                    DECAP1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DECAP1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DECAP1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DECAP1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The dual edge captures are inactive."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DECAP1W::_0)
            }
            #[doc = "The dual edge captures are active."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DECAP1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DTEN1`"]
        pub enum DTEN1W {
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            _0,
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            _1,
        }
        impl DTEN1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DTEN1W::_0 => false,
                    DTEN1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTEN1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTEN1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DTEN1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DTEN1W::_0)
            }
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DTEN1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SYNCEN1`"]
        pub enum SYNCEN1W {
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            _0,
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            _1,
        }
        impl SYNCEN1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SYNCEN1W::_0 => false,
                    SYNCEN1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SYNCEN1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SYNCEN1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SYNCEN1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SYNCEN1W::_0)
            }
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SYNCEN1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FAULTEN1`"]
        pub enum FAULTEN1W {
            #[doc = "The fault control in this pair of channels is disabled."]
            _0,
            #[doc = "The fault control in this pair of channels is enabled."]
            _1,
        }
        impl FAULTEN1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FAULTEN1W::_0 => false,
                    FAULTEN1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FAULTEN1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _FAULTEN1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FAULTEN1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The fault control in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FAULTEN1W::_0)
            }
            #[doc = "The fault control in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FAULTEN1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MCOMBINE1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MCOMBINE1W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _COMBINE2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _COMBINE2W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `COMP2`"]
        pub enum COMP2W {
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            _0,
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            _1,
        }
        impl COMP2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    COMP2W::_0 => false,
                    COMP2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _COMP2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _COMP2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: COMP2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(COMP2W::_0)
            }
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(COMP2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DECAPEN2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DECAPEN2W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DECAP2`"]
        pub enum DECAP2W {
            #[doc = "The dual edge captures are inactive."]
            _0,
            #[doc = "The dual edge captures are active."]
            _1,
        }
        impl DECAP2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DECAP2W::_0 => false,
                    DECAP2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DECAP2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DECAP2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DECAP2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The dual edge captures are inactive."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DECAP2W::_0)
            }
            #[doc = "The dual edge captures are active."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DECAP2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 19;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DTEN2`"]
        pub enum DTEN2W {
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            _0,
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            _1,
        }
        impl DTEN2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DTEN2W::_0 => false,
                    DTEN2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTEN2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTEN2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DTEN2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DTEN2W::_0)
            }
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DTEN2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SYNCEN2`"]
        pub enum SYNCEN2W {
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            _0,
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            _1,
        }
        impl SYNCEN2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SYNCEN2W::_0 => false,
                    SYNCEN2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SYNCEN2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SYNCEN2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SYNCEN2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SYNCEN2W::_0)
            }
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SYNCEN2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 21;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FAULTEN2`"]
        pub enum FAULTEN2W {
            #[doc = "The fault control in this pair of channels is disabled."]
            _0,
            #[doc = "The fault control in this pair of channels is enabled."]
            _1,
        }
        impl FAULTEN2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FAULTEN2W::_0 => false,
                    FAULTEN2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FAULTEN2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _FAULTEN2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FAULTEN2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The fault control in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FAULTEN2W::_0)
            }
            #[doc = "The fault control in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FAULTEN2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 22;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MCOMBINE2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MCOMBINE2W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 23;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _COMBINE3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _COMBINE3W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `COMP3`"]
        pub enum COMP3W {
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            _0,
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            _1,
        }
        impl COMP3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    COMP3W::_0 => false,
                    COMP3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _COMP3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _COMP3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: COMP3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel (n+1) output is the same as the channel (n) output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(COMP3W::_0)
            }
            #[doc = "The channel (n+1) output is the complement of the channel (n) output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(COMP3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 25;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DECAPEN3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DECAPEN3W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 26;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DECAP3`"]
        pub enum DECAP3W {
            #[doc = "The dual edge captures are inactive."]
            _0,
            #[doc = "The dual edge captures are active."]
            _1,
        }
        impl DECAP3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DECAP3W::_0 => false,
                    DECAP3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DECAP3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DECAP3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DECAP3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The dual edge captures are inactive."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DECAP3W::_0)
            }
            #[doc = "The dual edge captures are active."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DECAP3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 27;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DTEN3`"]
        pub enum DTEN3W {
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            _0,
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            _1,
        }
        impl DTEN3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DTEN3W::_0 => false,
                    DTEN3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTEN3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTEN3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DTEN3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The deadtime insertion in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DTEN3W::_0)
            }
            #[doc = "The deadtime insertion in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DTEN3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 28;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SYNCEN3`"]
        pub enum SYNCEN3W {
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            _0,
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            _1,
        }
        impl SYNCEN3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SYNCEN3W::_0 => false,
                    SYNCEN3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SYNCEN3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SYNCEN3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SYNCEN3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The PWM synchronization in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SYNCEN3W::_0)
            }
            #[doc = "The PWM synchronization in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SYNCEN3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 29;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FAULTEN3`"]
        pub enum FAULTEN3W {
            #[doc = "The fault control in this pair of channels is disabled."]
            _0,
            #[doc = "The fault control in this pair of channels is enabled."]
            _1,
        }
        impl FAULTEN3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FAULTEN3W::_0 => false,
                    FAULTEN3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FAULTEN3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _FAULTEN3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FAULTEN3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The fault control in this pair of channels is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FAULTEN3W::_0)
            }
            #[doc = "The fault control in this pair of channels is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FAULTEN3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MCOMBINE3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MCOMBINE3W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Combine Channels For n = 0"]
            #[inline(always)]
            pub fn combine0(&self) -> COMBINE0R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                COMBINE0R { bits }
            }
            #[doc = "Bit 1 - Complement Of Channel (n) For n = 0"]
            #[inline(always)]
            pub fn comp0(&self) -> COMP0R {
                COMP0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Dual Edge Capture Mode Enable For n = 0"]
            #[inline(always)]
            pub fn decapen0(&self) -> DECAPEN0R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                DECAPEN0R { bits }
            }
            #[doc = "Bit 3 - Dual Edge Capture Mode Captures For n = 0"]
            #[inline(always)]
            pub fn decap0(&self) -> DECAP0R {
                DECAP0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Deadtime Enable For n = 0"]
            #[inline(always)]
            pub fn dten0(&self) -> DTEN0R {
                DTEN0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Synchronization Enable For n = 0"]
            #[inline(always)]
            pub fn syncen0(&self) -> SYNCEN0R {
                SYNCEN0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Fault Control Enable For n = 0"]
            #[inline(always)]
            pub fn faulten0(&self) -> FAULTEN0R {
                FAULTEN0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Modified Combine Mode For n = 0"]
            #[inline(always)]
            pub fn mcombine0(&self) -> MCOMBINE0R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MCOMBINE0R { bits }
            }
            #[doc = "Bit 8 - Combine Channels For n = 2"]
            #[inline(always)]
            pub fn combine1(&self) -> COMBINE1R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                COMBINE1R { bits }
            }
            #[doc = "Bit 9 - Complement Of Channel (n) For n = 2"]
            #[inline(always)]
            pub fn comp1(&self) -> COMP1R {
                COMP1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Dual Edge Capture Mode Enable For n = 2"]
            #[inline(always)]
            pub fn decapen1(&self) -> DECAPEN1R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                DECAPEN1R { bits }
            }
            #[doc = "Bit 11 - Dual Edge Capture Mode Captures For n = 2"]
            #[inline(always)]
            pub fn decap1(&self) -> DECAP1R {
                DECAP1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Deadtime Enable For n = 2"]
            #[inline(always)]
            pub fn dten1(&self) -> DTEN1R {
                DTEN1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Synchronization Enable For n = 2"]
            #[inline(always)]
            pub fn syncen1(&self) -> SYNCEN1R {
                SYNCEN1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - Fault Control Enable For n = 2"]
            #[inline(always)]
            pub fn faulten1(&self) -> FAULTEN1R {
                FAULTEN1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - Modified Combine Mode For n = 2"]
            #[inline(always)]
            pub fn mcombine1(&self) -> MCOMBINE1R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MCOMBINE1R { bits }
            }
            #[doc = "Bit 16 - Combine Channels For n = 4"]
            #[inline(always)]
            pub fn combine2(&self) -> COMBINE2R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                COMBINE2R { bits }
            }
            #[doc = "Bit 17 - Complement Of Channel (n) For n = 4"]
            #[inline(always)]
            pub fn comp2(&self) -> COMP2R {
                COMP2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 18 - Dual Edge Capture Mode Enable For n = 4"]
            #[inline(always)]
            pub fn decapen2(&self) -> DECAPEN2R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                DECAPEN2R { bits }
            }
            #[doc = "Bit 19 - Dual Edge Capture Mode Captures For n = 4"]
            #[inline(always)]
            pub fn decap2(&self) -> DECAP2R {
                DECAP2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 19;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 20 - Deadtime Enable For n = 4"]
            #[inline(always)]
            pub fn dten2(&self) -> DTEN2R {
                DTEN2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - Synchronization Enable For n = 4"]
            #[inline(always)]
            pub fn syncen2(&self) -> SYNCEN2R {
                SYNCEN2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 22 - Fault Control Enable For n = 4"]
            #[inline(always)]
            pub fn faulten2(&self) -> FAULTEN2R {
                FAULTEN2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 23 - Modified Combine Mode For n = 4"]
            #[inline(always)]
            pub fn mcombine2(&self) -> MCOMBINE2R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MCOMBINE2R { bits }
            }
            #[doc = "Bit 24 - Combine Channels For n = 6"]
            #[inline(always)]
            pub fn combine3(&self) -> COMBINE3R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                COMBINE3R { bits }
            }
            #[doc = "Bit 25 - Complement Of Channel (n) for n = 6"]
            #[inline(always)]
            pub fn comp3(&self) -> COMP3R {
                COMP3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 25;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 26 - Dual Edge Capture Mode Enable For n = 6"]
            #[inline(always)]
            pub fn decapen3(&self) -> DECAPEN3R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 26;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                DECAPEN3R { bits }
            }
            #[doc = "Bit 27 - Dual Edge Capture Mode Captures For n = 6"]
            #[inline(always)]
            pub fn decap3(&self) -> DECAP3R {
                DECAP3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 27;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 28 - Deadtime Enable For n = 6"]
            #[inline(always)]
            pub fn dten3(&self) -> DTEN3R {
                DTEN3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 28;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 29 - Synchronization Enable For n = 6"]
            #[inline(always)]
            pub fn syncen3(&self) -> SYNCEN3R {
                SYNCEN3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 29;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 30 - Fault Control Enable For n = 6"]
            #[inline(always)]
            pub fn faulten3(&self) -> FAULTEN3R {
                FAULTEN3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Modified Combine Mode For n = 6"]
            #[inline(always)]
            pub fn mcombine3(&self) -> MCOMBINE3R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                MCOMBINE3R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Combine Channels For n = 0"]
            #[inline(always)]
            pub fn combine0(&mut self) -> _COMBINE0W {
                _COMBINE0W { w: self }
            }
            #[doc = "Bit 1 - Complement Of Channel (n) For n = 0"]
            #[inline(always)]
            pub fn comp0(&mut self) -> _COMP0W {
                _COMP0W { w: self }
            }
            #[doc = "Bit 2 - Dual Edge Capture Mode Enable For n = 0"]
            #[inline(always)]
            pub fn decapen0(&mut self) -> _DECAPEN0W {
                _DECAPEN0W { w: self }
            }
            #[doc = "Bit 3 - Dual Edge Capture Mode Captures For n = 0"]
            #[inline(always)]
            pub fn decap0(&mut self) -> _DECAP0W {
                _DECAP0W { w: self }
            }
            #[doc = "Bit 4 - Deadtime Enable For n = 0"]
            #[inline(always)]
            pub fn dten0(&mut self) -> _DTEN0W {
                _DTEN0W { w: self }
            }
            #[doc = "Bit 5 - Synchronization Enable For n = 0"]
            #[inline(always)]
            pub fn syncen0(&mut self) -> _SYNCEN0W {
                _SYNCEN0W { w: self }
            }
            #[doc = "Bit 6 - Fault Control Enable For n = 0"]
            #[inline(always)]
            pub fn faulten0(&mut self) -> _FAULTEN0W {
                _FAULTEN0W { w: self }
            }
            #[doc = "Bit 7 - Modified Combine Mode For n = 0"]
            #[inline(always)]
            pub fn mcombine0(&mut self) -> _MCOMBINE0W {
                _MCOMBINE0W { w: self }
            }
            #[doc = "Bit 8 - Combine Channels For n = 2"]
            #[inline(always)]
            pub fn combine1(&mut self) -> _COMBINE1W {
                _COMBINE1W { w: self }
            }
            #[doc = "Bit 9 - Complement Of Channel (n) For n = 2"]
            #[inline(always)]
            pub fn comp1(&mut self) -> _COMP1W {
                _COMP1W { w: self }
            }
            #[doc = "Bit 10 - Dual Edge Capture Mode Enable For n = 2"]
            #[inline(always)]
            pub fn decapen1(&mut self) -> _DECAPEN1W {
                _DECAPEN1W { w: self }
            }
            #[doc = "Bit 11 - Dual Edge Capture Mode Captures For n = 2"]
            #[inline(always)]
            pub fn decap1(&mut self) -> _DECAP1W {
                _DECAP1W { w: self }
            }
            #[doc = "Bit 12 - Deadtime Enable For n = 2"]
            #[inline(always)]
            pub fn dten1(&mut self) -> _DTEN1W {
                _DTEN1W { w: self }
            }
            #[doc = "Bit 13 - Synchronization Enable For n = 2"]
            #[inline(always)]
            pub fn syncen1(&mut self) -> _SYNCEN1W {
                _SYNCEN1W { w: self }
            }
            #[doc = "Bit 14 - Fault Control Enable For n = 2"]
            #[inline(always)]
            pub fn faulten1(&mut self) -> _FAULTEN1W {
                _FAULTEN1W { w: self }
            }
            #[doc = "Bit 15 - Modified Combine Mode For n = 2"]
            #[inline(always)]
            pub fn mcombine1(&mut self) -> _MCOMBINE1W {
                _MCOMBINE1W { w: self }
            }
            #[doc = "Bit 16 - Combine Channels For n = 4"]
            #[inline(always)]
            pub fn combine2(&mut self) -> _COMBINE2W {
                _COMBINE2W { w: self }
            }
            #[doc = "Bit 17 - Complement Of Channel (n) For n = 4"]
            #[inline(always)]
            pub fn comp2(&mut self) -> _COMP2W {
                _COMP2W { w: self }
            }
            #[doc = "Bit 18 - Dual Edge Capture Mode Enable For n = 4"]
            #[inline(always)]
            pub fn decapen2(&mut self) -> _DECAPEN2W {
                _DECAPEN2W { w: self }
            }
            #[doc = "Bit 19 - Dual Edge Capture Mode Captures For n = 4"]
            #[inline(always)]
            pub fn decap2(&mut self) -> _DECAP2W {
                _DECAP2W { w: self }
            }
            #[doc = "Bit 20 - Deadtime Enable For n = 4"]
            #[inline(always)]
            pub fn dten2(&mut self) -> _DTEN2W {
                _DTEN2W { w: self }
            }
            #[doc = "Bit 21 - Synchronization Enable For n = 4"]
            #[inline(always)]
            pub fn syncen2(&mut self) -> _SYNCEN2W {
                _SYNCEN2W { w: self }
            }
            #[doc = "Bit 22 - Fault Control Enable For n = 4"]
            #[inline(always)]
            pub fn faulten2(&mut self) -> _FAULTEN2W {
                _FAULTEN2W { w: self }
            }
            #[doc = "Bit 23 - Modified Combine Mode For n = 4"]
            #[inline(always)]
            pub fn mcombine2(&mut self) -> _MCOMBINE2W {
                _MCOMBINE2W { w: self }
            }
            #[doc = "Bit 24 - Combine Channels For n = 6"]
            #[inline(always)]
            pub fn combine3(&mut self) -> _COMBINE3W {
                _COMBINE3W { w: self }
            }
            #[doc = "Bit 25 - Complement Of Channel (n) for n = 6"]
            #[inline(always)]
            pub fn comp3(&mut self) -> _COMP3W {
                _COMP3W { w: self }
            }
            #[doc = "Bit 26 - Dual Edge Capture Mode Enable For n = 6"]
            #[inline(always)]
            pub fn decapen3(&mut self) -> _DECAPEN3W {
                _DECAPEN3W { w: self }
            }
            #[doc = "Bit 27 - Dual Edge Capture Mode Captures For n = 6"]
            #[inline(always)]
            pub fn decap3(&mut self) -> _DECAP3W {
                _DECAP3W { w: self }
            }
            #[doc = "Bit 28 - Deadtime Enable For n = 6"]
            #[inline(always)]
            pub fn dten3(&mut self) -> _DTEN3W {
                _DTEN3W { w: self }
            }
            #[doc = "Bit 29 - Synchronization Enable For n = 6"]
            #[inline(always)]
            pub fn syncen3(&mut self) -> _SYNCEN3W {
                _SYNCEN3W { w: self }
            }
            #[doc = "Bit 30 - Fault Control Enable For n = 6"]
            #[inline(always)]
            pub fn faulten3(&mut self) -> _FAULTEN3W {
                _FAULTEN3W { w: self }
            }
            #[doc = "Bit 31 - Modified Combine Mode For n = 6"]
            #[inline(always)]
            pub fn mcombine3(&mut self) -> _MCOMBINE3W {
                _MCOMBINE3W { w: self }
            }
        }
    }
    #[doc = "Deadtime Configuration"]
    pub struct DEADTIME {
        register: VolatileCell<u32>,
    }
    #[doc = "Deadtime Configuration"]
    pub mod deadtime {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::DEADTIME {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DTVALR {
            bits: u8,
        }
        impl DTVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DTPS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DTPSR {
            #[doc = "Divide the FTM input clock by 1."]
            _0X,
            #[doc = "Divide the FTM input clock by 4."]
            _10,
            #[doc = "Divide the FTM input clock by 16."]
            _11,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl DTPSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    DTPSR::_0X => 0,
                    DTPSR::_10 => 2,
                    DTPSR::_11 => 3,
                    DTPSR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> DTPSR {
                match value {
                    0 => DTPSR::_0X,
                    2 => DTPSR::_10,
                    3 => DTPSR::_11,
                    i => DTPSR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0X`"]
            #[inline(always)]
            pub fn is_0x(&self) -> bool {
                *self == DTPSR::_0X
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == DTPSR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == DTPSR::_11
            }
        }
        #[doc = r" Value of the field"]
        pub struct DTVALEXR {
            bits: u8,
        }
        impl DTVALEXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DTPS`"]
        pub enum DTPSW {
            #[doc = "Divide the FTM input clock by 1."]
            _0X,
            #[doc = "Divide the FTM input clock by 4."]
            _10,
            #[doc = "Divide the FTM input clock by 16."]
            _11,
        }
        impl DTPSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    DTPSW::_0X => 0,
                    DTPSW::_10 => 2,
                    DTPSW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTPSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTPSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DTPSW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Divide the FTM input clock by 1."]
            #[inline(always)]
            pub fn _0x(self) -> &'a mut W {
                self.variant(DTPSW::_0X)
            }
            #[doc = "Divide the FTM input clock by 4."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(DTPSW::_10)
            }
            #[doc = "Divide the FTM input clock by 16."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(DTPSW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTVALEXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTVALEXW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Deadtime Value"]
            #[inline(always)]
            pub fn dtval(&self) -> DTVALR {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DTVALR { bits }
            }
            #[doc = "Bits 6:7 - Deadtime Prescaler Value"]
            #[inline(always)]
            pub fn dtps(&self) -> DTPSR {
                DTPSR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 16:19 - Extended Deadtime Value"]
            #[inline(always)]
            pub fn dtvalex(&self) -> DTVALEXR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DTVALEXR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - Deadtime Value"]
            #[inline(always)]
            pub fn dtval(&mut self) -> _DTVALW {
                _DTVALW { w: self }
            }
            #[doc = "Bits 6:7 - Deadtime Prescaler Value"]
            #[inline(always)]
            pub fn dtps(&mut self) -> _DTPSW {
                _DTPSW { w: self }
            }
            #[doc = "Bits 16:19 - Extended Deadtime Value"]
            #[inline(always)]
            pub fn dtvalex(&mut self) -> _DTVALEXW {
                _DTVALEXW { w: self }
            }
        }
    }
    #[doc = "FTM External Trigger"]
    pub struct EXTTRIG {
        register: VolatileCell<u32>,
    }
    #[doc = "FTM External Trigger"]
    pub mod exttrig {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::EXTTRIG {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CH2TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH2TRIGR {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH2TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH2TRIGR::_0 => false,
                    CH2TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH2TRIGR {
                match value {
                    false => CH2TRIGR::_0,
                    true => CH2TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH2TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH2TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `CH3TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH3TRIGR {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH3TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH3TRIGR::_0 => false,
                    CH3TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH3TRIGR {
                match value {
                    false => CH3TRIGR::_0,
                    true => CH3TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH3TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH3TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `CH4TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH4TRIGR {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH4TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH4TRIGR::_0 => false,
                    CH4TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH4TRIGR {
                match value {
                    false => CH4TRIGR::_0,
                    true => CH4TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH4TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH4TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `CH5TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH5TRIGR {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH5TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH5TRIGR::_0 => false,
                    CH5TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH5TRIGR {
                match value {
                    false => CH5TRIGR::_0,
                    true => CH5TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH5TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH5TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `CH0TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH0TRIGR {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH0TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH0TRIGR::_0 => false,
                    CH0TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH0TRIGR {
                match value {
                    false => CH0TRIGR::_0,
                    true => CH0TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH0TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH0TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `CH1TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH1TRIGR {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH1TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH1TRIGR::_0 => false,
                    CH1TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH1TRIGR {
                match value {
                    false => CH1TRIGR::_0,
                    true => CH1TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH1TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH1TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `INITTRIGEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INITTRIGENR {
            #[doc = "The generation of initialization trigger is disabled."]
            _0,
            #[doc = "The generation of initialization trigger is enabled."]
            _1,
        }
        impl INITTRIGENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INITTRIGENR::_0 => false,
                    INITTRIGENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INITTRIGENR {
                match value {
                    false => INITTRIGENR::_0,
                    true => INITTRIGENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INITTRIGENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INITTRIGENR::_1
            }
        }
        #[doc = "Possible values of the field `TRIGF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRIGFR {
            #[doc = "No channel trigger was generated."]
            _0,
            #[doc = "A channel trigger was generated."]
            _1,
        }
        impl TRIGFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRIGFR::_0 => false,
                    TRIGFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRIGFR {
                match value {
                    false => TRIGFR::_0,
                    true => TRIGFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRIGFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRIGFR::_1
            }
        }
        #[doc = "Possible values of the field `CH6TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH6TRIGR {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH6TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH6TRIGR::_0 => false,
                    CH6TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH6TRIGR {
                match value {
                    false => CH6TRIGR::_0,
                    true => CH6TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH6TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH6TRIGR::_1
            }
        }
        #[doc = "Possible values of the field `CH7TRIG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH7TRIGR {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH7TRIGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH7TRIGR::_0 => false,
                    CH7TRIGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH7TRIGR {
                match value {
                    false => CH7TRIGR::_0,
                    true => CH7TRIGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH7TRIGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH7TRIGR::_1
            }
        }
        #[doc = "Values that can be written to the field `CH2TRIG`"]
        pub enum CH2TRIGW {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH2TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH2TRIGW::_0 => false,
                    CH2TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH2TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH2TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH2TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The generation of this external trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH2TRIGW::_0)
            }
            #[doc = "The generation of this external trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH2TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH3TRIG`"]
        pub enum CH3TRIGW {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH3TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH3TRIGW::_0 => false,
                    CH3TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH3TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH3TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH3TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The generation of this external trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH3TRIGW::_0)
            }
            #[doc = "The generation of this external trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH3TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH4TRIG`"]
        pub enum CH4TRIGW {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH4TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH4TRIGW::_0 => false,
                    CH4TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH4TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH4TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH4TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The generation of this external trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH4TRIGW::_0)
            }
            #[doc = "The generation of this external trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH4TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH5TRIG`"]
        pub enum CH5TRIGW {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH5TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH5TRIGW::_0 => false,
                    CH5TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH5TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH5TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH5TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The generation of this external trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH5TRIGW::_0)
            }
            #[doc = "The generation of this external trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH5TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH0TRIG`"]
        pub enum CH0TRIGW {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH0TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH0TRIGW::_0 => false,
                    CH0TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH0TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH0TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH0TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The generation of this external trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH0TRIGW::_0)
            }
            #[doc = "The generation of this external trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH0TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH1TRIG`"]
        pub enum CH1TRIGW {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH1TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH1TRIGW::_0 => false,
                    CH1TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH1TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH1TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH1TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The generation of this external trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH1TRIGW::_0)
            }
            #[doc = "The generation of this external trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH1TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INITTRIGEN`"]
        pub enum INITTRIGENW {
            #[doc = "The generation of initialization trigger is disabled."]
            _0,
            #[doc = "The generation of initialization trigger is enabled."]
            _1,
        }
        impl INITTRIGENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INITTRIGENW::_0 => false,
                    INITTRIGENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INITTRIGENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INITTRIGENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INITTRIGENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The generation of initialization trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INITTRIGENW::_0)
            }
            #[doc = "The generation of initialization trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INITTRIGENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH6TRIG`"]
        pub enum CH6TRIGW {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH6TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH6TRIGW::_0 => false,
                    CH6TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH6TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH6TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH6TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The generation of this external trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH6TRIGW::_0)
            }
            #[doc = "The generation of this external trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH6TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH7TRIG`"]
        pub enum CH7TRIGW {
            #[doc = "The generation of this external trigger is disabled."]
            _0,
            #[doc = "The generation of this external trigger is enabled."]
            _1,
        }
        impl CH7TRIGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH7TRIGW::_0 => false,
                    CH7TRIGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH7TRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH7TRIGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH7TRIGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The generation of this external trigger is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH7TRIGW::_0)
            }
            #[doc = "The generation of this external trigger is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH7TRIGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Channel 2 External Trigger Enable"]
            #[inline(always)]
            pub fn ch2trig(&self) -> CH2TRIGR {
                CH2TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Channel 3 External Trigger Enable"]
            #[inline(always)]
            pub fn ch3trig(&self) -> CH3TRIGR {
                CH3TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel 4 External Trigger Enable"]
            #[inline(always)]
            pub fn ch4trig(&self) -> CH4TRIGR {
                CH4TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Channel 5 External Trigger Enable"]
            #[inline(always)]
            pub fn ch5trig(&self) -> CH5TRIGR {
                CH5TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Channel 0 External Trigger Enable"]
            #[inline(always)]
            pub fn ch0trig(&self) -> CH0TRIGR {
                CH0TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Channel 1 External Trigger Enable"]
            #[inline(always)]
            pub fn ch1trig(&self) -> CH1TRIGR {
                CH1TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Initialization Trigger Enable"]
            #[inline(always)]
            pub fn inittrigen(&self) -> INITTRIGENR {
                INITTRIGENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel Trigger Flag"]
            #[inline(always)]
            pub fn trigf(&self) -> TRIGFR {
                TRIGFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Channel 6 External Trigger Enable"]
            #[inline(always)]
            pub fn ch6trig(&self) -> CH6TRIGR {
                CH6TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Channel 7 External Trigger Enable"]
            #[inline(always)]
            pub fn ch7trig(&self) -> CH7TRIGR {
                CH7TRIGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Channel 2 External Trigger Enable"]
            #[inline(always)]
            pub fn ch2trig(&mut self) -> _CH2TRIGW {
                _CH2TRIGW { w: self }
            }
            #[doc = "Bit 1 - Channel 3 External Trigger Enable"]
            #[inline(always)]
            pub fn ch3trig(&mut self) -> _CH3TRIGW {
                _CH3TRIGW { w: self }
            }
            #[doc = "Bit 2 - Channel 4 External Trigger Enable"]
            #[inline(always)]
            pub fn ch4trig(&mut self) -> _CH4TRIGW {
                _CH4TRIGW { w: self }
            }
            #[doc = "Bit 3 - Channel 5 External Trigger Enable"]
            #[inline(always)]
            pub fn ch5trig(&mut self) -> _CH5TRIGW {
                _CH5TRIGW { w: self }
            }
            #[doc = "Bit 4 - Channel 0 External Trigger Enable"]
            #[inline(always)]
            pub fn ch0trig(&mut self) -> _CH0TRIGW {
                _CH0TRIGW { w: self }
            }
            #[doc = "Bit 5 - Channel 1 External Trigger Enable"]
            #[inline(always)]
            pub fn ch1trig(&mut self) -> _CH1TRIGW {
                _CH1TRIGW { w: self }
            }
            #[doc = "Bit 6 - Initialization Trigger Enable"]
            #[inline(always)]
            pub fn inittrigen(&mut self) -> _INITTRIGENW {
                _INITTRIGENW { w: self }
            }
            #[doc = "Bit 8 - Channel 6 External Trigger Enable"]
            #[inline(always)]
            pub fn ch6trig(&mut self) -> _CH6TRIGW {
                _CH6TRIGW { w: self }
            }
            #[doc = "Bit 9 - Channel 7 External Trigger Enable"]
            #[inline(always)]
            pub fn ch7trig(&mut self) -> _CH7TRIGW {
                _CH7TRIGW { w: self }
            }
        }
    }
    #[doc = "Channels Polarity"]
    pub struct POL {
        register: VolatileCell<u32>,
    }
    #[doc = "Channels Polarity"]
    pub mod pol {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::POL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `POL0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum POL0R {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    POL0R::_0 => false,
                    POL0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> POL0R {
                match value {
                    false => POL0R::_0,
                    true => POL0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == POL0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == POL0R::_1
            }
        }
        #[doc = "Possible values of the field `POL1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum POL1R {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    POL1R::_0 => false,
                    POL1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> POL1R {
                match value {
                    false => POL1R::_0,
                    true => POL1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == POL1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == POL1R::_1
            }
        }
        #[doc = "Possible values of the field `POL2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum POL2R {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    POL2R::_0 => false,
                    POL2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> POL2R {
                match value {
                    false => POL2R::_0,
                    true => POL2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == POL2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == POL2R::_1
            }
        }
        #[doc = "Possible values of the field `POL3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum POL3R {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    POL3R::_0 => false,
                    POL3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> POL3R {
                match value {
                    false => POL3R::_0,
                    true => POL3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == POL3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == POL3R::_1
            }
        }
        #[doc = "Possible values of the field `POL4`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum POL4R {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL4R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    POL4R::_0 => false,
                    POL4R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> POL4R {
                match value {
                    false => POL4R::_0,
                    true => POL4R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == POL4R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == POL4R::_1
            }
        }
        #[doc = "Possible values of the field `POL5`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum POL5R {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL5R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    POL5R::_0 => false,
                    POL5R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> POL5R {
                match value {
                    false => POL5R::_0,
                    true => POL5R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == POL5R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == POL5R::_1
            }
        }
        #[doc = "Possible values of the field `POL6`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum POL6R {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL6R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    POL6R::_0 => false,
                    POL6R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> POL6R {
                match value {
                    false => POL6R::_0,
                    true => POL6R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == POL6R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == POL6R::_1
            }
        }
        #[doc = "Possible values of the field `POL7`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum POL7R {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL7R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    POL7R::_0 => false,
                    POL7R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> POL7R {
                match value {
                    false => POL7R::_0,
                    true => POL7R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == POL7R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == POL7R::_1
            }
        }
        #[doc = "Values that can be written to the field `POL0`"]
        pub enum POL0W {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    POL0W::_0 => false,
                    POL0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _POL0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _POL0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: POL0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel polarity is active high."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(POL0W::_0)
            }
            #[doc = "The channel polarity is active low."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(POL0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `POL1`"]
        pub enum POL1W {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    POL1W::_0 => false,
                    POL1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _POL1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _POL1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: POL1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel polarity is active high."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(POL1W::_0)
            }
            #[doc = "The channel polarity is active low."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(POL1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `POL2`"]
        pub enum POL2W {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    POL2W::_0 => false,
                    POL2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _POL2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _POL2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: POL2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel polarity is active high."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(POL2W::_0)
            }
            #[doc = "The channel polarity is active low."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(POL2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `POL3`"]
        pub enum POL3W {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    POL3W::_0 => false,
                    POL3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _POL3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _POL3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: POL3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel polarity is active high."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(POL3W::_0)
            }
            #[doc = "The channel polarity is active low."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(POL3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `POL4`"]
        pub enum POL4W {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL4W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    POL4W::_0 => false,
                    POL4W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _POL4W<'a> {
            w: &'a mut W,
        }
        impl<'a> _POL4W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: POL4W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel polarity is active high."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(POL4W::_0)
            }
            #[doc = "The channel polarity is active low."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(POL4W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `POL5`"]
        pub enum POL5W {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL5W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    POL5W::_0 => false,
                    POL5W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _POL5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _POL5W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: POL5W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel polarity is active high."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(POL5W::_0)
            }
            #[doc = "The channel polarity is active low."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(POL5W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `POL6`"]
        pub enum POL6W {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL6W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    POL6W::_0 => false,
                    POL6W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _POL6W<'a> {
            w: &'a mut W,
        }
        impl<'a> _POL6W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: POL6W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel polarity is active high."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(POL6W::_0)
            }
            #[doc = "The channel polarity is active low."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(POL6W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `POL7`"]
        pub enum POL7W {
            #[doc = "The channel polarity is active high."]
            _0,
            #[doc = "The channel polarity is active low."]
            _1,
        }
        impl POL7W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    POL7W::_0 => false,
                    POL7W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _POL7W<'a> {
            w: &'a mut W,
        }
        impl<'a> _POL7W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: POL7W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel polarity is active high."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(POL7W::_0)
            }
            #[doc = "The channel polarity is active low."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(POL7W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Channel 0 Polarity"]
            #[inline(always)]
            pub fn pol0(&self) -> POL0R {
                POL0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Channel 1 Polarity"]
            #[inline(always)]
            pub fn pol1(&self) -> POL1R {
                POL1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel 2 Polarity"]
            #[inline(always)]
            pub fn pol2(&self) -> POL2R {
                POL2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Channel 3 Polarity"]
            #[inline(always)]
            pub fn pol3(&self) -> POL3R {
                POL3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Channel 4 Polarity"]
            #[inline(always)]
            pub fn pol4(&self) -> POL4R {
                POL4R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Channel 5 Polarity"]
            #[inline(always)]
            pub fn pol5(&self) -> POL5R {
                POL5R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Channel 6 Polarity"]
            #[inline(always)]
            pub fn pol6(&self) -> POL6R {
                POL6R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel 7 Polarity"]
            #[inline(always)]
            pub fn pol7(&self) -> POL7R {
                POL7R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Channel 0 Polarity"]
            #[inline(always)]
            pub fn pol0(&mut self) -> _POL0W {
                _POL0W { w: self }
            }
            #[doc = "Bit 1 - Channel 1 Polarity"]
            #[inline(always)]
            pub fn pol1(&mut self) -> _POL1W {
                _POL1W { w: self }
            }
            #[doc = "Bit 2 - Channel 2 Polarity"]
            #[inline(always)]
            pub fn pol2(&mut self) -> _POL2W {
                _POL2W { w: self }
            }
            #[doc = "Bit 3 - Channel 3 Polarity"]
            #[inline(always)]
            pub fn pol3(&mut self) -> _POL3W {
                _POL3W { w: self }
            }
            #[doc = "Bit 4 - Channel 4 Polarity"]
            #[inline(always)]
            pub fn pol4(&mut self) -> _POL4W {
                _POL4W { w: self }
            }
            #[doc = "Bit 5 - Channel 5 Polarity"]
            #[inline(always)]
            pub fn pol5(&mut self) -> _POL5W {
                _POL5W { w: self }
            }
            #[doc = "Bit 6 - Channel 6 Polarity"]
            #[inline(always)]
            pub fn pol6(&mut self) -> _POL6W {
                _POL6W { w: self }
            }
            #[doc = "Bit 7 - Channel 7 Polarity"]
            #[inline(always)]
            pub fn pol7(&mut self) -> _POL7W {
                _POL7W { w: self }
            }
        }
    }
    #[doc = "Fault Mode Status"]
    pub struct FMS {
        register: VolatileCell<u32>,
    }
    #[doc = "Fault Mode Status"]
    pub mod fms {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FMS {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `FAULTF0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTF0R {
            #[doc = "No fault condition was detected at the fault input."]
            _0,
            #[doc = "A fault condition was detected at the fault input."]
            _1,
        }
        impl FAULTF0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTF0R::_0 => false,
                    FAULTF0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTF0R {
                match value {
                    false => FAULTF0R::_0,
                    true => FAULTF0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTF0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTF0R::_1
            }
        }
        #[doc = "Possible values of the field `FAULTF1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTF1R {
            #[doc = "No fault condition was detected at the fault input."]
            _0,
            #[doc = "A fault condition was detected at the fault input."]
            _1,
        }
        impl FAULTF1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTF1R::_0 => false,
                    FAULTF1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTF1R {
                match value {
                    false => FAULTF1R::_0,
                    true => FAULTF1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTF1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTF1R::_1
            }
        }
        #[doc = "Possible values of the field `FAULTF2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTF2R {
            #[doc = "No fault condition was detected at the fault input."]
            _0,
            #[doc = "A fault condition was detected at the fault input."]
            _1,
        }
        impl FAULTF2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTF2R::_0 => false,
                    FAULTF2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTF2R {
                match value {
                    false => FAULTF2R::_0,
                    true => FAULTF2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTF2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTF2R::_1
            }
        }
        #[doc = "Possible values of the field `FAULTF3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTF3R {
            #[doc = "No fault condition was detected at the fault input."]
            _0,
            #[doc = "A fault condition was detected at the fault input."]
            _1,
        }
        impl FAULTF3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTF3R::_0 => false,
                    FAULTF3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTF3R {
                match value {
                    false => FAULTF3R::_0,
                    true => FAULTF3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTF3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTF3R::_1
            }
        }
        #[doc = "Possible values of the field `FAULTIN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTINR {
            #[doc = "The logic OR of the enabled fault inputs is 0."]
            _0,
            #[doc = "The logic OR of the enabled fault inputs is 1."]
            _1,
        }
        impl FAULTINR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTINR::_0 => false,
                    FAULTINR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTINR {
                match value {
                    false => FAULTINR::_0,
                    true => FAULTINR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTINR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTINR::_1
            }
        }
        #[doc = "Possible values of the field `WPEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WPENR {
            #[doc = "Write protection is disabled. Write protected bits can be written."]
            _0,
            #[doc = "Write protection is enabled. Write protected bits cannot be written."]
            _1,
        }
        impl WPENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WPENR::_0 => false,
                    WPENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WPENR {
                match value {
                    false => WPENR::_0,
                    true => WPENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WPENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WPENR::_1
            }
        }
        #[doc = "Possible values of the field `FAULTF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULTFR {
            #[doc = "No fault condition was detected."]
            _0,
            #[doc = "A fault condition was detected."]
            _1,
        }
        impl FAULTFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULTFR::_0 => false,
                    FAULTFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULTFR {
                match value {
                    false => FAULTFR::_0,
                    true => FAULTFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULTFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULTFR::_1
            }
        }
        #[doc = "Values that can be written to the field `WPEN`"]
        pub enum WPENW {
            #[doc = "Write protection is disabled. Write protected bits can be written."]
            _0,
            #[doc = "Write protection is enabled. Write protected bits cannot be written."]
            _1,
        }
        impl WPENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WPENW::_0 => false,
                    WPENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WPENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WPENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WPENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Write protection is disabled. Write protected bits can be written."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WPENW::_0)
            }
            #[doc = "Write protection is enabled. Write protected bits cannot be written."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WPENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Fault Detection Flag 0"]
            #[inline(always)]
            pub fn faultf0(&self) -> FAULTF0R {
                FAULTF0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Fault Detection Flag 1"]
            #[inline(always)]
            pub fn faultf1(&self) -> FAULTF1R {
                FAULTF1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Fault Detection Flag 2"]
            #[inline(always)]
            pub fn faultf2(&self) -> FAULTF2R {
                FAULTF2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Fault Detection Flag 3"]
            #[inline(always)]
            pub fn faultf3(&self) -> FAULTF3R {
                FAULTF3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Fault Inputs"]
            #[inline(always)]
            pub fn faultin(&self) -> FAULTINR {
                FAULTINR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Write Protection Enable"]
            #[inline(always)]
            pub fn wpen(&self) -> WPENR {
                WPENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Fault Detection Flag"]
            #[inline(always)]
            pub fn faultf(&self) -> FAULTFR {
                FAULTFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 6 - Write Protection Enable"]
            #[inline(always)]
            pub fn wpen(&mut self) -> _WPENW {
                _WPENW { w: self }
            }
        }
    }
    #[doc = "Input Capture Filter Control"]
    pub struct FILTER {
        register: VolatileCell<u32>,
    }
    #[doc = "Input Capture Filter Control"]
    pub mod filter {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FILTER {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CH0FVALR {
            bits: u8,
        }
        impl CH0FVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct CH1FVALR {
            bits: u8,
        }
        impl CH1FVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct CH2FVALR {
            bits: u8,
        }
        impl CH2FVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct CH3FVALR {
            bits: u8,
        }
        impl CH3FVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH0FVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH0FVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH1FVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH1FVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH2FVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH2FVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH3FVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH3FVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:3 - Channel 0 Input Filter"]
            #[inline(always)]
            pub fn ch0fval(&self) -> CH0FVALR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CH0FVALR { bits }
            }
            #[doc = "Bits 4:7 - Channel 1 Input Filter"]
            #[inline(always)]
            pub fn ch1fval(&self) -> CH1FVALR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CH1FVALR { bits }
            }
            #[doc = "Bits 8:11 - Channel 2 Input Filter"]
            #[inline(always)]
            pub fn ch2fval(&self) -> CH2FVALR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CH2FVALR { bits }
            }
            #[doc = "Bits 12:15 - Channel 3 Input Filter"]
            #[inline(always)]
            pub fn ch3fval(&self) -> CH3FVALR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CH3FVALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Channel 0 Input Filter"]
            #[inline(always)]
            pub fn ch0fval(&mut self) -> _CH0FVALW {
                _CH0FVALW { w: self }
            }
            #[doc = "Bits 4:7 - Channel 1 Input Filter"]
            #[inline(always)]
            pub fn ch1fval(&mut self) -> _CH1FVALW {
                _CH1FVALW { w: self }
            }
            #[doc = "Bits 8:11 - Channel 2 Input Filter"]
            #[inline(always)]
            pub fn ch2fval(&mut self) -> _CH2FVALW {
                _CH2FVALW { w: self }
            }
            #[doc = "Bits 12:15 - Channel 3 Input Filter"]
            #[inline(always)]
            pub fn ch3fval(&mut self) -> _CH3FVALW {
                _CH3FVALW { w: self }
            }
        }
    }
    #[doc = "Fault Control"]
    pub struct FLTCTRL {
        register: VolatileCell<u32>,
    }
    #[doc = "Fault Control"]
    pub mod fltctrl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FLTCTRL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `FAULT0EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULT0ENR {
            #[doc = "Fault input is disabled."]
            _0,
            #[doc = "Fault input is enabled."]
            _1,
        }
        impl FAULT0ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULT0ENR::_0 => false,
                    FAULT0ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULT0ENR {
                match value {
                    false => FAULT0ENR::_0,
                    true => FAULT0ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULT0ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULT0ENR::_1
            }
        }
        #[doc = "Possible values of the field `FAULT1EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULT1ENR {
            #[doc = "Fault input is disabled."]
            _0,
            #[doc = "Fault input is enabled."]
            _1,
        }
        impl FAULT1ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULT1ENR::_0 => false,
                    FAULT1ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULT1ENR {
                match value {
                    false => FAULT1ENR::_0,
                    true => FAULT1ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULT1ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULT1ENR::_1
            }
        }
        #[doc = "Possible values of the field `FAULT2EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULT2ENR {
            #[doc = "Fault input is disabled."]
            _0,
            #[doc = "Fault input is enabled."]
            _1,
        }
        impl FAULT2ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULT2ENR::_0 => false,
                    FAULT2ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULT2ENR {
                match value {
                    false => FAULT2ENR::_0,
                    true => FAULT2ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULT2ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULT2ENR::_1
            }
        }
        #[doc = "Possible values of the field `FAULT3EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FAULT3ENR {
            #[doc = "Fault input is disabled."]
            _0,
            #[doc = "Fault input is enabled."]
            _1,
        }
        impl FAULT3ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FAULT3ENR::_0 => false,
                    FAULT3ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FAULT3ENR {
                match value {
                    false => FAULT3ENR::_0,
                    true => FAULT3ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FAULT3ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FAULT3ENR::_1
            }
        }
        #[doc = "Possible values of the field `FFLTR0EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FFLTR0ENR {
            #[doc = "Fault input filter is disabled."]
            _0,
            #[doc = "Fault input filter is enabled."]
            _1,
        }
        impl FFLTR0ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FFLTR0ENR::_0 => false,
                    FFLTR0ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FFLTR0ENR {
                match value {
                    false => FFLTR0ENR::_0,
                    true => FFLTR0ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FFLTR0ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FFLTR0ENR::_1
            }
        }
        #[doc = "Possible values of the field `FFLTR1EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FFLTR1ENR {
            #[doc = "Fault input filter is disabled."]
            _0,
            #[doc = "Fault input filter is enabled."]
            _1,
        }
        impl FFLTR1ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FFLTR1ENR::_0 => false,
                    FFLTR1ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FFLTR1ENR {
                match value {
                    false => FFLTR1ENR::_0,
                    true => FFLTR1ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FFLTR1ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FFLTR1ENR::_1
            }
        }
        #[doc = "Possible values of the field `FFLTR2EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FFLTR2ENR {
            #[doc = "Fault input filter is disabled."]
            _0,
            #[doc = "Fault input filter is enabled."]
            _1,
        }
        impl FFLTR2ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FFLTR2ENR::_0 => false,
                    FFLTR2ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FFLTR2ENR {
                match value {
                    false => FFLTR2ENR::_0,
                    true => FFLTR2ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FFLTR2ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FFLTR2ENR::_1
            }
        }
        #[doc = "Possible values of the field `FFLTR3EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FFLTR3ENR {
            #[doc = "Fault input filter is disabled."]
            _0,
            #[doc = "Fault input filter is enabled."]
            _1,
        }
        impl FFLTR3ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FFLTR3ENR::_0 => false,
                    FFLTR3ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FFLTR3ENR {
                match value {
                    false => FFLTR3ENR::_0,
                    true => FFLTR3ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FFLTR3ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FFLTR3ENR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct FFVALR {
            bits: u8,
        }
        impl FFVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `FSTATE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FSTATER {
            #[doc = "FTM outputs will be placed into safe values when fault events in ongoing (defined by POL bits)."]
            _0,
            #[doc = "FTM outputs will be tri-stated when fault event is ongoing"]
            _1,
        }
        impl FSTATER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FSTATER::_0 => false,
                    FSTATER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FSTATER {
                match value {
                    false => FSTATER::_0,
                    true => FSTATER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FSTATER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FSTATER::_1
            }
        }
        #[doc = "Values that can be written to the field `FAULT0EN`"]
        pub enum FAULT0ENW {
            #[doc = "Fault input is disabled."]
            _0,
            #[doc = "Fault input is enabled."]
            _1,
        }
        impl FAULT0ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FAULT0ENW::_0 => false,
                    FAULT0ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FAULT0ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FAULT0ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FAULT0ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Fault input is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FAULT0ENW::_0)
            }
            #[doc = "Fault input is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FAULT0ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FAULT1EN`"]
        pub enum FAULT1ENW {
            #[doc = "Fault input is disabled."]
            _0,
            #[doc = "Fault input is enabled."]
            _1,
        }
        impl FAULT1ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FAULT1ENW::_0 => false,
                    FAULT1ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FAULT1ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FAULT1ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FAULT1ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Fault input is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FAULT1ENW::_0)
            }
            #[doc = "Fault input is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FAULT1ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FAULT2EN`"]
        pub enum FAULT2ENW {
            #[doc = "Fault input is disabled."]
            _0,
            #[doc = "Fault input is enabled."]
            _1,
        }
        impl FAULT2ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FAULT2ENW::_0 => false,
                    FAULT2ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FAULT2ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FAULT2ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FAULT2ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Fault input is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FAULT2ENW::_0)
            }
            #[doc = "Fault input is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FAULT2ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FAULT3EN`"]
        pub enum FAULT3ENW {
            #[doc = "Fault input is disabled."]
            _0,
            #[doc = "Fault input is enabled."]
            _1,
        }
        impl FAULT3ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FAULT3ENW::_0 => false,
                    FAULT3ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FAULT3ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FAULT3ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FAULT3ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Fault input is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FAULT3ENW::_0)
            }
            #[doc = "Fault input is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FAULT3ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FFLTR0EN`"]
        pub enum FFLTR0ENW {
            #[doc = "Fault input filter is disabled."]
            _0,
            #[doc = "Fault input filter is enabled."]
            _1,
        }
        impl FFLTR0ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FFLTR0ENW::_0 => false,
                    FFLTR0ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FFLTR0ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FFLTR0ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FFLTR0ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Fault input filter is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FFLTR0ENW::_0)
            }
            #[doc = "Fault input filter is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FFLTR0ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FFLTR1EN`"]
        pub enum FFLTR1ENW {
            #[doc = "Fault input filter is disabled."]
            _0,
            #[doc = "Fault input filter is enabled."]
            _1,
        }
        impl FFLTR1ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FFLTR1ENW::_0 => false,
                    FFLTR1ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FFLTR1ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FFLTR1ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FFLTR1ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Fault input filter is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FFLTR1ENW::_0)
            }
            #[doc = "Fault input filter is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FFLTR1ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FFLTR2EN`"]
        pub enum FFLTR2ENW {
            #[doc = "Fault input filter is disabled."]
            _0,
            #[doc = "Fault input filter is enabled."]
            _1,
        }
        impl FFLTR2ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FFLTR2ENW::_0 => false,
                    FFLTR2ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FFLTR2ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FFLTR2ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FFLTR2ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Fault input filter is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FFLTR2ENW::_0)
            }
            #[doc = "Fault input filter is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FFLTR2ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FFLTR3EN`"]
        pub enum FFLTR3ENW {
            #[doc = "Fault input filter is disabled."]
            _0,
            #[doc = "Fault input filter is enabled."]
            _1,
        }
        impl FFLTR3ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FFLTR3ENW::_0 => false,
                    FFLTR3ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FFLTR3ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FFLTR3ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FFLTR3ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Fault input filter is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FFLTR3ENW::_0)
            }
            #[doc = "Fault input filter is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FFLTR3ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _FFVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FFVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FSTATE`"]
        pub enum FSTATEW {
            #[doc = "FTM outputs will be placed into safe values when fault events in ongoing (defined by POL bits)."]
            _0,
            #[doc = "FTM outputs will be tri-stated when fault event is ongoing"]
            _1,
        }
        impl FSTATEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FSTATEW::_0 => false,
                    FSTATEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FSTATEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FSTATEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FSTATEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM outputs will be placed into safe values when fault events in ongoing (defined by POL bits)."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FSTATEW::_0)
            }
            #[doc = "FTM outputs will be tri-stated when fault event is ongoing"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FSTATEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Fault Input 0 Enable"]
            #[inline(always)]
            pub fn fault0en(&self) -> FAULT0ENR {
                FAULT0ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Fault Input 1 Enable"]
            #[inline(always)]
            pub fn fault1en(&self) -> FAULT1ENR {
                FAULT1ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Fault Input 2 Enable"]
            #[inline(always)]
            pub fn fault2en(&self) -> FAULT2ENR {
                FAULT2ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Fault Input 3 Enable"]
            #[inline(always)]
            pub fn fault3en(&self) -> FAULT3ENR {
                FAULT3ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Fault Input 0 Filter Enable"]
            #[inline(always)]
            pub fn ffltr0en(&self) -> FFLTR0ENR {
                FFLTR0ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Fault Input 1 Filter Enable"]
            #[inline(always)]
            pub fn ffltr1en(&self) -> FFLTR1ENR {
                FFLTR1ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Fault Input 2 Filter Enable"]
            #[inline(always)]
            pub fn ffltr2en(&self) -> FFLTR2ENR {
                FFLTR2ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Fault Input 3 Filter Enable"]
            #[inline(always)]
            pub fn ffltr3en(&self) -> FFLTR3ENR {
                FFLTR3ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:11 - Fault Input Filter"]
            #[inline(always)]
            pub fn ffval(&self) -> FFVALR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                FFVALR { bits }
            }
            #[doc = "Bit 15 - Fault output state"]
            #[inline(always)]
            pub fn fstate(&self) -> FSTATER {
                FSTATER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Fault Input 0 Enable"]
            #[inline(always)]
            pub fn fault0en(&mut self) -> _FAULT0ENW {
                _FAULT0ENW { w: self }
            }
            #[doc = "Bit 1 - Fault Input 1 Enable"]
            #[inline(always)]
            pub fn fault1en(&mut self) -> _FAULT1ENW {
                _FAULT1ENW { w: self }
            }
            #[doc = "Bit 2 - Fault Input 2 Enable"]
            #[inline(always)]
            pub fn fault2en(&mut self) -> _FAULT2ENW {
                _FAULT2ENW { w: self }
            }
            #[doc = "Bit 3 - Fault Input 3 Enable"]
            #[inline(always)]
            pub fn fault3en(&mut self) -> _FAULT3ENW {
                _FAULT3ENW { w: self }
            }
            #[doc = "Bit 4 - Fault Input 0 Filter Enable"]
            #[inline(always)]
            pub fn ffltr0en(&mut self) -> _FFLTR0ENW {
                _FFLTR0ENW { w: self }
            }
            #[doc = "Bit 5 - Fault Input 1 Filter Enable"]
            #[inline(always)]
            pub fn ffltr1en(&mut self) -> _FFLTR1ENW {
                _FFLTR1ENW { w: self }
            }
            #[doc = "Bit 6 - Fault Input 2 Filter Enable"]
            #[inline(always)]
            pub fn ffltr2en(&mut self) -> _FFLTR2ENW {
                _FFLTR2ENW { w: self }
            }
            #[doc = "Bit 7 - Fault Input 3 Filter Enable"]
            #[inline(always)]
            pub fn ffltr3en(&mut self) -> _FFLTR3ENW {
                _FFLTR3ENW { w: self }
            }
            #[doc = "Bits 8:11 - Fault Input Filter"]
            #[inline(always)]
            pub fn ffval(&mut self) -> _FFVALW {
                _FFVALW { w: self }
            }
            #[doc = "Bit 15 - Fault output state"]
            #[inline(always)]
            pub fn fstate(&mut self) -> _FSTATEW {
                _FSTATEW { w: self }
            }
        }
    }
    #[doc = "Quadrature Decoder Control And Status"]
    pub struct QDCTRL {
        register: VolatileCell<u32>,
    }
    #[doc = "Quadrature Decoder Control And Status"]
    pub mod qdctrl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::QDCTRL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `QUADEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum QUADENR {
            #[doc = "Quadrature Decoder mode is disabled."]
            _0,
            #[doc = "Quadrature Decoder mode is enabled."]
            _1,
        }
        impl QUADENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    QUADENR::_0 => false,
                    QUADENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> QUADENR {
                match value {
                    false => QUADENR::_0,
                    true => QUADENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == QUADENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == QUADENR::_1
            }
        }
        #[doc = "Possible values of the field `TOFDIR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TOFDIRR {
            #[doc = "TOF bit was set on the bottom of counting. There was an FTM counter decrement and FTM counter changes from its minimum value (CNTIN register) to its maximum value (MOD register)."]
            _0,
            #[doc = "TOF bit was set on the top of counting. There was an FTM counter increment and FTM counter changes from its maximum value (MOD register) to its minimum value (CNTIN register)."]
            _1,
        }
        impl TOFDIRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TOFDIRR::_0 => false,
                    TOFDIRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TOFDIRR {
                match value {
                    false => TOFDIRR::_0,
                    true => TOFDIRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TOFDIRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TOFDIRR::_1
            }
        }
        #[doc = "Possible values of the field `QUADIR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum QUADIRR {
            #[doc = "Counting direction is decreasing (FTM counter decrement)."]
            _0,
            #[doc = "Counting direction is increasing (FTM counter increment)."]
            _1,
        }
        impl QUADIRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    QUADIRR::_0 => false,
                    QUADIRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> QUADIRR {
                match value {
                    false => QUADIRR::_0,
                    true => QUADIRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == QUADIRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == QUADIRR::_1
            }
        }
        #[doc = "Possible values of the field `QUADMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum QUADMODER {
            #[doc = "Phase A and phase B encoding mode."]
            _0,
            #[doc = "Count and direction encoding mode."]
            _1,
        }
        impl QUADMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    QUADMODER::_0 => false,
                    QUADMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> QUADMODER {
                match value {
                    false => QUADMODER::_0,
                    true => QUADMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == QUADMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == QUADMODER::_1
            }
        }
        #[doc = "Possible values of the field `PHBPOL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PHBPOLR {
            #[doc = "Normal polarity. Phase B input signal is not inverted before identifying the rising and falling edges of this signal."]
            _0,
            #[doc = "Inverted polarity. Phase B input signal is inverted before identifying the rising and falling edges of this signal."]
            _1,
        }
        impl PHBPOLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PHBPOLR::_0 => false,
                    PHBPOLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PHBPOLR {
                match value {
                    false => PHBPOLR::_0,
                    true => PHBPOLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PHBPOLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PHBPOLR::_1
            }
        }
        #[doc = "Possible values of the field `PHAPOL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PHAPOLR {
            #[doc = "Normal polarity. Phase A input signal is not inverted before identifying the rising and falling edges of this signal."]
            _0,
            #[doc = "Inverted polarity. Phase A input signal is inverted before identifying the rising and falling edges of this signal."]
            _1,
        }
        impl PHAPOLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PHAPOLR::_0 => false,
                    PHAPOLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PHAPOLR {
                match value {
                    false => PHAPOLR::_0,
                    true => PHAPOLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PHAPOLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PHAPOLR::_1
            }
        }
        #[doc = "Possible values of the field `PHBFLTREN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PHBFLTRENR {
            #[doc = "Phase B input filter is disabled."]
            _0,
            #[doc = "Phase B input filter is enabled."]
            _1,
        }
        impl PHBFLTRENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PHBFLTRENR::_0 => false,
                    PHBFLTRENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PHBFLTRENR {
                match value {
                    false => PHBFLTRENR::_0,
                    true => PHBFLTRENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PHBFLTRENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PHBFLTRENR::_1
            }
        }
        #[doc = "Possible values of the field `PHAFLTREN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PHAFLTRENR {
            #[doc = "Phase A input filter is disabled."]
            _0,
            #[doc = "Phase A input filter is enabled."]
            _1,
        }
        impl PHAFLTRENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PHAFLTRENR::_0 => false,
                    PHAFLTRENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PHAFLTRENR {
                match value {
                    false => PHAFLTRENR::_0,
                    true => PHAFLTRENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PHAFLTRENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PHAFLTRENR::_1
            }
        }
        #[doc = "Values that can be written to the field `QUADEN`"]
        pub enum QUADENW {
            #[doc = "Quadrature Decoder mode is disabled."]
            _0,
            #[doc = "Quadrature Decoder mode is enabled."]
            _1,
        }
        impl QUADENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    QUADENW::_0 => false,
                    QUADENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _QUADENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _QUADENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: QUADENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Quadrature Decoder mode is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(QUADENW::_0)
            }
            #[doc = "Quadrature Decoder mode is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(QUADENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `QUADMODE`"]
        pub enum QUADMODEW {
            #[doc = "Phase A and phase B encoding mode."]
            _0,
            #[doc = "Count and direction encoding mode."]
            _1,
        }
        impl QUADMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    QUADMODEW::_0 => false,
                    QUADMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _QUADMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _QUADMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: QUADMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Phase A and phase B encoding mode."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(QUADMODEW::_0)
            }
            #[doc = "Count and direction encoding mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(QUADMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PHBPOL`"]
        pub enum PHBPOLW {
            #[doc = "Normal polarity. Phase B input signal is not inverted before identifying the rising and falling edges of this signal."]
            _0,
            #[doc = "Inverted polarity. Phase B input signal is inverted before identifying the rising and falling edges of this signal."]
            _1,
        }
        impl PHBPOLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PHBPOLW::_0 => false,
                    PHBPOLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PHBPOLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PHBPOLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PHBPOLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Normal polarity. Phase B input signal is not inverted before identifying the rising and falling edges of this signal."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PHBPOLW::_0)
            }
            #[doc = "Inverted polarity. Phase B input signal is inverted before identifying the rising and falling edges of this signal."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PHBPOLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PHAPOL`"]
        pub enum PHAPOLW {
            #[doc = "Normal polarity. Phase A input signal is not inverted before identifying the rising and falling edges of this signal."]
            _0,
            #[doc = "Inverted polarity. Phase A input signal is inverted before identifying the rising and falling edges of this signal."]
            _1,
        }
        impl PHAPOLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PHAPOLW::_0 => false,
                    PHAPOLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PHAPOLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PHAPOLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PHAPOLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Normal polarity. Phase A input signal is not inverted before identifying the rising and falling edges of this signal."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PHAPOLW::_0)
            }
            #[doc = "Inverted polarity. Phase A input signal is inverted before identifying the rising and falling edges of this signal."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PHAPOLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PHBFLTREN`"]
        pub enum PHBFLTRENW {
            #[doc = "Phase B input filter is disabled."]
            _0,
            #[doc = "Phase B input filter is enabled."]
            _1,
        }
        impl PHBFLTRENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PHBFLTRENW::_0 => false,
                    PHBFLTRENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PHBFLTRENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PHBFLTRENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PHBFLTRENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Phase B input filter is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PHBFLTRENW::_0)
            }
            #[doc = "Phase B input filter is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PHBFLTRENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PHAFLTREN`"]
        pub enum PHAFLTRENW {
            #[doc = "Phase A input filter is disabled."]
            _0,
            #[doc = "Phase A input filter is enabled."]
            _1,
        }
        impl PHAFLTRENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PHAFLTRENW::_0 => false,
                    PHAFLTRENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PHAFLTRENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PHAFLTRENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PHAFLTRENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Phase A input filter is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PHAFLTRENW::_0)
            }
            #[doc = "Phase A input filter is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PHAFLTRENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Quadrature Decoder Mode Enable"]
            #[inline(always)]
            pub fn quaden(&self) -> QUADENR {
                QUADENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Timer Overflow Direction In Quadrature Decoder Mode"]
            #[inline(always)]
            pub fn tofdir(&self) -> TOFDIRR {
                TOFDIRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - FTM Counter Direction In Quadrature Decoder Mode"]
            #[inline(always)]
            pub fn quadir(&self) -> QUADIRR {
                QUADIRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Quadrature Decoder Mode"]
            #[inline(always)]
            pub fn quadmode(&self) -> QUADMODER {
                QUADMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Phase B Input Polarity"]
            #[inline(always)]
            pub fn phbpol(&self) -> PHBPOLR {
                PHBPOLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Phase A Input Polarity"]
            #[inline(always)]
            pub fn phapol(&self) -> PHAPOLR {
                PHAPOLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Phase B Input Filter Enable"]
            #[inline(always)]
            pub fn phbfltren(&self) -> PHBFLTRENR {
                PHBFLTRENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Phase A Input Filter Enable"]
            #[inline(always)]
            pub fn phafltren(&self) -> PHAFLTRENR {
                PHAFLTRENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Quadrature Decoder Mode Enable"]
            #[inline(always)]
            pub fn quaden(&mut self) -> _QUADENW {
                _QUADENW { w: self }
            }
            #[doc = "Bit 3 - Quadrature Decoder Mode"]
            #[inline(always)]
            pub fn quadmode(&mut self) -> _QUADMODEW {
                _QUADMODEW { w: self }
            }
            #[doc = "Bit 4 - Phase B Input Polarity"]
            #[inline(always)]
            pub fn phbpol(&mut self) -> _PHBPOLW {
                _PHBPOLW { w: self }
            }
            #[doc = "Bit 5 - Phase A Input Polarity"]
            #[inline(always)]
            pub fn phapol(&mut self) -> _PHAPOLW {
                _PHAPOLW { w: self }
            }
            #[doc = "Bit 6 - Phase B Input Filter Enable"]
            #[inline(always)]
            pub fn phbfltren(&mut self) -> _PHBFLTRENW {
                _PHBFLTRENW { w: self }
            }
            #[doc = "Bit 7 - Phase A Input Filter Enable"]
            #[inline(always)]
            pub fn phafltren(&mut self) -> _PHAFLTRENW {
                _PHAFLTRENW { w: self }
            }
        }
    }
    #[doc = "Configuration"]
    pub struct CONF {
        register: VolatileCell<u32>,
    }
    #[doc = "Configuration"]
    pub mod conf {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CONF {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct LDFQR {
            bits: u8,
        }
        impl LDFQR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct BDMMODER {
            bits: u8,
        }
        impl BDMMODER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct GTBEENR {
            bits: bool,
        }
        impl GTBEENR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct GTBEOUTR {
            bits: bool,
        }
        impl GTBEOUTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `ITRIGR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ITRIGRR {
            #[doc = "Initialization trigger is generated on counter wrap events."]
            _0,
            #[doc = "Initialization trigger is generated when a reload point is reached."]
            _1,
        }
        impl ITRIGRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ITRIGRR::_0 => false,
                    ITRIGRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ITRIGRR {
                match value {
                    false => ITRIGRR::_0,
                    true => ITRIGRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ITRIGRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ITRIGRR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _LDFQW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LDFQW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _BDMMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BDMMODEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _GTBEENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GTBEENW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _GTBEOUTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GTBEOUTW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ITRIGR`"]
        pub enum ITRIGRW {
            #[doc = "Initialization trigger is generated on counter wrap events."]
            _0,
            #[doc = "Initialization trigger is generated when a reload point is reached."]
            _1,
        }
        impl ITRIGRW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ITRIGRW::_0 => false,
                    ITRIGRW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ITRIGRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ITRIGRW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ITRIGRW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Initialization trigger is generated on counter wrap events."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ITRIGRW::_0)
            }
            #[doc = "Initialization trigger is generated when a reload point is reached."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ITRIGRW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:4 - Frequency of the Reload Opportunities"]
            #[inline(always)]
            pub fn ldfq(&self) -> LDFQR {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                LDFQR { bits }
            }
            #[doc = "Bits 6:7 - Debug Mode"]
            #[inline(always)]
            pub fn bdmmode(&self) -> BDMMODER {
                let bits = {
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BDMMODER { bits }
            }
            #[doc = "Bit 9 - Global Time Base Enable"]
            #[inline(always)]
            pub fn gtbeen(&self) -> GTBEENR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                GTBEENR { bits }
            }
            #[doc = "Bit 10 - Global Time Base Output"]
            #[inline(always)]
            pub fn gtbeout(&self) -> GTBEOUTR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                GTBEOUTR { bits }
            }
            #[doc = "Bit 11 - Initialization trigger on Reload Point"]
            #[inline(always)]
            pub fn itrigr(&self) -> ITRIGRR {
                ITRIGRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:4 - Frequency of the Reload Opportunities"]
            #[inline(always)]
            pub fn ldfq(&mut self) -> _LDFQW {
                _LDFQW { w: self }
            }
            #[doc = "Bits 6:7 - Debug Mode"]
            #[inline(always)]
            pub fn bdmmode(&mut self) -> _BDMMODEW {
                _BDMMODEW { w: self }
            }
            #[doc = "Bit 9 - Global Time Base Enable"]
            #[inline(always)]
            pub fn gtbeen(&mut self) -> _GTBEENW {
                _GTBEENW { w: self }
            }
            #[doc = "Bit 10 - Global Time Base Output"]
            #[inline(always)]
            pub fn gtbeout(&mut self) -> _GTBEOUTW {
                _GTBEOUTW { w: self }
            }
            #[doc = "Bit 11 - Initialization trigger on Reload Point"]
            #[inline(always)]
            pub fn itrigr(&mut self) -> _ITRIGRW {
                _ITRIGRW { w: self }
            }
        }
    }
    #[doc = "FTM Fault Input Polarity"]
    pub struct FLTPOL {
        register: VolatileCell<u32>,
    }
    #[doc = "FTM Fault Input Polarity"]
    pub mod fltpol {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FLTPOL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `FLT0POL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FLT0POLR {
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            _0,
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            _1,
        }
        impl FLT0POLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FLT0POLR::_0 => false,
                    FLT0POLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FLT0POLR {
                match value {
                    false => FLT0POLR::_0,
                    true => FLT0POLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FLT0POLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FLT0POLR::_1
            }
        }
        #[doc = "Possible values of the field `FLT1POL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FLT1POLR {
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            _0,
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            _1,
        }
        impl FLT1POLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FLT1POLR::_0 => false,
                    FLT1POLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FLT1POLR {
                match value {
                    false => FLT1POLR::_0,
                    true => FLT1POLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FLT1POLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FLT1POLR::_1
            }
        }
        #[doc = "Possible values of the field `FLT2POL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FLT2POLR {
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            _0,
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            _1,
        }
        impl FLT2POLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FLT2POLR::_0 => false,
                    FLT2POLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FLT2POLR {
                match value {
                    false => FLT2POLR::_0,
                    true => FLT2POLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FLT2POLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FLT2POLR::_1
            }
        }
        #[doc = "Possible values of the field `FLT3POL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FLT3POLR {
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            _0,
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            _1,
        }
        impl FLT3POLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FLT3POLR::_0 => false,
                    FLT3POLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FLT3POLR {
                match value {
                    false => FLT3POLR::_0,
                    true => FLT3POLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FLT3POLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FLT3POLR::_1
            }
        }
        #[doc = "Values that can be written to the field `FLT0POL`"]
        pub enum FLT0POLW {
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            _0,
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            _1,
        }
        impl FLT0POLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FLT0POLW::_0 => false,
                    FLT0POLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FLT0POLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FLT0POLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FLT0POLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FLT0POLW::_0)
            }
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FLT0POLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FLT1POL`"]
        pub enum FLT1POLW {
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            _0,
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            _1,
        }
        impl FLT1POLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FLT1POLW::_0 => false,
                    FLT1POLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FLT1POLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FLT1POLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FLT1POLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FLT1POLW::_0)
            }
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FLT1POLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FLT2POL`"]
        pub enum FLT2POLW {
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            _0,
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            _1,
        }
        impl FLT2POLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FLT2POLW::_0 => false,
                    FLT2POLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FLT2POLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FLT2POLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FLT2POLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FLT2POLW::_0)
            }
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FLT2POLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FLT3POL`"]
        pub enum FLT3POLW {
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            _0,
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            _1,
        }
        impl FLT3POLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FLT3POLW::_0 => false,
                    FLT3POLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FLT3POLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FLT3POLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FLT3POLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FLT3POLW::_0)
            }
            #[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FLT3POLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Fault Input 0 Polarity"]
            #[inline(always)]
            pub fn flt0pol(&self) -> FLT0POLR {
                FLT0POLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Fault Input 1 Polarity"]
            #[inline(always)]
            pub fn flt1pol(&self) -> FLT1POLR {
                FLT1POLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Fault Input 2 Polarity"]
            #[inline(always)]
            pub fn flt2pol(&self) -> FLT2POLR {
                FLT2POLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Fault Input 3 Polarity"]
            #[inline(always)]
            pub fn flt3pol(&self) -> FLT3POLR {
                FLT3POLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Fault Input 0 Polarity"]
            #[inline(always)]
            pub fn flt0pol(&mut self) -> _FLT0POLW {
                _FLT0POLW { w: self }
            }
            #[doc = "Bit 1 - Fault Input 1 Polarity"]
            #[inline(always)]
            pub fn flt1pol(&mut self) -> _FLT1POLW {
                _FLT1POLW { w: self }
            }
            #[doc = "Bit 2 - Fault Input 2 Polarity"]
            #[inline(always)]
            pub fn flt2pol(&mut self) -> _FLT2POLW {
                _FLT2POLW { w: self }
            }
            #[doc = "Bit 3 - Fault Input 3 Polarity"]
            #[inline(always)]
            pub fn flt3pol(&mut self) -> _FLT3POLW {
                _FLT3POLW { w: self }
            }
        }
    }
    #[doc = "Synchronization Configuration"]
    pub struct SYNCONF {
        register: VolatileCell<u32>,
    }
    #[doc = "Synchronization Configuration"]
    pub mod synconf {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SYNCONF {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `HWTRIGMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HWTRIGMODER {
            #[doc = "FTM clears the TRIGj bit when the hardware trigger j is detected, where j = 0, 1,2."]
            _0,
            #[doc = "FTM does not clear the TRIGj bit when the hardware trigger j is detected, where j = 0, 1,2."]
            _1,
        }
        impl HWTRIGMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HWTRIGMODER::_0 => false,
                    HWTRIGMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HWTRIGMODER {
                match value {
                    false => HWTRIGMODER::_0,
                    true => HWTRIGMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HWTRIGMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HWTRIGMODER::_1
            }
        }
        #[doc = "Possible values of the field `CNTINC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CNTINCR {
            #[doc = "CNTIN register is updated with its buffer value at all rising edges of FTM input clock."]
            _0,
            #[doc = "CNTIN register is updated with its buffer value by the PWM synchronization."]
            _1,
        }
        impl CNTINCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CNTINCR::_0 => false,
                    CNTINCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CNTINCR {
                match value {
                    false => CNTINCR::_0,
                    true => CNTINCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CNTINCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CNTINCR::_1
            }
        }
        #[doc = "Possible values of the field `INVC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INVCR {
            #[doc = "INVCTRL register is updated with its buffer value at all rising edges of FTM input clock."]
            _0,
            #[doc = "INVCTRL register is updated with its buffer value by the PWM synchronization."]
            _1,
        }
        impl INVCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INVCR::_0 => false,
                    INVCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INVCR {
                match value {
                    false => INVCR::_0,
                    true => INVCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INVCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INVCR::_1
            }
        }
        #[doc = "Possible values of the field `SWOC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SWOCR {
            #[doc = "SWOCTRL register is updated with its buffer value at all rising edges of FTM input clock."]
            _0,
            #[doc = "SWOCTRL register is updated with its buffer value by the PWM synchronization."]
            _1,
        }
        impl SWOCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SWOCR::_0 => false,
                    SWOCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SWOCR {
                match value {
                    false => SWOCR::_0,
                    true => SWOCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SWOCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SWOCR::_1
            }
        }
        #[doc = "Possible values of the field `SYNCMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SYNCMODER {
            #[doc = "Legacy PWM synchronization is selected."]
            _0,
            #[doc = "Enhanced PWM synchronization is selected."]
            _1,
        }
        impl SYNCMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SYNCMODER::_0 => false,
                    SYNCMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SYNCMODER {
                match value {
                    false => SYNCMODER::_0,
                    true => SYNCMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SYNCMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SYNCMODER::_1
            }
        }
        #[doc = "Possible values of the field `SWRSTCNT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SWRSTCNTR {
            #[doc = "The software trigger does not activate the FTM counter synchronization."]
            _0,
            #[doc = "The software trigger activates the FTM counter synchronization."]
            _1,
        }
        impl SWRSTCNTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SWRSTCNTR::_0 => false,
                    SWRSTCNTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SWRSTCNTR {
                match value {
                    false => SWRSTCNTR::_0,
                    true => SWRSTCNTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SWRSTCNTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SWRSTCNTR::_1
            }
        }
        #[doc = "Possible values of the field `SWWRBUF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SWWRBUFR {
            #[doc = "The software trigger does not activate MOD, HCR, CNTIN, and CV registers synchronization."]
            _0,
            #[doc = "The software trigger activates MOD, HCR, CNTIN, and CV registers synchronization."]
            _1,
        }
        impl SWWRBUFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SWWRBUFR::_0 => false,
                    SWWRBUFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SWWRBUFR {
                match value {
                    false => SWWRBUFR::_0,
                    true => SWWRBUFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SWWRBUFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SWWRBUFR::_1
            }
        }
        #[doc = "Possible values of the field `SWOM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SWOMR {
            #[doc = "The software trigger does not activate the OUTMASK register synchronization."]
            _0,
            #[doc = "The software trigger activates the OUTMASK register synchronization."]
            _1,
        }
        impl SWOMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SWOMR::_0 => false,
                    SWOMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SWOMR {
                match value {
                    false => SWOMR::_0,
                    true => SWOMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SWOMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SWOMR::_1
            }
        }
        #[doc = "Possible values of the field `SWINVC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SWINVCR {
            #[doc = "The software trigger does not activate the INVCTRL register synchronization."]
            _0,
            #[doc = "The software trigger activates the INVCTRL register synchronization."]
            _1,
        }
        impl SWINVCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SWINVCR::_0 => false,
                    SWINVCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SWINVCR {
                match value {
                    false => SWINVCR::_0,
                    true => SWINVCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SWINVCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SWINVCR::_1
            }
        }
        #[doc = "Possible values of the field `SWSOC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SWSOCR {
            #[doc = "The software trigger does not activate the SWOCTRL register synchronization."]
            _0,
            #[doc = "The software trigger activates the SWOCTRL register synchronization."]
            _1,
        }
        impl SWSOCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SWSOCR::_0 => false,
                    SWSOCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SWSOCR {
                match value {
                    false => SWSOCR::_0,
                    true => SWSOCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SWSOCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SWSOCR::_1
            }
        }
        #[doc = "Possible values of the field `HWRSTCNT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HWRSTCNTR {
            #[doc = "A hardware trigger does not activate the FTM counter synchronization."]
            _0,
            #[doc = "A hardware trigger activates the FTM counter synchronization."]
            _1,
        }
        impl HWRSTCNTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HWRSTCNTR::_0 => false,
                    HWRSTCNTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HWRSTCNTR {
                match value {
                    false => HWRSTCNTR::_0,
                    true => HWRSTCNTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HWRSTCNTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HWRSTCNTR::_1
            }
        }
        #[doc = "Possible values of the field `HWWRBUF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HWWRBUFR {
            #[doc = "A hardware trigger does not activate MOD, HCR, CNTIN, and CV registers synchronization."]
            _0,
            #[doc = "A hardware trigger activates MOD, HCR, CNTIN, and CV registers synchronization."]
            _1,
        }
        impl HWWRBUFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HWWRBUFR::_0 => false,
                    HWWRBUFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HWWRBUFR {
                match value {
                    false => HWWRBUFR::_0,
                    true => HWWRBUFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HWWRBUFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HWWRBUFR::_1
            }
        }
        #[doc = "Possible values of the field `HWOM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HWOMR {
            #[doc = "A hardware trigger does not activate the OUTMASK register synchronization."]
            _0,
            #[doc = "A hardware trigger activates the OUTMASK register synchronization."]
            _1,
        }
        impl HWOMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HWOMR::_0 => false,
                    HWOMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HWOMR {
                match value {
                    false => HWOMR::_0,
                    true => HWOMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HWOMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HWOMR::_1
            }
        }
        #[doc = "Possible values of the field `HWINVC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HWINVCR {
            #[doc = "A hardware trigger does not activate the INVCTRL register synchronization."]
            _0,
            #[doc = "A hardware trigger activates the INVCTRL register synchronization."]
            _1,
        }
        impl HWINVCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HWINVCR::_0 => false,
                    HWINVCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HWINVCR {
                match value {
                    false => HWINVCR::_0,
                    true => HWINVCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HWINVCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HWINVCR::_1
            }
        }
        #[doc = "Possible values of the field `HWSOC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HWSOCR {
            #[doc = "A hardware trigger does not activate the SWOCTRL register synchronization."]
            _0,
            #[doc = "A hardware trigger activates the SWOCTRL register synchronization."]
            _1,
        }
        impl HWSOCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HWSOCR::_0 => false,
                    HWSOCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HWSOCR {
                match value {
                    false => HWSOCR::_0,
                    true => HWSOCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HWSOCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HWSOCR::_1
            }
        }
        #[doc = "Values that can be written to the field `HWTRIGMODE`"]
        pub enum HWTRIGMODEW {
            #[doc = "FTM clears the TRIGj bit when the hardware trigger j is detected, where j = 0, 1,2."]
            _0,
            #[doc = "FTM does not clear the TRIGj bit when the hardware trigger j is detected, where j = 0, 1,2."]
            _1,
        }
        impl HWTRIGMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HWTRIGMODEW::_0 => false,
                    HWTRIGMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HWTRIGMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HWTRIGMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HWTRIGMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM clears the TRIGj bit when the hardware trigger j is detected, where j = 0, 1,2."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HWTRIGMODEW::_0)
            }
            #[doc = "FTM does not clear the TRIGj bit when the hardware trigger j is detected, where j = 0, 1,2."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HWTRIGMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CNTINC`"]
        pub enum CNTINCW {
            #[doc = "CNTIN register is updated with its buffer value at all rising edges of FTM input clock."]
            _0,
            #[doc = "CNTIN register is updated with its buffer value by the PWM synchronization."]
            _1,
        }
        impl CNTINCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CNTINCW::_0 => false,
                    CNTINCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CNTINCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CNTINCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CNTINCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "CNTIN register is updated with its buffer value at all rising edges of FTM input clock."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CNTINCW::_0)
            }
            #[doc = "CNTIN register is updated with its buffer value by the PWM synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CNTINCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INVC`"]
        pub enum INVCW {
            #[doc = "INVCTRL register is updated with its buffer value at all rising edges of FTM input clock."]
            _0,
            #[doc = "INVCTRL register is updated with its buffer value by the PWM synchronization."]
            _1,
        }
        impl INVCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INVCW::_0 => false,
                    INVCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INVCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INVCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INVCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "INVCTRL register is updated with its buffer value at all rising edges of FTM input clock."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INVCW::_0)
            }
            #[doc = "INVCTRL register is updated with its buffer value by the PWM synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INVCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SWOC`"]
        pub enum SWOCW {
            #[doc = "SWOCTRL register is updated with its buffer value at all rising edges of FTM input clock."]
            _0,
            #[doc = "SWOCTRL register is updated with its buffer value by the PWM synchronization."]
            _1,
        }
        impl SWOCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SWOCW::_0 => false,
                    SWOCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SWOCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SWOCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SWOCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "SWOCTRL register is updated with its buffer value at all rising edges of FTM input clock."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SWOCW::_0)
            }
            #[doc = "SWOCTRL register is updated with its buffer value by the PWM synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SWOCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SYNCMODE`"]
        pub enum SYNCMODEW {
            #[doc = "Legacy PWM synchronization is selected."]
            _0,
            #[doc = "Enhanced PWM synchronization is selected."]
            _1,
        }
        impl SYNCMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SYNCMODEW::_0 => false,
                    SYNCMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SYNCMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SYNCMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SYNCMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Legacy PWM synchronization is selected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SYNCMODEW::_0)
            }
            #[doc = "Enhanced PWM synchronization is selected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SYNCMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SWRSTCNT`"]
        pub enum SWRSTCNTW {
            #[doc = "The software trigger does not activate the FTM counter synchronization."]
            _0,
            #[doc = "The software trigger activates the FTM counter synchronization."]
            _1,
        }
        impl SWRSTCNTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SWRSTCNTW::_0 => false,
                    SWRSTCNTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SWRSTCNTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SWRSTCNTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SWRSTCNTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software trigger does not activate the FTM counter synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SWRSTCNTW::_0)
            }
            #[doc = "The software trigger activates the FTM counter synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SWRSTCNTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SWWRBUF`"]
        pub enum SWWRBUFW {
            #[doc = "The software trigger does not activate MOD, HCR, CNTIN, and CV registers synchronization."]
            _0,
            #[doc = "The software trigger activates MOD, HCR, CNTIN, and CV registers synchronization."]
            _1,
        }
        impl SWWRBUFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SWWRBUFW::_0 => false,
                    SWWRBUFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SWWRBUFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SWWRBUFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SWWRBUFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software trigger does not activate MOD, HCR, CNTIN, and CV registers synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SWWRBUFW::_0)
            }
            #[doc = "The software trigger activates MOD, HCR, CNTIN, and CV registers synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SWWRBUFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SWOM`"]
        pub enum SWOMW {
            #[doc = "The software trigger does not activate the OUTMASK register synchronization."]
            _0,
            #[doc = "The software trigger activates the OUTMASK register synchronization."]
            _1,
        }
        impl SWOMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SWOMW::_0 => false,
                    SWOMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SWOMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SWOMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SWOMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software trigger does not activate the OUTMASK register synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SWOMW::_0)
            }
            #[doc = "The software trigger activates the OUTMASK register synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SWOMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SWINVC`"]
        pub enum SWINVCW {
            #[doc = "The software trigger does not activate the INVCTRL register synchronization."]
            _0,
            #[doc = "The software trigger activates the INVCTRL register synchronization."]
            _1,
        }
        impl SWINVCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SWINVCW::_0 => false,
                    SWINVCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SWINVCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SWINVCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SWINVCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software trigger does not activate the INVCTRL register synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SWINVCW::_0)
            }
            #[doc = "The software trigger activates the INVCTRL register synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SWINVCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SWSOC`"]
        pub enum SWSOCW {
            #[doc = "The software trigger does not activate the SWOCTRL register synchronization."]
            _0,
            #[doc = "The software trigger activates the SWOCTRL register synchronization."]
            _1,
        }
        impl SWSOCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SWSOCW::_0 => false,
                    SWSOCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SWSOCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SWSOCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SWSOCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software trigger does not activate the SWOCTRL register synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SWSOCW::_0)
            }
            #[doc = "The software trigger activates the SWOCTRL register synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SWSOCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `HWRSTCNT`"]
        pub enum HWRSTCNTW {
            #[doc = "A hardware trigger does not activate the FTM counter synchronization."]
            _0,
            #[doc = "A hardware trigger activates the FTM counter synchronization."]
            _1,
        }
        impl HWRSTCNTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HWRSTCNTW::_0 => false,
                    HWRSTCNTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HWRSTCNTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HWRSTCNTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HWRSTCNTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "A hardware trigger does not activate the FTM counter synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HWRSTCNTW::_0)
            }
            #[doc = "A hardware trigger activates the FTM counter synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HWRSTCNTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `HWWRBUF`"]
        pub enum HWWRBUFW {
            #[doc = "A hardware trigger does not activate MOD, HCR, CNTIN, and CV registers synchronization."]
            _0,
            #[doc = "A hardware trigger activates MOD, HCR, CNTIN, and CV registers synchronization."]
            _1,
        }
        impl HWWRBUFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HWWRBUFW::_0 => false,
                    HWWRBUFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HWWRBUFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HWWRBUFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HWWRBUFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "A hardware trigger does not activate MOD, HCR, CNTIN, and CV registers synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HWWRBUFW::_0)
            }
            #[doc = "A hardware trigger activates MOD, HCR, CNTIN, and CV registers synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HWWRBUFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `HWOM`"]
        pub enum HWOMW {
            #[doc = "A hardware trigger does not activate the OUTMASK register synchronization."]
            _0,
            #[doc = "A hardware trigger activates the OUTMASK register synchronization."]
            _1,
        }
        impl HWOMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HWOMW::_0 => false,
                    HWOMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HWOMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HWOMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HWOMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "A hardware trigger does not activate the OUTMASK register synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HWOMW::_0)
            }
            #[doc = "A hardware trigger activates the OUTMASK register synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HWOMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `HWINVC`"]
        pub enum HWINVCW {
            #[doc = "A hardware trigger does not activate the INVCTRL register synchronization."]
            _0,
            #[doc = "A hardware trigger activates the INVCTRL register synchronization."]
            _1,
        }
        impl HWINVCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HWINVCW::_0 => false,
                    HWINVCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HWINVCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HWINVCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HWINVCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "A hardware trigger does not activate the INVCTRL register synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HWINVCW::_0)
            }
            #[doc = "A hardware trigger activates the INVCTRL register synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HWINVCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 19;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `HWSOC`"]
        pub enum HWSOCW {
            #[doc = "A hardware trigger does not activate the SWOCTRL register synchronization."]
            _0,
            #[doc = "A hardware trigger activates the SWOCTRL register synchronization."]
            _1,
        }
        impl HWSOCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HWSOCW::_0 => false,
                    HWSOCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HWSOCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HWSOCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HWSOCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "A hardware trigger does not activate the SWOCTRL register synchronization."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HWSOCW::_0)
            }
            #[doc = "A hardware trigger activates the SWOCTRL register synchronization."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HWSOCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Hardware Trigger Mode"]
            #[inline(always)]
            pub fn hwtrigmode(&self) -> HWTRIGMODER {
                HWTRIGMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - CNTIN Register Synchronization"]
            #[inline(always)]
            pub fn cntinc(&self) -> CNTINCR {
                CNTINCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - INVCTRL Register Synchronization"]
            #[inline(always)]
            pub fn invc(&self) -> INVCR {
                INVCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - SWOCTRL Register Synchronization"]
            #[inline(always)]
            pub fn swoc(&self) -> SWOCR {
                SWOCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Synchronization Mode"]
            #[inline(always)]
            pub fn syncmode(&self) -> SYNCMODER {
                SYNCMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - FTM counter synchronization is activated by the software trigger"]
            #[inline(always)]
            pub fn swrstcnt(&self) -> SWRSTCNTR {
                SWRSTCNTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - MOD, HCR, CNTIN, and CV registers synchronization is activated by the software trigger"]
            #[inline(always)]
            pub fn swwrbuf(&self) -> SWWRBUFR {
                SWWRBUFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Output mask synchronization is activated by the software trigger"]
            #[inline(always)]
            pub fn swom(&self) -> SWOMR {
                SWOMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 11 - Inverting control synchronization is activated by the software trigger"]
            #[inline(always)]
            pub fn swinvc(&self) -> SWINVCR {
                SWINVCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Software output control synchronization is activated by the software trigger"]
            #[inline(always)]
            pub fn swsoc(&self) -> SWSOCR {
                SWSOCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 16 - FTM counter synchronization is activated by a hardware trigger"]
            #[inline(always)]
            pub fn hwrstcnt(&self) -> HWRSTCNTR {
                HWRSTCNTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - MOD, HCR, CNTIN, and CV registers synchronization is activated by a hardware trigger"]
            #[inline(always)]
            pub fn hwwrbuf(&self) -> HWWRBUFR {
                HWWRBUFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 18 - Output mask synchronization is activated by a hardware trigger"]
            #[inline(always)]
            pub fn hwom(&self) -> HWOMR {
                HWOMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 19 - Inverting control synchronization is activated by a hardware trigger"]
            #[inline(always)]
            pub fn hwinvc(&self) -> HWINVCR {
                HWINVCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 19;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 20 - Software output control synchronization is activated by a hardware trigger"]
            #[inline(always)]
            pub fn hwsoc(&self) -> HWSOCR {
                HWSOCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Hardware Trigger Mode"]
            #[inline(always)]
            pub fn hwtrigmode(&mut self) -> _HWTRIGMODEW {
                _HWTRIGMODEW { w: self }
            }
            #[doc = "Bit 2 - CNTIN Register Synchronization"]
            #[inline(always)]
            pub fn cntinc(&mut self) -> _CNTINCW {
                _CNTINCW { w: self }
            }
            #[doc = "Bit 4 - INVCTRL Register Synchronization"]
            #[inline(always)]
            pub fn invc(&mut self) -> _INVCW {
                _INVCW { w: self }
            }
            #[doc = "Bit 5 - SWOCTRL Register Synchronization"]
            #[inline(always)]
            pub fn swoc(&mut self) -> _SWOCW {
                _SWOCW { w: self }
            }
            #[doc = "Bit 7 - Synchronization Mode"]
            #[inline(always)]
            pub fn syncmode(&mut self) -> _SYNCMODEW {
                _SYNCMODEW { w: self }
            }
            #[doc = "Bit 8 - FTM counter synchronization is activated by the software trigger"]
            #[inline(always)]
            pub fn swrstcnt(&mut self) -> _SWRSTCNTW {
                _SWRSTCNTW { w: self }
            }
            #[doc = "Bit 9 - MOD, HCR, CNTIN, and CV registers synchronization is activated by the software trigger"]
            #[inline(always)]
            pub fn swwrbuf(&mut self) -> _SWWRBUFW {
                _SWWRBUFW { w: self }
            }
            #[doc = "Bit 10 - Output mask synchronization is activated by the software trigger"]
            #[inline(always)]
            pub fn swom(&mut self) -> _SWOMW {
                _SWOMW { w: self }
            }
            #[doc = "Bit 11 - Inverting control synchronization is activated by the software trigger"]
            #[inline(always)]
            pub fn swinvc(&mut self) -> _SWINVCW {
                _SWINVCW { w: self }
            }
            #[doc = "Bit 12 - Software output control synchronization is activated by the software trigger"]
            #[inline(always)]
            pub fn swsoc(&mut self) -> _SWSOCW {
                _SWSOCW { w: self }
            }
            #[doc = "Bit 16 - FTM counter synchronization is activated by a hardware trigger"]
            #[inline(always)]
            pub fn hwrstcnt(&mut self) -> _HWRSTCNTW {
                _HWRSTCNTW { w: self }
            }
            #[doc = "Bit 17 - MOD, HCR, CNTIN, and CV registers synchronization is activated by a hardware trigger"]
            #[inline(always)]
            pub fn hwwrbuf(&mut self) -> _HWWRBUFW {
                _HWWRBUFW { w: self }
            }
            #[doc = "Bit 18 - Output mask synchronization is activated by a hardware trigger"]
            #[inline(always)]
            pub fn hwom(&mut self) -> _HWOMW {
                _HWOMW { w: self }
            }
            #[doc = "Bit 19 - Inverting control synchronization is activated by a hardware trigger"]
            #[inline(always)]
            pub fn hwinvc(&mut self) -> _HWINVCW {
                _HWINVCW { w: self }
            }
            #[doc = "Bit 20 - Software output control synchronization is activated by a hardware trigger"]
            #[inline(always)]
            pub fn hwsoc(&mut self) -> _HWSOCW {
                _HWSOCW { w: self }
            }
        }
    }
    #[doc = "FTM Inverting Control"]
    pub struct INVCTRL {
        register: VolatileCell<u32>,
    }
    #[doc = "FTM Inverting Control"]
    pub mod invctrl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::INVCTRL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `INV0EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INV0ENR {
            #[doc = "Inverting is disabled."]
            _0,
            #[doc = "Inverting is enabled."]
            _1,
        }
        impl INV0ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INV0ENR::_0 => false,
                    INV0ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INV0ENR {
                match value {
                    false => INV0ENR::_0,
                    true => INV0ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INV0ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INV0ENR::_1
            }
        }
        #[doc = "Possible values of the field `INV1EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INV1ENR {
            #[doc = "Inverting is disabled."]
            _0,
            #[doc = "Inverting is enabled."]
            _1,
        }
        impl INV1ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INV1ENR::_0 => false,
                    INV1ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INV1ENR {
                match value {
                    false => INV1ENR::_0,
                    true => INV1ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INV1ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INV1ENR::_1
            }
        }
        #[doc = "Possible values of the field `INV2EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INV2ENR {
            #[doc = "Inverting is disabled."]
            _0,
            #[doc = "Inverting is enabled."]
            _1,
        }
        impl INV2ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INV2ENR::_0 => false,
                    INV2ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INV2ENR {
                match value {
                    false => INV2ENR::_0,
                    true => INV2ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INV2ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INV2ENR::_1
            }
        }
        #[doc = "Possible values of the field `INV3EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INV3ENR {
            #[doc = "Inverting is disabled."]
            _0,
            #[doc = "Inverting is enabled."]
            _1,
        }
        impl INV3ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INV3ENR::_0 => false,
                    INV3ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INV3ENR {
                match value {
                    false => INV3ENR::_0,
                    true => INV3ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INV3ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INV3ENR::_1
            }
        }
        #[doc = "Values that can be written to the field `INV0EN`"]
        pub enum INV0ENW {
            #[doc = "Inverting is disabled."]
            _0,
            #[doc = "Inverting is enabled."]
            _1,
        }
        impl INV0ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INV0ENW::_0 => false,
                    INV0ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INV0ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INV0ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INV0ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Inverting is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INV0ENW::_0)
            }
            #[doc = "Inverting is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INV0ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INV1EN`"]
        pub enum INV1ENW {
            #[doc = "Inverting is disabled."]
            _0,
            #[doc = "Inverting is enabled."]
            _1,
        }
        impl INV1ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INV1ENW::_0 => false,
                    INV1ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INV1ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INV1ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INV1ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Inverting is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INV1ENW::_0)
            }
            #[doc = "Inverting is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INV1ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INV2EN`"]
        pub enum INV2ENW {
            #[doc = "Inverting is disabled."]
            _0,
            #[doc = "Inverting is enabled."]
            _1,
        }
        impl INV2ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INV2ENW::_0 => false,
                    INV2ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INV2ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INV2ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INV2ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Inverting is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INV2ENW::_0)
            }
            #[doc = "Inverting is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INV2ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INV3EN`"]
        pub enum INV3ENW {
            #[doc = "Inverting is disabled."]
            _0,
            #[doc = "Inverting is enabled."]
            _1,
        }
        impl INV3ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INV3ENW::_0 => false,
                    INV3ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INV3ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INV3ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INV3ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Inverting is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INV3ENW::_0)
            }
            #[doc = "Inverting is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INV3ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pair Channels 0 Inverting Enable"]
            #[inline(always)]
            pub fn inv0en(&self) -> INV0ENR {
                INV0ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pair Channels 1 Inverting Enable"]
            #[inline(always)]
            pub fn inv1en(&self) -> INV1ENR {
                INV1ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Pair Channels 2 Inverting Enable"]
            #[inline(always)]
            pub fn inv2en(&self) -> INV2ENR {
                INV2ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Pair Channels 3 Inverting Enable"]
            #[inline(always)]
            pub fn inv3en(&self) -> INV3ENR {
                INV3ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pair Channels 0 Inverting Enable"]
            #[inline(always)]
            pub fn inv0en(&mut self) -> _INV0ENW {
                _INV0ENW { w: self }
            }
            #[doc = "Bit 1 - Pair Channels 1 Inverting Enable"]
            #[inline(always)]
            pub fn inv1en(&mut self) -> _INV1ENW {
                _INV1ENW { w: self }
            }
            #[doc = "Bit 2 - Pair Channels 2 Inverting Enable"]
            #[inline(always)]
            pub fn inv2en(&mut self) -> _INV2ENW {
                _INV2ENW { w: self }
            }
            #[doc = "Bit 3 - Pair Channels 3 Inverting Enable"]
            #[inline(always)]
            pub fn inv3en(&mut self) -> _INV3ENW {
                _INV3ENW { w: self }
            }
        }
    }
    #[doc = "FTM Software Output Control"]
    pub struct SWOCTRL {
        register: VolatileCell<u32>,
    }
    #[doc = "FTM Software Output Control"]
    pub mod swoctrl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SWOCTRL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CH0OC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH0OCR {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH0OCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH0OCR::_0 => false,
                    CH0OCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH0OCR {
                match value {
                    false => CH0OCR::_0,
                    true => CH0OCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH0OCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH0OCR::_1
            }
        }
        #[doc = "Possible values of the field `CH1OC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH1OCR {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH1OCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH1OCR::_0 => false,
                    CH1OCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH1OCR {
                match value {
                    false => CH1OCR::_0,
                    true => CH1OCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH1OCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH1OCR::_1
            }
        }
        #[doc = "Possible values of the field `CH2OC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH2OCR {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH2OCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH2OCR::_0 => false,
                    CH2OCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH2OCR {
                match value {
                    false => CH2OCR::_0,
                    true => CH2OCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH2OCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH2OCR::_1
            }
        }
        #[doc = "Possible values of the field `CH3OC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH3OCR {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH3OCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH3OCR::_0 => false,
                    CH3OCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH3OCR {
                match value {
                    false => CH3OCR::_0,
                    true => CH3OCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH3OCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH3OCR::_1
            }
        }
        #[doc = "Possible values of the field `CH4OC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH4OCR {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH4OCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH4OCR::_0 => false,
                    CH4OCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH4OCR {
                match value {
                    false => CH4OCR::_0,
                    true => CH4OCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH4OCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH4OCR::_1
            }
        }
        #[doc = "Possible values of the field `CH5OC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH5OCR {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH5OCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH5OCR::_0 => false,
                    CH5OCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH5OCR {
                match value {
                    false => CH5OCR::_0,
                    true => CH5OCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH5OCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH5OCR::_1
            }
        }
        #[doc = "Possible values of the field `CH6OC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH6OCR {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH6OCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH6OCR::_0 => false,
                    CH6OCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH6OCR {
                match value {
                    false => CH6OCR::_0,
                    true => CH6OCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH6OCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH6OCR::_1
            }
        }
        #[doc = "Possible values of the field `CH7OC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH7OCR {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH7OCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH7OCR::_0 => false,
                    CH7OCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH7OCR {
                match value {
                    false => CH7OCR::_0,
                    true => CH7OCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH7OCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH7OCR::_1
            }
        }
        #[doc = "Possible values of the field `CH0OCV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH0OCVR {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH0OCVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH0OCVR::_0 => false,
                    CH0OCVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH0OCVR {
                match value {
                    false => CH0OCVR::_0,
                    true => CH0OCVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH0OCVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH0OCVR::_1
            }
        }
        #[doc = "Possible values of the field `CH1OCV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH1OCVR {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH1OCVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH1OCVR::_0 => false,
                    CH1OCVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH1OCVR {
                match value {
                    false => CH1OCVR::_0,
                    true => CH1OCVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH1OCVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH1OCVR::_1
            }
        }
        #[doc = "Possible values of the field `CH2OCV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH2OCVR {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH2OCVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH2OCVR::_0 => false,
                    CH2OCVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH2OCVR {
                match value {
                    false => CH2OCVR::_0,
                    true => CH2OCVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH2OCVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH2OCVR::_1
            }
        }
        #[doc = "Possible values of the field `CH3OCV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH3OCVR {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH3OCVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH3OCVR::_0 => false,
                    CH3OCVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH3OCVR {
                match value {
                    false => CH3OCVR::_0,
                    true => CH3OCVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH3OCVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH3OCVR::_1
            }
        }
        #[doc = "Possible values of the field `CH4OCV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH4OCVR {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH4OCVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH4OCVR::_0 => false,
                    CH4OCVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH4OCVR {
                match value {
                    false => CH4OCVR::_0,
                    true => CH4OCVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH4OCVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH4OCVR::_1
            }
        }
        #[doc = "Possible values of the field `CH5OCV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH5OCVR {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH5OCVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH5OCVR::_0 => false,
                    CH5OCVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH5OCVR {
                match value {
                    false => CH5OCVR::_0,
                    true => CH5OCVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH5OCVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH5OCVR::_1
            }
        }
        #[doc = "Possible values of the field `CH6OCV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH6OCVR {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH6OCVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH6OCVR::_0 => false,
                    CH6OCVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH6OCVR {
                match value {
                    false => CH6OCVR::_0,
                    true => CH6OCVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH6OCVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH6OCVR::_1
            }
        }
        #[doc = "Possible values of the field `CH7OCV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH7OCVR {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH7OCVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH7OCVR::_0 => false,
                    CH7OCVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH7OCVR {
                match value {
                    false => CH7OCVR::_0,
                    true => CH7OCVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH7OCVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH7OCVR::_1
            }
        }
        #[doc = "Values that can be written to the field `CH0OC`"]
        pub enum CH0OCW {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH0OCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH0OCW::_0 => false,
                    CH0OCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH0OCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH0OCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH0OCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel output is not affected by software output control."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH0OCW::_0)
            }
            #[doc = "The channel output is affected by software output control."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH0OCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH1OC`"]
        pub enum CH1OCW {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH1OCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH1OCW::_0 => false,
                    CH1OCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH1OCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH1OCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH1OCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel output is not affected by software output control."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH1OCW::_0)
            }
            #[doc = "The channel output is affected by software output control."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH1OCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH2OC`"]
        pub enum CH2OCW {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH2OCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH2OCW::_0 => false,
                    CH2OCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH2OCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH2OCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH2OCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel output is not affected by software output control."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH2OCW::_0)
            }
            #[doc = "The channel output is affected by software output control."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH2OCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH3OC`"]
        pub enum CH3OCW {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH3OCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH3OCW::_0 => false,
                    CH3OCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH3OCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH3OCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH3OCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel output is not affected by software output control."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH3OCW::_0)
            }
            #[doc = "The channel output is affected by software output control."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH3OCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH4OC`"]
        pub enum CH4OCW {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH4OCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH4OCW::_0 => false,
                    CH4OCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH4OCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH4OCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH4OCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel output is not affected by software output control."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH4OCW::_0)
            }
            #[doc = "The channel output is affected by software output control."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH4OCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH5OC`"]
        pub enum CH5OCW {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH5OCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH5OCW::_0 => false,
                    CH5OCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH5OCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH5OCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH5OCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel output is not affected by software output control."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH5OCW::_0)
            }
            #[doc = "The channel output is affected by software output control."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH5OCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH6OC`"]
        pub enum CH6OCW {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH6OCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH6OCW::_0 => false,
                    CH6OCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH6OCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH6OCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH6OCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel output is not affected by software output control."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH6OCW::_0)
            }
            #[doc = "The channel output is affected by software output control."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH6OCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH7OC`"]
        pub enum CH7OCW {
            #[doc = "The channel output is not affected by software output control."]
            _0,
            #[doc = "The channel output is affected by software output control."]
            _1,
        }
        impl CH7OCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH7OCW::_0 => false,
                    CH7OCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH7OCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH7OCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH7OCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel output is not affected by software output control."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH7OCW::_0)
            }
            #[doc = "The channel output is affected by software output control."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH7OCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH0OCV`"]
        pub enum CH0OCVW {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH0OCVW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH0OCVW::_0 => false,
                    CH0OCVW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH0OCVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH0OCVW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH0OCVW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software output control forces 0 to the channel output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH0OCVW::_0)
            }
            #[doc = "The software output control forces 1 to the channel output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH0OCVW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH1OCV`"]
        pub enum CH1OCVW {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH1OCVW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH1OCVW::_0 => false,
                    CH1OCVW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH1OCVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH1OCVW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH1OCVW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software output control forces 0 to the channel output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH1OCVW::_0)
            }
            #[doc = "The software output control forces 1 to the channel output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH1OCVW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH2OCV`"]
        pub enum CH2OCVW {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH2OCVW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH2OCVW::_0 => false,
                    CH2OCVW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH2OCVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH2OCVW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH2OCVW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software output control forces 0 to the channel output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH2OCVW::_0)
            }
            #[doc = "The software output control forces 1 to the channel output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH2OCVW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH3OCV`"]
        pub enum CH3OCVW {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH3OCVW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH3OCVW::_0 => false,
                    CH3OCVW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH3OCVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH3OCVW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH3OCVW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software output control forces 0 to the channel output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH3OCVW::_0)
            }
            #[doc = "The software output control forces 1 to the channel output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH3OCVW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH4OCV`"]
        pub enum CH4OCVW {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH4OCVW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH4OCVW::_0 => false,
                    CH4OCVW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH4OCVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH4OCVW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH4OCVW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software output control forces 0 to the channel output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH4OCVW::_0)
            }
            #[doc = "The software output control forces 1 to the channel output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH4OCVW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH5OCV`"]
        pub enum CH5OCVW {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH5OCVW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH5OCVW::_0 => false,
                    CH5OCVW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH5OCVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH5OCVW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH5OCVW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software output control forces 0 to the channel output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH5OCVW::_0)
            }
            #[doc = "The software output control forces 1 to the channel output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH5OCVW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH6OCV`"]
        pub enum CH6OCVW {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH6OCVW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH6OCVW::_0 => false,
                    CH6OCVW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH6OCVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH6OCVW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH6OCVW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software output control forces 0 to the channel output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH6OCVW::_0)
            }
            #[doc = "The software output control forces 1 to the channel output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH6OCVW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH7OCV`"]
        pub enum CH7OCVW {
            #[doc = "The software output control forces 0 to the channel output."]
            _0,
            #[doc = "The software output control forces 1 to the channel output."]
            _1,
        }
        impl CH7OCVW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH7OCVW::_0 => false,
                    CH7OCVW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH7OCVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH7OCVW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH7OCVW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The software output control forces 0 to the channel output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH7OCVW::_0)
            }
            #[doc = "The software output control forces 1 to the channel output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH7OCVW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Channel 0 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch0oc(&self) -> CH0OCR {
                CH0OCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Channel 1 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch1oc(&self) -> CH1OCR {
                CH1OCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel 2 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch2oc(&self) -> CH2OCR {
                CH2OCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Channel 3 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch3oc(&self) -> CH3OCR {
                CH3OCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Channel 4 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch4oc(&self) -> CH4OCR {
                CH4OCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Channel 5 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch5oc(&self) -> CH5OCR {
                CH5OCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Channel 6 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch6oc(&self) -> CH6OCR {
                CH6OCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel 7 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch7oc(&self) -> CH7OCR {
                CH7OCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Channel 0 Software Output Control Value"]
            #[inline(always)]
            pub fn ch0ocv(&self) -> CH0OCVR {
                CH0OCVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Channel 1 Software Output Control Value"]
            #[inline(always)]
            pub fn ch1ocv(&self) -> CH1OCVR {
                CH1OCVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Channel 2 Software Output Control Value"]
            #[inline(always)]
            pub fn ch2ocv(&self) -> CH2OCVR {
                CH2OCVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 11 - Channel 3 Software Output Control Value"]
            #[inline(always)]
            pub fn ch3ocv(&self) -> CH3OCVR {
                CH3OCVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Channel 4 Software Output Control Value"]
            #[inline(always)]
            pub fn ch4ocv(&self) -> CH4OCVR {
                CH4OCVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Channel 5 Software Output Control Value"]
            #[inline(always)]
            pub fn ch5ocv(&self) -> CH5OCVR {
                CH5OCVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - Channel 6 Software Output Control Value"]
            #[inline(always)]
            pub fn ch6ocv(&self) -> CH6OCVR {
                CH6OCVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - Channel 7 Software Output Control Value"]
            #[inline(always)]
            pub fn ch7ocv(&self) -> CH7OCVR {
                CH7OCVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Channel 0 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch0oc(&mut self) -> _CH0OCW {
                _CH0OCW { w: self }
            }
            #[doc = "Bit 1 - Channel 1 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch1oc(&mut self) -> _CH1OCW {
                _CH1OCW { w: self }
            }
            #[doc = "Bit 2 - Channel 2 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch2oc(&mut self) -> _CH2OCW {
                _CH2OCW { w: self }
            }
            #[doc = "Bit 3 - Channel 3 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch3oc(&mut self) -> _CH3OCW {
                _CH3OCW { w: self }
            }
            #[doc = "Bit 4 - Channel 4 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch4oc(&mut self) -> _CH4OCW {
                _CH4OCW { w: self }
            }
            #[doc = "Bit 5 - Channel 5 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch5oc(&mut self) -> _CH5OCW {
                _CH5OCW { w: self }
            }
            #[doc = "Bit 6 - Channel 6 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch6oc(&mut self) -> _CH6OCW {
                _CH6OCW { w: self }
            }
            #[doc = "Bit 7 - Channel 7 Software Output Control Enable"]
            #[inline(always)]
            pub fn ch7oc(&mut self) -> _CH7OCW {
                _CH7OCW { w: self }
            }
            #[doc = "Bit 8 - Channel 0 Software Output Control Value"]
            #[inline(always)]
            pub fn ch0ocv(&mut self) -> _CH0OCVW {
                _CH0OCVW { w: self }
            }
            #[doc = "Bit 9 - Channel 1 Software Output Control Value"]
            #[inline(always)]
            pub fn ch1ocv(&mut self) -> _CH1OCVW {
                _CH1OCVW { w: self }
            }
            #[doc = "Bit 10 - Channel 2 Software Output Control Value"]
            #[inline(always)]
            pub fn ch2ocv(&mut self) -> _CH2OCVW {
                _CH2OCVW { w: self }
            }
            #[doc = "Bit 11 - Channel 3 Software Output Control Value"]
            #[inline(always)]
            pub fn ch3ocv(&mut self) -> _CH3OCVW {
                _CH3OCVW { w: self }
            }
            #[doc = "Bit 12 - Channel 4 Software Output Control Value"]
            #[inline(always)]
            pub fn ch4ocv(&mut self) -> _CH4OCVW {
                _CH4OCVW { w: self }
            }
            #[doc = "Bit 13 - Channel 5 Software Output Control Value"]
            #[inline(always)]
            pub fn ch5ocv(&mut self) -> _CH5OCVW {
                _CH5OCVW { w: self }
            }
            #[doc = "Bit 14 - Channel 6 Software Output Control Value"]
            #[inline(always)]
            pub fn ch6ocv(&mut self) -> _CH6OCVW {
                _CH6OCVW { w: self }
            }
            #[doc = "Bit 15 - Channel 7 Software Output Control Value"]
            #[inline(always)]
            pub fn ch7ocv(&mut self) -> _CH7OCVW {
                _CH7OCVW { w: self }
            }
        }
    }
    #[doc = "FTM PWM Load"]
    pub struct PWMLOAD {
        register: VolatileCell<u32>,
    }
    #[doc = "FTM PWM Load"]
    pub mod pwmload {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PWMLOAD {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CH0SEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH0SELR {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH0SELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH0SELR::_0 => false,
                    CH0SELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH0SELR {
                match value {
                    false => CH0SELR::_0,
                    true => CH0SELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH0SELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH0SELR::_1
            }
        }
        #[doc = "Possible values of the field `CH1SEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH1SELR {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH1SELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH1SELR::_0 => false,
                    CH1SELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH1SELR {
                match value {
                    false => CH1SELR::_0,
                    true => CH1SELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH1SELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH1SELR::_1
            }
        }
        #[doc = "Possible values of the field `CH2SEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH2SELR {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH2SELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH2SELR::_0 => false,
                    CH2SELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH2SELR {
                match value {
                    false => CH2SELR::_0,
                    true => CH2SELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH2SELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH2SELR::_1
            }
        }
        #[doc = "Possible values of the field `CH3SEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH3SELR {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH3SELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH3SELR::_0 => false,
                    CH3SELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH3SELR {
                match value {
                    false => CH3SELR::_0,
                    true => CH3SELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH3SELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH3SELR::_1
            }
        }
        #[doc = "Possible values of the field `CH4SEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH4SELR {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH4SELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH4SELR::_0 => false,
                    CH4SELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH4SELR {
                match value {
                    false => CH4SELR::_0,
                    true => CH4SELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH4SELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH4SELR::_1
            }
        }
        #[doc = "Possible values of the field `CH5SEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH5SELR {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH5SELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH5SELR::_0 => false,
                    CH5SELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH5SELR {
                match value {
                    false => CH5SELR::_0,
                    true => CH5SELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH5SELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH5SELR::_1
            }
        }
        #[doc = "Possible values of the field `CH6SEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH6SELR {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH6SELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH6SELR::_0 => false,
                    CH6SELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH6SELR {
                match value {
                    false => CH6SELR::_0,
                    true => CH6SELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH6SELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH6SELR::_1
            }
        }
        #[doc = "Possible values of the field `CH7SEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CH7SELR {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH7SELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CH7SELR::_0 => false,
                    CH7SELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CH7SELR {
                match value {
                    false => CH7SELR::_0,
                    true => CH7SELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CH7SELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CH7SELR::_1
            }
        }
        #[doc = "Possible values of the field `HCSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HCSELR {
            #[doc = "Half cycle reload is disabled and it is not considered as a reload opportunity."]
            _0,
            #[doc = "Half cycle reload is enabled and it is considered as a reload opportunity."]
            _1,
        }
        impl HCSELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HCSELR::_0 => false,
                    HCSELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HCSELR {
                match value {
                    false => HCSELR::_0,
                    true => HCSELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HCSELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HCSELR::_1
            }
        }
        #[doc = "Possible values of the field `LDOK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LDOKR {
            #[doc = "Loading updated values is disabled."]
            _0,
            #[doc = "Loading updated values is enabled."]
            _1,
        }
        impl LDOKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LDOKR::_0 => false,
                    LDOKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LDOKR {
                match value {
                    false => LDOKR::_0,
                    true => LDOKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LDOKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LDOKR::_1
            }
        }
        #[doc = "Possible values of the field `GLEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum GLENR {
            #[doc = "Global Load Ok disabled."]
            _0,
            #[doc = "Global Load OK enabled. A pulse event on the module global load input sets the LDOK bit."]
            _1,
        }
        impl GLENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    GLENR::_0 => false,
                    GLENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> GLENR {
                match value {
                    false => GLENR::_0,
                    true => GLENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == GLENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == GLENR::_1
            }
        }
        #[doc = "Values that can be written to the field `CH0SEL`"]
        pub enum CH0SELW {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH0SELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH0SELW::_0 => false,
                    CH0SELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH0SELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH0SELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH0SELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel match is not included as a reload opportunity."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH0SELW::_0)
            }
            #[doc = "Channel match is included as a reload opportunity."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH0SELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH1SEL`"]
        pub enum CH1SELW {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH1SELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH1SELW::_0 => false,
                    CH1SELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH1SELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH1SELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH1SELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel match is not included as a reload opportunity."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH1SELW::_0)
            }
            #[doc = "Channel match is included as a reload opportunity."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH1SELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH2SEL`"]
        pub enum CH2SELW {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH2SELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH2SELW::_0 => false,
                    CH2SELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH2SELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH2SELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH2SELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel match is not included as a reload opportunity."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH2SELW::_0)
            }
            #[doc = "Channel match is included as a reload opportunity."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH2SELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH3SEL`"]
        pub enum CH3SELW {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH3SELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH3SELW::_0 => false,
                    CH3SELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH3SELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH3SELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH3SELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel match is not included as a reload opportunity."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH3SELW::_0)
            }
            #[doc = "Channel match is included as a reload opportunity."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH3SELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH4SEL`"]
        pub enum CH4SELW {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH4SELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH4SELW::_0 => false,
                    CH4SELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH4SELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH4SELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH4SELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel match is not included as a reload opportunity."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH4SELW::_0)
            }
            #[doc = "Channel match is included as a reload opportunity."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH4SELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH5SEL`"]
        pub enum CH5SELW {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH5SELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH5SELW::_0 => false,
                    CH5SELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH5SELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH5SELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH5SELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel match is not included as a reload opportunity."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH5SELW::_0)
            }
            #[doc = "Channel match is included as a reload opportunity."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH5SELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH6SEL`"]
        pub enum CH6SELW {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH6SELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH6SELW::_0 => false,
                    CH6SELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH6SELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH6SELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH6SELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel match is not included as a reload opportunity."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH6SELW::_0)
            }
            #[doc = "Channel match is included as a reload opportunity."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH6SELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CH7SEL`"]
        pub enum CH7SELW {
            #[doc = "Channel match is not included as a reload opportunity."]
            _0,
            #[doc = "Channel match is included as a reload opportunity."]
            _1,
        }
        impl CH7SELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CH7SELW::_0 => false,
                    CH7SELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH7SELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH7SELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CH7SELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel match is not included as a reload opportunity."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CH7SELW::_0)
            }
            #[doc = "Channel match is included as a reload opportunity."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CH7SELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `HCSEL`"]
        pub enum HCSELW {
            #[doc = "Half cycle reload is disabled and it is not considered as a reload opportunity."]
            _0,
            #[doc = "Half cycle reload is enabled and it is considered as a reload opportunity."]
            _1,
        }
        impl HCSELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HCSELW::_0 => false,
                    HCSELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HCSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HCSELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HCSELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Half cycle reload is disabled and it is not considered as a reload opportunity."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HCSELW::_0)
            }
            #[doc = "Half cycle reload is enabled and it is considered as a reload opportunity."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HCSELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LDOK`"]
        pub enum LDOKW {
            #[doc = "Loading updated values is disabled."]
            _0,
            #[doc = "Loading updated values is enabled."]
            _1,
        }
        impl LDOKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LDOKW::_0 => false,
                    LDOKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LDOKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LDOKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LDOKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Loading updated values is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LDOKW::_0)
            }
            #[doc = "Loading updated values is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LDOKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `GLEN`"]
        pub enum GLENW {
            #[doc = "Global Load Ok disabled."]
            _0,
            #[doc = "Global Load OK enabled. A pulse event on the module global load input sets the LDOK bit."]
            _1,
        }
        impl GLENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    GLENW::_0 => false,
                    GLENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _GLENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GLENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: GLENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Global Load Ok disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(GLENW::_0)
            }
            #[doc = "Global Load OK enabled. A pulse event on the module global load input sets the LDOK bit."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(GLENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `GLDOK`"]
        pub enum GLDOKW {
            #[doc = "No action."]
            _0,
            #[doc = "LDOK bit is set."]
            _1,
        }
        impl GLDOKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    GLDOKW::_0 => false,
                    GLDOKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _GLDOKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GLDOKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: GLDOKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No action."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(GLDOKW::_0)
            }
            #[doc = "LDOK bit is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(GLDOKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Channel 0 Select"]
            #[inline(always)]
            pub fn ch0sel(&self) -> CH0SELR {
                CH0SELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Channel 1 Select"]
            #[inline(always)]
            pub fn ch1sel(&self) -> CH1SELR {
                CH1SELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel 2 Select"]
            #[inline(always)]
            pub fn ch2sel(&self) -> CH2SELR {
                CH2SELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Channel 3 Select"]
            #[inline(always)]
            pub fn ch3sel(&self) -> CH3SELR {
                CH3SELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Channel 4 Select"]
            #[inline(always)]
            pub fn ch4sel(&self) -> CH4SELR {
                CH4SELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Channel 5 Select"]
            #[inline(always)]
            pub fn ch5sel(&self) -> CH5SELR {
                CH5SELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Channel 6 Select"]
            #[inline(always)]
            pub fn ch6sel(&self) -> CH6SELR {
                CH6SELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Channel 7 Select"]
            #[inline(always)]
            pub fn ch7sel(&self) -> CH7SELR {
                CH7SELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Half Cycle Select"]
            #[inline(always)]
            pub fn hcsel(&self) -> HCSELR {
                HCSELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Load Enable"]
            #[inline(always)]
            pub fn ldok(&self) -> LDOKR {
                LDOKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Global Load Enable"]
            #[inline(always)]
            pub fn glen(&self) -> GLENR {
                GLENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Channel 0 Select"]
            #[inline(always)]
            pub fn ch0sel(&mut self) -> _CH0SELW {
                _CH0SELW { w: self }
            }
            #[doc = "Bit 1 - Channel 1 Select"]
            #[inline(always)]
            pub fn ch1sel(&mut self) -> _CH1SELW {
                _CH1SELW { w: self }
            }
            #[doc = "Bit 2 - Channel 2 Select"]
            #[inline(always)]
            pub fn ch2sel(&mut self) -> _CH2SELW {
                _CH2SELW { w: self }
            }
            #[doc = "Bit 3 - Channel 3 Select"]
            #[inline(always)]
            pub fn ch3sel(&mut self) -> _CH3SELW {
                _CH3SELW { w: self }
            }
            #[doc = "Bit 4 - Channel 4 Select"]
            #[inline(always)]
            pub fn ch4sel(&mut self) -> _CH4SELW {
                _CH4SELW { w: self }
            }
            #[doc = "Bit 5 - Channel 5 Select"]
            #[inline(always)]
            pub fn ch5sel(&mut self) -> _CH5SELW {
                _CH5SELW { w: self }
            }
            #[doc = "Bit 6 - Channel 6 Select"]
            #[inline(always)]
            pub fn ch6sel(&mut self) -> _CH6SELW {
                _CH6SELW { w: self }
            }
            #[doc = "Bit 7 - Channel 7 Select"]
            #[inline(always)]
            pub fn ch7sel(&mut self) -> _CH7SELW {
                _CH7SELW { w: self }
            }
            #[doc = "Bit 8 - Half Cycle Select"]
            #[inline(always)]
            pub fn hcsel(&mut self) -> _HCSELW {
                _HCSELW { w: self }
            }
            #[doc = "Bit 9 - Load Enable"]
            #[inline(always)]
            pub fn ldok(&mut self) -> _LDOKW {
                _LDOKW { w: self }
            }
            #[doc = "Bit 10 - Global Load Enable"]
            #[inline(always)]
            pub fn glen(&mut self) -> _GLENW {
                _GLENW { w: self }
            }
            #[doc = "Bit 11 - Global Load OK"]
            #[inline(always)]
            pub fn gldok(&mut self) -> _GLDOKW {
                _GLDOKW { w: self }
            }
        }
    }
    #[doc = "Half Cycle Register"]
    pub struct HCR {
        register: VolatileCell<u32>,
    }
    #[doc = "Half Cycle Register"]
    pub mod hcr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::HCR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct HCVALR {
            bits: u16,
        }
        impl HCVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _HCVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HCVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Half Cycle Value"]
            #[inline(always)]
            pub fn hcval(&self) -> HCVALR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                HCVALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Half Cycle Value"]
            #[inline(always)]
            pub fn hcval(&mut self) -> _HCVALW {
                _HCVALW { w: self }
            }
        }
    }
    #[doc = "Pair 0 Deadtime Configuration"]
    pub struct PAIR0DEADTIME {
        register: VolatileCell<u32>,
    }
    #[doc = "Pair 0 Deadtime Configuration"]
    pub mod pair0deadtime {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PAIR0DEADTIME {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DTVALR {
            bits: u8,
        }
        impl DTVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DTPS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DTPSR {
            #[doc = "Divide the FTM input clock by 1."]
            _0X,
            #[doc = "Divide the FTM input clock by 4."]
            _10,
            #[doc = "Divide the FTM input clock by 16."]
            _11,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl DTPSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    DTPSR::_0X => 0,
                    DTPSR::_10 => 2,
                    DTPSR::_11 => 3,
                    DTPSR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> DTPSR {
                match value {
                    0 => DTPSR::_0X,
                    2 => DTPSR::_10,
                    3 => DTPSR::_11,
                    i => DTPSR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0X`"]
            #[inline(always)]
            pub fn is_0x(&self) -> bool {
                *self == DTPSR::_0X
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == DTPSR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == DTPSR::_11
            }
        }
        #[doc = r" Value of the field"]
        pub struct DTVALEXR {
            bits: u8,
        }
        impl DTVALEXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DTPS`"]
        pub enum DTPSW {
            #[doc = "Divide the FTM input clock by 1."]
            _0X,
            #[doc = "Divide the FTM input clock by 4."]
            _10,
            #[doc = "Divide the FTM input clock by 16."]
            _11,
        }
        impl DTPSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    DTPSW::_0X => 0,
                    DTPSW::_10 => 2,
                    DTPSW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTPSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTPSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DTPSW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Divide the FTM input clock by 1."]
            #[inline(always)]
            pub fn _0x(self) -> &'a mut W {
                self.variant(DTPSW::_0X)
            }
            #[doc = "Divide the FTM input clock by 4."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(DTPSW::_10)
            }
            #[doc = "Divide the FTM input clock by 16."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(DTPSW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTVALEXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTVALEXW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Deadtime Value"]
            #[inline(always)]
            pub fn dtval(&self) -> DTVALR {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DTVALR { bits }
            }
            #[doc = "Bits 6:7 - Deadtime Prescaler Value"]
            #[inline(always)]
            pub fn dtps(&self) -> DTPSR {
                DTPSR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 16:19 - Extended Deadtime Value"]
            #[inline(always)]
            pub fn dtvalex(&self) -> DTVALEXR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DTVALEXR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - Deadtime Value"]
            #[inline(always)]
            pub fn dtval(&mut self) -> _DTVALW {
                _DTVALW { w: self }
            }
            #[doc = "Bits 6:7 - Deadtime Prescaler Value"]
            #[inline(always)]
            pub fn dtps(&mut self) -> _DTPSW {
                _DTPSW { w: self }
            }
            #[doc = "Bits 16:19 - Extended Deadtime Value"]
            #[inline(always)]
            pub fn dtvalex(&mut self) -> _DTVALEXW {
                _DTVALEXW { w: self }
            }
        }
    }
    #[doc = "Pair 1 Deadtime Configuration"]
    pub struct PAIR1DEADTIME {
        register: VolatileCell<u32>,
    }
    #[doc = "Pair 1 Deadtime Configuration"]
    pub mod pair1deadtime {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PAIR1DEADTIME {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DTVALR {
            bits: u8,
        }
        impl DTVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DTPS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DTPSR {
            #[doc = "Divide the FTM input clock by 1."]
            _0X,
            #[doc = "Divide the FTM input clock by 4."]
            _10,
            #[doc = "Divide the FTM input clock by 16."]
            _11,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl DTPSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    DTPSR::_0X => 0,
                    DTPSR::_10 => 2,
                    DTPSR::_11 => 3,
                    DTPSR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> DTPSR {
                match value {
                    0 => DTPSR::_0X,
                    2 => DTPSR::_10,
                    3 => DTPSR::_11,
                    i => DTPSR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0X`"]
            #[inline(always)]
            pub fn is_0x(&self) -> bool {
                *self == DTPSR::_0X
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == DTPSR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == DTPSR::_11
            }
        }
        #[doc = r" Value of the field"]
        pub struct DTVALEXR {
            bits: u8,
        }
        impl DTVALEXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DTPS`"]
        pub enum DTPSW {
            #[doc = "Divide the FTM input clock by 1."]
            _0X,
            #[doc = "Divide the FTM input clock by 4."]
            _10,
            #[doc = "Divide the FTM input clock by 16."]
            _11,
        }
        impl DTPSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    DTPSW::_0X => 0,
                    DTPSW::_10 => 2,
                    DTPSW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTPSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTPSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DTPSW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Divide the FTM input clock by 1."]
            #[inline(always)]
            pub fn _0x(self) -> &'a mut W {
                self.variant(DTPSW::_0X)
            }
            #[doc = "Divide the FTM input clock by 4."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(DTPSW::_10)
            }
            #[doc = "Divide the FTM input clock by 16."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(DTPSW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTVALEXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTVALEXW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Deadtime Value"]
            #[inline(always)]
            pub fn dtval(&self) -> DTVALR {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DTVALR { bits }
            }
            #[doc = "Bits 6:7 - Deadtime Prescaler Value"]
            #[inline(always)]
            pub fn dtps(&self) -> DTPSR {
                DTPSR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 16:19 - Extended Deadtime Value"]
            #[inline(always)]
            pub fn dtvalex(&self) -> DTVALEXR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DTVALEXR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - Deadtime Value"]
            #[inline(always)]
            pub fn dtval(&mut self) -> _DTVALW {
                _DTVALW { w: self }
            }
            #[doc = "Bits 6:7 - Deadtime Prescaler Value"]
            #[inline(always)]
            pub fn dtps(&mut self) -> _DTPSW {
                _DTPSW { w: self }
            }
            #[doc = "Bits 16:19 - Extended Deadtime Value"]
            #[inline(always)]
            pub fn dtvalex(&mut self) -> _DTVALEXW {
                _DTVALEXW { w: self }
            }
        }
    }
    #[doc = "Pair 2 Deadtime Configuration"]
    pub struct PAIR2DEADTIME {
        register: VolatileCell<u32>,
    }
    #[doc = "Pair 2 Deadtime Configuration"]
    pub mod pair2deadtime {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PAIR2DEADTIME {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DTVALR {
            bits: u8,
        }
        impl DTVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DTPS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DTPSR {
            #[doc = "Divide the FTM input clock by 1."]
            _0X,
            #[doc = "Divide the FTM input clock by 4."]
            _10,
            #[doc = "Divide the FTM input clock by 16."]
            _11,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl DTPSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    DTPSR::_0X => 0,
                    DTPSR::_10 => 2,
                    DTPSR::_11 => 3,
                    DTPSR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> DTPSR {
                match value {
                    0 => DTPSR::_0X,
                    2 => DTPSR::_10,
                    3 => DTPSR::_11,
                    i => DTPSR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0X`"]
            #[inline(always)]
            pub fn is_0x(&self) -> bool {
                *self == DTPSR::_0X
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == DTPSR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == DTPSR::_11
            }
        }
        #[doc = r" Value of the field"]
        pub struct DTVALEXR {
            bits: u8,
        }
        impl DTVALEXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DTPS`"]
        pub enum DTPSW {
            #[doc = "Divide the FTM input clock by 1."]
            _0X,
            #[doc = "Divide the FTM input clock by 4."]
            _10,
            #[doc = "Divide the FTM input clock by 16."]
            _11,
        }
        impl DTPSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    DTPSW::_0X => 0,
                    DTPSW::_10 => 2,
                    DTPSW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTPSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTPSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DTPSW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Divide the FTM input clock by 1."]
            #[inline(always)]
            pub fn _0x(self) -> &'a mut W {
                self.variant(DTPSW::_0X)
            }
            #[doc = "Divide the FTM input clock by 4."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(DTPSW::_10)
            }
            #[doc = "Divide the FTM input clock by 16."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(DTPSW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTVALEXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTVALEXW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Deadtime Value"]
            #[inline(always)]
            pub fn dtval(&self) -> DTVALR {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DTVALR { bits }
            }
            #[doc = "Bits 6:7 - Deadtime Prescaler Value"]
            #[inline(always)]
            pub fn dtps(&self) -> DTPSR {
                DTPSR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 16:19 - Extended Deadtime Value"]
            #[inline(always)]
            pub fn dtvalex(&self) -> DTVALEXR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DTVALEXR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - Deadtime Value"]
            #[inline(always)]
            pub fn dtval(&mut self) -> _DTVALW {
                _DTVALW { w: self }
            }
            #[doc = "Bits 6:7 - Deadtime Prescaler Value"]
            #[inline(always)]
            pub fn dtps(&mut self) -> _DTPSW {
                _DTPSW { w: self }
            }
            #[doc = "Bits 16:19 - Extended Deadtime Value"]
            #[inline(always)]
            pub fn dtvalex(&mut self) -> _DTVALEXW {
                _DTVALEXW { w: self }
            }
        }
    }
    #[doc = "Pair 3 Deadtime Configuration"]
    pub struct PAIR3DEADTIME {
        register: VolatileCell<u32>,
    }
    #[doc = "Pair 3 Deadtime Configuration"]
    pub mod pair3deadtime {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PAIR3DEADTIME {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DTVALR {
            bits: u8,
        }
        impl DTVALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `DTPS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DTPSR {
            #[doc = "Divide the FTM input clock by 1."]
            _0X,
            #[doc = "Divide the FTM input clock by 4."]
            _10,
            #[doc = "Divide the FTM input clock by 16."]
            _11,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl DTPSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    DTPSR::_0X => 0,
                    DTPSR::_10 => 2,
                    DTPSR::_11 => 3,
                    DTPSR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> DTPSR {
                match value {
                    0 => DTPSR::_0X,
                    2 => DTPSR::_10,
                    3 => DTPSR::_11,
                    i => DTPSR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0X`"]
            #[inline(always)]
            pub fn is_0x(&self) -> bool {
                *self == DTPSR::_0X
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == DTPSR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == DTPSR::_11
            }
        }
        #[doc = r" Value of the field"]
        pub struct DTVALEXR {
            bits: u8,
        }
        impl DTVALEXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTVALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTVALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DTPS`"]
        pub enum DTPSW {
            #[doc = "Divide the FTM input clock by 1."]
            _0X,
            #[doc = "Divide the FTM input clock by 4."]
            _10,
            #[doc = "Divide the FTM input clock by 16."]
            _11,
        }
        impl DTPSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    DTPSW::_0X => 0,
                    DTPSW::_10 => 2,
                    DTPSW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTPSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTPSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DTPSW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Divide the FTM input clock by 1."]
            #[inline(always)]
            pub fn _0x(self) -> &'a mut W {
                self.variant(DTPSW::_0X)
            }
            #[doc = "Divide the FTM input clock by 4."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(DTPSW::_10)
            }
            #[doc = "Divide the FTM input clock by 16."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(DTPSW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DTVALEXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DTVALEXW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Deadtime Value"]
            #[inline(always)]
            pub fn dtval(&self) -> DTVALR {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DTVALR { bits }
            }
            #[doc = "Bits 6:7 - Deadtime Prescaler Value"]
            #[inline(always)]
            pub fn dtps(&self) -> DTPSR {
                DTPSR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 16:19 - Extended Deadtime Value"]
            #[inline(always)]
            pub fn dtvalex(&self) -> DTVALEXR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DTVALEXR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - Deadtime Value"]
            #[inline(always)]
            pub fn dtval(&mut self) -> _DTVALW {
                _DTVALW { w: self }
            }
            #[doc = "Bits 6:7 - Deadtime Prescaler Value"]
            #[inline(always)]
            pub fn dtps(&mut self) -> _DTPSW {
                _DTPSW { w: self }
            }
            #[doc = "Bits 16:19 - Extended Deadtime Value"]
            #[inline(always)]
            pub fn dtvalex(&mut self) -> _DTVALEXW {
                _DTVALEXW { w: self }
            }
        }
    }
}
#[doc = "FlexTimer Module"]
pub struct FTM3 {
    register_block: ftm3::RegisterBlock,
}
impl Deref for FTM3 {
    type Target = ftm3::RegisterBlock;
    fn deref(&self) -> &ftm3::RegisterBlock {
        &self.register_block
    }
}
#[doc = "Analog-to-Digital Converter"]
pub const ADC0: Peripheral<ADC0> = unsafe { Peripheral::new(1073983488) };
#[doc = "Analog-to-Digital Converter"]
pub mod adc0 {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - ADC Status and Control Register 1"]
        pub sc1a: SC1,
        #[doc = "0x04 - ADC Status and Control Register 1"]
        pub sc1b: SC1,
        #[doc = "0x08 - ADC Status and Control Register 1"]
        pub sc1c: SC1,
        #[doc = "0x0c - ADC Status and Control Register 1"]
        pub sc1d: SC1,
        #[doc = "0x10 - ADC Status and Control Register 1"]
        pub sc1e: SC1,
        #[doc = "0x14 - ADC Status and Control Register 1"]
        pub sc1f: SC1,
        #[doc = "0x18 - ADC Status and Control Register 1"]
        pub sc1g: SC1,
        #[doc = "0x1c - ADC Status and Control Register 1"]
        pub sc1h: SC1,
        #[doc = "0x20 - ADC Status and Control Register 1"]
        pub sc1i: SC1,
        #[doc = "0x24 - ADC Status and Control Register 1"]
        pub sc1j: SC1,
        #[doc = "0x28 - ADC Status and Control Register 1"]
        pub sc1k: SC1,
        #[doc = "0x2c - ADC Status and Control Register 1"]
        pub sc1l: SC1,
        #[doc = "0x30 - ADC Status and Control Register 1"]
        pub sc1m: SC1,
        #[doc = "0x34 - ADC Status and Control Register 1"]
        pub sc1n: SC1,
        #[doc = "0x38 - ADC Status and Control Register 1"]
        pub sc1o: SC1,
        #[doc = "0x3c - ADC Status and Control Register 1"]
        pub sc1p: SC1,
        #[doc = "0x40 - ADC Configuration Register 1"]
        pub cfg1: CFG1,
        #[doc = "0x44 - ADC Configuration Register 2"]
        pub cfg2: CFG2,
        #[doc = "0x48 - ADC Data Result Registers"]
        pub ra: R,
        #[doc = "0x4c - ADC Data Result Registers"]
        pub rb: R,
        #[doc = "0x50 - ADC Data Result Registers"]
        pub rc: R,
        #[doc = "0x54 - ADC Data Result Registers"]
        pub rd: R,
        #[doc = "0x58 - ADC Data Result Registers"]
        pub re: R,
        #[doc = "0x5c - ADC Data Result Registers"]
        pub rf: R,
        #[doc = "0x60 - ADC Data Result Registers"]
        pub rg: R,
        #[doc = "0x64 - ADC Data Result Registers"]
        pub rh: R,
        #[doc = "0x68 - ADC Data Result Registers"]
        pub ri: R,
        #[doc = "0x6c - ADC Data Result Registers"]
        pub rj: R,
        #[doc = "0x70 - ADC Data Result Registers"]
        pub rk: R,
        #[doc = "0x74 - ADC Data Result Registers"]
        pub rl: R,
        #[doc = "0x78 - ADC Data Result Registers"]
        pub rm: R,
        #[doc = "0x7c - ADC Data Result Registers"]
        pub rn: R,
        #[doc = "0x80 - ADC Data Result Registers"]
        pub ro: R,
        #[doc = "0x84 - ADC Data Result Registers"]
        pub rp: R,
        #[doc = "0x88 - Compare Value Registers"]
        pub cv1: CV,
        #[doc = "0x8c - Compare Value Registers"]
        pub cv2: CV,
        #[doc = "0x90 - Status and Control Register 2"]
        pub sc2: SC2,
        #[doc = "0x94 - Status and Control Register 3"]
        pub sc3: SC3,
        #[doc = "0x98 - BASE Offset Register"]
        pub base_ofs: BASE_OFS,
        #[doc = "0x9c - ADC Offset Correction Register"]
        pub ofs: OFS,
        #[doc = "0xa0 - USER Offset Correction Register"]
        pub usr_ofs: USR_OFS,
        #[doc = "0xa4 - ADC X Offset Correction Register"]
        pub xofs: XOFS,
        #[doc = "0xa8 - ADC Y Offset Correction Register"]
        pub yofs: YOFS,
        #[doc = "0xac - ADC Gain Register"]
        pub g: G,
        #[doc = "0xb0 - ADC User Gain Register"]
        pub ug: UG,
        #[doc = "0xb4 - ADC General Calibration Value Register S"]
        pub clps: CLPS,
        #[doc = "0xb8 - ADC Plus-Side General Calibration Value Register 3"]
        pub clp3: CLP3,
        #[doc = "0xbc - ADC Plus-Side General Calibration Value Register 2"]
        pub clp2: CLP2,
        #[doc = "0xc0 - ADC Plus-Side General Calibration Value Register 1"]
        pub clp1: CLP1,
        #[doc = "0xc4 - ADC Plus-Side General Calibration Value Register 0"]
        pub clp0: CLP0,
        #[doc = "0xc8 - ADC Plus-Side General Calibration Value Register X"]
        pub clpx: CLPX,
        #[doc = "0xcc - ADC Plus-Side General Calibration Value Register 9"]
        pub clp9: CLP9,
        #[doc = "0xd0 - ADC General Calibration Offset Value Register S"]
        pub clps_ofs: CLPS_OFS,
        #[doc = "0xd4 - ADC Plus-Side General Calibration Offset Value Register 3"]
        pub clp3_ofs: CLP3_OFS,
        #[doc = "0xd8 - ADC Plus-Side General Calibration Offset Value Register 2"]
        pub clp2_ofs: CLP2_OFS,
        #[doc = "0xdc - ADC Plus-Side General Calibration Offset Value Register 1"]
        pub clp1_ofs: CLP1_OFS,
        #[doc = "0xe0 - ADC Plus-Side General Calibration Offset Value Register 0"]
        pub clp0_ofs: CLP0_OFS,
        #[doc = "0xe4 - ADC Plus-Side General Calibration Offset Value Register X"]
        pub clpx_ofs: CLPX_OFS,
        #[doc = "0xe8 - ADC Plus-Side General Calibration Offset Value Register 9"]
        pub clp9_ofs: CLP9_OFS,
    }
    #[doc = "ADC Status and Control Register 1"]
    pub struct SC1 {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC Status and Control Register 1"]
    pub mod sc1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SC1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `ADCH`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ADCHR {
            #[doc = "Exernal channel 0 is selected as input."]
            _00000,
            #[doc = "Exernal channel 1 is selected as input."]
            _00001,
            #[doc = "Exernal channel 2 is selected as input."]
            _00010,
            #[doc = "Exernal channel 3 is selected as input."]
            _00011,
            #[doc = "Exernal channel 4 is selected as input."]
            _00100,
            #[doc = "Exernal channel 5 is selected as input."]
            _00101,
            #[doc = "Exernal channel 6 is selected as input."]
            _00110,
            #[doc = "Exernal channel 7 is selected as input."]
            _00111,
            #[doc = "Exernal channel 8 is selected as input."]
            _01000,
            #[doc = "Exernal channel 9 is selected as input."]
            _01001,
            #[doc = "Exernal channel 10 is selected as input."]
            _01010,
            #[doc = "Exernal channel 11 is selected as input."]
            _01011,
            #[doc = "Exernal channel 12 is selected as input."]
            _01100,
            #[doc = "Exernal channel 13 is selected as input."]
            _01101,
            #[doc = "Exernal channel 14 is selected as input."]
            _01110,
            #[doc = "Exernal channel 15 is selected as input."]
            _01111,
            #[doc = "Exernal channel 18 is selected as input."]
            _10010,
            #[doc = "Exernal channel 19 is selected as input."]
            _10011,
            #[doc = "Internal channel 0 is selected as input."]
            _10101,
            #[doc = "Internal channel 1 is selected as input."]
            _10110,
            #[doc = "Internal channel 2 is selected as input."]
            _10111,
            #[doc = "Temp Sensor"]
            _11010,
            #[doc = "Band Gap"]
            _11011,
            #[doc = "Internal channel 3 is selected as input."]
            _11100,
            #[doc = "VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL]."]
            _11101,
            #[doc = "VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL]."]
            _11110,
            #[doc = "Module is disabled"]
            _11111,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl ADCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    ADCHR::_00000 => 0,
                    ADCHR::_00001 => 1,
                    ADCHR::_00010 => 2,
                    ADCHR::_00011 => 3,
                    ADCHR::_00100 => 4,
                    ADCHR::_00101 => 5,
                    ADCHR::_00110 => 6,
                    ADCHR::_00111 => 7,
                    ADCHR::_01000 => 8,
                    ADCHR::_01001 => 9,
                    ADCHR::_01010 => 10,
                    ADCHR::_01011 => 11,
                    ADCHR::_01100 => 12,
                    ADCHR::_01101 => 13,
                    ADCHR::_01110 => 14,
                    ADCHR::_01111 => 15,
                    ADCHR::_10010 => 18,
                    ADCHR::_10011 => 19,
                    ADCHR::_10101 => 21,
                    ADCHR::_10110 => 22,
                    ADCHR::_10111 => 23,
                    ADCHR::_11010 => 26,
                    ADCHR::_11011 => 27,
                    ADCHR::_11100 => 28,
                    ADCHR::_11101 => 29,
                    ADCHR::_11110 => 30,
                    ADCHR::_11111 => 31,
                    ADCHR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> ADCHR {
                match value {
                    0 => ADCHR::_00000,
                    1 => ADCHR::_00001,
                    2 => ADCHR::_00010,
                    3 => ADCHR::_00011,
                    4 => ADCHR::_00100,
                    5 => ADCHR::_00101,
                    6 => ADCHR::_00110,
                    7 => ADCHR::_00111,
                    8 => ADCHR::_01000,
                    9 => ADCHR::_01001,
                    10 => ADCHR::_01010,
                    11 => ADCHR::_01011,
                    12 => ADCHR::_01100,
                    13 => ADCHR::_01101,
                    14 => ADCHR::_01110,
                    15 => ADCHR::_01111,
                    18 => ADCHR::_10010,
                    19 => ADCHR::_10011,
                    21 => ADCHR::_10101,
                    22 => ADCHR::_10110,
                    23 => ADCHR::_10111,
                    26 => ADCHR::_11010,
                    27 => ADCHR::_11011,
                    28 => ADCHR::_11100,
                    29 => ADCHR::_11101,
                    30 => ADCHR::_11110,
                    31 => ADCHR::_11111,
                    i => ADCHR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_00000`"]
            #[inline(always)]
            pub fn is_00000(&self) -> bool {
                *self == ADCHR::_00000
            }
            #[doc = "Checks if the value of the field is `_00001`"]
            #[inline(always)]
            pub fn is_00001(&self) -> bool {
                *self == ADCHR::_00001
            }
            #[doc = "Checks if the value of the field is `_00010`"]
            #[inline(always)]
            pub fn is_00010(&self) -> bool {
                *self == ADCHR::_00010
            }
            #[doc = "Checks if the value of the field is `_00011`"]
            #[inline(always)]
            pub fn is_00011(&self) -> bool {
                *self == ADCHR::_00011
            }
            #[doc = "Checks if the value of the field is `_00100`"]
            #[inline(always)]
            pub fn is_00100(&self) -> bool {
                *self == ADCHR::_00100
            }
            #[doc = "Checks if the value of the field is `_00101`"]
            #[inline(always)]
            pub fn is_00101(&self) -> bool {
                *self == ADCHR::_00101
            }
            #[doc = "Checks if the value of the field is `_00110`"]
            #[inline(always)]
            pub fn is_00110(&self) -> bool {
                *self == ADCHR::_00110
            }
            #[doc = "Checks if the value of the field is `_00111`"]
            #[inline(always)]
            pub fn is_00111(&self) -> bool {
                *self == ADCHR::_00111
            }
            #[doc = "Checks if the value of the field is `_01000`"]
            #[inline(always)]
            pub fn is_01000(&self) -> bool {
                *self == ADCHR::_01000
            }
            #[doc = "Checks if the value of the field is `_01001`"]
            #[inline(always)]
            pub fn is_01001(&self) -> bool {
                *self == ADCHR::_01001
            }
            #[doc = "Checks if the value of the field is `_01010`"]
            #[inline(always)]
            pub fn is_01010(&self) -> bool {
                *self == ADCHR::_01010
            }
            #[doc = "Checks if the value of the field is `_01011`"]
            #[inline(always)]
            pub fn is_01011(&self) -> bool {
                *self == ADCHR::_01011
            }
            #[doc = "Checks if the value of the field is `_01100`"]
            #[inline(always)]
            pub fn is_01100(&self) -> bool {
                *self == ADCHR::_01100
            }
            #[doc = "Checks if the value of the field is `_01101`"]
            #[inline(always)]
            pub fn is_01101(&self) -> bool {
                *self == ADCHR::_01101
            }
            #[doc = "Checks if the value of the field is `_01110`"]
            #[inline(always)]
            pub fn is_01110(&self) -> bool {
                *self == ADCHR::_01110
            }
            #[doc = "Checks if the value of the field is `_01111`"]
            #[inline(always)]
            pub fn is_01111(&self) -> bool {
                *self == ADCHR::_01111
            }
            #[doc = "Checks if the value of the field is `_10010`"]
            #[inline(always)]
            pub fn is_10010(&self) -> bool {
                *self == ADCHR::_10010
            }
            #[doc = "Checks if the value of the field is `_10011`"]
            #[inline(always)]
            pub fn is_10011(&self) -> bool {
                *self == ADCHR::_10011
            }
            #[doc = "Checks if the value of the field is `_10101`"]
            #[inline(always)]
            pub fn is_10101(&self) -> bool {
                *self == ADCHR::_10101
            }
            #[doc = "Checks if the value of the field is `_10110`"]
            #[inline(always)]
            pub fn is_10110(&self) -> bool {
                *self == ADCHR::_10110
            }
            #[doc = "Checks if the value of the field is `_10111`"]
            #[inline(always)]
            pub fn is_10111(&self) -> bool {
                *self == ADCHR::_10111
            }
            #[doc = "Checks if the value of the field is `_11010`"]
            #[inline(always)]
            pub fn is_11010(&self) -> bool {
                *self == ADCHR::_11010
            }
            #[doc = "Checks if the value of the field is `_11011`"]
            #[inline(always)]
            pub fn is_11011(&self) -> bool {
                *self == ADCHR::_11011
            }
            #[doc = "Checks if the value of the field is `_11100`"]
            #[inline(always)]
            pub fn is_11100(&self) -> bool {
                *self == ADCHR::_11100
            }
            #[doc = "Checks if the value of the field is `_11101`"]
            #[inline(always)]
            pub fn is_11101(&self) -> bool {
                *self == ADCHR::_11101
            }
            #[doc = "Checks if the value of the field is `_11110`"]
            #[inline(always)]
            pub fn is_11110(&self) -> bool {
                *self == ADCHR::_11110
            }
            #[doc = "Checks if the value of the field is `_11111`"]
            #[inline(always)]
            pub fn is_11111(&self) -> bool {
                *self == ADCHR::_11111
            }
        }
        #[doc = "Possible values of the field `AIEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum AIENR {
            #[doc = "Conversion complete interrupt is disabled."]
            _0,
            #[doc = "Conversion complete interrupt is enabled."]
            _1,
        }
        impl AIENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    AIENR::_0 => false,
                    AIENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> AIENR {
                match value {
                    false => AIENR::_0,
                    true => AIENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == AIENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == AIENR::_1
            }
        }
        #[doc = "Possible values of the field `COCO`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum COCOR {
            #[doc = "Conversion is not completed."]
            _0,
            #[doc = "Conversion is completed."]
            _1,
        }
        impl COCOR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    COCOR::_0 => false,
                    COCOR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> COCOR {
                match value {
                    false => COCOR::_0,
                    true => COCOR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == COCOR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == COCOR::_1
            }
        }
        #[doc = "Values that can be written to the field `ADCH`"]
        pub enum ADCHW {
            #[doc = "Exernal channel 0 is selected as input."]
            _00000,
            #[doc = "Exernal channel 1 is selected as input."]
            _00001,
            #[doc = "Exernal channel 2 is selected as input."]
            _00010,
            #[doc = "Exernal channel 3 is selected as input."]
            _00011,
            #[doc = "Exernal channel 4 is selected as input."]
            _00100,
            #[doc = "Exernal channel 5 is selected as input."]
            _00101,
            #[doc = "Exernal channel 6 is selected as input."]
            _00110,
            #[doc = "Exernal channel 7 is selected as input."]
            _00111,
            #[doc = "Exernal channel 8 is selected as input."]
            _01000,
            #[doc = "Exernal channel 9 is selected as input."]
            _01001,
            #[doc = "Exernal channel 10 is selected as input."]
            _01010,
            #[doc = "Exernal channel 11 is selected as input."]
            _01011,
            #[doc = "Exernal channel 12 is selected as input."]
            _01100,
            #[doc = "Exernal channel 13 is selected as input."]
            _01101,
            #[doc = "Exernal channel 14 is selected as input."]
            _01110,
            #[doc = "Exernal channel 15 is selected as input."]
            _01111,
            #[doc = "Exernal channel 18 is selected as input."]
            _10010,
            #[doc = "Exernal channel 19 is selected as input."]
            _10011,
            #[doc = "Internal channel 0 is selected as input."]
            _10101,
            #[doc = "Internal channel 1 is selected as input."]
            _10110,
            #[doc = "Internal channel 2 is selected as input."]
            _10111,
            #[doc = "Temp Sensor"]
            _11010,
            #[doc = "Band Gap"]
            _11011,
            #[doc = "Internal channel 3 is selected as input."]
            _11100,
            #[doc = "VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL]."]
            _11101,
            #[doc = "VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL]."]
            _11110,
            #[doc = "Module is disabled"]
            _11111,
        }
        impl ADCHW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    ADCHW::_00000 => 0,
                    ADCHW::_00001 => 1,
                    ADCHW::_00010 => 2,
                    ADCHW::_00011 => 3,
                    ADCHW::_00100 => 4,
                    ADCHW::_00101 => 5,
                    ADCHW::_00110 => 6,
                    ADCHW::_00111 => 7,
                    ADCHW::_01000 => 8,
                    ADCHW::_01001 => 9,
                    ADCHW::_01010 => 10,
                    ADCHW::_01011 => 11,
                    ADCHW::_01100 => 12,
                    ADCHW::_01101 => 13,
                    ADCHW::_01110 => 14,
                    ADCHW::_01111 => 15,
                    ADCHW::_10010 => 18,
                    ADCHW::_10011 => 19,
                    ADCHW::_10101 => 21,
                    ADCHW::_10110 => 22,
                    ADCHW::_10111 => 23,
                    ADCHW::_11010 => 26,
                    ADCHW::_11011 => 27,
                    ADCHW::_11100 => 28,
                    ADCHW::_11101 => 29,
                    ADCHW::_11110 => 30,
                    ADCHW::_11111 => 31,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ADCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ADCHW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ADCHW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Exernal channel 0 is selected as input."]
            #[inline(always)]
            pub fn _00000(self) -> &'a mut W {
                self.variant(ADCHW::_00000)
            }
            #[doc = "Exernal channel 1 is selected as input."]
            #[inline(always)]
            pub fn _00001(self) -> &'a mut W {
                self.variant(ADCHW::_00001)
            }
            #[doc = "Exernal channel 2 is selected as input."]
            #[inline(always)]
            pub fn _00010(self) -> &'a mut W {
                self.variant(ADCHW::_00010)
            }
            #[doc = "Exernal channel 3 is selected as input."]
            #[inline(always)]
            pub fn _00011(self) -> &'a mut W {
                self.variant(ADCHW::_00011)
            }
            #[doc = "Exernal channel 4 is selected as input."]
            #[inline(always)]
            pub fn _00100(self) -> &'a mut W {
                self.variant(ADCHW::_00100)
            }
            #[doc = "Exernal channel 5 is selected as input."]
            #[inline(always)]
            pub fn _00101(self) -> &'a mut W {
                self.variant(ADCHW::_00101)
            }
            #[doc = "Exernal channel 6 is selected as input."]
            #[inline(always)]
            pub fn _00110(self) -> &'a mut W {
                self.variant(ADCHW::_00110)
            }
            #[doc = "Exernal channel 7 is selected as input."]
            #[inline(always)]
            pub fn _00111(self) -> &'a mut W {
                self.variant(ADCHW::_00111)
            }
            #[doc = "Exernal channel 8 is selected as input."]
            #[inline(always)]
            pub fn _01000(self) -> &'a mut W {
                self.variant(ADCHW::_01000)
            }
            #[doc = "Exernal channel 9 is selected as input."]
            #[inline(always)]
            pub fn _01001(self) -> &'a mut W {
                self.variant(ADCHW::_01001)
            }
            #[doc = "Exernal channel 10 is selected as input."]
            #[inline(always)]
            pub fn _01010(self) -> &'a mut W {
                self.variant(ADCHW::_01010)
            }
            #[doc = "Exernal channel 11 is selected as input."]
            #[inline(always)]
            pub fn _01011(self) -> &'a mut W {
                self.variant(ADCHW::_01011)
            }
            #[doc = "Exernal channel 12 is selected as input."]
            #[inline(always)]
            pub fn _01100(self) -> &'a mut W {
                self.variant(ADCHW::_01100)
            }
            #[doc = "Exernal channel 13 is selected as input."]
            #[inline(always)]
            pub fn _01101(self) -> &'a mut W {
                self.variant(ADCHW::_01101)
            }
            #[doc = "Exernal channel 14 is selected as input."]
            #[inline(always)]
            pub fn _01110(self) -> &'a mut W {
                self.variant(ADCHW::_01110)
            }
            #[doc = "Exernal channel 15 is selected as input."]
            #[inline(always)]
            pub fn _01111(self) -> &'a mut W {
                self.variant(ADCHW::_01111)
            }
            #[doc = "Exernal channel 18 is selected as input."]
            #[inline(always)]
            pub fn _10010(self) -> &'a mut W {
                self.variant(ADCHW::_10010)
            }
            #[doc = "Exernal channel 19 is selected as input."]
            #[inline(always)]
            pub fn _10011(self) -> &'a mut W {
                self.variant(ADCHW::_10011)
            }
            #[doc = "Internal channel 0 is selected as input."]
            #[inline(always)]
            pub fn _10101(self) -> &'a mut W {
                self.variant(ADCHW::_10101)
            }
            #[doc = "Internal channel 1 is selected as input."]
            #[inline(always)]
            pub fn _10110(self) -> &'a mut W {
                self.variant(ADCHW::_10110)
            }
            #[doc = "Internal channel 2 is selected as input."]
            #[inline(always)]
            pub fn _10111(self) -> &'a mut W {
                self.variant(ADCHW::_10111)
            }
            #[doc = "Temp Sensor"]
            #[inline(always)]
            pub fn _11010(self) -> &'a mut W {
                self.variant(ADCHW::_11010)
            }
            #[doc = "Band Gap"]
            #[inline(always)]
            pub fn _11011(self) -> &'a mut W {
                self.variant(ADCHW::_11011)
            }
            #[doc = "Internal channel 3 is selected as input."]
            #[inline(always)]
            pub fn _11100(self) -> &'a mut W {
                self.variant(ADCHW::_11100)
            }
            #[doc = "VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL]."]
            #[inline(always)]
            pub fn _11101(self) -> &'a mut W {
                self.variant(ADCHW::_11101)
            }
            #[doc = "VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL]."]
            #[inline(always)]
            pub fn _11110(self) -> &'a mut W {
                self.variant(ADCHW::_11110)
            }
            #[doc = "Module is disabled"]
            #[inline(always)]
            pub fn _11111(self) -> &'a mut W {
                self.variant(ADCHW::_11111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `AIEN`"]
        pub enum AIENW {
            #[doc = "Conversion complete interrupt is disabled."]
            _0,
            #[doc = "Conversion complete interrupt is enabled."]
            _1,
        }
        impl AIENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    AIENW::_0 => false,
                    AIENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _AIENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _AIENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: AIENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Conversion complete interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(AIENW::_0)
            }
            #[doc = "Conversion complete interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(AIENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:4 - Input channel select"]
            #[inline(always)]
            pub fn adch(&self) -> ADCHR {
                ADCHR::_from({
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 6 - Interrupt Enable"]
            #[inline(always)]
            pub fn aien(&self) -> AIENR {
                AIENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Conversion Complete Flag"]
            #[inline(always)]
            pub fn coco(&self) -> COCOR {
                COCOR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 31 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:4 - Input channel select"]
            #[inline(always)]
            pub fn adch(&mut self) -> _ADCHW {
                _ADCHW { w: self }
            }
            #[doc = "Bit 6 - Interrupt Enable"]
            #[inline(always)]
            pub fn aien(&mut self) -> _AIENW {
                _AIENW { w: self }
            }
        }
    }
    #[doc = "ADC Configuration Register 1"]
    pub struct CFG1 {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC Configuration Register 1"]
    pub mod cfg1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CFG1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `ADICLK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ADICLKR {
            #[doc = "Alternate clock 1 (ADC_ALTCLK1)"]
            _00,
            #[doc = "Alternate clock 2 (ADC_ALTCLK2)"]
            _01,
            #[doc = "Alternate clock 3 (ADC_ALTCLK3)"]
            _10,
            #[doc = "Alternate clock 4 (ADC_ALTCLK4)"]
            _11,
        }
        impl ADICLKR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    ADICLKR::_00 => 0,
                    ADICLKR::_01 => 1,
                    ADICLKR::_10 => 2,
                    ADICLKR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> ADICLKR {
                match value {
                    0 => ADICLKR::_00,
                    1 => ADICLKR::_01,
                    2 => ADICLKR::_10,
                    3 => ADICLKR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == ADICLKR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == ADICLKR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == ADICLKR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == ADICLKR::_11
            }
        }
        #[doc = "Possible values of the field `MODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MODER {
            #[doc = "8-bit conversion."]
            _00,
            #[doc = "12-bit conversion."]
            _01,
            #[doc = "10-bit conversion."]
            _10,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl MODER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MODER::_00 => 0,
                    MODER::_01 => 1,
                    MODER::_10 => 2,
                    MODER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MODER {
                match value {
                    0 => MODER::_00,
                    1 => MODER::_01,
                    2 => MODER::_10,
                    i => MODER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == MODER::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == MODER::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == MODER::_10
            }
        }
        #[doc = "Possible values of the field `ADIV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ADIVR {
            #[doc = "The divide ratio is 1 and the clock rate is input clock."]
            _00,
            #[doc = "The divide ratio is 2 and the clock rate is (input clock)/2."]
            _01,
            #[doc = "The divide ratio is 4 and the clock rate is (input clock)/4."]
            _10,
            #[doc = "The divide ratio is 8 and the clock rate is (input clock)/8."]
            _11,
        }
        impl ADIVR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    ADIVR::_00 => 0,
                    ADIVR::_01 => 1,
                    ADIVR::_10 => 2,
                    ADIVR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> ADIVR {
                match value {
                    0 => ADIVR::_00,
                    1 => ADIVR::_01,
                    2 => ADIVR::_10,
                    3 => ADIVR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == ADIVR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == ADIVR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == ADIVR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == ADIVR::_11
            }
        }
        #[doc = "Values that can be written to the field `ADICLK`"]
        pub enum ADICLKW {
            #[doc = "Alternate clock 1 (ADC_ALTCLK1)"]
            _00,
            #[doc = "Alternate clock 2 (ADC_ALTCLK2)"]
            _01,
            #[doc = "Alternate clock 3 (ADC_ALTCLK3)"]
            _10,
            #[doc = "Alternate clock 4 (ADC_ALTCLK4)"]
            _11,
        }
        impl ADICLKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    ADICLKW::_00 => 0,
                    ADICLKW::_01 => 1,
                    ADICLKW::_10 => 2,
                    ADICLKW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ADICLKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ADICLKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ADICLKW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Alternate clock 1 (ADC_ALTCLK1)"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(ADICLKW::_00)
            }
            #[doc = "Alternate clock 2 (ADC_ALTCLK2)"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(ADICLKW::_01)
            }
            #[doc = "Alternate clock 3 (ADC_ALTCLK3)"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(ADICLKW::_10)
            }
            #[doc = "Alternate clock 4 (ADC_ALTCLK4)"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(ADICLKW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MODE`"]
        pub enum MODEW {
            #[doc = "8-bit conversion."]
            _00,
            #[doc = "12-bit conversion."]
            _01,
            #[doc = "10-bit conversion."]
            _10,
        }
        impl MODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MODEW::_00 => 0,
                    MODEW::_01 => 1,
                    MODEW::_10 => 2,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MODEW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "8-bit conversion."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(MODEW::_00)
            }
            #[doc = "12-bit conversion."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(MODEW::_01)
            }
            #[doc = "10-bit conversion."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(MODEW::_10)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ADIV`"]
        pub enum ADIVW {
            #[doc = "The divide ratio is 1 and the clock rate is input clock."]
            _00,
            #[doc = "The divide ratio is 2 and the clock rate is (input clock)/2."]
            _01,
            #[doc = "The divide ratio is 4 and the clock rate is (input clock)/4."]
            _10,
            #[doc = "The divide ratio is 8 and the clock rate is (input clock)/8."]
            _11,
        }
        impl ADIVW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    ADIVW::_00 => 0,
                    ADIVW::_01 => 1,
                    ADIVW::_10 => 2,
                    ADIVW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ADIVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ADIVW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ADIVW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "The divide ratio is 1 and the clock rate is input clock."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(ADIVW::_00)
            }
            #[doc = "The divide ratio is 2 and the clock rate is (input clock)/2."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(ADIVW::_01)
            }
            #[doc = "The divide ratio is 4 and the clock rate is (input clock)/4."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(ADIVW::_10)
            }
            #[doc = "The divide ratio is 8 and the clock rate is (input clock)/8."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(ADIVW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLRLTRGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLRLTRGW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:1 - Input Clock Select"]
            #[inline(always)]
            pub fn adiclk(&self) -> ADICLKR {
                ADICLKR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 2:3 - Conversion mode selection"]
            #[inline(always)]
            pub fn mode(&self) -> MODER {
                MODER::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 5:6 - Clock Divide Select"]
            #[inline(always)]
            pub fn adiv(&self) -> ADIVR {
                ADIVR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:1 - Input Clock Select"]
            #[inline(always)]
            pub fn adiclk(&mut self) -> _ADICLKW {
                _ADICLKW { w: self }
            }
            #[doc = "Bits 2:3 - Conversion mode selection"]
            #[inline(always)]
            pub fn mode(&mut self) -> _MODEW {
                _MODEW { w: self }
            }
            #[doc = "Bits 5:6 - Clock Divide Select"]
            #[inline(always)]
            pub fn adiv(&mut self) -> _ADIVW {
                _ADIVW { w: self }
            }
            #[doc = "Bit 8 - Clear Latch Trigger in Trigger Handler Block"]
            #[inline(always)]
            pub fn clrltrg(&mut self) -> _CLRLTRGW {
                _CLRLTRGW { w: self }
            }
        }
    }
    #[doc = "ADC Configuration Register 2"]
    pub struct CFG2 {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC Configuration Register 2"]
    pub mod cfg2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CFG2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SMPLTSR {
            bits: u8,
        }
        impl SMPLTSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMPLTSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMPLTSW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Sample Time Select"]
            #[inline(always)]
            pub fn smplts(&self) -> SMPLTSR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SMPLTSR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 12 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Sample Time Select"]
            #[inline(always)]
            pub fn smplts(&mut self) -> _SMPLTSW {
                _SMPLTSW { w: self }
            }
        }
    }
    #[doc = "ADC Data Result Registers"]
    pub struct R {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC Data Result Registers"]
    pub mod r {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::R {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DR {
            bits: u16,
        }
        impl DR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:11 - Data result"]
            #[inline(always)]
            pub fn d(&self) -> DR {
                let bits = {
                    const MASK: u16 = 4095;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                DR { bits }
            }
        }
    }
    #[doc = "Compare Value Registers"]
    pub struct CV {
        register: VolatileCell<u32>,
    }
    #[doc = "Compare Value Registers"]
    pub mod cv {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CV {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CVR {
            bits: u16,
        }
        impl CVR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CVW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Compare Value."]
            #[inline(always)]
            pub fn cv(&self) -> CVR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                CVR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Compare Value."]
            #[inline(always)]
            pub fn cv(&mut self) -> _CVW {
                _CVW { w: self }
            }
        }
    }
    #[doc = "Status and Control Register 2"]
    pub struct SC2 {
        register: VolatileCell<u32>,
    }
    #[doc = "Status and Control Register 2"]
    pub mod sc2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SC2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `REFSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum REFSELR {
            #[doc = "Default voltage reference pin pair, that is, external pins VREFH and VREFL"]
            _00,
            #[doc = "Alternate reference voltage, that is, VALTH. This voltage may be additional external pin or internal source depending on the MCU configuration. See the chip configuration information for details specific to this MCU."]
            _01,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl REFSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    REFSELR::_00 => 0,
                    REFSELR::_01 => 1,
                    REFSELR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> REFSELR {
                match value {
                    0 => REFSELR::_00,
                    1 => REFSELR::_01,
                    i => REFSELR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == REFSELR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == REFSELR::_01
            }
        }
        #[doc = "Possible values of the field `DMAEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMAENR {
            #[doc = "DMA is disabled."]
            _0,
            #[doc = "DMA is enabled and will assert the ADC DMA request during an ADC conversion complete event , which is indicated when any SC1n[COCO] flag is asserted."]
            _1,
        }
        impl DMAENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMAENR::_0 => false,
                    DMAENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMAENR {
                match value {
                    false => DMAENR::_0,
                    true => DMAENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMAENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMAENR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ACRENR {
            bits: bool,
        }
        impl ACRENR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct ACFGTR {
            bits: bool,
        }
        impl ACFGTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `ACFE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ACFER {
            #[doc = "Compare function disabled."]
            _0,
            #[doc = "Compare function enabled."]
            _1,
        }
        impl ACFER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ACFER::_0 => false,
                    ACFER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ACFER {
                match value {
                    false => ACFER::_0,
                    true => ACFER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ACFER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ACFER::_1
            }
        }
        #[doc = "Possible values of the field `ADTRG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ADTRGR {
            #[doc = "Software trigger selected."]
            _0,
            #[doc = "Hardware trigger selected."]
            _1,
        }
        impl ADTRGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ADTRGR::_0 => false,
                    ADTRGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ADTRGR {
                match value {
                    false => ADTRGR::_0,
                    true => ADTRGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ADTRGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ADTRGR::_1
            }
        }
        #[doc = "Possible values of the field `ADACT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ADACTR {
            #[doc = "Conversion not in progress."]
            _0,
            #[doc = "Conversion in progress."]
            _1,
        }
        impl ADACTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ADACTR::_0 => false,
                    ADACTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ADACTR {
                match value {
                    false => ADACTR::_0,
                    true => ADACTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ADACTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ADACTR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct TRGPRNUMR {
            bits: u8,
        }
        impl TRGPRNUMR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `TRGSTLAT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRGSTLATR {
            #[doc = "No trigger request has been latched"]
            _0,
            #[doc = "A trigger request has been latched"]
            _1,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl TRGSTLATR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TRGSTLATR::_0 => 0,
                    TRGSTLATR::_1 => 1,
                    TRGSTLATR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TRGSTLATR {
                match value {
                    0 => TRGSTLATR::_0,
                    1 => TRGSTLATR::_1,
                    i => TRGSTLATR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRGSTLATR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRGSTLATR::_1
            }
        }
        #[doc = "Possible values of the field `TRGSTERR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRGSTERRR {
            #[doc = "No error has occurred"]
            _0,
            #[doc = "An error has occurred"]
            _1,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl TRGSTERRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TRGSTERRR::_0 => 0,
                    TRGSTERRR::_1 => 1,
                    TRGSTERRR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TRGSTERRR {
                match value {
                    0 => TRGSTERRR::_0,
                    1 => TRGSTERRR::_1,
                    i => TRGSTERRR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRGSTERRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRGSTERRR::_1
            }
        }
        #[doc = "Values that can be written to the field `REFSEL`"]
        pub enum REFSELW {
            #[doc = "Default voltage reference pin pair, that is, external pins VREFH and VREFL"]
            _00,
            #[doc = "Alternate reference voltage, that is, VALTH. This voltage may be additional external pin or internal source depending on the MCU configuration. See the chip configuration information for details specific to this MCU."]
            _01,
        }
        impl REFSELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    REFSELW::_00 => 0,
                    REFSELW::_01 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _REFSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _REFSELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: REFSELW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Default voltage reference pin pair, that is, external pins VREFH and VREFL"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(REFSELW::_00)
            }
            #[doc = "Alternate reference voltage, that is, VALTH. This voltage may be additional external pin or internal source depending on the MCU configuration. See the chip configuration information for details specific to this MCU."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(REFSELW::_01)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMAEN`"]
        pub enum DMAENW {
            #[doc = "DMA is disabled."]
            _0,
            #[doc = "DMA is enabled and will assert the ADC DMA request during an ADC conversion complete event , which is indicated when any SC1n[COCO] flag is asserted."]
            _1,
        }
        impl DMAENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMAENW::_0 => false,
                    DMAENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMAENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMAENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMAENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMAENW::_0)
            }
            #[doc = "DMA is enabled and will assert the ADC DMA request during an ADC conversion complete event , which is indicated when any SC1n[COCO] flag is asserted."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMAENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ACRENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ACRENW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ACFGTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ACFGTW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ACFE`"]
        pub enum ACFEW {
            #[doc = "Compare function disabled."]
            _0,
            #[doc = "Compare function enabled."]
            _1,
        }
        impl ACFEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ACFEW::_0 => false,
                    ACFEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ACFEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ACFEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ACFEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Compare function disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ACFEW::_0)
            }
            #[doc = "Compare function enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ACFEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ADTRG`"]
        pub enum ADTRGW {
            #[doc = "Software trigger selected."]
            _0,
            #[doc = "Hardware trigger selected."]
            _1,
        }
        impl ADTRGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ADTRGW::_0 => false,
                    ADTRGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ADTRGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ADTRGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ADTRGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Software trigger selected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ADTRGW::_0)
            }
            #[doc = "Hardware trigger selected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ADTRGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:1 - Voltage Reference Selection"]
            #[inline(always)]
            pub fn refsel(&self) -> REFSELR {
                REFSELR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 2 - DMA Enable"]
            #[inline(always)]
            pub fn dmaen(&self) -> DMAENR {
                DMAENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Compare Function Range Enable"]
            #[inline(always)]
            pub fn acren(&self) -> ACRENR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ACRENR { bits }
            }
            #[doc = "Bit 4 - Compare Function Greater Than Enable"]
            #[inline(always)]
            pub fn acfgt(&self) -> ACFGTR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ACFGTR { bits }
            }
            #[doc = "Bit 5 - Compare Function Enable"]
            #[inline(always)]
            pub fn acfe(&self) -> ACFER {
                ACFER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Conversion Trigger Select"]
            #[inline(always)]
            pub fn adtrg(&self) -> ADTRGR {
                ADTRGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Conversion Active"]
            #[inline(always)]
            pub fn adact(&self) -> ADACTR {
                ADACTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 13:14 - Trigger Process Number"]
            #[inline(always)]
            pub fn trgprnum(&self) -> TRGPRNUMR {
                let bits = {
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TRGPRNUMR { bits }
            }
            #[doc = "Bits 16:19 - Trigger Status"]
            #[inline(always)]
            pub fn trgstlat(&self) -> TRGSTLATR {
                TRGSTLATR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 24:27 - Error in Multiplexed Trigger Request"]
            #[inline(always)]
            pub fn trgsterr(&self) -> TRGSTERRR {
                TRGSTERRR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:1 - Voltage Reference Selection"]
            #[inline(always)]
            pub fn refsel(&mut self) -> _REFSELW {
                _REFSELW { w: self }
            }
            #[doc = "Bit 2 - DMA Enable"]
            #[inline(always)]
            pub fn dmaen(&mut self) -> _DMAENW {
                _DMAENW { w: self }
            }
            #[doc = "Bit 3 - Compare Function Range Enable"]
            #[inline(always)]
            pub fn acren(&mut self) -> _ACRENW {
                _ACRENW { w: self }
            }
            #[doc = "Bit 4 - Compare Function Greater Than Enable"]
            #[inline(always)]
            pub fn acfgt(&mut self) -> _ACFGTW {
                _ACFGTW { w: self }
            }
            #[doc = "Bit 5 - Compare Function Enable"]
            #[inline(always)]
            pub fn acfe(&mut self) -> _ACFEW {
                _ACFEW { w: self }
            }
            #[doc = "Bit 6 - Conversion Trigger Select"]
            #[inline(always)]
            pub fn adtrg(&mut self) -> _ADTRGW {
                _ADTRGW { w: self }
            }
        }
    }
    #[doc = "Status and Control Register 3"]
    pub struct SC3 {
        register: VolatileCell<u32>,
    }
    #[doc = "Status and Control Register 3"]
    pub mod sc3 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SC3 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `AVGS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum AVGSR {
            #[doc = "4 samples averaged."]
            _00,
            #[doc = "8 samples averaged."]
            _01,
            #[doc = "16 samples averaged."]
            _10,
            #[doc = "32 samples averaged."]
            _11,
        }
        impl AVGSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    AVGSR::_00 => 0,
                    AVGSR::_01 => 1,
                    AVGSR::_10 => 2,
                    AVGSR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> AVGSR {
                match value {
                    0 => AVGSR::_00,
                    1 => AVGSR::_01,
                    2 => AVGSR::_10,
                    3 => AVGSR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == AVGSR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == AVGSR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == AVGSR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == AVGSR::_11
            }
        }
        #[doc = "Possible values of the field `AVGE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum AVGER {
            #[doc = "Hardware average function disabled."]
            _0,
            #[doc = "Hardware average function enabled."]
            _1,
        }
        impl AVGER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    AVGER::_0 => false,
                    AVGER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> AVGER {
                match value {
                    false => AVGER::_0,
                    true => AVGER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == AVGER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == AVGER::_1
            }
        }
        #[doc = "Possible values of the field `ADCO`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ADCOR {
            #[doc = "One conversion will be performed (or one set of conversions, if AVGE is set) after a conversion is initiated."]
            _0,
            #[doc = "Continuous conversions will be performed (or continuous sets of conversions, if AVGE is set) after a conversion is initiated."]
            _1,
        }
        impl ADCOR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ADCOR::_0 => false,
                    ADCOR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ADCOR {
                match value {
                    false => ADCOR::_0,
                    true => ADCOR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ADCOR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ADCOR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct CALR {
            bits: bool,
        }
        impl CALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Values that can be written to the field `AVGS`"]
        pub enum AVGSW {
            #[doc = "4 samples averaged."]
            _00,
            #[doc = "8 samples averaged."]
            _01,
            #[doc = "16 samples averaged."]
            _10,
            #[doc = "32 samples averaged."]
            _11,
        }
        impl AVGSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    AVGSW::_00 => 0,
                    AVGSW::_01 => 1,
                    AVGSW::_10 => 2,
                    AVGSW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _AVGSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _AVGSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: AVGSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "4 samples averaged."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(AVGSW::_00)
            }
            #[doc = "8 samples averaged."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(AVGSW::_01)
            }
            #[doc = "16 samples averaged."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(AVGSW::_10)
            }
            #[doc = "32 samples averaged."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(AVGSW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `AVGE`"]
        pub enum AVGEW {
            #[doc = "Hardware average function disabled."]
            _0,
            #[doc = "Hardware average function enabled."]
            _1,
        }
        impl AVGEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    AVGEW::_0 => false,
                    AVGEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _AVGEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _AVGEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: AVGEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Hardware average function disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(AVGEW::_0)
            }
            #[doc = "Hardware average function enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(AVGEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ADCO`"]
        pub enum ADCOW {
            #[doc = "One conversion will be performed (or one set of conversions, if AVGE is set) after a conversion is initiated."]
            _0,
            #[doc = "Continuous conversions will be performed (or continuous sets of conversions, if AVGE is set) after a conversion is initiated."]
            _1,
        }
        impl ADCOW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ADCOW::_0 => false,
                    ADCOW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ADCOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ADCOW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ADCOW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "One conversion will be performed (or one set of conversions, if AVGE is set) after a conversion is initiated."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ADCOW::_0)
            }
            #[doc = "Continuous conversions will be performed (or continuous sets of conversions, if AVGE is set) after a conversion is initiated."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ADCOW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CALW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:1 - Hardware Average Select"]
            #[inline(always)]
            pub fn avgs(&self) -> AVGSR {
                AVGSR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 2 - Hardware Average Enable"]
            #[inline(always)]
            pub fn avge(&self) -> AVGER {
                AVGER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Continuous Conversion Enable"]
            #[inline(always)]
            pub fn adco(&self) -> ADCOR {
                ADCOR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Calibration"]
            #[inline(always)]
            pub fn cal(&self) -> CALR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                CALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:1 - Hardware Average Select"]
            #[inline(always)]
            pub fn avgs(&mut self) -> _AVGSW {
                _AVGSW { w: self }
            }
            #[doc = "Bit 2 - Hardware Average Enable"]
            #[inline(always)]
            pub fn avge(&mut self) -> _AVGEW {
                _AVGEW { w: self }
            }
            #[doc = "Bit 3 - Continuous Conversion Enable"]
            #[inline(always)]
            pub fn adco(&mut self) -> _ADCOW {
                _ADCOW { w: self }
            }
            #[doc = "Bit 7 - Calibration"]
            #[inline(always)]
            pub fn cal(&mut self) -> _CALW {
                _CALW { w: self }
            }
        }
    }
    #[doc = "BASE Offset Register"]
    pub struct BASE_OFS {
        register: VolatileCell<u32>,
    }
    #[doc = "BASE Offset Register"]
    pub mod base_ofs {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::BASE_OFS {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BA_OFSR {
            bits: u8,
        }
        impl BA_OFSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _BA_OFSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BA_OFSW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Base Offset Error Correction Value"]
            #[inline(always)]
            pub fn ba_ofs(&self) -> BA_OFSR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BA_OFSR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 64 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Base Offset Error Correction Value"]
            #[inline(always)]
            pub fn ba_ofs(&mut self) -> _BA_OFSW {
                _BA_OFSW { w: self }
            }
        }
    }
    #[doc = "ADC Offset Correction Register"]
    pub struct OFS {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC Offset Correction Register"]
    pub mod ofs {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::OFS {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct OFSR {
            bits: u16,
        }
        impl OFSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _OFSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _OFSW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Offset Error Correction Value"]
            #[inline(always)]
            pub fn ofs(&self) -> OFSR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                OFSR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Offset Error Correction Value"]
            #[inline(always)]
            pub fn ofs(&mut self) -> _OFSW {
                _OFSW { w: self }
            }
        }
    }
    #[doc = "USER Offset Correction Register"]
    pub struct USR_OFS {
        register: VolatileCell<u32>,
    }
    #[doc = "USER Offset Correction Register"]
    pub mod usr_ofs {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::USR_OFS {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct USR_OFSR {
            bits: u8,
        }
        impl USR_OFSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _USR_OFSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _USR_OFSW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - USER Offset Error Correction Value"]
            #[inline(always)]
            pub fn usr_ofs(&self) -> USR_OFSR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                USR_OFSR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - USER Offset Error Correction Value"]
            #[inline(always)]
            pub fn usr_ofs(&mut self) -> _USR_OFSW {
                _USR_OFSW { w: self }
            }
        }
    }
    #[doc = "ADC X Offset Correction Register"]
    pub struct XOFS {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC X Offset Correction Register"]
    pub mod xofs {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::XOFS {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct XOFSR {
            bits: u8,
        }
        impl XOFSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _XOFSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _XOFSW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - X offset error correction value"]
            #[inline(always)]
            pub fn xofs(&self) -> XOFSR {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                XOFSR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 48 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - X offset error correction value"]
            #[inline(always)]
            pub fn xofs(&mut self) -> _XOFSW {
                _XOFSW { w: self }
            }
        }
    }
    #[doc = "ADC Y Offset Correction Register"]
    pub struct YOFS {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC Y Offset Correction Register"]
    pub mod yofs {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::YOFS {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct YOFSR {
            bits: u8,
        }
        impl YOFSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _YOFSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _YOFSW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Y offset error correction value"]
            #[inline(always)]
            pub fn yofs(&self) -> YOFSR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                YOFSR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 55 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Y offset error correction value"]
            #[inline(always)]
            pub fn yofs(&mut self) -> _YOFSW {
                _YOFSW { w: self }
            }
        }
    }
    #[doc = "ADC Gain Register"]
    pub struct G {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC Gain Register"]
    pub mod g {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::G {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct GR {
            bits: u16,
        }
        impl GR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _GW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 2047;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:10 - Gain error adjustment factor for the overall conversion"]
            #[inline(always)]
            pub fn g(&self) -> GR {
                let bits = {
                    const MASK: u16 = 2047;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                GR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 752 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:10 - Gain error adjustment factor for the overall conversion"]
            #[inline(always)]
            pub fn g(&mut self) -> _GW {
                _GW { w: self }
            }
        }
    }
    #[doc = "ADC User Gain Register"]
    pub struct UG {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC User Gain Register"]
    pub mod ug {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::UG {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct UGR {
            bits: u16,
        }
        impl UGR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _UGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _UGW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 1023;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:9 - User gain error correction value"]
            #[inline(always)]
            pub fn ug(&self) -> UGR {
                let bits = {
                    const MASK: u16 = 1023;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                UGR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 4 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:9 - User gain error correction value"]
            #[inline(always)]
            pub fn ug(&mut self) -> _UGW {
                _UGW { w: self }
            }
        }
    }
    #[doc = "ADC General Calibration Value Register S"]
    pub struct CLPS {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC General Calibration Value Register S"]
    pub mod clps {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CLPS {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CLPSR {
            bits: u8,
        }
        impl CLPSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLPSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLPSW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 127;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:6 - Calibration Value"]
            #[inline(always)]
            pub fn clps(&self) -> CLPSR {
                let bits = {
                    const MASK: u8 = 127;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CLPSR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 46 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:6 - Calibration Value"]
            #[inline(always)]
            pub fn clps(&mut self) -> _CLPSW {
                _CLPSW { w: self }
            }
        }
    }
    #[doc = "ADC Plus-Side General Calibration Value Register 3"]
    pub struct CLP3 {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC Plus-Side General Calibration Value Register 3"]
    pub mod clp3 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CLP3 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CLP3R {
            bits: u16,
        }
        impl CLP3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLP3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLP3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 1023;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:9 - Calibration Value"]
            #[inline(always)]
            pub fn clp3(&self) -> CLP3R {
                let bits = {
                    const MASK: u16 = 1023;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                CLP3R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 384 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:9 - Calibration Value"]
            #[inline(always)]
            pub fn clp3(&mut self) -> _CLP3W {
                _CLP3W { w: self }
            }
        }
    }
    #[doc = "ADC Plus-Side General Calibration Value Register 2"]
    pub struct CLP2 {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC Plus-Side General Calibration Value Register 2"]
    pub mod clp2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CLP2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CLP2R {
            bits: u16,
        }
        impl CLP2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLP2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLP2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 1023;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:9 - Calibration Value"]
            #[inline(always)]
            pub fn clp2(&self) -> CLP2R {
                let bits = {
                    const MASK: u16 = 1023;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                CLP2R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 184 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:9 - Calibration Value"]
            #[inline(always)]
            pub fn clp2(&mut self) -> _CLP2W {
                _CLP2W { w: self }
            }
        }
    }
    #[doc = "ADC Plus-Side General Calibration Value Register 1"]
    pub struct CLP1 {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC Plus-Side General Calibration Value Register 1"]
    pub mod clp1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CLP1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CLP1R {
            bits: u16,
        }
        impl CLP1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLP1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLP1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 511;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:8 - Calibration Value"]
            #[inline(always)]
            pub fn clp1(&self) -> CLP1R {
                let bits = {
                    const MASK: u16 = 511;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                CLP1R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 92 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:8 - Calibration Value"]
            #[inline(always)]
            pub fn clp1(&mut self) -> _CLP1W {
                _CLP1W { w: self }
            }
        }
    }
    #[doc = "ADC Plus-Side General Calibration Value Register 0"]
    pub struct CLP0 {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC Plus-Side General Calibration Value Register 0"]
    pub mod clp0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CLP0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CLP0R {
            bits: u8,
        }
        impl CLP0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLP0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLP0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Calibration Value"]
            #[inline(always)]
            pub fn clp0(&self) -> CLP0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CLP0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 46 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Calibration Value"]
            #[inline(always)]
            pub fn clp0(&mut self) -> _CLP0W {
                _CLP0W { w: self }
            }
        }
    }
    #[doc = "ADC Plus-Side General Calibration Value Register X"]
    pub struct CLPX {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC Plus-Side General Calibration Value Register X"]
    pub mod clpx {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CLPX {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CLPXR {
            bits: u8,
        }
        impl CLPXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLPXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLPXW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 127;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:6 - Calibration Value"]
            #[inline(always)]
            pub fn clpx(&self) -> CLPXR {
                let bits = {
                    const MASK: u8 = 127;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CLPXR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:6 - Calibration Value"]
            #[inline(always)]
            pub fn clpx(&mut self) -> _CLPXW {
                _CLPXW { w: self }
            }
        }
    }
    #[doc = "ADC Plus-Side General Calibration Value Register 9"]
    pub struct CLP9 {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC Plus-Side General Calibration Value Register 9"]
    pub mod clp9 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CLP9 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CLP9R {
            bits: u8,
        }
        impl CLP9R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLP9W<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLP9W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 127;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:6 - Calibration Value"]
            #[inline(always)]
            pub fn clp9(&self) -> CLP9R {
                let bits = {
                    const MASK: u8 = 127;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CLP9R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:6 - Calibration Value"]
            #[inline(always)]
            pub fn clp9(&mut self) -> _CLP9W {
                _CLP9W { w: self }
            }
        }
    }
    #[doc = "ADC General Calibration Offset Value Register S"]
    pub struct CLPS_OFS {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC General Calibration Offset Value Register S"]
    pub mod clps_ofs {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CLPS_OFS {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CLPS_OFSR {
            bits: u8,
        }
        impl CLPS_OFSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLPS_OFSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLPS_OFSW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:3 - CLPS Offset"]
            #[inline(always)]
            pub fn clps_ofs(&self) -> CLPS_OFSR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CLPS_OFSR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - CLPS Offset"]
            #[inline(always)]
            pub fn clps_ofs(&mut self) -> _CLPS_OFSW {
                _CLPS_OFSW { w: self }
            }
        }
    }
    #[doc = "ADC Plus-Side General Calibration Offset Value Register 3"]
    pub struct CLP3_OFS {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC Plus-Side General Calibration Offset Value Register 3"]
    pub mod clp3_ofs {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CLP3_OFS {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CLP3_OFSR {
            bits: u8,
        }
        impl CLP3_OFSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLP3_OFSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLP3_OFSW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:3 - CLP3 Offset"]
            #[inline(always)]
            pub fn clp3_ofs(&self) -> CLP3_OFSR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CLP3_OFSR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - CLP3 Offset"]
            #[inline(always)]
            pub fn clp3_ofs(&mut self) -> _CLP3_OFSW {
                _CLP3_OFSW { w: self }
            }
        }
    }
    #[doc = "ADC Plus-Side General Calibration Offset Value Register 2"]
    pub struct CLP2_OFS {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC Plus-Side General Calibration Offset Value Register 2"]
    pub mod clp2_ofs {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CLP2_OFS {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CLP2_OFSR {
            bits: u8,
        }
        impl CLP2_OFSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLP2_OFSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLP2_OFSW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:3 - CLP2 Offset"]
            #[inline(always)]
            pub fn clp2_ofs(&self) -> CLP2_OFSR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CLP2_OFSR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - CLP2 Offset"]
            #[inline(always)]
            pub fn clp2_ofs(&mut self) -> _CLP2_OFSW {
                _CLP2_OFSW { w: self }
            }
        }
    }
    #[doc = "ADC Plus-Side General Calibration Offset Value Register 1"]
    pub struct CLP1_OFS {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC Plus-Side General Calibration Offset Value Register 1"]
    pub mod clp1_ofs {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CLP1_OFS {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CLP1_OFSR {
            bits: u8,
        }
        impl CLP1_OFSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLP1_OFSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLP1_OFSW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:3 - CLP1 Offset"]
            #[inline(always)]
            pub fn clp1_ofs(&self) -> CLP1_OFSR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CLP1_OFSR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - CLP1 Offset"]
            #[inline(always)]
            pub fn clp1_ofs(&mut self) -> _CLP1_OFSW {
                _CLP1_OFSW { w: self }
            }
        }
    }
    #[doc = "ADC Plus-Side General Calibration Offset Value Register 0"]
    pub struct CLP0_OFS {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC Plus-Side General Calibration Offset Value Register 0"]
    pub mod clp0_ofs {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CLP0_OFS {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CLP0_OFSR {
            bits: u8,
        }
        impl CLP0_OFSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLP0_OFSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLP0_OFSW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:3 - CLP0 Offset"]
            #[inline(always)]
            pub fn clp0_ofs(&self) -> CLP0_OFSR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CLP0_OFSR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - CLP0 Offset"]
            #[inline(always)]
            pub fn clp0_ofs(&mut self) -> _CLP0_OFSW {
                _CLP0_OFSW { w: self }
            }
        }
    }
    #[doc = "ADC Plus-Side General Calibration Offset Value Register X"]
    pub struct CLPX_OFS {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC Plus-Side General Calibration Offset Value Register X"]
    pub mod clpx_ofs {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CLPX_OFS {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CLPX_OFSR {
            bits: u16,
        }
        impl CLPX_OFSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLPX_OFSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLPX_OFSW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 4095;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:11 - CLPX Offset"]
            #[inline(always)]
            pub fn clpx_ofs(&self) -> CLPX_OFSR {
                let bits = {
                    const MASK: u16 = 4095;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                CLPX_OFSR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 1088 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:11 - CLPX Offset"]
            #[inline(always)]
            pub fn clpx_ofs(&mut self) -> _CLPX_OFSW {
                _CLPX_OFSW { w: self }
            }
        }
    }
    #[doc = "ADC Plus-Side General Calibration Offset Value Register 9"]
    pub struct CLP9_OFS {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC Plus-Side General Calibration Offset Value Register 9"]
    pub mod clp9_ofs {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CLP9_OFS {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CLP9_OFSR {
            bits: u16,
        }
        impl CLP9_OFSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLP9_OFSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLP9_OFSW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 4095;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:11 - CLP9 Offset"]
            #[inline(always)]
            pub fn clp9_ofs(&self) -> CLP9_OFSR {
                let bits = {
                    const MASK: u16 = 4095;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                CLP9_OFSR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 576 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:11 - CLP9 Offset"]
            #[inline(always)]
            pub fn clp9_ofs(&mut self) -> _CLP9_OFSW {
                _CLP9_OFSW { w: self }
            }
        }
    }
}
#[doc = "Analog-to-Digital Converter"]
pub struct ADC0 {
    register_block: adc0::RegisterBlock,
}
impl Deref for ADC0 {
    type Target = adc0::RegisterBlock;
    fn deref(&self) -> &adc0::RegisterBlock {
        &self.register_block
    }
}
#[doc = "Analog-to-Digital Converter"]
pub const ADC1: Peripheral<ADC1> = unsafe { Peripheral::new(1073901568) };
#[doc = "Analog-to-Digital Converter"]
pub mod adc1 {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - ADC Status and Control Register 1"]
        pub sc1a: SC1,
        #[doc = "0x04 - ADC Status and Control Register 1"]
        pub sc1b: SC1,
        #[doc = "0x08 - ADC Status and Control Register 1"]
        pub sc1c: SC1,
        #[doc = "0x0c - ADC Status and Control Register 1"]
        pub sc1d: SC1,
        #[doc = "0x10 - ADC Status and Control Register 1"]
        pub sc1e: SC1,
        #[doc = "0x14 - ADC Status and Control Register 1"]
        pub sc1f: SC1,
        #[doc = "0x18 - ADC Status and Control Register 1"]
        pub sc1g: SC1,
        #[doc = "0x1c - ADC Status and Control Register 1"]
        pub sc1h: SC1,
        #[doc = "0x20 - ADC Status and Control Register 1"]
        pub sc1i: SC1,
        #[doc = "0x24 - ADC Status and Control Register 1"]
        pub sc1j: SC1,
        #[doc = "0x28 - ADC Status and Control Register 1"]
        pub sc1k: SC1,
        #[doc = "0x2c - ADC Status and Control Register 1"]
        pub sc1l: SC1,
        #[doc = "0x30 - ADC Status and Control Register 1"]
        pub sc1m: SC1,
        #[doc = "0x34 - ADC Status and Control Register 1"]
        pub sc1n: SC1,
        #[doc = "0x38 - ADC Status and Control Register 1"]
        pub sc1o: SC1,
        #[doc = "0x3c - ADC Status and Control Register 1"]
        pub sc1p: SC1,
        #[doc = "0x40 - ADC Configuration Register 1"]
        pub cfg1: CFG1,
        #[doc = "0x44 - ADC Configuration Register 2"]
        pub cfg2: CFG2,
        #[doc = "0x48 - ADC Data Result Registers"]
        pub ra: R,
        #[doc = "0x4c - ADC Data Result Registers"]
        pub rb: R,
        #[doc = "0x50 - ADC Data Result Registers"]
        pub rc: R,
        #[doc = "0x54 - ADC Data Result Registers"]
        pub rd: R,
        #[doc = "0x58 - ADC Data Result Registers"]
        pub re: R,
        #[doc = "0x5c - ADC Data Result Registers"]
        pub rf: R,
        #[doc = "0x60 - ADC Data Result Registers"]
        pub rg: R,
        #[doc = "0x64 - ADC Data Result Registers"]
        pub rh: R,
        #[doc = "0x68 - ADC Data Result Registers"]
        pub ri: R,
        #[doc = "0x6c - ADC Data Result Registers"]
        pub rj: R,
        #[doc = "0x70 - ADC Data Result Registers"]
        pub rk: R,
        #[doc = "0x74 - ADC Data Result Registers"]
        pub rl: R,
        #[doc = "0x78 - ADC Data Result Registers"]
        pub rm: R,
        #[doc = "0x7c - ADC Data Result Registers"]
        pub rn: R,
        #[doc = "0x80 - ADC Data Result Registers"]
        pub ro: R,
        #[doc = "0x84 - ADC Data Result Registers"]
        pub rp: R,
        #[doc = "0x88 - Compare Value Registers"]
        pub cv1: CV,
        #[doc = "0x8c - Compare Value Registers"]
        pub cv2: CV,
        #[doc = "0x90 - Status and Control Register 2"]
        pub sc2: SC2,
        #[doc = "0x94 - Status and Control Register 3"]
        pub sc3: SC3,
        #[doc = "0x98 - BASE Offset Register"]
        pub base_ofs: BASE_OFS,
        #[doc = "0x9c - ADC Offset Correction Register"]
        pub ofs: OFS,
        #[doc = "0xa0 - USER Offset Correction Register"]
        pub usr_ofs: USR_OFS,
        #[doc = "0xa4 - ADC X Offset Correction Register"]
        pub xofs: XOFS,
        #[doc = "0xa8 - ADC Y Offset Correction Register"]
        pub yofs: YOFS,
        #[doc = "0xac - ADC Gain Register"]
        pub g: G,
        #[doc = "0xb0 - ADC User Gain Register"]
        pub ug: UG,
        #[doc = "0xb4 - ADC General Calibration Value Register S"]
        pub clps: CLPS,
        #[doc = "0xb8 - ADC Plus-Side General Calibration Value Register 3"]
        pub clp3: CLP3,
        #[doc = "0xbc - ADC Plus-Side General Calibration Value Register 2"]
        pub clp2: CLP2,
        #[doc = "0xc0 - ADC Plus-Side General Calibration Value Register 1"]
        pub clp1: CLP1,
        #[doc = "0xc4 - ADC Plus-Side General Calibration Value Register 0"]
        pub clp0: CLP0,
        #[doc = "0xc8 - ADC Plus-Side General Calibration Value Register X"]
        pub clpx: CLPX,
        #[doc = "0xcc - ADC Plus-Side General Calibration Value Register 9"]
        pub clp9: CLP9,
        #[doc = "0xd0 - ADC General Calibration Offset Value Register S"]
        pub clps_ofs: CLPS_OFS,
        #[doc = "0xd4 - ADC Plus-Side General Calibration Offset Value Register 3"]
        pub clp3_ofs: CLP3_OFS,
        #[doc = "0xd8 - ADC Plus-Side General Calibration Offset Value Register 2"]
        pub clp2_ofs: CLP2_OFS,
        #[doc = "0xdc - ADC Plus-Side General Calibration Offset Value Register 1"]
        pub clp1_ofs: CLP1_OFS,
        #[doc = "0xe0 - ADC Plus-Side General Calibration Offset Value Register 0"]
        pub clp0_ofs: CLP0_OFS,
        #[doc = "0xe4 - ADC Plus-Side General Calibration Offset Value Register X"]
        pub clpx_ofs: CLPX_OFS,
        #[doc = "0xe8 - ADC Plus-Side General Calibration Offset Value Register 9"]
        pub clp9_ofs: CLP9_OFS,
    }
    #[doc = "ADC Status and Control Register 1"]
    pub struct SC1 {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC Status and Control Register 1"]
    pub mod sc1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SC1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `ADCH`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ADCHR {
            #[doc = "Exernal channel 0 is selected as input."]
            _00000,
            #[doc = "Exernal channel 1 is selected as input."]
            _00001,
            #[doc = "Exernal channel 2 is selected as input."]
            _00010,
            #[doc = "Exernal channel 3 is selected as input."]
            _00011,
            #[doc = "Exernal channel 4 is selected as input."]
            _00100,
            #[doc = "Exernal channel 5 is selected as input."]
            _00101,
            #[doc = "Exernal channel 6 is selected as input."]
            _00110,
            #[doc = "Exernal channel 7 is selected as input."]
            _00111,
            #[doc = "Exernal channel 8 is selected as input."]
            _01000,
            #[doc = "Exernal channel 9 is selected as input."]
            _01001,
            #[doc = "Exernal channel 10 is selected as input."]
            _01010,
            #[doc = "Exernal channel 11 is selected as input."]
            _01011,
            #[doc = "Exernal channel 12 is selected as input."]
            _01100,
            #[doc = "Exernal channel 13 is selected as input."]
            _01101,
            #[doc = "Exernal channel 14 is selected as input."]
            _01110,
            #[doc = "Exernal channel 15 is selected as input."]
            _01111,
            #[doc = "Exernal channel 18 is selected as input."]
            _10010,
            #[doc = "Exernal channel 19 is selected as input."]
            _10011,
            #[doc = "Internal channel 0 is selected as input."]
            _10101,
            #[doc = "Internal channel 1 is selected as input."]
            _10110,
            #[doc = "Internal channel 2 is selected as input."]
            _10111,
            #[doc = "Temp Sensor"]
            _11010,
            #[doc = "Band Gap"]
            _11011,
            #[doc = "Internal channel 3 is selected as input."]
            _11100,
            #[doc = "VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL]."]
            _11101,
            #[doc = "VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL]."]
            _11110,
            #[doc = "Module is disabled"]
            _11111,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl ADCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    ADCHR::_00000 => 0,
                    ADCHR::_00001 => 1,
                    ADCHR::_00010 => 2,
                    ADCHR::_00011 => 3,
                    ADCHR::_00100 => 4,
                    ADCHR::_00101 => 5,
                    ADCHR::_00110 => 6,
                    ADCHR::_00111 => 7,
                    ADCHR::_01000 => 8,
                    ADCHR::_01001 => 9,
                    ADCHR::_01010 => 10,
                    ADCHR::_01011 => 11,
                    ADCHR::_01100 => 12,
                    ADCHR::_01101 => 13,
                    ADCHR::_01110 => 14,
                    ADCHR::_01111 => 15,
                    ADCHR::_10010 => 18,
                    ADCHR::_10011 => 19,
                    ADCHR::_10101 => 21,
                    ADCHR::_10110 => 22,
                    ADCHR::_10111 => 23,
                    ADCHR::_11010 => 26,
                    ADCHR::_11011 => 27,
                    ADCHR::_11100 => 28,
                    ADCHR::_11101 => 29,
                    ADCHR::_11110 => 30,
                    ADCHR::_11111 => 31,
                    ADCHR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> ADCHR {
                match value {
                    0 => ADCHR::_00000,
                    1 => ADCHR::_00001,
                    2 => ADCHR::_00010,
                    3 => ADCHR::_00011,
                    4 => ADCHR::_00100,
                    5 => ADCHR::_00101,
                    6 => ADCHR::_00110,
                    7 => ADCHR::_00111,
                    8 => ADCHR::_01000,
                    9 => ADCHR::_01001,
                    10 => ADCHR::_01010,
                    11 => ADCHR::_01011,
                    12 => ADCHR::_01100,
                    13 => ADCHR::_01101,
                    14 => ADCHR::_01110,
                    15 => ADCHR::_01111,
                    18 => ADCHR::_10010,
                    19 => ADCHR::_10011,
                    21 => ADCHR::_10101,
                    22 => ADCHR::_10110,
                    23 => ADCHR::_10111,
                    26 => ADCHR::_11010,
                    27 => ADCHR::_11011,
                    28 => ADCHR::_11100,
                    29 => ADCHR::_11101,
                    30 => ADCHR::_11110,
                    31 => ADCHR::_11111,
                    i => ADCHR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_00000`"]
            #[inline(always)]
            pub fn is_00000(&self) -> bool {
                *self == ADCHR::_00000
            }
            #[doc = "Checks if the value of the field is `_00001`"]
            #[inline(always)]
            pub fn is_00001(&self) -> bool {
                *self == ADCHR::_00001
            }
            #[doc = "Checks if the value of the field is `_00010`"]
            #[inline(always)]
            pub fn is_00010(&self) -> bool {
                *self == ADCHR::_00010
            }
            #[doc = "Checks if the value of the field is `_00011`"]
            #[inline(always)]
            pub fn is_00011(&self) -> bool {
                *self == ADCHR::_00011
            }
            #[doc = "Checks if the value of the field is `_00100`"]
            #[inline(always)]
            pub fn is_00100(&self) -> bool {
                *self == ADCHR::_00100
            }
            #[doc = "Checks if the value of the field is `_00101`"]
            #[inline(always)]
            pub fn is_00101(&self) -> bool {
                *self == ADCHR::_00101
            }
            #[doc = "Checks if the value of the field is `_00110`"]
            #[inline(always)]
            pub fn is_00110(&self) -> bool {
                *self == ADCHR::_00110
            }
            #[doc = "Checks if the value of the field is `_00111`"]
            #[inline(always)]
            pub fn is_00111(&self) -> bool {
                *self == ADCHR::_00111
            }
            #[doc = "Checks if the value of the field is `_01000`"]
            #[inline(always)]
            pub fn is_01000(&self) -> bool {
                *self == ADCHR::_01000
            }
            #[doc = "Checks if the value of the field is `_01001`"]
            #[inline(always)]
            pub fn is_01001(&self) -> bool {
                *self == ADCHR::_01001
            }
            #[doc = "Checks if the value of the field is `_01010`"]
            #[inline(always)]
            pub fn is_01010(&self) -> bool {
                *self == ADCHR::_01010
            }
            #[doc = "Checks if the value of the field is `_01011`"]
            #[inline(always)]
            pub fn is_01011(&self) -> bool {
                *self == ADCHR::_01011
            }
            #[doc = "Checks if the value of the field is `_01100`"]
            #[inline(always)]
            pub fn is_01100(&self) -> bool {
                *self == ADCHR::_01100
            }
            #[doc = "Checks if the value of the field is `_01101`"]
            #[inline(always)]
            pub fn is_01101(&self) -> bool {
                *self == ADCHR::_01101
            }
            #[doc = "Checks if the value of the field is `_01110`"]
            #[inline(always)]
            pub fn is_01110(&self) -> bool {
                *self == ADCHR::_01110
            }
            #[doc = "Checks if the value of the field is `_01111`"]
            #[inline(always)]
            pub fn is_01111(&self) -> bool {
                *self == ADCHR::_01111
            }
            #[doc = "Checks if the value of the field is `_10010`"]
            #[inline(always)]
            pub fn is_10010(&self) -> bool {
                *self == ADCHR::_10010
            }
            #[doc = "Checks if the value of the field is `_10011`"]
            #[inline(always)]
            pub fn is_10011(&self) -> bool {
                *self == ADCHR::_10011
            }
            #[doc = "Checks if the value of the field is `_10101`"]
            #[inline(always)]
            pub fn is_10101(&self) -> bool {
                *self == ADCHR::_10101
            }
            #[doc = "Checks if the value of the field is `_10110`"]
            #[inline(always)]
            pub fn is_10110(&self) -> bool {
                *self == ADCHR::_10110
            }
            #[doc = "Checks if the value of the field is `_10111`"]
            #[inline(always)]
            pub fn is_10111(&self) -> bool {
                *self == ADCHR::_10111
            }
            #[doc = "Checks if the value of the field is `_11010`"]
            #[inline(always)]
            pub fn is_11010(&self) -> bool {
                *self == ADCHR::_11010
            }
            #[doc = "Checks if the value of the field is `_11011`"]
            #[inline(always)]
            pub fn is_11011(&self) -> bool {
                *self == ADCHR::_11011
            }
            #[doc = "Checks if the value of the field is `_11100`"]
            #[inline(always)]
            pub fn is_11100(&self) -> bool {
                *self == ADCHR::_11100
            }
            #[doc = "Checks if the value of the field is `_11101`"]
            #[inline(always)]
            pub fn is_11101(&self) -> bool {
                *self == ADCHR::_11101
            }
            #[doc = "Checks if the value of the field is `_11110`"]
            #[inline(always)]
            pub fn is_11110(&self) -> bool {
                *self == ADCHR::_11110
            }
            #[doc = "Checks if the value of the field is `_11111`"]
            #[inline(always)]
            pub fn is_11111(&self) -> bool {
                *self == ADCHR::_11111
            }
        }
        #[doc = "Possible values of the field `AIEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum AIENR {
            #[doc = "Conversion complete interrupt is disabled."]
            _0,
            #[doc = "Conversion complete interrupt is enabled."]
            _1,
        }
        impl AIENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    AIENR::_0 => false,
                    AIENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> AIENR {
                match value {
                    false => AIENR::_0,
                    true => AIENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == AIENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == AIENR::_1
            }
        }
        #[doc = "Possible values of the field `COCO`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum COCOR {
            #[doc = "Conversion is not completed."]
            _0,
            #[doc = "Conversion is completed."]
            _1,
        }
        impl COCOR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    COCOR::_0 => false,
                    COCOR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> COCOR {
                match value {
                    false => COCOR::_0,
                    true => COCOR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == COCOR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == COCOR::_1
            }
        }
        #[doc = "Values that can be written to the field `ADCH`"]
        pub enum ADCHW {
            #[doc = "Exernal channel 0 is selected as input."]
            _00000,
            #[doc = "Exernal channel 1 is selected as input."]
            _00001,
            #[doc = "Exernal channel 2 is selected as input."]
            _00010,
            #[doc = "Exernal channel 3 is selected as input."]
            _00011,
            #[doc = "Exernal channel 4 is selected as input."]
            _00100,
            #[doc = "Exernal channel 5 is selected as input."]
            _00101,
            #[doc = "Exernal channel 6 is selected as input."]
            _00110,
            #[doc = "Exernal channel 7 is selected as input."]
            _00111,
            #[doc = "Exernal channel 8 is selected as input."]
            _01000,
            #[doc = "Exernal channel 9 is selected as input."]
            _01001,
            #[doc = "Exernal channel 10 is selected as input."]
            _01010,
            #[doc = "Exernal channel 11 is selected as input."]
            _01011,
            #[doc = "Exernal channel 12 is selected as input."]
            _01100,
            #[doc = "Exernal channel 13 is selected as input."]
            _01101,
            #[doc = "Exernal channel 14 is selected as input."]
            _01110,
            #[doc = "Exernal channel 15 is selected as input."]
            _01111,
            #[doc = "Exernal channel 18 is selected as input."]
            _10010,
            #[doc = "Exernal channel 19 is selected as input."]
            _10011,
            #[doc = "Internal channel 0 is selected as input."]
            _10101,
            #[doc = "Internal channel 1 is selected as input."]
            _10110,
            #[doc = "Internal channel 2 is selected as input."]
            _10111,
            #[doc = "Temp Sensor"]
            _11010,
            #[doc = "Band Gap"]
            _11011,
            #[doc = "Internal channel 3 is selected as input."]
            _11100,
            #[doc = "VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL]."]
            _11101,
            #[doc = "VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL]."]
            _11110,
            #[doc = "Module is disabled"]
            _11111,
        }
        impl ADCHW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    ADCHW::_00000 => 0,
                    ADCHW::_00001 => 1,
                    ADCHW::_00010 => 2,
                    ADCHW::_00011 => 3,
                    ADCHW::_00100 => 4,
                    ADCHW::_00101 => 5,
                    ADCHW::_00110 => 6,
                    ADCHW::_00111 => 7,
                    ADCHW::_01000 => 8,
                    ADCHW::_01001 => 9,
                    ADCHW::_01010 => 10,
                    ADCHW::_01011 => 11,
                    ADCHW::_01100 => 12,
                    ADCHW::_01101 => 13,
                    ADCHW::_01110 => 14,
                    ADCHW::_01111 => 15,
                    ADCHW::_10010 => 18,
                    ADCHW::_10011 => 19,
                    ADCHW::_10101 => 21,
                    ADCHW::_10110 => 22,
                    ADCHW::_10111 => 23,
                    ADCHW::_11010 => 26,
                    ADCHW::_11011 => 27,
                    ADCHW::_11100 => 28,
                    ADCHW::_11101 => 29,
                    ADCHW::_11110 => 30,
                    ADCHW::_11111 => 31,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ADCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ADCHW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ADCHW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Exernal channel 0 is selected as input."]
            #[inline(always)]
            pub fn _00000(self) -> &'a mut W {
                self.variant(ADCHW::_00000)
            }
            #[doc = "Exernal channel 1 is selected as input."]
            #[inline(always)]
            pub fn _00001(self) -> &'a mut W {
                self.variant(ADCHW::_00001)
            }
            #[doc = "Exernal channel 2 is selected as input."]
            #[inline(always)]
            pub fn _00010(self) -> &'a mut W {
                self.variant(ADCHW::_00010)
            }
            #[doc = "Exernal channel 3 is selected as input."]
            #[inline(always)]
            pub fn _00011(self) -> &'a mut W {
                self.variant(ADCHW::_00011)
            }
            #[doc = "Exernal channel 4 is selected as input."]
            #[inline(always)]
            pub fn _00100(self) -> &'a mut W {
                self.variant(ADCHW::_00100)
            }
            #[doc = "Exernal channel 5 is selected as input."]
            #[inline(always)]
            pub fn _00101(self) -> &'a mut W {
                self.variant(ADCHW::_00101)
            }
            #[doc = "Exernal channel 6 is selected as input."]
            #[inline(always)]
            pub fn _00110(self) -> &'a mut W {
                self.variant(ADCHW::_00110)
            }
            #[doc = "Exernal channel 7 is selected as input."]
            #[inline(always)]
            pub fn _00111(self) -> &'a mut W {
                self.variant(ADCHW::_00111)
            }
            #[doc = "Exernal channel 8 is selected as input."]
            #[inline(always)]
            pub fn _01000(self) -> &'a mut W {
                self.variant(ADCHW::_01000)
            }
            #[doc = "Exernal channel 9 is selected as input."]
            #[inline(always)]
            pub fn _01001(self) -> &'a mut W {
                self.variant(ADCHW::_01001)
            }
            #[doc = "Exernal channel 10 is selected as input."]
            #[inline(always)]
            pub fn _01010(self) -> &'a mut W {
                self.variant(ADCHW::_01010)
            }
            #[doc = "Exernal channel 11 is selected as input."]
            #[inline(always)]
            pub fn _01011(self) -> &'a mut W {
                self.variant(ADCHW::_01011)
            }
            #[doc = "Exernal channel 12 is selected as input."]
            #[inline(always)]
            pub fn _01100(self) -> &'a mut W {
                self.variant(ADCHW::_01100)
            }
            #[doc = "Exernal channel 13 is selected as input."]
            #[inline(always)]
            pub fn _01101(self) -> &'a mut W {
                self.variant(ADCHW::_01101)
            }
            #[doc = "Exernal channel 14 is selected as input."]
            #[inline(always)]
            pub fn _01110(self) -> &'a mut W {
                self.variant(ADCHW::_01110)
            }
            #[doc = "Exernal channel 15 is selected as input."]
            #[inline(always)]
            pub fn _01111(self) -> &'a mut W {
                self.variant(ADCHW::_01111)
            }
            #[doc = "Exernal channel 18 is selected as input."]
            #[inline(always)]
            pub fn _10010(self) -> &'a mut W {
                self.variant(ADCHW::_10010)
            }
            #[doc = "Exernal channel 19 is selected as input."]
            #[inline(always)]
            pub fn _10011(self) -> &'a mut W {
                self.variant(ADCHW::_10011)
            }
            #[doc = "Internal channel 0 is selected as input."]
            #[inline(always)]
            pub fn _10101(self) -> &'a mut W {
                self.variant(ADCHW::_10101)
            }
            #[doc = "Internal channel 1 is selected as input."]
            #[inline(always)]
            pub fn _10110(self) -> &'a mut W {
                self.variant(ADCHW::_10110)
            }
            #[doc = "Internal channel 2 is selected as input."]
            #[inline(always)]
            pub fn _10111(self) -> &'a mut W {
                self.variant(ADCHW::_10111)
            }
            #[doc = "Temp Sensor"]
            #[inline(always)]
            pub fn _11010(self) -> &'a mut W {
                self.variant(ADCHW::_11010)
            }
            #[doc = "Band Gap"]
            #[inline(always)]
            pub fn _11011(self) -> &'a mut W {
                self.variant(ADCHW::_11011)
            }
            #[doc = "Internal channel 3 is selected as input."]
            #[inline(always)]
            pub fn _11100(self) -> &'a mut W {
                self.variant(ADCHW::_11100)
            }
            #[doc = "VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL]."]
            #[inline(always)]
            pub fn _11101(self) -> &'a mut W {
                self.variant(ADCHW::_11101)
            }
            #[doc = "VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL]."]
            #[inline(always)]
            pub fn _11110(self) -> &'a mut W {
                self.variant(ADCHW::_11110)
            }
            #[doc = "Module is disabled"]
            #[inline(always)]
            pub fn _11111(self) -> &'a mut W {
                self.variant(ADCHW::_11111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `AIEN`"]
        pub enum AIENW {
            #[doc = "Conversion complete interrupt is disabled."]
            _0,
            #[doc = "Conversion complete interrupt is enabled."]
            _1,
        }
        impl AIENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    AIENW::_0 => false,
                    AIENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _AIENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _AIENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: AIENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Conversion complete interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(AIENW::_0)
            }
            #[doc = "Conversion complete interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(AIENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:4 - Input channel select"]
            #[inline(always)]
            pub fn adch(&self) -> ADCHR {
                ADCHR::_from({
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 6 - Interrupt Enable"]
            #[inline(always)]
            pub fn aien(&self) -> AIENR {
                AIENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Conversion Complete Flag"]
            #[inline(always)]
            pub fn coco(&self) -> COCOR {
                COCOR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 31 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:4 - Input channel select"]
            #[inline(always)]
            pub fn adch(&mut self) -> _ADCHW {
                _ADCHW { w: self }
            }
            #[doc = "Bit 6 - Interrupt Enable"]
            #[inline(always)]
            pub fn aien(&mut self) -> _AIENW {
                _AIENW { w: self }
            }
        }
    }
    #[doc = "ADC Configuration Register 1"]
    pub struct CFG1 {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC Configuration Register 1"]
    pub mod cfg1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CFG1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `ADICLK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ADICLKR {
            #[doc = "Alternate clock 1 (ADC_ALTCLK1)"]
            _00,
            #[doc = "Alternate clock 2 (ADC_ALTCLK2)"]
            _01,
            #[doc = "Alternate clock 3 (ADC_ALTCLK3)"]
            _10,
            #[doc = "Alternate clock 4 (ADC_ALTCLK4)"]
            _11,
        }
        impl ADICLKR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    ADICLKR::_00 => 0,
                    ADICLKR::_01 => 1,
                    ADICLKR::_10 => 2,
                    ADICLKR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> ADICLKR {
                match value {
                    0 => ADICLKR::_00,
                    1 => ADICLKR::_01,
                    2 => ADICLKR::_10,
                    3 => ADICLKR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == ADICLKR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == ADICLKR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == ADICLKR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == ADICLKR::_11
            }
        }
        #[doc = "Possible values of the field `MODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MODER {
            #[doc = "8-bit conversion."]
            _00,
            #[doc = "12-bit conversion."]
            _01,
            #[doc = "10-bit conversion."]
            _10,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl MODER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MODER::_00 => 0,
                    MODER::_01 => 1,
                    MODER::_10 => 2,
                    MODER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MODER {
                match value {
                    0 => MODER::_00,
                    1 => MODER::_01,
                    2 => MODER::_10,
                    i => MODER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == MODER::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == MODER::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == MODER::_10
            }
        }
        #[doc = "Possible values of the field `ADIV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ADIVR {
            #[doc = "The divide ratio is 1 and the clock rate is input clock."]
            _00,
            #[doc = "The divide ratio is 2 and the clock rate is (input clock)/2."]
            _01,
            #[doc = "The divide ratio is 4 and the clock rate is (input clock)/4."]
            _10,
            #[doc = "The divide ratio is 8 and the clock rate is (input clock)/8."]
            _11,
        }
        impl ADIVR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    ADIVR::_00 => 0,
                    ADIVR::_01 => 1,
                    ADIVR::_10 => 2,
                    ADIVR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> ADIVR {
                match value {
                    0 => ADIVR::_00,
                    1 => ADIVR::_01,
                    2 => ADIVR::_10,
                    3 => ADIVR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == ADIVR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == ADIVR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == ADIVR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == ADIVR::_11
            }
        }
        #[doc = "Values that can be written to the field `ADICLK`"]
        pub enum ADICLKW {
            #[doc = "Alternate clock 1 (ADC_ALTCLK1)"]
            _00,
            #[doc = "Alternate clock 2 (ADC_ALTCLK2)"]
            _01,
            #[doc = "Alternate clock 3 (ADC_ALTCLK3)"]
            _10,
            #[doc = "Alternate clock 4 (ADC_ALTCLK4)"]
            _11,
        }
        impl ADICLKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    ADICLKW::_00 => 0,
                    ADICLKW::_01 => 1,
                    ADICLKW::_10 => 2,
                    ADICLKW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ADICLKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ADICLKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ADICLKW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Alternate clock 1 (ADC_ALTCLK1)"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(ADICLKW::_00)
            }
            #[doc = "Alternate clock 2 (ADC_ALTCLK2)"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(ADICLKW::_01)
            }
            #[doc = "Alternate clock 3 (ADC_ALTCLK3)"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(ADICLKW::_10)
            }
            #[doc = "Alternate clock 4 (ADC_ALTCLK4)"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(ADICLKW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MODE`"]
        pub enum MODEW {
            #[doc = "8-bit conversion."]
            _00,
            #[doc = "12-bit conversion."]
            _01,
            #[doc = "10-bit conversion."]
            _10,
        }
        impl MODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MODEW::_00 => 0,
                    MODEW::_01 => 1,
                    MODEW::_10 => 2,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MODEW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "8-bit conversion."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(MODEW::_00)
            }
            #[doc = "12-bit conversion."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(MODEW::_01)
            }
            #[doc = "10-bit conversion."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(MODEW::_10)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ADIV`"]
        pub enum ADIVW {
            #[doc = "The divide ratio is 1 and the clock rate is input clock."]
            _00,
            #[doc = "The divide ratio is 2 and the clock rate is (input clock)/2."]
            _01,
            #[doc = "The divide ratio is 4 and the clock rate is (input clock)/4."]
            _10,
            #[doc = "The divide ratio is 8 and the clock rate is (input clock)/8."]
            _11,
        }
        impl ADIVW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    ADIVW::_00 => 0,
                    ADIVW::_01 => 1,
                    ADIVW::_10 => 2,
                    ADIVW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ADIVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ADIVW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ADIVW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "The divide ratio is 1 and the clock rate is input clock."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(ADIVW::_00)
            }
            #[doc = "The divide ratio is 2 and the clock rate is (input clock)/2."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(ADIVW::_01)
            }
            #[doc = "The divide ratio is 4 and the clock rate is (input clock)/4."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(ADIVW::_10)
            }
            #[doc = "The divide ratio is 8 and the clock rate is (input clock)/8."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(ADIVW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLRLTRGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLRLTRGW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:1 - Input Clock Select"]
            #[inline(always)]
            pub fn adiclk(&self) -> ADICLKR {
                ADICLKR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 2:3 - Conversion mode selection"]
            #[inline(always)]
            pub fn mode(&self) -> MODER {
                MODER::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 5:6 - Clock Divide Select"]
            #[inline(always)]
            pub fn adiv(&self) -> ADIVR {
                ADIVR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:1 - Input Clock Select"]
            #[inline(always)]
            pub fn adiclk(&mut self) -> _ADICLKW {
                _ADICLKW { w: self }
            }
            #[doc = "Bits 2:3 - Conversion mode selection"]
            #[inline(always)]
            pub fn mode(&mut self) -> _MODEW {
                _MODEW { w: self }
            }
            #[doc = "Bits 5:6 - Clock Divide Select"]
            #[inline(always)]
            pub fn adiv(&mut self) -> _ADIVW {
                _ADIVW { w: self }
            }
            #[doc = "Bit 8 - Clear Latch Trigger in Trigger Handler Block"]
            #[inline(always)]
            pub fn clrltrg(&mut self) -> _CLRLTRGW {
                _CLRLTRGW { w: self }
            }
        }
    }
    #[doc = "ADC Configuration Register 2"]
    pub struct CFG2 {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC Configuration Register 2"]
    pub mod cfg2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CFG2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SMPLTSR {
            bits: u8,
        }
        impl SMPLTSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMPLTSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMPLTSW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Sample Time Select"]
            #[inline(always)]
            pub fn smplts(&self) -> SMPLTSR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SMPLTSR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 12 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Sample Time Select"]
            #[inline(always)]
            pub fn smplts(&mut self) -> _SMPLTSW {
                _SMPLTSW { w: self }
            }
        }
    }
    #[doc = "ADC Data Result Registers"]
    pub struct R {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC Data Result Registers"]
    pub mod r {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::R {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DR {
            bits: u16,
        }
        impl DR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:11 - Data result"]
            #[inline(always)]
            pub fn d(&self) -> DR {
                let bits = {
                    const MASK: u16 = 4095;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                DR { bits }
            }
        }
    }
    #[doc = "Compare Value Registers"]
    pub struct CV {
        register: VolatileCell<u32>,
    }
    #[doc = "Compare Value Registers"]
    pub mod cv {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CV {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CVR {
            bits: u16,
        }
        impl CVR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CVW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Compare Value."]
            #[inline(always)]
            pub fn cv(&self) -> CVR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                CVR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Compare Value."]
            #[inline(always)]
            pub fn cv(&mut self) -> _CVW {
                _CVW { w: self }
            }
        }
    }
    #[doc = "Status and Control Register 2"]
    pub struct SC2 {
        register: VolatileCell<u32>,
    }
    #[doc = "Status and Control Register 2"]
    pub mod sc2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SC2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `REFSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum REFSELR {
            #[doc = "Default voltage reference pin pair, that is, external pins VREFH and VREFL"]
            _00,
            #[doc = "Alternate reference voltage, that is, VALTH. This voltage may be additional external pin or internal source depending on the MCU configuration. See the chip configuration information for details specific to this MCU."]
            _01,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl REFSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    REFSELR::_00 => 0,
                    REFSELR::_01 => 1,
                    REFSELR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> REFSELR {
                match value {
                    0 => REFSELR::_00,
                    1 => REFSELR::_01,
                    i => REFSELR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == REFSELR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == REFSELR::_01
            }
        }
        #[doc = "Possible values of the field `DMAEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMAENR {
            #[doc = "DMA is disabled."]
            _0,
            #[doc = "DMA is enabled and will assert the ADC DMA request during an ADC conversion complete event , which is indicated when any SC1n[COCO] flag is asserted."]
            _1,
        }
        impl DMAENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMAENR::_0 => false,
                    DMAENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMAENR {
                match value {
                    false => DMAENR::_0,
                    true => DMAENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMAENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMAENR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct ACRENR {
            bits: bool,
        }
        impl ACRENR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct ACFGTR {
            bits: bool,
        }
        impl ACFGTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `ACFE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ACFER {
            #[doc = "Compare function disabled."]
            _0,
            #[doc = "Compare function enabled."]
            _1,
        }
        impl ACFER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ACFER::_0 => false,
                    ACFER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ACFER {
                match value {
                    false => ACFER::_0,
                    true => ACFER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ACFER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ACFER::_1
            }
        }
        #[doc = "Possible values of the field `ADTRG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ADTRGR {
            #[doc = "Software trigger selected."]
            _0,
            #[doc = "Hardware trigger selected."]
            _1,
        }
        impl ADTRGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ADTRGR::_0 => false,
                    ADTRGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ADTRGR {
                match value {
                    false => ADTRGR::_0,
                    true => ADTRGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ADTRGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ADTRGR::_1
            }
        }
        #[doc = "Possible values of the field `ADACT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ADACTR {
            #[doc = "Conversion not in progress."]
            _0,
            #[doc = "Conversion in progress."]
            _1,
        }
        impl ADACTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ADACTR::_0 => false,
                    ADACTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ADACTR {
                match value {
                    false => ADACTR::_0,
                    true => ADACTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ADACTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ADACTR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct TRGPRNUMR {
            bits: u8,
        }
        impl TRGPRNUMR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `TRGSTLAT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRGSTLATR {
            #[doc = "No trigger request has been latched"]
            _0,
            #[doc = "A trigger request has been latched"]
            _1,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl TRGSTLATR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TRGSTLATR::_0 => 0,
                    TRGSTLATR::_1 => 1,
                    TRGSTLATR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TRGSTLATR {
                match value {
                    0 => TRGSTLATR::_0,
                    1 => TRGSTLATR::_1,
                    i => TRGSTLATR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRGSTLATR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRGSTLATR::_1
            }
        }
        #[doc = "Possible values of the field `TRGSTERR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRGSTERRR {
            #[doc = "No error has occurred"]
            _0,
            #[doc = "An error has occurred"]
            _1,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl TRGSTERRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TRGSTERRR::_0 => 0,
                    TRGSTERRR::_1 => 1,
                    TRGSTERRR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TRGSTERRR {
                match value {
                    0 => TRGSTERRR::_0,
                    1 => TRGSTERRR::_1,
                    i => TRGSTERRR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRGSTERRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRGSTERRR::_1
            }
        }
        #[doc = "Values that can be written to the field `REFSEL`"]
        pub enum REFSELW {
            #[doc = "Default voltage reference pin pair, that is, external pins VREFH and VREFL"]
            _00,
            #[doc = "Alternate reference voltage, that is, VALTH. This voltage may be additional external pin or internal source depending on the MCU configuration. See the chip configuration information for details specific to this MCU."]
            _01,
        }
        impl REFSELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    REFSELW::_00 => 0,
                    REFSELW::_01 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _REFSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _REFSELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: REFSELW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Default voltage reference pin pair, that is, external pins VREFH and VREFL"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(REFSELW::_00)
            }
            #[doc = "Alternate reference voltage, that is, VALTH. This voltage may be additional external pin or internal source depending on the MCU configuration. See the chip configuration information for details specific to this MCU."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(REFSELW::_01)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMAEN`"]
        pub enum DMAENW {
            #[doc = "DMA is disabled."]
            _0,
            #[doc = "DMA is enabled and will assert the ADC DMA request during an ADC conversion complete event , which is indicated when any SC1n[COCO] flag is asserted."]
            _1,
        }
        impl DMAENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMAENW::_0 => false,
                    DMAENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMAENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMAENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMAENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMAENW::_0)
            }
            #[doc = "DMA is enabled and will assert the ADC DMA request during an ADC conversion complete event , which is indicated when any SC1n[COCO] flag is asserted."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMAENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ACRENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ACRENW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ACFGTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ACFGTW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ACFE`"]
        pub enum ACFEW {
            #[doc = "Compare function disabled."]
            _0,
            #[doc = "Compare function enabled."]
            _1,
        }
        impl ACFEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ACFEW::_0 => false,
                    ACFEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ACFEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ACFEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ACFEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Compare function disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ACFEW::_0)
            }
            #[doc = "Compare function enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ACFEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ADTRG`"]
        pub enum ADTRGW {
            #[doc = "Software trigger selected."]
            _0,
            #[doc = "Hardware trigger selected."]
            _1,
        }
        impl ADTRGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ADTRGW::_0 => false,
                    ADTRGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ADTRGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ADTRGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ADTRGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Software trigger selected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ADTRGW::_0)
            }
            #[doc = "Hardware trigger selected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ADTRGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:1 - Voltage Reference Selection"]
            #[inline(always)]
            pub fn refsel(&self) -> REFSELR {
                REFSELR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 2 - DMA Enable"]
            #[inline(always)]
            pub fn dmaen(&self) -> DMAENR {
                DMAENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Compare Function Range Enable"]
            #[inline(always)]
            pub fn acren(&self) -> ACRENR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ACRENR { bits }
            }
            #[doc = "Bit 4 - Compare Function Greater Than Enable"]
            #[inline(always)]
            pub fn acfgt(&self) -> ACFGTR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                ACFGTR { bits }
            }
            #[doc = "Bit 5 - Compare Function Enable"]
            #[inline(always)]
            pub fn acfe(&self) -> ACFER {
                ACFER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Conversion Trigger Select"]
            #[inline(always)]
            pub fn adtrg(&self) -> ADTRGR {
                ADTRGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Conversion Active"]
            #[inline(always)]
            pub fn adact(&self) -> ADACTR {
                ADACTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 13:14 - Trigger Process Number"]
            #[inline(always)]
            pub fn trgprnum(&self) -> TRGPRNUMR {
                let bits = {
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TRGPRNUMR { bits }
            }
            #[doc = "Bits 16:19 - Trigger Status"]
            #[inline(always)]
            pub fn trgstlat(&self) -> TRGSTLATR {
                TRGSTLATR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 24:27 - Error in Multiplexed Trigger Request"]
            #[inline(always)]
            pub fn trgsterr(&self) -> TRGSTERRR {
                TRGSTERRR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:1 - Voltage Reference Selection"]
            #[inline(always)]
            pub fn refsel(&mut self) -> _REFSELW {
                _REFSELW { w: self }
            }
            #[doc = "Bit 2 - DMA Enable"]
            #[inline(always)]
            pub fn dmaen(&mut self) -> _DMAENW {
                _DMAENW { w: self }
            }
            #[doc = "Bit 3 - Compare Function Range Enable"]
            #[inline(always)]
            pub fn acren(&mut self) -> _ACRENW {
                _ACRENW { w: self }
            }
            #[doc = "Bit 4 - Compare Function Greater Than Enable"]
            #[inline(always)]
            pub fn acfgt(&mut self) -> _ACFGTW {
                _ACFGTW { w: self }
            }
            #[doc = "Bit 5 - Compare Function Enable"]
            #[inline(always)]
            pub fn acfe(&mut self) -> _ACFEW {
                _ACFEW { w: self }
            }
            #[doc = "Bit 6 - Conversion Trigger Select"]
            #[inline(always)]
            pub fn adtrg(&mut self) -> _ADTRGW {
                _ADTRGW { w: self }
            }
        }
    }
    #[doc = "Status and Control Register 3"]
    pub struct SC3 {
        register: VolatileCell<u32>,
    }
    #[doc = "Status and Control Register 3"]
    pub mod sc3 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SC3 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `AVGS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum AVGSR {
            #[doc = "4 samples averaged."]
            _00,
            #[doc = "8 samples averaged."]
            _01,
            #[doc = "16 samples averaged."]
            _10,
            #[doc = "32 samples averaged."]
            _11,
        }
        impl AVGSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    AVGSR::_00 => 0,
                    AVGSR::_01 => 1,
                    AVGSR::_10 => 2,
                    AVGSR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> AVGSR {
                match value {
                    0 => AVGSR::_00,
                    1 => AVGSR::_01,
                    2 => AVGSR::_10,
                    3 => AVGSR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == AVGSR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == AVGSR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == AVGSR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == AVGSR::_11
            }
        }
        #[doc = "Possible values of the field `AVGE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum AVGER {
            #[doc = "Hardware average function disabled."]
            _0,
            #[doc = "Hardware average function enabled."]
            _1,
        }
        impl AVGER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    AVGER::_0 => false,
                    AVGER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> AVGER {
                match value {
                    false => AVGER::_0,
                    true => AVGER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == AVGER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == AVGER::_1
            }
        }
        #[doc = "Possible values of the field `ADCO`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ADCOR {
            #[doc = "One conversion will be performed (or one set of conversions, if AVGE is set) after a conversion is initiated."]
            _0,
            #[doc = "Continuous conversions will be performed (or continuous sets of conversions, if AVGE is set) after a conversion is initiated."]
            _1,
        }
        impl ADCOR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ADCOR::_0 => false,
                    ADCOR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ADCOR {
                match value {
                    false => ADCOR::_0,
                    true => ADCOR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ADCOR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ADCOR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct CALR {
            bits: bool,
        }
        impl CALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Values that can be written to the field `AVGS`"]
        pub enum AVGSW {
            #[doc = "4 samples averaged."]
            _00,
            #[doc = "8 samples averaged."]
            _01,
            #[doc = "16 samples averaged."]
            _10,
            #[doc = "32 samples averaged."]
            _11,
        }
        impl AVGSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    AVGSW::_00 => 0,
                    AVGSW::_01 => 1,
                    AVGSW::_10 => 2,
                    AVGSW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _AVGSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _AVGSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: AVGSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "4 samples averaged."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(AVGSW::_00)
            }
            #[doc = "8 samples averaged."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(AVGSW::_01)
            }
            #[doc = "16 samples averaged."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(AVGSW::_10)
            }
            #[doc = "32 samples averaged."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(AVGSW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `AVGE`"]
        pub enum AVGEW {
            #[doc = "Hardware average function disabled."]
            _0,
            #[doc = "Hardware average function enabled."]
            _1,
        }
        impl AVGEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    AVGEW::_0 => false,
                    AVGEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _AVGEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _AVGEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: AVGEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Hardware average function disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(AVGEW::_0)
            }
            #[doc = "Hardware average function enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(AVGEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ADCO`"]
        pub enum ADCOW {
            #[doc = "One conversion will be performed (or one set of conversions, if AVGE is set) after a conversion is initiated."]
            _0,
            #[doc = "Continuous conversions will be performed (or continuous sets of conversions, if AVGE is set) after a conversion is initiated."]
            _1,
        }
        impl ADCOW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ADCOW::_0 => false,
                    ADCOW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ADCOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ADCOW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ADCOW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "One conversion will be performed (or one set of conversions, if AVGE is set) after a conversion is initiated."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ADCOW::_0)
            }
            #[doc = "Continuous conversions will be performed (or continuous sets of conversions, if AVGE is set) after a conversion is initiated."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ADCOW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CALW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:1 - Hardware Average Select"]
            #[inline(always)]
            pub fn avgs(&self) -> AVGSR {
                AVGSR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 2 - Hardware Average Enable"]
            #[inline(always)]
            pub fn avge(&self) -> AVGER {
                AVGER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Continuous Conversion Enable"]
            #[inline(always)]
            pub fn adco(&self) -> ADCOR {
                ADCOR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Calibration"]
            #[inline(always)]
            pub fn cal(&self) -> CALR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                CALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:1 - Hardware Average Select"]
            #[inline(always)]
            pub fn avgs(&mut self) -> _AVGSW {
                _AVGSW { w: self }
            }
            #[doc = "Bit 2 - Hardware Average Enable"]
            #[inline(always)]
            pub fn avge(&mut self) -> _AVGEW {
                _AVGEW { w: self }
            }
            #[doc = "Bit 3 - Continuous Conversion Enable"]
            #[inline(always)]
            pub fn adco(&mut self) -> _ADCOW {
                _ADCOW { w: self }
            }
            #[doc = "Bit 7 - Calibration"]
            #[inline(always)]
            pub fn cal(&mut self) -> _CALW {
                _CALW { w: self }
            }
        }
    }
    #[doc = "BASE Offset Register"]
    pub struct BASE_OFS {
        register: VolatileCell<u32>,
    }
    #[doc = "BASE Offset Register"]
    pub mod base_ofs {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::BASE_OFS {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BA_OFSR {
            bits: u8,
        }
        impl BA_OFSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _BA_OFSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BA_OFSW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Base Offset Error Correction Value"]
            #[inline(always)]
            pub fn ba_ofs(&self) -> BA_OFSR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                BA_OFSR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 64 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Base Offset Error Correction Value"]
            #[inline(always)]
            pub fn ba_ofs(&mut self) -> _BA_OFSW {
                _BA_OFSW { w: self }
            }
        }
    }
    #[doc = "ADC Offset Correction Register"]
    pub struct OFS {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC Offset Correction Register"]
    pub mod ofs {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::OFS {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct OFSR {
            bits: u16,
        }
        impl OFSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _OFSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _OFSW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Offset Error Correction Value"]
            #[inline(always)]
            pub fn ofs(&self) -> OFSR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                OFSR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Offset Error Correction Value"]
            #[inline(always)]
            pub fn ofs(&mut self) -> _OFSW {
                _OFSW { w: self }
            }
        }
    }
    #[doc = "USER Offset Correction Register"]
    pub struct USR_OFS {
        register: VolatileCell<u32>,
    }
    #[doc = "USER Offset Correction Register"]
    pub mod usr_ofs {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::USR_OFS {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct USR_OFSR {
            bits: u8,
        }
        impl USR_OFSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _USR_OFSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _USR_OFSW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - USER Offset Error Correction Value"]
            #[inline(always)]
            pub fn usr_ofs(&self) -> USR_OFSR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                USR_OFSR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - USER Offset Error Correction Value"]
            #[inline(always)]
            pub fn usr_ofs(&mut self) -> _USR_OFSW {
                _USR_OFSW { w: self }
            }
        }
    }
    #[doc = "ADC X Offset Correction Register"]
    pub struct XOFS {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC X Offset Correction Register"]
    pub mod xofs {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::XOFS {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct XOFSR {
            bits: u8,
        }
        impl XOFSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _XOFSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _XOFSW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - X offset error correction value"]
            #[inline(always)]
            pub fn xofs(&self) -> XOFSR {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                XOFSR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 48 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - X offset error correction value"]
            #[inline(always)]
            pub fn xofs(&mut self) -> _XOFSW {
                _XOFSW { w: self }
            }
        }
    }
    #[doc = "ADC Y Offset Correction Register"]
    pub struct YOFS {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC Y Offset Correction Register"]
    pub mod yofs {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::YOFS {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct YOFSR {
            bits: u8,
        }
        impl YOFSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _YOFSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _YOFSW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Y offset error correction value"]
            #[inline(always)]
            pub fn yofs(&self) -> YOFSR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                YOFSR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 55 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Y offset error correction value"]
            #[inline(always)]
            pub fn yofs(&mut self) -> _YOFSW {
                _YOFSW { w: self }
            }
        }
    }
    #[doc = "ADC Gain Register"]
    pub struct G {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC Gain Register"]
    pub mod g {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::G {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct GR {
            bits: u16,
        }
        impl GR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _GW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 2047;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:10 - Gain error adjustment factor for the overall conversion"]
            #[inline(always)]
            pub fn g(&self) -> GR {
                let bits = {
                    const MASK: u16 = 2047;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                GR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 752 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:10 - Gain error adjustment factor for the overall conversion"]
            #[inline(always)]
            pub fn g(&mut self) -> _GW {
                _GW { w: self }
            }
        }
    }
    #[doc = "ADC User Gain Register"]
    pub struct UG {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC User Gain Register"]
    pub mod ug {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::UG {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct UGR {
            bits: u16,
        }
        impl UGR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _UGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _UGW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 1023;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:9 - User gain error correction value"]
            #[inline(always)]
            pub fn ug(&self) -> UGR {
                let bits = {
                    const MASK: u16 = 1023;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                UGR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 4 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:9 - User gain error correction value"]
            #[inline(always)]
            pub fn ug(&mut self) -> _UGW {
                _UGW { w: self }
            }
        }
    }
    #[doc = "ADC General Calibration Value Register S"]
    pub struct CLPS {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC General Calibration Value Register S"]
    pub mod clps {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CLPS {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CLPSR {
            bits: u8,
        }
        impl CLPSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLPSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLPSW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 127;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:6 - Calibration Value"]
            #[inline(always)]
            pub fn clps(&self) -> CLPSR {
                let bits = {
                    const MASK: u8 = 127;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CLPSR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 46 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:6 - Calibration Value"]
            #[inline(always)]
            pub fn clps(&mut self) -> _CLPSW {
                _CLPSW { w: self }
            }
        }
    }
    #[doc = "ADC Plus-Side General Calibration Value Register 3"]
    pub struct CLP3 {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC Plus-Side General Calibration Value Register 3"]
    pub mod clp3 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CLP3 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CLP3R {
            bits: u16,
        }
        impl CLP3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLP3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLP3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 1023;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:9 - Calibration Value"]
            #[inline(always)]
            pub fn clp3(&self) -> CLP3R {
                let bits = {
                    const MASK: u16 = 1023;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                CLP3R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 384 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:9 - Calibration Value"]
            #[inline(always)]
            pub fn clp3(&mut self) -> _CLP3W {
                _CLP3W { w: self }
            }
        }
    }
    #[doc = "ADC Plus-Side General Calibration Value Register 2"]
    pub struct CLP2 {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC Plus-Side General Calibration Value Register 2"]
    pub mod clp2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CLP2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CLP2R {
            bits: u16,
        }
        impl CLP2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLP2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLP2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 1023;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:9 - Calibration Value"]
            #[inline(always)]
            pub fn clp2(&self) -> CLP2R {
                let bits = {
                    const MASK: u16 = 1023;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                CLP2R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 184 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:9 - Calibration Value"]
            #[inline(always)]
            pub fn clp2(&mut self) -> _CLP2W {
                _CLP2W { w: self }
            }
        }
    }
    #[doc = "ADC Plus-Side General Calibration Value Register 1"]
    pub struct CLP1 {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC Plus-Side General Calibration Value Register 1"]
    pub mod clp1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CLP1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CLP1R {
            bits: u16,
        }
        impl CLP1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLP1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLP1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 511;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:8 - Calibration Value"]
            #[inline(always)]
            pub fn clp1(&self) -> CLP1R {
                let bits = {
                    const MASK: u16 = 511;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                CLP1R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 92 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:8 - Calibration Value"]
            #[inline(always)]
            pub fn clp1(&mut self) -> _CLP1W {
                _CLP1W { w: self }
            }
        }
    }
    #[doc = "ADC Plus-Side General Calibration Value Register 0"]
    pub struct CLP0 {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC Plus-Side General Calibration Value Register 0"]
    pub mod clp0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CLP0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CLP0R {
            bits: u8,
        }
        impl CLP0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLP0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLP0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Calibration Value"]
            #[inline(always)]
            pub fn clp0(&self) -> CLP0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CLP0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 46 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Calibration Value"]
            #[inline(always)]
            pub fn clp0(&mut self) -> _CLP0W {
                _CLP0W { w: self }
            }
        }
    }
    #[doc = "ADC Plus-Side General Calibration Value Register X"]
    pub struct CLPX {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC Plus-Side General Calibration Value Register X"]
    pub mod clpx {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CLPX {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CLPXR {
            bits: u8,
        }
        impl CLPXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLPXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLPXW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 127;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:6 - Calibration Value"]
            #[inline(always)]
            pub fn clpx(&self) -> CLPXR {
                let bits = {
                    const MASK: u8 = 127;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CLPXR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:6 - Calibration Value"]
            #[inline(always)]
            pub fn clpx(&mut self) -> _CLPXW {
                _CLPXW { w: self }
            }
        }
    }
    #[doc = "ADC Plus-Side General Calibration Value Register 9"]
    pub struct CLP9 {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC Plus-Side General Calibration Value Register 9"]
    pub mod clp9 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CLP9 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CLP9R {
            bits: u8,
        }
        impl CLP9R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLP9W<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLP9W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 127;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:6 - Calibration Value"]
            #[inline(always)]
            pub fn clp9(&self) -> CLP9R {
                let bits = {
                    const MASK: u8 = 127;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CLP9R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:6 - Calibration Value"]
            #[inline(always)]
            pub fn clp9(&mut self) -> _CLP9W {
                _CLP9W { w: self }
            }
        }
    }
    #[doc = "ADC General Calibration Offset Value Register S"]
    pub struct CLPS_OFS {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC General Calibration Offset Value Register S"]
    pub mod clps_ofs {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CLPS_OFS {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CLPS_OFSR {
            bits: u8,
        }
        impl CLPS_OFSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLPS_OFSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLPS_OFSW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:3 - CLPS Offset"]
            #[inline(always)]
            pub fn clps_ofs(&self) -> CLPS_OFSR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CLPS_OFSR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - CLPS Offset"]
            #[inline(always)]
            pub fn clps_ofs(&mut self) -> _CLPS_OFSW {
                _CLPS_OFSW { w: self }
            }
        }
    }
    #[doc = "ADC Plus-Side General Calibration Offset Value Register 3"]
    pub struct CLP3_OFS {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC Plus-Side General Calibration Offset Value Register 3"]
    pub mod clp3_ofs {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CLP3_OFS {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CLP3_OFSR {
            bits: u8,
        }
        impl CLP3_OFSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLP3_OFSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLP3_OFSW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:3 - CLP3 Offset"]
            #[inline(always)]
            pub fn clp3_ofs(&self) -> CLP3_OFSR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CLP3_OFSR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - CLP3 Offset"]
            #[inline(always)]
            pub fn clp3_ofs(&mut self) -> _CLP3_OFSW {
                _CLP3_OFSW { w: self }
            }
        }
    }
    #[doc = "ADC Plus-Side General Calibration Offset Value Register 2"]
    pub struct CLP2_OFS {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC Plus-Side General Calibration Offset Value Register 2"]
    pub mod clp2_ofs {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CLP2_OFS {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CLP2_OFSR {
            bits: u8,
        }
        impl CLP2_OFSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLP2_OFSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLP2_OFSW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:3 - CLP2 Offset"]
            #[inline(always)]
            pub fn clp2_ofs(&self) -> CLP2_OFSR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CLP2_OFSR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - CLP2 Offset"]
            #[inline(always)]
            pub fn clp2_ofs(&mut self) -> _CLP2_OFSW {
                _CLP2_OFSW { w: self }
            }
        }
    }
    #[doc = "ADC Plus-Side General Calibration Offset Value Register 1"]
    pub struct CLP1_OFS {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC Plus-Side General Calibration Offset Value Register 1"]
    pub mod clp1_ofs {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CLP1_OFS {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CLP1_OFSR {
            bits: u8,
        }
        impl CLP1_OFSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLP1_OFSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLP1_OFSW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:3 - CLP1 Offset"]
            #[inline(always)]
            pub fn clp1_ofs(&self) -> CLP1_OFSR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CLP1_OFSR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - CLP1 Offset"]
            #[inline(always)]
            pub fn clp1_ofs(&mut self) -> _CLP1_OFSW {
                _CLP1_OFSW { w: self }
            }
        }
    }
    #[doc = "ADC Plus-Side General Calibration Offset Value Register 0"]
    pub struct CLP0_OFS {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC Plus-Side General Calibration Offset Value Register 0"]
    pub mod clp0_ofs {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CLP0_OFS {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CLP0_OFSR {
            bits: u8,
        }
        impl CLP0_OFSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLP0_OFSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLP0_OFSW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:3 - CLP0 Offset"]
            #[inline(always)]
            pub fn clp0_ofs(&self) -> CLP0_OFSR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CLP0_OFSR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - CLP0 Offset"]
            #[inline(always)]
            pub fn clp0_ofs(&mut self) -> _CLP0_OFSW {
                _CLP0_OFSW { w: self }
            }
        }
    }
    #[doc = "ADC Plus-Side General Calibration Offset Value Register X"]
    pub struct CLPX_OFS {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC Plus-Side General Calibration Offset Value Register X"]
    pub mod clpx_ofs {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CLPX_OFS {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CLPX_OFSR {
            bits: u16,
        }
        impl CLPX_OFSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLPX_OFSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLPX_OFSW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 4095;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:11 - CLPX Offset"]
            #[inline(always)]
            pub fn clpx_ofs(&self) -> CLPX_OFSR {
                let bits = {
                    const MASK: u16 = 4095;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                CLPX_OFSR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 1088 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:11 - CLPX Offset"]
            #[inline(always)]
            pub fn clpx_ofs(&mut self) -> _CLPX_OFSW {
                _CLPX_OFSW { w: self }
            }
        }
    }
    #[doc = "ADC Plus-Side General Calibration Offset Value Register 9"]
    pub struct CLP9_OFS {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC Plus-Side General Calibration Offset Value Register 9"]
    pub mod clp9_ofs {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CLP9_OFS {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CLP9_OFSR {
            bits: u16,
        }
        impl CLP9_OFSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLP9_OFSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLP9_OFSW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 4095;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:11 - CLP9 Offset"]
            #[inline(always)]
            pub fn clp9_ofs(&self) -> CLP9_OFSR {
                let bits = {
                    const MASK: u16 = 4095;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                CLP9_OFSR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 576 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:11 - CLP9 Offset"]
            #[inline(always)]
            pub fn clp9_ofs(&mut self) -> _CLP9_OFSW {
                _CLP9_OFSW { w: self }
            }
        }
    }
}
#[doc = "Analog-to-Digital Converter"]
pub struct ADC1 {
    register_block: adc1::RegisterBlock,
}
impl Deref for ADC1 {
    type Target = adc1::RegisterBlock;
    fn deref(&self) -> &adc1::RegisterBlock {
        &self.register_block
    }
}
#[doc = "The LPSPI Memory Map/Register Definition can be found here."]
pub const LPSPI0: Peripheral<LPSPI0> = unsafe { Peripheral::new(1073922048) };
#[doc = "The LPSPI Memory Map/Register Definition can be found here."]
pub mod lpspi0 {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - Version ID Register"]
        pub verid: VERID,
        #[doc = "0x04 - Parameter Register"]
        pub param: PARAM,
        _reserved0: [u8; 8usize],
        #[doc = "0x10 - Control Register"]
        pub cr: CR,
        #[doc = "0x14 - Status Register"]
        pub sr: SR,
        #[doc = "0x18 - Interrupt Enable Register"]
        pub ier: IER,
        #[doc = "0x1c - DMA Enable Register"]
        pub der: DER,
        #[doc = "0x20 - Configuration Register 0"]
        pub cfgr0: CFGR0,
        #[doc = "0x24 - Configuration Register 1"]
        pub cfgr1: CFGR1,
        _reserved1: [u8; 8usize],
        #[doc = "0x30 - Data Match Register 0"]
        pub dmr0: DMR0,
        #[doc = "0x34 - Data Match Register 1"]
        pub dmr1: DMR1,
        _reserved2: [u8; 8usize],
        #[doc = "0x40 - Clock Configuration Register"]
        pub ccr: CCR,
        _reserved3: [u8; 20usize],
        #[doc = "0x58 - FIFO Control Register"]
        pub fcr: FCR,
        #[doc = "0x5c - FIFO Status Register"]
        pub fsr: FSR,
        #[doc = "0x60 - Transmit Command Register"]
        pub tcr: TCR,
        #[doc = "0x64 - Transmit Data Register"]
        pub tdr: TDR,
        _reserved4: [u8; 8usize],
        #[doc = "0x70 - Receive Status Register"]
        pub rsr: RSR,
        #[doc = "0x74 - Receive Data Register"]
        pub rdr: RDR,
    }
    #[doc = "Version ID Register"]
    pub struct VERID {
        register: VolatileCell<u32>,
    }
    #[doc = "Version ID Register"]
    pub mod verid {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::VERID {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = "Possible values of the field `FEATURE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FEATURER {
            #[doc = "Standard feature set supporting 32-bit shift register."]
            _0000000000000100,
            #[doc = r" Reserved"]
            _Reserved(u16),
        }
        impl FEATURER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                match *self {
                    FEATURER::_0000000000000100 => 4,
                    FEATURER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u16) -> FEATURER {
                match value {
                    4 => FEATURER::_0000000000000100,
                    i => FEATURER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000000000000100`"]
            #[inline(always)]
            pub fn is_0000000000000100(&self) -> bool {
                *self == FEATURER::_0000000000000100
            }
        }
        #[doc = r" Value of the field"]
        pub struct MINORR {
            bits: u8,
        }
        impl MINORR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct MAJORR {
            bits: u8,
        }
        impl MAJORR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Module Identification Number"]
            #[inline(always)]
            pub fn feature(&self) -> FEATURER {
                FEATURER::_from({
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                })
            }
            #[doc = "Bits 16:23 - Minor Version Number"]
            #[inline(always)]
            pub fn minor(&self) -> MINORR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                MINORR { bits }
            }
            #[doc = "Bits 24:31 - Major Version Number"]
            #[inline(always)]
            pub fn major(&self) -> MAJORR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                MAJORR { bits }
            }
        }
    }
    #[doc = "Parameter Register"]
    pub struct PARAM {
        register: VolatileCell<u32>,
    }
    #[doc = "Parameter Register"]
    pub mod param {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::PARAM {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct TXFIFOR {
            bits: u8,
        }
        impl TXFIFOR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct RXFIFOR {
            bits: u8,
        }
        impl RXFIFOR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Transmit FIFO Size"]
            #[inline(always)]
            pub fn txfifo(&self) -> TXFIFOR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TXFIFOR { bits }
            }
            #[doc = "Bits 8:15 - Receive FIFO Size"]
            #[inline(always)]
            pub fn rxfifo(&self) -> RXFIFOR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                RXFIFOR { bits }
            }
        }
    }
    #[doc = "Control Register"]
    pub struct CR {
        register: VolatileCell<u32>,
    }
    #[doc = "Control Register"]
    pub mod cr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `MEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MENR {
            #[doc = "Module is disabled."]
            _0,
            #[doc = "Module is enabled."]
            _1,
        }
        impl MENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MENR::_0 => false,
                    MENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MENR {
                match value {
                    false => MENR::_0,
                    true => MENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MENR::_1
            }
        }
        #[doc = "Possible values of the field `RST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RSTR {
            #[doc = "Master logic is not reset."]
            _0,
            #[doc = "Master logic is reset."]
            _1,
        }
        impl RSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RSTR::_0 => false,
                    RSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RSTR {
                match value {
                    false => RSTR::_0,
                    true => RSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RSTR::_1
            }
        }
        #[doc = "Possible values of the field `DOZEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DOZENR {
            #[doc = "Module is enabled in Doze mode."]
            _0,
            #[doc = "Module is disabled in Doze mode."]
            _1,
        }
        impl DOZENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DOZENR::_0 => false,
                    DOZENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DOZENR {
                match value {
                    false => DOZENR::_0,
                    true => DOZENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DOZENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DOZENR::_1
            }
        }
        #[doc = "Possible values of the field `DBGEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DBGENR {
            #[doc = "Module is disabled in debug mode."]
            _0,
            #[doc = "Module is enabled in debug mode."]
            _1,
        }
        impl DBGENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DBGENR::_0 => false,
                    DBGENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DBGENR {
                match value {
                    false => DBGENR::_0,
                    true => DBGENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DBGENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DBGENR::_1
            }
        }
        #[doc = "Values that can be written to the field `MEN`"]
        pub enum MENW {
            #[doc = "Module is disabled."]
            _0,
            #[doc = "Module is enabled."]
            _1,
        }
        impl MENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MENW::_0 => false,
                    MENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Module is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MENW::_0)
            }
            #[doc = "Module is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RST`"]
        pub enum RSTW {
            #[doc = "Master logic is not reset."]
            _0,
            #[doc = "Master logic is reset."]
            _1,
        }
        impl RSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RSTW::_0 => false,
                    RSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Master logic is not reset."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RSTW::_0)
            }
            #[doc = "Master logic is reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DOZEN`"]
        pub enum DOZENW {
            #[doc = "Module is enabled in Doze mode."]
            _0,
            #[doc = "Module is disabled in Doze mode."]
            _1,
        }
        impl DOZENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DOZENW::_0 => false,
                    DOZENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DOZENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DOZENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DOZENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Module is enabled in Doze mode."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DOZENW::_0)
            }
            #[doc = "Module is disabled in Doze mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DOZENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DBGEN`"]
        pub enum DBGENW {
            #[doc = "Module is disabled in debug mode."]
            _0,
            #[doc = "Module is enabled in debug mode."]
            _1,
        }
        impl DBGENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DBGENW::_0 => false,
                    DBGENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DBGENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DBGENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DBGENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Module is disabled in debug mode."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DBGENW::_0)
            }
            #[doc = "Module is enabled in debug mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DBGENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RTF`"]
        pub enum RTFW {
            #[doc = "No effect."]
            _0,
            #[doc = "Transmit FIFO is reset."]
            _1,
        }
        impl RTFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RTFW::_0 => false,
                    RTFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RTFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RTFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RTFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No effect."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RTFW::_0)
            }
            #[doc = "Transmit FIFO is reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RTFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RRF`"]
        pub enum RRFW {
            #[doc = "No effect."]
            _0,
            #[doc = "Receive FIFO is reset."]
            _1,
        }
        impl RRFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RRFW::_0 => false,
                    RRFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RRFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RRFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RRFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No effect."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RRFW::_0)
            }
            #[doc = "Receive FIFO is reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RRFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Module Enable"]
            #[inline(always)]
            pub fn men(&self) -> MENR {
                MENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Software Reset"]
            #[inline(always)]
            pub fn rst(&self) -> RSTR {
                RSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Doze mode enable"]
            #[inline(always)]
            pub fn dozen(&self) -> DOZENR {
                DOZENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Debug Enable"]
            #[inline(always)]
            pub fn dbgen(&self) -> DBGENR {
                DBGENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Module Enable"]
            #[inline(always)]
            pub fn men(&mut self) -> _MENW {
                _MENW { w: self }
            }
            #[doc = "Bit 1 - Software Reset"]
            #[inline(always)]
            pub fn rst(&mut self) -> _RSTW {
                _RSTW { w: self }
            }
            #[doc = "Bit 2 - Doze mode enable"]
            #[inline(always)]
            pub fn dozen(&mut self) -> _DOZENW {
                _DOZENW { w: self }
            }
            #[doc = "Bit 3 - Debug Enable"]
            #[inline(always)]
            pub fn dbgen(&mut self) -> _DBGENW {
                _DBGENW { w: self }
            }
            #[doc = "Bit 8 - Reset Transmit FIFO"]
            #[inline(always)]
            pub fn rtf(&mut self) -> _RTFW {
                _RTFW { w: self }
            }
            #[doc = "Bit 9 - Reset Receive FIFO"]
            #[inline(always)]
            pub fn rrf(&mut self) -> _RRFW {
                _RRFW { w: self }
            }
        }
    }
    #[doc = "Status Register"]
    pub struct SR {
        register: VolatileCell<u32>,
    }
    #[doc = "Status Register"]
    pub mod sr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TDF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TDFR {
            #[doc = "Transmit data not requested."]
            _0,
            #[doc = "Transmit data is requested."]
            _1,
        }
        impl TDFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TDFR::_0 => false,
                    TDFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TDFR {
                match value {
                    false => TDFR::_0,
                    true => TDFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TDFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TDFR::_1
            }
        }
        #[doc = "Possible values of the field `RDF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RDFR {
            #[doc = "Receive Data is not ready."]
            _0,
            #[doc = "Receive data is ready."]
            _1,
        }
        impl RDFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RDFR::_0 => false,
                    RDFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RDFR {
                match value {
                    false => RDFR::_0,
                    true => RDFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RDFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RDFR::_1
            }
        }
        #[doc = "Possible values of the field `WCF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WCFR {
            #[doc = "Transfer word not completed."]
            _0,
            #[doc = "Transfer word completed."]
            _1,
        }
        impl WCFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WCFR::_0 => false,
                    WCFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WCFR {
                match value {
                    false => WCFR::_0,
                    true => WCFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WCFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WCFR::_1
            }
        }
        #[doc = "Possible values of the field `FCF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FCFR {
            #[doc = "Frame transfer has not completed."]
            _0,
            #[doc = "Frame transfer has completed."]
            _1,
        }
        impl FCFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FCFR::_0 => false,
                    FCFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FCFR {
                match value {
                    false => FCFR::_0,
                    true => FCFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FCFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FCFR::_1
            }
        }
        #[doc = "Possible values of the field `TCF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TCFR {
            #[doc = "All transfers have not completed."]
            _0,
            #[doc = "All transfers have completed."]
            _1,
        }
        impl TCFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TCFR::_0 => false,
                    TCFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TCFR {
                match value {
                    false => TCFR::_0,
                    true => TCFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TCFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TCFR::_1
            }
        }
        #[doc = "Possible values of the field `TEF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TEFR {
            #[doc = "Transmit FIFO underrun has not occurred."]
            _0,
            #[doc = "Transmit FIFO underrun has occurred"]
            _1,
        }
        impl TEFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TEFR::_0 => false,
                    TEFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TEFR {
                match value {
                    false => TEFR::_0,
                    true => TEFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TEFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TEFR::_1
            }
        }
        #[doc = "Possible values of the field `REF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum REFR {
            #[doc = "Receive FIFO has not overflowed."]
            _0,
            #[doc = "Receive FIFO has overflowed."]
            _1,
        }
        impl REFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    REFR::_0 => false,
                    REFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> REFR {
                match value {
                    false => REFR::_0,
                    true => REFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == REFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == REFR::_1
            }
        }
        #[doc = "Possible values of the field `DMF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMFR {
            #[doc = "Have not received matching data."]
            _0,
            #[doc = "Have received matching data."]
            _1,
        }
        impl DMFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMFR::_0 => false,
                    DMFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMFR {
                match value {
                    false => DMFR::_0,
                    true => DMFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMFR::_1
            }
        }
        #[doc = "Possible values of the field `MBF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MBFR {
            #[doc = "LPSPI is idle."]
            _0,
            #[doc = "LPSPI is busy."]
            _1,
        }
        impl MBFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MBFR::_0 => false,
                    MBFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MBFR {
                match value {
                    false => MBFR::_0,
                    true => MBFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MBFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MBFR::_1
            }
        }
        #[doc = "Values that can be written to the field `WCF`"]
        pub enum WCFW {
            #[doc = "Transfer word not completed."]
            _0,
            #[doc = "Transfer word completed."]
            _1,
        }
        impl WCFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WCFW::_0 => false,
                    WCFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WCFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WCFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WCFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Transfer word not completed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WCFW::_0)
            }
            #[doc = "Transfer word completed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WCFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FCF`"]
        pub enum FCFW {
            #[doc = "Frame transfer has not completed."]
            _0,
            #[doc = "Frame transfer has completed."]
            _1,
        }
        impl FCFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FCFW::_0 => false,
                    FCFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FCFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FCFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FCFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Frame transfer has not completed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FCFW::_0)
            }
            #[doc = "Frame transfer has completed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FCFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TCF`"]
        pub enum TCFW {
            #[doc = "All transfers have not completed."]
            _0,
            #[doc = "All transfers have completed."]
            _1,
        }
        impl TCFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TCFW::_0 => false,
                    TCFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TCFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TCFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TCFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "All transfers have not completed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TCFW::_0)
            }
            #[doc = "All transfers have completed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TCFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TEF`"]
        pub enum TEFW {
            #[doc = "Transmit FIFO underrun has not occurred."]
            _0,
            #[doc = "Transmit FIFO underrun has occurred"]
            _1,
        }
        impl TEFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TEFW::_0 => false,
                    TEFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TEFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TEFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TEFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Transmit FIFO underrun has not occurred."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TEFW::_0)
            }
            #[doc = "Transmit FIFO underrun has occurred"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TEFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `REF`"]
        pub enum REFW {
            #[doc = "Receive FIFO has not overflowed."]
            _0,
            #[doc = "Receive FIFO has overflowed."]
            _1,
        }
        impl REFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    REFW::_0 => false,
                    REFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _REFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _REFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: REFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Receive FIFO has not overflowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(REFW::_0)
            }
            #[doc = "Receive FIFO has overflowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(REFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMF`"]
        pub enum DMFW {
            #[doc = "Have not received matching data."]
            _0,
            #[doc = "Have received matching data."]
            _1,
        }
        impl DMFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMFW::_0 => false,
                    DMFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Have not received matching data."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMFW::_0)
            }
            #[doc = "Have received matching data."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Transmit Data Flag"]
            #[inline(always)]
            pub fn tdf(&self) -> TDFR {
                TDFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Receive Data Flag"]
            #[inline(always)]
            pub fn rdf(&self) -> RDFR {
                RDFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Word Complete Flag"]
            #[inline(always)]
            pub fn wcf(&self) -> WCFR {
                WCFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Frame Complete Flag"]
            #[inline(always)]
            pub fn fcf(&self) -> FCFR {
                FCFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Transfer Complete Flag"]
            #[inline(always)]
            pub fn tcf(&self) -> TCFR {
                TCFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 11 - Transmit Error Flag"]
            #[inline(always)]
            pub fn tef(&self) -> TEFR {
                TEFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Receive Error Flag"]
            #[inline(always)]
            pub fn ref_(&self) -> REFR {
                REFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Data Match Flag"]
            #[inline(always)]
            pub fn dmf(&self) -> DMFR {
                DMFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 24 - Module Busy Flag"]
            #[inline(always)]
            pub fn mbf(&self) -> MBFR {
                MBFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 1 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 8 - Word Complete Flag"]
            #[inline(always)]
            pub fn wcf(&mut self) -> _WCFW {
                _WCFW { w: self }
            }
            #[doc = "Bit 9 - Frame Complete Flag"]
            #[inline(always)]
            pub fn fcf(&mut self) -> _FCFW {
                _FCFW { w: self }
            }
            #[doc = "Bit 10 - Transfer Complete Flag"]
            #[inline(always)]
            pub fn tcf(&mut self) -> _TCFW {
                _TCFW { w: self }
            }
            #[doc = "Bit 11 - Transmit Error Flag"]
            #[inline(always)]
            pub fn tef(&mut self) -> _TEFW {
                _TEFW { w: self }
            }
            #[doc = "Bit 12 - Receive Error Flag"]
            #[inline(always)]
            pub fn ref_(&mut self) -> _REFW {
                _REFW { w: self }
            }
            #[doc = "Bit 13 - Data Match Flag"]
            #[inline(always)]
            pub fn dmf(&mut self) -> _DMFW {
                _DMFW { w: self }
            }
        }
    }
    #[doc = "Interrupt Enable Register"]
    pub struct IER {
        register: VolatileCell<u32>,
    }
    #[doc = "Interrupt Enable Register"]
    pub mod ier {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::IER {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TDIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TDIER {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled"]
            _1,
        }
        impl TDIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TDIER::_0 => false,
                    TDIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TDIER {
                match value {
                    false => TDIER::_0,
                    true => TDIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TDIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TDIER::_1
            }
        }
        #[doc = "Possible values of the field `RDIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RDIER {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl RDIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RDIER::_0 => false,
                    RDIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RDIER {
                match value {
                    false => RDIER::_0,
                    true => RDIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RDIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RDIER::_1
            }
        }
        #[doc = "Possible values of the field `WCIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WCIER {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl WCIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WCIER::_0 => false,
                    WCIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WCIER {
                match value {
                    false => WCIER::_0,
                    true => WCIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WCIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WCIER::_1
            }
        }
        #[doc = "Possible values of the field `FCIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FCIER {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl FCIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FCIER::_0 => false,
                    FCIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FCIER {
                match value {
                    false => FCIER::_0,
                    true => FCIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FCIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FCIER::_1
            }
        }
        #[doc = "Possible values of the field `TCIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TCIER {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl TCIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TCIER::_0 => false,
                    TCIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TCIER {
                match value {
                    false => TCIER::_0,
                    true => TCIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TCIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TCIER::_1
            }
        }
        #[doc = "Possible values of the field `TEIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TEIER {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl TEIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TEIER::_0 => false,
                    TEIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TEIER {
                match value {
                    false => TEIER::_0,
                    true => TEIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TEIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TEIER::_1
            }
        }
        #[doc = "Possible values of the field `REIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum REIER {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl REIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    REIER::_0 => false,
                    REIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> REIER {
                match value {
                    false => REIER::_0,
                    true => REIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == REIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == REIER::_1
            }
        }
        #[doc = "Possible values of the field `DMIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMIER {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl DMIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMIER::_0 => false,
                    DMIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMIER {
                match value {
                    false => DMIER::_0,
                    true => DMIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMIER::_1
            }
        }
        #[doc = "Values that can be written to the field `TDIE`"]
        pub enum TDIEW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled"]
            _1,
        }
        impl TDIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TDIEW::_0 => false,
                    TDIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TDIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TDIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TDIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TDIEW::_0)
            }
            #[doc = "Interrupt enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TDIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RDIE`"]
        pub enum RDIEW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl RDIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RDIEW::_0 => false,
                    RDIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RDIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RDIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RDIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RDIEW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RDIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WCIE`"]
        pub enum WCIEW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl WCIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WCIEW::_0 => false,
                    WCIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WCIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WCIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WCIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WCIEW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WCIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FCIE`"]
        pub enum FCIEW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl FCIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FCIEW::_0 => false,
                    FCIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FCIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FCIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FCIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FCIEW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FCIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TCIE`"]
        pub enum TCIEW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl TCIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TCIEW::_0 => false,
                    TCIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TCIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TCIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TCIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TCIEW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TCIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TEIE`"]
        pub enum TEIEW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl TEIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TEIEW::_0 => false,
                    TEIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TEIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TEIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TEIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TEIEW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TEIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `REIE`"]
        pub enum REIEW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl REIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    REIEW::_0 => false,
                    REIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _REIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _REIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: REIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(REIEW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(REIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMIE`"]
        pub enum DMIEW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl DMIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMIEW::_0 => false,
                    DMIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMIEW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Transmit Data Interrupt Enable"]
            #[inline(always)]
            pub fn tdie(&self) -> TDIER {
                TDIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Receive Data Interrupt Enable"]
            #[inline(always)]
            pub fn rdie(&self) -> RDIER {
                RDIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Word Complete Interrupt Enable"]
            #[inline(always)]
            pub fn wcie(&self) -> WCIER {
                WCIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Frame Complete Interrupt Enable"]
            #[inline(always)]
            pub fn fcie(&self) -> FCIER {
                FCIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Transfer Complete Interrupt Enable"]
            #[inline(always)]
            pub fn tcie(&self) -> TCIER {
                TCIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 11 - Transmit Error Interrupt Enable"]
            #[inline(always)]
            pub fn teie(&self) -> TEIER {
                TEIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Receive Error Interrupt Enable"]
            #[inline(always)]
            pub fn reie(&self) -> REIER {
                REIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Data Match Interrupt Enable"]
            #[inline(always)]
            pub fn dmie(&self) -> DMIER {
                DMIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Transmit Data Interrupt Enable"]
            #[inline(always)]
            pub fn tdie(&mut self) -> _TDIEW {
                _TDIEW { w: self }
            }
            #[doc = "Bit 1 - Receive Data Interrupt Enable"]
            #[inline(always)]
            pub fn rdie(&mut self) -> _RDIEW {
                _RDIEW { w: self }
            }
            #[doc = "Bit 8 - Word Complete Interrupt Enable"]
            #[inline(always)]
            pub fn wcie(&mut self) -> _WCIEW {
                _WCIEW { w: self }
            }
            #[doc = "Bit 9 - Frame Complete Interrupt Enable"]
            #[inline(always)]
            pub fn fcie(&mut self) -> _FCIEW {
                _FCIEW { w: self }
            }
            #[doc = "Bit 10 - Transfer Complete Interrupt Enable"]
            #[inline(always)]
            pub fn tcie(&mut self) -> _TCIEW {
                _TCIEW { w: self }
            }
            #[doc = "Bit 11 - Transmit Error Interrupt Enable"]
            #[inline(always)]
            pub fn teie(&mut self) -> _TEIEW {
                _TEIEW { w: self }
            }
            #[doc = "Bit 12 - Receive Error Interrupt Enable"]
            #[inline(always)]
            pub fn reie(&mut self) -> _REIEW {
                _REIEW { w: self }
            }
            #[doc = "Bit 13 - Data Match Interrupt Enable"]
            #[inline(always)]
            pub fn dmie(&mut self) -> _DMIEW {
                _DMIEW { w: self }
            }
        }
    }
    #[doc = "DMA Enable Register"]
    pub struct DER {
        register: VolatileCell<u32>,
    }
    #[doc = "DMA Enable Register"]
    pub mod der {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::DER {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TDDE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TDDER {
            #[doc = "DMA request disabled."]
            _0,
            #[doc = "DMA request enabled"]
            _1,
        }
        impl TDDER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TDDER::_0 => false,
                    TDDER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TDDER {
                match value {
                    false => TDDER::_0,
                    true => TDDER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TDDER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TDDER::_1
            }
        }
        #[doc = "Possible values of the field `RDDE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RDDER {
            #[doc = "DMA request disabled."]
            _0,
            #[doc = "DMA request enabled."]
            _1,
        }
        impl RDDER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RDDER::_0 => false,
                    RDDER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RDDER {
                match value {
                    false => RDDER::_0,
                    true => RDDER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RDDER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RDDER::_1
            }
        }
        #[doc = "Values that can be written to the field `TDDE`"]
        pub enum TDDEW {
            #[doc = "DMA request disabled."]
            _0,
            #[doc = "DMA request enabled"]
            _1,
        }
        impl TDDEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TDDEW::_0 => false,
                    TDDEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TDDEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TDDEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TDDEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA request disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TDDEW::_0)
            }
            #[doc = "DMA request enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TDDEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RDDE`"]
        pub enum RDDEW {
            #[doc = "DMA request disabled."]
            _0,
            #[doc = "DMA request enabled."]
            _1,
        }
        impl RDDEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RDDEW::_0 => false,
                    RDDEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RDDEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RDDEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RDDEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA request disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RDDEW::_0)
            }
            #[doc = "DMA request enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RDDEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Transmit Data DMA Enable"]
            #[inline(always)]
            pub fn tdde(&self) -> TDDER {
                TDDER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Receive Data DMA Enable"]
            #[inline(always)]
            pub fn rdde(&self) -> RDDER {
                RDDER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Transmit Data DMA Enable"]
            #[inline(always)]
            pub fn tdde(&mut self) -> _TDDEW {
                _TDDEW { w: self }
            }
            #[doc = "Bit 1 - Receive Data DMA Enable"]
            #[inline(always)]
            pub fn rdde(&mut self) -> _RDDEW {
                _RDDEW { w: self }
            }
        }
    }
    #[doc = "Configuration Register 0"]
    pub struct CFGR0 {
        register: VolatileCell<u32>,
    }
    #[doc = "Configuration Register 0"]
    pub mod cfgr0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CFGR0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `HREN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HRENR {
            #[doc = "Host request is disabled."]
            _0,
            #[doc = "Host request is enabled."]
            _1,
        }
        impl HRENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HRENR::_0 => false,
                    HRENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HRENR {
                match value {
                    false => HRENR::_0,
                    true => HRENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HRENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HRENR::_1
            }
        }
        #[doc = "Possible values of the field `HRPOL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HRPOLR {
            #[doc = "Active low."]
            _0,
            #[doc = "Active high."]
            _1,
        }
        impl HRPOLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HRPOLR::_0 => false,
                    HRPOLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HRPOLR {
                match value {
                    false => HRPOLR::_0,
                    true => HRPOLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HRPOLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HRPOLR::_1
            }
        }
        #[doc = "Possible values of the field `HRSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HRSELR {
            #[doc = "Host request input is pin LPSPI_HREQ."]
            _0,
            #[doc = "Host request input is input trigger."]
            _1,
        }
        impl HRSELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HRSELR::_0 => false,
                    HRSELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HRSELR {
                match value {
                    false => HRSELR::_0,
                    true => HRSELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HRSELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HRSELR::_1
            }
        }
        #[doc = "Possible values of the field `CIRFIFO`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CIRFIFOR {
            #[doc = "Circular FIFO is disabled."]
            _0,
            #[doc = "Circular FIFO is enabled."]
            _1,
        }
        impl CIRFIFOR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CIRFIFOR::_0 => false,
                    CIRFIFOR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CIRFIFOR {
                match value {
                    false => CIRFIFOR::_0,
                    true => CIRFIFOR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CIRFIFOR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CIRFIFOR::_1
            }
        }
        #[doc = "Possible values of the field `RDMO`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RDMOR {
            #[doc = "Received data is stored in the receive FIFO as normal."]
            _0,
            #[doc = "Received data is discarded unless the DMF is set."]
            _1,
        }
        impl RDMOR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RDMOR::_0 => false,
                    RDMOR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RDMOR {
                match value {
                    false => RDMOR::_0,
                    true => RDMOR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RDMOR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RDMOR::_1
            }
        }
        #[doc = "Values that can be written to the field `HREN`"]
        pub enum HRENW {
            #[doc = "Host request is disabled."]
            _0,
            #[doc = "Host request is enabled."]
            _1,
        }
        impl HRENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HRENW::_0 => false,
                    HRENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HRENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HRENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HRENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Host request is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HRENW::_0)
            }
            #[doc = "Host request is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HRENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `HRPOL`"]
        pub enum HRPOLW {
            #[doc = "Active low."]
            _0,
            #[doc = "Active high."]
            _1,
        }
        impl HRPOLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HRPOLW::_0 => false,
                    HRPOLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HRPOLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HRPOLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HRPOLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Active low."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HRPOLW::_0)
            }
            #[doc = "Active high."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HRPOLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `HRSEL`"]
        pub enum HRSELW {
            #[doc = "Host request input is pin LPSPI_HREQ."]
            _0,
            #[doc = "Host request input is input trigger."]
            _1,
        }
        impl HRSELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HRSELW::_0 => false,
                    HRSELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HRSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HRSELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HRSELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Host request input is pin LPSPI_HREQ."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HRSELW::_0)
            }
            #[doc = "Host request input is input trigger."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HRSELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CIRFIFO`"]
        pub enum CIRFIFOW {
            #[doc = "Circular FIFO is disabled."]
            _0,
            #[doc = "Circular FIFO is enabled."]
            _1,
        }
        impl CIRFIFOW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CIRFIFOW::_0 => false,
                    CIRFIFOW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CIRFIFOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CIRFIFOW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CIRFIFOW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Circular FIFO is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CIRFIFOW::_0)
            }
            #[doc = "Circular FIFO is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CIRFIFOW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RDMO`"]
        pub enum RDMOW {
            #[doc = "Received data is stored in the receive FIFO as normal."]
            _0,
            #[doc = "Received data is discarded unless the DMF is set."]
            _1,
        }
        impl RDMOW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RDMOW::_0 => false,
                    RDMOW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RDMOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RDMOW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RDMOW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Received data is stored in the receive FIFO as normal."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RDMOW::_0)
            }
            #[doc = "Received data is discarded unless the DMF is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RDMOW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Host Request Enable"]
            #[inline(always)]
            pub fn hren(&self) -> HRENR {
                HRENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Host Request Polarity"]
            #[inline(always)]
            pub fn hrpol(&self) -> HRPOLR {
                HRPOLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Host Request Select"]
            #[inline(always)]
            pub fn hrsel(&self) -> HRSELR {
                HRSELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Circular FIFO Enable"]
            #[inline(always)]
            pub fn cirfifo(&self) -> CIRFIFOR {
                CIRFIFOR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Receive Data Match Only"]
            #[inline(always)]
            pub fn rdmo(&self) -> RDMOR {
                RDMOR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Host Request Enable"]
            #[inline(always)]
            pub fn hren(&mut self) -> _HRENW {
                _HRENW { w: self }
            }
            #[doc = "Bit 1 - Host Request Polarity"]
            #[inline(always)]
            pub fn hrpol(&mut self) -> _HRPOLW {
                _HRPOLW { w: self }
            }
            #[doc = "Bit 2 - Host Request Select"]
            #[inline(always)]
            pub fn hrsel(&mut self) -> _HRSELW {
                _HRSELW { w: self }
            }
            #[doc = "Bit 8 - Circular FIFO Enable"]
            #[inline(always)]
            pub fn cirfifo(&mut self) -> _CIRFIFOW {
                _CIRFIFOW { w: self }
            }
            #[doc = "Bit 9 - Receive Data Match Only"]
            #[inline(always)]
            pub fn rdmo(&mut self) -> _RDMOW {
                _RDMOW { w: self }
            }
        }
    }
    #[doc = "Configuration Register 1"]
    pub struct CFGR1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Configuration Register 1"]
    pub mod cfgr1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CFGR1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `MASTER`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MASTERR {
            #[doc = "Slave mode."]
            _0,
            #[doc = "Master mode."]
            _1,
        }
        impl MASTERR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MASTERR::_0 => false,
                    MASTERR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MASTERR {
                match value {
                    false => MASTERR::_0,
                    true => MASTERR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MASTERR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MASTERR::_1
            }
        }
        #[doc = "Possible values of the field `SAMPLE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SAMPLER {
            #[doc = "Input data sampled on SCK edge."]
            _0,
            #[doc = "Input data sampled on delayed SCK edge."]
            _1,
        }
        impl SAMPLER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SAMPLER::_0 => false,
                    SAMPLER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SAMPLER {
                match value {
                    false => SAMPLER::_0,
                    true => SAMPLER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SAMPLER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SAMPLER::_1
            }
        }
        #[doc = "Possible values of the field `AUTOPCS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum AUTOPCSR {
            #[doc = "Automatic PCS generation disabled."]
            _0,
            #[doc = "Automatic PCS generation enabled."]
            _1,
        }
        impl AUTOPCSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    AUTOPCSR::_0 => false,
                    AUTOPCSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> AUTOPCSR {
                match value {
                    false => AUTOPCSR::_0,
                    true => AUTOPCSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == AUTOPCSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == AUTOPCSR::_1
            }
        }
        #[doc = "Possible values of the field `NOSTALL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum NOSTALLR {
            #[doc = "Transfers will stall when transmit FIFO is empty or receive FIFO is full."]
            _0,
            #[doc = "Transfers will not stall, allowing transmit FIFO underrun or receive FIFO overrun to occur."]
            _1,
        }
        impl NOSTALLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    NOSTALLR::_0 => false,
                    NOSTALLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> NOSTALLR {
                match value {
                    false => NOSTALLR::_0,
                    true => NOSTALLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == NOSTALLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == NOSTALLR::_1
            }
        }
        #[doc = "Possible values of the field `PCSPOL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PCSPOLR {
            #[doc = "The PCSx is active low."]
            _0000,
            #[doc = "The PCSx is active high."]
            _0001,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl PCSPOLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PCSPOLR::_0000 => 0,
                    PCSPOLR::_0001 => 1,
                    PCSPOLR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PCSPOLR {
                match value {
                    0 => PCSPOLR::_0000,
                    1 => PCSPOLR::_0001,
                    i => PCSPOLR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == PCSPOLR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == PCSPOLR::_0001
            }
        }
        #[doc = "Possible values of the field `MATCFG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MATCFGR {
            #[doc = "Match is disabled."]
            _000,
            #[doc = "010b - Match is enabled, if 1st data word equals MATCH0 OR MATCH1, i.e., (1st data word = MATCH0 + MATCH1)"]
            _010,
            #[doc = "011b - Match is enabled, if any data word equals MATCH0 OR MATCH1, i.e., (any data word = MATCH0 + MATCH1)"]
            _011,
            #[doc = "100b - Match is enabled, if 1st data word equals MATCH0 AND 2nd data word equals MATCH1, i.e., [(1st data word = MATCH0) * (2nd data word = MATCH1)]"]
            _100,
            #[doc = "101b - Match is enabled, if any data word equals MATCH0 AND the next data word equals MATCH1, i.e., [(any data word = MATCH0) * (next data word = MATCH1)]"]
            _101,
            #[doc = "110b - Match is enabled, if (1st data word AND MATCH1) equals (MATCH0 AND MATCH1), i.e., [(1st data word * MATCH1) = (MATCH0 * MATCH1)]"]
            _110,
            #[doc = "111b - Match is enabled, if (any data word AND MATCH1) equals (MATCH0 AND MATCH1), i.e., [(any data word * MATCH1) = (MATCH0 * MATCH1)]"]
            _111,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl MATCFGR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MATCFGR::_000 => 0,
                    MATCFGR::_010 => 2,
                    MATCFGR::_011 => 3,
                    MATCFGR::_100 => 4,
                    MATCFGR::_101 => 5,
                    MATCFGR::_110 => 6,
                    MATCFGR::_111 => 7,
                    MATCFGR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MATCFGR {
                match value {
                    0 => MATCFGR::_000,
                    2 => MATCFGR::_010,
                    3 => MATCFGR::_011,
                    4 => MATCFGR::_100,
                    5 => MATCFGR::_101,
                    6 => MATCFGR::_110,
                    7 => MATCFGR::_111,
                    i => MATCFGR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MATCFGR::_000
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MATCFGR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MATCFGR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MATCFGR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MATCFGR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MATCFGR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MATCFGR::_111
            }
        }
        #[doc = "Possible values of the field `PINCFG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PINCFGR {
            #[doc = "SIN is used for input data and SOUT for output data."]
            _00,
            #[doc = "SIN is used for both input and output data."]
            _01,
            #[doc = "SOUT is used for both input and output data."]
            _10,
            #[doc = "SOUT is used for input data and SIN for output data."]
            _11,
        }
        impl PINCFGR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PINCFGR::_00 => 0,
                    PINCFGR::_01 => 1,
                    PINCFGR::_10 => 2,
                    PINCFGR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PINCFGR {
                match value {
                    0 => PINCFGR::_00,
                    1 => PINCFGR::_01,
                    2 => PINCFGR::_10,
                    3 => PINCFGR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == PINCFGR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == PINCFGR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == PINCFGR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == PINCFGR::_11
            }
        }
        #[doc = "Possible values of the field `OUTCFG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum OUTCFGR {
            #[doc = "Output data retains last value when chip select is negated."]
            _0,
            #[doc = "Output data is tristated when chip select is negated."]
            _1,
        }
        impl OUTCFGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    OUTCFGR::_0 => false,
                    OUTCFGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> OUTCFGR {
                match value {
                    false => OUTCFGR::_0,
                    true => OUTCFGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == OUTCFGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == OUTCFGR::_1
            }
        }
        #[doc = "Possible values of the field `PCSCFG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PCSCFGR {
            #[doc = "PCS[3:2] are enabled."]
            _0,
            #[doc = "PCS[3:2] are disabled."]
            _1,
        }
        impl PCSCFGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PCSCFGR::_0 => false,
                    PCSCFGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PCSCFGR {
                match value {
                    false => PCSCFGR::_0,
                    true => PCSCFGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PCSCFGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PCSCFGR::_1
            }
        }
        #[doc = "Values that can be written to the field `MASTER`"]
        pub enum MASTERW {
            #[doc = "Slave mode."]
            _0,
            #[doc = "Master mode."]
            _1,
        }
        impl MASTERW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MASTERW::_0 => false,
                    MASTERW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MASTERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MASTERW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MASTERW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Slave mode."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MASTERW::_0)
            }
            #[doc = "Master mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MASTERW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SAMPLE`"]
        pub enum SAMPLEW {
            #[doc = "Input data sampled on SCK edge."]
            _0,
            #[doc = "Input data sampled on delayed SCK edge."]
            _1,
        }
        impl SAMPLEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SAMPLEW::_0 => false,
                    SAMPLEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SAMPLEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SAMPLEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SAMPLEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Input data sampled on SCK edge."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SAMPLEW::_0)
            }
            #[doc = "Input data sampled on delayed SCK edge."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SAMPLEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `AUTOPCS`"]
        pub enum AUTOPCSW {
            #[doc = "Automatic PCS generation disabled."]
            _0,
            #[doc = "Automatic PCS generation enabled."]
            _1,
        }
        impl AUTOPCSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    AUTOPCSW::_0 => false,
                    AUTOPCSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _AUTOPCSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _AUTOPCSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: AUTOPCSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Automatic PCS generation disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(AUTOPCSW::_0)
            }
            #[doc = "Automatic PCS generation enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(AUTOPCSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `NOSTALL`"]
        pub enum NOSTALLW {
            #[doc = "Transfers will stall when transmit FIFO is empty or receive FIFO is full."]
            _0,
            #[doc = "Transfers will not stall, allowing transmit FIFO underrun or receive FIFO overrun to occur."]
            _1,
        }
        impl NOSTALLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    NOSTALLW::_0 => false,
                    NOSTALLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _NOSTALLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NOSTALLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: NOSTALLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Transfers will stall when transmit FIFO is empty or receive FIFO is full."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(NOSTALLW::_0)
            }
            #[doc = "Transfers will not stall, allowing transmit FIFO underrun or receive FIFO overrun to occur."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(NOSTALLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PCSPOL`"]
        pub enum PCSPOLW {
            #[doc = "The PCSx is active low."]
            _0000,
            #[doc = "The PCSx is active high."]
            _0001,
        }
        impl PCSPOLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PCSPOLW::_0000 => 0,
                    PCSPOLW::_0001 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PCSPOLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PCSPOLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PCSPOLW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "The PCSx is active low."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(PCSPOLW::_0000)
            }
            #[doc = "The PCSx is active high."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(PCSPOLW::_0001)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MATCFG`"]
        pub enum MATCFGW {
            #[doc = "Match is disabled."]
            _000,
            #[doc = "010b - Match is enabled, if 1st data word equals MATCH0 OR MATCH1, i.e., (1st data word = MATCH0 + MATCH1)"]
            _010,
            #[doc = "011b - Match is enabled, if any data word equals MATCH0 OR MATCH1, i.e., (any data word = MATCH0 + MATCH1)"]
            _011,
            #[doc = "100b - Match is enabled, if 1st data word equals MATCH0 AND 2nd data word equals MATCH1, i.e., [(1st data word = MATCH0) * (2nd data word = MATCH1)]"]
            _100,
            #[doc = "101b - Match is enabled, if any data word equals MATCH0 AND the next data word equals MATCH1, i.e., [(any data word = MATCH0) * (next data word = MATCH1)]"]
            _101,
            #[doc = "110b - Match is enabled, if (1st data word AND MATCH1) equals (MATCH0 AND MATCH1), i.e., [(1st data word * MATCH1) = (MATCH0 * MATCH1)]"]
            _110,
            #[doc = "111b - Match is enabled, if (any data word AND MATCH1) equals (MATCH0 AND MATCH1), i.e., [(any data word * MATCH1) = (MATCH0 * MATCH1)]"]
            _111,
        }
        impl MATCFGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MATCFGW::_000 => 0,
                    MATCFGW::_010 => 2,
                    MATCFGW::_011 => 3,
                    MATCFGW::_100 => 4,
                    MATCFGW::_101 => 5,
                    MATCFGW::_110 => 6,
                    MATCFGW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MATCFGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MATCFGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MATCFGW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Match is disabled."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MATCFGW::_000)
            }
            #[doc = "010b - Match is enabled, if 1st data word equals MATCH0 OR MATCH1, i.e., (1st data word = MATCH0 + MATCH1)"]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MATCFGW::_010)
            }
            #[doc = "011b - Match is enabled, if any data word equals MATCH0 OR MATCH1, i.e., (any data word = MATCH0 + MATCH1)"]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MATCFGW::_011)
            }
            #[doc = "100b - Match is enabled, if 1st data word equals MATCH0 AND 2nd data word equals MATCH1, i.e., [(1st data word = MATCH0) * (2nd data word = MATCH1)]"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MATCFGW::_100)
            }
            #[doc = "101b - Match is enabled, if any data word equals MATCH0 AND the next data word equals MATCH1, i.e., [(any data word = MATCH0) * (next data word = MATCH1)]"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MATCFGW::_101)
            }
            #[doc = "110b - Match is enabled, if (1st data word AND MATCH1) equals (MATCH0 AND MATCH1), i.e., [(1st data word * MATCH1) = (MATCH0 * MATCH1)]"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MATCFGW::_110)
            }
            #[doc = "111b - Match is enabled, if (any data word AND MATCH1) equals (MATCH0 AND MATCH1), i.e., [(any data word * MATCH1) = (MATCH0 * MATCH1)]"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MATCFGW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PINCFG`"]
        pub enum PINCFGW {
            #[doc = "SIN is used for input data and SOUT for output data."]
            _00,
            #[doc = "SIN is used for both input and output data."]
            _01,
            #[doc = "SOUT is used for both input and output data."]
            _10,
            #[doc = "SOUT is used for input data and SIN for output data."]
            _11,
        }
        impl PINCFGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PINCFGW::_00 => 0,
                    PINCFGW::_01 => 1,
                    PINCFGW::_10 => 2,
                    PINCFGW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PINCFGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PINCFGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PINCFGW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "SIN is used for input data and SOUT for output data."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(PINCFGW::_00)
            }
            #[doc = "SIN is used for both input and output data."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(PINCFGW::_01)
            }
            #[doc = "SOUT is used for both input and output data."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(PINCFGW::_10)
            }
            #[doc = "SOUT is used for input data and SIN for output data."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(PINCFGW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `OUTCFG`"]
        pub enum OUTCFGW {
            #[doc = "Output data retains last value when chip select is negated."]
            _0,
            #[doc = "Output data is tristated when chip select is negated."]
            _1,
        }
        impl OUTCFGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    OUTCFGW::_0 => false,
                    OUTCFGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _OUTCFGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _OUTCFGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: OUTCFGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Output data retains last value when chip select is negated."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(OUTCFGW::_0)
            }
            #[doc = "Output data is tristated when chip select is negated."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(OUTCFGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 26;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PCSCFG`"]
        pub enum PCSCFGW {
            #[doc = "PCS[3:2] are enabled."]
            _0,
            #[doc = "PCS[3:2] are disabled."]
            _1,
        }
        impl PCSCFGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PCSCFGW::_0 => false,
                    PCSCFGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PCSCFGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PCSCFGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PCSCFGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "PCS[3:2] are enabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PCSCFGW::_0)
            }
            #[doc = "PCS[3:2] are disabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PCSCFGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 27;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Master Mode"]
            #[inline(always)]
            pub fn master(&self) -> MASTERR {
                MASTERR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Sample Point"]
            #[inline(always)]
            pub fn sample(&self) -> SAMPLER {
                SAMPLER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Automatic PCS"]
            #[inline(always)]
            pub fn autopcs(&self) -> AUTOPCSR {
                AUTOPCSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - No Stall"]
            #[inline(always)]
            pub fn nostall(&self) -> NOSTALLR {
                NOSTALLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:11 - Peripheral Chip Select Polarity"]
            #[inline(always)]
            pub fn pcspol(&self) -> PCSPOLR {
                PCSPOLR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 16:18 - Match Configuration"]
            #[inline(always)]
            pub fn matcfg(&self) -> MATCFGR {
                MATCFGR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 24:25 - Pin Configuration"]
            #[inline(always)]
            pub fn pincfg(&self) -> PINCFGR {
                PINCFGR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 26 - Output Config"]
            #[inline(always)]
            pub fn outcfg(&self) -> OUTCFGR {
                OUTCFGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 26;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 27 - Peripheral Chip Select Configuration"]
            #[inline(always)]
            pub fn pcscfg(&self) -> PCSCFGR {
                PCSCFGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 27;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Master Mode"]
            #[inline(always)]
            pub fn master(&mut self) -> _MASTERW {
                _MASTERW { w: self }
            }
            #[doc = "Bit 1 - Sample Point"]
            #[inline(always)]
            pub fn sample(&mut self) -> _SAMPLEW {
                _SAMPLEW { w: self }
            }
            #[doc = "Bit 2 - Automatic PCS"]
            #[inline(always)]
            pub fn autopcs(&mut self) -> _AUTOPCSW {
                _AUTOPCSW { w: self }
            }
            #[doc = "Bit 3 - No Stall"]
            #[inline(always)]
            pub fn nostall(&mut self) -> _NOSTALLW {
                _NOSTALLW { w: self }
            }
            #[doc = "Bits 8:11 - Peripheral Chip Select Polarity"]
            #[inline(always)]
            pub fn pcspol(&mut self) -> _PCSPOLW {
                _PCSPOLW { w: self }
            }
            #[doc = "Bits 16:18 - Match Configuration"]
            #[inline(always)]
            pub fn matcfg(&mut self) -> _MATCFGW {
                _MATCFGW { w: self }
            }
            #[doc = "Bits 24:25 - Pin Configuration"]
            #[inline(always)]
            pub fn pincfg(&mut self) -> _PINCFGW {
                _PINCFGW { w: self }
            }
            #[doc = "Bit 26 - Output Config"]
            #[inline(always)]
            pub fn outcfg(&mut self) -> _OUTCFGW {
                _OUTCFGW { w: self }
            }
            #[doc = "Bit 27 - Peripheral Chip Select Configuration"]
            #[inline(always)]
            pub fn pcscfg(&mut self) -> _PCSCFGW {
                _PCSCFGW { w: self }
            }
        }
    }
    #[doc = "Data Match Register 0"]
    pub struct DMR0 {
        register: VolatileCell<u32>,
    }
    #[doc = "Data Match Register 0"]
    pub mod dmr0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::DMR0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MATCH0R {
            bits: u32,
        }
        impl MATCH0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MATCH0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MATCH0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Match 0 Value"]
            #[inline(always)]
            pub fn match0(&self) -> MATCH0R {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MATCH0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Match 0 Value"]
            #[inline(always)]
            pub fn match0(&mut self) -> _MATCH0W {
                _MATCH0W { w: self }
            }
        }
    }
    #[doc = "Data Match Register 1"]
    pub struct DMR1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Data Match Register 1"]
    pub mod dmr1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::DMR1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MATCH1R {
            bits: u32,
        }
        impl MATCH1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MATCH1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MATCH1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Match 1 Value"]
            #[inline(always)]
            pub fn match1(&self) -> MATCH1R {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MATCH1R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Match 1 Value"]
            #[inline(always)]
            pub fn match1(&mut self) -> _MATCH1W {
                _MATCH1W { w: self }
            }
        }
    }
    #[doc = "Clock Configuration Register"]
    pub struct CCR {
        register: VolatileCell<u32>,
    }
    #[doc = "Clock Configuration Register"]
    pub mod ccr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CCR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SCKDIVR {
            bits: u8,
        }
        impl SCKDIVR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DBTR {
            bits: u8,
        }
        impl DBTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct PCSSCKR {
            bits: u8,
        }
        impl PCSSCKR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct SCKPCSR {
            bits: u8,
        }
        impl SCKPCSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SCKDIVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SCKDIVW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DBTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DBTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _PCSSCKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PCSSCKW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SCKPCSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SCKPCSW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - SCK Divider"]
            #[inline(always)]
            pub fn sckdiv(&self) -> SCKDIVR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SCKDIVR { bits }
            }
            #[doc = "Bits 8:15 - Delay Between Transfers"]
            #[inline(always)]
            pub fn dbt(&self) -> DBTR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DBTR { bits }
            }
            #[doc = "Bits 16:23 - PCS to SCK Delay"]
            #[inline(always)]
            pub fn pcssck(&self) -> PCSSCKR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                PCSSCKR { bits }
            }
            #[doc = "Bits 24:31 - SCK to PCS Delay"]
            #[inline(always)]
            pub fn sckpcs(&self) -> SCKPCSR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SCKPCSR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - SCK Divider"]
            #[inline(always)]
            pub fn sckdiv(&mut self) -> _SCKDIVW {
                _SCKDIVW { w: self }
            }
            #[doc = "Bits 8:15 - Delay Between Transfers"]
            #[inline(always)]
            pub fn dbt(&mut self) -> _DBTW {
                _DBTW { w: self }
            }
            #[doc = "Bits 16:23 - PCS to SCK Delay"]
            #[inline(always)]
            pub fn pcssck(&mut self) -> _PCSSCKW {
                _PCSSCKW { w: self }
            }
            #[doc = "Bits 24:31 - SCK to PCS Delay"]
            #[inline(always)]
            pub fn sckpcs(&mut self) -> _SCKPCSW {
                _SCKPCSW { w: self }
            }
        }
    }
    #[doc = "FIFO Control Register"]
    pub struct FCR {
        register: VolatileCell<u32>,
    }
    #[doc = "FIFO Control Register"]
    pub mod fcr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FCR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct TXWATERR {
            bits: u8,
        }
        impl TXWATERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct RXWATERR {
            bits: u8,
        }
        impl RXWATERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXWATERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXWATERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXWATERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXWATERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:1 - Transmit FIFO Watermark"]
            #[inline(always)]
            pub fn txwater(&self) -> TXWATERR {
                let bits = {
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TXWATERR { bits }
            }
            #[doc = "Bits 16:17 - Receive FIFO Watermark"]
            #[inline(always)]
            pub fn rxwater(&self) -> RXWATERR {
                let bits = {
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                RXWATERR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:1 - Transmit FIFO Watermark"]
            #[inline(always)]
            pub fn txwater(&mut self) -> _TXWATERW {
                _TXWATERW { w: self }
            }
            #[doc = "Bits 16:17 - Receive FIFO Watermark"]
            #[inline(always)]
            pub fn rxwater(&mut self) -> _RXWATERW {
                _RXWATERW { w: self }
            }
        }
    }
    #[doc = "FIFO Status Register"]
    pub struct FSR {
        register: VolatileCell<u32>,
    }
    #[doc = "FIFO Status Register"]
    pub mod fsr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::FSR {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct TXCOUNTR {
            bits: u8,
        }
        impl TXCOUNTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct RXCOUNTR {
            bits: u8,
        }
        impl RXCOUNTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:2 - Transmit FIFO Count"]
            #[inline(always)]
            pub fn txcount(&self) -> TXCOUNTR {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TXCOUNTR { bits }
            }
            #[doc = "Bits 16:18 - Receive FIFO Count"]
            #[inline(always)]
            pub fn rxcount(&self) -> RXCOUNTR {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                RXCOUNTR { bits }
            }
        }
    }
    #[doc = "Transmit Command Register"]
    pub struct TCR {
        register: VolatileCell<u32>,
    }
    #[doc = "Transmit Command Register"]
    pub mod tcr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct FRAMESZR {
            bits: u16,
        }
        impl FRAMESZR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `WIDTH`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WIDTHR {
            #[doc = "Single bit transfer."]
            _00,
            #[doc = "Two bit transfer."]
            _01,
            #[doc = "Four bit transfer."]
            _10,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl WIDTHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    WIDTHR::_00 => 0,
                    WIDTHR::_01 => 1,
                    WIDTHR::_10 => 2,
                    WIDTHR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> WIDTHR {
                match value {
                    0 => WIDTHR::_00,
                    1 => WIDTHR::_01,
                    2 => WIDTHR::_10,
                    i => WIDTHR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == WIDTHR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == WIDTHR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == WIDTHR::_10
            }
        }
        #[doc = "Possible values of the field `TXMSK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXMSKR {
            #[doc = "Normal transfer."]
            _0,
            #[doc = "Mask transmit data."]
            _1,
        }
        impl TXMSKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXMSKR::_0 => false,
                    TXMSKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXMSKR {
                match value {
                    false => TXMSKR::_0,
                    true => TXMSKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXMSKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXMSKR::_1
            }
        }
        #[doc = "Possible values of the field `RXMSK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXMSKR {
            #[doc = "Normal transfer."]
            _0,
            #[doc = "Receive data is masked."]
            _1,
        }
        impl RXMSKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXMSKR::_0 => false,
                    RXMSKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXMSKR {
                match value {
                    false => RXMSKR::_0,
                    true => RXMSKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXMSKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RXMSKR::_1
            }
        }
        #[doc = "Possible values of the field `CONTC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CONTCR {
            #[doc = "Command word for start of new transfer."]
            _0,
            #[doc = "Command word for continuing transfer."]
            _1,
        }
        impl CONTCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CONTCR::_0 => false,
                    CONTCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CONTCR {
                match value {
                    false => CONTCR::_0,
                    true => CONTCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CONTCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CONTCR::_1
            }
        }
        #[doc = "Possible values of the field `CONT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CONTR {
            #[doc = "Continuous transfer disabled."]
            _0,
            #[doc = "Continuous transfer enabled."]
            _1,
        }
        impl CONTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CONTR::_0 => false,
                    CONTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CONTR {
                match value {
                    false => CONTR::_0,
                    true => CONTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CONTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CONTR::_1
            }
        }
        #[doc = "Possible values of the field `BYSW`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BYSWR {
            #[doc = "Byte swap disabled."]
            _0,
            #[doc = "Byte swap enabled."]
            _1,
        }
        impl BYSWR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BYSWR::_0 => false,
                    BYSWR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BYSWR {
                match value {
                    false => BYSWR::_0,
                    true => BYSWR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BYSWR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BYSWR::_1
            }
        }
        #[doc = "Possible values of the field `LSBF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LSBFR {
            #[doc = "Data is transferred MSB first."]
            _0,
            #[doc = "Data is transferred LSB first."]
            _1,
        }
        impl LSBFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LSBFR::_0 => false,
                    LSBFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LSBFR {
                match value {
                    false => LSBFR::_0,
                    true => LSBFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LSBFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LSBFR::_1
            }
        }
        #[doc = "Possible values of the field `PCS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PCSR {
            #[doc = "Transfer using LPSPI_PCS[0]"]
            _00,
            #[doc = "Transfer using LPSPI_PCS[1]"]
            _01,
            #[doc = "Transfer using LPSPI_PCS[2]"]
            _10,
            #[doc = "Transfer using LPSPI_PCS[3]"]
            _11,
        }
        impl PCSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PCSR::_00 => 0,
                    PCSR::_01 => 1,
                    PCSR::_10 => 2,
                    PCSR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PCSR {
                match value {
                    0 => PCSR::_00,
                    1 => PCSR::_01,
                    2 => PCSR::_10,
                    3 => PCSR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == PCSR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == PCSR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == PCSR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == PCSR::_11
            }
        }
        #[doc = "Possible values of the field `PRESCALE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PRESCALER {
            #[doc = "Divide by 1."]
            _000,
            #[doc = "Divide by 2."]
            _001,
            #[doc = "Divide by 4."]
            _010,
            #[doc = "Divide by 8."]
            _011,
            #[doc = "Divide by 16."]
            _100,
            #[doc = "Divide by 32."]
            _101,
            #[doc = "Divide by 64."]
            _110,
            #[doc = "Divide by 128."]
            _111,
        }
        impl PRESCALER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PRESCALER::_000 => 0,
                    PRESCALER::_001 => 1,
                    PRESCALER::_010 => 2,
                    PRESCALER::_011 => 3,
                    PRESCALER::_100 => 4,
                    PRESCALER::_101 => 5,
                    PRESCALER::_110 => 6,
                    PRESCALER::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PRESCALER {
                match value {
                    0 => PRESCALER::_000,
                    1 => PRESCALER::_001,
                    2 => PRESCALER::_010,
                    3 => PRESCALER::_011,
                    4 => PRESCALER::_100,
                    5 => PRESCALER::_101,
                    6 => PRESCALER::_110,
                    7 => PRESCALER::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == PRESCALER::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == PRESCALER::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == PRESCALER::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == PRESCALER::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == PRESCALER::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == PRESCALER::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == PRESCALER::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == PRESCALER::_111
            }
        }
        #[doc = "Possible values of the field `CPHA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CPHAR {
            #[doc = "Data is captured on the leading edge of SCK and changed on the following edge."]
            _0,
            #[doc = "Data is changed on the leading edge of SCK and captured on the following edge."]
            _1,
        }
        impl CPHAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CPHAR::_0 => false,
                    CPHAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CPHAR {
                match value {
                    false => CPHAR::_0,
                    true => CPHAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CPHAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CPHAR::_1
            }
        }
        #[doc = "Possible values of the field `CPOL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CPOLR {
            #[doc = "The inactive state value of SCK is low."]
            _0,
            #[doc = "The inactive state value of SCK is high."]
            _1,
        }
        impl CPOLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CPOLR::_0 => false,
                    CPOLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CPOLR {
                match value {
                    false => CPOLR::_0,
                    true => CPOLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CPOLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CPOLR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _FRAMESZW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FRAMESZW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 4095;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WIDTH`"]
        pub enum WIDTHW {
            #[doc = "Single bit transfer."]
            _00,
            #[doc = "Two bit transfer."]
            _01,
            #[doc = "Four bit transfer."]
            _10,
        }
        impl WIDTHW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    WIDTHW::_00 => 0,
                    WIDTHW::_01 => 1,
                    WIDTHW::_10 => 2,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WIDTHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WIDTHW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WIDTHW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Single bit transfer."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(WIDTHW::_00)
            }
            #[doc = "Two bit transfer."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(WIDTHW::_01)
            }
            #[doc = "Four bit transfer."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(WIDTHW::_10)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TXMSK`"]
        pub enum TXMSKW {
            #[doc = "Normal transfer."]
            _0,
            #[doc = "Mask transmit data."]
            _1,
        }
        impl TXMSKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TXMSKW::_0 => false,
                    TXMSKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXMSKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXMSKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TXMSKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Normal transfer."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TXMSKW::_0)
            }
            #[doc = "Mask transmit data."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TXMSKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RXMSK`"]
        pub enum RXMSKW {
            #[doc = "Normal transfer."]
            _0,
            #[doc = "Receive data is masked."]
            _1,
        }
        impl RXMSKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RXMSKW::_0 => false,
                    RXMSKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXMSKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXMSKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RXMSKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Normal transfer."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RXMSKW::_0)
            }
            #[doc = "Receive data is masked."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RXMSKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 19;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CONTC`"]
        pub enum CONTCW {
            #[doc = "Command word for start of new transfer."]
            _0,
            #[doc = "Command word for continuing transfer."]
            _1,
        }
        impl CONTCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CONTCW::_0 => false,
                    CONTCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CONTCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CONTCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CONTCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Command word for start of new transfer."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CONTCW::_0)
            }
            #[doc = "Command word for continuing transfer."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CONTCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CONT`"]
        pub enum CONTW {
            #[doc = "Continuous transfer disabled."]
            _0,
            #[doc = "Continuous transfer enabled."]
            _1,
        }
        impl CONTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CONTW::_0 => false,
                    CONTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CONTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CONTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CONTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Continuous transfer disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CONTW::_0)
            }
            #[doc = "Continuous transfer enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CONTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 21;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BYSW`"]
        pub enum BYSWW {
            #[doc = "Byte swap disabled."]
            _0,
            #[doc = "Byte swap enabled."]
            _1,
        }
        impl BYSWW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    BYSWW::_0 => false,
                    BYSWW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYSWW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYSWW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BYSWW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Byte swap disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BYSWW::_0)
            }
            #[doc = "Byte swap enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BYSWW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 22;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LSBF`"]
        pub enum LSBFW {
            #[doc = "Data is transferred MSB first."]
            _0,
            #[doc = "Data is transferred LSB first."]
            _1,
        }
        impl LSBFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LSBFW::_0 => false,
                    LSBFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LSBFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LSBFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LSBFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Data is transferred MSB first."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LSBFW::_0)
            }
            #[doc = "Data is transferred LSB first."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LSBFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 23;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PCS`"]
        pub enum PCSW {
            #[doc = "Transfer using LPSPI_PCS[0]"]
            _00,
            #[doc = "Transfer using LPSPI_PCS[1]"]
            _01,
            #[doc = "Transfer using LPSPI_PCS[2]"]
            _10,
            #[doc = "Transfer using LPSPI_PCS[3]"]
            _11,
        }
        impl PCSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PCSW::_00 => 0,
                    PCSW::_01 => 1,
                    PCSW::_10 => 2,
                    PCSW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PCSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PCSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PCSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Transfer using LPSPI_PCS[0]"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(PCSW::_00)
            }
            #[doc = "Transfer using LPSPI_PCS[1]"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(PCSW::_01)
            }
            #[doc = "Transfer using LPSPI_PCS[2]"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(PCSW::_10)
            }
            #[doc = "Transfer using LPSPI_PCS[3]"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(PCSW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PRESCALE`"]
        pub enum PRESCALEW {
            #[doc = "Divide by 1."]
            _000,
            #[doc = "Divide by 2."]
            _001,
            #[doc = "Divide by 4."]
            _010,
            #[doc = "Divide by 8."]
            _011,
            #[doc = "Divide by 16."]
            _100,
            #[doc = "Divide by 32."]
            _101,
            #[doc = "Divide by 64."]
            _110,
            #[doc = "Divide by 128."]
            _111,
        }
        impl PRESCALEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PRESCALEW::_000 => 0,
                    PRESCALEW::_001 => 1,
                    PRESCALEW::_010 => 2,
                    PRESCALEW::_011 => 3,
                    PRESCALEW::_100 => 4,
                    PRESCALEW::_101 => 5,
                    PRESCALEW::_110 => 6,
                    PRESCALEW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PRESCALEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PRESCALEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PRESCALEW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Divide by 1."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(PRESCALEW::_000)
            }
            #[doc = "Divide by 2."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(PRESCALEW::_001)
            }
            #[doc = "Divide by 4."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(PRESCALEW::_010)
            }
            #[doc = "Divide by 8."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(PRESCALEW::_011)
            }
            #[doc = "Divide by 16."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(PRESCALEW::_100)
            }
            #[doc = "Divide by 32."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(PRESCALEW::_101)
            }
            #[doc = "Divide by 64."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(PRESCALEW::_110)
            }
            #[doc = "Divide by 128."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(PRESCALEW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 27;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CPHA`"]
        pub enum CPHAW {
            #[doc = "Data is captured on the leading edge of SCK and changed on the following edge."]
            _0,
            #[doc = "Data is changed on the leading edge of SCK and captured on the following edge."]
            _1,
        }
        impl CPHAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CPHAW::_0 => false,
                    CPHAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CPHAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CPHAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CPHAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Data is captured on the leading edge of SCK and changed on the following edge."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CPHAW::_0)
            }
            #[doc = "Data is changed on the leading edge of SCK and captured on the following edge."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CPHAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CPOL`"]
        pub enum CPOLW {
            #[doc = "The inactive state value of SCK is low."]
            _0,
            #[doc = "The inactive state value of SCK is high."]
            _1,
        }
        impl CPOLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CPOLW::_0 => false,
                    CPOLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CPOLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CPOLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CPOLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The inactive state value of SCK is low."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CPOLW::_0)
            }
            #[doc = "The inactive state value of SCK is high."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CPOLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:11 - Frame Size"]
            #[inline(always)]
            pub fn framesz(&self) -> FRAMESZR {
                let bits = {
                    const MASK: u16 = 4095;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                FRAMESZR { bits }
            }
            #[doc = "Bits 16:17 - Transfer Width"]
            #[inline(always)]
            pub fn width(&self) -> WIDTHR {
                WIDTHR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 18 - Transmit Data Mask"]
            #[inline(always)]
            pub fn txmsk(&self) -> TXMSKR {
                TXMSKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 19 - Receive Data Mask"]
            #[inline(always)]
            pub fn rxmsk(&self) -> RXMSKR {
                RXMSKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 19;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 20 - Continuing Command"]
            #[inline(always)]
            pub fn contc(&self) -> CONTCR {
                CONTCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - Continuous Transfer"]
            #[inline(always)]
            pub fn cont(&self) -> CONTR {
                CONTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 22 - Byte Swap"]
            #[inline(always)]
            pub fn bysw(&self) -> BYSWR {
                BYSWR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 23 - LSB First"]
            #[inline(always)]
            pub fn lsbf(&self) -> LSBFR {
                LSBFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 24:25 - Peripheral Chip Select"]
            #[inline(always)]
            pub fn pcs(&self) -> PCSR {
                PCSR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 27:29 - Prescaler Value"]
            #[inline(always)]
            pub fn prescale(&self) -> PRESCALER {
                PRESCALER::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 27;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 30 - Clock Phase"]
            #[inline(always)]
            pub fn cpha(&self) -> CPHAR {
                CPHAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Clock Polarity"]
            #[inline(always)]
            pub fn cpol(&self) -> CPOLR {
                CPOLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 31 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:11 - Frame Size"]
            #[inline(always)]
            pub fn framesz(&mut self) -> _FRAMESZW {
                _FRAMESZW { w: self }
            }
            #[doc = "Bits 16:17 - Transfer Width"]
            #[inline(always)]
            pub fn width(&mut self) -> _WIDTHW {
                _WIDTHW { w: self }
            }
            #[doc = "Bit 18 - Transmit Data Mask"]
            #[inline(always)]
            pub fn txmsk(&mut self) -> _TXMSKW {
                _TXMSKW { w: self }
            }
            #[doc = "Bit 19 - Receive Data Mask"]
            #[inline(always)]
            pub fn rxmsk(&mut self) -> _RXMSKW {
                _RXMSKW { w: self }
            }
            #[doc = "Bit 20 - Continuing Command"]
            #[inline(always)]
            pub fn contc(&mut self) -> _CONTCW {
                _CONTCW { w: self }
            }
            #[doc = "Bit 21 - Continuous Transfer"]
            #[inline(always)]
            pub fn cont(&mut self) -> _CONTW {
                _CONTW { w: self }
            }
            #[doc = "Bit 22 - Byte Swap"]
            #[inline(always)]
            pub fn bysw(&mut self) -> _BYSWW {
                _BYSWW { w: self }
            }
            #[doc = "Bit 23 - LSB First"]
            #[inline(always)]
            pub fn lsbf(&mut self) -> _LSBFW {
                _LSBFW { w: self }
            }
            #[doc = "Bits 24:25 - Peripheral Chip Select"]
            #[inline(always)]
            pub fn pcs(&mut self) -> _PCSW {
                _PCSW { w: self }
            }
            #[doc = "Bits 27:29 - Prescaler Value"]
            #[inline(always)]
            pub fn prescale(&mut self) -> _PRESCALEW {
                _PRESCALEW { w: self }
            }
            #[doc = "Bit 30 - Clock Phase"]
            #[inline(always)]
            pub fn cpha(&mut self) -> _CPHAW {
                _CPHAW { w: self }
            }
            #[doc = "Bit 31 - Clock Polarity"]
            #[inline(always)]
            pub fn cpol(&mut self) -> _CPOLW {
                _CPOLW { w: self }
            }
        }
    }
    #[doc = "Transmit Data Register"]
    pub struct TDR {
        register: VolatileCell<u32>,
    }
    #[doc = "Transmit Data Register"]
    pub mod tdr {
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TDR {
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATAW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Transmit Data"]
            #[inline(always)]
            pub fn data(&mut self) -> _DATAW {
                _DATAW { w: self }
            }
        }
    }
    #[doc = "Receive Status Register"]
    pub struct RSR {
        register: VolatileCell<u32>,
    }
    #[doc = "Receive Status Register"]
    pub mod rsr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::RSR {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = "Possible values of the field `SOF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SOFR {
            #[doc = "Subsequent data word received after LPSPI_PCS assertion."]
            _0,
            #[doc = "First data word received after LPSPI_PCS assertion."]
            _1,
        }
        impl SOFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SOFR::_0 => false,
                    SOFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SOFR {
                match value {
                    false => SOFR::_0,
                    true => SOFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SOFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SOFR::_1
            }
        }
        #[doc = "Possible values of the field `RXEMPTY`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXEMPTYR {
            #[doc = "RX FIFO is not empty."]
            _0,
            #[doc = "RX FIFO is empty."]
            _1,
        }
        impl RXEMPTYR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXEMPTYR::_0 => false,
                    RXEMPTYR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXEMPTYR {
                match value {
                    false => RXEMPTYR::_0,
                    true => RXEMPTYR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXEMPTYR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RXEMPTYR::_1
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Start Of Frame"]
            #[inline(always)]
            pub fn sof(&self) -> SOFR {
                SOFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - RX FIFO Empty"]
            #[inline(always)]
            pub fn rxempty(&self) -> RXEMPTYR {
                RXEMPTYR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
    }
    #[doc = "Receive Data Register"]
    pub struct RDR {
        register: VolatileCell<u32>,
    }
    #[doc = "Receive Data Register"]
    pub mod rdr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::RDR {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATAR {
            bits: u32,
        }
        impl DATAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Receive Data"]
            #[inline(always)]
            pub fn data(&self) -> DATAR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                DATAR { bits }
            }
        }
    }
}
#[doc = "The LPSPI Memory Map/Register Definition can be found here."]
pub struct LPSPI0 {
    register_block: lpspi0::RegisterBlock,
}
impl Deref for LPSPI0 {
    type Target = lpspi0::RegisterBlock;
    fn deref(&self) -> &lpspi0::RegisterBlock {
        &self.register_block
    }
}
#[doc = "The LPSPI Memory Map/Register Definition can be found here."]
pub const LPSPI1: Peripheral<LPSPI1> = unsafe { Peripheral::new(1073926144) };
#[doc = "The LPSPI Memory Map/Register Definition can be found here."]
pub mod lpspi1 {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - Version ID Register"]
        pub verid: VERID,
        #[doc = "0x04 - Parameter Register"]
        pub param: PARAM,
        _reserved0: [u8; 8usize],
        #[doc = "0x10 - Control Register"]
        pub cr: CR,
        #[doc = "0x14 - Status Register"]
        pub sr: SR,
        #[doc = "0x18 - Interrupt Enable Register"]
        pub ier: IER,
        #[doc = "0x1c - DMA Enable Register"]
        pub der: DER,
        #[doc = "0x20 - Configuration Register 0"]
        pub cfgr0: CFGR0,
        #[doc = "0x24 - Configuration Register 1"]
        pub cfgr1: CFGR1,
        _reserved1: [u8; 8usize],
        #[doc = "0x30 - Data Match Register 0"]
        pub dmr0: DMR0,
        #[doc = "0x34 - Data Match Register 1"]
        pub dmr1: DMR1,
        _reserved2: [u8; 8usize],
        #[doc = "0x40 - Clock Configuration Register"]
        pub ccr: CCR,
        _reserved3: [u8; 20usize],
        #[doc = "0x58 - FIFO Control Register"]
        pub fcr: FCR,
        #[doc = "0x5c - FIFO Status Register"]
        pub fsr: FSR,
        #[doc = "0x60 - Transmit Command Register"]
        pub tcr: TCR,
        #[doc = "0x64 - Transmit Data Register"]
        pub tdr: TDR,
        _reserved4: [u8; 8usize],
        #[doc = "0x70 - Receive Status Register"]
        pub rsr: RSR,
        #[doc = "0x74 - Receive Data Register"]
        pub rdr: RDR,
    }
    #[doc = "Version ID Register"]
    pub struct VERID {
        register: VolatileCell<u32>,
    }
    #[doc = "Version ID Register"]
    pub mod verid {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::VERID {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = "Possible values of the field `FEATURE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FEATURER {
            #[doc = "Standard feature set supporting 32-bit shift register."]
            _0000000000000100,
            #[doc = r" Reserved"]
            _Reserved(u16),
        }
        impl FEATURER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                match *self {
                    FEATURER::_0000000000000100 => 4,
                    FEATURER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u16) -> FEATURER {
                match value {
                    4 => FEATURER::_0000000000000100,
                    i => FEATURER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000000000000100`"]
            #[inline(always)]
            pub fn is_0000000000000100(&self) -> bool {
                *self == FEATURER::_0000000000000100
            }
        }
        #[doc = r" Value of the field"]
        pub struct MINORR {
            bits: u8,
        }
        impl MINORR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct MAJORR {
            bits: u8,
        }
        impl MAJORR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Module Identification Number"]
            #[inline(always)]
            pub fn feature(&self) -> FEATURER {
                FEATURER::_from({
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                })
            }
            #[doc = "Bits 16:23 - Minor Version Number"]
            #[inline(always)]
            pub fn minor(&self) -> MINORR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                MINORR { bits }
            }
            #[doc = "Bits 24:31 - Major Version Number"]
            #[inline(always)]
            pub fn major(&self) -> MAJORR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                MAJORR { bits }
            }
        }
    }
    #[doc = "Parameter Register"]
    pub struct PARAM {
        register: VolatileCell<u32>,
    }
    #[doc = "Parameter Register"]
    pub mod param {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::PARAM {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct TXFIFOR {
            bits: u8,
        }
        impl TXFIFOR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct RXFIFOR {
            bits: u8,
        }
        impl RXFIFOR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Transmit FIFO Size"]
            #[inline(always)]
            pub fn txfifo(&self) -> TXFIFOR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TXFIFOR { bits }
            }
            #[doc = "Bits 8:15 - Receive FIFO Size"]
            #[inline(always)]
            pub fn rxfifo(&self) -> RXFIFOR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                RXFIFOR { bits }
            }
        }
    }
    #[doc = "Control Register"]
    pub struct CR {
        register: VolatileCell<u32>,
    }
    #[doc = "Control Register"]
    pub mod cr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `MEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MENR {
            #[doc = "Module is disabled."]
            _0,
            #[doc = "Module is enabled."]
            _1,
        }
        impl MENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MENR::_0 => false,
                    MENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MENR {
                match value {
                    false => MENR::_0,
                    true => MENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MENR::_1
            }
        }
        #[doc = "Possible values of the field `RST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RSTR {
            #[doc = "Master logic is not reset."]
            _0,
            #[doc = "Master logic is reset."]
            _1,
        }
        impl RSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RSTR::_0 => false,
                    RSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RSTR {
                match value {
                    false => RSTR::_0,
                    true => RSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RSTR::_1
            }
        }
        #[doc = "Possible values of the field `DOZEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DOZENR {
            #[doc = "Module is enabled in Doze mode."]
            _0,
            #[doc = "Module is disabled in Doze mode."]
            _1,
        }
        impl DOZENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DOZENR::_0 => false,
                    DOZENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DOZENR {
                match value {
                    false => DOZENR::_0,
                    true => DOZENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DOZENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DOZENR::_1
            }
        }
        #[doc = "Possible values of the field `DBGEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DBGENR {
            #[doc = "Module is disabled in debug mode."]
            _0,
            #[doc = "Module is enabled in debug mode."]
            _1,
        }
        impl DBGENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DBGENR::_0 => false,
                    DBGENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DBGENR {
                match value {
                    false => DBGENR::_0,
                    true => DBGENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DBGENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DBGENR::_1
            }
        }
        #[doc = "Values that can be written to the field `MEN`"]
        pub enum MENW {
            #[doc = "Module is disabled."]
            _0,
            #[doc = "Module is enabled."]
            _1,
        }
        impl MENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MENW::_0 => false,
                    MENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Module is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MENW::_0)
            }
            #[doc = "Module is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RST`"]
        pub enum RSTW {
            #[doc = "Master logic is not reset."]
            _0,
            #[doc = "Master logic is reset."]
            _1,
        }
        impl RSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RSTW::_0 => false,
                    RSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Master logic is not reset."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RSTW::_0)
            }
            #[doc = "Master logic is reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DOZEN`"]
        pub enum DOZENW {
            #[doc = "Module is enabled in Doze mode."]
            _0,
            #[doc = "Module is disabled in Doze mode."]
            _1,
        }
        impl DOZENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DOZENW::_0 => false,
                    DOZENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DOZENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DOZENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DOZENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Module is enabled in Doze mode."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DOZENW::_0)
            }
            #[doc = "Module is disabled in Doze mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DOZENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DBGEN`"]
        pub enum DBGENW {
            #[doc = "Module is disabled in debug mode."]
            _0,
            #[doc = "Module is enabled in debug mode."]
            _1,
        }
        impl DBGENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DBGENW::_0 => false,
                    DBGENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DBGENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DBGENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DBGENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Module is disabled in debug mode."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DBGENW::_0)
            }
            #[doc = "Module is enabled in debug mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DBGENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RTF`"]
        pub enum RTFW {
            #[doc = "No effect."]
            _0,
            #[doc = "Transmit FIFO is reset."]
            _1,
        }
        impl RTFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RTFW::_0 => false,
                    RTFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RTFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RTFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RTFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No effect."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RTFW::_0)
            }
            #[doc = "Transmit FIFO is reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RTFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RRF`"]
        pub enum RRFW {
            #[doc = "No effect."]
            _0,
            #[doc = "Receive FIFO is reset."]
            _1,
        }
        impl RRFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RRFW::_0 => false,
                    RRFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RRFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RRFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RRFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No effect."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RRFW::_0)
            }
            #[doc = "Receive FIFO is reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RRFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Module Enable"]
            #[inline(always)]
            pub fn men(&self) -> MENR {
                MENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Software Reset"]
            #[inline(always)]
            pub fn rst(&self) -> RSTR {
                RSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Doze mode enable"]
            #[inline(always)]
            pub fn dozen(&self) -> DOZENR {
                DOZENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Debug Enable"]
            #[inline(always)]
            pub fn dbgen(&self) -> DBGENR {
                DBGENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Module Enable"]
            #[inline(always)]
            pub fn men(&mut self) -> _MENW {
                _MENW { w: self }
            }
            #[doc = "Bit 1 - Software Reset"]
            #[inline(always)]
            pub fn rst(&mut self) -> _RSTW {
                _RSTW { w: self }
            }
            #[doc = "Bit 2 - Doze mode enable"]
            #[inline(always)]
            pub fn dozen(&mut self) -> _DOZENW {
                _DOZENW { w: self }
            }
            #[doc = "Bit 3 - Debug Enable"]
            #[inline(always)]
            pub fn dbgen(&mut self) -> _DBGENW {
                _DBGENW { w: self }
            }
            #[doc = "Bit 8 - Reset Transmit FIFO"]
            #[inline(always)]
            pub fn rtf(&mut self) -> _RTFW {
                _RTFW { w: self }
            }
            #[doc = "Bit 9 - Reset Receive FIFO"]
            #[inline(always)]
            pub fn rrf(&mut self) -> _RRFW {
                _RRFW { w: self }
            }
        }
    }
    #[doc = "Status Register"]
    pub struct SR {
        register: VolatileCell<u32>,
    }
    #[doc = "Status Register"]
    pub mod sr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TDF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TDFR {
            #[doc = "Transmit data not requested."]
            _0,
            #[doc = "Transmit data is requested."]
            _1,
        }
        impl TDFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TDFR::_0 => false,
                    TDFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TDFR {
                match value {
                    false => TDFR::_0,
                    true => TDFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TDFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TDFR::_1
            }
        }
        #[doc = "Possible values of the field `RDF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RDFR {
            #[doc = "Receive Data is not ready."]
            _0,
            #[doc = "Receive data is ready."]
            _1,
        }
        impl RDFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RDFR::_0 => false,
                    RDFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RDFR {
                match value {
                    false => RDFR::_0,
                    true => RDFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RDFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RDFR::_1
            }
        }
        #[doc = "Possible values of the field `WCF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WCFR {
            #[doc = "Transfer word not completed."]
            _0,
            #[doc = "Transfer word completed."]
            _1,
        }
        impl WCFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WCFR::_0 => false,
                    WCFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WCFR {
                match value {
                    false => WCFR::_0,
                    true => WCFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WCFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WCFR::_1
            }
        }
        #[doc = "Possible values of the field `FCF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FCFR {
            #[doc = "Frame transfer has not completed."]
            _0,
            #[doc = "Frame transfer has completed."]
            _1,
        }
        impl FCFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FCFR::_0 => false,
                    FCFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FCFR {
                match value {
                    false => FCFR::_0,
                    true => FCFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FCFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FCFR::_1
            }
        }
        #[doc = "Possible values of the field `TCF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TCFR {
            #[doc = "All transfers have not completed."]
            _0,
            #[doc = "All transfers have completed."]
            _1,
        }
        impl TCFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TCFR::_0 => false,
                    TCFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TCFR {
                match value {
                    false => TCFR::_0,
                    true => TCFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TCFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TCFR::_1
            }
        }
        #[doc = "Possible values of the field `TEF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TEFR {
            #[doc = "Transmit FIFO underrun has not occurred."]
            _0,
            #[doc = "Transmit FIFO underrun has occurred"]
            _1,
        }
        impl TEFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TEFR::_0 => false,
                    TEFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TEFR {
                match value {
                    false => TEFR::_0,
                    true => TEFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TEFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TEFR::_1
            }
        }
        #[doc = "Possible values of the field `REF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum REFR {
            #[doc = "Receive FIFO has not overflowed."]
            _0,
            #[doc = "Receive FIFO has overflowed."]
            _1,
        }
        impl REFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    REFR::_0 => false,
                    REFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> REFR {
                match value {
                    false => REFR::_0,
                    true => REFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == REFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == REFR::_1
            }
        }
        #[doc = "Possible values of the field `DMF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMFR {
            #[doc = "Have not received matching data."]
            _0,
            #[doc = "Have received matching data."]
            _1,
        }
        impl DMFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMFR::_0 => false,
                    DMFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMFR {
                match value {
                    false => DMFR::_0,
                    true => DMFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMFR::_1
            }
        }
        #[doc = "Possible values of the field `MBF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MBFR {
            #[doc = "LPSPI is idle."]
            _0,
            #[doc = "LPSPI is busy."]
            _1,
        }
        impl MBFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MBFR::_0 => false,
                    MBFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MBFR {
                match value {
                    false => MBFR::_0,
                    true => MBFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MBFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MBFR::_1
            }
        }
        #[doc = "Values that can be written to the field `WCF`"]
        pub enum WCFW {
            #[doc = "Transfer word not completed."]
            _0,
            #[doc = "Transfer word completed."]
            _1,
        }
        impl WCFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WCFW::_0 => false,
                    WCFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WCFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WCFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WCFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Transfer word not completed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WCFW::_0)
            }
            #[doc = "Transfer word completed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WCFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FCF`"]
        pub enum FCFW {
            #[doc = "Frame transfer has not completed."]
            _0,
            #[doc = "Frame transfer has completed."]
            _1,
        }
        impl FCFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FCFW::_0 => false,
                    FCFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FCFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FCFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FCFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Frame transfer has not completed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FCFW::_0)
            }
            #[doc = "Frame transfer has completed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FCFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TCF`"]
        pub enum TCFW {
            #[doc = "All transfers have not completed."]
            _0,
            #[doc = "All transfers have completed."]
            _1,
        }
        impl TCFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TCFW::_0 => false,
                    TCFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TCFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TCFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TCFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "All transfers have not completed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TCFW::_0)
            }
            #[doc = "All transfers have completed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TCFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TEF`"]
        pub enum TEFW {
            #[doc = "Transmit FIFO underrun has not occurred."]
            _0,
            #[doc = "Transmit FIFO underrun has occurred"]
            _1,
        }
        impl TEFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TEFW::_0 => false,
                    TEFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TEFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TEFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TEFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Transmit FIFO underrun has not occurred."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TEFW::_0)
            }
            #[doc = "Transmit FIFO underrun has occurred"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TEFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `REF`"]
        pub enum REFW {
            #[doc = "Receive FIFO has not overflowed."]
            _0,
            #[doc = "Receive FIFO has overflowed."]
            _1,
        }
        impl REFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    REFW::_0 => false,
                    REFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _REFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _REFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: REFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Receive FIFO has not overflowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(REFW::_0)
            }
            #[doc = "Receive FIFO has overflowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(REFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMF`"]
        pub enum DMFW {
            #[doc = "Have not received matching data."]
            _0,
            #[doc = "Have received matching data."]
            _1,
        }
        impl DMFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMFW::_0 => false,
                    DMFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Have not received matching data."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMFW::_0)
            }
            #[doc = "Have received matching data."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Transmit Data Flag"]
            #[inline(always)]
            pub fn tdf(&self) -> TDFR {
                TDFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Receive Data Flag"]
            #[inline(always)]
            pub fn rdf(&self) -> RDFR {
                RDFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Word Complete Flag"]
            #[inline(always)]
            pub fn wcf(&self) -> WCFR {
                WCFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Frame Complete Flag"]
            #[inline(always)]
            pub fn fcf(&self) -> FCFR {
                FCFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Transfer Complete Flag"]
            #[inline(always)]
            pub fn tcf(&self) -> TCFR {
                TCFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 11 - Transmit Error Flag"]
            #[inline(always)]
            pub fn tef(&self) -> TEFR {
                TEFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Receive Error Flag"]
            #[inline(always)]
            pub fn ref_(&self) -> REFR {
                REFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Data Match Flag"]
            #[inline(always)]
            pub fn dmf(&self) -> DMFR {
                DMFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 24 - Module Busy Flag"]
            #[inline(always)]
            pub fn mbf(&self) -> MBFR {
                MBFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 1 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 8 - Word Complete Flag"]
            #[inline(always)]
            pub fn wcf(&mut self) -> _WCFW {
                _WCFW { w: self }
            }
            #[doc = "Bit 9 - Frame Complete Flag"]
            #[inline(always)]
            pub fn fcf(&mut self) -> _FCFW {
                _FCFW { w: self }
            }
            #[doc = "Bit 10 - Transfer Complete Flag"]
            #[inline(always)]
            pub fn tcf(&mut self) -> _TCFW {
                _TCFW { w: self }
            }
            #[doc = "Bit 11 - Transmit Error Flag"]
            #[inline(always)]
            pub fn tef(&mut self) -> _TEFW {
                _TEFW { w: self }
            }
            #[doc = "Bit 12 - Receive Error Flag"]
            #[inline(always)]
            pub fn ref_(&mut self) -> _REFW {
                _REFW { w: self }
            }
            #[doc = "Bit 13 - Data Match Flag"]
            #[inline(always)]
            pub fn dmf(&mut self) -> _DMFW {
                _DMFW { w: self }
            }
        }
    }
    #[doc = "Interrupt Enable Register"]
    pub struct IER {
        register: VolatileCell<u32>,
    }
    #[doc = "Interrupt Enable Register"]
    pub mod ier {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::IER {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TDIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TDIER {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled"]
            _1,
        }
        impl TDIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TDIER::_0 => false,
                    TDIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TDIER {
                match value {
                    false => TDIER::_0,
                    true => TDIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TDIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TDIER::_1
            }
        }
        #[doc = "Possible values of the field `RDIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RDIER {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl RDIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RDIER::_0 => false,
                    RDIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RDIER {
                match value {
                    false => RDIER::_0,
                    true => RDIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RDIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RDIER::_1
            }
        }
        #[doc = "Possible values of the field `WCIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WCIER {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl WCIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WCIER::_0 => false,
                    WCIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WCIER {
                match value {
                    false => WCIER::_0,
                    true => WCIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WCIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WCIER::_1
            }
        }
        #[doc = "Possible values of the field `FCIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FCIER {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl FCIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FCIER::_0 => false,
                    FCIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FCIER {
                match value {
                    false => FCIER::_0,
                    true => FCIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FCIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FCIER::_1
            }
        }
        #[doc = "Possible values of the field `TCIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TCIER {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl TCIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TCIER::_0 => false,
                    TCIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TCIER {
                match value {
                    false => TCIER::_0,
                    true => TCIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TCIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TCIER::_1
            }
        }
        #[doc = "Possible values of the field `TEIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TEIER {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl TEIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TEIER::_0 => false,
                    TEIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TEIER {
                match value {
                    false => TEIER::_0,
                    true => TEIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TEIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TEIER::_1
            }
        }
        #[doc = "Possible values of the field `REIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum REIER {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl REIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    REIER::_0 => false,
                    REIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> REIER {
                match value {
                    false => REIER::_0,
                    true => REIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == REIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == REIER::_1
            }
        }
        #[doc = "Possible values of the field `DMIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMIER {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl DMIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMIER::_0 => false,
                    DMIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMIER {
                match value {
                    false => DMIER::_0,
                    true => DMIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMIER::_1
            }
        }
        #[doc = "Values that can be written to the field `TDIE`"]
        pub enum TDIEW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled"]
            _1,
        }
        impl TDIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TDIEW::_0 => false,
                    TDIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TDIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TDIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TDIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TDIEW::_0)
            }
            #[doc = "Interrupt enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TDIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RDIE`"]
        pub enum RDIEW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl RDIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RDIEW::_0 => false,
                    RDIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RDIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RDIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RDIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RDIEW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RDIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WCIE`"]
        pub enum WCIEW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl WCIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WCIEW::_0 => false,
                    WCIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WCIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WCIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WCIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WCIEW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WCIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FCIE`"]
        pub enum FCIEW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl FCIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FCIEW::_0 => false,
                    FCIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FCIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FCIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FCIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FCIEW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FCIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TCIE`"]
        pub enum TCIEW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl TCIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TCIEW::_0 => false,
                    TCIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TCIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TCIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TCIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TCIEW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TCIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TEIE`"]
        pub enum TEIEW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl TEIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TEIEW::_0 => false,
                    TEIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TEIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TEIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TEIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TEIEW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TEIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `REIE`"]
        pub enum REIEW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl REIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    REIEW::_0 => false,
                    REIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _REIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _REIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: REIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(REIEW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(REIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMIE`"]
        pub enum DMIEW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl DMIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMIEW::_0 => false,
                    DMIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMIEW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Transmit Data Interrupt Enable"]
            #[inline(always)]
            pub fn tdie(&self) -> TDIER {
                TDIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Receive Data Interrupt Enable"]
            #[inline(always)]
            pub fn rdie(&self) -> RDIER {
                RDIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Word Complete Interrupt Enable"]
            #[inline(always)]
            pub fn wcie(&self) -> WCIER {
                WCIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Frame Complete Interrupt Enable"]
            #[inline(always)]
            pub fn fcie(&self) -> FCIER {
                FCIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Transfer Complete Interrupt Enable"]
            #[inline(always)]
            pub fn tcie(&self) -> TCIER {
                TCIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 11 - Transmit Error Interrupt Enable"]
            #[inline(always)]
            pub fn teie(&self) -> TEIER {
                TEIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Receive Error Interrupt Enable"]
            #[inline(always)]
            pub fn reie(&self) -> REIER {
                REIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Data Match Interrupt Enable"]
            #[inline(always)]
            pub fn dmie(&self) -> DMIER {
                DMIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Transmit Data Interrupt Enable"]
            #[inline(always)]
            pub fn tdie(&mut self) -> _TDIEW {
                _TDIEW { w: self }
            }
            #[doc = "Bit 1 - Receive Data Interrupt Enable"]
            #[inline(always)]
            pub fn rdie(&mut self) -> _RDIEW {
                _RDIEW { w: self }
            }
            #[doc = "Bit 8 - Word Complete Interrupt Enable"]
            #[inline(always)]
            pub fn wcie(&mut self) -> _WCIEW {
                _WCIEW { w: self }
            }
            #[doc = "Bit 9 - Frame Complete Interrupt Enable"]
            #[inline(always)]
            pub fn fcie(&mut self) -> _FCIEW {
                _FCIEW { w: self }
            }
            #[doc = "Bit 10 - Transfer Complete Interrupt Enable"]
            #[inline(always)]
            pub fn tcie(&mut self) -> _TCIEW {
                _TCIEW { w: self }
            }
            #[doc = "Bit 11 - Transmit Error Interrupt Enable"]
            #[inline(always)]
            pub fn teie(&mut self) -> _TEIEW {
                _TEIEW { w: self }
            }
            #[doc = "Bit 12 - Receive Error Interrupt Enable"]
            #[inline(always)]
            pub fn reie(&mut self) -> _REIEW {
                _REIEW { w: self }
            }
            #[doc = "Bit 13 - Data Match Interrupt Enable"]
            #[inline(always)]
            pub fn dmie(&mut self) -> _DMIEW {
                _DMIEW { w: self }
            }
        }
    }
    #[doc = "DMA Enable Register"]
    pub struct DER {
        register: VolatileCell<u32>,
    }
    #[doc = "DMA Enable Register"]
    pub mod der {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::DER {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TDDE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TDDER {
            #[doc = "DMA request disabled."]
            _0,
            #[doc = "DMA request enabled"]
            _1,
        }
        impl TDDER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TDDER::_0 => false,
                    TDDER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TDDER {
                match value {
                    false => TDDER::_0,
                    true => TDDER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TDDER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TDDER::_1
            }
        }
        #[doc = "Possible values of the field `RDDE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RDDER {
            #[doc = "DMA request disabled."]
            _0,
            #[doc = "DMA request enabled."]
            _1,
        }
        impl RDDER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RDDER::_0 => false,
                    RDDER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RDDER {
                match value {
                    false => RDDER::_0,
                    true => RDDER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RDDER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RDDER::_1
            }
        }
        #[doc = "Values that can be written to the field `TDDE`"]
        pub enum TDDEW {
            #[doc = "DMA request disabled."]
            _0,
            #[doc = "DMA request enabled"]
            _1,
        }
        impl TDDEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TDDEW::_0 => false,
                    TDDEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TDDEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TDDEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TDDEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA request disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TDDEW::_0)
            }
            #[doc = "DMA request enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TDDEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RDDE`"]
        pub enum RDDEW {
            #[doc = "DMA request disabled."]
            _0,
            #[doc = "DMA request enabled."]
            _1,
        }
        impl RDDEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RDDEW::_0 => false,
                    RDDEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RDDEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RDDEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RDDEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA request disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RDDEW::_0)
            }
            #[doc = "DMA request enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RDDEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Transmit Data DMA Enable"]
            #[inline(always)]
            pub fn tdde(&self) -> TDDER {
                TDDER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Receive Data DMA Enable"]
            #[inline(always)]
            pub fn rdde(&self) -> RDDER {
                RDDER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Transmit Data DMA Enable"]
            #[inline(always)]
            pub fn tdde(&mut self) -> _TDDEW {
                _TDDEW { w: self }
            }
            #[doc = "Bit 1 - Receive Data DMA Enable"]
            #[inline(always)]
            pub fn rdde(&mut self) -> _RDDEW {
                _RDDEW { w: self }
            }
        }
    }
    #[doc = "Configuration Register 0"]
    pub struct CFGR0 {
        register: VolatileCell<u32>,
    }
    #[doc = "Configuration Register 0"]
    pub mod cfgr0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CFGR0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `HREN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HRENR {
            #[doc = "Host request is disabled."]
            _0,
            #[doc = "Host request is enabled."]
            _1,
        }
        impl HRENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HRENR::_0 => false,
                    HRENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HRENR {
                match value {
                    false => HRENR::_0,
                    true => HRENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HRENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HRENR::_1
            }
        }
        #[doc = "Possible values of the field `HRPOL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HRPOLR {
            #[doc = "Active low."]
            _0,
            #[doc = "Active high."]
            _1,
        }
        impl HRPOLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HRPOLR::_0 => false,
                    HRPOLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HRPOLR {
                match value {
                    false => HRPOLR::_0,
                    true => HRPOLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HRPOLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HRPOLR::_1
            }
        }
        #[doc = "Possible values of the field `HRSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HRSELR {
            #[doc = "Host request input is pin LPSPI_HREQ."]
            _0,
            #[doc = "Host request input is input trigger."]
            _1,
        }
        impl HRSELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HRSELR::_0 => false,
                    HRSELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HRSELR {
                match value {
                    false => HRSELR::_0,
                    true => HRSELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HRSELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HRSELR::_1
            }
        }
        #[doc = "Possible values of the field `CIRFIFO`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CIRFIFOR {
            #[doc = "Circular FIFO is disabled."]
            _0,
            #[doc = "Circular FIFO is enabled."]
            _1,
        }
        impl CIRFIFOR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CIRFIFOR::_0 => false,
                    CIRFIFOR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CIRFIFOR {
                match value {
                    false => CIRFIFOR::_0,
                    true => CIRFIFOR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CIRFIFOR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CIRFIFOR::_1
            }
        }
        #[doc = "Possible values of the field `RDMO`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RDMOR {
            #[doc = "Received data is stored in the receive FIFO as normal."]
            _0,
            #[doc = "Received data is discarded unless the DMF is set."]
            _1,
        }
        impl RDMOR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RDMOR::_0 => false,
                    RDMOR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RDMOR {
                match value {
                    false => RDMOR::_0,
                    true => RDMOR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RDMOR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RDMOR::_1
            }
        }
        #[doc = "Values that can be written to the field `HREN`"]
        pub enum HRENW {
            #[doc = "Host request is disabled."]
            _0,
            #[doc = "Host request is enabled."]
            _1,
        }
        impl HRENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HRENW::_0 => false,
                    HRENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HRENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HRENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HRENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Host request is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HRENW::_0)
            }
            #[doc = "Host request is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HRENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `HRPOL`"]
        pub enum HRPOLW {
            #[doc = "Active low."]
            _0,
            #[doc = "Active high."]
            _1,
        }
        impl HRPOLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HRPOLW::_0 => false,
                    HRPOLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HRPOLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HRPOLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HRPOLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Active low."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HRPOLW::_0)
            }
            #[doc = "Active high."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HRPOLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `HRSEL`"]
        pub enum HRSELW {
            #[doc = "Host request input is pin LPSPI_HREQ."]
            _0,
            #[doc = "Host request input is input trigger."]
            _1,
        }
        impl HRSELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HRSELW::_0 => false,
                    HRSELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HRSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HRSELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HRSELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Host request input is pin LPSPI_HREQ."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HRSELW::_0)
            }
            #[doc = "Host request input is input trigger."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HRSELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CIRFIFO`"]
        pub enum CIRFIFOW {
            #[doc = "Circular FIFO is disabled."]
            _0,
            #[doc = "Circular FIFO is enabled."]
            _1,
        }
        impl CIRFIFOW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CIRFIFOW::_0 => false,
                    CIRFIFOW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CIRFIFOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CIRFIFOW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CIRFIFOW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Circular FIFO is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CIRFIFOW::_0)
            }
            #[doc = "Circular FIFO is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CIRFIFOW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RDMO`"]
        pub enum RDMOW {
            #[doc = "Received data is stored in the receive FIFO as normal."]
            _0,
            #[doc = "Received data is discarded unless the DMF is set."]
            _1,
        }
        impl RDMOW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RDMOW::_0 => false,
                    RDMOW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RDMOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RDMOW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RDMOW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Received data is stored in the receive FIFO as normal."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RDMOW::_0)
            }
            #[doc = "Received data is discarded unless the DMF is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RDMOW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Host Request Enable"]
            #[inline(always)]
            pub fn hren(&self) -> HRENR {
                HRENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Host Request Polarity"]
            #[inline(always)]
            pub fn hrpol(&self) -> HRPOLR {
                HRPOLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Host Request Select"]
            #[inline(always)]
            pub fn hrsel(&self) -> HRSELR {
                HRSELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Circular FIFO Enable"]
            #[inline(always)]
            pub fn cirfifo(&self) -> CIRFIFOR {
                CIRFIFOR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Receive Data Match Only"]
            #[inline(always)]
            pub fn rdmo(&self) -> RDMOR {
                RDMOR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Host Request Enable"]
            #[inline(always)]
            pub fn hren(&mut self) -> _HRENW {
                _HRENW { w: self }
            }
            #[doc = "Bit 1 - Host Request Polarity"]
            #[inline(always)]
            pub fn hrpol(&mut self) -> _HRPOLW {
                _HRPOLW { w: self }
            }
            #[doc = "Bit 2 - Host Request Select"]
            #[inline(always)]
            pub fn hrsel(&mut self) -> _HRSELW {
                _HRSELW { w: self }
            }
            #[doc = "Bit 8 - Circular FIFO Enable"]
            #[inline(always)]
            pub fn cirfifo(&mut self) -> _CIRFIFOW {
                _CIRFIFOW { w: self }
            }
            #[doc = "Bit 9 - Receive Data Match Only"]
            #[inline(always)]
            pub fn rdmo(&mut self) -> _RDMOW {
                _RDMOW { w: self }
            }
        }
    }
    #[doc = "Configuration Register 1"]
    pub struct CFGR1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Configuration Register 1"]
    pub mod cfgr1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CFGR1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `MASTER`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MASTERR {
            #[doc = "Slave mode."]
            _0,
            #[doc = "Master mode."]
            _1,
        }
        impl MASTERR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MASTERR::_0 => false,
                    MASTERR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MASTERR {
                match value {
                    false => MASTERR::_0,
                    true => MASTERR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MASTERR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MASTERR::_1
            }
        }
        #[doc = "Possible values of the field `SAMPLE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SAMPLER {
            #[doc = "Input data sampled on SCK edge."]
            _0,
            #[doc = "Input data sampled on delayed SCK edge."]
            _1,
        }
        impl SAMPLER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SAMPLER::_0 => false,
                    SAMPLER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SAMPLER {
                match value {
                    false => SAMPLER::_0,
                    true => SAMPLER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SAMPLER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SAMPLER::_1
            }
        }
        #[doc = "Possible values of the field `AUTOPCS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum AUTOPCSR {
            #[doc = "Automatic PCS generation disabled."]
            _0,
            #[doc = "Automatic PCS generation enabled."]
            _1,
        }
        impl AUTOPCSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    AUTOPCSR::_0 => false,
                    AUTOPCSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> AUTOPCSR {
                match value {
                    false => AUTOPCSR::_0,
                    true => AUTOPCSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == AUTOPCSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == AUTOPCSR::_1
            }
        }
        #[doc = "Possible values of the field `NOSTALL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum NOSTALLR {
            #[doc = "Transfers will stall when transmit FIFO is empty or receive FIFO is full."]
            _0,
            #[doc = "Transfers will not stall, allowing transmit FIFO underrun or receive FIFO overrun to occur."]
            _1,
        }
        impl NOSTALLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    NOSTALLR::_0 => false,
                    NOSTALLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> NOSTALLR {
                match value {
                    false => NOSTALLR::_0,
                    true => NOSTALLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == NOSTALLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == NOSTALLR::_1
            }
        }
        #[doc = "Possible values of the field `PCSPOL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PCSPOLR {
            #[doc = "The PCSx is active low."]
            _0000,
            #[doc = "The PCSx is active high."]
            _0001,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl PCSPOLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PCSPOLR::_0000 => 0,
                    PCSPOLR::_0001 => 1,
                    PCSPOLR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PCSPOLR {
                match value {
                    0 => PCSPOLR::_0000,
                    1 => PCSPOLR::_0001,
                    i => PCSPOLR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == PCSPOLR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == PCSPOLR::_0001
            }
        }
        #[doc = "Possible values of the field `MATCFG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MATCFGR {
            #[doc = "Match is disabled."]
            _000,
            #[doc = "010b - Match is enabled, if 1st data word equals MATCH0 OR MATCH1, i.e., (1st data word = MATCH0 + MATCH1)"]
            _010,
            #[doc = "011b - Match is enabled, if any data word equals MATCH0 OR MATCH1, i.e., (any data word = MATCH0 + MATCH1)"]
            _011,
            #[doc = "100b - Match is enabled, if 1st data word equals MATCH0 AND 2nd data word equals MATCH1, i.e., [(1st data word = MATCH0) * (2nd data word = MATCH1)]"]
            _100,
            #[doc = "101b - Match is enabled, if any data word equals MATCH0 AND the next data word equals MATCH1, i.e., [(any data word = MATCH0) * (next data word = MATCH1)]"]
            _101,
            #[doc = "110b - Match is enabled, if (1st data word AND MATCH1) equals (MATCH0 AND MATCH1), i.e., [(1st data word * MATCH1) = (MATCH0 * MATCH1)]"]
            _110,
            #[doc = "111b - Match is enabled, if (any data word AND MATCH1) equals (MATCH0 AND MATCH1), i.e., [(any data word * MATCH1) = (MATCH0 * MATCH1)]"]
            _111,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl MATCFGR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MATCFGR::_000 => 0,
                    MATCFGR::_010 => 2,
                    MATCFGR::_011 => 3,
                    MATCFGR::_100 => 4,
                    MATCFGR::_101 => 5,
                    MATCFGR::_110 => 6,
                    MATCFGR::_111 => 7,
                    MATCFGR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MATCFGR {
                match value {
                    0 => MATCFGR::_000,
                    2 => MATCFGR::_010,
                    3 => MATCFGR::_011,
                    4 => MATCFGR::_100,
                    5 => MATCFGR::_101,
                    6 => MATCFGR::_110,
                    7 => MATCFGR::_111,
                    i => MATCFGR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MATCFGR::_000
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MATCFGR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MATCFGR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MATCFGR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MATCFGR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MATCFGR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MATCFGR::_111
            }
        }
        #[doc = "Possible values of the field `PINCFG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PINCFGR {
            #[doc = "SIN is used for input data and SOUT for output data."]
            _00,
            #[doc = "SIN is used for both input and output data."]
            _01,
            #[doc = "SOUT is used for both input and output data."]
            _10,
            #[doc = "SOUT is used for input data and SIN for output data."]
            _11,
        }
        impl PINCFGR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PINCFGR::_00 => 0,
                    PINCFGR::_01 => 1,
                    PINCFGR::_10 => 2,
                    PINCFGR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PINCFGR {
                match value {
                    0 => PINCFGR::_00,
                    1 => PINCFGR::_01,
                    2 => PINCFGR::_10,
                    3 => PINCFGR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == PINCFGR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == PINCFGR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == PINCFGR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == PINCFGR::_11
            }
        }
        #[doc = "Possible values of the field `OUTCFG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum OUTCFGR {
            #[doc = "Output data retains last value when chip select is negated."]
            _0,
            #[doc = "Output data is tristated when chip select is negated."]
            _1,
        }
        impl OUTCFGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    OUTCFGR::_0 => false,
                    OUTCFGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> OUTCFGR {
                match value {
                    false => OUTCFGR::_0,
                    true => OUTCFGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == OUTCFGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == OUTCFGR::_1
            }
        }
        #[doc = "Possible values of the field `PCSCFG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PCSCFGR {
            #[doc = "PCS[3:2] are enabled."]
            _0,
            #[doc = "PCS[3:2] are disabled."]
            _1,
        }
        impl PCSCFGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PCSCFGR::_0 => false,
                    PCSCFGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PCSCFGR {
                match value {
                    false => PCSCFGR::_0,
                    true => PCSCFGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PCSCFGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PCSCFGR::_1
            }
        }
        #[doc = "Values that can be written to the field `MASTER`"]
        pub enum MASTERW {
            #[doc = "Slave mode."]
            _0,
            #[doc = "Master mode."]
            _1,
        }
        impl MASTERW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MASTERW::_0 => false,
                    MASTERW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MASTERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MASTERW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MASTERW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Slave mode."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MASTERW::_0)
            }
            #[doc = "Master mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MASTERW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SAMPLE`"]
        pub enum SAMPLEW {
            #[doc = "Input data sampled on SCK edge."]
            _0,
            #[doc = "Input data sampled on delayed SCK edge."]
            _1,
        }
        impl SAMPLEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SAMPLEW::_0 => false,
                    SAMPLEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SAMPLEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SAMPLEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SAMPLEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Input data sampled on SCK edge."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SAMPLEW::_0)
            }
            #[doc = "Input data sampled on delayed SCK edge."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SAMPLEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `AUTOPCS`"]
        pub enum AUTOPCSW {
            #[doc = "Automatic PCS generation disabled."]
            _0,
            #[doc = "Automatic PCS generation enabled."]
            _1,
        }
        impl AUTOPCSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    AUTOPCSW::_0 => false,
                    AUTOPCSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _AUTOPCSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _AUTOPCSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: AUTOPCSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Automatic PCS generation disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(AUTOPCSW::_0)
            }
            #[doc = "Automatic PCS generation enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(AUTOPCSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `NOSTALL`"]
        pub enum NOSTALLW {
            #[doc = "Transfers will stall when transmit FIFO is empty or receive FIFO is full."]
            _0,
            #[doc = "Transfers will not stall, allowing transmit FIFO underrun or receive FIFO overrun to occur."]
            _1,
        }
        impl NOSTALLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    NOSTALLW::_0 => false,
                    NOSTALLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _NOSTALLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NOSTALLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: NOSTALLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Transfers will stall when transmit FIFO is empty or receive FIFO is full."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(NOSTALLW::_0)
            }
            #[doc = "Transfers will not stall, allowing transmit FIFO underrun or receive FIFO overrun to occur."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(NOSTALLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PCSPOL`"]
        pub enum PCSPOLW {
            #[doc = "The PCSx is active low."]
            _0000,
            #[doc = "The PCSx is active high."]
            _0001,
        }
        impl PCSPOLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PCSPOLW::_0000 => 0,
                    PCSPOLW::_0001 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PCSPOLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PCSPOLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PCSPOLW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "The PCSx is active low."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(PCSPOLW::_0000)
            }
            #[doc = "The PCSx is active high."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(PCSPOLW::_0001)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MATCFG`"]
        pub enum MATCFGW {
            #[doc = "Match is disabled."]
            _000,
            #[doc = "010b - Match is enabled, if 1st data word equals MATCH0 OR MATCH1, i.e., (1st data word = MATCH0 + MATCH1)"]
            _010,
            #[doc = "011b - Match is enabled, if any data word equals MATCH0 OR MATCH1, i.e., (any data word = MATCH0 + MATCH1)"]
            _011,
            #[doc = "100b - Match is enabled, if 1st data word equals MATCH0 AND 2nd data word equals MATCH1, i.e., [(1st data word = MATCH0) * (2nd data word = MATCH1)]"]
            _100,
            #[doc = "101b - Match is enabled, if any data word equals MATCH0 AND the next data word equals MATCH1, i.e., [(any data word = MATCH0) * (next data word = MATCH1)]"]
            _101,
            #[doc = "110b - Match is enabled, if (1st data word AND MATCH1) equals (MATCH0 AND MATCH1), i.e., [(1st data word * MATCH1) = (MATCH0 * MATCH1)]"]
            _110,
            #[doc = "111b - Match is enabled, if (any data word AND MATCH1) equals (MATCH0 AND MATCH1), i.e., [(any data word * MATCH1) = (MATCH0 * MATCH1)]"]
            _111,
        }
        impl MATCFGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MATCFGW::_000 => 0,
                    MATCFGW::_010 => 2,
                    MATCFGW::_011 => 3,
                    MATCFGW::_100 => 4,
                    MATCFGW::_101 => 5,
                    MATCFGW::_110 => 6,
                    MATCFGW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MATCFGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MATCFGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MATCFGW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Match is disabled."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MATCFGW::_000)
            }
            #[doc = "010b - Match is enabled, if 1st data word equals MATCH0 OR MATCH1, i.e., (1st data word = MATCH0 + MATCH1)"]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MATCFGW::_010)
            }
            #[doc = "011b - Match is enabled, if any data word equals MATCH0 OR MATCH1, i.e., (any data word = MATCH0 + MATCH1)"]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MATCFGW::_011)
            }
            #[doc = "100b - Match is enabled, if 1st data word equals MATCH0 AND 2nd data word equals MATCH1, i.e., [(1st data word = MATCH0) * (2nd data word = MATCH1)]"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MATCFGW::_100)
            }
            #[doc = "101b - Match is enabled, if any data word equals MATCH0 AND the next data word equals MATCH1, i.e., [(any data word = MATCH0) * (next data word = MATCH1)]"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MATCFGW::_101)
            }
            #[doc = "110b - Match is enabled, if (1st data word AND MATCH1) equals (MATCH0 AND MATCH1), i.e., [(1st data word * MATCH1) = (MATCH0 * MATCH1)]"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MATCFGW::_110)
            }
            #[doc = "111b - Match is enabled, if (any data word AND MATCH1) equals (MATCH0 AND MATCH1), i.e., [(any data word * MATCH1) = (MATCH0 * MATCH1)]"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MATCFGW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PINCFG`"]
        pub enum PINCFGW {
            #[doc = "SIN is used for input data and SOUT for output data."]
            _00,
            #[doc = "SIN is used for both input and output data."]
            _01,
            #[doc = "SOUT is used for both input and output data."]
            _10,
            #[doc = "SOUT is used for input data and SIN for output data."]
            _11,
        }
        impl PINCFGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PINCFGW::_00 => 0,
                    PINCFGW::_01 => 1,
                    PINCFGW::_10 => 2,
                    PINCFGW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PINCFGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PINCFGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PINCFGW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "SIN is used for input data and SOUT for output data."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(PINCFGW::_00)
            }
            #[doc = "SIN is used for both input and output data."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(PINCFGW::_01)
            }
            #[doc = "SOUT is used for both input and output data."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(PINCFGW::_10)
            }
            #[doc = "SOUT is used for input data and SIN for output data."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(PINCFGW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `OUTCFG`"]
        pub enum OUTCFGW {
            #[doc = "Output data retains last value when chip select is negated."]
            _0,
            #[doc = "Output data is tristated when chip select is negated."]
            _1,
        }
        impl OUTCFGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    OUTCFGW::_0 => false,
                    OUTCFGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _OUTCFGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _OUTCFGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: OUTCFGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Output data retains last value when chip select is negated."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(OUTCFGW::_0)
            }
            #[doc = "Output data is tristated when chip select is negated."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(OUTCFGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 26;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PCSCFG`"]
        pub enum PCSCFGW {
            #[doc = "PCS[3:2] are enabled."]
            _0,
            #[doc = "PCS[3:2] are disabled."]
            _1,
        }
        impl PCSCFGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PCSCFGW::_0 => false,
                    PCSCFGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PCSCFGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PCSCFGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PCSCFGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "PCS[3:2] are enabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PCSCFGW::_0)
            }
            #[doc = "PCS[3:2] are disabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PCSCFGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 27;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Master Mode"]
            #[inline(always)]
            pub fn master(&self) -> MASTERR {
                MASTERR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Sample Point"]
            #[inline(always)]
            pub fn sample(&self) -> SAMPLER {
                SAMPLER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Automatic PCS"]
            #[inline(always)]
            pub fn autopcs(&self) -> AUTOPCSR {
                AUTOPCSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - No Stall"]
            #[inline(always)]
            pub fn nostall(&self) -> NOSTALLR {
                NOSTALLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:11 - Peripheral Chip Select Polarity"]
            #[inline(always)]
            pub fn pcspol(&self) -> PCSPOLR {
                PCSPOLR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 16:18 - Match Configuration"]
            #[inline(always)]
            pub fn matcfg(&self) -> MATCFGR {
                MATCFGR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 24:25 - Pin Configuration"]
            #[inline(always)]
            pub fn pincfg(&self) -> PINCFGR {
                PINCFGR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 26 - Output Config"]
            #[inline(always)]
            pub fn outcfg(&self) -> OUTCFGR {
                OUTCFGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 26;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 27 - Peripheral Chip Select Configuration"]
            #[inline(always)]
            pub fn pcscfg(&self) -> PCSCFGR {
                PCSCFGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 27;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Master Mode"]
            #[inline(always)]
            pub fn master(&mut self) -> _MASTERW {
                _MASTERW { w: self }
            }
            #[doc = "Bit 1 - Sample Point"]
            #[inline(always)]
            pub fn sample(&mut self) -> _SAMPLEW {
                _SAMPLEW { w: self }
            }
            #[doc = "Bit 2 - Automatic PCS"]
            #[inline(always)]
            pub fn autopcs(&mut self) -> _AUTOPCSW {
                _AUTOPCSW { w: self }
            }
            #[doc = "Bit 3 - No Stall"]
            #[inline(always)]
            pub fn nostall(&mut self) -> _NOSTALLW {
                _NOSTALLW { w: self }
            }
            #[doc = "Bits 8:11 - Peripheral Chip Select Polarity"]
            #[inline(always)]
            pub fn pcspol(&mut self) -> _PCSPOLW {
                _PCSPOLW { w: self }
            }
            #[doc = "Bits 16:18 - Match Configuration"]
            #[inline(always)]
            pub fn matcfg(&mut self) -> _MATCFGW {
                _MATCFGW { w: self }
            }
            #[doc = "Bits 24:25 - Pin Configuration"]
            #[inline(always)]
            pub fn pincfg(&mut self) -> _PINCFGW {
                _PINCFGW { w: self }
            }
            #[doc = "Bit 26 - Output Config"]
            #[inline(always)]
            pub fn outcfg(&mut self) -> _OUTCFGW {
                _OUTCFGW { w: self }
            }
            #[doc = "Bit 27 - Peripheral Chip Select Configuration"]
            #[inline(always)]
            pub fn pcscfg(&mut self) -> _PCSCFGW {
                _PCSCFGW { w: self }
            }
        }
    }
    #[doc = "Data Match Register 0"]
    pub struct DMR0 {
        register: VolatileCell<u32>,
    }
    #[doc = "Data Match Register 0"]
    pub mod dmr0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::DMR0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MATCH0R {
            bits: u32,
        }
        impl MATCH0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MATCH0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MATCH0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Match 0 Value"]
            #[inline(always)]
            pub fn match0(&self) -> MATCH0R {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MATCH0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Match 0 Value"]
            #[inline(always)]
            pub fn match0(&mut self) -> _MATCH0W {
                _MATCH0W { w: self }
            }
        }
    }
    #[doc = "Data Match Register 1"]
    pub struct DMR1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Data Match Register 1"]
    pub mod dmr1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::DMR1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MATCH1R {
            bits: u32,
        }
        impl MATCH1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MATCH1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MATCH1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Match 1 Value"]
            #[inline(always)]
            pub fn match1(&self) -> MATCH1R {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MATCH1R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Match 1 Value"]
            #[inline(always)]
            pub fn match1(&mut self) -> _MATCH1W {
                _MATCH1W { w: self }
            }
        }
    }
    #[doc = "Clock Configuration Register"]
    pub struct CCR {
        register: VolatileCell<u32>,
    }
    #[doc = "Clock Configuration Register"]
    pub mod ccr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CCR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SCKDIVR {
            bits: u8,
        }
        impl SCKDIVR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DBTR {
            bits: u8,
        }
        impl DBTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct PCSSCKR {
            bits: u8,
        }
        impl PCSSCKR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct SCKPCSR {
            bits: u8,
        }
        impl SCKPCSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SCKDIVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SCKDIVW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DBTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DBTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _PCSSCKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PCSSCKW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SCKPCSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SCKPCSW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - SCK Divider"]
            #[inline(always)]
            pub fn sckdiv(&self) -> SCKDIVR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SCKDIVR { bits }
            }
            #[doc = "Bits 8:15 - Delay Between Transfers"]
            #[inline(always)]
            pub fn dbt(&self) -> DBTR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DBTR { bits }
            }
            #[doc = "Bits 16:23 - PCS to SCK Delay"]
            #[inline(always)]
            pub fn pcssck(&self) -> PCSSCKR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                PCSSCKR { bits }
            }
            #[doc = "Bits 24:31 - SCK to PCS Delay"]
            #[inline(always)]
            pub fn sckpcs(&self) -> SCKPCSR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SCKPCSR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - SCK Divider"]
            #[inline(always)]
            pub fn sckdiv(&mut self) -> _SCKDIVW {
                _SCKDIVW { w: self }
            }
            #[doc = "Bits 8:15 - Delay Between Transfers"]
            #[inline(always)]
            pub fn dbt(&mut self) -> _DBTW {
                _DBTW { w: self }
            }
            #[doc = "Bits 16:23 - PCS to SCK Delay"]
            #[inline(always)]
            pub fn pcssck(&mut self) -> _PCSSCKW {
                _PCSSCKW { w: self }
            }
            #[doc = "Bits 24:31 - SCK to PCS Delay"]
            #[inline(always)]
            pub fn sckpcs(&mut self) -> _SCKPCSW {
                _SCKPCSW { w: self }
            }
        }
    }
    #[doc = "FIFO Control Register"]
    pub struct FCR {
        register: VolatileCell<u32>,
    }
    #[doc = "FIFO Control Register"]
    pub mod fcr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FCR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct TXWATERR {
            bits: u8,
        }
        impl TXWATERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct RXWATERR {
            bits: u8,
        }
        impl RXWATERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXWATERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXWATERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXWATERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXWATERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:1 - Transmit FIFO Watermark"]
            #[inline(always)]
            pub fn txwater(&self) -> TXWATERR {
                let bits = {
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TXWATERR { bits }
            }
            #[doc = "Bits 16:17 - Receive FIFO Watermark"]
            #[inline(always)]
            pub fn rxwater(&self) -> RXWATERR {
                let bits = {
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                RXWATERR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:1 - Transmit FIFO Watermark"]
            #[inline(always)]
            pub fn txwater(&mut self) -> _TXWATERW {
                _TXWATERW { w: self }
            }
            #[doc = "Bits 16:17 - Receive FIFO Watermark"]
            #[inline(always)]
            pub fn rxwater(&mut self) -> _RXWATERW {
                _RXWATERW { w: self }
            }
        }
    }
    #[doc = "FIFO Status Register"]
    pub struct FSR {
        register: VolatileCell<u32>,
    }
    #[doc = "FIFO Status Register"]
    pub mod fsr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::FSR {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct TXCOUNTR {
            bits: u8,
        }
        impl TXCOUNTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct RXCOUNTR {
            bits: u8,
        }
        impl RXCOUNTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:2 - Transmit FIFO Count"]
            #[inline(always)]
            pub fn txcount(&self) -> TXCOUNTR {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TXCOUNTR { bits }
            }
            #[doc = "Bits 16:18 - Receive FIFO Count"]
            #[inline(always)]
            pub fn rxcount(&self) -> RXCOUNTR {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                RXCOUNTR { bits }
            }
        }
    }
    #[doc = "Transmit Command Register"]
    pub struct TCR {
        register: VolatileCell<u32>,
    }
    #[doc = "Transmit Command Register"]
    pub mod tcr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct FRAMESZR {
            bits: u16,
        }
        impl FRAMESZR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `WIDTH`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WIDTHR {
            #[doc = "Single bit transfer."]
            _00,
            #[doc = "Two bit transfer."]
            _01,
            #[doc = "Four bit transfer."]
            _10,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl WIDTHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    WIDTHR::_00 => 0,
                    WIDTHR::_01 => 1,
                    WIDTHR::_10 => 2,
                    WIDTHR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> WIDTHR {
                match value {
                    0 => WIDTHR::_00,
                    1 => WIDTHR::_01,
                    2 => WIDTHR::_10,
                    i => WIDTHR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == WIDTHR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == WIDTHR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == WIDTHR::_10
            }
        }
        #[doc = "Possible values of the field `TXMSK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXMSKR {
            #[doc = "Normal transfer."]
            _0,
            #[doc = "Mask transmit data."]
            _1,
        }
        impl TXMSKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXMSKR::_0 => false,
                    TXMSKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXMSKR {
                match value {
                    false => TXMSKR::_0,
                    true => TXMSKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXMSKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXMSKR::_1
            }
        }
        #[doc = "Possible values of the field `RXMSK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXMSKR {
            #[doc = "Normal transfer."]
            _0,
            #[doc = "Receive data is masked."]
            _1,
        }
        impl RXMSKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXMSKR::_0 => false,
                    RXMSKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXMSKR {
                match value {
                    false => RXMSKR::_0,
                    true => RXMSKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXMSKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RXMSKR::_1
            }
        }
        #[doc = "Possible values of the field `CONTC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CONTCR {
            #[doc = "Command word for start of new transfer."]
            _0,
            #[doc = "Command word for continuing transfer."]
            _1,
        }
        impl CONTCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CONTCR::_0 => false,
                    CONTCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CONTCR {
                match value {
                    false => CONTCR::_0,
                    true => CONTCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CONTCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CONTCR::_1
            }
        }
        #[doc = "Possible values of the field `CONT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CONTR {
            #[doc = "Continuous transfer disabled."]
            _0,
            #[doc = "Continuous transfer enabled."]
            _1,
        }
        impl CONTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CONTR::_0 => false,
                    CONTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CONTR {
                match value {
                    false => CONTR::_0,
                    true => CONTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CONTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CONTR::_1
            }
        }
        #[doc = "Possible values of the field `BYSW`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BYSWR {
            #[doc = "Byte swap disabled."]
            _0,
            #[doc = "Byte swap enabled."]
            _1,
        }
        impl BYSWR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BYSWR::_0 => false,
                    BYSWR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BYSWR {
                match value {
                    false => BYSWR::_0,
                    true => BYSWR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BYSWR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BYSWR::_1
            }
        }
        #[doc = "Possible values of the field `LSBF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LSBFR {
            #[doc = "Data is transferred MSB first."]
            _0,
            #[doc = "Data is transferred LSB first."]
            _1,
        }
        impl LSBFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LSBFR::_0 => false,
                    LSBFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LSBFR {
                match value {
                    false => LSBFR::_0,
                    true => LSBFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LSBFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LSBFR::_1
            }
        }
        #[doc = "Possible values of the field `PCS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PCSR {
            #[doc = "Transfer using LPSPI_PCS[0]"]
            _00,
            #[doc = "Transfer using LPSPI_PCS[1]"]
            _01,
            #[doc = "Transfer using LPSPI_PCS[2]"]
            _10,
            #[doc = "Transfer using LPSPI_PCS[3]"]
            _11,
        }
        impl PCSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PCSR::_00 => 0,
                    PCSR::_01 => 1,
                    PCSR::_10 => 2,
                    PCSR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PCSR {
                match value {
                    0 => PCSR::_00,
                    1 => PCSR::_01,
                    2 => PCSR::_10,
                    3 => PCSR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == PCSR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == PCSR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == PCSR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == PCSR::_11
            }
        }
        #[doc = "Possible values of the field `PRESCALE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PRESCALER {
            #[doc = "Divide by 1."]
            _000,
            #[doc = "Divide by 2."]
            _001,
            #[doc = "Divide by 4."]
            _010,
            #[doc = "Divide by 8."]
            _011,
            #[doc = "Divide by 16."]
            _100,
            #[doc = "Divide by 32."]
            _101,
            #[doc = "Divide by 64."]
            _110,
            #[doc = "Divide by 128."]
            _111,
        }
        impl PRESCALER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PRESCALER::_000 => 0,
                    PRESCALER::_001 => 1,
                    PRESCALER::_010 => 2,
                    PRESCALER::_011 => 3,
                    PRESCALER::_100 => 4,
                    PRESCALER::_101 => 5,
                    PRESCALER::_110 => 6,
                    PRESCALER::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PRESCALER {
                match value {
                    0 => PRESCALER::_000,
                    1 => PRESCALER::_001,
                    2 => PRESCALER::_010,
                    3 => PRESCALER::_011,
                    4 => PRESCALER::_100,
                    5 => PRESCALER::_101,
                    6 => PRESCALER::_110,
                    7 => PRESCALER::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == PRESCALER::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == PRESCALER::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == PRESCALER::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == PRESCALER::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == PRESCALER::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == PRESCALER::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == PRESCALER::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == PRESCALER::_111
            }
        }
        #[doc = "Possible values of the field `CPHA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CPHAR {
            #[doc = "Data is captured on the leading edge of SCK and changed on the following edge."]
            _0,
            #[doc = "Data is changed on the leading edge of SCK and captured on the following edge."]
            _1,
        }
        impl CPHAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CPHAR::_0 => false,
                    CPHAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CPHAR {
                match value {
                    false => CPHAR::_0,
                    true => CPHAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CPHAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CPHAR::_1
            }
        }
        #[doc = "Possible values of the field `CPOL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CPOLR {
            #[doc = "The inactive state value of SCK is low."]
            _0,
            #[doc = "The inactive state value of SCK is high."]
            _1,
        }
        impl CPOLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CPOLR::_0 => false,
                    CPOLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CPOLR {
                match value {
                    false => CPOLR::_0,
                    true => CPOLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CPOLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CPOLR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _FRAMESZW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FRAMESZW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 4095;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WIDTH`"]
        pub enum WIDTHW {
            #[doc = "Single bit transfer."]
            _00,
            #[doc = "Two bit transfer."]
            _01,
            #[doc = "Four bit transfer."]
            _10,
        }
        impl WIDTHW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    WIDTHW::_00 => 0,
                    WIDTHW::_01 => 1,
                    WIDTHW::_10 => 2,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WIDTHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WIDTHW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WIDTHW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Single bit transfer."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(WIDTHW::_00)
            }
            #[doc = "Two bit transfer."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(WIDTHW::_01)
            }
            #[doc = "Four bit transfer."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(WIDTHW::_10)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TXMSK`"]
        pub enum TXMSKW {
            #[doc = "Normal transfer."]
            _0,
            #[doc = "Mask transmit data."]
            _1,
        }
        impl TXMSKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TXMSKW::_0 => false,
                    TXMSKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXMSKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXMSKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TXMSKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Normal transfer."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TXMSKW::_0)
            }
            #[doc = "Mask transmit data."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TXMSKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RXMSK`"]
        pub enum RXMSKW {
            #[doc = "Normal transfer."]
            _0,
            #[doc = "Receive data is masked."]
            _1,
        }
        impl RXMSKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RXMSKW::_0 => false,
                    RXMSKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXMSKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXMSKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RXMSKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Normal transfer."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RXMSKW::_0)
            }
            #[doc = "Receive data is masked."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RXMSKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 19;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CONTC`"]
        pub enum CONTCW {
            #[doc = "Command word for start of new transfer."]
            _0,
            #[doc = "Command word for continuing transfer."]
            _1,
        }
        impl CONTCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CONTCW::_0 => false,
                    CONTCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CONTCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CONTCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CONTCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Command word for start of new transfer."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CONTCW::_0)
            }
            #[doc = "Command word for continuing transfer."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CONTCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CONT`"]
        pub enum CONTW {
            #[doc = "Continuous transfer disabled."]
            _0,
            #[doc = "Continuous transfer enabled."]
            _1,
        }
        impl CONTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CONTW::_0 => false,
                    CONTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CONTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CONTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CONTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Continuous transfer disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CONTW::_0)
            }
            #[doc = "Continuous transfer enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CONTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 21;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BYSW`"]
        pub enum BYSWW {
            #[doc = "Byte swap disabled."]
            _0,
            #[doc = "Byte swap enabled."]
            _1,
        }
        impl BYSWW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    BYSWW::_0 => false,
                    BYSWW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYSWW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYSWW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BYSWW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Byte swap disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BYSWW::_0)
            }
            #[doc = "Byte swap enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BYSWW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 22;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LSBF`"]
        pub enum LSBFW {
            #[doc = "Data is transferred MSB first."]
            _0,
            #[doc = "Data is transferred LSB first."]
            _1,
        }
        impl LSBFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LSBFW::_0 => false,
                    LSBFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LSBFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LSBFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LSBFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Data is transferred MSB first."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LSBFW::_0)
            }
            #[doc = "Data is transferred LSB first."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LSBFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 23;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PCS`"]
        pub enum PCSW {
            #[doc = "Transfer using LPSPI_PCS[0]"]
            _00,
            #[doc = "Transfer using LPSPI_PCS[1]"]
            _01,
            #[doc = "Transfer using LPSPI_PCS[2]"]
            _10,
            #[doc = "Transfer using LPSPI_PCS[3]"]
            _11,
        }
        impl PCSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PCSW::_00 => 0,
                    PCSW::_01 => 1,
                    PCSW::_10 => 2,
                    PCSW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PCSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PCSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PCSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Transfer using LPSPI_PCS[0]"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(PCSW::_00)
            }
            #[doc = "Transfer using LPSPI_PCS[1]"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(PCSW::_01)
            }
            #[doc = "Transfer using LPSPI_PCS[2]"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(PCSW::_10)
            }
            #[doc = "Transfer using LPSPI_PCS[3]"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(PCSW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PRESCALE`"]
        pub enum PRESCALEW {
            #[doc = "Divide by 1."]
            _000,
            #[doc = "Divide by 2."]
            _001,
            #[doc = "Divide by 4."]
            _010,
            #[doc = "Divide by 8."]
            _011,
            #[doc = "Divide by 16."]
            _100,
            #[doc = "Divide by 32."]
            _101,
            #[doc = "Divide by 64."]
            _110,
            #[doc = "Divide by 128."]
            _111,
        }
        impl PRESCALEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PRESCALEW::_000 => 0,
                    PRESCALEW::_001 => 1,
                    PRESCALEW::_010 => 2,
                    PRESCALEW::_011 => 3,
                    PRESCALEW::_100 => 4,
                    PRESCALEW::_101 => 5,
                    PRESCALEW::_110 => 6,
                    PRESCALEW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PRESCALEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PRESCALEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PRESCALEW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Divide by 1."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(PRESCALEW::_000)
            }
            #[doc = "Divide by 2."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(PRESCALEW::_001)
            }
            #[doc = "Divide by 4."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(PRESCALEW::_010)
            }
            #[doc = "Divide by 8."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(PRESCALEW::_011)
            }
            #[doc = "Divide by 16."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(PRESCALEW::_100)
            }
            #[doc = "Divide by 32."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(PRESCALEW::_101)
            }
            #[doc = "Divide by 64."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(PRESCALEW::_110)
            }
            #[doc = "Divide by 128."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(PRESCALEW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 27;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CPHA`"]
        pub enum CPHAW {
            #[doc = "Data is captured on the leading edge of SCK and changed on the following edge."]
            _0,
            #[doc = "Data is changed on the leading edge of SCK and captured on the following edge."]
            _1,
        }
        impl CPHAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CPHAW::_0 => false,
                    CPHAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CPHAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CPHAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CPHAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Data is captured on the leading edge of SCK and changed on the following edge."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CPHAW::_0)
            }
            #[doc = "Data is changed on the leading edge of SCK and captured on the following edge."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CPHAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CPOL`"]
        pub enum CPOLW {
            #[doc = "The inactive state value of SCK is low."]
            _0,
            #[doc = "The inactive state value of SCK is high."]
            _1,
        }
        impl CPOLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CPOLW::_0 => false,
                    CPOLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CPOLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CPOLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CPOLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The inactive state value of SCK is low."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CPOLW::_0)
            }
            #[doc = "The inactive state value of SCK is high."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CPOLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:11 - Frame Size"]
            #[inline(always)]
            pub fn framesz(&self) -> FRAMESZR {
                let bits = {
                    const MASK: u16 = 4095;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                FRAMESZR { bits }
            }
            #[doc = "Bits 16:17 - Transfer Width"]
            #[inline(always)]
            pub fn width(&self) -> WIDTHR {
                WIDTHR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 18 - Transmit Data Mask"]
            #[inline(always)]
            pub fn txmsk(&self) -> TXMSKR {
                TXMSKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 19 - Receive Data Mask"]
            #[inline(always)]
            pub fn rxmsk(&self) -> RXMSKR {
                RXMSKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 19;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 20 - Continuing Command"]
            #[inline(always)]
            pub fn contc(&self) -> CONTCR {
                CONTCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - Continuous Transfer"]
            #[inline(always)]
            pub fn cont(&self) -> CONTR {
                CONTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 22 - Byte Swap"]
            #[inline(always)]
            pub fn bysw(&self) -> BYSWR {
                BYSWR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 23 - LSB First"]
            #[inline(always)]
            pub fn lsbf(&self) -> LSBFR {
                LSBFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 24:25 - Peripheral Chip Select"]
            #[inline(always)]
            pub fn pcs(&self) -> PCSR {
                PCSR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 27:29 - Prescaler Value"]
            #[inline(always)]
            pub fn prescale(&self) -> PRESCALER {
                PRESCALER::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 27;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 30 - Clock Phase"]
            #[inline(always)]
            pub fn cpha(&self) -> CPHAR {
                CPHAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Clock Polarity"]
            #[inline(always)]
            pub fn cpol(&self) -> CPOLR {
                CPOLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 31 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:11 - Frame Size"]
            #[inline(always)]
            pub fn framesz(&mut self) -> _FRAMESZW {
                _FRAMESZW { w: self }
            }
            #[doc = "Bits 16:17 - Transfer Width"]
            #[inline(always)]
            pub fn width(&mut self) -> _WIDTHW {
                _WIDTHW { w: self }
            }
            #[doc = "Bit 18 - Transmit Data Mask"]
            #[inline(always)]
            pub fn txmsk(&mut self) -> _TXMSKW {
                _TXMSKW { w: self }
            }
            #[doc = "Bit 19 - Receive Data Mask"]
            #[inline(always)]
            pub fn rxmsk(&mut self) -> _RXMSKW {
                _RXMSKW { w: self }
            }
            #[doc = "Bit 20 - Continuing Command"]
            #[inline(always)]
            pub fn contc(&mut self) -> _CONTCW {
                _CONTCW { w: self }
            }
            #[doc = "Bit 21 - Continuous Transfer"]
            #[inline(always)]
            pub fn cont(&mut self) -> _CONTW {
                _CONTW { w: self }
            }
            #[doc = "Bit 22 - Byte Swap"]
            #[inline(always)]
            pub fn bysw(&mut self) -> _BYSWW {
                _BYSWW { w: self }
            }
            #[doc = "Bit 23 - LSB First"]
            #[inline(always)]
            pub fn lsbf(&mut self) -> _LSBFW {
                _LSBFW { w: self }
            }
            #[doc = "Bits 24:25 - Peripheral Chip Select"]
            #[inline(always)]
            pub fn pcs(&mut self) -> _PCSW {
                _PCSW { w: self }
            }
            #[doc = "Bits 27:29 - Prescaler Value"]
            #[inline(always)]
            pub fn prescale(&mut self) -> _PRESCALEW {
                _PRESCALEW { w: self }
            }
            #[doc = "Bit 30 - Clock Phase"]
            #[inline(always)]
            pub fn cpha(&mut self) -> _CPHAW {
                _CPHAW { w: self }
            }
            #[doc = "Bit 31 - Clock Polarity"]
            #[inline(always)]
            pub fn cpol(&mut self) -> _CPOLW {
                _CPOLW { w: self }
            }
        }
    }
    #[doc = "Transmit Data Register"]
    pub struct TDR {
        register: VolatileCell<u32>,
    }
    #[doc = "Transmit Data Register"]
    pub mod tdr {
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TDR {
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATAW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Transmit Data"]
            #[inline(always)]
            pub fn data(&mut self) -> _DATAW {
                _DATAW { w: self }
            }
        }
    }
    #[doc = "Receive Status Register"]
    pub struct RSR {
        register: VolatileCell<u32>,
    }
    #[doc = "Receive Status Register"]
    pub mod rsr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::RSR {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = "Possible values of the field `SOF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SOFR {
            #[doc = "Subsequent data word received after LPSPI_PCS assertion."]
            _0,
            #[doc = "First data word received after LPSPI_PCS assertion."]
            _1,
        }
        impl SOFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SOFR::_0 => false,
                    SOFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SOFR {
                match value {
                    false => SOFR::_0,
                    true => SOFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SOFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SOFR::_1
            }
        }
        #[doc = "Possible values of the field `RXEMPTY`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXEMPTYR {
            #[doc = "RX FIFO is not empty."]
            _0,
            #[doc = "RX FIFO is empty."]
            _1,
        }
        impl RXEMPTYR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXEMPTYR::_0 => false,
                    RXEMPTYR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXEMPTYR {
                match value {
                    false => RXEMPTYR::_0,
                    true => RXEMPTYR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXEMPTYR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RXEMPTYR::_1
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Start Of Frame"]
            #[inline(always)]
            pub fn sof(&self) -> SOFR {
                SOFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - RX FIFO Empty"]
            #[inline(always)]
            pub fn rxempty(&self) -> RXEMPTYR {
                RXEMPTYR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
    }
    #[doc = "Receive Data Register"]
    pub struct RDR {
        register: VolatileCell<u32>,
    }
    #[doc = "Receive Data Register"]
    pub mod rdr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::RDR {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATAR {
            bits: u32,
        }
        impl DATAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Receive Data"]
            #[inline(always)]
            pub fn data(&self) -> DATAR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                DATAR { bits }
            }
        }
    }
}
#[doc = "The LPSPI Memory Map/Register Definition can be found here."]
pub struct LPSPI1 {
    register_block: lpspi1::RegisterBlock,
}
impl Deref for LPSPI1 {
    type Target = lpspi1::RegisterBlock;
    fn deref(&self) -> &lpspi1::RegisterBlock {
        &self.register_block
    }
}
#[doc = "The LPSPI Memory Map/Register Definition can be found here."]
pub const LPSPI2: Peripheral<LPSPI2> = unsafe { Peripheral::new(1073930240) };
#[doc = "The LPSPI Memory Map/Register Definition can be found here."]
pub mod lpspi2 {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - Version ID Register"]
        pub verid: VERID,
        #[doc = "0x04 - Parameter Register"]
        pub param: PARAM,
        _reserved0: [u8; 8usize],
        #[doc = "0x10 - Control Register"]
        pub cr: CR,
        #[doc = "0x14 - Status Register"]
        pub sr: SR,
        #[doc = "0x18 - Interrupt Enable Register"]
        pub ier: IER,
        #[doc = "0x1c - DMA Enable Register"]
        pub der: DER,
        #[doc = "0x20 - Configuration Register 0"]
        pub cfgr0: CFGR0,
        #[doc = "0x24 - Configuration Register 1"]
        pub cfgr1: CFGR1,
        _reserved1: [u8; 8usize],
        #[doc = "0x30 - Data Match Register 0"]
        pub dmr0: DMR0,
        #[doc = "0x34 - Data Match Register 1"]
        pub dmr1: DMR1,
        _reserved2: [u8; 8usize],
        #[doc = "0x40 - Clock Configuration Register"]
        pub ccr: CCR,
        _reserved3: [u8; 20usize],
        #[doc = "0x58 - FIFO Control Register"]
        pub fcr: FCR,
        #[doc = "0x5c - FIFO Status Register"]
        pub fsr: FSR,
        #[doc = "0x60 - Transmit Command Register"]
        pub tcr: TCR,
        #[doc = "0x64 - Transmit Data Register"]
        pub tdr: TDR,
        _reserved4: [u8; 8usize],
        #[doc = "0x70 - Receive Status Register"]
        pub rsr: RSR,
        #[doc = "0x74 - Receive Data Register"]
        pub rdr: RDR,
    }
    #[doc = "Version ID Register"]
    pub struct VERID {
        register: VolatileCell<u32>,
    }
    #[doc = "Version ID Register"]
    pub mod verid {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::VERID {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = "Possible values of the field `FEATURE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FEATURER {
            #[doc = "Standard feature set supporting 32-bit shift register."]
            _0000000000000100,
            #[doc = r" Reserved"]
            _Reserved(u16),
        }
        impl FEATURER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                match *self {
                    FEATURER::_0000000000000100 => 4,
                    FEATURER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u16) -> FEATURER {
                match value {
                    4 => FEATURER::_0000000000000100,
                    i => FEATURER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000000000000100`"]
            #[inline(always)]
            pub fn is_0000000000000100(&self) -> bool {
                *self == FEATURER::_0000000000000100
            }
        }
        #[doc = r" Value of the field"]
        pub struct MINORR {
            bits: u8,
        }
        impl MINORR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct MAJORR {
            bits: u8,
        }
        impl MAJORR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Module Identification Number"]
            #[inline(always)]
            pub fn feature(&self) -> FEATURER {
                FEATURER::_from({
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                })
            }
            #[doc = "Bits 16:23 - Minor Version Number"]
            #[inline(always)]
            pub fn minor(&self) -> MINORR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                MINORR { bits }
            }
            #[doc = "Bits 24:31 - Major Version Number"]
            #[inline(always)]
            pub fn major(&self) -> MAJORR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                MAJORR { bits }
            }
        }
    }
    #[doc = "Parameter Register"]
    pub struct PARAM {
        register: VolatileCell<u32>,
    }
    #[doc = "Parameter Register"]
    pub mod param {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::PARAM {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct TXFIFOR {
            bits: u8,
        }
        impl TXFIFOR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct RXFIFOR {
            bits: u8,
        }
        impl RXFIFOR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Transmit FIFO Size"]
            #[inline(always)]
            pub fn txfifo(&self) -> TXFIFOR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TXFIFOR { bits }
            }
            #[doc = "Bits 8:15 - Receive FIFO Size"]
            #[inline(always)]
            pub fn rxfifo(&self) -> RXFIFOR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                RXFIFOR { bits }
            }
        }
    }
    #[doc = "Control Register"]
    pub struct CR {
        register: VolatileCell<u32>,
    }
    #[doc = "Control Register"]
    pub mod cr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `MEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MENR {
            #[doc = "Module is disabled."]
            _0,
            #[doc = "Module is enabled."]
            _1,
        }
        impl MENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MENR::_0 => false,
                    MENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MENR {
                match value {
                    false => MENR::_0,
                    true => MENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MENR::_1
            }
        }
        #[doc = "Possible values of the field `RST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RSTR {
            #[doc = "Master logic is not reset."]
            _0,
            #[doc = "Master logic is reset."]
            _1,
        }
        impl RSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RSTR::_0 => false,
                    RSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RSTR {
                match value {
                    false => RSTR::_0,
                    true => RSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RSTR::_1
            }
        }
        #[doc = "Possible values of the field `DOZEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DOZENR {
            #[doc = "Module is enabled in Doze mode."]
            _0,
            #[doc = "Module is disabled in Doze mode."]
            _1,
        }
        impl DOZENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DOZENR::_0 => false,
                    DOZENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DOZENR {
                match value {
                    false => DOZENR::_0,
                    true => DOZENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DOZENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DOZENR::_1
            }
        }
        #[doc = "Possible values of the field `DBGEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DBGENR {
            #[doc = "Module is disabled in debug mode."]
            _0,
            #[doc = "Module is enabled in debug mode."]
            _1,
        }
        impl DBGENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DBGENR::_0 => false,
                    DBGENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DBGENR {
                match value {
                    false => DBGENR::_0,
                    true => DBGENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DBGENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DBGENR::_1
            }
        }
        #[doc = "Values that can be written to the field `MEN`"]
        pub enum MENW {
            #[doc = "Module is disabled."]
            _0,
            #[doc = "Module is enabled."]
            _1,
        }
        impl MENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MENW::_0 => false,
                    MENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Module is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MENW::_0)
            }
            #[doc = "Module is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RST`"]
        pub enum RSTW {
            #[doc = "Master logic is not reset."]
            _0,
            #[doc = "Master logic is reset."]
            _1,
        }
        impl RSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RSTW::_0 => false,
                    RSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Master logic is not reset."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RSTW::_0)
            }
            #[doc = "Master logic is reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DOZEN`"]
        pub enum DOZENW {
            #[doc = "Module is enabled in Doze mode."]
            _0,
            #[doc = "Module is disabled in Doze mode."]
            _1,
        }
        impl DOZENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DOZENW::_0 => false,
                    DOZENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DOZENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DOZENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DOZENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Module is enabled in Doze mode."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DOZENW::_0)
            }
            #[doc = "Module is disabled in Doze mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DOZENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DBGEN`"]
        pub enum DBGENW {
            #[doc = "Module is disabled in debug mode."]
            _0,
            #[doc = "Module is enabled in debug mode."]
            _1,
        }
        impl DBGENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DBGENW::_0 => false,
                    DBGENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DBGENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DBGENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DBGENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Module is disabled in debug mode."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DBGENW::_0)
            }
            #[doc = "Module is enabled in debug mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DBGENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RTF`"]
        pub enum RTFW {
            #[doc = "No effect."]
            _0,
            #[doc = "Transmit FIFO is reset."]
            _1,
        }
        impl RTFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RTFW::_0 => false,
                    RTFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RTFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RTFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RTFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No effect."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RTFW::_0)
            }
            #[doc = "Transmit FIFO is reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RTFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RRF`"]
        pub enum RRFW {
            #[doc = "No effect."]
            _0,
            #[doc = "Receive FIFO is reset."]
            _1,
        }
        impl RRFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RRFW::_0 => false,
                    RRFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RRFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RRFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RRFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No effect."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RRFW::_0)
            }
            #[doc = "Receive FIFO is reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RRFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Module Enable"]
            #[inline(always)]
            pub fn men(&self) -> MENR {
                MENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Software Reset"]
            #[inline(always)]
            pub fn rst(&self) -> RSTR {
                RSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Doze mode enable"]
            #[inline(always)]
            pub fn dozen(&self) -> DOZENR {
                DOZENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Debug Enable"]
            #[inline(always)]
            pub fn dbgen(&self) -> DBGENR {
                DBGENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Module Enable"]
            #[inline(always)]
            pub fn men(&mut self) -> _MENW {
                _MENW { w: self }
            }
            #[doc = "Bit 1 - Software Reset"]
            #[inline(always)]
            pub fn rst(&mut self) -> _RSTW {
                _RSTW { w: self }
            }
            #[doc = "Bit 2 - Doze mode enable"]
            #[inline(always)]
            pub fn dozen(&mut self) -> _DOZENW {
                _DOZENW { w: self }
            }
            #[doc = "Bit 3 - Debug Enable"]
            #[inline(always)]
            pub fn dbgen(&mut self) -> _DBGENW {
                _DBGENW { w: self }
            }
            #[doc = "Bit 8 - Reset Transmit FIFO"]
            #[inline(always)]
            pub fn rtf(&mut self) -> _RTFW {
                _RTFW { w: self }
            }
            #[doc = "Bit 9 - Reset Receive FIFO"]
            #[inline(always)]
            pub fn rrf(&mut self) -> _RRFW {
                _RRFW { w: self }
            }
        }
    }
    #[doc = "Status Register"]
    pub struct SR {
        register: VolatileCell<u32>,
    }
    #[doc = "Status Register"]
    pub mod sr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TDF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TDFR {
            #[doc = "Transmit data not requested."]
            _0,
            #[doc = "Transmit data is requested."]
            _1,
        }
        impl TDFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TDFR::_0 => false,
                    TDFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TDFR {
                match value {
                    false => TDFR::_0,
                    true => TDFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TDFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TDFR::_1
            }
        }
        #[doc = "Possible values of the field `RDF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RDFR {
            #[doc = "Receive Data is not ready."]
            _0,
            #[doc = "Receive data is ready."]
            _1,
        }
        impl RDFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RDFR::_0 => false,
                    RDFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RDFR {
                match value {
                    false => RDFR::_0,
                    true => RDFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RDFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RDFR::_1
            }
        }
        #[doc = "Possible values of the field `WCF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WCFR {
            #[doc = "Transfer word not completed."]
            _0,
            #[doc = "Transfer word completed."]
            _1,
        }
        impl WCFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WCFR::_0 => false,
                    WCFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WCFR {
                match value {
                    false => WCFR::_0,
                    true => WCFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WCFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WCFR::_1
            }
        }
        #[doc = "Possible values of the field `FCF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FCFR {
            #[doc = "Frame transfer has not completed."]
            _0,
            #[doc = "Frame transfer has completed."]
            _1,
        }
        impl FCFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FCFR::_0 => false,
                    FCFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FCFR {
                match value {
                    false => FCFR::_0,
                    true => FCFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FCFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FCFR::_1
            }
        }
        #[doc = "Possible values of the field `TCF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TCFR {
            #[doc = "All transfers have not completed."]
            _0,
            #[doc = "All transfers have completed."]
            _1,
        }
        impl TCFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TCFR::_0 => false,
                    TCFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TCFR {
                match value {
                    false => TCFR::_0,
                    true => TCFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TCFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TCFR::_1
            }
        }
        #[doc = "Possible values of the field `TEF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TEFR {
            #[doc = "Transmit FIFO underrun has not occurred."]
            _0,
            #[doc = "Transmit FIFO underrun has occurred"]
            _1,
        }
        impl TEFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TEFR::_0 => false,
                    TEFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TEFR {
                match value {
                    false => TEFR::_0,
                    true => TEFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TEFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TEFR::_1
            }
        }
        #[doc = "Possible values of the field `REF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum REFR {
            #[doc = "Receive FIFO has not overflowed."]
            _0,
            #[doc = "Receive FIFO has overflowed."]
            _1,
        }
        impl REFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    REFR::_0 => false,
                    REFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> REFR {
                match value {
                    false => REFR::_0,
                    true => REFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == REFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == REFR::_1
            }
        }
        #[doc = "Possible values of the field `DMF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMFR {
            #[doc = "Have not received matching data."]
            _0,
            #[doc = "Have received matching data."]
            _1,
        }
        impl DMFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMFR::_0 => false,
                    DMFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMFR {
                match value {
                    false => DMFR::_0,
                    true => DMFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMFR::_1
            }
        }
        #[doc = "Possible values of the field `MBF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MBFR {
            #[doc = "LPSPI is idle."]
            _0,
            #[doc = "LPSPI is busy."]
            _1,
        }
        impl MBFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MBFR::_0 => false,
                    MBFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MBFR {
                match value {
                    false => MBFR::_0,
                    true => MBFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MBFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MBFR::_1
            }
        }
        #[doc = "Values that can be written to the field `WCF`"]
        pub enum WCFW {
            #[doc = "Transfer word not completed."]
            _0,
            #[doc = "Transfer word completed."]
            _1,
        }
        impl WCFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WCFW::_0 => false,
                    WCFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WCFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WCFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WCFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Transfer word not completed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WCFW::_0)
            }
            #[doc = "Transfer word completed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WCFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FCF`"]
        pub enum FCFW {
            #[doc = "Frame transfer has not completed."]
            _0,
            #[doc = "Frame transfer has completed."]
            _1,
        }
        impl FCFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FCFW::_0 => false,
                    FCFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FCFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FCFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FCFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Frame transfer has not completed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FCFW::_0)
            }
            #[doc = "Frame transfer has completed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FCFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TCF`"]
        pub enum TCFW {
            #[doc = "All transfers have not completed."]
            _0,
            #[doc = "All transfers have completed."]
            _1,
        }
        impl TCFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TCFW::_0 => false,
                    TCFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TCFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TCFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TCFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "All transfers have not completed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TCFW::_0)
            }
            #[doc = "All transfers have completed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TCFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TEF`"]
        pub enum TEFW {
            #[doc = "Transmit FIFO underrun has not occurred."]
            _0,
            #[doc = "Transmit FIFO underrun has occurred"]
            _1,
        }
        impl TEFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TEFW::_0 => false,
                    TEFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TEFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TEFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TEFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Transmit FIFO underrun has not occurred."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TEFW::_0)
            }
            #[doc = "Transmit FIFO underrun has occurred"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TEFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `REF`"]
        pub enum REFW {
            #[doc = "Receive FIFO has not overflowed."]
            _0,
            #[doc = "Receive FIFO has overflowed."]
            _1,
        }
        impl REFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    REFW::_0 => false,
                    REFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _REFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _REFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: REFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Receive FIFO has not overflowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(REFW::_0)
            }
            #[doc = "Receive FIFO has overflowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(REFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMF`"]
        pub enum DMFW {
            #[doc = "Have not received matching data."]
            _0,
            #[doc = "Have received matching data."]
            _1,
        }
        impl DMFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMFW::_0 => false,
                    DMFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Have not received matching data."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMFW::_0)
            }
            #[doc = "Have received matching data."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Transmit Data Flag"]
            #[inline(always)]
            pub fn tdf(&self) -> TDFR {
                TDFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Receive Data Flag"]
            #[inline(always)]
            pub fn rdf(&self) -> RDFR {
                RDFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Word Complete Flag"]
            #[inline(always)]
            pub fn wcf(&self) -> WCFR {
                WCFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Frame Complete Flag"]
            #[inline(always)]
            pub fn fcf(&self) -> FCFR {
                FCFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Transfer Complete Flag"]
            #[inline(always)]
            pub fn tcf(&self) -> TCFR {
                TCFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 11 - Transmit Error Flag"]
            #[inline(always)]
            pub fn tef(&self) -> TEFR {
                TEFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Receive Error Flag"]
            #[inline(always)]
            pub fn ref_(&self) -> REFR {
                REFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Data Match Flag"]
            #[inline(always)]
            pub fn dmf(&self) -> DMFR {
                DMFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 24 - Module Busy Flag"]
            #[inline(always)]
            pub fn mbf(&self) -> MBFR {
                MBFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 1 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 8 - Word Complete Flag"]
            #[inline(always)]
            pub fn wcf(&mut self) -> _WCFW {
                _WCFW { w: self }
            }
            #[doc = "Bit 9 - Frame Complete Flag"]
            #[inline(always)]
            pub fn fcf(&mut self) -> _FCFW {
                _FCFW { w: self }
            }
            #[doc = "Bit 10 - Transfer Complete Flag"]
            #[inline(always)]
            pub fn tcf(&mut self) -> _TCFW {
                _TCFW { w: self }
            }
            #[doc = "Bit 11 - Transmit Error Flag"]
            #[inline(always)]
            pub fn tef(&mut self) -> _TEFW {
                _TEFW { w: self }
            }
            #[doc = "Bit 12 - Receive Error Flag"]
            #[inline(always)]
            pub fn ref_(&mut self) -> _REFW {
                _REFW { w: self }
            }
            #[doc = "Bit 13 - Data Match Flag"]
            #[inline(always)]
            pub fn dmf(&mut self) -> _DMFW {
                _DMFW { w: self }
            }
        }
    }
    #[doc = "Interrupt Enable Register"]
    pub struct IER {
        register: VolatileCell<u32>,
    }
    #[doc = "Interrupt Enable Register"]
    pub mod ier {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::IER {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TDIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TDIER {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled"]
            _1,
        }
        impl TDIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TDIER::_0 => false,
                    TDIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TDIER {
                match value {
                    false => TDIER::_0,
                    true => TDIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TDIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TDIER::_1
            }
        }
        #[doc = "Possible values of the field `RDIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RDIER {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl RDIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RDIER::_0 => false,
                    RDIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RDIER {
                match value {
                    false => RDIER::_0,
                    true => RDIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RDIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RDIER::_1
            }
        }
        #[doc = "Possible values of the field `WCIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WCIER {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl WCIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WCIER::_0 => false,
                    WCIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WCIER {
                match value {
                    false => WCIER::_0,
                    true => WCIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WCIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WCIER::_1
            }
        }
        #[doc = "Possible values of the field `FCIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FCIER {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl FCIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FCIER::_0 => false,
                    FCIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FCIER {
                match value {
                    false => FCIER::_0,
                    true => FCIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FCIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FCIER::_1
            }
        }
        #[doc = "Possible values of the field `TCIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TCIER {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl TCIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TCIER::_0 => false,
                    TCIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TCIER {
                match value {
                    false => TCIER::_0,
                    true => TCIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TCIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TCIER::_1
            }
        }
        #[doc = "Possible values of the field `TEIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TEIER {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl TEIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TEIER::_0 => false,
                    TEIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TEIER {
                match value {
                    false => TEIER::_0,
                    true => TEIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TEIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TEIER::_1
            }
        }
        #[doc = "Possible values of the field `REIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum REIER {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl REIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    REIER::_0 => false,
                    REIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> REIER {
                match value {
                    false => REIER::_0,
                    true => REIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == REIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == REIER::_1
            }
        }
        #[doc = "Possible values of the field `DMIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMIER {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl DMIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMIER::_0 => false,
                    DMIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMIER {
                match value {
                    false => DMIER::_0,
                    true => DMIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMIER::_1
            }
        }
        #[doc = "Values that can be written to the field `TDIE`"]
        pub enum TDIEW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled"]
            _1,
        }
        impl TDIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TDIEW::_0 => false,
                    TDIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TDIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TDIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TDIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TDIEW::_0)
            }
            #[doc = "Interrupt enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TDIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RDIE`"]
        pub enum RDIEW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl RDIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RDIEW::_0 => false,
                    RDIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RDIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RDIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RDIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RDIEW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RDIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WCIE`"]
        pub enum WCIEW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl WCIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WCIEW::_0 => false,
                    WCIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WCIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WCIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WCIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WCIEW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WCIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FCIE`"]
        pub enum FCIEW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl FCIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FCIEW::_0 => false,
                    FCIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FCIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FCIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FCIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FCIEW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FCIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TCIE`"]
        pub enum TCIEW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl TCIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TCIEW::_0 => false,
                    TCIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TCIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TCIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TCIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TCIEW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TCIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TEIE`"]
        pub enum TEIEW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl TEIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TEIEW::_0 => false,
                    TEIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TEIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TEIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TEIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TEIEW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TEIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `REIE`"]
        pub enum REIEW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl REIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    REIEW::_0 => false,
                    REIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _REIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _REIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: REIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(REIEW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(REIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMIE`"]
        pub enum DMIEW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl DMIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMIEW::_0 => false,
                    DMIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMIEW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Transmit Data Interrupt Enable"]
            #[inline(always)]
            pub fn tdie(&self) -> TDIER {
                TDIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Receive Data Interrupt Enable"]
            #[inline(always)]
            pub fn rdie(&self) -> RDIER {
                RDIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Word Complete Interrupt Enable"]
            #[inline(always)]
            pub fn wcie(&self) -> WCIER {
                WCIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Frame Complete Interrupt Enable"]
            #[inline(always)]
            pub fn fcie(&self) -> FCIER {
                FCIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Transfer Complete Interrupt Enable"]
            #[inline(always)]
            pub fn tcie(&self) -> TCIER {
                TCIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 11 - Transmit Error Interrupt Enable"]
            #[inline(always)]
            pub fn teie(&self) -> TEIER {
                TEIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Receive Error Interrupt Enable"]
            #[inline(always)]
            pub fn reie(&self) -> REIER {
                REIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Data Match Interrupt Enable"]
            #[inline(always)]
            pub fn dmie(&self) -> DMIER {
                DMIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Transmit Data Interrupt Enable"]
            #[inline(always)]
            pub fn tdie(&mut self) -> _TDIEW {
                _TDIEW { w: self }
            }
            #[doc = "Bit 1 - Receive Data Interrupt Enable"]
            #[inline(always)]
            pub fn rdie(&mut self) -> _RDIEW {
                _RDIEW { w: self }
            }
            #[doc = "Bit 8 - Word Complete Interrupt Enable"]
            #[inline(always)]
            pub fn wcie(&mut self) -> _WCIEW {
                _WCIEW { w: self }
            }
            #[doc = "Bit 9 - Frame Complete Interrupt Enable"]
            #[inline(always)]
            pub fn fcie(&mut self) -> _FCIEW {
                _FCIEW { w: self }
            }
            #[doc = "Bit 10 - Transfer Complete Interrupt Enable"]
            #[inline(always)]
            pub fn tcie(&mut self) -> _TCIEW {
                _TCIEW { w: self }
            }
            #[doc = "Bit 11 - Transmit Error Interrupt Enable"]
            #[inline(always)]
            pub fn teie(&mut self) -> _TEIEW {
                _TEIEW { w: self }
            }
            #[doc = "Bit 12 - Receive Error Interrupt Enable"]
            #[inline(always)]
            pub fn reie(&mut self) -> _REIEW {
                _REIEW { w: self }
            }
            #[doc = "Bit 13 - Data Match Interrupt Enable"]
            #[inline(always)]
            pub fn dmie(&mut self) -> _DMIEW {
                _DMIEW { w: self }
            }
        }
    }
    #[doc = "DMA Enable Register"]
    pub struct DER {
        register: VolatileCell<u32>,
    }
    #[doc = "DMA Enable Register"]
    pub mod der {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::DER {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TDDE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TDDER {
            #[doc = "DMA request disabled."]
            _0,
            #[doc = "DMA request enabled"]
            _1,
        }
        impl TDDER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TDDER::_0 => false,
                    TDDER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TDDER {
                match value {
                    false => TDDER::_0,
                    true => TDDER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TDDER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TDDER::_1
            }
        }
        #[doc = "Possible values of the field `RDDE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RDDER {
            #[doc = "DMA request disabled."]
            _0,
            #[doc = "DMA request enabled."]
            _1,
        }
        impl RDDER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RDDER::_0 => false,
                    RDDER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RDDER {
                match value {
                    false => RDDER::_0,
                    true => RDDER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RDDER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RDDER::_1
            }
        }
        #[doc = "Values that can be written to the field `TDDE`"]
        pub enum TDDEW {
            #[doc = "DMA request disabled."]
            _0,
            #[doc = "DMA request enabled"]
            _1,
        }
        impl TDDEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TDDEW::_0 => false,
                    TDDEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TDDEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TDDEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TDDEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA request disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TDDEW::_0)
            }
            #[doc = "DMA request enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TDDEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RDDE`"]
        pub enum RDDEW {
            #[doc = "DMA request disabled."]
            _0,
            #[doc = "DMA request enabled."]
            _1,
        }
        impl RDDEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RDDEW::_0 => false,
                    RDDEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RDDEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RDDEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RDDEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA request disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RDDEW::_0)
            }
            #[doc = "DMA request enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RDDEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Transmit Data DMA Enable"]
            #[inline(always)]
            pub fn tdde(&self) -> TDDER {
                TDDER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Receive Data DMA Enable"]
            #[inline(always)]
            pub fn rdde(&self) -> RDDER {
                RDDER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Transmit Data DMA Enable"]
            #[inline(always)]
            pub fn tdde(&mut self) -> _TDDEW {
                _TDDEW { w: self }
            }
            #[doc = "Bit 1 - Receive Data DMA Enable"]
            #[inline(always)]
            pub fn rdde(&mut self) -> _RDDEW {
                _RDDEW { w: self }
            }
        }
    }
    #[doc = "Configuration Register 0"]
    pub struct CFGR0 {
        register: VolatileCell<u32>,
    }
    #[doc = "Configuration Register 0"]
    pub mod cfgr0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CFGR0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `HREN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HRENR {
            #[doc = "Host request is disabled."]
            _0,
            #[doc = "Host request is enabled."]
            _1,
        }
        impl HRENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HRENR::_0 => false,
                    HRENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HRENR {
                match value {
                    false => HRENR::_0,
                    true => HRENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HRENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HRENR::_1
            }
        }
        #[doc = "Possible values of the field `HRPOL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HRPOLR {
            #[doc = "Active low."]
            _0,
            #[doc = "Active high."]
            _1,
        }
        impl HRPOLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HRPOLR::_0 => false,
                    HRPOLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HRPOLR {
                match value {
                    false => HRPOLR::_0,
                    true => HRPOLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HRPOLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HRPOLR::_1
            }
        }
        #[doc = "Possible values of the field `HRSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HRSELR {
            #[doc = "Host request input is pin LPSPI_HREQ."]
            _0,
            #[doc = "Host request input is input trigger."]
            _1,
        }
        impl HRSELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HRSELR::_0 => false,
                    HRSELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HRSELR {
                match value {
                    false => HRSELR::_0,
                    true => HRSELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HRSELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HRSELR::_1
            }
        }
        #[doc = "Possible values of the field `CIRFIFO`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CIRFIFOR {
            #[doc = "Circular FIFO is disabled."]
            _0,
            #[doc = "Circular FIFO is enabled."]
            _1,
        }
        impl CIRFIFOR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CIRFIFOR::_0 => false,
                    CIRFIFOR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CIRFIFOR {
                match value {
                    false => CIRFIFOR::_0,
                    true => CIRFIFOR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CIRFIFOR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CIRFIFOR::_1
            }
        }
        #[doc = "Possible values of the field `RDMO`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RDMOR {
            #[doc = "Received data is stored in the receive FIFO as normal."]
            _0,
            #[doc = "Received data is discarded unless the DMF is set."]
            _1,
        }
        impl RDMOR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RDMOR::_0 => false,
                    RDMOR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RDMOR {
                match value {
                    false => RDMOR::_0,
                    true => RDMOR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RDMOR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RDMOR::_1
            }
        }
        #[doc = "Values that can be written to the field `HREN`"]
        pub enum HRENW {
            #[doc = "Host request is disabled."]
            _0,
            #[doc = "Host request is enabled."]
            _1,
        }
        impl HRENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HRENW::_0 => false,
                    HRENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HRENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HRENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HRENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Host request is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HRENW::_0)
            }
            #[doc = "Host request is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HRENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `HRPOL`"]
        pub enum HRPOLW {
            #[doc = "Active low."]
            _0,
            #[doc = "Active high."]
            _1,
        }
        impl HRPOLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HRPOLW::_0 => false,
                    HRPOLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HRPOLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HRPOLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HRPOLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Active low."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HRPOLW::_0)
            }
            #[doc = "Active high."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HRPOLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `HRSEL`"]
        pub enum HRSELW {
            #[doc = "Host request input is pin LPSPI_HREQ."]
            _0,
            #[doc = "Host request input is input trigger."]
            _1,
        }
        impl HRSELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HRSELW::_0 => false,
                    HRSELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HRSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HRSELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HRSELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Host request input is pin LPSPI_HREQ."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HRSELW::_0)
            }
            #[doc = "Host request input is input trigger."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HRSELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CIRFIFO`"]
        pub enum CIRFIFOW {
            #[doc = "Circular FIFO is disabled."]
            _0,
            #[doc = "Circular FIFO is enabled."]
            _1,
        }
        impl CIRFIFOW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CIRFIFOW::_0 => false,
                    CIRFIFOW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CIRFIFOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CIRFIFOW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CIRFIFOW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Circular FIFO is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CIRFIFOW::_0)
            }
            #[doc = "Circular FIFO is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CIRFIFOW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RDMO`"]
        pub enum RDMOW {
            #[doc = "Received data is stored in the receive FIFO as normal."]
            _0,
            #[doc = "Received data is discarded unless the DMF is set."]
            _1,
        }
        impl RDMOW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RDMOW::_0 => false,
                    RDMOW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RDMOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RDMOW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RDMOW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Received data is stored in the receive FIFO as normal."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RDMOW::_0)
            }
            #[doc = "Received data is discarded unless the DMF is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RDMOW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Host Request Enable"]
            #[inline(always)]
            pub fn hren(&self) -> HRENR {
                HRENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Host Request Polarity"]
            #[inline(always)]
            pub fn hrpol(&self) -> HRPOLR {
                HRPOLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Host Request Select"]
            #[inline(always)]
            pub fn hrsel(&self) -> HRSELR {
                HRSELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Circular FIFO Enable"]
            #[inline(always)]
            pub fn cirfifo(&self) -> CIRFIFOR {
                CIRFIFOR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Receive Data Match Only"]
            #[inline(always)]
            pub fn rdmo(&self) -> RDMOR {
                RDMOR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Host Request Enable"]
            #[inline(always)]
            pub fn hren(&mut self) -> _HRENW {
                _HRENW { w: self }
            }
            #[doc = "Bit 1 - Host Request Polarity"]
            #[inline(always)]
            pub fn hrpol(&mut self) -> _HRPOLW {
                _HRPOLW { w: self }
            }
            #[doc = "Bit 2 - Host Request Select"]
            #[inline(always)]
            pub fn hrsel(&mut self) -> _HRSELW {
                _HRSELW { w: self }
            }
            #[doc = "Bit 8 - Circular FIFO Enable"]
            #[inline(always)]
            pub fn cirfifo(&mut self) -> _CIRFIFOW {
                _CIRFIFOW { w: self }
            }
            #[doc = "Bit 9 - Receive Data Match Only"]
            #[inline(always)]
            pub fn rdmo(&mut self) -> _RDMOW {
                _RDMOW { w: self }
            }
        }
    }
    #[doc = "Configuration Register 1"]
    pub struct CFGR1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Configuration Register 1"]
    pub mod cfgr1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CFGR1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `MASTER`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MASTERR {
            #[doc = "Slave mode."]
            _0,
            #[doc = "Master mode."]
            _1,
        }
        impl MASTERR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MASTERR::_0 => false,
                    MASTERR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MASTERR {
                match value {
                    false => MASTERR::_0,
                    true => MASTERR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MASTERR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MASTERR::_1
            }
        }
        #[doc = "Possible values of the field `SAMPLE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SAMPLER {
            #[doc = "Input data sampled on SCK edge."]
            _0,
            #[doc = "Input data sampled on delayed SCK edge."]
            _1,
        }
        impl SAMPLER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SAMPLER::_0 => false,
                    SAMPLER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SAMPLER {
                match value {
                    false => SAMPLER::_0,
                    true => SAMPLER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SAMPLER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SAMPLER::_1
            }
        }
        #[doc = "Possible values of the field `AUTOPCS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum AUTOPCSR {
            #[doc = "Automatic PCS generation disabled."]
            _0,
            #[doc = "Automatic PCS generation enabled."]
            _1,
        }
        impl AUTOPCSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    AUTOPCSR::_0 => false,
                    AUTOPCSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> AUTOPCSR {
                match value {
                    false => AUTOPCSR::_0,
                    true => AUTOPCSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == AUTOPCSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == AUTOPCSR::_1
            }
        }
        #[doc = "Possible values of the field `NOSTALL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum NOSTALLR {
            #[doc = "Transfers will stall when transmit FIFO is empty or receive FIFO is full."]
            _0,
            #[doc = "Transfers will not stall, allowing transmit FIFO underrun or receive FIFO overrun to occur."]
            _1,
        }
        impl NOSTALLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    NOSTALLR::_0 => false,
                    NOSTALLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> NOSTALLR {
                match value {
                    false => NOSTALLR::_0,
                    true => NOSTALLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == NOSTALLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == NOSTALLR::_1
            }
        }
        #[doc = "Possible values of the field `PCSPOL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PCSPOLR {
            #[doc = "The PCSx is active low."]
            _0000,
            #[doc = "The PCSx is active high."]
            _0001,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl PCSPOLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PCSPOLR::_0000 => 0,
                    PCSPOLR::_0001 => 1,
                    PCSPOLR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PCSPOLR {
                match value {
                    0 => PCSPOLR::_0000,
                    1 => PCSPOLR::_0001,
                    i => PCSPOLR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == PCSPOLR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == PCSPOLR::_0001
            }
        }
        #[doc = "Possible values of the field `MATCFG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MATCFGR {
            #[doc = "Match is disabled."]
            _000,
            #[doc = "010b - Match is enabled, if 1st data word equals MATCH0 OR MATCH1, i.e., (1st data word = MATCH0 + MATCH1)"]
            _010,
            #[doc = "011b - Match is enabled, if any data word equals MATCH0 OR MATCH1, i.e., (any data word = MATCH0 + MATCH1)"]
            _011,
            #[doc = "100b - Match is enabled, if 1st data word equals MATCH0 AND 2nd data word equals MATCH1, i.e., [(1st data word = MATCH0) * (2nd data word = MATCH1)]"]
            _100,
            #[doc = "101b - Match is enabled, if any data word equals MATCH0 AND the next data word equals MATCH1, i.e., [(any data word = MATCH0) * (next data word = MATCH1)]"]
            _101,
            #[doc = "110b - Match is enabled, if (1st data word AND MATCH1) equals (MATCH0 AND MATCH1), i.e., [(1st data word * MATCH1) = (MATCH0 * MATCH1)]"]
            _110,
            #[doc = "111b - Match is enabled, if (any data word AND MATCH1) equals (MATCH0 AND MATCH1), i.e., [(any data word * MATCH1) = (MATCH0 * MATCH1)]"]
            _111,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl MATCFGR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MATCFGR::_000 => 0,
                    MATCFGR::_010 => 2,
                    MATCFGR::_011 => 3,
                    MATCFGR::_100 => 4,
                    MATCFGR::_101 => 5,
                    MATCFGR::_110 => 6,
                    MATCFGR::_111 => 7,
                    MATCFGR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MATCFGR {
                match value {
                    0 => MATCFGR::_000,
                    2 => MATCFGR::_010,
                    3 => MATCFGR::_011,
                    4 => MATCFGR::_100,
                    5 => MATCFGR::_101,
                    6 => MATCFGR::_110,
                    7 => MATCFGR::_111,
                    i => MATCFGR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MATCFGR::_000
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MATCFGR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MATCFGR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MATCFGR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MATCFGR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MATCFGR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MATCFGR::_111
            }
        }
        #[doc = "Possible values of the field `PINCFG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PINCFGR {
            #[doc = "SIN is used for input data and SOUT for output data."]
            _00,
            #[doc = "SIN is used for both input and output data."]
            _01,
            #[doc = "SOUT is used for both input and output data."]
            _10,
            #[doc = "SOUT is used for input data and SIN for output data."]
            _11,
        }
        impl PINCFGR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PINCFGR::_00 => 0,
                    PINCFGR::_01 => 1,
                    PINCFGR::_10 => 2,
                    PINCFGR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PINCFGR {
                match value {
                    0 => PINCFGR::_00,
                    1 => PINCFGR::_01,
                    2 => PINCFGR::_10,
                    3 => PINCFGR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == PINCFGR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == PINCFGR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == PINCFGR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == PINCFGR::_11
            }
        }
        #[doc = "Possible values of the field `OUTCFG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum OUTCFGR {
            #[doc = "Output data retains last value when chip select is negated."]
            _0,
            #[doc = "Output data is tristated when chip select is negated."]
            _1,
        }
        impl OUTCFGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    OUTCFGR::_0 => false,
                    OUTCFGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> OUTCFGR {
                match value {
                    false => OUTCFGR::_0,
                    true => OUTCFGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == OUTCFGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == OUTCFGR::_1
            }
        }
        #[doc = "Possible values of the field `PCSCFG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PCSCFGR {
            #[doc = "PCS[3:2] are enabled."]
            _0,
            #[doc = "PCS[3:2] are disabled."]
            _1,
        }
        impl PCSCFGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PCSCFGR::_0 => false,
                    PCSCFGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PCSCFGR {
                match value {
                    false => PCSCFGR::_0,
                    true => PCSCFGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PCSCFGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PCSCFGR::_1
            }
        }
        #[doc = "Values that can be written to the field `MASTER`"]
        pub enum MASTERW {
            #[doc = "Slave mode."]
            _0,
            #[doc = "Master mode."]
            _1,
        }
        impl MASTERW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MASTERW::_0 => false,
                    MASTERW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MASTERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MASTERW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MASTERW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Slave mode."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MASTERW::_0)
            }
            #[doc = "Master mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MASTERW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SAMPLE`"]
        pub enum SAMPLEW {
            #[doc = "Input data sampled on SCK edge."]
            _0,
            #[doc = "Input data sampled on delayed SCK edge."]
            _1,
        }
        impl SAMPLEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SAMPLEW::_0 => false,
                    SAMPLEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SAMPLEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SAMPLEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SAMPLEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Input data sampled on SCK edge."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SAMPLEW::_0)
            }
            #[doc = "Input data sampled on delayed SCK edge."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SAMPLEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `AUTOPCS`"]
        pub enum AUTOPCSW {
            #[doc = "Automatic PCS generation disabled."]
            _0,
            #[doc = "Automatic PCS generation enabled."]
            _1,
        }
        impl AUTOPCSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    AUTOPCSW::_0 => false,
                    AUTOPCSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _AUTOPCSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _AUTOPCSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: AUTOPCSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Automatic PCS generation disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(AUTOPCSW::_0)
            }
            #[doc = "Automatic PCS generation enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(AUTOPCSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `NOSTALL`"]
        pub enum NOSTALLW {
            #[doc = "Transfers will stall when transmit FIFO is empty or receive FIFO is full."]
            _0,
            #[doc = "Transfers will not stall, allowing transmit FIFO underrun or receive FIFO overrun to occur."]
            _1,
        }
        impl NOSTALLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    NOSTALLW::_0 => false,
                    NOSTALLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _NOSTALLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NOSTALLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: NOSTALLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Transfers will stall when transmit FIFO is empty or receive FIFO is full."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(NOSTALLW::_0)
            }
            #[doc = "Transfers will not stall, allowing transmit FIFO underrun or receive FIFO overrun to occur."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(NOSTALLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PCSPOL`"]
        pub enum PCSPOLW {
            #[doc = "The PCSx is active low."]
            _0000,
            #[doc = "The PCSx is active high."]
            _0001,
        }
        impl PCSPOLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PCSPOLW::_0000 => 0,
                    PCSPOLW::_0001 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PCSPOLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PCSPOLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PCSPOLW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "The PCSx is active low."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(PCSPOLW::_0000)
            }
            #[doc = "The PCSx is active high."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(PCSPOLW::_0001)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MATCFG`"]
        pub enum MATCFGW {
            #[doc = "Match is disabled."]
            _000,
            #[doc = "010b - Match is enabled, if 1st data word equals MATCH0 OR MATCH1, i.e., (1st data word = MATCH0 + MATCH1)"]
            _010,
            #[doc = "011b - Match is enabled, if any data word equals MATCH0 OR MATCH1, i.e., (any data word = MATCH0 + MATCH1)"]
            _011,
            #[doc = "100b - Match is enabled, if 1st data word equals MATCH0 AND 2nd data word equals MATCH1, i.e., [(1st data word = MATCH0) * (2nd data word = MATCH1)]"]
            _100,
            #[doc = "101b - Match is enabled, if any data word equals MATCH0 AND the next data word equals MATCH1, i.e., [(any data word = MATCH0) * (next data word = MATCH1)]"]
            _101,
            #[doc = "110b - Match is enabled, if (1st data word AND MATCH1) equals (MATCH0 AND MATCH1), i.e., [(1st data word * MATCH1) = (MATCH0 * MATCH1)]"]
            _110,
            #[doc = "111b - Match is enabled, if (any data word AND MATCH1) equals (MATCH0 AND MATCH1), i.e., [(any data word * MATCH1) = (MATCH0 * MATCH1)]"]
            _111,
        }
        impl MATCFGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MATCFGW::_000 => 0,
                    MATCFGW::_010 => 2,
                    MATCFGW::_011 => 3,
                    MATCFGW::_100 => 4,
                    MATCFGW::_101 => 5,
                    MATCFGW::_110 => 6,
                    MATCFGW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MATCFGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MATCFGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MATCFGW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Match is disabled."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MATCFGW::_000)
            }
            #[doc = "010b - Match is enabled, if 1st data word equals MATCH0 OR MATCH1, i.e., (1st data word = MATCH0 + MATCH1)"]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MATCFGW::_010)
            }
            #[doc = "011b - Match is enabled, if any data word equals MATCH0 OR MATCH1, i.e., (any data word = MATCH0 + MATCH1)"]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MATCFGW::_011)
            }
            #[doc = "100b - Match is enabled, if 1st data word equals MATCH0 AND 2nd data word equals MATCH1, i.e., [(1st data word = MATCH0) * (2nd data word = MATCH1)]"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MATCFGW::_100)
            }
            #[doc = "101b - Match is enabled, if any data word equals MATCH0 AND the next data word equals MATCH1, i.e., [(any data word = MATCH0) * (next data word = MATCH1)]"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MATCFGW::_101)
            }
            #[doc = "110b - Match is enabled, if (1st data word AND MATCH1) equals (MATCH0 AND MATCH1), i.e., [(1st data word * MATCH1) = (MATCH0 * MATCH1)]"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MATCFGW::_110)
            }
            #[doc = "111b - Match is enabled, if (any data word AND MATCH1) equals (MATCH0 AND MATCH1), i.e., [(any data word * MATCH1) = (MATCH0 * MATCH1)]"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MATCFGW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PINCFG`"]
        pub enum PINCFGW {
            #[doc = "SIN is used for input data and SOUT for output data."]
            _00,
            #[doc = "SIN is used for both input and output data."]
            _01,
            #[doc = "SOUT is used for both input and output data."]
            _10,
            #[doc = "SOUT is used for input data and SIN for output data."]
            _11,
        }
        impl PINCFGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PINCFGW::_00 => 0,
                    PINCFGW::_01 => 1,
                    PINCFGW::_10 => 2,
                    PINCFGW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PINCFGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PINCFGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PINCFGW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "SIN is used for input data and SOUT for output data."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(PINCFGW::_00)
            }
            #[doc = "SIN is used for both input and output data."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(PINCFGW::_01)
            }
            #[doc = "SOUT is used for both input and output data."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(PINCFGW::_10)
            }
            #[doc = "SOUT is used for input data and SIN for output data."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(PINCFGW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `OUTCFG`"]
        pub enum OUTCFGW {
            #[doc = "Output data retains last value when chip select is negated."]
            _0,
            #[doc = "Output data is tristated when chip select is negated."]
            _1,
        }
        impl OUTCFGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    OUTCFGW::_0 => false,
                    OUTCFGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _OUTCFGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _OUTCFGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: OUTCFGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Output data retains last value when chip select is negated."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(OUTCFGW::_0)
            }
            #[doc = "Output data is tristated when chip select is negated."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(OUTCFGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 26;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PCSCFG`"]
        pub enum PCSCFGW {
            #[doc = "PCS[3:2] are enabled."]
            _0,
            #[doc = "PCS[3:2] are disabled."]
            _1,
        }
        impl PCSCFGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PCSCFGW::_0 => false,
                    PCSCFGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PCSCFGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PCSCFGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PCSCFGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "PCS[3:2] are enabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PCSCFGW::_0)
            }
            #[doc = "PCS[3:2] are disabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PCSCFGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 27;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Master Mode"]
            #[inline(always)]
            pub fn master(&self) -> MASTERR {
                MASTERR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Sample Point"]
            #[inline(always)]
            pub fn sample(&self) -> SAMPLER {
                SAMPLER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Automatic PCS"]
            #[inline(always)]
            pub fn autopcs(&self) -> AUTOPCSR {
                AUTOPCSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - No Stall"]
            #[inline(always)]
            pub fn nostall(&self) -> NOSTALLR {
                NOSTALLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:11 - Peripheral Chip Select Polarity"]
            #[inline(always)]
            pub fn pcspol(&self) -> PCSPOLR {
                PCSPOLR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 16:18 - Match Configuration"]
            #[inline(always)]
            pub fn matcfg(&self) -> MATCFGR {
                MATCFGR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 24:25 - Pin Configuration"]
            #[inline(always)]
            pub fn pincfg(&self) -> PINCFGR {
                PINCFGR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 26 - Output Config"]
            #[inline(always)]
            pub fn outcfg(&self) -> OUTCFGR {
                OUTCFGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 26;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 27 - Peripheral Chip Select Configuration"]
            #[inline(always)]
            pub fn pcscfg(&self) -> PCSCFGR {
                PCSCFGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 27;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Master Mode"]
            #[inline(always)]
            pub fn master(&mut self) -> _MASTERW {
                _MASTERW { w: self }
            }
            #[doc = "Bit 1 - Sample Point"]
            #[inline(always)]
            pub fn sample(&mut self) -> _SAMPLEW {
                _SAMPLEW { w: self }
            }
            #[doc = "Bit 2 - Automatic PCS"]
            #[inline(always)]
            pub fn autopcs(&mut self) -> _AUTOPCSW {
                _AUTOPCSW { w: self }
            }
            #[doc = "Bit 3 - No Stall"]
            #[inline(always)]
            pub fn nostall(&mut self) -> _NOSTALLW {
                _NOSTALLW { w: self }
            }
            #[doc = "Bits 8:11 - Peripheral Chip Select Polarity"]
            #[inline(always)]
            pub fn pcspol(&mut self) -> _PCSPOLW {
                _PCSPOLW { w: self }
            }
            #[doc = "Bits 16:18 - Match Configuration"]
            #[inline(always)]
            pub fn matcfg(&mut self) -> _MATCFGW {
                _MATCFGW { w: self }
            }
            #[doc = "Bits 24:25 - Pin Configuration"]
            #[inline(always)]
            pub fn pincfg(&mut self) -> _PINCFGW {
                _PINCFGW { w: self }
            }
            #[doc = "Bit 26 - Output Config"]
            #[inline(always)]
            pub fn outcfg(&mut self) -> _OUTCFGW {
                _OUTCFGW { w: self }
            }
            #[doc = "Bit 27 - Peripheral Chip Select Configuration"]
            #[inline(always)]
            pub fn pcscfg(&mut self) -> _PCSCFGW {
                _PCSCFGW { w: self }
            }
        }
    }
    #[doc = "Data Match Register 0"]
    pub struct DMR0 {
        register: VolatileCell<u32>,
    }
    #[doc = "Data Match Register 0"]
    pub mod dmr0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::DMR0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MATCH0R {
            bits: u32,
        }
        impl MATCH0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MATCH0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MATCH0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Match 0 Value"]
            #[inline(always)]
            pub fn match0(&self) -> MATCH0R {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MATCH0R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Match 0 Value"]
            #[inline(always)]
            pub fn match0(&mut self) -> _MATCH0W {
                _MATCH0W { w: self }
            }
        }
    }
    #[doc = "Data Match Register 1"]
    pub struct DMR1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Data Match Register 1"]
    pub mod dmr1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::DMR1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MATCH1R {
            bits: u32,
        }
        impl MATCH1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MATCH1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MATCH1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Match 1 Value"]
            #[inline(always)]
            pub fn match1(&self) -> MATCH1R {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                MATCH1R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Match 1 Value"]
            #[inline(always)]
            pub fn match1(&mut self) -> _MATCH1W {
                _MATCH1W { w: self }
            }
        }
    }
    #[doc = "Clock Configuration Register"]
    pub struct CCR {
        register: VolatileCell<u32>,
    }
    #[doc = "Clock Configuration Register"]
    pub mod ccr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CCR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SCKDIVR {
            bits: u8,
        }
        impl SCKDIVR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DBTR {
            bits: u8,
        }
        impl DBTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct PCSSCKR {
            bits: u8,
        }
        impl PCSSCKR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct SCKPCSR {
            bits: u8,
        }
        impl SCKPCSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SCKDIVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SCKDIVW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DBTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DBTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _PCSSCKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PCSSCKW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SCKPCSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SCKPCSW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - SCK Divider"]
            #[inline(always)]
            pub fn sckdiv(&self) -> SCKDIVR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SCKDIVR { bits }
            }
            #[doc = "Bits 8:15 - Delay Between Transfers"]
            #[inline(always)]
            pub fn dbt(&self) -> DBTR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DBTR { bits }
            }
            #[doc = "Bits 16:23 - PCS to SCK Delay"]
            #[inline(always)]
            pub fn pcssck(&self) -> PCSSCKR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                PCSSCKR { bits }
            }
            #[doc = "Bits 24:31 - SCK to PCS Delay"]
            #[inline(always)]
            pub fn sckpcs(&self) -> SCKPCSR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SCKPCSR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - SCK Divider"]
            #[inline(always)]
            pub fn sckdiv(&mut self) -> _SCKDIVW {
                _SCKDIVW { w: self }
            }
            #[doc = "Bits 8:15 - Delay Between Transfers"]
            #[inline(always)]
            pub fn dbt(&mut self) -> _DBTW {
                _DBTW { w: self }
            }
            #[doc = "Bits 16:23 - PCS to SCK Delay"]
            #[inline(always)]
            pub fn pcssck(&mut self) -> _PCSSCKW {
                _PCSSCKW { w: self }
            }
            #[doc = "Bits 24:31 - SCK to PCS Delay"]
            #[inline(always)]
            pub fn sckpcs(&mut self) -> _SCKPCSW {
                _SCKPCSW { w: self }
            }
        }
    }
    #[doc = "FIFO Control Register"]
    pub struct FCR {
        register: VolatileCell<u32>,
    }
    #[doc = "FIFO Control Register"]
    pub mod fcr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FCR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct TXWATERR {
            bits: u8,
        }
        impl TXWATERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct RXWATERR {
            bits: u8,
        }
        impl RXWATERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXWATERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXWATERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXWATERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXWATERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:1 - Transmit FIFO Watermark"]
            #[inline(always)]
            pub fn txwater(&self) -> TXWATERR {
                let bits = {
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TXWATERR { bits }
            }
            #[doc = "Bits 16:17 - Receive FIFO Watermark"]
            #[inline(always)]
            pub fn rxwater(&self) -> RXWATERR {
                let bits = {
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                RXWATERR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:1 - Transmit FIFO Watermark"]
            #[inline(always)]
            pub fn txwater(&mut self) -> _TXWATERW {
                _TXWATERW { w: self }
            }
            #[doc = "Bits 16:17 - Receive FIFO Watermark"]
            #[inline(always)]
            pub fn rxwater(&mut self) -> _RXWATERW {
                _RXWATERW { w: self }
            }
        }
    }
    #[doc = "FIFO Status Register"]
    pub struct FSR {
        register: VolatileCell<u32>,
    }
    #[doc = "FIFO Status Register"]
    pub mod fsr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::FSR {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct TXCOUNTR {
            bits: u8,
        }
        impl TXCOUNTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct RXCOUNTR {
            bits: u8,
        }
        impl RXCOUNTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:2 - Transmit FIFO Count"]
            #[inline(always)]
            pub fn txcount(&self) -> TXCOUNTR {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TXCOUNTR { bits }
            }
            #[doc = "Bits 16:18 - Receive FIFO Count"]
            #[inline(always)]
            pub fn rxcount(&self) -> RXCOUNTR {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                RXCOUNTR { bits }
            }
        }
    }
    #[doc = "Transmit Command Register"]
    pub struct TCR {
        register: VolatileCell<u32>,
    }
    #[doc = "Transmit Command Register"]
    pub mod tcr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct FRAMESZR {
            bits: u16,
        }
        impl FRAMESZR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `WIDTH`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WIDTHR {
            #[doc = "Single bit transfer."]
            _00,
            #[doc = "Two bit transfer."]
            _01,
            #[doc = "Four bit transfer."]
            _10,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl WIDTHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    WIDTHR::_00 => 0,
                    WIDTHR::_01 => 1,
                    WIDTHR::_10 => 2,
                    WIDTHR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> WIDTHR {
                match value {
                    0 => WIDTHR::_00,
                    1 => WIDTHR::_01,
                    2 => WIDTHR::_10,
                    i => WIDTHR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == WIDTHR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == WIDTHR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == WIDTHR::_10
            }
        }
        #[doc = "Possible values of the field `TXMSK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXMSKR {
            #[doc = "Normal transfer."]
            _0,
            #[doc = "Mask transmit data."]
            _1,
        }
        impl TXMSKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXMSKR::_0 => false,
                    TXMSKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXMSKR {
                match value {
                    false => TXMSKR::_0,
                    true => TXMSKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXMSKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXMSKR::_1
            }
        }
        #[doc = "Possible values of the field `RXMSK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXMSKR {
            #[doc = "Normal transfer."]
            _0,
            #[doc = "Receive data is masked."]
            _1,
        }
        impl RXMSKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXMSKR::_0 => false,
                    RXMSKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXMSKR {
                match value {
                    false => RXMSKR::_0,
                    true => RXMSKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXMSKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RXMSKR::_1
            }
        }
        #[doc = "Possible values of the field `CONTC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CONTCR {
            #[doc = "Command word for start of new transfer."]
            _0,
            #[doc = "Command word for continuing transfer."]
            _1,
        }
        impl CONTCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CONTCR::_0 => false,
                    CONTCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CONTCR {
                match value {
                    false => CONTCR::_0,
                    true => CONTCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CONTCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CONTCR::_1
            }
        }
        #[doc = "Possible values of the field `CONT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CONTR {
            #[doc = "Continuous transfer disabled."]
            _0,
            #[doc = "Continuous transfer enabled."]
            _1,
        }
        impl CONTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CONTR::_0 => false,
                    CONTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CONTR {
                match value {
                    false => CONTR::_0,
                    true => CONTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CONTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CONTR::_1
            }
        }
        #[doc = "Possible values of the field `BYSW`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BYSWR {
            #[doc = "Byte swap disabled."]
            _0,
            #[doc = "Byte swap enabled."]
            _1,
        }
        impl BYSWR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BYSWR::_0 => false,
                    BYSWR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BYSWR {
                match value {
                    false => BYSWR::_0,
                    true => BYSWR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BYSWR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BYSWR::_1
            }
        }
        #[doc = "Possible values of the field `LSBF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LSBFR {
            #[doc = "Data is transferred MSB first."]
            _0,
            #[doc = "Data is transferred LSB first."]
            _1,
        }
        impl LSBFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LSBFR::_0 => false,
                    LSBFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LSBFR {
                match value {
                    false => LSBFR::_0,
                    true => LSBFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LSBFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LSBFR::_1
            }
        }
        #[doc = "Possible values of the field `PCS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PCSR {
            #[doc = "Transfer using LPSPI_PCS[0]"]
            _00,
            #[doc = "Transfer using LPSPI_PCS[1]"]
            _01,
            #[doc = "Transfer using LPSPI_PCS[2]"]
            _10,
            #[doc = "Transfer using LPSPI_PCS[3]"]
            _11,
        }
        impl PCSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PCSR::_00 => 0,
                    PCSR::_01 => 1,
                    PCSR::_10 => 2,
                    PCSR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PCSR {
                match value {
                    0 => PCSR::_00,
                    1 => PCSR::_01,
                    2 => PCSR::_10,
                    3 => PCSR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == PCSR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == PCSR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == PCSR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == PCSR::_11
            }
        }
        #[doc = "Possible values of the field `PRESCALE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PRESCALER {
            #[doc = "Divide by 1."]
            _000,
            #[doc = "Divide by 2."]
            _001,
            #[doc = "Divide by 4."]
            _010,
            #[doc = "Divide by 8."]
            _011,
            #[doc = "Divide by 16."]
            _100,
            #[doc = "Divide by 32."]
            _101,
            #[doc = "Divide by 64."]
            _110,
            #[doc = "Divide by 128."]
            _111,
        }
        impl PRESCALER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PRESCALER::_000 => 0,
                    PRESCALER::_001 => 1,
                    PRESCALER::_010 => 2,
                    PRESCALER::_011 => 3,
                    PRESCALER::_100 => 4,
                    PRESCALER::_101 => 5,
                    PRESCALER::_110 => 6,
                    PRESCALER::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PRESCALER {
                match value {
                    0 => PRESCALER::_000,
                    1 => PRESCALER::_001,
                    2 => PRESCALER::_010,
                    3 => PRESCALER::_011,
                    4 => PRESCALER::_100,
                    5 => PRESCALER::_101,
                    6 => PRESCALER::_110,
                    7 => PRESCALER::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == PRESCALER::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == PRESCALER::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == PRESCALER::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == PRESCALER::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == PRESCALER::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == PRESCALER::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == PRESCALER::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == PRESCALER::_111
            }
        }
        #[doc = "Possible values of the field `CPHA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CPHAR {
            #[doc = "Data is captured on the leading edge of SCK and changed on the following edge."]
            _0,
            #[doc = "Data is changed on the leading edge of SCK and captured on the following edge."]
            _1,
        }
        impl CPHAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CPHAR::_0 => false,
                    CPHAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CPHAR {
                match value {
                    false => CPHAR::_0,
                    true => CPHAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CPHAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CPHAR::_1
            }
        }
        #[doc = "Possible values of the field `CPOL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CPOLR {
            #[doc = "The inactive state value of SCK is low."]
            _0,
            #[doc = "The inactive state value of SCK is high."]
            _1,
        }
        impl CPOLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CPOLR::_0 => false,
                    CPOLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CPOLR {
                match value {
                    false => CPOLR::_0,
                    true => CPOLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CPOLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CPOLR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _FRAMESZW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FRAMESZW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 4095;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WIDTH`"]
        pub enum WIDTHW {
            #[doc = "Single bit transfer."]
            _00,
            #[doc = "Two bit transfer."]
            _01,
            #[doc = "Four bit transfer."]
            _10,
        }
        impl WIDTHW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    WIDTHW::_00 => 0,
                    WIDTHW::_01 => 1,
                    WIDTHW::_10 => 2,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WIDTHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WIDTHW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WIDTHW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Single bit transfer."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(WIDTHW::_00)
            }
            #[doc = "Two bit transfer."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(WIDTHW::_01)
            }
            #[doc = "Four bit transfer."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(WIDTHW::_10)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TXMSK`"]
        pub enum TXMSKW {
            #[doc = "Normal transfer."]
            _0,
            #[doc = "Mask transmit data."]
            _1,
        }
        impl TXMSKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TXMSKW::_0 => false,
                    TXMSKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXMSKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXMSKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TXMSKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Normal transfer."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TXMSKW::_0)
            }
            #[doc = "Mask transmit data."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TXMSKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RXMSK`"]
        pub enum RXMSKW {
            #[doc = "Normal transfer."]
            _0,
            #[doc = "Receive data is masked."]
            _1,
        }
        impl RXMSKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RXMSKW::_0 => false,
                    RXMSKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXMSKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXMSKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RXMSKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Normal transfer."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RXMSKW::_0)
            }
            #[doc = "Receive data is masked."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RXMSKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 19;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CONTC`"]
        pub enum CONTCW {
            #[doc = "Command word for start of new transfer."]
            _0,
            #[doc = "Command word for continuing transfer."]
            _1,
        }
        impl CONTCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CONTCW::_0 => false,
                    CONTCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CONTCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CONTCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CONTCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Command word for start of new transfer."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CONTCW::_0)
            }
            #[doc = "Command word for continuing transfer."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CONTCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CONT`"]
        pub enum CONTW {
            #[doc = "Continuous transfer disabled."]
            _0,
            #[doc = "Continuous transfer enabled."]
            _1,
        }
        impl CONTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CONTW::_0 => false,
                    CONTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CONTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CONTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CONTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Continuous transfer disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CONTW::_0)
            }
            #[doc = "Continuous transfer enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CONTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 21;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BYSW`"]
        pub enum BYSWW {
            #[doc = "Byte swap disabled."]
            _0,
            #[doc = "Byte swap enabled."]
            _1,
        }
        impl BYSWW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    BYSWW::_0 => false,
                    BYSWW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BYSWW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BYSWW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BYSWW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Byte swap disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BYSWW::_0)
            }
            #[doc = "Byte swap enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BYSWW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 22;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LSBF`"]
        pub enum LSBFW {
            #[doc = "Data is transferred MSB first."]
            _0,
            #[doc = "Data is transferred LSB first."]
            _1,
        }
        impl LSBFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LSBFW::_0 => false,
                    LSBFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LSBFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LSBFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LSBFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Data is transferred MSB first."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LSBFW::_0)
            }
            #[doc = "Data is transferred LSB first."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LSBFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 23;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PCS`"]
        pub enum PCSW {
            #[doc = "Transfer using LPSPI_PCS[0]"]
            _00,
            #[doc = "Transfer using LPSPI_PCS[1]"]
            _01,
            #[doc = "Transfer using LPSPI_PCS[2]"]
            _10,
            #[doc = "Transfer using LPSPI_PCS[3]"]
            _11,
        }
        impl PCSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PCSW::_00 => 0,
                    PCSW::_01 => 1,
                    PCSW::_10 => 2,
                    PCSW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PCSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PCSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PCSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Transfer using LPSPI_PCS[0]"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(PCSW::_00)
            }
            #[doc = "Transfer using LPSPI_PCS[1]"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(PCSW::_01)
            }
            #[doc = "Transfer using LPSPI_PCS[2]"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(PCSW::_10)
            }
            #[doc = "Transfer using LPSPI_PCS[3]"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(PCSW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PRESCALE`"]
        pub enum PRESCALEW {
            #[doc = "Divide by 1."]
            _000,
            #[doc = "Divide by 2."]
            _001,
            #[doc = "Divide by 4."]
            _010,
            #[doc = "Divide by 8."]
            _011,
            #[doc = "Divide by 16."]
            _100,
            #[doc = "Divide by 32."]
            _101,
            #[doc = "Divide by 64."]
            _110,
            #[doc = "Divide by 128."]
            _111,
        }
        impl PRESCALEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PRESCALEW::_000 => 0,
                    PRESCALEW::_001 => 1,
                    PRESCALEW::_010 => 2,
                    PRESCALEW::_011 => 3,
                    PRESCALEW::_100 => 4,
                    PRESCALEW::_101 => 5,
                    PRESCALEW::_110 => 6,
                    PRESCALEW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PRESCALEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PRESCALEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PRESCALEW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Divide by 1."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(PRESCALEW::_000)
            }
            #[doc = "Divide by 2."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(PRESCALEW::_001)
            }
            #[doc = "Divide by 4."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(PRESCALEW::_010)
            }
            #[doc = "Divide by 8."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(PRESCALEW::_011)
            }
            #[doc = "Divide by 16."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(PRESCALEW::_100)
            }
            #[doc = "Divide by 32."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(PRESCALEW::_101)
            }
            #[doc = "Divide by 64."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(PRESCALEW::_110)
            }
            #[doc = "Divide by 128."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(PRESCALEW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 27;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CPHA`"]
        pub enum CPHAW {
            #[doc = "Data is captured on the leading edge of SCK and changed on the following edge."]
            _0,
            #[doc = "Data is changed on the leading edge of SCK and captured on the following edge."]
            _1,
        }
        impl CPHAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CPHAW::_0 => false,
                    CPHAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CPHAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CPHAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CPHAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Data is captured on the leading edge of SCK and changed on the following edge."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CPHAW::_0)
            }
            #[doc = "Data is changed on the leading edge of SCK and captured on the following edge."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CPHAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CPOL`"]
        pub enum CPOLW {
            #[doc = "The inactive state value of SCK is low."]
            _0,
            #[doc = "The inactive state value of SCK is high."]
            _1,
        }
        impl CPOLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CPOLW::_0 => false,
                    CPOLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CPOLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CPOLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CPOLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The inactive state value of SCK is low."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CPOLW::_0)
            }
            #[doc = "The inactive state value of SCK is high."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CPOLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:11 - Frame Size"]
            #[inline(always)]
            pub fn framesz(&self) -> FRAMESZR {
                let bits = {
                    const MASK: u16 = 4095;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                FRAMESZR { bits }
            }
            #[doc = "Bits 16:17 - Transfer Width"]
            #[inline(always)]
            pub fn width(&self) -> WIDTHR {
                WIDTHR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 18 - Transmit Data Mask"]
            #[inline(always)]
            pub fn txmsk(&self) -> TXMSKR {
                TXMSKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 19 - Receive Data Mask"]
            #[inline(always)]
            pub fn rxmsk(&self) -> RXMSKR {
                RXMSKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 19;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 20 - Continuing Command"]
            #[inline(always)]
            pub fn contc(&self) -> CONTCR {
                CONTCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - Continuous Transfer"]
            #[inline(always)]
            pub fn cont(&self) -> CONTR {
                CONTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 22 - Byte Swap"]
            #[inline(always)]
            pub fn bysw(&self) -> BYSWR {
                BYSWR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 23 - LSB First"]
            #[inline(always)]
            pub fn lsbf(&self) -> LSBFR {
                LSBFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 24:25 - Peripheral Chip Select"]
            #[inline(always)]
            pub fn pcs(&self) -> PCSR {
                PCSR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 27:29 - Prescaler Value"]
            #[inline(always)]
            pub fn prescale(&self) -> PRESCALER {
                PRESCALER::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 27;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 30 - Clock Phase"]
            #[inline(always)]
            pub fn cpha(&self) -> CPHAR {
                CPHAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Clock Polarity"]
            #[inline(always)]
            pub fn cpol(&self) -> CPOLR {
                CPOLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 31 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:11 - Frame Size"]
            #[inline(always)]
            pub fn framesz(&mut self) -> _FRAMESZW {
                _FRAMESZW { w: self }
            }
            #[doc = "Bits 16:17 - Transfer Width"]
            #[inline(always)]
            pub fn width(&mut self) -> _WIDTHW {
                _WIDTHW { w: self }
            }
            #[doc = "Bit 18 - Transmit Data Mask"]
            #[inline(always)]
            pub fn txmsk(&mut self) -> _TXMSKW {
                _TXMSKW { w: self }
            }
            #[doc = "Bit 19 - Receive Data Mask"]
            #[inline(always)]
            pub fn rxmsk(&mut self) -> _RXMSKW {
                _RXMSKW { w: self }
            }
            #[doc = "Bit 20 - Continuing Command"]
            #[inline(always)]
            pub fn contc(&mut self) -> _CONTCW {
                _CONTCW { w: self }
            }
            #[doc = "Bit 21 - Continuous Transfer"]
            #[inline(always)]
            pub fn cont(&mut self) -> _CONTW {
                _CONTW { w: self }
            }
            #[doc = "Bit 22 - Byte Swap"]
            #[inline(always)]
            pub fn bysw(&mut self) -> _BYSWW {
                _BYSWW { w: self }
            }
            #[doc = "Bit 23 - LSB First"]
            #[inline(always)]
            pub fn lsbf(&mut self) -> _LSBFW {
                _LSBFW { w: self }
            }
            #[doc = "Bits 24:25 - Peripheral Chip Select"]
            #[inline(always)]
            pub fn pcs(&mut self) -> _PCSW {
                _PCSW { w: self }
            }
            #[doc = "Bits 27:29 - Prescaler Value"]
            #[inline(always)]
            pub fn prescale(&mut self) -> _PRESCALEW {
                _PRESCALEW { w: self }
            }
            #[doc = "Bit 30 - Clock Phase"]
            #[inline(always)]
            pub fn cpha(&mut self) -> _CPHAW {
                _CPHAW { w: self }
            }
            #[doc = "Bit 31 - Clock Polarity"]
            #[inline(always)]
            pub fn cpol(&mut self) -> _CPOLW {
                _CPOLW { w: self }
            }
        }
    }
    #[doc = "Transmit Data Register"]
    pub struct TDR {
        register: VolatileCell<u32>,
    }
    #[doc = "Transmit Data Register"]
    pub mod tdr {
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TDR {
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATAW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Transmit Data"]
            #[inline(always)]
            pub fn data(&mut self) -> _DATAW {
                _DATAW { w: self }
            }
        }
    }
    #[doc = "Receive Status Register"]
    pub struct RSR {
        register: VolatileCell<u32>,
    }
    #[doc = "Receive Status Register"]
    pub mod rsr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::RSR {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = "Possible values of the field `SOF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SOFR {
            #[doc = "Subsequent data word received after LPSPI_PCS assertion."]
            _0,
            #[doc = "First data word received after LPSPI_PCS assertion."]
            _1,
        }
        impl SOFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SOFR::_0 => false,
                    SOFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SOFR {
                match value {
                    false => SOFR::_0,
                    true => SOFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SOFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SOFR::_1
            }
        }
        #[doc = "Possible values of the field `RXEMPTY`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXEMPTYR {
            #[doc = "RX FIFO is not empty."]
            _0,
            #[doc = "RX FIFO is empty."]
            _1,
        }
        impl RXEMPTYR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXEMPTYR::_0 => false,
                    RXEMPTYR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXEMPTYR {
                match value {
                    false => RXEMPTYR::_0,
                    true => RXEMPTYR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXEMPTYR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RXEMPTYR::_1
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Start Of Frame"]
            #[inline(always)]
            pub fn sof(&self) -> SOFR {
                SOFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - RX FIFO Empty"]
            #[inline(always)]
            pub fn rxempty(&self) -> RXEMPTYR {
                RXEMPTYR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
    }
    #[doc = "Receive Data Register"]
    pub struct RDR {
        register: VolatileCell<u32>,
    }
    #[doc = "Receive Data Register"]
    pub mod rdr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::RDR {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATAR {
            bits: u32,
        }
        impl DATAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Receive Data"]
            #[inline(always)]
            pub fn data(&self) -> DATAR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                DATAR { bits }
            }
        }
    }
}
#[doc = "The LPSPI Memory Map/Register Definition can be found here."]
pub struct LPSPI2 {
    register_block: lpspi2::RegisterBlock,
}
impl Deref for LPSPI2 {
    type Target = lpspi2::RegisterBlock;
    fn deref(&self) -> &lpspi2::RegisterBlock {
        &self.register_block
    }
}
#[doc = "Programmable Delay Block"]
pub const PDB0: Peripheral<PDB0> = unsafe { Peripheral::new(1073963008) };
#[doc = "Programmable Delay Block"]
pub mod pdb0 {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - Status and Control register"]
        pub sc: SC,
        #[doc = "0x04 - Modulus register"]
        pub mod_: MOD,
        #[doc = "0x08 - Counter register"]
        pub cnt: CNT,
        #[doc = "0x0c - Interrupt Delay register"]
        pub idly: IDLY,
        #[doc = "0x10 - Channel n Control register 1"]
        pub ch0c1: CHC1,
        #[doc = "0x14 - Channel n Status register"]
        pub ch0s: CHS,
        #[doc = "0x18 - Channel n Delay 0 register"]
        pub ch0dly0: CHDLY0,
        #[doc = "0x1c - Channel n Delay 1 register"]
        pub ch0dly1: CHDLY1,
        #[doc = "0x20 - Channel n Delay 2 register"]
        pub ch0dly2: CHDLY2,
        #[doc = "0x24 - Channel n Delay 3 register"]
        pub ch0dly3: CHDLY3,
        #[doc = "0x28 - Channel n Delay 4 register"]
        pub ch0dly4: CHDLY4,
        #[doc = "0x2c - Channel n Delay 5 register"]
        pub ch0dly5: CHDLY5,
        #[doc = "0x30 - Channel n Delay 6 register"]
        pub ch0dly6: CHDLY6,
        #[doc = "0x34 - Channel n Delay 7 register"]
        pub ch0dly7: CHDLY7,
        #[doc = "0x38 - Channel n Control register 1"]
        pub ch1c1: CHC1,
        #[doc = "0x3c - Channel n Status register"]
        pub ch1s: CHS,
        #[doc = "0x40 - Channel n Delay 0 register"]
        pub ch1dly0: CHDLY0,
        #[doc = "0x44 - Channel n Delay 1 register"]
        pub ch1dly1: CHDLY1,
        #[doc = "0x48 - Channel n Delay 2 register"]
        pub ch1dly2: CHDLY2,
        #[doc = "0x4c - Channel n Delay 3 register"]
        pub ch1dly3: CHDLY3,
        #[doc = "0x50 - Channel n Delay 4 register"]
        pub ch1dly4: CHDLY4,
        #[doc = "0x54 - Channel n Delay 5 register"]
        pub ch1dly5: CHDLY5,
        #[doc = "0x58 - Channel n Delay 6 register"]
        pub ch1dly6: CHDLY6,
        #[doc = "0x5c - Channel n Delay 7 register"]
        pub ch1dly7: CHDLY7,
        _reserved0: [u8; 304usize],
        #[doc = "0x190 - Pulse-Out n Enable register"]
        pub poen: POEN,
        #[doc = "0x194 - Pulse-Out n Delay register"]
        pub podly: PODLY,
    }
    #[doc = "Status and Control register"]
    pub struct SC {
        register: VolatileCell<u32>,
    }
    #[doc = "Status and Control register"]
    pub mod sc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct LDOKR {
            bits: bool,
        }
        impl LDOKR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `CONT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CONTR {
            #[doc = "PDB operation in One-Shot mode"]
            _0,
            #[doc = "PDB operation in Continuous mode"]
            _1,
        }
        impl CONTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CONTR::_0 => false,
                    CONTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CONTR {
                match value {
                    false => CONTR::_0,
                    true => CONTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CONTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CONTR::_1
            }
        }
        #[doc = "Possible values of the field `MULT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MULTR {
            #[doc = "Multiplication factor is 1."]
            _00,
            #[doc = "Multiplication factor is 10."]
            _01,
            #[doc = "Multiplication factor is 20."]
            _10,
            #[doc = "Multiplication factor is 40."]
            _11,
        }
        impl MULTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MULTR::_00 => 0,
                    MULTR::_01 => 1,
                    MULTR::_10 => 2,
                    MULTR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MULTR {
                match value {
                    0 => MULTR::_00,
                    1 => MULTR::_01,
                    2 => MULTR::_10,
                    3 => MULTR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == MULTR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == MULTR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == MULTR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == MULTR::_11
            }
        }
        #[doc = "Possible values of the field `PDBIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PDBIER {
            #[doc = "PDB interrupt disabled."]
            _0,
            #[doc = "PDB interrupt enabled."]
            _1,
        }
        impl PDBIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PDBIER::_0 => false,
                    PDBIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PDBIER {
                match value {
                    false => PDBIER::_0,
                    true => PDBIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PDBIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PDBIER::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct PDBIFR {
            bits: bool,
        }
        impl PDBIFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `PDBEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PDBENR {
            #[doc = "PDB disabled. Counter is off."]
            _0,
            #[doc = "PDB enabled."]
            _1,
        }
        impl PDBENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PDBENR::_0 => false,
                    PDBENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PDBENR {
                match value {
                    false => PDBENR::_0,
                    true => PDBENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PDBENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PDBENR::_1
            }
        }
        #[doc = "Possible values of the field `TRGSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRGSELR {
            #[doc = "Trigger-In 0 is selected."]
            _0000,
            #[doc = "Trigger-In 1 is selected."]
            _0001,
            #[doc = "Trigger-In 2 is selected."]
            _0010,
            #[doc = "Trigger-In 3 is selected."]
            _0011,
            #[doc = "Trigger-In 4 is selected."]
            _0100,
            #[doc = "Trigger-In 5 is selected."]
            _0101,
            #[doc = "Trigger-In 6 is selected."]
            _0110,
            #[doc = "Trigger-In 7 is selected."]
            _0111,
            #[doc = "Trigger-In 8 is selected."]
            _1000,
            #[doc = "Trigger-In 9 is selected."]
            _1001,
            #[doc = "Trigger-In 10 is selected."]
            _1010,
            #[doc = "Trigger-In 11 is selected."]
            _1011,
            #[doc = "Trigger-In 12 is selected."]
            _1100,
            #[doc = "Trigger-In 13 is selected."]
            _1101,
            #[doc = "Trigger-In 14 is selected."]
            _1110,
            #[doc = "Software trigger is selected."]
            _1111,
        }
        impl TRGSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TRGSELR::_0000 => 0,
                    TRGSELR::_0001 => 1,
                    TRGSELR::_0010 => 2,
                    TRGSELR::_0011 => 3,
                    TRGSELR::_0100 => 4,
                    TRGSELR::_0101 => 5,
                    TRGSELR::_0110 => 6,
                    TRGSELR::_0111 => 7,
                    TRGSELR::_1000 => 8,
                    TRGSELR::_1001 => 9,
                    TRGSELR::_1010 => 10,
                    TRGSELR::_1011 => 11,
                    TRGSELR::_1100 => 12,
                    TRGSELR::_1101 => 13,
                    TRGSELR::_1110 => 14,
                    TRGSELR::_1111 => 15,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TRGSELR {
                match value {
                    0 => TRGSELR::_0000,
                    1 => TRGSELR::_0001,
                    2 => TRGSELR::_0010,
                    3 => TRGSELR::_0011,
                    4 => TRGSELR::_0100,
                    5 => TRGSELR::_0101,
                    6 => TRGSELR::_0110,
                    7 => TRGSELR::_0111,
                    8 => TRGSELR::_1000,
                    9 => TRGSELR::_1001,
                    10 => TRGSELR::_1010,
                    11 => TRGSELR::_1011,
                    12 => TRGSELR::_1100,
                    13 => TRGSELR::_1101,
                    14 => TRGSELR::_1110,
                    15 => TRGSELR::_1111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == TRGSELR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == TRGSELR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == TRGSELR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == TRGSELR::_0011
            }
            #[doc = "Checks if the value of the field is `_0100`"]
            #[inline(always)]
            pub fn is_0100(&self) -> bool {
                *self == TRGSELR::_0100
            }
            #[doc = "Checks if the value of the field is `_0101`"]
            #[inline(always)]
            pub fn is_0101(&self) -> bool {
                *self == TRGSELR::_0101
            }
            #[doc = "Checks if the value of the field is `_0110`"]
            #[inline(always)]
            pub fn is_0110(&self) -> bool {
                *self == TRGSELR::_0110
            }
            #[doc = "Checks if the value of the field is `_0111`"]
            #[inline(always)]
            pub fn is_0111(&self) -> bool {
                *self == TRGSELR::_0111
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == TRGSELR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == TRGSELR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == TRGSELR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == TRGSELR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == TRGSELR::_1100
            }
            #[doc = "Checks if the value of the field is `_1101`"]
            #[inline(always)]
            pub fn is_1101(&self) -> bool {
                *self == TRGSELR::_1101
            }
            #[doc = "Checks if the value of the field is `_1110`"]
            #[inline(always)]
            pub fn is_1110(&self) -> bool {
                *self == TRGSELR::_1110
            }
            #[doc = "Checks if the value of the field is `_1111`"]
            #[inline(always)]
            pub fn is_1111(&self) -> bool {
                *self == TRGSELR::_1111
            }
        }
        #[doc = "Possible values of the field `PRESCALER`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PRESCALERR {
            #[doc = "Counting uses the peripheral clock divided by MULT (the multiplication factor)."]
            _000,
            #[doc = "Counting uses the peripheral clock divided by 2 x MULT (the multiplication factor)."]
            _001,
            #[doc = "Counting uses the peripheral clock divided by 4 x MULT (the multiplication factor)."]
            _010,
            #[doc = "Counting uses the peripheral clock divided by 8 x MULT (the multiplication factor)."]
            _011,
            #[doc = "Counting uses the peripheral clock divided by 16 x MULT (the multiplication factor)."]
            _100,
            #[doc = "Counting uses the peripheral clock divided by 32 x MULT (the multiplication factor)."]
            _101,
            #[doc = "Counting uses the peripheral clock divided by 64 x MULT (the multiplication factor)."]
            _110,
            #[doc = "Counting uses the peripheral clock divided by 128 x MULT (the multiplication factor)."]
            _111,
        }
        impl PRESCALERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PRESCALERR::_000 => 0,
                    PRESCALERR::_001 => 1,
                    PRESCALERR::_010 => 2,
                    PRESCALERR::_011 => 3,
                    PRESCALERR::_100 => 4,
                    PRESCALERR::_101 => 5,
                    PRESCALERR::_110 => 6,
                    PRESCALERR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PRESCALERR {
                match value {
                    0 => PRESCALERR::_000,
                    1 => PRESCALERR::_001,
                    2 => PRESCALERR::_010,
                    3 => PRESCALERR::_011,
                    4 => PRESCALERR::_100,
                    5 => PRESCALERR::_101,
                    6 => PRESCALERR::_110,
                    7 => PRESCALERR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == PRESCALERR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == PRESCALERR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == PRESCALERR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == PRESCALERR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == PRESCALERR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == PRESCALERR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == PRESCALERR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == PRESCALERR::_111
            }
        }
        #[doc = "Possible values of the field `DMAEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMAENR {
            #[doc = "DMA disabled."]
            _0,
            #[doc = "DMA enabled."]
            _1,
        }
        impl DMAENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMAENR::_0 => false,
                    DMAENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMAENR {
                match value {
                    false => DMAENR::_0,
                    true => DMAENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMAENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMAENR::_1
            }
        }
        #[doc = "Possible values of the field `PDBEIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PDBEIER {
            #[doc = "PDB sequence error interrupt disabled."]
            _0,
            #[doc = "PDB sequence error interrupt enabled."]
            _1,
        }
        impl PDBEIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PDBEIER::_0 => false,
                    PDBEIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PDBEIER {
                match value {
                    false => PDBEIER::_0,
                    true => PDBEIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PDBEIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PDBEIER::_1
            }
        }
        #[doc = "Possible values of the field `LDMOD`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LDMODR {
            #[doc = "The internal registers are loaded with the values from their buffers, immediately after 1 is written to LDOK."]
            _00,
            #[doc = "The internal registers are loaded with the values from their buffers when the PDB counter (CNT) = MOD + 1 CNT delay elapsed, after 1 is written to LDOK."]
            _01,
            #[doc = "The internal registers are loaded with the values from their buffers when a trigger input event is detected, after 1 is written to LDOK."]
            _10,
            #[doc = "The internal registers are loaded with the values from their buffers when either the PDB counter (CNT) = MOD + 1 CNT delay elapsed, or a trigger input event is detected, after 1 is written to LDOK."]
            _11,
        }
        impl LDMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    LDMODR::_00 => 0,
                    LDMODR::_01 => 1,
                    LDMODR::_10 => 2,
                    LDMODR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> LDMODR {
                match value {
                    0 => LDMODR::_00,
                    1 => LDMODR::_01,
                    2 => LDMODR::_10,
                    3 => LDMODR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == LDMODR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == LDMODR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == LDMODR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == LDMODR::_11
            }
        }
        #[doc = r" Proxy"]
        pub struct _LDOKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LDOKW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CONT`"]
        pub enum CONTW {
            #[doc = "PDB operation in One-Shot mode"]
            _0,
            #[doc = "PDB operation in Continuous mode"]
            _1,
        }
        impl CONTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CONTW::_0 => false,
                    CONTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CONTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CONTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CONTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "PDB operation in One-Shot mode"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CONTW::_0)
            }
            #[doc = "PDB operation in Continuous mode"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CONTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MULT`"]
        pub enum MULTW {
            #[doc = "Multiplication factor is 1."]
            _00,
            #[doc = "Multiplication factor is 10."]
            _01,
            #[doc = "Multiplication factor is 20."]
            _10,
            #[doc = "Multiplication factor is 40."]
            _11,
        }
        impl MULTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MULTW::_00 => 0,
                    MULTW::_01 => 1,
                    MULTW::_10 => 2,
                    MULTW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MULTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MULTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MULTW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Multiplication factor is 1."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(MULTW::_00)
            }
            #[doc = "Multiplication factor is 10."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(MULTW::_01)
            }
            #[doc = "Multiplication factor is 20."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(MULTW::_10)
            }
            #[doc = "Multiplication factor is 40."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(MULTW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PDBIE`"]
        pub enum PDBIEW {
            #[doc = "PDB interrupt disabled."]
            _0,
            #[doc = "PDB interrupt enabled."]
            _1,
        }
        impl PDBIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PDBIEW::_0 => false,
                    PDBIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PDBIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PDBIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PDBIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "PDB interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PDBIEW::_0)
            }
            #[doc = "PDB interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PDBIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _PDBIFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PDBIFW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PDBEN`"]
        pub enum PDBENW {
            #[doc = "PDB disabled. Counter is off."]
            _0,
            #[doc = "PDB enabled."]
            _1,
        }
        impl PDBENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PDBENW::_0 => false,
                    PDBENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PDBENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PDBENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PDBENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "PDB disabled. Counter is off."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PDBENW::_0)
            }
            #[doc = "PDB enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PDBENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRGSEL`"]
        pub enum TRGSELW {
            #[doc = "Trigger-In 0 is selected."]
            _0000,
            #[doc = "Trigger-In 1 is selected."]
            _0001,
            #[doc = "Trigger-In 2 is selected."]
            _0010,
            #[doc = "Trigger-In 3 is selected."]
            _0011,
            #[doc = "Trigger-In 4 is selected."]
            _0100,
            #[doc = "Trigger-In 5 is selected."]
            _0101,
            #[doc = "Trigger-In 6 is selected."]
            _0110,
            #[doc = "Trigger-In 7 is selected."]
            _0111,
            #[doc = "Trigger-In 8 is selected."]
            _1000,
            #[doc = "Trigger-In 9 is selected."]
            _1001,
            #[doc = "Trigger-In 10 is selected."]
            _1010,
            #[doc = "Trigger-In 11 is selected."]
            _1011,
            #[doc = "Trigger-In 12 is selected."]
            _1100,
            #[doc = "Trigger-In 13 is selected."]
            _1101,
            #[doc = "Trigger-In 14 is selected."]
            _1110,
            #[doc = "Software trigger is selected."]
            _1111,
        }
        impl TRGSELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TRGSELW::_0000 => 0,
                    TRGSELW::_0001 => 1,
                    TRGSELW::_0010 => 2,
                    TRGSELW::_0011 => 3,
                    TRGSELW::_0100 => 4,
                    TRGSELW::_0101 => 5,
                    TRGSELW::_0110 => 6,
                    TRGSELW::_0111 => 7,
                    TRGSELW::_1000 => 8,
                    TRGSELW::_1001 => 9,
                    TRGSELW::_1010 => 10,
                    TRGSELW::_1011 => 11,
                    TRGSELW::_1100 => 12,
                    TRGSELW::_1101 => 13,
                    TRGSELW::_1110 => 14,
                    TRGSELW::_1111 => 15,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRGSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRGSELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRGSELW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Trigger-In 0 is selected."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(TRGSELW::_0000)
            }
            #[doc = "Trigger-In 1 is selected."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(TRGSELW::_0001)
            }
            #[doc = "Trigger-In 2 is selected."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(TRGSELW::_0010)
            }
            #[doc = "Trigger-In 3 is selected."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(TRGSELW::_0011)
            }
            #[doc = "Trigger-In 4 is selected."]
            #[inline(always)]
            pub fn _0100(self) -> &'a mut W {
                self.variant(TRGSELW::_0100)
            }
            #[doc = "Trigger-In 5 is selected."]
            #[inline(always)]
            pub fn _0101(self) -> &'a mut W {
                self.variant(TRGSELW::_0101)
            }
            #[doc = "Trigger-In 6 is selected."]
            #[inline(always)]
            pub fn _0110(self) -> &'a mut W {
                self.variant(TRGSELW::_0110)
            }
            #[doc = "Trigger-In 7 is selected."]
            #[inline(always)]
            pub fn _0111(self) -> &'a mut W {
                self.variant(TRGSELW::_0111)
            }
            #[doc = "Trigger-In 8 is selected."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(TRGSELW::_1000)
            }
            #[doc = "Trigger-In 9 is selected."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(TRGSELW::_1001)
            }
            #[doc = "Trigger-In 10 is selected."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(TRGSELW::_1010)
            }
            #[doc = "Trigger-In 11 is selected."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(TRGSELW::_1011)
            }
            #[doc = "Trigger-In 12 is selected."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(TRGSELW::_1100)
            }
            #[doc = "Trigger-In 13 is selected."]
            #[inline(always)]
            pub fn _1101(self) -> &'a mut W {
                self.variant(TRGSELW::_1101)
            }
            #[doc = "Trigger-In 14 is selected."]
            #[inline(always)]
            pub fn _1110(self) -> &'a mut W {
                self.variant(TRGSELW::_1110)
            }
            #[doc = "Software trigger is selected."]
            #[inline(always)]
            pub fn _1111(self) -> &'a mut W {
                self.variant(TRGSELW::_1111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PRESCALER`"]
        pub enum PRESCALERW {
            #[doc = "Counting uses the peripheral clock divided by MULT (the multiplication factor)."]
            _000,
            #[doc = "Counting uses the peripheral clock divided by 2 x MULT (the multiplication factor)."]
            _001,
            #[doc = "Counting uses the peripheral clock divided by 4 x MULT (the multiplication factor)."]
            _010,
            #[doc = "Counting uses the peripheral clock divided by 8 x MULT (the multiplication factor)."]
            _011,
            #[doc = "Counting uses the peripheral clock divided by 16 x MULT (the multiplication factor)."]
            _100,
            #[doc = "Counting uses the peripheral clock divided by 32 x MULT (the multiplication factor)."]
            _101,
            #[doc = "Counting uses the peripheral clock divided by 64 x MULT (the multiplication factor)."]
            _110,
            #[doc = "Counting uses the peripheral clock divided by 128 x MULT (the multiplication factor)."]
            _111,
        }
        impl PRESCALERW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PRESCALERW::_000 => 0,
                    PRESCALERW::_001 => 1,
                    PRESCALERW::_010 => 2,
                    PRESCALERW::_011 => 3,
                    PRESCALERW::_100 => 4,
                    PRESCALERW::_101 => 5,
                    PRESCALERW::_110 => 6,
                    PRESCALERW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PRESCALERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PRESCALERW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PRESCALERW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Counting uses the peripheral clock divided by MULT (the multiplication factor)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(PRESCALERW::_000)
            }
            #[doc = "Counting uses the peripheral clock divided by 2 x MULT (the multiplication factor)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(PRESCALERW::_001)
            }
            #[doc = "Counting uses the peripheral clock divided by 4 x MULT (the multiplication factor)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(PRESCALERW::_010)
            }
            #[doc = "Counting uses the peripheral clock divided by 8 x MULT (the multiplication factor)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(PRESCALERW::_011)
            }
            #[doc = "Counting uses the peripheral clock divided by 16 x MULT (the multiplication factor)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(PRESCALERW::_100)
            }
            #[doc = "Counting uses the peripheral clock divided by 32 x MULT (the multiplication factor)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(PRESCALERW::_101)
            }
            #[doc = "Counting uses the peripheral clock divided by 64 x MULT (the multiplication factor)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(PRESCALERW::_110)
            }
            #[doc = "Counting uses the peripheral clock divided by 128 x MULT (the multiplication factor)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(PRESCALERW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMAEN`"]
        pub enum DMAENW {
            #[doc = "DMA disabled."]
            _0,
            #[doc = "DMA enabled."]
            _1,
        }
        impl DMAENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMAENW::_0 => false,
                    DMAENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMAENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMAENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMAENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMAENW::_0)
            }
            #[doc = "DMA enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMAENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SWTRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SWTRIGW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PDBEIE`"]
        pub enum PDBEIEW {
            #[doc = "PDB sequence error interrupt disabled."]
            _0,
            #[doc = "PDB sequence error interrupt enabled."]
            _1,
        }
        impl PDBEIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PDBEIEW::_0 => false,
                    PDBEIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PDBEIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PDBEIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PDBEIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "PDB sequence error interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PDBEIEW::_0)
            }
            #[doc = "PDB sequence error interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PDBEIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LDMOD`"]
        pub enum LDMODW {
            #[doc = "The internal registers are loaded with the values from their buffers, immediately after 1 is written to LDOK."]
            _00,
            #[doc = "The internal registers are loaded with the values from their buffers when the PDB counter (CNT) = MOD + 1 CNT delay elapsed, after 1 is written to LDOK."]
            _01,
            #[doc = "The internal registers are loaded with the values from their buffers when a trigger input event is detected, after 1 is written to LDOK."]
            _10,
            #[doc = "The internal registers are loaded with the values from their buffers when either the PDB counter (CNT) = MOD + 1 CNT delay elapsed, or a trigger input event is detected, after 1 is written to LDOK."]
            _11,
        }
        impl LDMODW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    LDMODW::_00 => 0,
                    LDMODW::_01 => 1,
                    LDMODW::_10 => 2,
                    LDMODW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LDMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LDMODW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LDMODW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "The internal registers are loaded with the values from their buffers, immediately after 1 is written to LDOK."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(LDMODW::_00)
            }
            #[doc = "The internal registers are loaded with the values from their buffers when the PDB counter (CNT) = MOD + 1 CNT delay elapsed, after 1 is written to LDOK."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(LDMODW::_01)
            }
            #[doc = "The internal registers are loaded with the values from their buffers when a trigger input event is detected, after 1 is written to LDOK."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(LDMODW::_10)
            }
            #[doc = "The internal registers are loaded with the values from their buffers when either the PDB counter (CNT) = MOD + 1 CNT delay elapsed, or a trigger input event is detected, after 1 is written to LDOK."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(LDMODW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Load OK"]
            #[inline(always)]
            pub fn ldok(&self) -> LDOKR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                LDOKR { bits }
            }
            #[doc = "Bit 1 - Continuous Mode Enable"]
            #[inline(always)]
            pub fn cont(&self) -> CONTR {
                CONTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 2:3 - Multiplication Factor Select for Prescaler"]
            #[inline(always)]
            pub fn mult(&self) -> MULTR {
                MULTR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 5 - PDB Interrupt Enable"]
            #[inline(always)]
            pub fn pdbie(&self) -> PDBIER {
                PDBIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - PDB Interrupt Flag"]
            #[inline(always)]
            pub fn pdbif(&self) -> PDBIFR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                PDBIFR { bits }
            }
            #[doc = "Bit 7 - PDB Enable"]
            #[inline(always)]
            pub fn pdben(&self) -> PDBENR {
                PDBENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:11 - Trigger Input Source Select"]
            #[inline(always)]
            pub fn trgsel(&self) -> TRGSELR {
                TRGSELR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 12:14 - Prescaler Divider Select"]
            #[inline(always)]
            pub fn prescaler(&self) -> PRESCALERR {
                PRESCALERR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - DMA Enable"]
            #[inline(always)]
            pub fn dmaen(&self) -> DMAENR {
                DMAENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - PDB Sequence Error Interrupt Enable"]
            #[inline(always)]
            pub fn pdbeie(&self) -> PDBEIER {
                PDBEIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 18:19 - Load Mode Select"]
            #[inline(always)]
            pub fn ldmod(&self) -> LDMODR {
                LDMODR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Load OK"]
            #[inline(always)]
            pub fn ldok(&mut self) -> _LDOKW {
                _LDOKW { w: self }
            }
            #[doc = "Bit 1 - Continuous Mode Enable"]
            #[inline(always)]
            pub fn cont(&mut self) -> _CONTW {
                _CONTW { w: self }
            }
            #[doc = "Bits 2:3 - Multiplication Factor Select for Prescaler"]
            #[inline(always)]
            pub fn mult(&mut self) -> _MULTW {
                _MULTW { w: self }
            }
            #[doc = "Bit 5 - PDB Interrupt Enable"]
            #[inline(always)]
            pub fn pdbie(&mut self) -> _PDBIEW {
                _PDBIEW { w: self }
            }
            #[doc = "Bit 6 - PDB Interrupt Flag"]
            #[inline(always)]
            pub fn pdbif(&mut self) -> _PDBIFW {
                _PDBIFW { w: self }
            }
            #[doc = "Bit 7 - PDB Enable"]
            #[inline(always)]
            pub fn pdben(&mut self) -> _PDBENW {
                _PDBENW { w: self }
            }
            #[doc = "Bits 8:11 - Trigger Input Source Select"]
            #[inline(always)]
            pub fn trgsel(&mut self) -> _TRGSELW {
                _TRGSELW { w: self }
            }
            #[doc = "Bits 12:14 - Prescaler Divider Select"]
            #[inline(always)]
            pub fn prescaler(&mut self) -> _PRESCALERW {
                _PRESCALERW { w: self }
            }
            #[doc = "Bit 15 - DMA Enable"]
            #[inline(always)]
            pub fn dmaen(&mut self) -> _DMAENW {
                _DMAENW { w: self }
            }
            #[doc = "Bit 16 - Software Trigger"]
            #[inline(always)]
            pub fn swtrig(&mut self) -> _SWTRIGW {
                _SWTRIGW { w: self }
            }
            #[doc = "Bit 17 - PDB Sequence Error Interrupt Enable"]
            #[inline(always)]
            pub fn pdbeie(&mut self) -> _PDBEIEW {
                _PDBEIEW { w: self }
            }
            #[doc = "Bits 18:19 - Load Mode Select"]
            #[inline(always)]
            pub fn ldmod(&mut self) -> _LDMODW {
                _LDMODW { w: self }
            }
        }
    }
    #[doc = "Modulus register"]
    pub struct MOD {
        register: VolatileCell<u32>,
    }
    #[doc = "Modulus register"]
    pub mod mod_ {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::MOD {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MODR {
            bits: u16,
        }
        impl MODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MODW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - PDB Modulus"]
            #[inline(always)]
            pub fn mod_(&self) -> MODR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                MODR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 65535 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - PDB Modulus"]
            #[inline(always)]
            pub fn mod_(&mut self) -> _MODW {
                _MODW { w: self }
            }
        }
    }
    #[doc = "Counter register"]
    pub struct CNT {
        register: VolatileCell<u32>,
    }
    #[doc = "Counter register"]
    pub mod cnt {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::CNT {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct CNTR {
            bits: u16,
        }
        impl CNTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - PDB Counter"]
            #[inline(always)]
            pub fn cnt(&self) -> CNTR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                CNTR { bits }
            }
        }
    }
    #[doc = "Interrupt Delay register"]
    pub struct IDLY {
        register: VolatileCell<u32>,
    }
    #[doc = "Interrupt Delay register"]
    pub mod idly {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::IDLY {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct IDLYR {
            bits: u16,
        }
        impl IDLYR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _IDLYW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IDLYW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - PDB Interrupt Delay"]
            #[inline(always)]
            pub fn idly(&self) -> IDLYR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                IDLYR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 65535 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - PDB Interrupt Delay"]
            #[inline(always)]
            pub fn idly(&mut self) -> _IDLYW {
                _IDLYW { w: self }
            }
        }
    }
    #[doc = "Channel n Control register 1"]
    pub struct CHC1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel n Control register 1"]
    pub mod chc1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CHC1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ENR {
            #[doc = "PDB channel's corresponding pre-trigger disabled."]
            _0,
            #[doc = "PDB channel's corresponding pre-trigger enabled."]
            _1,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl ENR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    ENR::_0 => 0,
                    ENR::_1 => 1,
                    ENR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> ENR {
                match value {
                    0 => ENR::_0,
                    1 => ENR::_1,
                    i => ENR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ENR::_1
            }
        }
        #[doc = "Possible values of the field `TOS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TOSR {
            #[doc = "PDB channel's corresponding pre-trigger is in bypassed mode. The pre-trigger asserts one peripheral clock cycle after a rising edge is detected on selected trigger input source or software trigger is selected and SWTRIG is written with 1."]
            _0,
            #[doc = "PDB channel's corresponding pre-trigger asserts when the counter reaches the channel delay register and one peripheral clock cycle after a rising edge is detected on selected trigger input source or software trigger is selected and SETRIG is written with 1."]
            _1,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl TOSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TOSR::_0 => 0,
                    TOSR::_1 => 1,
                    TOSR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TOSR {
                match value {
                    0 => TOSR::_0,
                    1 => TOSR::_1,
                    i => TOSR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TOSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TOSR::_1
            }
        }
        #[doc = "Possible values of the field `BB`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BBR {
            #[doc = "PDB channel's corresponding pre-trigger back-to-back operation disabled."]
            _0,
            #[doc = "PDB channel's corresponding pre-trigger back-to-back operation enabled."]
            _1,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl BBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    BBR::_0 => 0,
                    BBR::_1 => 1,
                    BBR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> BBR {
                match value {
                    0 => BBR::_0,
                    1 => BBR::_1,
                    i => BBR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BBR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BBR::_1
            }
        }
        #[doc = "Values that can be written to the field `EN`"]
        pub enum ENW {
            #[doc = "PDB channel's corresponding pre-trigger disabled."]
            _0,
            #[doc = "PDB channel's corresponding pre-trigger enabled."]
            _1,
        }
        impl ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    ENW::_0 => 0,
                    ENW::_1 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ENW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "PDB channel's corresponding pre-trigger disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ENW::_0)
            }
            #[doc = "PDB channel's corresponding pre-trigger enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ENW::_1)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TOS`"]
        pub enum TOSW {
            #[doc = "PDB channel's corresponding pre-trigger is in bypassed mode. The pre-trigger asserts one peripheral clock cycle after a rising edge is detected on selected trigger input source or software trigger is selected and SWTRIG is written with 1."]
            _0,
            #[doc = "PDB channel's corresponding pre-trigger asserts when the counter reaches the channel delay register and one peripheral clock cycle after a rising edge is detected on selected trigger input source or software trigger is selected and SETRIG is written with 1."]
            _1,
        }
        impl TOSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TOSW::_0 => 0,
                    TOSW::_1 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TOSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TOSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TOSW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "PDB channel's corresponding pre-trigger is in bypassed mode. The pre-trigger asserts one peripheral clock cycle after a rising edge is detected on selected trigger input source or software trigger is selected and SWTRIG is written with 1."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TOSW::_0)
            }
            #[doc = "PDB channel's corresponding pre-trigger asserts when the counter reaches the channel delay register and one peripheral clock cycle after a rising edge is detected on selected trigger input source or software trigger is selected and SETRIG is written with 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TOSW::_1)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BB`"]
        pub enum BBW {
            #[doc = "PDB channel's corresponding pre-trigger back-to-back operation disabled."]
            _0,
            #[doc = "PDB channel's corresponding pre-trigger back-to-back operation enabled."]
            _1,
        }
        impl BBW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    BBW::_0 => 0,
                    BBW::_1 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BBW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BBW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "PDB channel's corresponding pre-trigger back-to-back operation disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BBW::_0)
            }
            #[doc = "PDB channel's corresponding pre-trigger back-to-back operation enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BBW::_1)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - PDB Channel Pre-Trigger Enable"]
            #[inline(always)]
            pub fn en(&self) -> ENR {
                ENR::_from({
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 8:15 - PDB Channel Pre-Trigger Output Select"]
            #[inline(always)]
            pub fn tos(&self) -> TOSR {
                TOSR::_from({
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 16:23 - PDB Channel Pre-Trigger Back-to-Back Operation Enable"]
            #[inline(always)]
            pub fn bb(&self) -> BBR {
                BBR::_from({
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - PDB Channel Pre-Trigger Enable"]
            #[inline(always)]
            pub fn en(&mut self) -> _ENW {
                _ENW { w: self }
            }
            #[doc = "Bits 8:15 - PDB Channel Pre-Trigger Output Select"]
            #[inline(always)]
            pub fn tos(&mut self) -> _TOSW {
                _TOSW { w: self }
            }
            #[doc = "Bits 16:23 - PDB Channel Pre-Trigger Back-to-Back Operation Enable"]
            #[inline(always)]
            pub fn bb(&mut self) -> _BBW {
                _BBW { w: self }
            }
        }
    }
    #[doc = "Channel n Status register"]
    pub struct CHS {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel n Status register"]
    pub mod chs {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CHS {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `ERR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERRR {
            #[doc = "Sequence error not detected on PDB channel's corresponding pre-trigger."]
            _0,
            #[doc = "Sequence error detected on PDB channel's corresponding pre-trigger. ADCn block can be triggered for a conversion by one pre-trigger from PDB channel n. When one conversion, which is triggered by one of the pre-triggers from PDB channel n, is in progress, new trigger from PDB channel's corresponding pre-trigger m cannot be accepted by ADCn, and ERR[m] is set. Writing 0's to clear the sequence error flags."]
            _1,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl ERRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    ERRR::_0 => 0,
                    ERRR::_1 => 1,
                    ERRR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> ERRR {
                match value {
                    0 => ERRR::_0,
                    1 => ERRR::_1,
                    i => ERRR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERRR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct CFR {
            bits: u8,
        }
        impl CFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Values that can be written to the field `ERR`"]
        pub enum ERRW {
            #[doc = "Sequence error not detected on PDB channel's corresponding pre-trigger."]
            _0,
            #[doc = "Sequence error detected on PDB channel's corresponding pre-trigger. ADCn block can be triggered for a conversion by one pre-trigger from PDB channel n. When one conversion, which is triggered by one of the pre-triggers from PDB channel n, is in progress, new trigger from PDB channel's corresponding pre-trigger m cannot be accepted by ADCn, and ERR[m] is set. Writing 0's to clear the sequence error flags."]
            _1,
        }
        impl ERRW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    ERRW::_0 => 0,
                    ERRW::_1 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERRW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERRW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Sequence error not detected on PDB channel's corresponding pre-trigger."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERRW::_0)
            }
            #[doc = "Sequence error detected on PDB channel's corresponding pre-trigger. ADCn block can be triggered for a conversion by one pre-trigger from PDB channel n. When one conversion, which is triggered by one of the pre-triggers from PDB channel n, is in progress, new trigger from PDB channel's corresponding pre-trigger m cannot be accepted by ADCn, and ERR[m] is set. Writing 0's to clear the sequence error flags."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERRW::_1)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - PDB Channel Sequence Error Flags"]
            #[inline(always)]
            pub fn err(&self) -> ERRR {
                ERRR::_from({
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 16:23 - PDB Channel Flags"]
            #[inline(always)]
            pub fn cf(&self) -> CFR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CFR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - PDB Channel Sequence Error Flags"]
            #[inline(always)]
            pub fn err(&mut self) -> _ERRW {
                _ERRW { w: self }
            }
            #[doc = "Bits 16:23 - PDB Channel Flags"]
            #[inline(always)]
            pub fn cf(&mut self) -> _CFW {
                _CFW { w: self }
            }
        }
    }
    #[doc = "Channel n Delay 0 register"]
    pub struct CHDLY0 {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel n Delay 0 register"]
    pub mod chdly0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CHDLY0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLYR {
            bits: u16,
        }
        impl DLYR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DLYW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DLYW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - PDB Channel Delay"]
            #[inline(always)]
            pub fn dly(&self) -> DLYR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                DLYR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - PDB Channel Delay"]
            #[inline(always)]
            pub fn dly(&mut self) -> _DLYW {
                _DLYW { w: self }
            }
        }
    }
    #[doc = "Channel n Delay 1 register"]
    pub struct CHDLY1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel n Delay 1 register"]
    pub mod chdly1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CHDLY1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLYR {
            bits: u16,
        }
        impl DLYR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DLYW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DLYW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - PDB Channel Delay"]
            #[inline(always)]
            pub fn dly(&self) -> DLYR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                DLYR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - PDB Channel Delay"]
            #[inline(always)]
            pub fn dly(&mut self) -> _DLYW {
                _DLYW { w: self }
            }
        }
    }
    #[doc = "Channel n Delay 2 register"]
    pub struct CHDLY2 {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel n Delay 2 register"]
    pub mod chdly2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CHDLY2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLYR {
            bits: u16,
        }
        impl DLYR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DLYW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DLYW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - PDB Channel Delay"]
            #[inline(always)]
            pub fn dly(&self) -> DLYR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                DLYR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - PDB Channel Delay"]
            #[inline(always)]
            pub fn dly(&mut self) -> _DLYW {
                _DLYW { w: self }
            }
        }
    }
    #[doc = "Channel n Delay 3 register"]
    pub struct CHDLY3 {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel n Delay 3 register"]
    pub mod chdly3 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CHDLY3 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLYR {
            bits: u16,
        }
        impl DLYR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DLYW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DLYW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - PDB Channel Delay"]
            #[inline(always)]
            pub fn dly(&self) -> DLYR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                DLYR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - PDB Channel Delay"]
            #[inline(always)]
            pub fn dly(&mut self) -> _DLYW {
                _DLYW { w: self }
            }
        }
    }
    #[doc = "Channel n Delay 4 register"]
    pub struct CHDLY4 {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel n Delay 4 register"]
    pub mod chdly4 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CHDLY4 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLYR {
            bits: u16,
        }
        impl DLYR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DLYW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DLYW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - PDB Channel Delay"]
            #[inline(always)]
            pub fn dly(&self) -> DLYR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                DLYR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - PDB Channel Delay"]
            #[inline(always)]
            pub fn dly(&mut self) -> _DLYW {
                _DLYW { w: self }
            }
        }
    }
    #[doc = "Channel n Delay 5 register"]
    pub struct CHDLY5 {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel n Delay 5 register"]
    pub mod chdly5 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CHDLY5 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLYR {
            bits: u16,
        }
        impl DLYR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DLYW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DLYW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - PDB Channel Delay"]
            #[inline(always)]
            pub fn dly(&self) -> DLYR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                DLYR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - PDB Channel Delay"]
            #[inline(always)]
            pub fn dly(&mut self) -> _DLYW {
                _DLYW { w: self }
            }
        }
    }
    #[doc = "Channel n Delay 6 register"]
    pub struct CHDLY6 {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel n Delay 6 register"]
    pub mod chdly6 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CHDLY6 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLYR {
            bits: u16,
        }
        impl DLYR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DLYW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DLYW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - PDB Channel Delay"]
            #[inline(always)]
            pub fn dly(&self) -> DLYR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                DLYR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - PDB Channel Delay"]
            #[inline(always)]
            pub fn dly(&mut self) -> _DLYW {
                _DLYW { w: self }
            }
        }
    }
    #[doc = "Channel n Delay 7 register"]
    pub struct CHDLY7 {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel n Delay 7 register"]
    pub mod chdly7 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CHDLY7 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLYR {
            bits: u16,
        }
        impl DLYR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DLYW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DLYW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - PDB Channel Delay"]
            #[inline(always)]
            pub fn dly(&self) -> DLYR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                DLYR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - PDB Channel Delay"]
            #[inline(always)]
            pub fn dly(&mut self) -> _DLYW {
                _DLYW { w: self }
            }
        }
    }
    #[doc = "Pulse-Out n Enable register"]
    pub struct POEN {
        register: VolatileCell<u32>,
    }
    #[doc = "Pulse-Out n Enable register"]
    pub mod poen {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::POEN {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `POEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum POENR {
            #[doc = "PDB Pulse-Out disabled"]
            _0,
            #[doc = "PDB Pulse-Out enabled"]
            _1,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl POENR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    POENR::_0 => 0,
                    POENR::_1 => 1,
                    POENR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> POENR {
                match value {
                    0 => POENR::_0,
                    1 => POENR::_1,
                    i => POENR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == POENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == POENR::_1
            }
        }
        #[doc = "Values that can be written to the field `POEN`"]
        pub enum POENW {
            #[doc = "PDB Pulse-Out disabled"]
            _0,
            #[doc = "PDB Pulse-Out enabled"]
            _1,
        }
        impl POENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    POENW::_0 => 0,
                    POENW::_1 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _POENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _POENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: POENW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "PDB Pulse-Out disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(POENW::_0)
            }
            #[doc = "PDB Pulse-Out enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(POENW::_1)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - PDB Pulse-Out Enable"]
            #[inline(always)]
            pub fn poen(&self) -> POENR {
                POENR::_from({
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - PDB Pulse-Out Enable"]
            #[inline(always)]
            pub fn poen(&mut self) -> _POENW {
                _POENW { w: self }
            }
        }
    }
    #[doc = "Pulse-Out n Delay register"]
    pub struct PODLY {
        register: VolatileCell<u32>,
    }
    #[doc = "Pulse-Out n Delay register"]
    pub mod podly {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PODLY {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLY2R {
            bits: u16,
        }
        impl DLY2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLY1R {
            bits: u16,
        }
        impl DLY1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DLY2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DLY2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DLY1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DLY1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - PDB Pulse-Out Delay 2"]
            #[inline(always)]
            pub fn dly2(&self) -> DLY2R {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                DLY2R { bits }
            }
            #[doc = "Bits 16:31 - PDB Pulse-Out Delay 1"]
            #[inline(always)]
            pub fn dly1(&self) -> DLY1R {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                DLY1R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - PDB Pulse-Out Delay 2"]
            #[inline(always)]
            pub fn dly2(&mut self) -> _DLY2W {
                _DLY2W { w: self }
            }
            #[doc = "Bits 16:31 - PDB Pulse-Out Delay 1"]
            #[inline(always)]
            pub fn dly1(&mut self) -> _DLY1W {
                _DLY1W { w: self }
            }
        }
    }
    #[doc = "PDB0_DLY2 register."]
    pub struct DLY2 {
        register: VolatileCell<u16>,
    }
    #[doc = "PDB0_DLY2 register."]
    pub mod dly2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::DLY2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLY2R {
            bits: u16,
        }
        impl DLY2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DLY2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DLY2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:15 - DLY2"]
            #[inline(always)]
            pub fn dly2(&self) -> DLY2R {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                DLY2R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - DLY2"]
            #[inline(always)]
            pub fn dly2(&mut self) -> _DLY2W {
                _DLY2W { w: self }
            }
        }
    }
    #[doc = "PDB0_DLY1 register."]
    pub struct DLY1 {
        register: VolatileCell<u16>,
    }
    #[doc = "PDB0_DLY1 register."]
    pub mod dly1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::DLY1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLY1R {
            bits: u16,
        }
        impl DLY1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DLY1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DLY1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:15 - DLY1"]
            #[inline(always)]
            pub fn dly1(&self) -> DLY1R {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                DLY1R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 65535 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - DLY1"]
            #[inline(always)]
            pub fn dly1(&mut self) -> _DLY1W {
                _DLY1W { w: self }
            }
        }
    }
}
#[doc = "Programmable Delay Block"]
pub struct PDB0 {
    register_block: pdb0::RegisterBlock,
}
impl Deref for PDB0 {
    type Target = pdb0::RegisterBlock;
    fn deref(&self) -> &pdb0::RegisterBlock {
        &self.register_block
    }
}
#[doc = "Programmable Delay Block"]
pub const PDB1: Peripheral<PDB1> = unsafe { Peripheral::new(1073942528) };
#[doc = "Programmable Delay Block"]
pub mod pdb1 {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - Status and Control register"]
        pub sc: SC,
        #[doc = "0x04 - Modulus register"]
        pub mod_: MOD,
        #[doc = "0x08 - Counter register"]
        pub cnt: CNT,
        #[doc = "0x0c - Interrupt Delay register"]
        pub idly: IDLY,
        #[doc = "0x10 - Channel n Control register 1"]
        pub ch0c1: CHC1,
        #[doc = "0x14 - Channel n Status register"]
        pub ch0s: CHS,
        #[doc = "0x18 - Channel n Delay 0 register"]
        pub ch0dly0: CHDLY0,
        #[doc = "0x1c - Channel n Delay 1 register"]
        pub ch0dly1: CHDLY1,
        #[doc = "0x20 - Channel n Delay 2 register"]
        pub ch0dly2: CHDLY2,
        #[doc = "0x24 - Channel n Delay 3 register"]
        pub ch0dly3: CHDLY3,
        #[doc = "0x28 - Channel n Delay 4 register"]
        pub ch0dly4: CHDLY4,
        #[doc = "0x2c - Channel n Delay 5 register"]
        pub ch0dly5: CHDLY5,
        #[doc = "0x30 - Channel n Delay 6 register"]
        pub ch0dly6: CHDLY6,
        #[doc = "0x34 - Channel n Delay 7 register"]
        pub ch0dly7: CHDLY7,
        #[doc = "0x38 - Channel n Control register 1"]
        pub ch1c1: CHC1,
        #[doc = "0x3c - Channel n Status register"]
        pub ch1s: CHS,
        #[doc = "0x40 - Channel n Delay 0 register"]
        pub ch1dly0: CHDLY0,
        #[doc = "0x44 - Channel n Delay 1 register"]
        pub ch1dly1: CHDLY1,
        #[doc = "0x48 - Channel n Delay 2 register"]
        pub ch1dly2: CHDLY2,
        #[doc = "0x4c - Channel n Delay 3 register"]
        pub ch1dly3: CHDLY3,
        #[doc = "0x50 - Channel n Delay 4 register"]
        pub ch1dly4: CHDLY4,
        #[doc = "0x54 - Channel n Delay 5 register"]
        pub ch1dly5: CHDLY5,
        #[doc = "0x58 - Channel n Delay 6 register"]
        pub ch1dly6: CHDLY6,
        #[doc = "0x5c - Channel n Delay 7 register"]
        pub ch1dly7: CHDLY7,
        _reserved0: [u8; 304usize],
        #[doc = "0x190 - Pulse-Out n Enable register"]
        pub poen: POEN,
        #[doc = "0x194 - Pulse-Out n Delay register"]
        pub podly: PODLY,
    }
    #[doc = "Status and Control register"]
    pub struct SC {
        register: VolatileCell<u32>,
    }
    #[doc = "Status and Control register"]
    pub mod sc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct LDOKR {
            bits: bool,
        }
        impl LDOKR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `CONT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CONTR {
            #[doc = "PDB operation in One-Shot mode"]
            _0,
            #[doc = "PDB operation in Continuous mode"]
            _1,
        }
        impl CONTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CONTR::_0 => false,
                    CONTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CONTR {
                match value {
                    false => CONTR::_0,
                    true => CONTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CONTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CONTR::_1
            }
        }
        #[doc = "Possible values of the field `MULT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MULTR {
            #[doc = "Multiplication factor is 1."]
            _00,
            #[doc = "Multiplication factor is 10."]
            _01,
            #[doc = "Multiplication factor is 20."]
            _10,
            #[doc = "Multiplication factor is 40."]
            _11,
        }
        impl MULTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MULTR::_00 => 0,
                    MULTR::_01 => 1,
                    MULTR::_10 => 2,
                    MULTR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MULTR {
                match value {
                    0 => MULTR::_00,
                    1 => MULTR::_01,
                    2 => MULTR::_10,
                    3 => MULTR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == MULTR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == MULTR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == MULTR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == MULTR::_11
            }
        }
        #[doc = "Possible values of the field `PDBIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PDBIER {
            #[doc = "PDB interrupt disabled."]
            _0,
            #[doc = "PDB interrupt enabled."]
            _1,
        }
        impl PDBIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PDBIER::_0 => false,
                    PDBIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PDBIER {
                match value {
                    false => PDBIER::_0,
                    true => PDBIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PDBIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PDBIER::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct PDBIFR {
            bits: bool,
        }
        impl PDBIFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `PDBEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PDBENR {
            #[doc = "PDB disabled. Counter is off."]
            _0,
            #[doc = "PDB enabled."]
            _1,
        }
        impl PDBENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PDBENR::_0 => false,
                    PDBENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PDBENR {
                match value {
                    false => PDBENR::_0,
                    true => PDBENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PDBENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PDBENR::_1
            }
        }
        #[doc = "Possible values of the field `TRGSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRGSELR {
            #[doc = "Trigger-In 0 is selected."]
            _0000,
            #[doc = "Trigger-In 1 is selected."]
            _0001,
            #[doc = "Trigger-In 2 is selected."]
            _0010,
            #[doc = "Trigger-In 3 is selected."]
            _0011,
            #[doc = "Trigger-In 4 is selected."]
            _0100,
            #[doc = "Trigger-In 5 is selected."]
            _0101,
            #[doc = "Trigger-In 6 is selected."]
            _0110,
            #[doc = "Trigger-In 7 is selected."]
            _0111,
            #[doc = "Trigger-In 8 is selected."]
            _1000,
            #[doc = "Trigger-In 9 is selected."]
            _1001,
            #[doc = "Trigger-In 10 is selected."]
            _1010,
            #[doc = "Trigger-In 11 is selected."]
            _1011,
            #[doc = "Trigger-In 12 is selected."]
            _1100,
            #[doc = "Trigger-In 13 is selected."]
            _1101,
            #[doc = "Trigger-In 14 is selected."]
            _1110,
            #[doc = "Software trigger is selected."]
            _1111,
        }
        impl TRGSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TRGSELR::_0000 => 0,
                    TRGSELR::_0001 => 1,
                    TRGSELR::_0010 => 2,
                    TRGSELR::_0011 => 3,
                    TRGSELR::_0100 => 4,
                    TRGSELR::_0101 => 5,
                    TRGSELR::_0110 => 6,
                    TRGSELR::_0111 => 7,
                    TRGSELR::_1000 => 8,
                    TRGSELR::_1001 => 9,
                    TRGSELR::_1010 => 10,
                    TRGSELR::_1011 => 11,
                    TRGSELR::_1100 => 12,
                    TRGSELR::_1101 => 13,
                    TRGSELR::_1110 => 14,
                    TRGSELR::_1111 => 15,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TRGSELR {
                match value {
                    0 => TRGSELR::_0000,
                    1 => TRGSELR::_0001,
                    2 => TRGSELR::_0010,
                    3 => TRGSELR::_0011,
                    4 => TRGSELR::_0100,
                    5 => TRGSELR::_0101,
                    6 => TRGSELR::_0110,
                    7 => TRGSELR::_0111,
                    8 => TRGSELR::_1000,
                    9 => TRGSELR::_1001,
                    10 => TRGSELR::_1010,
                    11 => TRGSELR::_1011,
                    12 => TRGSELR::_1100,
                    13 => TRGSELR::_1101,
                    14 => TRGSELR::_1110,
                    15 => TRGSELR::_1111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == TRGSELR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == TRGSELR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == TRGSELR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == TRGSELR::_0011
            }
            #[doc = "Checks if the value of the field is `_0100`"]
            #[inline(always)]
            pub fn is_0100(&self) -> bool {
                *self == TRGSELR::_0100
            }
            #[doc = "Checks if the value of the field is `_0101`"]
            #[inline(always)]
            pub fn is_0101(&self) -> bool {
                *self == TRGSELR::_0101
            }
            #[doc = "Checks if the value of the field is `_0110`"]
            #[inline(always)]
            pub fn is_0110(&self) -> bool {
                *self == TRGSELR::_0110
            }
            #[doc = "Checks if the value of the field is `_0111`"]
            #[inline(always)]
            pub fn is_0111(&self) -> bool {
                *self == TRGSELR::_0111
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == TRGSELR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == TRGSELR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == TRGSELR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == TRGSELR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == TRGSELR::_1100
            }
            #[doc = "Checks if the value of the field is `_1101`"]
            #[inline(always)]
            pub fn is_1101(&self) -> bool {
                *self == TRGSELR::_1101
            }
            #[doc = "Checks if the value of the field is `_1110`"]
            #[inline(always)]
            pub fn is_1110(&self) -> bool {
                *self == TRGSELR::_1110
            }
            #[doc = "Checks if the value of the field is `_1111`"]
            #[inline(always)]
            pub fn is_1111(&self) -> bool {
                *self == TRGSELR::_1111
            }
        }
        #[doc = "Possible values of the field `PRESCALER`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PRESCALERR {
            #[doc = "Counting uses the peripheral clock divided by MULT (the multiplication factor)."]
            _000,
            #[doc = "Counting uses the peripheral clock divided by 2 x MULT (the multiplication factor)."]
            _001,
            #[doc = "Counting uses the peripheral clock divided by 4 x MULT (the multiplication factor)."]
            _010,
            #[doc = "Counting uses the peripheral clock divided by 8 x MULT (the multiplication factor)."]
            _011,
            #[doc = "Counting uses the peripheral clock divided by 16 x MULT (the multiplication factor)."]
            _100,
            #[doc = "Counting uses the peripheral clock divided by 32 x MULT (the multiplication factor)."]
            _101,
            #[doc = "Counting uses the peripheral clock divided by 64 x MULT (the multiplication factor)."]
            _110,
            #[doc = "Counting uses the peripheral clock divided by 128 x MULT (the multiplication factor)."]
            _111,
        }
        impl PRESCALERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PRESCALERR::_000 => 0,
                    PRESCALERR::_001 => 1,
                    PRESCALERR::_010 => 2,
                    PRESCALERR::_011 => 3,
                    PRESCALERR::_100 => 4,
                    PRESCALERR::_101 => 5,
                    PRESCALERR::_110 => 6,
                    PRESCALERR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PRESCALERR {
                match value {
                    0 => PRESCALERR::_000,
                    1 => PRESCALERR::_001,
                    2 => PRESCALERR::_010,
                    3 => PRESCALERR::_011,
                    4 => PRESCALERR::_100,
                    5 => PRESCALERR::_101,
                    6 => PRESCALERR::_110,
                    7 => PRESCALERR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == PRESCALERR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == PRESCALERR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == PRESCALERR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == PRESCALERR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == PRESCALERR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == PRESCALERR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == PRESCALERR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == PRESCALERR::_111
            }
        }
        #[doc = "Possible values of the field `DMAEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMAENR {
            #[doc = "DMA disabled."]
            _0,
            #[doc = "DMA enabled."]
            _1,
        }
        impl DMAENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMAENR::_0 => false,
                    DMAENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMAENR {
                match value {
                    false => DMAENR::_0,
                    true => DMAENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMAENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMAENR::_1
            }
        }
        #[doc = "Possible values of the field `PDBEIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PDBEIER {
            #[doc = "PDB sequence error interrupt disabled."]
            _0,
            #[doc = "PDB sequence error interrupt enabled."]
            _1,
        }
        impl PDBEIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PDBEIER::_0 => false,
                    PDBEIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PDBEIER {
                match value {
                    false => PDBEIER::_0,
                    true => PDBEIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PDBEIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PDBEIER::_1
            }
        }
        #[doc = "Possible values of the field `LDMOD`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LDMODR {
            #[doc = "The internal registers are loaded with the values from their buffers, immediately after 1 is written to LDOK."]
            _00,
            #[doc = "The internal registers are loaded with the values from their buffers when the PDB counter (CNT) = MOD + 1 CNT delay elapsed, after 1 is written to LDOK."]
            _01,
            #[doc = "The internal registers are loaded with the values from their buffers when a trigger input event is detected, after 1 is written to LDOK."]
            _10,
            #[doc = "The internal registers are loaded with the values from their buffers when either the PDB counter (CNT) = MOD + 1 CNT delay elapsed, or a trigger input event is detected, after 1 is written to LDOK."]
            _11,
        }
        impl LDMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    LDMODR::_00 => 0,
                    LDMODR::_01 => 1,
                    LDMODR::_10 => 2,
                    LDMODR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> LDMODR {
                match value {
                    0 => LDMODR::_00,
                    1 => LDMODR::_01,
                    2 => LDMODR::_10,
                    3 => LDMODR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == LDMODR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == LDMODR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == LDMODR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == LDMODR::_11
            }
        }
        #[doc = r" Proxy"]
        pub struct _LDOKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LDOKW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CONT`"]
        pub enum CONTW {
            #[doc = "PDB operation in One-Shot mode"]
            _0,
            #[doc = "PDB operation in Continuous mode"]
            _1,
        }
        impl CONTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CONTW::_0 => false,
                    CONTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CONTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CONTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CONTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "PDB operation in One-Shot mode"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CONTW::_0)
            }
            #[doc = "PDB operation in Continuous mode"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CONTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MULT`"]
        pub enum MULTW {
            #[doc = "Multiplication factor is 1."]
            _00,
            #[doc = "Multiplication factor is 10."]
            _01,
            #[doc = "Multiplication factor is 20."]
            _10,
            #[doc = "Multiplication factor is 40."]
            _11,
        }
        impl MULTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MULTW::_00 => 0,
                    MULTW::_01 => 1,
                    MULTW::_10 => 2,
                    MULTW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MULTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MULTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MULTW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Multiplication factor is 1."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(MULTW::_00)
            }
            #[doc = "Multiplication factor is 10."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(MULTW::_01)
            }
            #[doc = "Multiplication factor is 20."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(MULTW::_10)
            }
            #[doc = "Multiplication factor is 40."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(MULTW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PDBIE`"]
        pub enum PDBIEW {
            #[doc = "PDB interrupt disabled."]
            _0,
            #[doc = "PDB interrupt enabled."]
            _1,
        }
        impl PDBIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PDBIEW::_0 => false,
                    PDBIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PDBIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PDBIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PDBIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "PDB interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PDBIEW::_0)
            }
            #[doc = "PDB interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PDBIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _PDBIFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PDBIFW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PDBEN`"]
        pub enum PDBENW {
            #[doc = "PDB disabled. Counter is off."]
            _0,
            #[doc = "PDB enabled."]
            _1,
        }
        impl PDBENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PDBENW::_0 => false,
                    PDBENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PDBENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PDBENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PDBENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "PDB disabled. Counter is off."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PDBENW::_0)
            }
            #[doc = "PDB enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PDBENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRGSEL`"]
        pub enum TRGSELW {
            #[doc = "Trigger-In 0 is selected."]
            _0000,
            #[doc = "Trigger-In 1 is selected."]
            _0001,
            #[doc = "Trigger-In 2 is selected."]
            _0010,
            #[doc = "Trigger-In 3 is selected."]
            _0011,
            #[doc = "Trigger-In 4 is selected."]
            _0100,
            #[doc = "Trigger-In 5 is selected."]
            _0101,
            #[doc = "Trigger-In 6 is selected."]
            _0110,
            #[doc = "Trigger-In 7 is selected."]
            _0111,
            #[doc = "Trigger-In 8 is selected."]
            _1000,
            #[doc = "Trigger-In 9 is selected."]
            _1001,
            #[doc = "Trigger-In 10 is selected."]
            _1010,
            #[doc = "Trigger-In 11 is selected."]
            _1011,
            #[doc = "Trigger-In 12 is selected."]
            _1100,
            #[doc = "Trigger-In 13 is selected."]
            _1101,
            #[doc = "Trigger-In 14 is selected."]
            _1110,
            #[doc = "Software trigger is selected."]
            _1111,
        }
        impl TRGSELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TRGSELW::_0000 => 0,
                    TRGSELW::_0001 => 1,
                    TRGSELW::_0010 => 2,
                    TRGSELW::_0011 => 3,
                    TRGSELW::_0100 => 4,
                    TRGSELW::_0101 => 5,
                    TRGSELW::_0110 => 6,
                    TRGSELW::_0111 => 7,
                    TRGSELW::_1000 => 8,
                    TRGSELW::_1001 => 9,
                    TRGSELW::_1010 => 10,
                    TRGSELW::_1011 => 11,
                    TRGSELW::_1100 => 12,
                    TRGSELW::_1101 => 13,
                    TRGSELW::_1110 => 14,
                    TRGSELW::_1111 => 15,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRGSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRGSELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRGSELW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Trigger-In 0 is selected."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(TRGSELW::_0000)
            }
            #[doc = "Trigger-In 1 is selected."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(TRGSELW::_0001)
            }
            #[doc = "Trigger-In 2 is selected."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(TRGSELW::_0010)
            }
            #[doc = "Trigger-In 3 is selected."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(TRGSELW::_0011)
            }
            #[doc = "Trigger-In 4 is selected."]
            #[inline(always)]
            pub fn _0100(self) -> &'a mut W {
                self.variant(TRGSELW::_0100)
            }
            #[doc = "Trigger-In 5 is selected."]
            #[inline(always)]
            pub fn _0101(self) -> &'a mut W {
                self.variant(TRGSELW::_0101)
            }
            #[doc = "Trigger-In 6 is selected."]
            #[inline(always)]
            pub fn _0110(self) -> &'a mut W {
                self.variant(TRGSELW::_0110)
            }
            #[doc = "Trigger-In 7 is selected."]
            #[inline(always)]
            pub fn _0111(self) -> &'a mut W {
                self.variant(TRGSELW::_0111)
            }
            #[doc = "Trigger-In 8 is selected."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(TRGSELW::_1000)
            }
            #[doc = "Trigger-In 9 is selected."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(TRGSELW::_1001)
            }
            #[doc = "Trigger-In 10 is selected."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(TRGSELW::_1010)
            }
            #[doc = "Trigger-In 11 is selected."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(TRGSELW::_1011)
            }
            #[doc = "Trigger-In 12 is selected."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(TRGSELW::_1100)
            }
            #[doc = "Trigger-In 13 is selected."]
            #[inline(always)]
            pub fn _1101(self) -> &'a mut W {
                self.variant(TRGSELW::_1101)
            }
            #[doc = "Trigger-In 14 is selected."]
            #[inline(always)]
            pub fn _1110(self) -> &'a mut W {
                self.variant(TRGSELW::_1110)
            }
            #[doc = "Software trigger is selected."]
            #[inline(always)]
            pub fn _1111(self) -> &'a mut W {
                self.variant(TRGSELW::_1111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PRESCALER`"]
        pub enum PRESCALERW {
            #[doc = "Counting uses the peripheral clock divided by MULT (the multiplication factor)."]
            _000,
            #[doc = "Counting uses the peripheral clock divided by 2 x MULT (the multiplication factor)."]
            _001,
            #[doc = "Counting uses the peripheral clock divided by 4 x MULT (the multiplication factor)."]
            _010,
            #[doc = "Counting uses the peripheral clock divided by 8 x MULT (the multiplication factor)."]
            _011,
            #[doc = "Counting uses the peripheral clock divided by 16 x MULT (the multiplication factor)."]
            _100,
            #[doc = "Counting uses the peripheral clock divided by 32 x MULT (the multiplication factor)."]
            _101,
            #[doc = "Counting uses the peripheral clock divided by 64 x MULT (the multiplication factor)."]
            _110,
            #[doc = "Counting uses the peripheral clock divided by 128 x MULT (the multiplication factor)."]
            _111,
        }
        impl PRESCALERW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PRESCALERW::_000 => 0,
                    PRESCALERW::_001 => 1,
                    PRESCALERW::_010 => 2,
                    PRESCALERW::_011 => 3,
                    PRESCALERW::_100 => 4,
                    PRESCALERW::_101 => 5,
                    PRESCALERW::_110 => 6,
                    PRESCALERW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PRESCALERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PRESCALERW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PRESCALERW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Counting uses the peripheral clock divided by MULT (the multiplication factor)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(PRESCALERW::_000)
            }
            #[doc = "Counting uses the peripheral clock divided by 2 x MULT (the multiplication factor)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(PRESCALERW::_001)
            }
            #[doc = "Counting uses the peripheral clock divided by 4 x MULT (the multiplication factor)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(PRESCALERW::_010)
            }
            #[doc = "Counting uses the peripheral clock divided by 8 x MULT (the multiplication factor)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(PRESCALERW::_011)
            }
            #[doc = "Counting uses the peripheral clock divided by 16 x MULT (the multiplication factor)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(PRESCALERW::_100)
            }
            #[doc = "Counting uses the peripheral clock divided by 32 x MULT (the multiplication factor)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(PRESCALERW::_101)
            }
            #[doc = "Counting uses the peripheral clock divided by 64 x MULT (the multiplication factor)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(PRESCALERW::_110)
            }
            #[doc = "Counting uses the peripheral clock divided by 128 x MULT (the multiplication factor)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(PRESCALERW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMAEN`"]
        pub enum DMAENW {
            #[doc = "DMA disabled."]
            _0,
            #[doc = "DMA enabled."]
            _1,
        }
        impl DMAENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMAENW::_0 => false,
                    DMAENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMAENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMAENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMAENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMAENW::_0)
            }
            #[doc = "DMA enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMAENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SWTRIGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SWTRIGW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PDBEIE`"]
        pub enum PDBEIEW {
            #[doc = "PDB sequence error interrupt disabled."]
            _0,
            #[doc = "PDB sequence error interrupt enabled."]
            _1,
        }
        impl PDBEIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PDBEIEW::_0 => false,
                    PDBEIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PDBEIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PDBEIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PDBEIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "PDB sequence error interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PDBEIEW::_0)
            }
            #[doc = "PDB sequence error interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PDBEIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LDMOD`"]
        pub enum LDMODW {
            #[doc = "The internal registers are loaded with the values from their buffers, immediately after 1 is written to LDOK."]
            _00,
            #[doc = "The internal registers are loaded with the values from their buffers when the PDB counter (CNT) = MOD + 1 CNT delay elapsed, after 1 is written to LDOK."]
            _01,
            #[doc = "The internal registers are loaded with the values from their buffers when a trigger input event is detected, after 1 is written to LDOK."]
            _10,
            #[doc = "The internal registers are loaded with the values from their buffers when either the PDB counter (CNT) = MOD + 1 CNT delay elapsed, or a trigger input event is detected, after 1 is written to LDOK."]
            _11,
        }
        impl LDMODW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    LDMODW::_00 => 0,
                    LDMODW::_01 => 1,
                    LDMODW::_10 => 2,
                    LDMODW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LDMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LDMODW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LDMODW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "The internal registers are loaded with the values from their buffers, immediately after 1 is written to LDOK."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(LDMODW::_00)
            }
            #[doc = "The internal registers are loaded with the values from their buffers when the PDB counter (CNT) = MOD + 1 CNT delay elapsed, after 1 is written to LDOK."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(LDMODW::_01)
            }
            #[doc = "The internal registers are loaded with the values from their buffers when a trigger input event is detected, after 1 is written to LDOK."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(LDMODW::_10)
            }
            #[doc = "The internal registers are loaded with the values from their buffers when either the PDB counter (CNT) = MOD + 1 CNT delay elapsed, or a trigger input event is detected, after 1 is written to LDOK."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(LDMODW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Load OK"]
            #[inline(always)]
            pub fn ldok(&self) -> LDOKR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                LDOKR { bits }
            }
            #[doc = "Bit 1 - Continuous Mode Enable"]
            #[inline(always)]
            pub fn cont(&self) -> CONTR {
                CONTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 2:3 - Multiplication Factor Select for Prescaler"]
            #[inline(always)]
            pub fn mult(&self) -> MULTR {
                MULTR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 5 - PDB Interrupt Enable"]
            #[inline(always)]
            pub fn pdbie(&self) -> PDBIER {
                PDBIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - PDB Interrupt Flag"]
            #[inline(always)]
            pub fn pdbif(&self) -> PDBIFR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                PDBIFR { bits }
            }
            #[doc = "Bit 7 - PDB Enable"]
            #[inline(always)]
            pub fn pdben(&self) -> PDBENR {
                PDBENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:11 - Trigger Input Source Select"]
            #[inline(always)]
            pub fn trgsel(&self) -> TRGSELR {
                TRGSELR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 12:14 - Prescaler Divider Select"]
            #[inline(always)]
            pub fn prescaler(&self) -> PRESCALERR {
                PRESCALERR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - DMA Enable"]
            #[inline(always)]
            pub fn dmaen(&self) -> DMAENR {
                DMAENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - PDB Sequence Error Interrupt Enable"]
            #[inline(always)]
            pub fn pdbeie(&self) -> PDBEIER {
                PDBEIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 18:19 - Load Mode Select"]
            #[inline(always)]
            pub fn ldmod(&self) -> LDMODR {
                LDMODR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Load OK"]
            #[inline(always)]
            pub fn ldok(&mut self) -> _LDOKW {
                _LDOKW { w: self }
            }
            #[doc = "Bit 1 - Continuous Mode Enable"]
            #[inline(always)]
            pub fn cont(&mut self) -> _CONTW {
                _CONTW { w: self }
            }
            #[doc = "Bits 2:3 - Multiplication Factor Select for Prescaler"]
            #[inline(always)]
            pub fn mult(&mut self) -> _MULTW {
                _MULTW { w: self }
            }
            #[doc = "Bit 5 - PDB Interrupt Enable"]
            #[inline(always)]
            pub fn pdbie(&mut self) -> _PDBIEW {
                _PDBIEW { w: self }
            }
            #[doc = "Bit 6 - PDB Interrupt Flag"]
            #[inline(always)]
            pub fn pdbif(&mut self) -> _PDBIFW {
                _PDBIFW { w: self }
            }
            #[doc = "Bit 7 - PDB Enable"]
            #[inline(always)]
            pub fn pdben(&mut self) -> _PDBENW {
                _PDBENW { w: self }
            }
            #[doc = "Bits 8:11 - Trigger Input Source Select"]
            #[inline(always)]
            pub fn trgsel(&mut self) -> _TRGSELW {
                _TRGSELW { w: self }
            }
            #[doc = "Bits 12:14 - Prescaler Divider Select"]
            #[inline(always)]
            pub fn prescaler(&mut self) -> _PRESCALERW {
                _PRESCALERW { w: self }
            }
            #[doc = "Bit 15 - DMA Enable"]
            #[inline(always)]
            pub fn dmaen(&mut self) -> _DMAENW {
                _DMAENW { w: self }
            }
            #[doc = "Bit 16 - Software Trigger"]
            #[inline(always)]
            pub fn swtrig(&mut self) -> _SWTRIGW {
                _SWTRIGW { w: self }
            }
            #[doc = "Bit 17 - PDB Sequence Error Interrupt Enable"]
            #[inline(always)]
            pub fn pdbeie(&mut self) -> _PDBEIEW {
                _PDBEIEW { w: self }
            }
            #[doc = "Bits 18:19 - Load Mode Select"]
            #[inline(always)]
            pub fn ldmod(&mut self) -> _LDMODW {
                _LDMODW { w: self }
            }
        }
    }
    #[doc = "Modulus register"]
    pub struct MOD {
        register: VolatileCell<u32>,
    }
    #[doc = "Modulus register"]
    pub mod mod_ {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::MOD {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MODR {
            bits: u16,
        }
        impl MODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MODW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - PDB Modulus"]
            #[inline(always)]
            pub fn mod_(&self) -> MODR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                MODR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 65535 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - PDB Modulus"]
            #[inline(always)]
            pub fn mod_(&mut self) -> _MODW {
                _MODW { w: self }
            }
        }
    }
    #[doc = "Counter register"]
    pub struct CNT {
        register: VolatileCell<u32>,
    }
    #[doc = "Counter register"]
    pub mod cnt {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::CNT {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct CNTR {
            bits: u16,
        }
        impl CNTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - PDB Counter"]
            #[inline(always)]
            pub fn cnt(&self) -> CNTR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                CNTR { bits }
            }
        }
    }
    #[doc = "Interrupt Delay register"]
    pub struct IDLY {
        register: VolatileCell<u32>,
    }
    #[doc = "Interrupt Delay register"]
    pub mod idly {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::IDLY {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct IDLYR {
            bits: u16,
        }
        impl IDLYR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _IDLYW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IDLYW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - PDB Interrupt Delay"]
            #[inline(always)]
            pub fn idly(&self) -> IDLYR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                IDLYR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 65535 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - PDB Interrupt Delay"]
            #[inline(always)]
            pub fn idly(&mut self) -> _IDLYW {
                _IDLYW { w: self }
            }
        }
    }
    #[doc = "Channel n Control register 1"]
    pub struct CHC1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel n Control register 1"]
    pub mod chc1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CHC1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ENR {
            #[doc = "PDB channel's corresponding pre-trigger disabled."]
            _0,
            #[doc = "PDB channel's corresponding pre-trigger enabled."]
            _1,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl ENR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    ENR::_0 => 0,
                    ENR::_1 => 1,
                    ENR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> ENR {
                match value {
                    0 => ENR::_0,
                    1 => ENR::_1,
                    i => ENR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ENR::_1
            }
        }
        #[doc = "Possible values of the field `TOS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TOSR {
            #[doc = "PDB channel's corresponding pre-trigger is in bypassed mode. The pre-trigger asserts one peripheral clock cycle after a rising edge is detected on selected trigger input source or software trigger is selected and SWTRIG is written with 1."]
            _0,
            #[doc = "PDB channel's corresponding pre-trigger asserts when the counter reaches the channel delay register and one peripheral clock cycle after a rising edge is detected on selected trigger input source or software trigger is selected and SETRIG is written with 1."]
            _1,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl TOSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TOSR::_0 => 0,
                    TOSR::_1 => 1,
                    TOSR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TOSR {
                match value {
                    0 => TOSR::_0,
                    1 => TOSR::_1,
                    i => TOSR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TOSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TOSR::_1
            }
        }
        #[doc = "Possible values of the field `BB`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BBR {
            #[doc = "PDB channel's corresponding pre-trigger back-to-back operation disabled."]
            _0,
            #[doc = "PDB channel's corresponding pre-trigger back-to-back operation enabled."]
            _1,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl BBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    BBR::_0 => 0,
                    BBR::_1 => 1,
                    BBR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> BBR {
                match value {
                    0 => BBR::_0,
                    1 => BBR::_1,
                    i => BBR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BBR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BBR::_1
            }
        }
        #[doc = "Values that can be written to the field `EN`"]
        pub enum ENW {
            #[doc = "PDB channel's corresponding pre-trigger disabled."]
            _0,
            #[doc = "PDB channel's corresponding pre-trigger enabled."]
            _1,
        }
        impl ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    ENW::_0 => 0,
                    ENW::_1 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ENW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "PDB channel's corresponding pre-trigger disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ENW::_0)
            }
            #[doc = "PDB channel's corresponding pre-trigger enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ENW::_1)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TOS`"]
        pub enum TOSW {
            #[doc = "PDB channel's corresponding pre-trigger is in bypassed mode. The pre-trigger asserts one peripheral clock cycle after a rising edge is detected on selected trigger input source or software trigger is selected and SWTRIG is written with 1."]
            _0,
            #[doc = "PDB channel's corresponding pre-trigger asserts when the counter reaches the channel delay register and one peripheral clock cycle after a rising edge is detected on selected trigger input source or software trigger is selected and SETRIG is written with 1."]
            _1,
        }
        impl TOSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TOSW::_0 => 0,
                    TOSW::_1 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TOSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TOSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TOSW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "PDB channel's corresponding pre-trigger is in bypassed mode. The pre-trigger asserts one peripheral clock cycle after a rising edge is detected on selected trigger input source or software trigger is selected and SWTRIG is written with 1."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TOSW::_0)
            }
            #[doc = "PDB channel's corresponding pre-trigger asserts when the counter reaches the channel delay register and one peripheral clock cycle after a rising edge is detected on selected trigger input source or software trigger is selected and SETRIG is written with 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TOSW::_1)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BB`"]
        pub enum BBW {
            #[doc = "PDB channel's corresponding pre-trigger back-to-back operation disabled."]
            _0,
            #[doc = "PDB channel's corresponding pre-trigger back-to-back operation enabled."]
            _1,
        }
        impl BBW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    BBW::_0 => 0,
                    BBW::_1 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BBW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BBW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "PDB channel's corresponding pre-trigger back-to-back operation disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BBW::_0)
            }
            #[doc = "PDB channel's corresponding pre-trigger back-to-back operation enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BBW::_1)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - PDB Channel Pre-Trigger Enable"]
            #[inline(always)]
            pub fn en(&self) -> ENR {
                ENR::_from({
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 8:15 - PDB Channel Pre-Trigger Output Select"]
            #[inline(always)]
            pub fn tos(&self) -> TOSR {
                TOSR::_from({
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 16:23 - PDB Channel Pre-Trigger Back-to-Back Operation Enable"]
            #[inline(always)]
            pub fn bb(&self) -> BBR {
                BBR::_from({
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - PDB Channel Pre-Trigger Enable"]
            #[inline(always)]
            pub fn en(&mut self) -> _ENW {
                _ENW { w: self }
            }
            #[doc = "Bits 8:15 - PDB Channel Pre-Trigger Output Select"]
            #[inline(always)]
            pub fn tos(&mut self) -> _TOSW {
                _TOSW { w: self }
            }
            #[doc = "Bits 16:23 - PDB Channel Pre-Trigger Back-to-Back Operation Enable"]
            #[inline(always)]
            pub fn bb(&mut self) -> _BBW {
                _BBW { w: self }
            }
        }
    }
    #[doc = "Channel n Status register"]
    pub struct CHS {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel n Status register"]
    pub mod chs {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CHS {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `ERR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERRR {
            #[doc = "Sequence error not detected on PDB channel's corresponding pre-trigger."]
            _0,
            #[doc = "Sequence error detected on PDB channel's corresponding pre-trigger. ADCn block can be triggered for a conversion by one pre-trigger from PDB channel n. When one conversion, which is triggered by one of the pre-triggers from PDB channel n, is in progress, new trigger from PDB channel's corresponding pre-trigger m cannot be accepted by ADCn, and ERR[m] is set. Writing 0's to clear the sequence error flags."]
            _1,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl ERRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    ERRR::_0 => 0,
                    ERRR::_1 => 1,
                    ERRR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> ERRR {
                match value {
                    0 => ERRR::_0,
                    1 => ERRR::_1,
                    i => ERRR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERRR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct CFR {
            bits: u8,
        }
        impl CFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Values that can be written to the field `ERR`"]
        pub enum ERRW {
            #[doc = "Sequence error not detected on PDB channel's corresponding pre-trigger."]
            _0,
            #[doc = "Sequence error detected on PDB channel's corresponding pre-trigger. ADCn block can be triggered for a conversion by one pre-trigger from PDB channel n. When one conversion, which is triggered by one of the pre-triggers from PDB channel n, is in progress, new trigger from PDB channel's corresponding pre-trigger m cannot be accepted by ADCn, and ERR[m] is set. Writing 0's to clear the sequence error flags."]
            _1,
        }
        impl ERRW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    ERRW::_0 => 0,
                    ERRW::_1 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERRW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERRW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Sequence error not detected on PDB channel's corresponding pre-trigger."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERRW::_0)
            }
            #[doc = "Sequence error detected on PDB channel's corresponding pre-trigger. ADCn block can be triggered for a conversion by one pre-trigger from PDB channel n. When one conversion, which is triggered by one of the pre-triggers from PDB channel n, is in progress, new trigger from PDB channel's corresponding pre-trigger m cannot be accepted by ADCn, and ERR[m] is set. Writing 0's to clear the sequence error flags."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERRW::_1)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - PDB Channel Sequence Error Flags"]
            #[inline(always)]
            pub fn err(&self) -> ERRR {
                ERRR::_from({
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 16:23 - PDB Channel Flags"]
            #[inline(always)]
            pub fn cf(&self) -> CFR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CFR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - PDB Channel Sequence Error Flags"]
            #[inline(always)]
            pub fn err(&mut self) -> _ERRW {
                _ERRW { w: self }
            }
            #[doc = "Bits 16:23 - PDB Channel Flags"]
            #[inline(always)]
            pub fn cf(&mut self) -> _CFW {
                _CFW { w: self }
            }
        }
    }
    #[doc = "Channel n Delay 0 register"]
    pub struct CHDLY0 {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel n Delay 0 register"]
    pub mod chdly0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CHDLY0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLYR {
            bits: u16,
        }
        impl DLYR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DLYW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DLYW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - PDB Channel Delay"]
            #[inline(always)]
            pub fn dly(&self) -> DLYR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                DLYR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - PDB Channel Delay"]
            #[inline(always)]
            pub fn dly(&mut self) -> _DLYW {
                _DLYW { w: self }
            }
        }
    }
    #[doc = "Channel n Delay 1 register"]
    pub struct CHDLY1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel n Delay 1 register"]
    pub mod chdly1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CHDLY1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLYR {
            bits: u16,
        }
        impl DLYR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DLYW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DLYW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - PDB Channel Delay"]
            #[inline(always)]
            pub fn dly(&self) -> DLYR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                DLYR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - PDB Channel Delay"]
            #[inline(always)]
            pub fn dly(&mut self) -> _DLYW {
                _DLYW { w: self }
            }
        }
    }
    #[doc = "Channel n Delay 2 register"]
    pub struct CHDLY2 {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel n Delay 2 register"]
    pub mod chdly2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CHDLY2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLYR {
            bits: u16,
        }
        impl DLYR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DLYW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DLYW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - PDB Channel Delay"]
            #[inline(always)]
            pub fn dly(&self) -> DLYR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                DLYR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - PDB Channel Delay"]
            #[inline(always)]
            pub fn dly(&mut self) -> _DLYW {
                _DLYW { w: self }
            }
        }
    }
    #[doc = "Channel n Delay 3 register"]
    pub struct CHDLY3 {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel n Delay 3 register"]
    pub mod chdly3 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CHDLY3 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLYR {
            bits: u16,
        }
        impl DLYR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DLYW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DLYW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - PDB Channel Delay"]
            #[inline(always)]
            pub fn dly(&self) -> DLYR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                DLYR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - PDB Channel Delay"]
            #[inline(always)]
            pub fn dly(&mut self) -> _DLYW {
                _DLYW { w: self }
            }
        }
    }
    #[doc = "Channel n Delay 4 register"]
    pub struct CHDLY4 {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel n Delay 4 register"]
    pub mod chdly4 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CHDLY4 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLYR {
            bits: u16,
        }
        impl DLYR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DLYW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DLYW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - PDB Channel Delay"]
            #[inline(always)]
            pub fn dly(&self) -> DLYR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                DLYR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - PDB Channel Delay"]
            #[inline(always)]
            pub fn dly(&mut self) -> _DLYW {
                _DLYW { w: self }
            }
        }
    }
    #[doc = "Channel n Delay 5 register"]
    pub struct CHDLY5 {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel n Delay 5 register"]
    pub mod chdly5 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CHDLY5 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLYR {
            bits: u16,
        }
        impl DLYR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DLYW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DLYW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - PDB Channel Delay"]
            #[inline(always)]
            pub fn dly(&self) -> DLYR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                DLYR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - PDB Channel Delay"]
            #[inline(always)]
            pub fn dly(&mut self) -> _DLYW {
                _DLYW { w: self }
            }
        }
    }
    #[doc = "Channel n Delay 6 register"]
    pub struct CHDLY6 {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel n Delay 6 register"]
    pub mod chdly6 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CHDLY6 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLYR {
            bits: u16,
        }
        impl DLYR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DLYW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DLYW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - PDB Channel Delay"]
            #[inline(always)]
            pub fn dly(&self) -> DLYR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                DLYR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - PDB Channel Delay"]
            #[inline(always)]
            pub fn dly(&mut self) -> _DLYW {
                _DLYW { w: self }
            }
        }
    }
    #[doc = "Channel n Delay 7 register"]
    pub struct CHDLY7 {
        register: VolatileCell<u32>,
    }
    #[doc = "Channel n Delay 7 register"]
    pub mod chdly7 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CHDLY7 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLYR {
            bits: u16,
        }
        impl DLYR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DLYW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DLYW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - PDB Channel Delay"]
            #[inline(always)]
            pub fn dly(&self) -> DLYR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                DLYR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - PDB Channel Delay"]
            #[inline(always)]
            pub fn dly(&mut self) -> _DLYW {
                _DLYW { w: self }
            }
        }
    }
    #[doc = "Pulse-Out n Enable register"]
    pub struct POEN {
        register: VolatileCell<u32>,
    }
    #[doc = "Pulse-Out n Enable register"]
    pub mod poen {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::POEN {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `POEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum POENR {
            #[doc = "PDB Pulse-Out disabled"]
            _0,
            #[doc = "PDB Pulse-Out enabled"]
            _1,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl POENR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    POENR::_0 => 0,
                    POENR::_1 => 1,
                    POENR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> POENR {
                match value {
                    0 => POENR::_0,
                    1 => POENR::_1,
                    i => POENR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == POENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == POENR::_1
            }
        }
        #[doc = "Values that can be written to the field `POEN`"]
        pub enum POENW {
            #[doc = "PDB Pulse-Out disabled"]
            _0,
            #[doc = "PDB Pulse-Out enabled"]
            _1,
        }
        impl POENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    POENW::_0 => 0,
                    POENW::_1 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _POENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _POENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: POENW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "PDB Pulse-Out disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(POENW::_0)
            }
            #[doc = "PDB Pulse-Out enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(POENW::_1)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - PDB Pulse-Out Enable"]
            #[inline(always)]
            pub fn poen(&self) -> POENR {
                POENR::_from({
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - PDB Pulse-Out Enable"]
            #[inline(always)]
            pub fn poen(&mut self) -> _POENW {
                _POENW { w: self }
            }
        }
    }
    #[doc = "Pulse-Out n Delay register"]
    pub struct PODLY {
        register: VolatileCell<u32>,
    }
    #[doc = "Pulse-Out n Delay register"]
    pub mod podly {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PODLY {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLY2R {
            bits: u16,
        }
        impl DLY2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLY1R {
            bits: u16,
        }
        impl DLY1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DLY2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DLY2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DLY1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DLY1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - PDB Pulse-Out Delay 2"]
            #[inline(always)]
            pub fn dly2(&self) -> DLY2R {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                DLY2R { bits }
            }
            #[doc = "Bits 16:31 - PDB Pulse-Out Delay 1"]
            #[inline(always)]
            pub fn dly1(&self) -> DLY1R {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                DLY1R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - PDB Pulse-Out Delay 2"]
            #[inline(always)]
            pub fn dly2(&mut self) -> _DLY2W {
                _DLY2W { w: self }
            }
            #[doc = "Bits 16:31 - PDB Pulse-Out Delay 1"]
            #[inline(always)]
            pub fn dly1(&mut self) -> _DLY1W {
                _DLY1W { w: self }
            }
        }
    }
    #[doc = "PDB1_DLY2 register."]
    pub struct DLY2 {
        register: VolatileCell<u16>,
    }
    #[doc = "PDB1_DLY2 register."]
    pub mod dly2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::DLY2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLY2R {
            bits: u16,
        }
        impl DLY2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DLY2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DLY2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:15 - DLY2"]
            #[inline(always)]
            pub fn dly2(&self) -> DLY2R {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                DLY2R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - DLY2"]
            #[inline(always)]
            pub fn dly2(&mut self) -> _DLY2W {
                _DLY2W { w: self }
            }
        }
    }
    #[doc = "PDB1_DLY1 register."]
    pub struct DLY1 {
        register: VolatileCell<u16>,
    }
    #[doc = "PDB1_DLY1 register."]
    pub mod dly1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::DLY1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DLY1R {
            bits: u16,
        }
        impl DLY1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DLY1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _DLY1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:15 - DLY1"]
            #[inline(always)]
            pub fn dly1(&self) -> DLY1R {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                DLY1R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 65535 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - DLY1"]
            #[inline(always)]
            pub fn dly1(&mut self) -> _DLY1W {
                _DLY1W { w: self }
            }
        }
    }
}
#[doc = "Programmable Delay Block"]
pub struct PDB1 {
    register_block: pdb1::RegisterBlock,
}
impl Deref for PDB1 {
    type Target = pdb1::RegisterBlock;
    fn deref(&self) -> &pdb1::RegisterBlock {
        &self.register_block
    }
}
#[doc = "Cyclic Redundancy Check"]
pub const CRC: Peripheral<CRC> = unsafe { Peripheral::new(1073946624) };
#[doc = "Cyclic Redundancy Check"]
pub mod crc {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - CRC Data register"]
        pub data: DATA,
        #[doc = "0x04 - CRC Polynomial register"]
        pub gpoly: GPOLY,
        #[doc = "0x08 - CRC Control register"]
        pub ctrl: CTRL,
    }
    #[doc = "CRC Data register"]
    pub struct DATA {
        register: VolatileCell<u32>,
    }
    #[doc = "CRC Data register"]
    pub mod data {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::DATA {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct LLR {
            bits: u8,
        }
        impl LLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct LUR {
            bits: u8,
        }
        impl LUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct HLR {
            bits: u8,
        }
        impl HLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct HUR {
            bits: u8,
        }
        impl HUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _LLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _LUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _HLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _HUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - CRC Low Lower Byte"]
            #[inline(always)]
            pub fn ll(&self) -> LLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                LLR { bits }
            }
            #[doc = "Bits 8:15 - CRC Low Upper Byte"]
            #[inline(always)]
            pub fn lu(&self) -> LUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                LUR { bits }
            }
            #[doc = "Bits 16:23 - CRC High Lower Byte"]
            #[inline(always)]
            pub fn hl(&self) -> HLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                HLR { bits }
            }
            #[doc = "Bits 24:31 - CRC High Upper Byte"]
            #[inline(always)]
            pub fn hu(&self) -> HUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                HUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 4294967295 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CRC Low Lower Byte"]
            #[inline(always)]
            pub fn ll(&mut self) -> _LLW {
                _LLW { w: self }
            }
            #[doc = "Bits 8:15 - CRC Low Upper Byte"]
            #[inline(always)]
            pub fn lu(&mut self) -> _LUW {
                _LUW { w: self }
            }
            #[doc = "Bits 16:23 - CRC High Lower Byte"]
            #[inline(always)]
            pub fn hl(&mut self) -> _HLW {
                _HLW { w: self }
            }
            #[doc = "Bits 24:31 - CRC High Upper Byte"]
            #[inline(always)]
            pub fn hu(&mut self) -> _HUW {
                _HUW { w: self }
            }
        }
    }
    #[doc = "CRC_DATAL register."]
    pub struct DATAL {
        register: VolatileCell<u16>,
    }
    #[doc = "CRC_DATAL register."]
    pub mod datal {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::DATAL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATALR {
            bits: u16,
        }
        impl DATALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATALW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:15 - DATAL stores the lower 16 bits of the 16/32 bit CRC"]
            #[inline(always)]
            pub fn datal(&self) -> DATALR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                DATALR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 65535 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - DATAL stores the lower 16 bits of the 16/32 bit CRC"]
            #[inline(always)]
            pub fn datal(&mut self) -> _DATALW {
                _DATALW { w: self }
            }
        }
    }
    #[doc = "CRC_DATALL register."]
    pub struct DATALL {
        register: VolatileCell<u8>,
    }
    #[doc = "CRC_DATALL register."]
    pub mod datall {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::DATALL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATALLR {
            bits: u8,
        }
        impl DATALLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATALLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATALLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit DATA"]
            #[inline(always)]
            pub fn datall(&self) -> DATALLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                DATALLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 255 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - CRCLL stores the first 8 bits of the 32 bit DATA"]
            #[inline(always)]
            pub fn datall(&mut self) -> _DATALLW {
                _DATALLW { w: self }
            }
        }
    }
    #[doc = "CRC_DATALU register."]
    pub struct DATALU {
        register: VolatileCell<u8>,
    }
    #[doc = "CRC_DATALU register."]
    pub mod datalu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::DATALU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATALUR {
            bits: u8,
        }
        impl DATALUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATALUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATALUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - DATALL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn datalu(&self) -> DATALUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                DATALUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 255 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - DATALL stores the second 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn datalu(&mut self) -> _DATALUW {
                _DATALUW { w: self }
            }
        }
    }
    #[doc = "CRC_DATAH register."]
    pub struct DATAH {
        register: VolatileCell<u16>,
    }
    #[doc = "CRC_DATAH register."]
    pub mod datah {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u16,
        }
        impl super::DATAH {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATAHR {
            bits: u16,
        }
        impl DATAHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATAHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATAHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u16) << OFFSET);
                self.w.bits |= ((value & MASK) as u16) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:15 - DATAH stores the high 16 bits of the 16/32 bit CRC"]
            #[inline(always)]
            pub fn datah(&self) -> DATAHR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u16
                };
                DATAHR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 65535 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - DATAH stores the high 16 bits of the 16/32 bit CRC"]
            #[inline(always)]
            pub fn datah(&mut self) -> _DATAHW {
                _DATAHW { w: self }
            }
        }
    }
    #[doc = "CRC_DATAHL register."]
    pub struct DATAHL {
        register: VolatileCell<u8>,
    }
    #[doc = "CRC_DATAHL register."]
    pub mod datahl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::DATAHL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATAHLR {
            bits: u8,
        }
        impl DATAHLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATAHLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATAHLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - DATAHL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn datahl(&self) -> DATAHLR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                DATAHLR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 255 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - DATAHL stores the third 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn datahl(&mut self) -> _DATAHLW {
                _DATAHLW { w: self }
            }
        }
    }
    #[doc = "CRC_DATAHU register."]
    pub struct DATAHU {
        register: VolatileCell<u8>,
    }
    #[doc = "CRC_DATAHU register."]
    pub mod datahu {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::DATAHU {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATAHUR {
            bits: u8,
        }
        impl DATAHUR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATAHUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATAHUW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:7 - DATAHU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn datahu(&self) -> DATAHUR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                DATAHUR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 255 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - DATAHU stores the fourth 8 bits of the 32 bit CRC"]
            #[inline(always)]
            pub fn datahu(&mut self) -> _DATAHUW {
                _DATAHUW { w: self }
            }
        }
    }
    #[doc = "CRC Polynomial register"]
    pub struct GPOLY {
        register: VolatileCell<u32>,
    }
    #[doc = "CRC Polynomial register"]
    pub mod gpoly {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::GPOLY {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct LOWR {
            bits: u16,
        }
        impl LOWR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct HIGHR {
            bits: u16,
        }
        impl HIGHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _LOWW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LOWW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _HIGHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HIGHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Low Polynominal Half-word"]
            #[inline(always)]
            pub fn low(&self) -> LOWR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                LOWR { bits }
            }
            #[doc = "Bits 16:31 - High Polynominal Half-word"]
            #[inline(always)]
            pub fn high(&self) -> HIGHR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                HIGHR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 4129 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Low Polynominal Half-word"]
            #[inline(always)]
            pub fn low(&mut self) -> _LOWW {
                _LOWW { w: self }
            }
            #[doc = "Bits 16:31 - High Polynominal Half-word"]
            #[inline(always)]
            pub fn high(&mut self) -> _HIGHW {
                _HIGHW { w: self }
            }
        }
    }
    #[doc = "CRC Control register"]
    pub struct CTRL {
        register: VolatileCell<u32>,
    }
    #[doc = "CRC Control register"]
    pub mod ctrl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CTRL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TCRC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TCRCR {
            #[doc = "16-bit CRC protocol."]
            _0,
            #[doc = "32-bit CRC protocol."]
            _1,
        }
        impl TCRCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TCRCR::_0 => false,
                    TCRCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TCRCR {
                match value {
                    false => TCRCR::_0,
                    true => TCRCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TCRCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TCRCR::_1
            }
        }
        #[doc = "Possible values of the field `WAS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WASR {
            #[doc = "Writes to the CRC data register are data values."]
            _0,
            #[doc = "Writes to the CRC data register are seed values."]
            _1,
        }
        impl WASR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WASR::_0 => false,
                    WASR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WASR {
                match value {
                    false => WASR::_0,
                    true => WASR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WASR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WASR::_1
            }
        }
        #[doc = "Possible values of the field `FXOR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FXORR {
            #[doc = "No XOR on reading."]
            _0,
            #[doc = "Invert or complement the read value of the CRC Data register."]
            _1,
        }
        impl FXORR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FXORR::_0 => false,
                    FXORR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FXORR {
                match value {
                    false => FXORR::_0,
                    true => FXORR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FXORR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FXORR::_1
            }
        }
        #[doc = "Possible values of the field `TOTR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TOTRR {
            #[doc = "No transposition."]
            _00,
            #[doc = "Bits in bytes are transposed; bytes are not transposed."]
            _01,
            #[doc = "Both bits in bytes and bytes are transposed."]
            _10,
            #[doc = "Only bytes are transposed; no bits in a byte are transposed."]
            _11,
        }
        impl TOTRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TOTRR::_00 => 0,
                    TOTRR::_01 => 1,
                    TOTRR::_10 => 2,
                    TOTRR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TOTRR {
                match value {
                    0 => TOTRR::_00,
                    1 => TOTRR::_01,
                    2 => TOTRR::_10,
                    3 => TOTRR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == TOTRR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == TOTRR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == TOTRR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == TOTRR::_11
            }
        }
        #[doc = "Possible values of the field `TOT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TOTR {
            #[doc = "No transposition."]
            _00,
            #[doc = "Bits in bytes are transposed; bytes are not transposed."]
            _01,
            #[doc = "Both bits in bytes and bytes are transposed."]
            _10,
            #[doc = "Only bytes are transposed; no bits in a byte are transposed."]
            _11,
        }
        impl TOTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TOTR::_00 => 0,
                    TOTR::_01 => 1,
                    TOTR::_10 => 2,
                    TOTR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TOTR {
                match value {
                    0 => TOTR::_00,
                    1 => TOTR::_01,
                    2 => TOTR::_10,
                    3 => TOTR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == TOTR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == TOTR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == TOTR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == TOTR::_11
            }
        }
        #[doc = "Values that can be written to the field `TCRC`"]
        pub enum TCRCW {
            #[doc = "16-bit CRC protocol."]
            _0,
            #[doc = "32-bit CRC protocol."]
            _1,
        }
        impl TCRCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TCRCW::_0 => false,
                    TCRCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TCRCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TCRCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TCRCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "16-bit CRC protocol."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TCRCW::_0)
            }
            #[doc = "32-bit CRC protocol."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TCRCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WAS`"]
        pub enum WASW {
            #[doc = "Writes to the CRC data register are data values."]
            _0,
            #[doc = "Writes to the CRC data register are seed values."]
            _1,
        }
        impl WASW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WASW::_0 => false,
                    WASW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WASW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WASW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WASW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Writes to the CRC data register are data values."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WASW::_0)
            }
            #[doc = "Writes to the CRC data register are seed values."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WASW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 25;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FXOR`"]
        pub enum FXORW {
            #[doc = "No XOR on reading."]
            _0,
            #[doc = "Invert or complement the read value of the CRC Data register."]
            _1,
        }
        impl FXORW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FXORW::_0 => false,
                    FXORW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FXORW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FXORW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FXORW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No XOR on reading."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FXORW::_0)
            }
            #[doc = "Invert or complement the read value of the CRC Data register."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FXORW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 26;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TOTR`"]
        pub enum TOTRW {
            #[doc = "No transposition."]
            _00,
            #[doc = "Bits in bytes are transposed; bytes are not transposed."]
            _01,
            #[doc = "Both bits in bytes and bytes are transposed."]
            _10,
            #[doc = "Only bytes are transposed; no bits in a byte are transposed."]
            _11,
        }
        impl TOTRW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TOTRW::_00 => 0,
                    TOTRW::_01 => 1,
                    TOTRW::_10 => 2,
                    TOTRW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TOTRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TOTRW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TOTRW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "No transposition."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(TOTRW::_00)
            }
            #[doc = "Bits in bytes are transposed; bytes are not transposed."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(TOTRW::_01)
            }
            #[doc = "Both bits in bytes and bytes are transposed."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(TOTRW::_10)
            }
            #[doc = "Only bytes are transposed; no bits in a byte are transposed."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(TOTRW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 28;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TOT`"]
        pub enum TOTW {
            #[doc = "No transposition."]
            _00,
            #[doc = "Bits in bytes are transposed; bytes are not transposed."]
            _01,
            #[doc = "Both bits in bytes and bytes are transposed."]
            _10,
            #[doc = "Only bytes are transposed; no bits in a byte are transposed."]
            _11,
        }
        impl TOTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TOTW::_00 => 0,
                    TOTW::_01 => 1,
                    TOTW::_10 => 2,
                    TOTW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TOTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TOTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TOTW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "No transposition."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(TOTW::_00)
            }
            #[doc = "Bits in bytes are transposed; bytes are not transposed."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(TOTW::_01)
            }
            #[doc = "Both bits in bytes and bytes are transposed."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(TOTW::_10)
            }
            #[doc = "Only bytes are transposed; no bits in a byte are transposed."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(TOTW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 24 - TCRC"]
            #[inline(always)]
            pub fn tcrc(&self) -> TCRCR {
                TCRCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 25 - Write CRC Data Register As Seed"]
            #[inline(always)]
            pub fn was(&self) -> WASR {
                WASR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 25;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 26 - Complement Read Of CRC Data Register"]
            #[inline(always)]
            pub fn fxor(&self) -> FXORR {
                FXORR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 26;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 28:29 - Type Of Transpose For Read"]
            #[inline(always)]
            pub fn totr(&self) -> TOTRR {
                TOTRR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 28;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 30:31 - Type Of Transpose For Writes"]
            #[inline(always)]
            pub fn tot(&self) -> TOTR {
                TOTR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 24 - TCRC"]
            #[inline(always)]
            pub fn tcrc(&mut self) -> _TCRCW {
                _TCRCW { w: self }
            }
            #[doc = "Bit 25 - Write CRC Data Register As Seed"]
            #[inline(always)]
            pub fn was(&mut self) -> _WASW {
                _WASW { w: self }
            }
            #[doc = "Bit 26 - Complement Read Of CRC Data Register"]
            #[inline(always)]
            pub fn fxor(&mut self) -> _FXORW {
                _FXORW { w: self }
            }
            #[doc = "Bits 28:29 - Type Of Transpose For Read"]
            #[inline(always)]
            pub fn totr(&mut self) -> _TOTRW {
                _TOTRW { w: self }
            }
            #[doc = "Bits 30:31 - Type Of Transpose For Writes"]
            #[inline(always)]
            pub fn tot(&mut self) -> _TOTW {
                _TOTW { w: self }
            }
        }
    }
}
#[doc = "Cyclic Redundancy Check"]
pub struct CRC {
    register_block: crc::RegisterBlock,
}
impl Deref for CRC {
    type Target = crc::RegisterBlock;
    fn deref(&self) -> &crc::RegisterBlock {
        &self.register_block
    }
}
#[doc = "Low Power Periodic Interrupt Timer (LPIT)"]
pub const LPIT0: Peripheral<LPIT0> = unsafe { Peripheral::new(1073967104) };
#[doc = "Low Power Periodic Interrupt Timer (LPIT)"]
pub mod lpit0 {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - Version ID Register"]
        pub verid: VERID,
        #[doc = "0x04 - Parameter Register"]
        pub param: PARAM,
        #[doc = "0x08 - Module Control Register"]
        pub mcr: MCR,
        #[doc = "0x0c - Module Status Register"]
        pub msr: MSR,
        #[doc = "0x10 - Module Interrupt Enable Register"]
        pub mier: MIER,
        #[doc = "0x14 - Set Timer Enable Register"]
        pub setten: SETTEN,
        #[doc = "0x18 - Clear Timer Enable Register"]
        pub clrten: CLRTEN,
        _reserved0: [u8; 4usize],
        #[doc = "0x20 - Timer Value Register"]
        pub tval0: TVAL0,
        #[doc = "0x24 - Current Timer Value"]
        pub cval0: CVAL0,
        #[doc = "0x28 - Timer Control Register"]
        pub tctrl0: TCTRL0,
        _reserved1: [u8; 4usize],
        #[doc = "0x30 - Timer Value Register"]
        pub tval1: TVAL1,
        #[doc = "0x34 - Current Timer Value"]
        pub cval1: CVAL1,
        #[doc = "0x38 - Timer Control Register"]
        pub tctrl1: TCTRL1,
        _reserved2: [u8; 4usize],
        #[doc = "0x40 - Timer Value Register"]
        pub tval2: TVAL2,
        #[doc = "0x44 - Current Timer Value"]
        pub cval2: CVAL2,
        #[doc = "0x48 - Timer Control Register"]
        pub tctrl2: TCTRL2,
        _reserved3: [u8; 4usize],
        #[doc = "0x50 - Timer Value Register"]
        pub tval3: TVAL3,
        #[doc = "0x54 - Current Timer Value"]
        pub cval3: CVAL3,
        #[doc = "0x58 - Timer Control Register"]
        pub tctrl3: TCTRL3,
    }
    #[doc = "Version ID Register"]
    pub struct VERID {
        register: VolatileCell<u32>,
    }
    #[doc = "Version ID Register"]
    pub mod verid {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::VERID {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct FEATURER {
            bits: u16,
        }
        impl FEATURER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct MINORR {
            bits: u8,
        }
        impl MINORR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct MAJORR {
            bits: u8,
        }
        impl MAJORR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Feature Number"]
            #[inline(always)]
            pub fn feature(&self) -> FEATURER {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                FEATURER { bits }
            }
            #[doc = "Bits 16:23 - Minor Version Number"]
            #[inline(always)]
            pub fn minor(&self) -> MINORR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                MINORR { bits }
            }
            #[doc = "Bits 24:31 - Major Version Number"]
            #[inline(always)]
            pub fn major(&self) -> MAJORR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                MAJORR { bits }
            }
        }
    }
    #[doc = "Parameter Register"]
    pub struct PARAM {
        register: VolatileCell<u32>,
    }
    #[doc = "Parameter Register"]
    pub mod param {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::PARAM {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct CHANNELR {
            bits: u8,
        }
        impl CHANNELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct EXT_TRIGR {
            bits: u8,
        }
        impl EXT_TRIGR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Number of Timer Channels"]
            #[inline(always)]
            pub fn channel(&self) -> CHANNELR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CHANNELR { bits }
            }
            #[doc = "Bits 8:15 - Number of External Trigger Inputs"]
            #[inline(always)]
            pub fn ext_trig(&self) -> EXT_TRIGR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                EXT_TRIGR { bits }
            }
        }
    }
    #[doc = "Module Control Register"]
    pub struct MCR {
        register: VolatileCell<u32>,
    }
    #[doc = "Module Control Register"]
    pub mod mcr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::MCR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `M_CEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum M_CENR {
            #[doc = "Peripheral clock to timers is disabled"]
            _0,
            #[doc = "Peripheral clock to timers is enabled"]
            _1,
        }
        impl M_CENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    M_CENR::_0 => false,
                    M_CENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> M_CENR {
                match value {
                    false => M_CENR::_0,
                    true => M_CENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == M_CENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == M_CENR::_1
            }
        }
        #[doc = "Possible values of the field `SW_RST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SW_RSTR {
            #[doc = "Timer channels and registers are not reset"]
            _0,
            #[doc = "Timer channels and registers are reset"]
            _1,
        }
        impl SW_RSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SW_RSTR::_0 => false,
                    SW_RSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SW_RSTR {
                match value {
                    false => SW_RSTR::_0,
                    true => SW_RSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SW_RSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SW_RSTR::_1
            }
        }
        #[doc = "Possible values of the field `DOZE_EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DOZE_ENR {
            #[doc = "Timer channels are stopped in DOZE mode"]
            _0,
            #[doc = "Timer channels continue to run in DOZE mode"]
            _1,
        }
        impl DOZE_ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DOZE_ENR::_0 => false,
                    DOZE_ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DOZE_ENR {
                match value {
                    false => DOZE_ENR::_0,
                    true => DOZE_ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DOZE_ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DOZE_ENR::_1
            }
        }
        #[doc = "Possible values of the field `DBG_EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DBG_ENR {
            #[doc = "Timer channels are stopped in Debug mode"]
            _0,
            #[doc = "Timer channels continue to run in Debug mode"]
            _1,
        }
        impl DBG_ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DBG_ENR::_0 => false,
                    DBG_ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DBG_ENR {
                match value {
                    false => DBG_ENR::_0,
                    true => DBG_ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DBG_ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DBG_ENR::_1
            }
        }
        #[doc = "Values that can be written to the field `M_CEN`"]
        pub enum M_CENW {
            #[doc = "Peripheral clock to timers is disabled"]
            _0,
            #[doc = "Peripheral clock to timers is enabled"]
            _1,
        }
        impl M_CENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    M_CENW::_0 => false,
                    M_CENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _M_CENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _M_CENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: M_CENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Peripheral clock to timers is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(M_CENW::_0)
            }
            #[doc = "Peripheral clock to timers is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(M_CENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SW_RST`"]
        pub enum SW_RSTW {
            #[doc = "Timer channels and registers are not reset"]
            _0,
            #[doc = "Timer channels and registers are reset"]
            _1,
        }
        impl SW_RSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SW_RSTW::_0 => false,
                    SW_RSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SW_RSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SW_RSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SW_RSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Timer channels and registers are not reset"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SW_RSTW::_0)
            }
            #[doc = "Timer channels and registers are reset"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SW_RSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DOZE_EN`"]
        pub enum DOZE_ENW {
            #[doc = "Timer channels are stopped in DOZE mode"]
            _0,
            #[doc = "Timer channels continue to run in DOZE mode"]
            _1,
        }
        impl DOZE_ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DOZE_ENW::_0 => false,
                    DOZE_ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DOZE_ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DOZE_ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DOZE_ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Timer channels are stopped in DOZE mode"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DOZE_ENW::_0)
            }
            #[doc = "Timer channels continue to run in DOZE mode"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DOZE_ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DBG_EN`"]
        pub enum DBG_ENW {
            #[doc = "Timer channels are stopped in Debug mode"]
            _0,
            #[doc = "Timer channels continue to run in Debug mode"]
            _1,
        }
        impl DBG_ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DBG_ENW::_0 => false,
                    DBG_ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DBG_ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DBG_ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DBG_ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Timer channels are stopped in Debug mode"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DBG_ENW::_0)
            }
            #[doc = "Timer channels continue to run in Debug mode"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DBG_ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Module Clock Enable"]
            #[inline(always)]
            pub fn m_cen(&self) -> M_CENR {
                M_CENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Software Reset Bit"]
            #[inline(always)]
            pub fn sw_rst(&self) -> SW_RSTR {
                SW_RSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - DOZE Mode Enable Bit"]
            #[inline(always)]
            pub fn doze_en(&self) -> DOZE_ENR {
                DOZE_ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Debug Enable Bit"]
            #[inline(always)]
            pub fn dbg_en(&self) -> DBG_ENR {
                DBG_ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Module Clock Enable"]
            #[inline(always)]
            pub fn m_cen(&mut self) -> _M_CENW {
                _M_CENW { w: self }
            }
            #[doc = "Bit 1 - Software Reset Bit"]
            #[inline(always)]
            pub fn sw_rst(&mut self) -> _SW_RSTW {
                _SW_RSTW { w: self }
            }
            #[doc = "Bit 2 - DOZE Mode Enable Bit"]
            #[inline(always)]
            pub fn doze_en(&mut self) -> _DOZE_ENW {
                _DOZE_ENW { w: self }
            }
            #[doc = "Bit 3 - Debug Enable Bit"]
            #[inline(always)]
            pub fn dbg_en(&mut self) -> _DBG_ENW {
                _DBG_ENW { w: self }
            }
        }
    }
    #[doc = "Module Status Register"]
    pub struct MSR {
        register: VolatileCell<u32>,
    }
    #[doc = "Module Status Register"]
    pub mod msr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::MSR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TIF0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIF0R {
            #[doc = "Timer has not timed out"]
            _0,
            #[doc = "Timeout has occurred"]
            _1,
        }
        impl TIF0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TIF0R::_0 => false,
                    TIF0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TIF0R {
                match value {
                    false => TIF0R::_0,
                    true => TIF0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIF0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TIF0R::_1
            }
        }
        #[doc = "Possible values of the field `TIF1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIF1R {
            #[doc = "Timer has not timed out"]
            _0,
            #[doc = "Timeout has occurred"]
            _1,
        }
        impl TIF1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TIF1R::_0 => false,
                    TIF1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TIF1R {
                match value {
                    false => TIF1R::_0,
                    true => TIF1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIF1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TIF1R::_1
            }
        }
        #[doc = "Possible values of the field `TIF2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIF2R {
            #[doc = "Timer has not timed out"]
            _0,
            #[doc = "Timeout has occurred"]
            _1,
        }
        impl TIF2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TIF2R::_0 => false,
                    TIF2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TIF2R {
                match value {
                    false => TIF2R::_0,
                    true => TIF2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIF2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TIF2R::_1
            }
        }
        #[doc = "Possible values of the field `TIF3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIF3R {
            #[doc = "Timer has not timed out"]
            _0,
            #[doc = "Timeout has occurred"]
            _1,
        }
        impl TIF3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TIF3R::_0 => false,
                    TIF3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TIF3R {
                match value {
                    false => TIF3R::_0,
                    true => TIF3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIF3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TIF3R::_1
            }
        }
        #[doc = "Values that can be written to the field `TIF0`"]
        pub enum TIF0W {
            #[doc = "Timer has not timed out"]
            _0,
            #[doc = "Timeout has occurred"]
            _1,
        }
        impl TIF0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TIF0W::_0 => false,
                    TIF0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIF0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIF0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIF0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Timer has not timed out"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIF0W::_0)
            }
            #[doc = "Timeout has occurred"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TIF0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TIF1`"]
        pub enum TIF1W {
            #[doc = "Timer has not timed out"]
            _0,
            #[doc = "Timeout has occurred"]
            _1,
        }
        impl TIF1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TIF1W::_0 => false,
                    TIF1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIF1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIF1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIF1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Timer has not timed out"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIF1W::_0)
            }
            #[doc = "Timeout has occurred"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TIF1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TIF2`"]
        pub enum TIF2W {
            #[doc = "Timer has not timed out"]
            _0,
            #[doc = "Timeout has occurred"]
            _1,
        }
        impl TIF2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TIF2W::_0 => false,
                    TIF2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIF2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIF2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIF2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Timer has not timed out"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIF2W::_0)
            }
            #[doc = "Timeout has occurred"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TIF2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TIF3`"]
        pub enum TIF3W {
            #[doc = "Timer has not timed out"]
            _0,
            #[doc = "Timeout has occurred"]
            _1,
        }
        impl TIF3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TIF3W::_0 => false,
                    TIF3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIF3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIF3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIF3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Timer has not timed out"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIF3W::_0)
            }
            #[doc = "Timeout has occurred"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TIF3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Channel 0 Timer Interrupt Flag"]
            #[inline(always)]
            pub fn tif0(&self) -> TIF0R {
                TIF0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Channel 1 Timer Interrupt Flag"]
            #[inline(always)]
            pub fn tif1(&self) -> TIF1R {
                TIF1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel 2 Timer Interrupt Flag"]
            #[inline(always)]
            pub fn tif2(&self) -> TIF2R {
                TIF2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Channel 3 Timer Interrupt Flag"]
            #[inline(always)]
            pub fn tif3(&self) -> TIF3R {
                TIF3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Channel 0 Timer Interrupt Flag"]
            #[inline(always)]
            pub fn tif0(&mut self) -> _TIF0W {
                _TIF0W { w: self }
            }
            #[doc = "Bit 1 - Channel 1 Timer Interrupt Flag"]
            #[inline(always)]
            pub fn tif1(&mut self) -> _TIF1W {
                _TIF1W { w: self }
            }
            #[doc = "Bit 2 - Channel 2 Timer Interrupt Flag"]
            #[inline(always)]
            pub fn tif2(&mut self) -> _TIF2W {
                _TIF2W { w: self }
            }
            #[doc = "Bit 3 - Channel 3 Timer Interrupt Flag"]
            #[inline(always)]
            pub fn tif3(&mut self) -> _TIF3W {
                _TIF3W { w: self }
            }
        }
    }
    #[doc = "Module Interrupt Enable Register"]
    pub struct MIER {
        register: VolatileCell<u32>,
    }
    #[doc = "Module Interrupt Enable Register"]
    pub mod mier {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::MIER {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TIE0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIE0R {
            #[doc = "Interrupt generation is disabled"]
            _0,
            #[doc = "Interrupt generation is enabled"]
            _1,
        }
        impl TIE0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TIE0R::_0 => false,
                    TIE0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TIE0R {
                match value {
                    false => TIE0R::_0,
                    true => TIE0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIE0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TIE0R::_1
            }
        }
        #[doc = "Possible values of the field `TIE1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIE1R {
            #[doc = "Interrupt generation is disabled"]
            _0,
            #[doc = "Interrupt generation is enabled"]
            _1,
        }
        impl TIE1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TIE1R::_0 => false,
                    TIE1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TIE1R {
                match value {
                    false => TIE1R::_0,
                    true => TIE1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIE1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TIE1R::_1
            }
        }
        #[doc = "Possible values of the field `TIE2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIE2R {
            #[doc = "Interrupt generation is disabled"]
            _0,
            #[doc = "Interrupt generation is enabled"]
            _1,
        }
        impl TIE2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TIE2R::_0 => false,
                    TIE2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TIE2R {
                match value {
                    false => TIE2R::_0,
                    true => TIE2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIE2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TIE2R::_1
            }
        }
        #[doc = "Possible values of the field `TIE3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIE3R {
            #[doc = "Interrupt generation is disabled"]
            _0,
            #[doc = "Interrupt generation is enabled"]
            _1,
        }
        impl TIE3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TIE3R::_0 => false,
                    TIE3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TIE3R {
                match value {
                    false => TIE3R::_0,
                    true => TIE3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIE3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TIE3R::_1
            }
        }
        #[doc = "Values that can be written to the field `TIE0`"]
        pub enum TIE0W {
            #[doc = "Interrupt generation is disabled"]
            _0,
            #[doc = "Interrupt generation is enabled"]
            _1,
        }
        impl TIE0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TIE0W::_0 => false,
                    TIE0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIE0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIE0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIE0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt generation is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIE0W::_0)
            }
            #[doc = "Interrupt generation is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TIE0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TIE1`"]
        pub enum TIE1W {
            #[doc = "Interrupt generation is disabled"]
            _0,
            #[doc = "Interrupt generation is enabled"]
            _1,
        }
        impl TIE1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TIE1W::_0 => false,
                    TIE1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIE1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIE1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIE1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt generation is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIE1W::_0)
            }
            #[doc = "Interrupt generation is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TIE1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TIE2`"]
        pub enum TIE2W {
            #[doc = "Interrupt generation is disabled"]
            _0,
            #[doc = "Interrupt generation is enabled"]
            _1,
        }
        impl TIE2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TIE2W::_0 => false,
                    TIE2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIE2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIE2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIE2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt generation is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIE2W::_0)
            }
            #[doc = "Interrupt generation is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TIE2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TIE3`"]
        pub enum TIE3W {
            #[doc = "Interrupt generation is disabled"]
            _0,
            #[doc = "Interrupt generation is enabled"]
            _1,
        }
        impl TIE3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TIE3W::_0 => false,
                    TIE3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIE3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIE3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIE3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt generation is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIE3W::_0)
            }
            #[doc = "Interrupt generation is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TIE3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Channel 0 Timer Interrupt Enable"]
            #[inline(always)]
            pub fn tie0(&self) -> TIE0R {
                TIE0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Channel 1 Timer Interrupt Enable"]
            #[inline(always)]
            pub fn tie1(&self) -> TIE1R {
                TIE1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Channel 2 Timer Interrupt Enable"]
            #[inline(always)]
            pub fn tie2(&self) -> TIE2R {
                TIE2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Channel 3 Timer Interrupt Enable"]
            #[inline(always)]
            pub fn tie3(&self) -> TIE3R {
                TIE3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Channel 0 Timer Interrupt Enable"]
            #[inline(always)]
            pub fn tie0(&mut self) -> _TIE0W {
                _TIE0W { w: self }
            }
            #[doc = "Bit 1 - Channel 1 Timer Interrupt Enable"]
            #[inline(always)]
            pub fn tie1(&mut self) -> _TIE1W {
                _TIE1W { w: self }
            }
            #[doc = "Bit 2 - Channel 2 Timer Interrupt Enable"]
            #[inline(always)]
            pub fn tie2(&mut self) -> _TIE2W {
                _TIE2W { w: self }
            }
            #[doc = "Bit 3 - Channel 3 Timer Interrupt Enable"]
            #[inline(always)]
            pub fn tie3(&mut self) -> _TIE3W {
                _TIE3W { w: self }
            }
        }
    }
    #[doc = "Set Timer Enable Register"]
    pub struct SETTEN {
        register: VolatileCell<u32>,
    }
    #[doc = "Set Timer Enable Register"]
    pub mod setten {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SETTEN {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `SET_T_EN_0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SET_T_EN_0R {
            #[doc = "No effect"]
            _0,
            #[doc = "Enables the Timer Channel 0"]
            _1,
        }
        impl SET_T_EN_0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SET_T_EN_0R::_0 => false,
                    SET_T_EN_0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SET_T_EN_0R {
                match value {
                    false => SET_T_EN_0R::_0,
                    true => SET_T_EN_0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SET_T_EN_0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SET_T_EN_0R::_1
            }
        }
        #[doc = "Possible values of the field `SET_T_EN_1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SET_T_EN_1R {
            #[doc = "No Effect"]
            _0,
            #[doc = "Enables the Timer Channel 1"]
            _1,
        }
        impl SET_T_EN_1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SET_T_EN_1R::_0 => false,
                    SET_T_EN_1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SET_T_EN_1R {
                match value {
                    false => SET_T_EN_1R::_0,
                    true => SET_T_EN_1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SET_T_EN_1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SET_T_EN_1R::_1
            }
        }
        #[doc = "Possible values of the field `SET_T_EN_2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SET_T_EN_2R {
            #[doc = "No Effect"]
            _0,
            #[doc = "Enables the Timer Channel 2"]
            _1,
        }
        impl SET_T_EN_2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SET_T_EN_2R::_0 => false,
                    SET_T_EN_2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SET_T_EN_2R {
                match value {
                    false => SET_T_EN_2R::_0,
                    true => SET_T_EN_2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SET_T_EN_2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SET_T_EN_2R::_1
            }
        }
        #[doc = "Possible values of the field `SET_T_EN_3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SET_T_EN_3R {
            #[doc = "No effect"]
            _0,
            #[doc = "Enables the Timer Channel 3"]
            _1,
        }
        impl SET_T_EN_3R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SET_T_EN_3R::_0 => false,
                    SET_T_EN_3R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SET_T_EN_3R {
                match value {
                    false => SET_T_EN_3R::_0,
                    true => SET_T_EN_3R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SET_T_EN_3R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SET_T_EN_3R::_1
            }
        }
        #[doc = "Values that can be written to the field `SET_T_EN_0`"]
        pub enum SET_T_EN_0W {
            #[doc = "No effect"]
            _0,
            #[doc = "Enables the Timer Channel 0"]
            _1,
        }
        impl SET_T_EN_0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SET_T_EN_0W::_0 => false,
                    SET_T_EN_0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SET_T_EN_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SET_T_EN_0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SET_T_EN_0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No effect"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SET_T_EN_0W::_0)
            }
            #[doc = "Enables the Timer Channel 0"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SET_T_EN_0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SET_T_EN_1`"]
        pub enum SET_T_EN_1W {
            #[doc = "No Effect"]
            _0,
            #[doc = "Enables the Timer Channel 1"]
            _1,
        }
        impl SET_T_EN_1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SET_T_EN_1W::_0 => false,
                    SET_T_EN_1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SET_T_EN_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SET_T_EN_1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SET_T_EN_1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No Effect"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SET_T_EN_1W::_0)
            }
            #[doc = "Enables the Timer Channel 1"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SET_T_EN_1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SET_T_EN_2`"]
        pub enum SET_T_EN_2W {
            #[doc = "No Effect"]
            _0,
            #[doc = "Enables the Timer Channel 2"]
            _1,
        }
        impl SET_T_EN_2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SET_T_EN_2W::_0 => false,
                    SET_T_EN_2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SET_T_EN_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SET_T_EN_2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SET_T_EN_2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No Effect"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SET_T_EN_2W::_0)
            }
            #[doc = "Enables the Timer Channel 2"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SET_T_EN_2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SET_T_EN_3`"]
        pub enum SET_T_EN_3W {
            #[doc = "No effect"]
            _0,
            #[doc = "Enables the Timer Channel 3"]
            _1,
        }
        impl SET_T_EN_3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SET_T_EN_3W::_0 => false,
                    SET_T_EN_3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SET_T_EN_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SET_T_EN_3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SET_T_EN_3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No effect"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SET_T_EN_3W::_0)
            }
            #[doc = "Enables the Timer Channel 3"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SET_T_EN_3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Set Timer 0 Enable"]
            #[inline(always)]
            pub fn set_t_en_0(&self) -> SET_T_EN_0R {
                SET_T_EN_0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Set Timer 1 Enable"]
            #[inline(always)]
            pub fn set_t_en_1(&self) -> SET_T_EN_1R {
                SET_T_EN_1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Set Timer 2 Enable"]
            #[inline(always)]
            pub fn set_t_en_2(&self) -> SET_T_EN_2R {
                SET_T_EN_2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Set Timer 3 Enable"]
            #[inline(always)]
            pub fn set_t_en_3(&self) -> SET_T_EN_3R {
                SET_T_EN_3R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Set Timer 0 Enable"]
            #[inline(always)]
            pub fn set_t_en_0(&mut self) -> _SET_T_EN_0W {
                _SET_T_EN_0W { w: self }
            }
            #[doc = "Bit 1 - Set Timer 1 Enable"]
            #[inline(always)]
            pub fn set_t_en_1(&mut self) -> _SET_T_EN_1W {
                _SET_T_EN_1W { w: self }
            }
            #[doc = "Bit 2 - Set Timer 2 Enable"]
            #[inline(always)]
            pub fn set_t_en_2(&mut self) -> _SET_T_EN_2W {
                _SET_T_EN_2W { w: self }
            }
            #[doc = "Bit 3 - Set Timer 3 Enable"]
            #[inline(always)]
            pub fn set_t_en_3(&mut self) -> _SET_T_EN_3W {
                _SET_T_EN_3W { w: self }
            }
        }
    }
    #[doc = "Clear Timer Enable Register"]
    pub struct CLRTEN {
        register: VolatileCell<u32>,
    }
    #[doc = "Clear Timer Enable Register"]
    pub mod clrten {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CLRTEN {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Values that can be written to the field `CLR_T_EN_0`"]
        pub enum CLR_T_EN_0W {
            #[doc = "No action"]
            _0,
            #[doc = "Clear T_EN bit for Timer Channel 0"]
            _1,
        }
        impl CLR_T_EN_0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CLR_T_EN_0W::_0 => false,
                    CLR_T_EN_0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLR_T_EN_0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLR_T_EN_0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CLR_T_EN_0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No action"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CLR_T_EN_0W::_0)
            }
            #[doc = "Clear T_EN bit for Timer Channel 0"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CLR_T_EN_0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CLR_T_EN_1`"]
        pub enum CLR_T_EN_1W {
            #[doc = "No Action"]
            _0,
            #[doc = "Clear T_EN bit for Timer Channel 1"]
            _1,
        }
        impl CLR_T_EN_1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CLR_T_EN_1W::_0 => false,
                    CLR_T_EN_1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLR_T_EN_1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLR_T_EN_1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CLR_T_EN_1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No Action"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CLR_T_EN_1W::_0)
            }
            #[doc = "Clear T_EN bit for Timer Channel 1"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CLR_T_EN_1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CLR_T_EN_2`"]
        pub enum CLR_T_EN_2W {
            #[doc = "No Action"]
            _0,
            #[doc = "Clear T_EN bit for Timer Channel 2"]
            _1,
        }
        impl CLR_T_EN_2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CLR_T_EN_2W::_0 => false,
                    CLR_T_EN_2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLR_T_EN_2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLR_T_EN_2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CLR_T_EN_2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No Action"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CLR_T_EN_2W::_0)
            }
            #[doc = "Clear T_EN bit for Timer Channel 2"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CLR_T_EN_2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CLR_T_EN_3`"]
        pub enum CLR_T_EN_3W {
            #[doc = "No Action"]
            _0,
            #[doc = "Clear T_EN bit for Timer Channel 3"]
            _1,
        }
        impl CLR_T_EN_3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CLR_T_EN_3W::_0 => false,
                    CLR_T_EN_3W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLR_T_EN_3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLR_T_EN_3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CLR_T_EN_3W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No Action"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CLR_T_EN_3W::_0)
            }
            #[doc = "Clear T_EN bit for Timer Channel 3"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CLR_T_EN_3W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Clear Timer 0 Enable"]
            #[inline(always)]
            pub fn clr_t_en_0(&mut self) -> _CLR_T_EN_0W {
                _CLR_T_EN_0W { w: self }
            }
            #[doc = "Bit 1 - Clear Timer 1 Enable"]
            #[inline(always)]
            pub fn clr_t_en_1(&mut self) -> _CLR_T_EN_1W {
                _CLR_T_EN_1W { w: self }
            }
            #[doc = "Bit 2 - Clear Timer 2 Enable"]
            #[inline(always)]
            pub fn clr_t_en_2(&mut self) -> _CLR_T_EN_2W {
                _CLR_T_EN_2W { w: self }
            }
            #[doc = "Bit 3 - Clear Timer 3 Enable"]
            #[inline(always)]
            pub fn clr_t_en_3(&mut self) -> _CLR_T_EN_3W {
                _CLR_T_EN_3W { w: self }
            }
        }
    }
    #[doc = "Timer Value Register"]
    pub struct TVAL0 {
        register: VolatileCell<u32>,
    }
    #[doc = "Timer Value Register"]
    pub mod tval0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TVAL0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TMR_VAL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TMR_VALR {
            #[doc = "Invalid load value in compare modes."]
            _0,
            #[doc = "Invalid load value in compare modes."]
            _1,
            #[doc = r" Reserved"]
            _Reserved(u32),
        }
        impl TMR_VALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                match *self {
                    TMR_VALR::_0 => 0,
                    TMR_VALR::_1 => 1,
                    TMR_VALR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u32) -> TMR_VALR {
                match value {
                    0 => TMR_VALR::_0,
                    1 => TMR_VALR::_1,
                    i => TMR_VALR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TMR_VALR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TMR_VALR::_1
            }
        }
        #[doc = "Values that can be written to the field `TMR_VAL`"]
        pub enum TMR_VALW {
            #[doc = "Invalid load value in compare modes."]
            _0,
            #[doc = "Invalid load value in compare modes."]
            _1,
        }
        impl TMR_VALW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u32 {
                match *self {
                    TMR_VALW::_0 => 0,
                    TMR_VALW::_1 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TMR_VALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TMR_VALW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TMR_VALW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Invalid load value in compare modes."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TMR_VALW::_0)
            }
            #[doc = "Invalid load value in compare modes."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TMR_VALW::_1)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Timer Value"]
            #[inline(always)]
            pub fn tmr_val(&self) -> TMR_VALR {
                TMR_VALR::_from({
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Timer Value"]
            #[inline(always)]
            pub fn tmr_val(&mut self) -> _TMR_VALW {
                _TMR_VALW { w: self }
            }
        }
    }
    #[doc = "Current Timer Value"]
    pub struct CVAL0 {
        register: VolatileCell<u32>,
    }
    #[doc = "Current Timer Value"]
    pub mod cval0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::CVAL0 {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct TMR_CUR_VALR {
            bits: u32,
        }
        impl TMR_CUR_VALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Current Timer Value"]
            #[inline(always)]
            pub fn tmr_cur_val(&self) -> TMR_CUR_VALR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                TMR_CUR_VALR { bits }
            }
        }
    }
    #[doc = "Timer Control Register"]
    pub struct TCTRL0 {
        register: VolatileCell<u32>,
    }
    #[doc = "Timer Control Register"]
    pub mod tctrl0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCTRL0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `T_EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum T_ENR {
            #[doc = "Timer Channel is disabled"]
            _0,
            #[doc = "Timer Channel is enabled"]
            _1,
        }
        impl T_ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    T_ENR::_0 => false,
                    T_ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> T_ENR {
                match value {
                    false => T_ENR::_0,
                    true => T_ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == T_ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == T_ENR::_1
            }
        }
        #[doc = "Possible values of the field `CHAIN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHAINR {
            #[doc = "Channel Chaining is disabled. Channel Timer runs independently."]
            _0,
            #[doc = "Channel Chaining is enabled. Timer decrements on previous channel's timeout"]
            _1,
        }
        impl CHAINR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHAINR::_0 => false,
                    CHAINR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHAINR {
                match value {
                    false => CHAINR::_0,
                    true => CHAINR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHAINR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHAINR::_1
            }
        }
        #[doc = "Possible values of the field `MODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MODER {
            #[doc = "32-bit Periodic Counter"]
            _0,
            #[doc = "Dual 16-bit Periodic Counter"]
            _1,
            #[doc = "32-bit Trigger Accumulator"]
            _10,
            #[doc = "32-bit Trigger Input Capture"]
            _11,
        }
        impl MODER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MODER::_0 => 0,
                    MODER::_1 => 1,
                    MODER::_10 => 2,
                    MODER::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MODER {
                match value {
                    0 => MODER::_0,
                    1 => MODER::_1,
                    2 => MODER::_10,
                    3 => MODER::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MODER::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == MODER::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == MODER::_11
            }
        }
        #[doc = "Possible values of the field `TSOT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TSOTR {
            #[doc = "Timer starts to decrement immediately based on restart condition (controlled by TSOI bit)"]
            _0,
            #[doc = "Timer starts to decrement when rising edge on selected trigger is detected"]
            _1,
        }
        impl TSOTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TSOTR::_0 => false,
                    TSOTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TSOTR {
                match value {
                    false => TSOTR::_0,
                    true => TSOTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TSOTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TSOTR::_1
            }
        }
        #[doc = "Possible values of the field `TSOI`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TSOIR {
            #[doc = "The channel timer does not stop after timeout."]
            _0,
            #[doc = "The channel timer will stop after a timeout, and the channel timer will restart based on TSOT. When TSOT = 0, the channel timer will restart after a rising edge on the T_EN bit is detected (which means that the timer channel is disabled and then enabled); when TSOT = 1, the channel timer will restart after a rising edge on the selected trigger is detected."]
            _1,
        }
        impl TSOIR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TSOIR::_0 => false,
                    TSOIR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TSOIR {
                match value {
                    false => TSOIR::_0,
                    true => TSOIR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TSOIR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TSOIR::_1
            }
        }
        #[doc = "Possible values of the field `TROT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TROTR {
            #[doc = "Timer will not reload on selected trigger"]
            _0,
            #[doc = "Timer will reload on selected trigger"]
            _1,
        }
        impl TROTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TROTR::_0 => false,
                    TROTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TROTR {
                match value {
                    false => TROTR::_0,
                    true => TROTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TROTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TROTR::_1
            }
        }
        #[doc = "Possible values of the field `TRG_SRC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRG_SRCR {
            #[doc = "Trigger source selected in external"]
            _0,
            #[doc = "Trigger source selected is the internal trigger"]
            _1,
        }
        impl TRG_SRCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRG_SRCR::_0 => false,
                    TRG_SRCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRG_SRCR {
                match value {
                    false => TRG_SRCR::_0,
                    true => TRG_SRCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRG_SRCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRG_SRCR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct TRG_SELR {
            bits: u8,
        }
        impl TRG_SELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Values that can be written to the field `T_EN`"]
        pub enum T_ENW {
            #[doc = "Timer Channel is disabled"]
            _0,
            #[doc = "Timer Channel is enabled"]
            _1,
        }
        impl T_ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    T_ENW::_0 => false,
                    T_ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _T_ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _T_ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: T_ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Timer Channel is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(T_ENW::_0)
            }
            #[doc = "Timer Channel is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(T_ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CHAIN`"]
        pub enum CHAINW {
            #[doc = "Channel Chaining is disabled. Channel Timer runs independently."]
            _0,
            #[doc = "Channel Chaining is enabled. Timer decrements on previous channel's timeout"]
            _1,
        }
        impl CHAINW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CHAINW::_0 => false,
                    CHAINW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHAINW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHAINW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CHAINW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel Chaining is disabled. Channel Timer runs independently."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CHAINW::_0)
            }
            #[doc = "Channel Chaining is enabled. Timer decrements on previous channel's timeout"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CHAINW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MODE`"]
        pub enum MODEW {
            #[doc = "32-bit Periodic Counter"]
            _0,
            #[doc = "Dual 16-bit Periodic Counter"]
            _1,
            #[doc = "32-bit Trigger Accumulator"]
            _10,
            #[doc = "32-bit Trigger Input Capture"]
            _11,
        }
        impl MODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MODEW::_0 => 0,
                    MODEW::_1 => 1,
                    MODEW::_10 => 2,
                    MODEW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MODEW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "32-bit Periodic Counter"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MODEW::_0)
            }
            #[doc = "Dual 16-bit Periodic Counter"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MODEW::_1)
            }
            #[doc = "32-bit Trigger Accumulator"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(MODEW::_10)
            }
            #[doc = "32-bit Trigger Input Capture"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(MODEW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TSOT`"]
        pub enum TSOTW {
            #[doc = "Timer starts to decrement immediately based on restart condition (controlled by TSOI bit)"]
            _0,
            #[doc = "Timer starts to decrement when rising edge on selected trigger is detected"]
            _1,
        }
        impl TSOTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TSOTW::_0 => false,
                    TSOTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TSOTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TSOTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TSOTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Timer starts to decrement immediately based on restart condition (controlled by TSOI bit)"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TSOTW::_0)
            }
            #[doc = "Timer starts to decrement when rising edge on selected trigger is detected"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TSOTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TSOI`"]
        pub enum TSOIW {
            #[doc = "The channel timer does not stop after timeout."]
            _0,
            #[doc = "The channel timer will stop after a timeout, and the channel timer will restart based on TSOT. When TSOT = 0, the channel timer will restart after a rising edge on the T_EN bit is detected (which means that the timer channel is disabled and then enabled); when TSOT = 1, the channel timer will restart after a rising edge on the selected trigger is detected."]
            _1,
        }
        impl TSOIW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TSOIW::_0 => false,
                    TSOIW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TSOIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TSOIW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TSOIW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel timer does not stop after timeout."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TSOIW::_0)
            }
            #[doc = "The channel timer will stop after a timeout, and the channel timer will restart based on TSOT. When TSOT = 0, the channel timer will restart after a rising edge on the T_EN bit is detected (which means that the timer channel is disabled and then enabled); when TSOT = 1, the channel timer will restart after a rising edge on the selected trigger is detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TSOIW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TROT`"]
        pub enum TROTW {
            #[doc = "Timer will not reload on selected trigger"]
            _0,
            #[doc = "Timer will reload on selected trigger"]
            _1,
        }
        impl TROTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TROTW::_0 => false,
                    TROTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TROTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TROTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TROTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Timer will not reload on selected trigger"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TROTW::_0)
            }
            #[doc = "Timer will reload on selected trigger"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TROTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRG_SRC`"]
        pub enum TRG_SRCW {
            #[doc = "Trigger source selected in external"]
            _0,
            #[doc = "Trigger source selected is the internal trigger"]
            _1,
        }
        impl TRG_SRCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRG_SRCW::_0 => false,
                    TRG_SRCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRG_SRCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRG_SRCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRG_SRCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Trigger source selected in external"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRG_SRCW::_0)
            }
            #[doc = "Trigger source selected is the internal trigger"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRG_SRCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 23;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRG_SELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRG_SELW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Timer Enable"]
            #[inline(always)]
            pub fn t_en(&self) -> T_ENR {
                T_ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Chain Channel"]
            #[inline(always)]
            pub fn chain(&self) -> CHAINR {
                CHAINR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 2:3 - Timer Operation Mode"]
            #[inline(always)]
            pub fn mode(&self) -> MODER {
                MODER::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 16 - Timer Start On Trigger"]
            #[inline(always)]
            pub fn tsot(&self) -> TSOTR {
                TSOTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - Timer Stop On Interrupt"]
            #[inline(always)]
            pub fn tsoi(&self) -> TSOIR {
                TSOIR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 18 - Timer Reload On Trigger"]
            #[inline(always)]
            pub fn trot(&self) -> TROTR {
                TROTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 23 - Trigger Source"]
            #[inline(always)]
            pub fn trg_src(&self) -> TRG_SRCR {
                TRG_SRCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 24:27 - Trigger Select"]
            #[inline(always)]
            pub fn trg_sel(&self) -> TRG_SELR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TRG_SELR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Timer Enable"]
            #[inline(always)]
            pub fn t_en(&mut self) -> _T_ENW {
                _T_ENW { w: self }
            }
            #[doc = "Bit 1 - Chain Channel"]
            #[inline(always)]
            pub fn chain(&mut self) -> _CHAINW {
                _CHAINW { w: self }
            }
            #[doc = "Bits 2:3 - Timer Operation Mode"]
            #[inline(always)]
            pub fn mode(&mut self) -> _MODEW {
                _MODEW { w: self }
            }
            #[doc = "Bit 16 - Timer Start On Trigger"]
            #[inline(always)]
            pub fn tsot(&mut self) -> _TSOTW {
                _TSOTW { w: self }
            }
            #[doc = "Bit 17 - Timer Stop On Interrupt"]
            #[inline(always)]
            pub fn tsoi(&mut self) -> _TSOIW {
                _TSOIW { w: self }
            }
            #[doc = "Bit 18 - Timer Reload On Trigger"]
            #[inline(always)]
            pub fn trot(&mut self) -> _TROTW {
                _TROTW { w: self }
            }
            #[doc = "Bit 23 - Trigger Source"]
            #[inline(always)]
            pub fn trg_src(&mut self) -> _TRG_SRCW {
                _TRG_SRCW { w: self }
            }
            #[doc = "Bits 24:27 - Trigger Select"]
            #[inline(always)]
            pub fn trg_sel(&mut self) -> _TRG_SELW {
                _TRG_SELW { w: self }
            }
        }
    }
    #[doc = "Timer Value Register"]
    pub struct TVAL1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Timer Value Register"]
    pub mod tval1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TVAL1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TMR_VAL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TMR_VALR {
            #[doc = "Invalid load value in compare modes."]
            _0,
            #[doc = "Invalid load value in compare modes."]
            _1,
            #[doc = r" Reserved"]
            _Reserved(u32),
        }
        impl TMR_VALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                match *self {
                    TMR_VALR::_0 => 0,
                    TMR_VALR::_1 => 1,
                    TMR_VALR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u32) -> TMR_VALR {
                match value {
                    0 => TMR_VALR::_0,
                    1 => TMR_VALR::_1,
                    i => TMR_VALR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TMR_VALR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TMR_VALR::_1
            }
        }
        #[doc = "Values that can be written to the field `TMR_VAL`"]
        pub enum TMR_VALW {
            #[doc = "Invalid load value in compare modes."]
            _0,
            #[doc = "Invalid load value in compare modes."]
            _1,
        }
        impl TMR_VALW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u32 {
                match *self {
                    TMR_VALW::_0 => 0,
                    TMR_VALW::_1 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TMR_VALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TMR_VALW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TMR_VALW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Invalid load value in compare modes."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TMR_VALW::_0)
            }
            #[doc = "Invalid load value in compare modes."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TMR_VALW::_1)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Timer Value"]
            #[inline(always)]
            pub fn tmr_val(&self) -> TMR_VALR {
                TMR_VALR::_from({
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Timer Value"]
            #[inline(always)]
            pub fn tmr_val(&mut self) -> _TMR_VALW {
                _TMR_VALW { w: self }
            }
        }
    }
    #[doc = "Current Timer Value"]
    pub struct CVAL1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Current Timer Value"]
    pub mod cval1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::CVAL1 {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct TMR_CUR_VALR {
            bits: u32,
        }
        impl TMR_CUR_VALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Current Timer Value"]
            #[inline(always)]
            pub fn tmr_cur_val(&self) -> TMR_CUR_VALR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                TMR_CUR_VALR { bits }
            }
        }
    }
    #[doc = "Timer Control Register"]
    pub struct TCTRL1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Timer Control Register"]
    pub mod tctrl1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCTRL1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `T_EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum T_ENR {
            #[doc = "Timer Channel is disabled"]
            _0,
            #[doc = "Timer Channel is enabled"]
            _1,
        }
        impl T_ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    T_ENR::_0 => false,
                    T_ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> T_ENR {
                match value {
                    false => T_ENR::_0,
                    true => T_ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == T_ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == T_ENR::_1
            }
        }
        #[doc = "Possible values of the field `CHAIN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHAINR {
            #[doc = "Channel Chaining is disabled. Channel Timer runs independently."]
            _0,
            #[doc = "Channel Chaining is enabled. Timer decrements on previous channel's timeout"]
            _1,
        }
        impl CHAINR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHAINR::_0 => false,
                    CHAINR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHAINR {
                match value {
                    false => CHAINR::_0,
                    true => CHAINR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHAINR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHAINR::_1
            }
        }
        #[doc = "Possible values of the field `MODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MODER {
            #[doc = "32-bit Periodic Counter"]
            _0,
            #[doc = "Dual 16-bit Periodic Counter"]
            _1,
            #[doc = "32-bit Trigger Accumulator"]
            _10,
            #[doc = "32-bit Trigger Input Capture"]
            _11,
        }
        impl MODER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MODER::_0 => 0,
                    MODER::_1 => 1,
                    MODER::_10 => 2,
                    MODER::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MODER {
                match value {
                    0 => MODER::_0,
                    1 => MODER::_1,
                    2 => MODER::_10,
                    3 => MODER::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MODER::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == MODER::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == MODER::_11
            }
        }
        #[doc = "Possible values of the field `TSOT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TSOTR {
            #[doc = "Timer starts to decrement immediately based on restart condition (controlled by TSOI bit)"]
            _0,
            #[doc = "Timer starts to decrement when rising edge on selected trigger is detected"]
            _1,
        }
        impl TSOTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TSOTR::_0 => false,
                    TSOTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TSOTR {
                match value {
                    false => TSOTR::_0,
                    true => TSOTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TSOTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TSOTR::_1
            }
        }
        #[doc = "Possible values of the field `TSOI`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TSOIR {
            #[doc = "The channel timer does not stop after timeout."]
            _0,
            #[doc = "The channel timer will stop after a timeout, and the channel timer will restart based on TSOT. When TSOT = 0, the channel timer will restart after a rising edge on the T_EN bit is detected (which means that the timer channel is disabled and then enabled); when TSOT = 1, the channel timer will restart after a rising edge on the selected trigger is detected."]
            _1,
        }
        impl TSOIR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TSOIR::_0 => false,
                    TSOIR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TSOIR {
                match value {
                    false => TSOIR::_0,
                    true => TSOIR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TSOIR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TSOIR::_1
            }
        }
        #[doc = "Possible values of the field `TROT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TROTR {
            #[doc = "Timer will not reload on selected trigger"]
            _0,
            #[doc = "Timer will reload on selected trigger"]
            _1,
        }
        impl TROTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TROTR::_0 => false,
                    TROTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TROTR {
                match value {
                    false => TROTR::_0,
                    true => TROTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TROTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TROTR::_1
            }
        }
        #[doc = "Possible values of the field `TRG_SRC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRG_SRCR {
            #[doc = "Trigger source selected in external"]
            _0,
            #[doc = "Trigger source selected is the internal trigger"]
            _1,
        }
        impl TRG_SRCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRG_SRCR::_0 => false,
                    TRG_SRCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRG_SRCR {
                match value {
                    false => TRG_SRCR::_0,
                    true => TRG_SRCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRG_SRCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRG_SRCR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct TRG_SELR {
            bits: u8,
        }
        impl TRG_SELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Values that can be written to the field `T_EN`"]
        pub enum T_ENW {
            #[doc = "Timer Channel is disabled"]
            _0,
            #[doc = "Timer Channel is enabled"]
            _1,
        }
        impl T_ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    T_ENW::_0 => false,
                    T_ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _T_ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _T_ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: T_ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Timer Channel is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(T_ENW::_0)
            }
            #[doc = "Timer Channel is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(T_ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CHAIN`"]
        pub enum CHAINW {
            #[doc = "Channel Chaining is disabled. Channel Timer runs independently."]
            _0,
            #[doc = "Channel Chaining is enabled. Timer decrements on previous channel's timeout"]
            _1,
        }
        impl CHAINW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CHAINW::_0 => false,
                    CHAINW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHAINW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHAINW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CHAINW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel Chaining is disabled. Channel Timer runs independently."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CHAINW::_0)
            }
            #[doc = "Channel Chaining is enabled. Timer decrements on previous channel's timeout"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CHAINW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MODE`"]
        pub enum MODEW {
            #[doc = "32-bit Periodic Counter"]
            _0,
            #[doc = "Dual 16-bit Periodic Counter"]
            _1,
            #[doc = "32-bit Trigger Accumulator"]
            _10,
            #[doc = "32-bit Trigger Input Capture"]
            _11,
        }
        impl MODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MODEW::_0 => 0,
                    MODEW::_1 => 1,
                    MODEW::_10 => 2,
                    MODEW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MODEW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "32-bit Periodic Counter"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MODEW::_0)
            }
            #[doc = "Dual 16-bit Periodic Counter"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MODEW::_1)
            }
            #[doc = "32-bit Trigger Accumulator"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(MODEW::_10)
            }
            #[doc = "32-bit Trigger Input Capture"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(MODEW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TSOT`"]
        pub enum TSOTW {
            #[doc = "Timer starts to decrement immediately based on restart condition (controlled by TSOI bit)"]
            _0,
            #[doc = "Timer starts to decrement when rising edge on selected trigger is detected"]
            _1,
        }
        impl TSOTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TSOTW::_0 => false,
                    TSOTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TSOTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TSOTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TSOTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Timer starts to decrement immediately based on restart condition (controlled by TSOI bit)"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TSOTW::_0)
            }
            #[doc = "Timer starts to decrement when rising edge on selected trigger is detected"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TSOTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TSOI`"]
        pub enum TSOIW {
            #[doc = "The channel timer does not stop after timeout."]
            _0,
            #[doc = "The channel timer will stop after a timeout, and the channel timer will restart based on TSOT. When TSOT = 0, the channel timer will restart after a rising edge on the T_EN bit is detected (which means that the timer channel is disabled and then enabled); when TSOT = 1, the channel timer will restart after a rising edge on the selected trigger is detected."]
            _1,
        }
        impl TSOIW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TSOIW::_0 => false,
                    TSOIW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TSOIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TSOIW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TSOIW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel timer does not stop after timeout."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TSOIW::_0)
            }
            #[doc = "The channel timer will stop after a timeout, and the channel timer will restart based on TSOT. When TSOT = 0, the channel timer will restart after a rising edge on the T_EN bit is detected (which means that the timer channel is disabled and then enabled); when TSOT = 1, the channel timer will restart after a rising edge on the selected trigger is detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TSOIW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TROT`"]
        pub enum TROTW {
            #[doc = "Timer will not reload on selected trigger"]
            _0,
            #[doc = "Timer will reload on selected trigger"]
            _1,
        }
        impl TROTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TROTW::_0 => false,
                    TROTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TROTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TROTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TROTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Timer will not reload on selected trigger"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TROTW::_0)
            }
            #[doc = "Timer will reload on selected trigger"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TROTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRG_SRC`"]
        pub enum TRG_SRCW {
            #[doc = "Trigger source selected in external"]
            _0,
            #[doc = "Trigger source selected is the internal trigger"]
            _1,
        }
        impl TRG_SRCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRG_SRCW::_0 => false,
                    TRG_SRCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRG_SRCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRG_SRCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRG_SRCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Trigger source selected in external"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRG_SRCW::_0)
            }
            #[doc = "Trigger source selected is the internal trigger"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRG_SRCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 23;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRG_SELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRG_SELW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Timer Enable"]
            #[inline(always)]
            pub fn t_en(&self) -> T_ENR {
                T_ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Chain Channel"]
            #[inline(always)]
            pub fn chain(&self) -> CHAINR {
                CHAINR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 2:3 - Timer Operation Mode"]
            #[inline(always)]
            pub fn mode(&self) -> MODER {
                MODER::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 16 - Timer Start On Trigger"]
            #[inline(always)]
            pub fn tsot(&self) -> TSOTR {
                TSOTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - Timer Stop On Interrupt"]
            #[inline(always)]
            pub fn tsoi(&self) -> TSOIR {
                TSOIR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 18 - Timer Reload On Trigger"]
            #[inline(always)]
            pub fn trot(&self) -> TROTR {
                TROTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 23 - Trigger Source"]
            #[inline(always)]
            pub fn trg_src(&self) -> TRG_SRCR {
                TRG_SRCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 24:27 - Trigger Select"]
            #[inline(always)]
            pub fn trg_sel(&self) -> TRG_SELR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TRG_SELR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Timer Enable"]
            #[inline(always)]
            pub fn t_en(&mut self) -> _T_ENW {
                _T_ENW { w: self }
            }
            #[doc = "Bit 1 - Chain Channel"]
            #[inline(always)]
            pub fn chain(&mut self) -> _CHAINW {
                _CHAINW { w: self }
            }
            #[doc = "Bits 2:3 - Timer Operation Mode"]
            #[inline(always)]
            pub fn mode(&mut self) -> _MODEW {
                _MODEW { w: self }
            }
            #[doc = "Bit 16 - Timer Start On Trigger"]
            #[inline(always)]
            pub fn tsot(&mut self) -> _TSOTW {
                _TSOTW { w: self }
            }
            #[doc = "Bit 17 - Timer Stop On Interrupt"]
            #[inline(always)]
            pub fn tsoi(&mut self) -> _TSOIW {
                _TSOIW { w: self }
            }
            #[doc = "Bit 18 - Timer Reload On Trigger"]
            #[inline(always)]
            pub fn trot(&mut self) -> _TROTW {
                _TROTW { w: self }
            }
            #[doc = "Bit 23 - Trigger Source"]
            #[inline(always)]
            pub fn trg_src(&mut self) -> _TRG_SRCW {
                _TRG_SRCW { w: self }
            }
            #[doc = "Bits 24:27 - Trigger Select"]
            #[inline(always)]
            pub fn trg_sel(&mut self) -> _TRG_SELW {
                _TRG_SELW { w: self }
            }
        }
    }
    #[doc = "Timer Value Register"]
    pub struct TVAL2 {
        register: VolatileCell<u32>,
    }
    #[doc = "Timer Value Register"]
    pub mod tval2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TVAL2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TMR_VAL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TMR_VALR {
            #[doc = "Invalid load value in compare modes."]
            _0,
            #[doc = "Invalid load value in compare modes."]
            _1,
            #[doc = r" Reserved"]
            _Reserved(u32),
        }
        impl TMR_VALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                match *self {
                    TMR_VALR::_0 => 0,
                    TMR_VALR::_1 => 1,
                    TMR_VALR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u32) -> TMR_VALR {
                match value {
                    0 => TMR_VALR::_0,
                    1 => TMR_VALR::_1,
                    i => TMR_VALR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TMR_VALR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TMR_VALR::_1
            }
        }
        #[doc = "Values that can be written to the field `TMR_VAL`"]
        pub enum TMR_VALW {
            #[doc = "Invalid load value in compare modes."]
            _0,
            #[doc = "Invalid load value in compare modes."]
            _1,
        }
        impl TMR_VALW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u32 {
                match *self {
                    TMR_VALW::_0 => 0,
                    TMR_VALW::_1 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TMR_VALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TMR_VALW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TMR_VALW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Invalid load value in compare modes."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TMR_VALW::_0)
            }
            #[doc = "Invalid load value in compare modes."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TMR_VALW::_1)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Timer Value"]
            #[inline(always)]
            pub fn tmr_val(&self) -> TMR_VALR {
                TMR_VALR::_from({
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Timer Value"]
            #[inline(always)]
            pub fn tmr_val(&mut self) -> _TMR_VALW {
                _TMR_VALW { w: self }
            }
        }
    }
    #[doc = "Current Timer Value"]
    pub struct CVAL2 {
        register: VolatileCell<u32>,
    }
    #[doc = "Current Timer Value"]
    pub mod cval2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::CVAL2 {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct TMR_CUR_VALR {
            bits: u32,
        }
        impl TMR_CUR_VALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Current Timer Value"]
            #[inline(always)]
            pub fn tmr_cur_val(&self) -> TMR_CUR_VALR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                TMR_CUR_VALR { bits }
            }
        }
    }
    #[doc = "Timer Control Register"]
    pub struct TCTRL2 {
        register: VolatileCell<u32>,
    }
    #[doc = "Timer Control Register"]
    pub mod tctrl2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCTRL2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `T_EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum T_ENR {
            #[doc = "Timer Channel is disabled"]
            _0,
            #[doc = "Timer Channel is enabled"]
            _1,
        }
        impl T_ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    T_ENR::_0 => false,
                    T_ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> T_ENR {
                match value {
                    false => T_ENR::_0,
                    true => T_ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == T_ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == T_ENR::_1
            }
        }
        #[doc = "Possible values of the field `CHAIN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHAINR {
            #[doc = "Channel Chaining is disabled. Channel Timer runs independently."]
            _0,
            #[doc = "Channel Chaining is enabled. Timer decrements on previous channel's timeout"]
            _1,
        }
        impl CHAINR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHAINR::_0 => false,
                    CHAINR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHAINR {
                match value {
                    false => CHAINR::_0,
                    true => CHAINR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHAINR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHAINR::_1
            }
        }
        #[doc = "Possible values of the field `MODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MODER {
            #[doc = "32-bit Periodic Counter"]
            _0,
            #[doc = "Dual 16-bit Periodic Counter"]
            _1,
            #[doc = "32-bit Trigger Accumulator"]
            _10,
            #[doc = "32-bit Trigger Input Capture"]
            _11,
        }
        impl MODER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MODER::_0 => 0,
                    MODER::_1 => 1,
                    MODER::_10 => 2,
                    MODER::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MODER {
                match value {
                    0 => MODER::_0,
                    1 => MODER::_1,
                    2 => MODER::_10,
                    3 => MODER::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MODER::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == MODER::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == MODER::_11
            }
        }
        #[doc = "Possible values of the field `TSOT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TSOTR {
            #[doc = "Timer starts to decrement immediately based on restart condition (controlled by TSOI bit)"]
            _0,
            #[doc = "Timer starts to decrement when rising edge on selected trigger is detected"]
            _1,
        }
        impl TSOTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TSOTR::_0 => false,
                    TSOTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TSOTR {
                match value {
                    false => TSOTR::_0,
                    true => TSOTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TSOTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TSOTR::_1
            }
        }
        #[doc = "Possible values of the field `TSOI`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TSOIR {
            #[doc = "The channel timer does not stop after timeout."]
            _0,
            #[doc = "The channel timer will stop after a timeout, and the channel timer will restart based on TSOT. When TSOT = 0, the channel timer will restart after a rising edge on the T_EN bit is detected (which means that the timer channel is disabled and then enabled); when TSOT = 1, the channel timer will restart after a rising edge on the selected trigger is detected."]
            _1,
        }
        impl TSOIR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TSOIR::_0 => false,
                    TSOIR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TSOIR {
                match value {
                    false => TSOIR::_0,
                    true => TSOIR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TSOIR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TSOIR::_1
            }
        }
        #[doc = "Possible values of the field `TROT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TROTR {
            #[doc = "Timer will not reload on selected trigger"]
            _0,
            #[doc = "Timer will reload on selected trigger"]
            _1,
        }
        impl TROTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TROTR::_0 => false,
                    TROTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TROTR {
                match value {
                    false => TROTR::_0,
                    true => TROTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TROTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TROTR::_1
            }
        }
        #[doc = "Possible values of the field `TRG_SRC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRG_SRCR {
            #[doc = "Trigger source selected in external"]
            _0,
            #[doc = "Trigger source selected is the internal trigger"]
            _1,
        }
        impl TRG_SRCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRG_SRCR::_0 => false,
                    TRG_SRCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRG_SRCR {
                match value {
                    false => TRG_SRCR::_0,
                    true => TRG_SRCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRG_SRCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRG_SRCR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct TRG_SELR {
            bits: u8,
        }
        impl TRG_SELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Values that can be written to the field `T_EN`"]
        pub enum T_ENW {
            #[doc = "Timer Channel is disabled"]
            _0,
            #[doc = "Timer Channel is enabled"]
            _1,
        }
        impl T_ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    T_ENW::_0 => false,
                    T_ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _T_ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _T_ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: T_ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Timer Channel is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(T_ENW::_0)
            }
            #[doc = "Timer Channel is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(T_ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CHAIN`"]
        pub enum CHAINW {
            #[doc = "Channel Chaining is disabled. Channel Timer runs independently."]
            _0,
            #[doc = "Channel Chaining is enabled. Timer decrements on previous channel's timeout"]
            _1,
        }
        impl CHAINW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CHAINW::_0 => false,
                    CHAINW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHAINW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHAINW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CHAINW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel Chaining is disabled. Channel Timer runs independently."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CHAINW::_0)
            }
            #[doc = "Channel Chaining is enabled. Timer decrements on previous channel's timeout"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CHAINW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MODE`"]
        pub enum MODEW {
            #[doc = "32-bit Periodic Counter"]
            _0,
            #[doc = "Dual 16-bit Periodic Counter"]
            _1,
            #[doc = "32-bit Trigger Accumulator"]
            _10,
            #[doc = "32-bit Trigger Input Capture"]
            _11,
        }
        impl MODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MODEW::_0 => 0,
                    MODEW::_1 => 1,
                    MODEW::_10 => 2,
                    MODEW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MODEW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "32-bit Periodic Counter"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MODEW::_0)
            }
            #[doc = "Dual 16-bit Periodic Counter"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MODEW::_1)
            }
            #[doc = "32-bit Trigger Accumulator"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(MODEW::_10)
            }
            #[doc = "32-bit Trigger Input Capture"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(MODEW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TSOT`"]
        pub enum TSOTW {
            #[doc = "Timer starts to decrement immediately based on restart condition (controlled by TSOI bit)"]
            _0,
            #[doc = "Timer starts to decrement when rising edge on selected trigger is detected"]
            _1,
        }
        impl TSOTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TSOTW::_0 => false,
                    TSOTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TSOTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TSOTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TSOTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Timer starts to decrement immediately based on restart condition (controlled by TSOI bit)"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TSOTW::_0)
            }
            #[doc = "Timer starts to decrement when rising edge on selected trigger is detected"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TSOTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TSOI`"]
        pub enum TSOIW {
            #[doc = "The channel timer does not stop after timeout."]
            _0,
            #[doc = "The channel timer will stop after a timeout, and the channel timer will restart based on TSOT. When TSOT = 0, the channel timer will restart after a rising edge on the T_EN bit is detected (which means that the timer channel is disabled and then enabled); when TSOT = 1, the channel timer will restart after a rising edge on the selected trigger is detected."]
            _1,
        }
        impl TSOIW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TSOIW::_0 => false,
                    TSOIW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TSOIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TSOIW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TSOIW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel timer does not stop after timeout."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TSOIW::_0)
            }
            #[doc = "The channel timer will stop after a timeout, and the channel timer will restart based on TSOT. When TSOT = 0, the channel timer will restart after a rising edge on the T_EN bit is detected (which means that the timer channel is disabled and then enabled); when TSOT = 1, the channel timer will restart after a rising edge on the selected trigger is detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TSOIW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TROT`"]
        pub enum TROTW {
            #[doc = "Timer will not reload on selected trigger"]
            _0,
            #[doc = "Timer will reload on selected trigger"]
            _1,
        }
        impl TROTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TROTW::_0 => false,
                    TROTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TROTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TROTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TROTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Timer will not reload on selected trigger"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TROTW::_0)
            }
            #[doc = "Timer will reload on selected trigger"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TROTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRG_SRC`"]
        pub enum TRG_SRCW {
            #[doc = "Trigger source selected in external"]
            _0,
            #[doc = "Trigger source selected is the internal trigger"]
            _1,
        }
        impl TRG_SRCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRG_SRCW::_0 => false,
                    TRG_SRCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRG_SRCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRG_SRCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRG_SRCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Trigger source selected in external"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRG_SRCW::_0)
            }
            #[doc = "Trigger source selected is the internal trigger"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRG_SRCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 23;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRG_SELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRG_SELW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Timer Enable"]
            #[inline(always)]
            pub fn t_en(&self) -> T_ENR {
                T_ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Chain Channel"]
            #[inline(always)]
            pub fn chain(&self) -> CHAINR {
                CHAINR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 2:3 - Timer Operation Mode"]
            #[inline(always)]
            pub fn mode(&self) -> MODER {
                MODER::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 16 - Timer Start On Trigger"]
            #[inline(always)]
            pub fn tsot(&self) -> TSOTR {
                TSOTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - Timer Stop On Interrupt"]
            #[inline(always)]
            pub fn tsoi(&self) -> TSOIR {
                TSOIR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 18 - Timer Reload On Trigger"]
            #[inline(always)]
            pub fn trot(&self) -> TROTR {
                TROTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 23 - Trigger Source"]
            #[inline(always)]
            pub fn trg_src(&self) -> TRG_SRCR {
                TRG_SRCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 24:27 - Trigger Select"]
            #[inline(always)]
            pub fn trg_sel(&self) -> TRG_SELR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TRG_SELR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Timer Enable"]
            #[inline(always)]
            pub fn t_en(&mut self) -> _T_ENW {
                _T_ENW { w: self }
            }
            #[doc = "Bit 1 - Chain Channel"]
            #[inline(always)]
            pub fn chain(&mut self) -> _CHAINW {
                _CHAINW { w: self }
            }
            #[doc = "Bits 2:3 - Timer Operation Mode"]
            #[inline(always)]
            pub fn mode(&mut self) -> _MODEW {
                _MODEW { w: self }
            }
            #[doc = "Bit 16 - Timer Start On Trigger"]
            #[inline(always)]
            pub fn tsot(&mut self) -> _TSOTW {
                _TSOTW { w: self }
            }
            #[doc = "Bit 17 - Timer Stop On Interrupt"]
            #[inline(always)]
            pub fn tsoi(&mut self) -> _TSOIW {
                _TSOIW { w: self }
            }
            #[doc = "Bit 18 - Timer Reload On Trigger"]
            #[inline(always)]
            pub fn trot(&mut self) -> _TROTW {
                _TROTW { w: self }
            }
            #[doc = "Bit 23 - Trigger Source"]
            #[inline(always)]
            pub fn trg_src(&mut self) -> _TRG_SRCW {
                _TRG_SRCW { w: self }
            }
            #[doc = "Bits 24:27 - Trigger Select"]
            #[inline(always)]
            pub fn trg_sel(&mut self) -> _TRG_SELW {
                _TRG_SELW { w: self }
            }
        }
    }
    #[doc = "Timer Value Register"]
    pub struct TVAL3 {
        register: VolatileCell<u32>,
    }
    #[doc = "Timer Value Register"]
    pub mod tval3 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TVAL3 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TMR_VAL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TMR_VALR {
            #[doc = "Invalid load value in compare modes."]
            _0,
            #[doc = "Invalid load value in compare modes."]
            _1,
            #[doc = r" Reserved"]
            _Reserved(u32),
        }
        impl TMR_VALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                match *self {
                    TMR_VALR::_0 => 0,
                    TMR_VALR::_1 => 1,
                    TMR_VALR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u32) -> TMR_VALR {
                match value {
                    0 => TMR_VALR::_0,
                    1 => TMR_VALR::_1,
                    i => TMR_VALR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TMR_VALR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TMR_VALR::_1
            }
        }
        #[doc = "Values that can be written to the field `TMR_VAL`"]
        pub enum TMR_VALW {
            #[doc = "Invalid load value in compare modes."]
            _0,
            #[doc = "Invalid load value in compare modes."]
            _1,
        }
        impl TMR_VALW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u32 {
                match *self {
                    TMR_VALW::_0 => 0,
                    TMR_VALW::_1 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TMR_VALW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TMR_VALW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TMR_VALW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Invalid load value in compare modes."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TMR_VALW::_0)
            }
            #[doc = "Invalid load value in compare modes."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TMR_VALW::_1)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Timer Value"]
            #[inline(always)]
            pub fn tmr_val(&self) -> TMR_VALR {
                TMR_VALR::_from({
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Timer Value"]
            #[inline(always)]
            pub fn tmr_val(&mut self) -> _TMR_VALW {
                _TMR_VALW { w: self }
            }
        }
    }
    #[doc = "Current Timer Value"]
    pub struct CVAL3 {
        register: VolatileCell<u32>,
    }
    #[doc = "Current Timer Value"]
    pub mod cval3 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::CVAL3 {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct TMR_CUR_VALR {
            bits: u32,
        }
        impl TMR_CUR_VALR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Current Timer Value"]
            #[inline(always)]
            pub fn tmr_cur_val(&self) -> TMR_CUR_VALR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                TMR_CUR_VALR { bits }
            }
        }
    }
    #[doc = "Timer Control Register"]
    pub struct TCTRL3 {
        register: VolatileCell<u32>,
    }
    #[doc = "Timer Control Register"]
    pub mod tctrl3 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCTRL3 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `T_EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum T_ENR {
            #[doc = "Timer Channel is disabled"]
            _0,
            #[doc = "Timer Channel is enabled"]
            _1,
        }
        impl T_ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    T_ENR::_0 => false,
                    T_ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> T_ENR {
                match value {
                    false => T_ENR::_0,
                    true => T_ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == T_ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == T_ENR::_1
            }
        }
        #[doc = "Possible values of the field `CHAIN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CHAINR {
            #[doc = "Channel Chaining is disabled. Channel Timer runs independently."]
            _0,
            #[doc = "Channel Chaining is enabled. Timer decrements on previous channel's timeout"]
            _1,
        }
        impl CHAINR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CHAINR::_0 => false,
                    CHAINR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CHAINR {
                match value {
                    false => CHAINR::_0,
                    true => CHAINR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CHAINR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CHAINR::_1
            }
        }
        #[doc = "Possible values of the field `MODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MODER {
            #[doc = "32-bit Periodic Counter"]
            _0,
            #[doc = "Dual 16-bit Periodic Counter"]
            _1,
            #[doc = "32-bit Trigger Accumulator"]
            _10,
            #[doc = "32-bit Trigger Input Capture"]
            _11,
        }
        impl MODER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MODER::_0 => 0,
                    MODER::_1 => 1,
                    MODER::_10 => 2,
                    MODER::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MODER {
                match value {
                    0 => MODER::_0,
                    1 => MODER::_1,
                    2 => MODER::_10,
                    3 => MODER::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MODER::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == MODER::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == MODER::_11
            }
        }
        #[doc = "Possible values of the field `TSOT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TSOTR {
            #[doc = "Timer starts to decrement immediately based on restart condition (controlled by TSOI bit)"]
            _0,
            #[doc = "Timer starts to decrement when rising edge on selected trigger is detected"]
            _1,
        }
        impl TSOTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TSOTR::_0 => false,
                    TSOTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TSOTR {
                match value {
                    false => TSOTR::_0,
                    true => TSOTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TSOTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TSOTR::_1
            }
        }
        #[doc = "Possible values of the field `TSOI`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TSOIR {
            #[doc = "The channel timer does not stop after timeout."]
            _0,
            #[doc = "The channel timer will stop after a timeout, and the channel timer will restart based on TSOT. When TSOT = 0, the channel timer will restart after a rising edge on the T_EN bit is detected (which means that the timer channel is disabled and then enabled); when TSOT = 1, the channel timer will restart after a rising edge on the selected trigger is detected."]
            _1,
        }
        impl TSOIR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TSOIR::_0 => false,
                    TSOIR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TSOIR {
                match value {
                    false => TSOIR::_0,
                    true => TSOIR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TSOIR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TSOIR::_1
            }
        }
        #[doc = "Possible values of the field `TROT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TROTR {
            #[doc = "Timer will not reload on selected trigger"]
            _0,
            #[doc = "Timer will reload on selected trigger"]
            _1,
        }
        impl TROTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TROTR::_0 => false,
                    TROTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TROTR {
                match value {
                    false => TROTR::_0,
                    true => TROTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TROTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TROTR::_1
            }
        }
        #[doc = "Possible values of the field `TRG_SRC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRG_SRCR {
            #[doc = "Trigger source selected in external"]
            _0,
            #[doc = "Trigger source selected is the internal trigger"]
            _1,
        }
        impl TRG_SRCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRG_SRCR::_0 => false,
                    TRG_SRCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRG_SRCR {
                match value {
                    false => TRG_SRCR::_0,
                    true => TRG_SRCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRG_SRCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRG_SRCR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct TRG_SELR {
            bits: u8,
        }
        impl TRG_SELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Values that can be written to the field `T_EN`"]
        pub enum T_ENW {
            #[doc = "Timer Channel is disabled"]
            _0,
            #[doc = "Timer Channel is enabled"]
            _1,
        }
        impl T_ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    T_ENW::_0 => false,
                    T_ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _T_ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _T_ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: T_ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Timer Channel is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(T_ENW::_0)
            }
            #[doc = "Timer Channel is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(T_ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CHAIN`"]
        pub enum CHAINW {
            #[doc = "Channel Chaining is disabled. Channel Timer runs independently."]
            _0,
            #[doc = "Channel Chaining is enabled. Timer decrements on previous channel's timeout"]
            _1,
        }
        impl CHAINW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CHAINW::_0 => false,
                    CHAINW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHAINW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHAINW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CHAINW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Channel Chaining is disabled. Channel Timer runs independently."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CHAINW::_0)
            }
            #[doc = "Channel Chaining is enabled. Timer decrements on previous channel's timeout"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CHAINW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MODE`"]
        pub enum MODEW {
            #[doc = "32-bit Periodic Counter"]
            _0,
            #[doc = "Dual 16-bit Periodic Counter"]
            _1,
            #[doc = "32-bit Trigger Accumulator"]
            _10,
            #[doc = "32-bit Trigger Input Capture"]
            _11,
        }
        impl MODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MODEW::_0 => 0,
                    MODEW::_1 => 1,
                    MODEW::_10 => 2,
                    MODEW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MODEW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "32-bit Periodic Counter"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MODEW::_0)
            }
            #[doc = "Dual 16-bit Periodic Counter"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MODEW::_1)
            }
            #[doc = "32-bit Trigger Accumulator"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(MODEW::_10)
            }
            #[doc = "32-bit Trigger Input Capture"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(MODEW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TSOT`"]
        pub enum TSOTW {
            #[doc = "Timer starts to decrement immediately based on restart condition (controlled by TSOI bit)"]
            _0,
            #[doc = "Timer starts to decrement when rising edge on selected trigger is detected"]
            _1,
        }
        impl TSOTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TSOTW::_0 => false,
                    TSOTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TSOTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TSOTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TSOTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Timer starts to decrement immediately based on restart condition (controlled by TSOI bit)"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TSOTW::_0)
            }
            #[doc = "Timer starts to decrement when rising edge on selected trigger is detected"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TSOTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TSOI`"]
        pub enum TSOIW {
            #[doc = "The channel timer does not stop after timeout."]
            _0,
            #[doc = "The channel timer will stop after a timeout, and the channel timer will restart based on TSOT. When TSOT = 0, the channel timer will restart after a rising edge on the T_EN bit is detected (which means that the timer channel is disabled and then enabled); when TSOT = 1, the channel timer will restart after a rising edge on the selected trigger is detected."]
            _1,
        }
        impl TSOIW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TSOIW::_0 => false,
                    TSOIW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TSOIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TSOIW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TSOIW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The channel timer does not stop after timeout."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TSOIW::_0)
            }
            #[doc = "The channel timer will stop after a timeout, and the channel timer will restart based on TSOT. When TSOT = 0, the channel timer will restart after a rising edge on the T_EN bit is detected (which means that the timer channel is disabled and then enabled); when TSOT = 1, the channel timer will restart after a rising edge on the selected trigger is detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TSOIW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TROT`"]
        pub enum TROTW {
            #[doc = "Timer will not reload on selected trigger"]
            _0,
            #[doc = "Timer will reload on selected trigger"]
            _1,
        }
        impl TROTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TROTW::_0 => false,
                    TROTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TROTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TROTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TROTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Timer will not reload on selected trigger"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TROTW::_0)
            }
            #[doc = "Timer will reload on selected trigger"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TROTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRG_SRC`"]
        pub enum TRG_SRCW {
            #[doc = "Trigger source selected in external"]
            _0,
            #[doc = "Trigger source selected is the internal trigger"]
            _1,
        }
        impl TRG_SRCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRG_SRCW::_0 => false,
                    TRG_SRCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRG_SRCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRG_SRCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRG_SRCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Trigger source selected in external"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRG_SRCW::_0)
            }
            #[doc = "Trigger source selected is the internal trigger"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRG_SRCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 23;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRG_SELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRG_SELW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Timer Enable"]
            #[inline(always)]
            pub fn t_en(&self) -> T_ENR {
                T_ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Chain Channel"]
            #[inline(always)]
            pub fn chain(&self) -> CHAINR {
                CHAINR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 2:3 - Timer Operation Mode"]
            #[inline(always)]
            pub fn mode(&self) -> MODER {
                MODER::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 16 - Timer Start On Trigger"]
            #[inline(always)]
            pub fn tsot(&self) -> TSOTR {
                TSOTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - Timer Stop On Interrupt"]
            #[inline(always)]
            pub fn tsoi(&self) -> TSOIR {
                TSOIR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 18 - Timer Reload On Trigger"]
            #[inline(always)]
            pub fn trot(&self) -> TROTR {
                TROTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 23 - Trigger Source"]
            #[inline(always)]
            pub fn trg_src(&self) -> TRG_SRCR {
                TRG_SRCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 24:27 - Trigger Select"]
            #[inline(always)]
            pub fn trg_sel(&self) -> TRG_SELR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TRG_SELR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Timer Enable"]
            #[inline(always)]
            pub fn t_en(&mut self) -> _T_ENW {
                _T_ENW { w: self }
            }
            #[doc = "Bit 1 - Chain Channel"]
            #[inline(always)]
            pub fn chain(&mut self) -> _CHAINW {
                _CHAINW { w: self }
            }
            #[doc = "Bits 2:3 - Timer Operation Mode"]
            #[inline(always)]
            pub fn mode(&mut self) -> _MODEW {
                _MODEW { w: self }
            }
            #[doc = "Bit 16 - Timer Start On Trigger"]
            #[inline(always)]
            pub fn tsot(&mut self) -> _TSOTW {
                _TSOTW { w: self }
            }
            #[doc = "Bit 17 - Timer Stop On Interrupt"]
            #[inline(always)]
            pub fn tsoi(&mut self) -> _TSOIW {
                _TSOIW { w: self }
            }
            #[doc = "Bit 18 - Timer Reload On Trigger"]
            #[inline(always)]
            pub fn trot(&mut self) -> _TROTW {
                _TROTW { w: self }
            }
            #[doc = "Bit 23 - Trigger Source"]
            #[inline(always)]
            pub fn trg_src(&mut self) -> _TRG_SRCW {
                _TRG_SRCW { w: self }
            }
            #[doc = "Bits 24:27 - Trigger Select"]
            #[inline(always)]
            pub fn trg_sel(&mut self) -> _TRG_SELW {
                _TRG_SELW { w: self }
            }
        }
    }
}
#[doc = "Low Power Periodic Interrupt Timer (LPIT)"]
pub struct LPIT0 {
    register_block: lpit0::RegisterBlock,
}
impl Deref for LPIT0 {
    type Target = lpit0::RegisterBlock;
    fn deref(&self) -> &lpit0::RegisterBlock {
        &self.register_block
    }
}
#[doc = "Secure Real Time Clock"]
pub const RTC: Peripheral<RTC> = unsafe { Peripheral::new(1073991680) };
#[doc = "Secure Real Time Clock"]
pub mod rtc {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - RTC Time Seconds Register"]
        pub tsr: TSR,
        #[doc = "0x04 - RTC Time Prescaler Register"]
        pub tpr: TPR,
        #[doc = "0x08 - RTC Time Alarm Register"]
        pub tar: TAR,
        #[doc = "0x0c - RTC Time Compensation Register"]
        pub tcr: TCR,
        #[doc = "0x10 - RTC Control Register"]
        pub cr: CR,
        #[doc = "0x14 - RTC Status Register"]
        pub sr: SR,
        #[doc = "0x18 - RTC Lock Register"]
        pub lr: LR,
        #[doc = "0x1c - RTC Interrupt Enable Register"]
        pub ier: IER,
    }
    #[doc = "RTC Time Seconds Register"]
    pub struct TSR {
        register: VolatileCell<u32>,
    }
    #[doc = "RTC Time Seconds Register"]
    pub mod tsr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TSR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct TSRR {
            bits: u32,
        }
        impl TSRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _TSRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TSRW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Time Seconds Register"]
            #[inline(always)]
            pub fn tsr(&self) -> TSRR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                TSRR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Time Seconds Register"]
            #[inline(always)]
            pub fn tsr(&mut self) -> _TSRW {
                _TSRW { w: self }
            }
        }
    }
    #[doc = "RTC Time Prescaler Register"]
    pub struct TPR {
        register: VolatileCell<u32>,
    }
    #[doc = "RTC Time Prescaler Register"]
    pub mod tpr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TPR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct TPRR {
            bits: u16,
        }
        impl TPRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _TPRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TPRW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Time Prescaler Register"]
            #[inline(always)]
            pub fn tpr(&self) -> TPRR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                TPRR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Time Prescaler Register"]
            #[inline(always)]
            pub fn tpr(&mut self) -> _TPRW {
                _TPRW { w: self }
            }
        }
    }
    #[doc = "RTC Time Alarm Register"]
    pub struct TAR {
        register: VolatileCell<u32>,
    }
    #[doc = "RTC Time Alarm Register"]
    pub mod tar {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TAR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct TARR {
            bits: u32,
        }
        impl TARR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _TARW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TARW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Time Alarm Register"]
            #[inline(always)]
            pub fn tar(&self) -> TARR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                TARR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Time Alarm Register"]
            #[inline(always)]
            pub fn tar(&mut self) -> _TARW {
                _TARW { w: self }
            }
        }
    }
    #[doc = "RTC Time Compensation Register"]
    pub struct TCR {
        register: VolatileCell<u32>,
    }
    #[doc = "RTC Time Compensation Register"]
    pub mod tcr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TCR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TCR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TCRR {
            #[doc = "Time Prescaler Register overflows every 32896 clock cycles."]
            _10000000,
            #[doc = "Time Prescaler Register overflows every 32895 clock cycles."]
            _10000001,
            #[doc = "Time Prescaler Register overflows every 32769 clock cycles."]
            _11111111,
            #[doc = "Time Prescaler Register overflows every 32768 clock cycles."]
            _00000000,
            #[doc = "Time Prescaler Register overflows every 32767 clock cycles."]
            _00000001,
            #[doc = "Time Prescaler Register overflows every 32642 clock cycles."]
            _01111110,
            #[doc = "Time Prescaler Register overflows every 32641 clock cycles."]
            _01111111,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl TCRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TCRR::_10000000 => 128,
                    TCRR::_10000001 => 129,
                    TCRR::_11111111 => 255,
                    TCRR::_00000000 => 0,
                    TCRR::_00000001 => 1,
                    TCRR::_01111110 => 126,
                    TCRR::_01111111 => 127,
                    TCRR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TCRR {
                match value {
                    128 => TCRR::_10000000,
                    129 => TCRR::_10000001,
                    255 => TCRR::_11111111,
                    0 => TCRR::_00000000,
                    1 => TCRR::_00000001,
                    126 => TCRR::_01111110,
                    127 => TCRR::_01111111,
                    i => TCRR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_10000000`"]
            #[inline(always)]
            pub fn is_10000000(&self) -> bool {
                *self == TCRR::_10000000
            }
            #[doc = "Checks if the value of the field is `_10000001`"]
            #[inline(always)]
            pub fn is_10000001(&self) -> bool {
                *self == TCRR::_10000001
            }
            #[doc = "Checks if the value of the field is `_11111111`"]
            #[inline(always)]
            pub fn is_11111111(&self) -> bool {
                *self == TCRR::_11111111
            }
            #[doc = "Checks if the value of the field is `_00000000`"]
            #[inline(always)]
            pub fn is_00000000(&self) -> bool {
                *self == TCRR::_00000000
            }
            #[doc = "Checks if the value of the field is `_00000001`"]
            #[inline(always)]
            pub fn is_00000001(&self) -> bool {
                *self == TCRR::_00000001
            }
            #[doc = "Checks if the value of the field is `_01111110`"]
            #[inline(always)]
            pub fn is_01111110(&self) -> bool {
                *self == TCRR::_01111110
            }
            #[doc = "Checks if the value of the field is `_01111111`"]
            #[inline(always)]
            pub fn is_01111111(&self) -> bool {
                *self == TCRR::_01111111
            }
        }
        #[doc = r" Value of the field"]
        pub struct CIRR {
            bits: u8,
        }
        impl CIRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct TCVR {
            bits: u8,
        }
        impl TCVR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct CICR {
            bits: u8,
        }
        impl CICR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Values that can be written to the field `TCR`"]
        pub enum TCRW {
            #[doc = "Time Prescaler Register overflows every 32896 clock cycles."]
            _10000000,
            #[doc = "Time Prescaler Register overflows every 32895 clock cycles."]
            _10000001,
            #[doc = "Time Prescaler Register overflows every 32769 clock cycles."]
            _11111111,
            #[doc = "Time Prescaler Register overflows every 32768 clock cycles."]
            _00000000,
            #[doc = "Time Prescaler Register overflows every 32767 clock cycles."]
            _00000001,
            #[doc = "Time Prescaler Register overflows every 32642 clock cycles."]
            _01111110,
            #[doc = "Time Prescaler Register overflows every 32641 clock cycles."]
            _01111111,
        }
        impl TCRW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TCRW::_10000000 => 128,
                    TCRW::_10000001 => 129,
                    TCRW::_11111111 => 255,
                    TCRW::_00000000 => 0,
                    TCRW::_00000001 => 1,
                    TCRW::_01111110 => 126,
                    TCRW::_01111111 => 127,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TCRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TCRW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TCRW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Time Prescaler Register overflows every 32896 clock cycles."]
            #[inline(always)]
            pub fn _10000000(self) -> &'a mut W {
                self.variant(TCRW::_10000000)
            }
            #[doc = "Time Prescaler Register overflows every 32895 clock cycles."]
            #[inline(always)]
            pub fn _10000001(self) -> &'a mut W {
                self.variant(TCRW::_10000001)
            }
            #[doc = "Time Prescaler Register overflows every 32769 clock cycles."]
            #[inline(always)]
            pub fn _11111111(self) -> &'a mut W {
                self.variant(TCRW::_11111111)
            }
            #[doc = "Time Prescaler Register overflows every 32768 clock cycles."]
            #[inline(always)]
            pub fn _00000000(self) -> &'a mut W {
                self.variant(TCRW::_00000000)
            }
            #[doc = "Time Prescaler Register overflows every 32767 clock cycles."]
            #[inline(always)]
            pub fn _00000001(self) -> &'a mut W {
                self.variant(TCRW::_00000001)
            }
            #[doc = "Time Prescaler Register overflows every 32642 clock cycles."]
            #[inline(always)]
            pub fn _01111110(self) -> &'a mut W {
                self.variant(TCRW::_01111110)
            }
            #[doc = "Time Prescaler Register overflows every 32641 clock cycles."]
            #[inline(always)]
            pub fn _01111111(self) -> &'a mut W {
                self.variant(TCRW::_01111111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CIRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CIRW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Time Compensation Register"]
            #[inline(always)]
            pub fn tcr(&self) -> TCRR {
                TCRR::_from({
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 8:15 - Compensation Interval Register"]
            #[inline(always)]
            pub fn cir(&self) -> CIRR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CIRR { bits }
            }
            #[doc = "Bits 16:23 - Time Compensation Value"]
            #[inline(always)]
            pub fn tcv(&self) -> TCVR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TCVR { bits }
            }
            #[doc = "Bits 24:31 - Compensation Interval Counter"]
            #[inline(always)]
            pub fn cic(&self) -> CICR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CICR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Time Compensation Register"]
            #[inline(always)]
            pub fn tcr(&mut self) -> _TCRW {
                _TCRW { w: self }
            }
            #[doc = "Bits 8:15 - Compensation Interval Register"]
            #[inline(always)]
            pub fn cir(&mut self) -> _CIRW {
                _CIRW { w: self }
            }
        }
    }
    #[doc = "RTC Control Register"]
    pub struct CR {
        register: VolatileCell<u32>,
    }
    #[doc = "RTC Control Register"]
    pub mod cr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `SWR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SWRR {
            #[doc = "No effect."]
            _0,
            #[doc = r" Reserved"]
            _Reserved(bool),
        }
        impl SWRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SWRR::_0 => false,
                    SWRR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SWRR {
                match value {
                    false => SWRR::_0,
                    i => SWRR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SWRR::_0
            }
        }
        #[doc = "Possible values of the field `SUP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SUPR {
            #[doc = "Non-supervisor mode write accesses are not supported and generate a bus error."]
            _0,
            #[doc = "Non-supervisor mode write accesses are supported."]
            _1,
        }
        impl SUPR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SUPR::_0 => false,
                    SUPR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SUPR {
                match value {
                    false => SUPR::_0,
                    true => SUPR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SUPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SUPR::_1
            }
        }
        #[doc = "Possible values of the field `UM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum UMR {
            #[doc = "Registers cannot be written when locked."]
            _0,
            #[doc = "Registers can be written when locked under limited conditions."]
            _1,
        }
        impl UMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    UMR::_0 => false,
                    UMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> UMR {
                match value {
                    false => UMR::_0,
                    true => UMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == UMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == UMR::_1
            }
        }
        #[doc = "Possible values of the field `CPS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CPSR {
            #[doc = "The prescaler output clock (as configured by TSIC) is output on RTC_CLKOUT."]
            _0,
            #[doc = "The RTC 32kHz crystal clock is output on RTC_CLKOUT, provided it is output to other peripherals."]
            _1,
        }
        impl CPSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CPSR::_0 => false,
                    CPSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CPSR {
                match value {
                    false => CPSR::_0,
                    true => CPSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CPSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CPSR::_1
            }
        }
        #[doc = "Possible values of the field `LPOS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LPOSR {
            #[doc = "RTC prescaler increments using 32kHz crystal."]
            _0,
            #[doc = "RTC prescaler increments using 1kHz LPO, bits [4:0] of the prescaler are ignored."]
            _1,
        }
        impl LPOSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LPOSR::_0 => false,
                    LPOSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LPOSR {
                match value {
                    false => LPOSR::_0,
                    true => LPOSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LPOSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LPOSR::_1
            }
        }
        #[doc = "Possible values of the field `CPE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CPER {
            #[doc = "Disable RTC_CLKOUT pin."]
            _0,
            #[doc = "Enable RTC_CLKOUT pin."]
            _1,
        }
        impl CPER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CPER::_0 => false,
                    CPER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CPER {
                match value {
                    false => CPER::_0,
                    true => CPER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CPER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CPER::_1
            }
        }
        #[doc = "Values that can be written to the field `SWR`"]
        pub enum SWRW {
            #[doc = "No effect."]
            _0,
        }
        impl SWRW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SWRW::_0 => false,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SWRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SWRW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SWRW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No effect."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SWRW::_0)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SUP`"]
        pub enum SUPW {
            #[doc = "Non-supervisor mode write accesses are not supported and generate a bus error."]
            _0,
            #[doc = "Non-supervisor mode write accesses are supported."]
            _1,
        }
        impl SUPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SUPW::_0 => false,
                    SUPW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SUPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SUPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SUPW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Non-supervisor mode write accesses are not supported and generate a bus error."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SUPW::_0)
            }
            #[doc = "Non-supervisor mode write accesses are supported."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SUPW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `UM`"]
        pub enum UMW {
            #[doc = "Registers cannot be written when locked."]
            _0,
            #[doc = "Registers can be written when locked under limited conditions."]
            _1,
        }
        impl UMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    UMW::_0 => false,
                    UMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _UMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _UMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: UMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Registers cannot be written when locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(UMW::_0)
            }
            #[doc = "Registers can be written when locked under limited conditions."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(UMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CPS`"]
        pub enum CPSW {
            #[doc = "The prescaler output clock (as configured by TSIC) is output on RTC_CLKOUT."]
            _0,
            #[doc = "The RTC 32kHz crystal clock is output on RTC_CLKOUT, provided it is output to other peripherals."]
            _1,
        }
        impl CPSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CPSW::_0 => false,
                    CPSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CPSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CPSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CPSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The prescaler output clock (as configured by TSIC) is output on RTC_CLKOUT."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CPSW::_0)
            }
            #[doc = "The RTC 32kHz crystal clock is output on RTC_CLKOUT, provided it is output to other peripherals."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CPSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LPOS`"]
        pub enum LPOSW {
            #[doc = "RTC prescaler increments using 32kHz crystal."]
            _0,
            #[doc = "RTC prescaler increments using 1kHz LPO, bits [4:0] of the prescaler are ignored."]
            _1,
        }
        impl LPOSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LPOSW::_0 => false,
                    LPOSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LPOSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LPOSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LPOSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "RTC prescaler increments using 32kHz crystal."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LPOSW::_0)
            }
            #[doc = "RTC prescaler increments using 1kHz LPO, bits [4:0] of the prescaler are ignored."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LPOSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CPE`"]
        pub enum CPEW {
            #[doc = "Disable RTC_CLKOUT pin."]
            _0,
            #[doc = "Enable RTC_CLKOUT pin."]
            _1,
        }
        impl CPEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CPEW::_0 => false,
                    CPEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CPEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CPEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CPEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable RTC_CLKOUT pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CPEW::_0)
            }
            #[doc = "Enable RTC_CLKOUT pin."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CPEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Software Reset"]
            #[inline(always)]
            pub fn swr(&self) -> SWRR {
                SWRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Supervisor Access"]
            #[inline(always)]
            pub fn sup(&self) -> SUPR {
                SUPR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Update Mode"]
            #[inline(always)]
            pub fn um(&self) -> UMR {
                UMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Clock Pin Select"]
            #[inline(always)]
            pub fn cps(&self) -> CPSR {
                CPSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - LPO Select"]
            #[inline(always)]
            pub fn lpos(&self) -> LPOSR {
                LPOSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 24 - Clock Pin Enable"]
            #[inline(always)]
            pub fn cpe(&self) -> CPER {
                CPER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Software Reset"]
            #[inline(always)]
            pub fn swr(&mut self) -> _SWRW {
                _SWRW { w: self }
            }
            #[doc = "Bit 2 - Supervisor Access"]
            #[inline(always)]
            pub fn sup(&mut self) -> _SUPW {
                _SUPW { w: self }
            }
            #[doc = "Bit 3 - Update Mode"]
            #[inline(always)]
            pub fn um(&mut self) -> _UMW {
                _UMW { w: self }
            }
            #[doc = "Bit 5 - Clock Pin Select"]
            #[inline(always)]
            pub fn cps(&mut self) -> _CPSW {
                _CPSW { w: self }
            }
            #[doc = "Bit 7 - LPO Select"]
            #[inline(always)]
            pub fn lpos(&mut self) -> _LPOSW {
                _LPOSW { w: self }
            }
            #[doc = "Bit 24 - Clock Pin Enable"]
            #[inline(always)]
            pub fn cpe(&mut self) -> _CPEW {
                _CPEW { w: self }
            }
        }
    }
    #[doc = "RTC Status Register"]
    pub struct SR {
        register: VolatileCell<u32>,
    }
    #[doc = "RTC Status Register"]
    pub mod sr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TIF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIFR {
            #[doc = "Time is valid."]
            _0,
            #[doc = "Time is invalid and time counter is read as zero."]
            _1,
        }
        impl TIFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TIFR::_0 => false,
                    TIFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TIFR {
                match value {
                    false => TIFR::_0,
                    true => TIFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TIFR::_1
            }
        }
        #[doc = "Possible values of the field `TOF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TOFR {
            #[doc = "Time overflow has not occurred."]
            _0,
            #[doc = "Time overflow has occurred and time counter is read as zero."]
            _1,
        }
        impl TOFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TOFR::_0 => false,
                    TOFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TOFR {
                match value {
                    false => TOFR::_0,
                    true => TOFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TOFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TOFR::_1
            }
        }
        #[doc = "Possible values of the field `TAF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TAFR {
            #[doc = "Time alarm has not occurred."]
            _0,
            #[doc = "Time alarm has occurred."]
            _1,
        }
        impl TAFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TAFR::_0 => false,
                    TAFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TAFR {
                match value {
                    false => TAFR::_0,
                    true => TAFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TAFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TAFR::_1
            }
        }
        #[doc = "Possible values of the field `TCE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TCER {
            #[doc = "Time counter is disabled."]
            _0,
            #[doc = "Time counter is enabled."]
            _1,
        }
        impl TCER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TCER::_0 => false,
                    TCER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TCER {
                match value {
                    false => TCER::_0,
                    true => TCER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TCER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TCER::_1
            }
        }
        #[doc = "Values that can be written to the field `TCE`"]
        pub enum TCEW {
            #[doc = "Time counter is disabled."]
            _0,
            #[doc = "Time counter is enabled."]
            _1,
        }
        impl TCEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TCEW::_0 => false,
                    TCEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TCEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TCEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TCEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Time counter is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TCEW::_0)
            }
            #[doc = "Time counter is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TCEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Time Invalid Flag"]
            #[inline(always)]
            pub fn tif(&self) -> TIFR {
                TIFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Time Overflow Flag"]
            #[inline(always)]
            pub fn tof(&self) -> TOFR {
                TOFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Time Alarm Flag"]
            #[inline(always)]
            pub fn taf(&self) -> TAFR {
                TAFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Time Counter Enable"]
            #[inline(always)]
            pub fn tce(&self) -> TCER {
                TCER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 1 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 4 - Time Counter Enable"]
            #[inline(always)]
            pub fn tce(&mut self) -> _TCEW {
                _TCEW { w: self }
            }
        }
    }
    #[doc = "RTC Lock Register"]
    pub struct LR {
        register: VolatileCell<u32>,
    }
    #[doc = "RTC Lock Register"]
    pub mod lr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::LR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TCL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TCLR {
            #[doc = "Time Compensation Register is locked and writes are ignored."]
            _0,
            #[doc = "Time Compensation Register is not locked and writes complete as normal."]
            _1,
        }
        impl TCLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TCLR::_0 => false,
                    TCLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TCLR {
                match value {
                    false => TCLR::_0,
                    true => TCLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TCLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TCLR::_1
            }
        }
        #[doc = "Possible values of the field `CRL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CRLR {
            #[doc = "Control Register is locked and writes are ignored."]
            _0,
            #[doc = "Control Register is not locked and writes complete as normal."]
            _1,
        }
        impl CRLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CRLR::_0 => false,
                    CRLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CRLR {
                match value {
                    false => CRLR::_0,
                    true => CRLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CRLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CRLR::_1
            }
        }
        #[doc = "Possible values of the field `SRL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SRLR {
            #[doc = "Status Register is locked and writes are ignored."]
            _0,
            #[doc = "Status Register is not locked and writes complete as normal."]
            _1,
        }
        impl SRLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SRLR::_0 => false,
                    SRLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SRLR {
                match value {
                    false => SRLR::_0,
                    true => SRLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SRLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SRLR::_1
            }
        }
        #[doc = "Possible values of the field `LRL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LRLR {
            #[doc = "Lock Register is locked and writes are ignored."]
            _0,
            #[doc = "Lock Register is not locked and writes complete as normal."]
            _1,
        }
        impl LRLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LRLR::_0 => false,
                    LRLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LRLR {
                match value {
                    false => LRLR::_0,
                    true => LRLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LRLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LRLR::_1
            }
        }
        #[doc = "Values that can be written to the field `TCL`"]
        pub enum TCLW {
            #[doc = "Time Compensation Register is locked and writes are ignored."]
            _0,
            #[doc = "Time Compensation Register is not locked and writes complete as normal."]
            _1,
        }
        impl TCLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TCLW::_0 => false,
                    TCLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TCLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TCLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TCLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Time Compensation Register is locked and writes are ignored."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TCLW::_0)
            }
            #[doc = "Time Compensation Register is not locked and writes complete as normal."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TCLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CRL`"]
        pub enum CRLW {
            #[doc = "Control Register is locked and writes are ignored."]
            _0,
            #[doc = "Control Register is not locked and writes complete as normal."]
            _1,
        }
        impl CRLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CRLW::_0 => false,
                    CRLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CRLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CRLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CRLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Control Register is locked and writes are ignored."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CRLW::_0)
            }
            #[doc = "Control Register is not locked and writes complete as normal."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CRLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SRL`"]
        pub enum SRLW {
            #[doc = "Status Register is locked and writes are ignored."]
            _0,
            #[doc = "Status Register is not locked and writes complete as normal."]
            _1,
        }
        impl SRLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SRLW::_0 => false,
                    SRLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SRLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SRLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SRLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Status Register is locked and writes are ignored."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SRLW::_0)
            }
            #[doc = "Status Register is not locked and writes complete as normal."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SRLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LRL`"]
        pub enum LRLW {
            #[doc = "Lock Register is locked and writes are ignored."]
            _0,
            #[doc = "Lock Register is not locked and writes complete as normal."]
            _1,
        }
        impl LRLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LRLW::_0 => false,
                    LRLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LRLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LRLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LRLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Lock Register is locked and writes are ignored."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LRLW::_0)
            }
            #[doc = "Lock Register is not locked and writes complete as normal."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LRLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 3 - Time Compensation Lock"]
            #[inline(always)]
            pub fn tcl(&self) -> TCLR {
                TCLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Control Register Lock"]
            #[inline(always)]
            pub fn crl(&self) -> CRLR {
                CRLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Status Register Lock"]
            #[inline(always)]
            pub fn srl(&self) -> SRLR {
                SRLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Lock Register Lock"]
            #[inline(always)]
            pub fn lrl(&self) -> LRLR {
                LRLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 255 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 3 - Time Compensation Lock"]
            #[inline(always)]
            pub fn tcl(&mut self) -> _TCLW {
                _TCLW { w: self }
            }
            #[doc = "Bit 4 - Control Register Lock"]
            #[inline(always)]
            pub fn crl(&mut self) -> _CRLW {
                _CRLW { w: self }
            }
            #[doc = "Bit 5 - Status Register Lock"]
            #[inline(always)]
            pub fn srl(&mut self) -> _SRLW {
                _SRLW { w: self }
            }
            #[doc = "Bit 6 - Lock Register Lock"]
            #[inline(always)]
            pub fn lrl(&mut self) -> _LRLW {
                _LRLW { w: self }
            }
        }
    }
    #[doc = "RTC Interrupt Enable Register"]
    pub struct IER {
        register: VolatileCell<u32>,
    }
    #[doc = "RTC Interrupt Enable Register"]
    pub mod ier {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::IER {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TIIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIIER {
            #[doc = "Time invalid flag does not generate an interrupt."]
            _0,
            #[doc = "Time invalid flag does generate an interrupt."]
            _1,
        }
        impl TIIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TIIER::_0 => false,
                    TIIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TIIER {
                match value {
                    false => TIIER::_0,
                    true => TIIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TIIER::_1
            }
        }
        #[doc = "Possible values of the field `TOIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TOIER {
            #[doc = "Time overflow flag does not generate an interrupt."]
            _0,
            #[doc = "Time overflow flag does generate an interrupt."]
            _1,
        }
        impl TOIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TOIER::_0 => false,
                    TOIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TOIER {
                match value {
                    false => TOIER::_0,
                    true => TOIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TOIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TOIER::_1
            }
        }
        #[doc = "Possible values of the field `TAIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TAIER {
            #[doc = "Time alarm flag does not generate an interrupt."]
            _0,
            #[doc = "Time alarm flag does generate an interrupt."]
            _1,
        }
        impl TAIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TAIER::_0 => false,
                    TAIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TAIER {
                match value {
                    false => TAIER::_0,
                    true => TAIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TAIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TAIER::_1
            }
        }
        #[doc = "Possible values of the field `TSIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TSIER {
            #[doc = "Seconds interrupt is disabled."]
            _0,
            #[doc = "Seconds interrupt is enabled."]
            _1,
        }
        impl TSIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TSIER::_0 => false,
                    TSIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TSIER {
                match value {
                    false => TSIER::_0,
                    true => TSIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TSIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TSIER::_1
            }
        }
        #[doc = "Possible values of the field `TSIC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TSICR {
            #[doc = "1 Hz."]
            _000,
            #[doc = "2 Hz."]
            _001,
            #[doc = "4 Hz."]
            _010,
            #[doc = "8 Hz."]
            _011,
            #[doc = "16 Hz."]
            _100,
            #[doc = "32 Hz."]
            _101,
            #[doc = "64 Hz."]
            _110,
            #[doc = "128 Hz."]
            _111,
        }
        impl TSICR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TSICR::_000 => 0,
                    TSICR::_001 => 1,
                    TSICR::_010 => 2,
                    TSICR::_011 => 3,
                    TSICR::_100 => 4,
                    TSICR::_101 => 5,
                    TSICR::_110 => 6,
                    TSICR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TSICR {
                match value {
                    0 => TSICR::_000,
                    1 => TSICR::_001,
                    2 => TSICR::_010,
                    3 => TSICR::_011,
                    4 => TSICR::_100,
                    5 => TSICR::_101,
                    6 => TSICR::_110,
                    7 => TSICR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == TSICR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == TSICR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == TSICR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == TSICR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == TSICR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == TSICR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == TSICR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == TSICR::_111
            }
        }
        #[doc = "Values that can be written to the field `TIIE`"]
        pub enum TIIEW {
            #[doc = "Time invalid flag does not generate an interrupt."]
            _0,
            #[doc = "Time invalid flag does generate an interrupt."]
            _1,
        }
        impl TIIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TIIEW::_0 => false,
                    TIIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Time invalid flag does not generate an interrupt."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIIEW::_0)
            }
            #[doc = "Time invalid flag does generate an interrupt."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TIIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TOIE`"]
        pub enum TOIEW {
            #[doc = "Time overflow flag does not generate an interrupt."]
            _0,
            #[doc = "Time overflow flag does generate an interrupt."]
            _1,
        }
        impl TOIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TOIEW::_0 => false,
                    TOIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TOIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TOIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TOIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Time overflow flag does not generate an interrupt."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TOIEW::_0)
            }
            #[doc = "Time overflow flag does generate an interrupt."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TOIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TAIE`"]
        pub enum TAIEW {
            #[doc = "Time alarm flag does not generate an interrupt."]
            _0,
            #[doc = "Time alarm flag does generate an interrupt."]
            _1,
        }
        impl TAIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TAIEW::_0 => false,
                    TAIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TAIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TAIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TAIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Time alarm flag does not generate an interrupt."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TAIEW::_0)
            }
            #[doc = "Time alarm flag does generate an interrupt."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TAIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TSIE`"]
        pub enum TSIEW {
            #[doc = "Seconds interrupt is disabled."]
            _0,
            #[doc = "Seconds interrupt is enabled."]
            _1,
        }
        impl TSIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TSIEW::_0 => false,
                    TSIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TSIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TSIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TSIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Seconds interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TSIEW::_0)
            }
            #[doc = "Seconds interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TSIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TSIC`"]
        pub enum TSICW {
            #[doc = "1 Hz."]
            _000,
            #[doc = "2 Hz."]
            _001,
            #[doc = "4 Hz."]
            _010,
            #[doc = "8 Hz."]
            _011,
            #[doc = "16 Hz."]
            _100,
            #[doc = "32 Hz."]
            _101,
            #[doc = "64 Hz."]
            _110,
            #[doc = "128 Hz."]
            _111,
        }
        impl TSICW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TSICW::_000 => 0,
                    TSICW::_001 => 1,
                    TSICW::_010 => 2,
                    TSICW::_011 => 3,
                    TSICW::_100 => 4,
                    TSICW::_101 => 5,
                    TSICW::_110 => 6,
                    TSICW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TSICW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TSICW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TSICW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "1 Hz."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(TSICW::_000)
            }
            #[doc = "2 Hz."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(TSICW::_001)
            }
            #[doc = "4 Hz."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(TSICW::_010)
            }
            #[doc = "8 Hz."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(TSICW::_011)
            }
            #[doc = "16 Hz."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(TSICW::_100)
            }
            #[doc = "32 Hz."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(TSICW::_101)
            }
            #[doc = "64 Hz."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(TSICW::_110)
            }
            #[doc = "128 Hz."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(TSICW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Time Invalid Interrupt Enable"]
            #[inline(always)]
            pub fn tiie(&self) -> TIIER {
                TIIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Time Overflow Interrupt Enable"]
            #[inline(always)]
            pub fn toie(&self) -> TOIER {
                TOIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Time Alarm Interrupt Enable"]
            #[inline(always)]
            pub fn taie(&self) -> TAIER {
                TAIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Time Seconds Interrupt Enable"]
            #[inline(always)]
            pub fn tsie(&self) -> TSIER {
                TSIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:18 - Timer Seconds Interrupt Configuration"]
            #[inline(always)]
            pub fn tsic(&self) -> TSICR {
                TSICR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 7 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Time Invalid Interrupt Enable"]
            #[inline(always)]
            pub fn tiie(&mut self) -> _TIIEW {
                _TIIEW { w: self }
            }
            #[doc = "Bit 1 - Time Overflow Interrupt Enable"]
            #[inline(always)]
            pub fn toie(&mut self) -> _TOIEW {
                _TOIEW { w: self }
            }
            #[doc = "Bit 2 - Time Alarm Interrupt Enable"]
            #[inline(always)]
            pub fn taie(&mut self) -> _TAIEW {
                _TAIEW { w: self }
            }
            #[doc = "Bit 4 - Time Seconds Interrupt Enable"]
            #[inline(always)]
            pub fn tsie(&mut self) -> _TSIEW {
                _TSIEW { w: self }
            }
            #[doc = "Bits 16:18 - Timer Seconds Interrupt Configuration"]
            #[inline(always)]
            pub fn tsic(&mut self) -> _TSICW {
                _TSICW { w: self }
            }
        }
    }
}
#[doc = "Secure Real Time Clock"]
pub struct RTC {
    register_block: rtc::RegisterBlock,
}
impl Deref for RTC {
    type Target = rtc::RegisterBlock;
    fn deref(&self) -> &rtc::RegisterBlock {
        &self.register_block
    }
}
#[doc = "Low Power Timer"]
pub const LPTMR0: Peripheral<LPTMR0> = unsafe { Peripheral::new(1074003968) };
#[doc = "Low Power Timer"]
pub mod lptmr0 {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - Low Power Timer Control Status Register"]
        pub csr: CSR,
        #[doc = "0x04 - Low Power Timer Prescale Register"]
        pub psr: PSR,
        #[doc = "0x08 - Low Power Timer Compare Register"]
        pub cmr: CMR,
        #[doc = "0x0c - Low Power Timer Counter Register"]
        pub cnr: CNR,
    }
    #[doc = "Low Power Timer Control Status Register"]
    pub struct CSR {
        register: VolatileCell<u32>,
    }
    #[doc = "Low Power Timer Control Status Register"]
    pub mod csr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CSR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TENR {
            #[doc = "LPTMR is disabled and internal logic is reset."]
            _0,
            #[doc = "LPTMR is enabled."]
            _1,
        }
        impl TENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TENR::_0 => false,
                    TENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TENR {
                match value {
                    false => TENR::_0,
                    true => TENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TENR::_1
            }
        }
        #[doc = "Possible values of the field `TMS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TMSR {
            #[doc = "Time Counter mode."]
            _0,
            #[doc = "Pulse Counter mode."]
            _1,
        }
        impl TMSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TMSR::_0 => false,
                    TMSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TMSR {
                match value {
                    false => TMSR::_0,
                    true => TMSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TMSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TMSR::_1
            }
        }
        #[doc = "Possible values of the field `TFC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TFCR {
            #[doc = "CNR is reset whenever TCF is set."]
            _0,
            #[doc = "CNR is reset on overflow."]
            _1,
        }
        impl TFCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TFCR::_0 => false,
                    TFCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TFCR {
                match value {
                    false => TFCR::_0,
                    true => TFCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TFCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TFCR::_1
            }
        }
        #[doc = "Possible values of the field `TPP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TPPR {
            #[doc = "Pulse Counter input source is active-high, and the CNR will increment on the rising-edge."]
            _0,
            #[doc = "Pulse Counter input source is active-low, and the CNR will increment on the falling-edge."]
            _1,
        }
        impl TPPR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TPPR::_0 => false,
                    TPPR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TPPR {
                match value {
                    false => TPPR::_0,
                    true => TPPR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TPPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TPPR::_1
            }
        }
        #[doc = "Possible values of the field `TPS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TPSR {
            #[doc = "Pulse counter input 0 is selected."]
            _00,
            #[doc = "Pulse counter input 1 is selected."]
            _01,
            #[doc = "Pulse counter input 2 is selected."]
            _10,
            #[doc = "Pulse counter input 3 is selected."]
            _11,
        }
        impl TPSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TPSR::_00 => 0,
                    TPSR::_01 => 1,
                    TPSR::_10 => 2,
                    TPSR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TPSR {
                match value {
                    0 => TPSR::_00,
                    1 => TPSR::_01,
                    2 => TPSR::_10,
                    3 => TPSR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == TPSR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == TPSR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == TPSR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == TPSR::_11
            }
        }
        #[doc = "Possible values of the field `TIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIER {
            #[doc = "Timer interrupt disabled."]
            _0,
            #[doc = "Timer interrupt enabled."]
            _1,
        }
        impl TIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TIER::_0 => false,
                    TIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TIER {
                match value {
                    false => TIER::_0,
                    true => TIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TIER::_1
            }
        }
        #[doc = "Possible values of the field `TCF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TCFR {
            #[doc = "The value of CNR is not equal to CMR and increments."]
            _0,
            #[doc = "The value of CNR is equal to CMR and increments."]
            _1,
        }
        impl TCFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TCFR::_0 => false,
                    TCFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TCFR {
                match value {
                    false => TCFR::_0,
                    true => TCFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TCFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TCFR::_1
            }
        }
        #[doc = "Possible values of the field `TDRE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TDRER {
            #[doc = "Timer DMA Request disabled."]
            _0,
            #[doc = "Timer DMA Request enabled."]
            _1,
        }
        impl TDRER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TDRER::_0 => false,
                    TDRER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TDRER {
                match value {
                    false => TDRER::_0,
                    true => TDRER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TDRER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TDRER::_1
            }
        }
        #[doc = "Values that can be written to the field `TEN`"]
        pub enum TENW {
            #[doc = "LPTMR is disabled and internal logic is reset."]
            _0,
            #[doc = "LPTMR is enabled."]
            _1,
        }
        impl TENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TENW::_0 => false,
                    TENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "LPTMR is disabled and internal logic is reset."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TENW::_0)
            }
            #[doc = "LPTMR is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TMS`"]
        pub enum TMSW {
            #[doc = "Time Counter mode."]
            _0,
            #[doc = "Pulse Counter mode."]
            _1,
        }
        impl TMSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TMSW::_0 => false,
                    TMSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TMSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TMSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TMSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Time Counter mode."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TMSW::_0)
            }
            #[doc = "Pulse Counter mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TMSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TFC`"]
        pub enum TFCW {
            #[doc = "CNR is reset whenever TCF is set."]
            _0,
            #[doc = "CNR is reset on overflow."]
            _1,
        }
        impl TFCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TFCW::_0 => false,
                    TFCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TFCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TFCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TFCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "CNR is reset whenever TCF is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TFCW::_0)
            }
            #[doc = "CNR is reset on overflow."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TFCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TPP`"]
        pub enum TPPW {
            #[doc = "Pulse Counter input source is active-high, and the CNR will increment on the rising-edge."]
            _0,
            #[doc = "Pulse Counter input source is active-low, and the CNR will increment on the falling-edge."]
            _1,
        }
        impl TPPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TPPW::_0 => false,
                    TPPW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TPPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TPPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TPPW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pulse Counter input source is active-high, and the CNR will increment on the rising-edge."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TPPW::_0)
            }
            #[doc = "Pulse Counter input source is active-low, and the CNR will increment on the falling-edge."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TPPW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TPS`"]
        pub enum TPSW {
            #[doc = "Pulse counter input 0 is selected."]
            _00,
            #[doc = "Pulse counter input 1 is selected."]
            _01,
            #[doc = "Pulse counter input 2 is selected."]
            _10,
            #[doc = "Pulse counter input 3 is selected."]
            _11,
        }
        impl TPSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TPSW::_00 => 0,
                    TPSW::_01 => 1,
                    TPSW::_10 => 2,
                    TPSW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TPSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TPSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TPSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pulse counter input 0 is selected."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(TPSW::_00)
            }
            #[doc = "Pulse counter input 1 is selected."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(TPSW::_01)
            }
            #[doc = "Pulse counter input 2 is selected."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(TPSW::_10)
            }
            #[doc = "Pulse counter input 3 is selected."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(TPSW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TIE`"]
        pub enum TIEW {
            #[doc = "Timer interrupt disabled."]
            _0,
            #[doc = "Timer interrupt enabled."]
            _1,
        }
        impl TIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TIEW::_0 => false,
                    TIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Timer interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIEW::_0)
            }
            #[doc = "Timer interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TCF`"]
        pub enum TCFW {
            #[doc = "The value of CNR is not equal to CMR and increments."]
            _0,
            #[doc = "The value of CNR is equal to CMR and increments."]
            _1,
        }
        impl TCFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TCFW::_0 => false,
                    TCFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TCFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TCFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TCFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The value of CNR is not equal to CMR and increments."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TCFW::_0)
            }
            #[doc = "The value of CNR is equal to CMR and increments."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TCFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TDRE`"]
        pub enum TDREW {
            #[doc = "Timer DMA Request disabled."]
            _0,
            #[doc = "Timer DMA Request enabled."]
            _1,
        }
        impl TDREW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TDREW::_0 => false,
                    TDREW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TDREW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TDREW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TDREW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Timer DMA Request disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TDREW::_0)
            }
            #[doc = "Timer DMA Request enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TDREW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Timer Enable"]
            #[inline(always)]
            pub fn ten(&self) -> TENR {
                TENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Timer Mode Select"]
            #[inline(always)]
            pub fn tms(&self) -> TMSR {
                TMSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Timer Free-Running Counter"]
            #[inline(always)]
            pub fn tfc(&self) -> TFCR {
                TFCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Timer Pin Polarity"]
            #[inline(always)]
            pub fn tpp(&self) -> TPPR {
                TPPR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 4:5 - Timer Pin Select"]
            #[inline(always)]
            pub fn tps(&self) -> TPSR {
                TPSR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 6 - Timer Interrupt Enable"]
            #[inline(always)]
            pub fn tie(&self) -> TIER {
                TIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Timer Compare Flag"]
            #[inline(always)]
            pub fn tcf(&self) -> TCFR {
                TCFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Timer DMA Request Enable"]
            #[inline(always)]
            pub fn tdre(&self) -> TDRER {
                TDRER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Timer Enable"]
            #[inline(always)]
            pub fn ten(&mut self) -> _TENW {
                _TENW { w: self }
            }
            #[doc = "Bit 1 - Timer Mode Select"]
            #[inline(always)]
            pub fn tms(&mut self) -> _TMSW {
                _TMSW { w: self }
            }
            #[doc = "Bit 2 - Timer Free-Running Counter"]
            #[inline(always)]
            pub fn tfc(&mut self) -> _TFCW {
                _TFCW { w: self }
            }
            #[doc = "Bit 3 - Timer Pin Polarity"]
            #[inline(always)]
            pub fn tpp(&mut self) -> _TPPW {
                _TPPW { w: self }
            }
            #[doc = "Bits 4:5 - Timer Pin Select"]
            #[inline(always)]
            pub fn tps(&mut self) -> _TPSW {
                _TPSW { w: self }
            }
            #[doc = "Bit 6 - Timer Interrupt Enable"]
            #[inline(always)]
            pub fn tie(&mut self) -> _TIEW {
                _TIEW { w: self }
            }
            #[doc = "Bit 7 - Timer Compare Flag"]
            #[inline(always)]
            pub fn tcf(&mut self) -> _TCFW {
                _TCFW { w: self }
            }
            #[doc = "Bit 8 - Timer DMA Request Enable"]
            #[inline(always)]
            pub fn tdre(&mut self) -> _TDREW {
                _TDREW { w: self }
            }
        }
    }
    #[doc = "Low Power Timer Prescale Register"]
    pub struct PSR {
        register: VolatileCell<u32>,
    }
    #[doc = "Low Power Timer Prescale Register"]
    pub mod psr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PSR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PCS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PCSR {
            #[doc = "Prescaler/glitch filter clock 0 selected."]
            _00,
            #[doc = "Prescaler/glitch filter clock 1 selected."]
            _01,
            #[doc = "Prescaler/glitch filter clock 2 selected."]
            _10,
            #[doc = "Prescaler/glitch filter clock 3 selected."]
            _11,
        }
        impl PCSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PCSR::_00 => 0,
                    PCSR::_01 => 1,
                    PCSR::_10 => 2,
                    PCSR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PCSR {
                match value {
                    0 => PCSR::_00,
                    1 => PCSR::_01,
                    2 => PCSR::_10,
                    3 => PCSR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == PCSR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == PCSR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == PCSR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == PCSR::_11
            }
        }
        #[doc = "Possible values of the field `PBYP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PBYPR {
            #[doc = "Prescaler/glitch filter is enabled."]
            _0,
            #[doc = "Prescaler/glitch filter is bypassed."]
            _1,
        }
        impl PBYPR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PBYPR::_0 => false,
                    PBYPR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PBYPR {
                match value {
                    false => PBYPR::_0,
                    true => PBYPR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PBYPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PBYPR::_1
            }
        }
        #[doc = "Possible values of the field `PRESCALE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PRESCALER {
            #[doc = "Prescaler divides the prescaler clock by 2; glitch filter does not support this configuration."]
            _0000,
            #[doc = "Prescaler divides the prescaler clock by 4; glitch filter recognizes change on input pin after 2 rising clock edges."]
            _0001,
            #[doc = "Prescaler divides the prescaler clock by 8; glitch filter recognizes change on input pin after 4 rising clock edges."]
            _0010,
            #[doc = "Prescaler divides the prescaler clock by 16; glitch filter recognizes change on input pin after 8 rising clock edges."]
            _0011,
            #[doc = "Prescaler divides the prescaler clock by 32; glitch filter recognizes change on input pin after 16 rising clock edges."]
            _0100,
            #[doc = "Prescaler divides the prescaler clock by 64; glitch filter recognizes change on input pin after 32 rising clock edges."]
            _0101,
            #[doc = "Prescaler divides the prescaler clock by 128; glitch filter recognizes change on input pin after 64 rising clock edges."]
            _0110,
            #[doc = "Prescaler divides the prescaler clock by 256; glitch filter recognizes change on input pin after 128 rising clock edges."]
            _0111,
            #[doc = "Prescaler divides the prescaler clock by 512; glitch filter recognizes change on input pin after 256 rising clock edges."]
            _1000,
            #[doc = "Prescaler divides the prescaler clock by 1024; glitch filter recognizes change on input pin after 512 rising clock edges."]
            _1001,
            #[doc = "Prescaler divides the prescaler clock by 2048; glitch filter recognizes change on input pin after 1024 rising clock edges."]
            _1010,
            #[doc = "Prescaler divides the prescaler clock by 4096; glitch filter recognizes change on input pin after 2048 rising clock edges."]
            _1011,
            #[doc = "Prescaler divides the prescaler clock by 8192; glitch filter recognizes change on input pin after 4096 rising clock edges."]
            _1100,
            #[doc = "Prescaler divides the prescaler clock by 16,384; glitch filter recognizes change on input pin after 8192 rising clock edges."]
            _1101,
            #[doc = "Prescaler divides the prescaler clock by 32,768; glitch filter recognizes change on input pin after 16,384 rising clock edges."]
            _1110,
            #[doc = "Prescaler divides the prescaler clock by 65,536; glitch filter recognizes change on input pin after 32,768 rising clock edges."]
            _1111,
        }
        impl PRESCALER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PRESCALER::_0000 => 0,
                    PRESCALER::_0001 => 1,
                    PRESCALER::_0010 => 2,
                    PRESCALER::_0011 => 3,
                    PRESCALER::_0100 => 4,
                    PRESCALER::_0101 => 5,
                    PRESCALER::_0110 => 6,
                    PRESCALER::_0111 => 7,
                    PRESCALER::_1000 => 8,
                    PRESCALER::_1001 => 9,
                    PRESCALER::_1010 => 10,
                    PRESCALER::_1011 => 11,
                    PRESCALER::_1100 => 12,
                    PRESCALER::_1101 => 13,
                    PRESCALER::_1110 => 14,
                    PRESCALER::_1111 => 15,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PRESCALER {
                match value {
                    0 => PRESCALER::_0000,
                    1 => PRESCALER::_0001,
                    2 => PRESCALER::_0010,
                    3 => PRESCALER::_0011,
                    4 => PRESCALER::_0100,
                    5 => PRESCALER::_0101,
                    6 => PRESCALER::_0110,
                    7 => PRESCALER::_0111,
                    8 => PRESCALER::_1000,
                    9 => PRESCALER::_1001,
                    10 => PRESCALER::_1010,
                    11 => PRESCALER::_1011,
                    12 => PRESCALER::_1100,
                    13 => PRESCALER::_1101,
                    14 => PRESCALER::_1110,
                    15 => PRESCALER::_1111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == PRESCALER::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == PRESCALER::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == PRESCALER::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == PRESCALER::_0011
            }
            #[doc = "Checks if the value of the field is `_0100`"]
            #[inline(always)]
            pub fn is_0100(&self) -> bool {
                *self == PRESCALER::_0100
            }
            #[doc = "Checks if the value of the field is `_0101`"]
            #[inline(always)]
            pub fn is_0101(&self) -> bool {
                *self == PRESCALER::_0101
            }
            #[doc = "Checks if the value of the field is `_0110`"]
            #[inline(always)]
            pub fn is_0110(&self) -> bool {
                *self == PRESCALER::_0110
            }
            #[doc = "Checks if the value of the field is `_0111`"]
            #[inline(always)]
            pub fn is_0111(&self) -> bool {
                *self == PRESCALER::_0111
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == PRESCALER::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == PRESCALER::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == PRESCALER::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == PRESCALER::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == PRESCALER::_1100
            }
            #[doc = "Checks if the value of the field is `_1101`"]
            #[inline(always)]
            pub fn is_1101(&self) -> bool {
                *self == PRESCALER::_1101
            }
            #[doc = "Checks if the value of the field is `_1110`"]
            #[inline(always)]
            pub fn is_1110(&self) -> bool {
                *self == PRESCALER::_1110
            }
            #[doc = "Checks if the value of the field is `_1111`"]
            #[inline(always)]
            pub fn is_1111(&self) -> bool {
                *self == PRESCALER::_1111
            }
        }
        #[doc = "Values that can be written to the field `PCS`"]
        pub enum PCSW {
            #[doc = "Prescaler/glitch filter clock 0 selected."]
            _00,
            #[doc = "Prescaler/glitch filter clock 1 selected."]
            _01,
            #[doc = "Prescaler/glitch filter clock 2 selected."]
            _10,
            #[doc = "Prescaler/glitch filter clock 3 selected."]
            _11,
        }
        impl PCSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PCSW::_00 => 0,
                    PCSW::_01 => 1,
                    PCSW::_10 => 2,
                    PCSW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PCSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PCSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PCSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Prescaler/glitch filter clock 0 selected."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(PCSW::_00)
            }
            #[doc = "Prescaler/glitch filter clock 1 selected."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(PCSW::_01)
            }
            #[doc = "Prescaler/glitch filter clock 2 selected."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(PCSW::_10)
            }
            #[doc = "Prescaler/glitch filter clock 3 selected."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(PCSW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PBYP`"]
        pub enum PBYPW {
            #[doc = "Prescaler/glitch filter is enabled."]
            _0,
            #[doc = "Prescaler/glitch filter is bypassed."]
            _1,
        }
        impl PBYPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PBYPW::_0 => false,
                    PBYPW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PBYPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PBYPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PBYPW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Prescaler/glitch filter is enabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PBYPW::_0)
            }
            #[doc = "Prescaler/glitch filter is bypassed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PBYPW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PRESCALE`"]
        pub enum PRESCALEW {
            #[doc = "Prescaler divides the prescaler clock by 2; glitch filter does not support this configuration."]
            _0000,
            #[doc = "Prescaler divides the prescaler clock by 4; glitch filter recognizes change on input pin after 2 rising clock edges."]
            _0001,
            #[doc = "Prescaler divides the prescaler clock by 8; glitch filter recognizes change on input pin after 4 rising clock edges."]
            _0010,
            #[doc = "Prescaler divides the prescaler clock by 16; glitch filter recognizes change on input pin after 8 rising clock edges."]
            _0011,
            #[doc = "Prescaler divides the prescaler clock by 32; glitch filter recognizes change on input pin after 16 rising clock edges."]
            _0100,
            #[doc = "Prescaler divides the prescaler clock by 64; glitch filter recognizes change on input pin after 32 rising clock edges."]
            _0101,
            #[doc = "Prescaler divides the prescaler clock by 128; glitch filter recognizes change on input pin after 64 rising clock edges."]
            _0110,
            #[doc = "Prescaler divides the prescaler clock by 256; glitch filter recognizes change on input pin after 128 rising clock edges."]
            _0111,
            #[doc = "Prescaler divides the prescaler clock by 512; glitch filter recognizes change on input pin after 256 rising clock edges."]
            _1000,
            #[doc = "Prescaler divides the prescaler clock by 1024; glitch filter recognizes change on input pin after 512 rising clock edges."]
            _1001,
            #[doc = "Prescaler divides the prescaler clock by 2048; glitch filter recognizes change on input pin after 1024 rising clock edges."]
            _1010,
            #[doc = "Prescaler divides the prescaler clock by 4096; glitch filter recognizes change on input pin after 2048 rising clock edges."]
            _1011,
            #[doc = "Prescaler divides the prescaler clock by 8192; glitch filter recognizes change on input pin after 4096 rising clock edges."]
            _1100,
            #[doc = "Prescaler divides the prescaler clock by 16,384; glitch filter recognizes change on input pin after 8192 rising clock edges."]
            _1101,
            #[doc = "Prescaler divides the prescaler clock by 32,768; glitch filter recognizes change on input pin after 16,384 rising clock edges."]
            _1110,
            #[doc = "Prescaler divides the prescaler clock by 65,536; glitch filter recognizes change on input pin after 32,768 rising clock edges."]
            _1111,
        }
        impl PRESCALEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PRESCALEW::_0000 => 0,
                    PRESCALEW::_0001 => 1,
                    PRESCALEW::_0010 => 2,
                    PRESCALEW::_0011 => 3,
                    PRESCALEW::_0100 => 4,
                    PRESCALEW::_0101 => 5,
                    PRESCALEW::_0110 => 6,
                    PRESCALEW::_0111 => 7,
                    PRESCALEW::_1000 => 8,
                    PRESCALEW::_1001 => 9,
                    PRESCALEW::_1010 => 10,
                    PRESCALEW::_1011 => 11,
                    PRESCALEW::_1100 => 12,
                    PRESCALEW::_1101 => 13,
                    PRESCALEW::_1110 => 14,
                    PRESCALEW::_1111 => 15,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PRESCALEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PRESCALEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PRESCALEW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Prescaler divides the prescaler clock by 2; glitch filter does not support this configuration."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(PRESCALEW::_0000)
            }
            #[doc = "Prescaler divides the prescaler clock by 4; glitch filter recognizes change on input pin after 2 rising clock edges."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(PRESCALEW::_0001)
            }
            #[doc = "Prescaler divides the prescaler clock by 8; glitch filter recognizes change on input pin after 4 rising clock edges."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(PRESCALEW::_0010)
            }
            #[doc = "Prescaler divides the prescaler clock by 16; glitch filter recognizes change on input pin after 8 rising clock edges."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(PRESCALEW::_0011)
            }
            #[doc = "Prescaler divides the prescaler clock by 32; glitch filter recognizes change on input pin after 16 rising clock edges."]
            #[inline(always)]
            pub fn _0100(self) -> &'a mut W {
                self.variant(PRESCALEW::_0100)
            }
            #[doc = "Prescaler divides the prescaler clock by 64; glitch filter recognizes change on input pin after 32 rising clock edges."]
            #[inline(always)]
            pub fn _0101(self) -> &'a mut W {
                self.variant(PRESCALEW::_0101)
            }
            #[doc = "Prescaler divides the prescaler clock by 128; glitch filter recognizes change on input pin after 64 rising clock edges."]
            #[inline(always)]
            pub fn _0110(self) -> &'a mut W {
                self.variant(PRESCALEW::_0110)
            }
            #[doc = "Prescaler divides the prescaler clock by 256; glitch filter recognizes change on input pin after 128 rising clock edges."]
            #[inline(always)]
            pub fn _0111(self) -> &'a mut W {
                self.variant(PRESCALEW::_0111)
            }
            #[doc = "Prescaler divides the prescaler clock by 512; glitch filter recognizes change on input pin after 256 rising clock edges."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(PRESCALEW::_1000)
            }
            #[doc = "Prescaler divides the prescaler clock by 1024; glitch filter recognizes change on input pin after 512 rising clock edges."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(PRESCALEW::_1001)
            }
            #[doc = "Prescaler divides the prescaler clock by 2048; glitch filter recognizes change on input pin after 1024 rising clock edges."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(PRESCALEW::_1010)
            }
            #[doc = "Prescaler divides the prescaler clock by 4096; glitch filter recognizes change on input pin after 2048 rising clock edges."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(PRESCALEW::_1011)
            }
            #[doc = "Prescaler divides the prescaler clock by 8192; glitch filter recognizes change on input pin after 4096 rising clock edges."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(PRESCALEW::_1100)
            }
            #[doc = "Prescaler divides the prescaler clock by 16,384; glitch filter recognizes change on input pin after 8192 rising clock edges."]
            #[inline(always)]
            pub fn _1101(self) -> &'a mut W {
                self.variant(PRESCALEW::_1101)
            }
            #[doc = "Prescaler divides the prescaler clock by 32,768; glitch filter recognizes change on input pin after 16,384 rising clock edges."]
            #[inline(always)]
            pub fn _1110(self) -> &'a mut W {
                self.variant(PRESCALEW::_1110)
            }
            #[doc = "Prescaler divides the prescaler clock by 65,536; glitch filter recognizes change on input pin after 32,768 rising clock edges."]
            #[inline(always)]
            pub fn _1111(self) -> &'a mut W {
                self.variant(PRESCALEW::_1111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:1 - Prescaler Clock Select"]
            #[inline(always)]
            pub fn pcs(&self) -> PCSR {
                PCSR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 2 - Prescaler Bypass"]
            #[inline(always)]
            pub fn pbyp(&self) -> PBYPR {
                PBYPR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 3:6 - Prescale Value"]
            #[inline(always)]
            pub fn prescale(&self) -> PRESCALER {
                PRESCALER::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:1 - Prescaler Clock Select"]
            #[inline(always)]
            pub fn pcs(&mut self) -> _PCSW {
                _PCSW { w: self }
            }
            #[doc = "Bit 2 - Prescaler Bypass"]
            #[inline(always)]
            pub fn pbyp(&mut self) -> _PBYPW {
                _PBYPW { w: self }
            }
            #[doc = "Bits 3:6 - Prescale Value"]
            #[inline(always)]
            pub fn prescale(&mut self) -> _PRESCALEW {
                _PRESCALEW { w: self }
            }
        }
    }
    #[doc = "Low Power Timer Compare Register"]
    pub struct CMR {
        register: VolatileCell<u32>,
    }
    #[doc = "Low Power Timer Compare Register"]
    pub mod cmr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CMR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct COMPARER {
            bits: u16,
        }
        impl COMPARER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _COMPAREW<'a> {
            w: &'a mut W,
        }
        impl<'a> _COMPAREW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Compare Value"]
            #[inline(always)]
            pub fn compare(&self) -> COMPARER {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                COMPARER { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Compare Value"]
            #[inline(always)]
            pub fn compare(&mut self) -> _COMPAREW {
                _COMPAREW { w: self }
            }
        }
    }
    #[doc = "Low Power Timer Counter Register"]
    pub struct CNR {
        register: VolatileCell<u32>,
    }
    #[doc = "Low Power Timer Counter Register"]
    pub mod cnr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CNR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct COUNTERR {
            bits: u16,
        }
        impl COUNTERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _COUNTERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _COUNTERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Counter Value"]
            #[inline(always)]
            pub fn counter(&self) -> COUNTERR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                COUNTERR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Counter Value"]
            #[inline(always)]
            pub fn counter(&mut self) -> _COUNTERW {
                _COUNTERW { w: self }
            }
        }
    }
}
#[doc = "Low Power Timer"]
pub struct LPTMR0 {
    register_block: lptmr0::RegisterBlock,
}
impl Deref for LPTMR0 {
    type Target = lptmr0::RegisterBlock;
    fn deref(&self) -> &lptmr0::RegisterBlock {
        &self.register_block
    }
}
#[doc = "System Integration Module"]
pub const SIM: Peripheral<SIM> = unsafe { Peripheral::new(1074036736) };
#[doc = "System Integration Module"]
pub mod sim {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        _reserved0: [u8; 4usize],
        #[doc = "0x04 - Chip Control register"]
        pub chipctl: CHIPCTL,
        _reserved1: [u8; 4usize],
        #[doc = "0x0c - FTM Option Register 0"]
        pub ftmopt0: FTMOPT0,
        #[doc = "0x10 - LPO Clock Select Register"]
        pub lpoclks: LPOCLKS,
        _reserved2: [u8; 4usize],
        #[doc = "0x18 - ADC Options Register"]
        pub adcopt: ADCOPT,
        #[doc = "0x1c - FTM Option Register 1"]
        pub ftmopt1: FTMOPT1,
        #[doc = "0x20 - Miscellaneous control register 0"]
        pub misctrl0: MISCTRL0,
        #[doc = "0x24 - System Device Identification Register"]
        pub sdid: SDID,
        _reserved3: [u8; 24usize],
        #[doc = "0x40 - Platform Clock Gating Control Register"]
        pub platcgc: PLATCGC,
        _reserved4: [u8; 8usize],
        #[doc = "0x4c - Flash Configuration Register 1"]
        pub fcfg1: FCFG1,
        _reserved5: [u8; 4usize],
        #[doc = "0x54 - Unique Identification Register High"]
        pub uidh: UIDH,
        #[doc = "0x58 - Unique Identification Register Mid-High"]
        pub uidmh: UIDMH,
        #[doc = "0x5c - Unique Identification Register Mid Low"]
        pub uidml: UIDML,
        #[doc = "0x60 - Unique Identification Register Low"]
        pub uidl: UIDL,
        _reserved6: [u8; 4usize],
        #[doc = "0x68 - System Clock Divider Register 4"]
        pub clkdiv4: CLKDIV4,
        #[doc = "0x6c - Miscellaneous Control register 1"]
        pub misctrl1: MISCTRL1,
    }
    #[doc = "Chip Control register"]
    pub struct CHIPCTL {
        register: VolatileCell<u32>,
    }
    #[doc = "Chip Control register"]
    pub mod chipctl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CHIPCTL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `ADC_INTERLEAVE_EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ADC_INTERLEAVE_ENR {
            #[doc = "Interleaving disabled. No channel pair interleaved. Interleaved channels are individually connected to pins. PTC0 is connected to ADC0_SE8. PTC1 is connected to ADC0_SE9. PTB15 is connected to ADC1_SE14. PTB16 is connected to ADC1_SE15. PTB0 is connected to ADC0_SE4. PTB1 is connected to ADC0_SE5. PTB13 is connected to ADC1_SE8. PTB14 is connected to ADC1_SE9."]
            _0000,
            #[doc = "PTB14 to ADC1_SE9 and ADC0_SE9"]
            _1XXX,
            #[doc = "PTB13 to ADC1_SE8 and ADC0_SE8"]
            X1XX,
            #[doc = "PTB1 to ADC0_SE5 and ADC1_SE15"]
            XX1X,
            #[doc = "PTB0 to ADC0_SE4 and ADC1_SE14"]
            XXX1,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl ADC_INTERLEAVE_ENR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    ADC_INTERLEAVE_ENR::_0000 => 0,
                    ADC_INTERLEAVE_ENR::_1XXX => 8,
                    ADC_INTERLEAVE_ENR::X1XX => 4,
                    ADC_INTERLEAVE_ENR::XX1X => 2,
                    ADC_INTERLEAVE_ENR::XXX1 => 1,
                    ADC_INTERLEAVE_ENR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> ADC_INTERLEAVE_ENR {
                match value {
                    0 => ADC_INTERLEAVE_ENR::_0000,
                    8 => ADC_INTERLEAVE_ENR::_1XXX,
                    4 => ADC_INTERLEAVE_ENR::X1XX,
                    2 => ADC_INTERLEAVE_ENR::XX1X,
                    1 => ADC_INTERLEAVE_ENR::XXX1,
                    i => ADC_INTERLEAVE_ENR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == ADC_INTERLEAVE_ENR::_0000
            }
            #[doc = "Checks if the value of the field is `_1XXX`"]
            #[inline(always)]
            pub fn is_1xxx(&self) -> bool {
                *self == ADC_INTERLEAVE_ENR::_1XXX
            }
            #[doc = "Checks if the value of the field is `X1XX`"]
            #[inline(always)]
            pub fn is_x1xx(&self) -> bool {
                *self == ADC_INTERLEAVE_ENR::X1XX
            }
            #[doc = "Checks if the value of the field is `XX1X`"]
            #[inline(always)]
            pub fn is_xx1x(&self) -> bool {
                *self == ADC_INTERLEAVE_ENR::XX1X
            }
            #[doc = "Checks if the value of the field is `XXX1`"]
            #[inline(always)]
            pub fn is_xxx1(&self) -> bool {
                *self == ADC_INTERLEAVE_ENR::XXX1
            }
        }
        #[doc = "Possible values of the field `CLKOUTSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CLKOUTSELR {
            #[doc = "SCG CLKOUT"]
            _0000,
            #[doc = "SOSC DIV2 CLK"]
            _0010,
            #[doc = "SIRC DIV2 CLK"]
            _0100,
            #[doc = "For S32K148: QSPI SFIF_CLK_HYP: Divide by 2 clock (configured through SCLKCONFIG[5]) for HyperRAM going to sfif clock to QSPI; For others: Reserved"]
            _0101,
            #[doc = "FIRC DIV2 CLK"]
            _0110,
            #[doc = "HCLK"]
            _0111,
            #[doc = "SPLL DIV2 CLK"]
            _1000,
            #[doc = "BUS_CLK"]
            _1001,
            #[doc = "LPO128K_CLK"]
            _1010,
            #[doc = "For S32K148: QSPI IPG_CLK; For others: Reserved"]
            _1011,
            #[doc = "LPO_CLK as selected by SIM_LPOCLKS[LPOCLKSEL]"]
            _1100,
            #[doc = "For S32K148: QSPI IPG_CLK_SFIF; For others: Reserved"]
            _1101,
            #[doc = "RTC_CLK as selected by SIM_LPOCLKS[RTCCLKSEL]"]
            _1110,
            #[doc = "For S32K148: QSPI IPG_CLK_2XSFIF; For others: Reserved"]
            _1111,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl CLKOUTSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    CLKOUTSELR::_0000 => 0,
                    CLKOUTSELR::_0010 => 2,
                    CLKOUTSELR::_0100 => 4,
                    CLKOUTSELR::_0101 => 5,
                    CLKOUTSELR::_0110 => 6,
                    CLKOUTSELR::_0111 => 7,
                    CLKOUTSELR::_1000 => 8,
                    CLKOUTSELR::_1001 => 9,
                    CLKOUTSELR::_1010 => 10,
                    CLKOUTSELR::_1011 => 11,
                    CLKOUTSELR::_1100 => 12,
                    CLKOUTSELR::_1101 => 13,
                    CLKOUTSELR::_1110 => 14,
                    CLKOUTSELR::_1111 => 15,
                    CLKOUTSELR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> CLKOUTSELR {
                match value {
                    0 => CLKOUTSELR::_0000,
                    2 => CLKOUTSELR::_0010,
                    4 => CLKOUTSELR::_0100,
                    5 => CLKOUTSELR::_0101,
                    6 => CLKOUTSELR::_0110,
                    7 => CLKOUTSELR::_0111,
                    8 => CLKOUTSELR::_1000,
                    9 => CLKOUTSELR::_1001,
                    10 => CLKOUTSELR::_1010,
                    11 => CLKOUTSELR::_1011,
                    12 => CLKOUTSELR::_1100,
                    13 => CLKOUTSELR::_1101,
                    14 => CLKOUTSELR::_1110,
                    15 => CLKOUTSELR::_1111,
                    i => CLKOUTSELR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == CLKOUTSELR::_0000
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == CLKOUTSELR::_0010
            }
            #[doc = "Checks if the value of the field is `_0100`"]
            #[inline(always)]
            pub fn is_0100(&self) -> bool {
                *self == CLKOUTSELR::_0100
            }
            #[doc = "Checks if the value of the field is `_0101`"]
            #[inline(always)]
            pub fn is_0101(&self) -> bool {
                *self == CLKOUTSELR::_0101
            }
            #[doc = "Checks if the value of the field is `_0110`"]
            #[inline(always)]
            pub fn is_0110(&self) -> bool {
                *self == CLKOUTSELR::_0110
            }
            #[doc = "Checks if the value of the field is `_0111`"]
            #[inline(always)]
            pub fn is_0111(&self) -> bool {
                *self == CLKOUTSELR::_0111
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == CLKOUTSELR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == CLKOUTSELR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == CLKOUTSELR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == CLKOUTSELR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == CLKOUTSELR::_1100
            }
            #[doc = "Checks if the value of the field is `_1101`"]
            #[inline(always)]
            pub fn is_1101(&self) -> bool {
                *self == CLKOUTSELR::_1101
            }
            #[doc = "Checks if the value of the field is `_1110`"]
            #[inline(always)]
            pub fn is_1110(&self) -> bool {
                *self == CLKOUTSELR::_1110
            }
            #[doc = "Checks if the value of the field is `_1111`"]
            #[inline(always)]
            pub fn is_1111(&self) -> bool {
                *self == CLKOUTSELR::_1111
            }
        }
        #[doc = "Possible values of the field `CLKOUTDIV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CLKOUTDIVR {
            #[doc = "Divide by 1"]
            _000,
            #[doc = "Divide by 2"]
            _001,
            #[doc = "Divide by 3"]
            _010,
            #[doc = "Divide by 4"]
            _011,
            #[doc = "Divide by 5"]
            _100,
            #[doc = "Divide by 6"]
            _101,
            #[doc = "Divide by 7"]
            _110,
            #[doc = "Divide by 8"]
            _111,
        }
        impl CLKOUTDIVR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    CLKOUTDIVR::_000 => 0,
                    CLKOUTDIVR::_001 => 1,
                    CLKOUTDIVR::_010 => 2,
                    CLKOUTDIVR::_011 => 3,
                    CLKOUTDIVR::_100 => 4,
                    CLKOUTDIVR::_101 => 5,
                    CLKOUTDIVR::_110 => 6,
                    CLKOUTDIVR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> CLKOUTDIVR {
                match value {
                    0 => CLKOUTDIVR::_000,
                    1 => CLKOUTDIVR::_001,
                    2 => CLKOUTDIVR::_010,
                    3 => CLKOUTDIVR::_011,
                    4 => CLKOUTDIVR::_100,
                    5 => CLKOUTDIVR::_101,
                    6 => CLKOUTDIVR::_110,
                    7 => CLKOUTDIVR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == CLKOUTDIVR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == CLKOUTDIVR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == CLKOUTDIVR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == CLKOUTDIVR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == CLKOUTDIVR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == CLKOUTDIVR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == CLKOUTDIVR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == CLKOUTDIVR::_111
            }
        }
        #[doc = "Possible values of the field `CLKOUTEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CLKOUTENR {
            #[doc = "Clockout disable"]
            _0,
            #[doc = "Clockout enable"]
            _1,
        }
        impl CLKOUTENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CLKOUTENR::_0 => false,
                    CLKOUTENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CLKOUTENR {
                match value {
                    false => CLKOUTENR::_0,
                    true => CLKOUTENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CLKOUTENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CLKOUTENR::_1
            }
        }
        #[doc = "Possible values of the field `TRACECLK_SEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRACECLK_SELR {
            #[doc = "Core clock"]
            _0,
            #[doc = "Platform clock"]
            _1,
        }
        impl TRACECLK_SELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRACECLK_SELR::_0 => false,
                    TRACECLK_SELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRACECLK_SELR {
                match value {
                    false => TRACECLK_SELR::_0,
                    true => TRACECLK_SELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRACECLK_SELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRACECLK_SELR::_1
            }
        }
        #[doc = "Possible values of the field `PDB_BB_SEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PDB_BB_SELR {
            #[doc = "PDB0 channel 0 back-to-back operation with ADC0 COCO[7:0] and PDB1 channel 0 back-to-back operation with ADC1 COCO[7:0]"]
            _0,
            #[doc = "Channel 0 of PDB0 and PDB1 back-to-back operation with COCO[7:0] of ADC0 and ADC1."]
            _1,
        }
        impl PDB_BB_SELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PDB_BB_SELR::_0 => false,
                    PDB_BB_SELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PDB_BB_SELR {
                match value {
                    false => PDB_BB_SELR::_0,
                    true => PDB_BB_SELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PDB_BB_SELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PDB_BB_SELR::_1
            }
        }
        #[doc = "Possible values of the field `ADC_SUPPLY`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ADC_SUPPLYR {
            #[doc = "5 V input VDD supply (VDD)"]
            _000,
            #[doc = "5 V input analog supply (VDDA)"]
            _001,
            #[doc = "ADC Reference Supply (VREFH)"]
            _010,
            #[doc = "3.3 V Oscillator Regulator Output (VDD_3V)"]
            _011,
            #[doc = "3.3 V flash regulator output (VDD_flash_3V)"]
            _100,
            #[doc = "1.2 V core regulator output (VDD_LV)"]
            _101,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl ADC_SUPPLYR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    ADC_SUPPLYR::_000 => 0,
                    ADC_SUPPLYR::_001 => 1,
                    ADC_SUPPLYR::_010 => 2,
                    ADC_SUPPLYR::_011 => 3,
                    ADC_SUPPLYR::_100 => 4,
                    ADC_SUPPLYR::_101 => 5,
                    ADC_SUPPLYR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> ADC_SUPPLYR {
                match value {
                    0 => ADC_SUPPLYR::_000,
                    1 => ADC_SUPPLYR::_001,
                    2 => ADC_SUPPLYR::_010,
                    3 => ADC_SUPPLYR::_011,
                    4 => ADC_SUPPLYR::_100,
                    5 => ADC_SUPPLYR::_101,
                    i => ADC_SUPPLYR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == ADC_SUPPLYR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == ADC_SUPPLYR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == ADC_SUPPLYR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == ADC_SUPPLYR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == ADC_SUPPLYR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == ADC_SUPPLYR::_101
            }
        }
        #[doc = "Possible values of the field `ADC_SUPPLYEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ADC_SUPPLYENR {
            #[doc = "Disable internal supply monitoring"]
            _0,
            #[doc = "Enable internal supply monitoring"]
            _1,
        }
        impl ADC_SUPPLYENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ADC_SUPPLYENR::_0 => false,
                    ADC_SUPPLYENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ADC_SUPPLYENR {
                match value {
                    false => ADC_SUPPLYENR::_0,
                    true => ADC_SUPPLYENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ADC_SUPPLYENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ADC_SUPPLYENR::_1
            }
        }
        #[doc = "Possible values of the field `SRAMU_RETEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SRAMU_RETENR {
            #[doc = "SRAMU contents are retained across resets"]
            _0,
            #[doc = "No SRAMU retention"]
            _1,
        }
        impl SRAMU_RETENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SRAMU_RETENR::_0 => false,
                    SRAMU_RETENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SRAMU_RETENR {
                match value {
                    false => SRAMU_RETENR::_0,
                    true => SRAMU_RETENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SRAMU_RETENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SRAMU_RETENR::_1
            }
        }
        #[doc = "Possible values of the field `SRAML_RETEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SRAML_RETENR {
            #[doc = "SRAML contents are retained across resets"]
            _0,
            #[doc = "No SRAML retention"]
            _1,
        }
        impl SRAML_RETENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SRAML_RETENR::_0 => false,
                    SRAML_RETENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SRAML_RETENR {
                match value {
                    false => SRAML_RETENR::_0,
                    true => SRAML_RETENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SRAML_RETENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SRAML_RETENR::_1
            }
        }
        #[doc = "Values that can be written to the field `ADC_INTERLEAVE_EN`"]
        pub enum ADC_INTERLEAVE_ENW {
            #[doc = "Interleaving disabled. No channel pair interleaved. Interleaved channels are individually connected to pins. PTC0 is connected to ADC0_SE8. PTC1 is connected to ADC0_SE9. PTB15 is connected to ADC1_SE14. PTB16 is connected to ADC1_SE15. PTB0 is connected to ADC0_SE4. PTB1 is connected to ADC0_SE5. PTB13 is connected to ADC1_SE8. PTB14 is connected to ADC1_SE9."]
            _0000,
            #[doc = "PTB14 to ADC1_SE9 and ADC0_SE9"]
            _1XXX,
            #[doc = "PTB13 to ADC1_SE8 and ADC0_SE8"]
            X1XX,
            #[doc = "PTB1 to ADC0_SE5 and ADC1_SE15"]
            XX1X,
            #[doc = "PTB0 to ADC0_SE4 and ADC1_SE14"]
            XXX1,
        }
        impl ADC_INTERLEAVE_ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    ADC_INTERLEAVE_ENW::_0000 => 0,
                    ADC_INTERLEAVE_ENW::_1XXX => 8,
                    ADC_INTERLEAVE_ENW::X1XX => 4,
                    ADC_INTERLEAVE_ENW::XX1X => 2,
                    ADC_INTERLEAVE_ENW::XXX1 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ADC_INTERLEAVE_ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ADC_INTERLEAVE_ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ADC_INTERLEAVE_ENW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interleaving disabled. No channel pair interleaved. Interleaved channels are individually connected to pins. PTC0 is connected to ADC0_SE8. PTC1 is connected to ADC0_SE9. PTB15 is connected to ADC1_SE14. PTB16 is connected to ADC1_SE15. PTB0 is connected to ADC0_SE4. PTB1 is connected to ADC0_SE5. PTB13 is connected to ADC1_SE8. PTB14 is connected to ADC1_SE9."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(ADC_INTERLEAVE_ENW::_0000)
            }
            #[doc = "PTB14 to ADC1_SE9 and ADC0_SE9"]
            #[inline(always)]
            pub fn _1xxx(self) -> &'a mut W {
                self.variant(ADC_INTERLEAVE_ENW::_1XXX)
            }
            #[doc = "PTB13 to ADC1_SE8 and ADC0_SE8"]
            #[inline(always)]
            pub fn x1xx(self) -> &'a mut W {
                self.variant(ADC_INTERLEAVE_ENW::X1XX)
            }
            #[doc = "PTB1 to ADC0_SE5 and ADC1_SE15"]
            #[inline(always)]
            pub fn xx1x(self) -> &'a mut W {
                self.variant(ADC_INTERLEAVE_ENW::XX1X)
            }
            #[doc = "PTB0 to ADC0_SE4 and ADC1_SE14"]
            #[inline(always)]
            pub fn xxx1(self) -> &'a mut W {
                self.variant(ADC_INTERLEAVE_ENW::XXX1)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CLKOUTSEL`"]
        pub enum CLKOUTSELW {
            #[doc = "SCG CLKOUT"]
            _0000,
            #[doc = "SOSC DIV2 CLK"]
            _0010,
            #[doc = "SIRC DIV2 CLK"]
            _0100,
            #[doc = "For S32K148: QSPI SFIF_CLK_HYP: Divide by 2 clock (configured through SCLKCONFIG[5]) for HyperRAM going to sfif clock to QSPI; For others: Reserved"]
            _0101,
            #[doc = "FIRC DIV2 CLK"]
            _0110,
            #[doc = "HCLK"]
            _0111,
            #[doc = "SPLL DIV2 CLK"]
            _1000,
            #[doc = "BUS_CLK"]
            _1001,
            #[doc = "LPO128K_CLK"]
            _1010,
            #[doc = "For S32K148: QSPI IPG_CLK; For others: Reserved"]
            _1011,
            #[doc = "LPO_CLK as selected by SIM_LPOCLKS[LPOCLKSEL]"]
            _1100,
            #[doc = "For S32K148: QSPI IPG_CLK_SFIF; For others: Reserved"]
            _1101,
            #[doc = "RTC_CLK as selected by SIM_LPOCLKS[RTCCLKSEL]"]
            _1110,
            #[doc = "For S32K148: QSPI IPG_CLK_2XSFIF; For others: Reserved"]
            _1111,
        }
        impl CLKOUTSELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    CLKOUTSELW::_0000 => 0,
                    CLKOUTSELW::_0010 => 2,
                    CLKOUTSELW::_0100 => 4,
                    CLKOUTSELW::_0101 => 5,
                    CLKOUTSELW::_0110 => 6,
                    CLKOUTSELW::_0111 => 7,
                    CLKOUTSELW::_1000 => 8,
                    CLKOUTSELW::_1001 => 9,
                    CLKOUTSELW::_1010 => 10,
                    CLKOUTSELW::_1011 => 11,
                    CLKOUTSELW::_1100 => 12,
                    CLKOUTSELW::_1101 => 13,
                    CLKOUTSELW::_1110 => 14,
                    CLKOUTSELW::_1111 => 15,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLKOUTSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLKOUTSELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CLKOUTSELW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "SCG CLKOUT"]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(CLKOUTSELW::_0000)
            }
            #[doc = "SOSC DIV2 CLK"]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(CLKOUTSELW::_0010)
            }
            #[doc = "SIRC DIV2 CLK"]
            #[inline(always)]
            pub fn _0100(self) -> &'a mut W {
                self.variant(CLKOUTSELW::_0100)
            }
            #[doc = "For S32K148: QSPI SFIF_CLK_HYP: Divide by 2 clock (configured through SCLKCONFIG[5]) for HyperRAM going to sfif clock to QSPI; For others: Reserved"]
            #[inline(always)]
            pub fn _0101(self) -> &'a mut W {
                self.variant(CLKOUTSELW::_0101)
            }
            #[doc = "FIRC DIV2 CLK"]
            #[inline(always)]
            pub fn _0110(self) -> &'a mut W {
                self.variant(CLKOUTSELW::_0110)
            }
            #[doc = "HCLK"]
            #[inline(always)]
            pub fn _0111(self) -> &'a mut W {
                self.variant(CLKOUTSELW::_0111)
            }
            #[doc = "SPLL DIV2 CLK"]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(CLKOUTSELW::_1000)
            }
            #[doc = "BUS_CLK"]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(CLKOUTSELW::_1001)
            }
            #[doc = "LPO128K_CLK"]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(CLKOUTSELW::_1010)
            }
            #[doc = "For S32K148: QSPI IPG_CLK; For others: Reserved"]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(CLKOUTSELW::_1011)
            }
            #[doc = "LPO_CLK as selected by SIM_LPOCLKS[LPOCLKSEL]"]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(CLKOUTSELW::_1100)
            }
            #[doc = "For S32K148: QSPI IPG_CLK_SFIF; For others: Reserved"]
            #[inline(always)]
            pub fn _1101(self) -> &'a mut W {
                self.variant(CLKOUTSELW::_1101)
            }
            #[doc = "RTC_CLK as selected by SIM_LPOCLKS[RTCCLKSEL]"]
            #[inline(always)]
            pub fn _1110(self) -> &'a mut W {
                self.variant(CLKOUTSELW::_1110)
            }
            #[doc = "For S32K148: QSPI IPG_CLK_2XSFIF; For others: Reserved"]
            #[inline(always)]
            pub fn _1111(self) -> &'a mut W {
                self.variant(CLKOUTSELW::_1111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CLKOUTDIV`"]
        pub enum CLKOUTDIVW {
            #[doc = "Divide by 1"]
            _000,
            #[doc = "Divide by 2"]
            _001,
            #[doc = "Divide by 3"]
            _010,
            #[doc = "Divide by 4"]
            _011,
            #[doc = "Divide by 5"]
            _100,
            #[doc = "Divide by 6"]
            _101,
            #[doc = "Divide by 7"]
            _110,
            #[doc = "Divide by 8"]
            _111,
        }
        impl CLKOUTDIVW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    CLKOUTDIVW::_000 => 0,
                    CLKOUTDIVW::_001 => 1,
                    CLKOUTDIVW::_010 => 2,
                    CLKOUTDIVW::_011 => 3,
                    CLKOUTDIVW::_100 => 4,
                    CLKOUTDIVW::_101 => 5,
                    CLKOUTDIVW::_110 => 6,
                    CLKOUTDIVW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLKOUTDIVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLKOUTDIVW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CLKOUTDIVW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Divide by 1"]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(CLKOUTDIVW::_000)
            }
            #[doc = "Divide by 2"]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(CLKOUTDIVW::_001)
            }
            #[doc = "Divide by 3"]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(CLKOUTDIVW::_010)
            }
            #[doc = "Divide by 4"]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(CLKOUTDIVW::_011)
            }
            #[doc = "Divide by 5"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(CLKOUTDIVW::_100)
            }
            #[doc = "Divide by 6"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(CLKOUTDIVW::_101)
            }
            #[doc = "Divide by 7"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(CLKOUTDIVW::_110)
            }
            #[doc = "Divide by 8"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(CLKOUTDIVW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CLKOUTEN`"]
        pub enum CLKOUTENW {
            #[doc = "Clockout disable"]
            _0,
            #[doc = "Clockout enable"]
            _1,
        }
        impl CLKOUTENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CLKOUTENW::_0 => false,
                    CLKOUTENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLKOUTENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLKOUTENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CLKOUTENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clockout disable"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CLKOUTENW::_0)
            }
            #[doc = "Clockout enable"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CLKOUTENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRACECLK_SEL`"]
        pub enum TRACECLK_SELW {
            #[doc = "Core clock"]
            _0,
            #[doc = "Platform clock"]
            _1,
        }
        impl TRACECLK_SELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRACECLK_SELW::_0 => false,
                    TRACECLK_SELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRACECLK_SELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRACECLK_SELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRACECLK_SELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Core clock"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRACECLK_SELW::_0)
            }
            #[doc = "Platform clock"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRACECLK_SELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PDB_BB_SEL`"]
        pub enum PDB_BB_SELW {
            #[doc = "PDB0 channel 0 back-to-back operation with ADC0 COCO[7:0] and PDB1 channel 0 back-to-back operation with ADC1 COCO[7:0]"]
            _0,
            #[doc = "Channel 0 of PDB0 and PDB1 back-to-back operation with COCO[7:0] of ADC0 and ADC1."]
            _1,
        }
        impl PDB_BB_SELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PDB_BB_SELW::_0 => false,
                    PDB_BB_SELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PDB_BB_SELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PDB_BB_SELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PDB_BB_SELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "PDB0 channel 0 back-to-back operation with ADC0 COCO[7:0] and PDB1 channel 0 back-to-back operation with ADC1 COCO[7:0]"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PDB_BB_SELW::_0)
            }
            #[doc = "Channel 0 of PDB0 and PDB1 back-to-back operation with COCO[7:0] of ADC0 and ADC1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PDB_BB_SELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ADC_SUPPLY`"]
        pub enum ADC_SUPPLYW {
            #[doc = "5 V input VDD supply (VDD)"]
            _000,
            #[doc = "5 V input analog supply (VDDA)"]
            _001,
            #[doc = "ADC Reference Supply (VREFH)"]
            _010,
            #[doc = "3.3 V Oscillator Regulator Output (VDD_3V)"]
            _011,
            #[doc = "3.3 V flash regulator output (VDD_flash_3V)"]
            _100,
            #[doc = "1.2 V core regulator output (VDD_LV)"]
            _101,
        }
        impl ADC_SUPPLYW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    ADC_SUPPLYW::_000 => 0,
                    ADC_SUPPLYW::_001 => 1,
                    ADC_SUPPLYW::_010 => 2,
                    ADC_SUPPLYW::_011 => 3,
                    ADC_SUPPLYW::_100 => 4,
                    ADC_SUPPLYW::_101 => 5,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ADC_SUPPLYW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ADC_SUPPLYW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ADC_SUPPLYW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "5 V input VDD supply (VDD)"]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(ADC_SUPPLYW::_000)
            }
            #[doc = "5 V input analog supply (VDDA)"]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(ADC_SUPPLYW::_001)
            }
            #[doc = "ADC Reference Supply (VREFH)"]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(ADC_SUPPLYW::_010)
            }
            #[doc = "3.3 V Oscillator Regulator Output (VDD_3V)"]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(ADC_SUPPLYW::_011)
            }
            #[doc = "3.3 V flash regulator output (VDD_flash_3V)"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(ADC_SUPPLYW::_100)
            }
            #[doc = "1.2 V core regulator output (VDD_LV)"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(ADC_SUPPLYW::_101)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ADC_SUPPLYEN`"]
        pub enum ADC_SUPPLYENW {
            #[doc = "Disable internal supply monitoring"]
            _0,
            #[doc = "Enable internal supply monitoring"]
            _1,
        }
        impl ADC_SUPPLYENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ADC_SUPPLYENW::_0 => false,
                    ADC_SUPPLYENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ADC_SUPPLYENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ADC_SUPPLYENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ADC_SUPPLYENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable internal supply monitoring"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ADC_SUPPLYENW::_0)
            }
            #[doc = "Enable internal supply monitoring"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ADC_SUPPLYENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 19;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SRAMU_RETEN`"]
        pub enum SRAMU_RETENW {
            #[doc = "SRAMU contents are retained across resets"]
            _0,
            #[doc = "No SRAMU retention"]
            _1,
        }
        impl SRAMU_RETENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SRAMU_RETENW::_0 => false,
                    SRAMU_RETENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SRAMU_RETENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SRAMU_RETENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SRAMU_RETENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "SRAMU contents are retained across resets"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SRAMU_RETENW::_0)
            }
            #[doc = "No SRAMU retention"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SRAMU_RETENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SRAML_RETEN`"]
        pub enum SRAML_RETENW {
            #[doc = "SRAML contents are retained across resets"]
            _0,
            #[doc = "No SRAML retention"]
            _1,
        }
        impl SRAML_RETENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SRAML_RETENW::_0 => false,
                    SRAML_RETENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SRAML_RETENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SRAML_RETENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SRAML_RETENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "SRAML contents are retained across resets"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SRAML_RETENW::_0)
            }
            #[doc = "No SRAML retention"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SRAML_RETENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 21;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:3 - ADC interleave channel enable"]
            #[inline(always)]
            pub fn adc_interleave_en(&self) -> ADC_INTERLEAVE_ENR {
                ADC_INTERLEAVE_ENR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 4:7 - CLKOUT Select"]
            #[inline(always)]
            pub fn clkoutsel(&self) -> CLKOUTSELR {
                CLKOUTSELR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 8:10 - CLKOUT Divide Ratio"]
            #[inline(always)]
            pub fn clkoutdiv(&self) -> CLKOUTDIVR {
                CLKOUTDIVR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 11 - CLKOUT enable"]
            #[inline(always)]
            pub fn clkouten(&self) -> CLKOUTENR {
                CLKOUTENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Debug trace clock select"]
            #[inline(always)]
            pub fn traceclk_sel(&self) -> TRACECLK_SELR {
                TRACECLK_SELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - PDB back-to-back select"]
            #[inline(always)]
            pub fn pdb_bb_sel(&self) -> PDB_BB_SELR {
                PDB_BB_SELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:18 - ADC_SUPPLY"]
            #[inline(always)]
            pub fn adc_supply(&self) -> ADC_SUPPLYR {
                ADC_SUPPLYR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 19 - ADC_SUPPLYEN"]
            #[inline(always)]
            pub fn adc_supplyen(&self) -> ADC_SUPPLYENR {
                ADC_SUPPLYENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 19;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 20 - SRAMU_RETEN"]
            #[inline(always)]
            pub fn sramu_reten(&self) -> SRAMU_RETENR {
                SRAMU_RETENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - SRAML_RETEN"]
            #[inline(always)]
            pub fn sraml_reten(&self) -> SRAML_RETENR {
                SRAML_RETENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 3145728 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - ADC interleave channel enable"]
            #[inline(always)]
            pub fn adc_interleave_en(&mut self) -> _ADC_INTERLEAVE_ENW {
                _ADC_INTERLEAVE_ENW { w: self }
            }
            #[doc = "Bits 4:7 - CLKOUT Select"]
            #[inline(always)]
            pub fn clkoutsel(&mut self) -> _CLKOUTSELW {
                _CLKOUTSELW { w: self }
            }
            #[doc = "Bits 8:10 - CLKOUT Divide Ratio"]
            #[inline(always)]
            pub fn clkoutdiv(&mut self) -> _CLKOUTDIVW {
                _CLKOUTDIVW { w: self }
            }
            #[doc = "Bit 11 - CLKOUT enable"]
            #[inline(always)]
            pub fn clkouten(&mut self) -> _CLKOUTENW {
                _CLKOUTENW { w: self }
            }
            #[doc = "Bit 12 - Debug trace clock select"]
            #[inline(always)]
            pub fn traceclk_sel(&mut self) -> _TRACECLK_SELW {
                _TRACECLK_SELW { w: self }
            }
            #[doc = "Bit 13 - PDB back-to-back select"]
            #[inline(always)]
            pub fn pdb_bb_sel(&mut self) -> _PDB_BB_SELW {
                _PDB_BB_SELW { w: self }
            }
            #[doc = "Bits 16:18 - ADC_SUPPLY"]
            #[inline(always)]
            pub fn adc_supply(&mut self) -> _ADC_SUPPLYW {
                _ADC_SUPPLYW { w: self }
            }
            #[doc = "Bit 19 - ADC_SUPPLYEN"]
            #[inline(always)]
            pub fn adc_supplyen(&mut self) -> _ADC_SUPPLYENW {
                _ADC_SUPPLYENW { w: self }
            }
            #[doc = "Bit 20 - SRAMU_RETEN"]
            #[inline(always)]
            pub fn sramu_reten(&mut self) -> _SRAMU_RETENW {
                _SRAMU_RETENW { w: self }
            }
            #[doc = "Bit 21 - SRAML_RETEN"]
            #[inline(always)]
            pub fn sraml_reten(&mut self) -> _SRAML_RETENW {
                _SRAML_RETENW { w: self }
            }
        }
    }
    #[doc = "FTM Option Register 0"]
    pub struct FTMOPT0 {
        register: VolatileCell<u32>,
    }
    #[doc = "FTM Option Register 0"]
    pub mod ftmopt0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FTMOPT0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `FTM0FLTxSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FTM0FLTXSELR {
            #[doc = "FTM0_FLTx pin"]
            _000,
            #[doc = "TRGMUX_FTM0 out"]
            _001,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl FTM0FLTXSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    FTM0FLTXSELR::_000 => 0,
                    FTM0FLTXSELR::_001 => 1,
                    FTM0FLTXSELR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> FTM0FLTXSELR {
                match value {
                    0 => FTM0FLTXSELR::_000,
                    1 => FTM0FLTXSELR::_001,
                    i => FTM0FLTXSELR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == FTM0FLTXSELR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == FTM0FLTXSELR::_001
            }
        }
        #[doc = "Possible values of the field `FTM1FLTxSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FTM1FLTXSELR {
            #[doc = "FTM1_FLTx pin"]
            _000,
            #[doc = "TRGMUX_FTM1 out"]
            _001,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl FTM1FLTXSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    FTM1FLTXSELR::_000 => 0,
                    FTM1FLTXSELR::_001 => 1,
                    FTM1FLTXSELR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> FTM1FLTXSELR {
                match value {
                    0 => FTM1FLTXSELR::_000,
                    1 => FTM1FLTXSELR::_001,
                    i => FTM1FLTXSELR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == FTM1FLTXSELR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == FTM1FLTXSELR::_001
            }
        }
        #[doc = "Possible values of the field `FTM2FLTxSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FTM2FLTXSELR {
            #[doc = "FTM2_FLTx pin"]
            _000,
            #[doc = "TRGMUX_FTM2 out"]
            _001,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl FTM2FLTXSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    FTM2FLTXSELR::_000 => 0,
                    FTM2FLTXSELR::_001 => 1,
                    FTM2FLTXSELR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> FTM2FLTXSELR {
                match value {
                    0 => FTM2FLTXSELR::_000,
                    1 => FTM2FLTXSELR::_001,
                    i => FTM2FLTXSELR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == FTM2FLTXSELR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == FTM2FLTXSELR::_001
            }
        }
        #[doc = "Possible values of the field `FTM3FLTxSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FTM3FLTXSELR {
            #[doc = "FTM3_FLTx pin"]
            _000,
            #[doc = "TRGMUX_FTM3 out"]
            _001,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl FTM3FLTXSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    FTM3FLTXSELR::_000 => 0,
                    FTM3FLTXSELR::_001 => 1,
                    FTM3FLTXSELR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> FTM3FLTXSELR {
                match value {
                    0 => FTM3FLTXSELR::_000,
                    1 => FTM3FLTXSELR::_001,
                    i => FTM3FLTXSELR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == FTM3FLTXSELR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == FTM3FLTXSELR::_001
            }
        }
        #[doc = "Possible values of the field `FTM0CLKSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FTM0CLKSELR {
            #[doc = "FTM0 external clock driven by TCLK0 pin."]
            _00,
            #[doc = "FTM0 external clock driven by TCLK1 pin."]
            _01,
            #[doc = "FTM0 external clock driven by TCLK2 pin."]
            _10,
            #[doc = "No clock input"]
            _11,
        }
        impl FTM0CLKSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    FTM0CLKSELR::_00 => 0,
                    FTM0CLKSELR::_01 => 1,
                    FTM0CLKSELR::_10 => 2,
                    FTM0CLKSELR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> FTM0CLKSELR {
                match value {
                    0 => FTM0CLKSELR::_00,
                    1 => FTM0CLKSELR::_01,
                    2 => FTM0CLKSELR::_10,
                    3 => FTM0CLKSELR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == FTM0CLKSELR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == FTM0CLKSELR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == FTM0CLKSELR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == FTM0CLKSELR::_11
            }
        }
        #[doc = "Possible values of the field `FTM1CLKSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FTM1CLKSELR {
            #[doc = "FTM1 external clock driven by TCLK0 pin."]
            _00,
            #[doc = "FTM1 external clock driven by TCLK1 pin."]
            _01,
            #[doc = "FTM1 external clock driven by TCLK2 pin."]
            _10,
            #[doc = "No clock input"]
            _11,
        }
        impl FTM1CLKSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    FTM1CLKSELR::_00 => 0,
                    FTM1CLKSELR::_01 => 1,
                    FTM1CLKSELR::_10 => 2,
                    FTM1CLKSELR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> FTM1CLKSELR {
                match value {
                    0 => FTM1CLKSELR::_00,
                    1 => FTM1CLKSELR::_01,
                    2 => FTM1CLKSELR::_10,
                    3 => FTM1CLKSELR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == FTM1CLKSELR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == FTM1CLKSELR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == FTM1CLKSELR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == FTM1CLKSELR::_11
            }
        }
        #[doc = "Possible values of the field `FTM2CLKSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FTM2CLKSELR {
            #[doc = "FTM2 external clock driven by TCLK0 pin."]
            _00,
            #[doc = "FTM2 external clock driven by TCLK1 pin."]
            _01,
            #[doc = "FTM2 external clock driven by TCLK2 pin."]
            _10,
            #[doc = "No clock input"]
            _11,
        }
        impl FTM2CLKSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    FTM2CLKSELR::_00 => 0,
                    FTM2CLKSELR::_01 => 1,
                    FTM2CLKSELR::_10 => 2,
                    FTM2CLKSELR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> FTM2CLKSELR {
                match value {
                    0 => FTM2CLKSELR::_00,
                    1 => FTM2CLKSELR::_01,
                    2 => FTM2CLKSELR::_10,
                    3 => FTM2CLKSELR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == FTM2CLKSELR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == FTM2CLKSELR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == FTM2CLKSELR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == FTM2CLKSELR::_11
            }
        }
        #[doc = "Possible values of the field `FTM3CLKSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FTM3CLKSELR {
            #[doc = "FTM3 external clock driven by TCLK0 pin."]
            _00,
            #[doc = "FTM3 external clock driven by TCLK1 pin."]
            _01,
            #[doc = "FTM3 external clock driven by TCLK2 pin."]
            _10,
            #[doc = "No clock input"]
            _11,
        }
        impl FTM3CLKSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    FTM3CLKSELR::_00 => 0,
                    FTM3CLKSELR::_01 => 1,
                    FTM3CLKSELR::_10 => 2,
                    FTM3CLKSELR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> FTM3CLKSELR {
                match value {
                    0 => FTM3CLKSELR::_00,
                    1 => FTM3CLKSELR::_01,
                    2 => FTM3CLKSELR::_10,
                    3 => FTM3CLKSELR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == FTM3CLKSELR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == FTM3CLKSELR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == FTM3CLKSELR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == FTM3CLKSELR::_11
            }
        }
        #[doc = "Values that can be written to the field `FTM0FLTxSEL`"]
        pub enum FTM0FLTXSELW {
            #[doc = "FTM0_FLTx pin"]
            _000,
            #[doc = "TRGMUX_FTM0 out"]
            _001,
        }
        impl FTM0FLTXSELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    FTM0FLTXSELW::_000 => 0,
                    FTM0FLTXSELW::_001 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FTM0FLTXSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FTM0FLTXSELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FTM0FLTXSELW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "FTM0_FLTx pin"]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(FTM0FLTXSELW::_000)
            }
            #[doc = "TRGMUX_FTM0 out"]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(FTM0FLTXSELW::_001)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FTM1FLTxSEL`"]
        pub enum FTM1FLTXSELW {
            #[doc = "FTM1_FLTx pin"]
            _000,
            #[doc = "TRGMUX_FTM1 out"]
            _001,
        }
        impl FTM1FLTXSELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    FTM1FLTXSELW::_000 => 0,
                    FTM1FLTXSELW::_001 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FTM1FLTXSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FTM1FLTXSELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FTM1FLTXSELW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "FTM1_FLTx pin"]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(FTM1FLTXSELW::_000)
            }
            #[doc = "TRGMUX_FTM1 out"]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(FTM1FLTXSELW::_001)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FTM2FLTxSEL`"]
        pub enum FTM2FLTXSELW {
            #[doc = "FTM2_FLTx pin"]
            _000,
            #[doc = "TRGMUX_FTM2 out"]
            _001,
        }
        impl FTM2FLTXSELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    FTM2FLTXSELW::_000 => 0,
                    FTM2FLTXSELW::_001 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FTM2FLTXSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FTM2FLTXSELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FTM2FLTXSELW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "FTM2_FLTx pin"]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(FTM2FLTXSELW::_000)
            }
            #[doc = "TRGMUX_FTM2 out"]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(FTM2FLTXSELW::_001)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FTM3FLTxSEL`"]
        pub enum FTM3FLTXSELW {
            #[doc = "FTM3_FLTx pin"]
            _000,
            #[doc = "TRGMUX_FTM3 out"]
            _001,
        }
        impl FTM3FLTXSELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    FTM3FLTXSELW::_000 => 0,
                    FTM3FLTXSELW::_001 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FTM3FLTXSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FTM3FLTXSELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FTM3FLTXSELW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "FTM3_FLTx pin"]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(FTM3FLTXSELW::_000)
            }
            #[doc = "TRGMUX_FTM3 out"]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(FTM3FLTXSELW::_001)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FTM0CLKSEL`"]
        pub enum FTM0CLKSELW {
            #[doc = "FTM0 external clock driven by TCLK0 pin."]
            _00,
            #[doc = "FTM0 external clock driven by TCLK1 pin."]
            _01,
            #[doc = "FTM0 external clock driven by TCLK2 pin."]
            _10,
            #[doc = "No clock input"]
            _11,
        }
        impl FTM0CLKSELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    FTM0CLKSELW::_00 => 0,
                    FTM0CLKSELW::_01 => 1,
                    FTM0CLKSELW::_10 => 2,
                    FTM0CLKSELW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FTM0CLKSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FTM0CLKSELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FTM0CLKSELW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "FTM0 external clock driven by TCLK0 pin."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(FTM0CLKSELW::_00)
            }
            #[doc = "FTM0 external clock driven by TCLK1 pin."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(FTM0CLKSELW::_01)
            }
            #[doc = "FTM0 external clock driven by TCLK2 pin."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(FTM0CLKSELW::_10)
            }
            #[doc = "No clock input"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(FTM0CLKSELW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FTM1CLKSEL`"]
        pub enum FTM1CLKSELW {
            #[doc = "FTM1 external clock driven by TCLK0 pin."]
            _00,
            #[doc = "FTM1 external clock driven by TCLK1 pin."]
            _01,
            #[doc = "FTM1 external clock driven by TCLK2 pin."]
            _10,
            #[doc = "No clock input"]
            _11,
        }
        impl FTM1CLKSELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    FTM1CLKSELW::_00 => 0,
                    FTM1CLKSELW::_01 => 1,
                    FTM1CLKSELW::_10 => 2,
                    FTM1CLKSELW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FTM1CLKSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FTM1CLKSELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FTM1CLKSELW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "FTM1 external clock driven by TCLK0 pin."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(FTM1CLKSELW::_00)
            }
            #[doc = "FTM1 external clock driven by TCLK1 pin."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(FTM1CLKSELW::_01)
            }
            #[doc = "FTM1 external clock driven by TCLK2 pin."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(FTM1CLKSELW::_10)
            }
            #[doc = "No clock input"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(FTM1CLKSELW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 26;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FTM2CLKSEL`"]
        pub enum FTM2CLKSELW {
            #[doc = "FTM2 external clock driven by TCLK0 pin."]
            _00,
            #[doc = "FTM2 external clock driven by TCLK1 pin."]
            _01,
            #[doc = "FTM2 external clock driven by TCLK2 pin."]
            _10,
            #[doc = "No clock input"]
            _11,
        }
        impl FTM2CLKSELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    FTM2CLKSELW::_00 => 0,
                    FTM2CLKSELW::_01 => 1,
                    FTM2CLKSELW::_10 => 2,
                    FTM2CLKSELW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FTM2CLKSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FTM2CLKSELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FTM2CLKSELW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "FTM2 external clock driven by TCLK0 pin."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(FTM2CLKSELW::_00)
            }
            #[doc = "FTM2 external clock driven by TCLK1 pin."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(FTM2CLKSELW::_01)
            }
            #[doc = "FTM2 external clock driven by TCLK2 pin."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(FTM2CLKSELW::_10)
            }
            #[doc = "No clock input"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(FTM2CLKSELW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 28;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FTM3CLKSEL`"]
        pub enum FTM3CLKSELW {
            #[doc = "FTM3 external clock driven by TCLK0 pin."]
            _00,
            #[doc = "FTM3 external clock driven by TCLK1 pin."]
            _01,
            #[doc = "FTM3 external clock driven by TCLK2 pin."]
            _10,
            #[doc = "No clock input"]
            _11,
        }
        impl FTM3CLKSELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    FTM3CLKSELW::_00 => 0,
                    FTM3CLKSELW::_01 => 1,
                    FTM3CLKSELW::_10 => 2,
                    FTM3CLKSELW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FTM3CLKSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FTM3CLKSELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FTM3CLKSELW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "FTM3 external clock driven by TCLK0 pin."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(FTM3CLKSELW::_00)
            }
            #[doc = "FTM3 external clock driven by TCLK1 pin."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(FTM3CLKSELW::_01)
            }
            #[doc = "FTM3 external clock driven by TCLK2 pin."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(FTM3CLKSELW::_10)
            }
            #[doc = "No clock input"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(FTM3CLKSELW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:2 - FTM0 Fault X Select"]
            #[inline(always)]
            pub fn ftm0fltx_sel(&self) -> FTM0FLTXSELR {
                FTM0FLTXSELR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 4:6 - FTM1 Fault X Select"]
            #[inline(always)]
            pub fn ftm1fltx_sel(&self) -> FTM1FLTXSELR {
                FTM1FLTXSELR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 8:10 - FTM2 Fault X Select"]
            #[inline(always)]
            pub fn ftm2fltx_sel(&self) -> FTM2FLTXSELR {
                FTM2FLTXSELR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 12:14 - FTM3 Fault X Select"]
            #[inline(always)]
            pub fn ftm3fltx_sel(&self) -> FTM3FLTXSELR {
                FTM3FLTXSELR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 24:25 - FTM0 External Clock Pin Select"]
            #[inline(always)]
            pub fn ftm0clksel(&self) -> FTM0CLKSELR {
                FTM0CLKSELR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 26:27 - FTM1 External Clock Pin Select"]
            #[inline(always)]
            pub fn ftm1clksel(&self) -> FTM1CLKSELR {
                FTM1CLKSELR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 26;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 28:29 - FTM2 External Clock Pin Select"]
            #[inline(always)]
            pub fn ftm2clksel(&self) -> FTM2CLKSELR {
                FTM2CLKSELR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 28;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 30:31 - FTM3 External Clock Pin Select"]
            #[inline(always)]
            pub fn ftm3clksel(&self) -> FTM3CLKSELR {
                FTM3CLKSELR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:2 - FTM0 Fault X Select"]
            #[inline(always)]
            pub fn ftm0fltx_sel(&mut self) -> _FTM0FLTXSELW {
                _FTM0FLTXSELW { w: self }
            }
            #[doc = "Bits 4:6 - FTM1 Fault X Select"]
            #[inline(always)]
            pub fn ftm1fltx_sel(&mut self) -> _FTM1FLTXSELW {
                _FTM1FLTXSELW { w: self }
            }
            #[doc = "Bits 8:10 - FTM2 Fault X Select"]
            #[inline(always)]
            pub fn ftm2fltx_sel(&mut self) -> _FTM2FLTXSELW {
                _FTM2FLTXSELW { w: self }
            }
            #[doc = "Bits 12:14 - FTM3 Fault X Select"]
            #[inline(always)]
            pub fn ftm3fltx_sel(&mut self) -> _FTM3FLTXSELW {
                _FTM3FLTXSELW { w: self }
            }
            #[doc = "Bits 24:25 - FTM0 External Clock Pin Select"]
            #[inline(always)]
            pub fn ftm0clksel(&mut self) -> _FTM0CLKSELW {
                _FTM0CLKSELW { w: self }
            }
            #[doc = "Bits 26:27 - FTM1 External Clock Pin Select"]
            #[inline(always)]
            pub fn ftm1clksel(&mut self) -> _FTM1CLKSELW {
                _FTM1CLKSELW { w: self }
            }
            #[doc = "Bits 28:29 - FTM2 External Clock Pin Select"]
            #[inline(always)]
            pub fn ftm2clksel(&mut self) -> _FTM2CLKSELW {
                _FTM2CLKSELW { w: self }
            }
            #[doc = "Bits 30:31 - FTM3 External Clock Pin Select"]
            #[inline(always)]
            pub fn ftm3clksel(&mut self) -> _FTM3CLKSELW {
                _FTM3CLKSELW { w: self }
            }
        }
    }
    #[doc = "LPO Clock Select Register"]
    pub struct LPOCLKS {
        register: VolatileCell<u32>,
    }
    #[doc = "LPO Clock Select Register"]
    pub mod lpoclks {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::LPOCLKS {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `LPO1KCLKEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LPO1KCLKENR {
            #[doc = "Disable 1 kHz LPO_CLK output"]
            _0,
            #[doc = "Enable 1 kHz LPO_CLK output"]
            _1,
        }
        impl LPO1KCLKENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LPO1KCLKENR::_0 => false,
                    LPO1KCLKENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LPO1KCLKENR {
                match value {
                    false => LPO1KCLKENR::_0,
                    true => LPO1KCLKENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LPO1KCLKENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LPO1KCLKENR::_1
            }
        }
        #[doc = "Possible values of the field `LPO32KCLKEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LPO32KCLKENR {
            #[doc = "Disable 32 kHz LPO_CLK output"]
            _0,
            #[doc = "Enable 32 kHz LPO_CLK output"]
            _1,
        }
        impl LPO32KCLKENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LPO32KCLKENR::_0 => false,
                    LPO32KCLKENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LPO32KCLKENR {
                match value {
                    false => LPO32KCLKENR::_0,
                    true => LPO32KCLKENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LPO32KCLKENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LPO32KCLKENR::_1
            }
        }
        #[doc = "Possible values of the field `LPOCLKSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LPOCLKSELR {
            #[doc = "128 kHz LPO_CLK"]
            _00,
            #[doc = "No clock"]
            _01,
            #[doc = "32 kHz LPO_CLK which is derived from the 128 kHz LPO_CLK"]
            _10,
            #[doc = "1 kHz LPO_CLK which is derived from the 128 kHz LPO_CLK"]
            _11,
        }
        impl LPOCLKSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    LPOCLKSELR::_00 => 0,
                    LPOCLKSELR::_01 => 1,
                    LPOCLKSELR::_10 => 2,
                    LPOCLKSELR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> LPOCLKSELR {
                match value {
                    0 => LPOCLKSELR::_00,
                    1 => LPOCLKSELR::_01,
                    2 => LPOCLKSELR::_10,
                    3 => LPOCLKSELR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == LPOCLKSELR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == LPOCLKSELR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == LPOCLKSELR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == LPOCLKSELR::_11
            }
        }
        #[doc = "Possible values of the field `RTCCLKSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RTCCLKSELR {
            #[doc = "SOSCDIV1_CLK"]
            _00,
            #[doc = "32 kHz LPO_CLK"]
            _01,
            #[doc = "RTC_CLKIN clock"]
            _10,
            #[doc = "FIRCDIV1_CLK"]
            _11,
        }
        impl RTCCLKSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    RTCCLKSELR::_00 => 0,
                    RTCCLKSELR::_01 => 1,
                    RTCCLKSELR::_10 => 2,
                    RTCCLKSELR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> RTCCLKSELR {
                match value {
                    0 => RTCCLKSELR::_00,
                    1 => RTCCLKSELR::_01,
                    2 => RTCCLKSELR::_10,
                    3 => RTCCLKSELR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == RTCCLKSELR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == RTCCLKSELR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == RTCCLKSELR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == RTCCLKSELR::_11
            }
        }
        #[doc = "Values that can be written to the field `LPO1KCLKEN`"]
        pub enum LPO1KCLKENW {
            #[doc = "Disable 1 kHz LPO_CLK output"]
            _0,
            #[doc = "Enable 1 kHz LPO_CLK output"]
            _1,
        }
        impl LPO1KCLKENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LPO1KCLKENW::_0 => false,
                    LPO1KCLKENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LPO1KCLKENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LPO1KCLKENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LPO1KCLKENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable 1 kHz LPO_CLK output"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LPO1KCLKENW::_0)
            }
            #[doc = "Enable 1 kHz LPO_CLK output"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LPO1KCLKENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LPO32KCLKEN`"]
        pub enum LPO32KCLKENW {
            #[doc = "Disable 32 kHz LPO_CLK output"]
            _0,
            #[doc = "Enable 32 kHz LPO_CLK output"]
            _1,
        }
        impl LPO32KCLKENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LPO32KCLKENW::_0 => false,
                    LPO32KCLKENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LPO32KCLKENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LPO32KCLKENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LPO32KCLKENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable 32 kHz LPO_CLK output"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LPO32KCLKENW::_0)
            }
            #[doc = "Enable 32 kHz LPO_CLK output"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LPO32KCLKENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LPOCLKSEL`"]
        pub enum LPOCLKSELW {
            #[doc = "128 kHz LPO_CLK"]
            _00,
            #[doc = "No clock"]
            _01,
            #[doc = "32 kHz LPO_CLK which is derived from the 128 kHz LPO_CLK"]
            _10,
            #[doc = "1 kHz LPO_CLK which is derived from the 128 kHz LPO_CLK"]
            _11,
        }
        impl LPOCLKSELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    LPOCLKSELW::_00 => 0,
                    LPOCLKSELW::_01 => 1,
                    LPOCLKSELW::_10 => 2,
                    LPOCLKSELW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LPOCLKSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LPOCLKSELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LPOCLKSELW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "128 kHz LPO_CLK"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(LPOCLKSELW::_00)
            }
            #[doc = "No clock"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(LPOCLKSELW::_01)
            }
            #[doc = "32 kHz LPO_CLK which is derived from the 128 kHz LPO_CLK"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(LPOCLKSELW::_10)
            }
            #[doc = "1 kHz LPO_CLK which is derived from the 128 kHz LPO_CLK"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(LPOCLKSELW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RTCCLKSEL`"]
        pub enum RTCCLKSELW {
            #[doc = "SOSCDIV1_CLK"]
            _00,
            #[doc = "32 kHz LPO_CLK"]
            _01,
            #[doc = "RTC_CLKIN clock"]
            _10,
            #[doc = "FIRCDIV1_CLK"]
            _11,
        }
        impl RTCCLKSELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    RTCCLKSELW::_00 => 0,
                    RTCCLKSELW::_01 => 1,
                    RTCCLKSELW::_10 => 2,
                    RTCCLKSELW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RTCCLKSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RTCCLKSELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RTCCLKSELW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "SOSCDIV1_CLK"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(RTCCLKSELW::_00)
            }
            #[doc = "32 kHz LPO_CLK"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(RTCCLKSELW::_01)
            }
            #[doc = "RTC_CLKIN clock"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(RTCCLKSELW::_10)
            }
            #[doc = "FIRCDIV1_CLK"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(RTCCLKSELW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - 1 kHz LPO_CLK enable"]
            #[inline(always)]
            pub fn lpo1kclken(&self) -> LPO1KCLKENR {
                LPO1KCLKENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - 32 kHz LPO_CLK enable"]
            #[inline(always)]
            pub fn lpo32kclken(&self) -> LPO32KCLKENR {
                LPO32KCLKENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 2:3 - LPO clock source select"]
            #[inline(always)]
            pub fn lpoclksel(&self) -> LPOCLKSELR {
                LPOCLKSELR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 4:5 - 32 kHz clock source select"]
            #[inline(always)]
            pub fn rtcclksel(&self) -> RTCCLKSELR {
                RTCCLKSELR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 3 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - 1 kHz LPO_CLK enable"]
            #[inline(always)]
            pub fn lpo1kclken(&mut self) -> _LPO1KCLKENW {
                _LPO1KCLKENW { w: self }
            }
            #[doc = "Bit 1 - 32 kHz LPO_CLK enable"]
            #[inline(always)]
            pub fn lpo32kclken(&mut self) -> _LPO32KCLKENW {
                _LPO32KCLKENW { w: self }
            }
            #[doc = "Bits 2:3 - LPO clock source select"]
            #[inline(always)]
            pub fn lpoclksel(&mut self) -> _LPOCLKSELW {
                _LPOCLKSELW { w: self }
            }
            #[doc = "Bits 4:5 - 32 kHz clock source select"]
            #[inline(always)]
            pub fn rtcclksel(&mut self) -> _RTCCLKSELW {
                _RTCCLKSELW { w: self }
            }
        }
    }
    #[doc = "ADC Options Register"]
    pub struct ADCOPT {
        register: VolatileCell<u32>,
    }
    #[doc = "ADC Options Register"]
    pub mod adcopt {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::ADCOPT {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `ADC0TRGSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ADC0TRGSELR {
            #[doc = "PDB output"]
            _0,
            #[doc = "TRGMUX output"]
            _1,
        }
        impl ADC0TRGSELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ADC0TRGSELR::_0 => false,
                    ADC0TRGSELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ADC0TRGSELR {
                match value {
                    false => ADC0TRGSELR::_0,
                    true => ADC0TRGSELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ADC0TRGSELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ADC0TRGSELR::_1
            }
        }
        #[doc = "Possible values of the field `ADC0SWPRETRG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ADC0SWPRETRGR {
            #[doc = "Software pretrigger disabled"]
            _000,
            #[doc = "Reserved (do not use)"]
            _001,
            #[doc = "Reserved (do not use)"]
            _010,
            #[doc = "Reserved (do not use)"]
            _011,
            #[doc = "Software pretrigger 0"]
            _100,
            #[doc = "Software pretrigger 1"]
            _101,
            #[doc = "Software pretrigger 2"]
            _110,
            #[doc = "Software pretrigger 3"]
            _111,
        }
        impl ADC0SWPRETRGR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    ADC0SWPRETRGR::_000 => 0,
                    ADC0SWPRETRGR::_001 => 1,
                    ADC0SWPRETRGR::_010 => 2,
                    ADC0SWPRETRGR::_011 => 3,
                    ADC0SWPRETRGR::_100 => 4,
                    ADC0SWPRETRGR::_101 => 5,
                    ADC0SWPRETRGR::_110 => 6,
                    ADC0SWPRETRGR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> ADC0SWPRETRGR {
                match value {
                    0 => ADC0SWPRETRGR::_000,
                    1 => ADC0SWPRETRGR::_001,
                    2 => ADC0SWPRETRGR::_010,
                    3 => ADC0SWPRETRGR::_011,
                    4 => ADC0SWPRETRGR::_100,
                    5 => ADC0SWPRETRGR::_101,
                    6 => ADC0SWPRETRGR::_110,
                    7 => ADC0SWPRETRGR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == ADC0SWPRETRGR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == ADC0SWPRETRGR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == ADC0SWPRETRGR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == ADC0SWPRETRGR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == ADC0SWPRETRGR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == ADC0SWPRETRGR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == ADC0SWPRETRGR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == ADC0SWPRETRGR::_111
            }
        }
        #[doc = "Possible values of the field `ADC0PRETRGSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ADC0PRETRGSELR {
            #[doc = "PDB pretrigger (default)"]
            _00,
            #[doc = "TRGMUX pretrigger"]
            _01,
            #[doc = "Software pretrigger"]
            _10,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl ADC0PRETRGSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    ADC0PRETRGSELR::_00 => 0,
                    ADC0PRETRGSELR::_01 => 1,
                    ADC0PRETRGSELR::_10 => 2,
                    ADC0PRETRGSELR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> ADC0PRETRGSELR {
                match value {
                    0 => ADC0PRETRGSELR::_00,
                    1 => ADC0PRETRGSELR::_01,
                    2 => ADC0PRETRGSELR::_10,
                    i => ADC0PRETRGSELR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == ADC0PRETRGSELR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == ADC0PRETRGSELR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == ADC0PRETRGSELR::_10
            }
        }
        #[doc = "Possible values of the field `ADC1TRGSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ADC1TRGSELR {
            #[doc = "PDB output"]
            _0,
            #[doc = "TRGMUX output"]
            _1,
        }
        impl ADC1TRGSELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ADC1TRGSELR::_0 => false,
                    ADC1TRGSELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ADC1TRGSELR {
                match value {
                    false => ADC1TRGSELR::_0,
                    true => ADC1TRGSELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ADC1TRGSELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ADC1TRGSELR::_1
            }
        }
        #[doc = "Possible values of the field `ADC1SWPRETRG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ADC1SWPRETRGR {
            #[doc = "Software pretrigger disabled"]
            _000,
            #[doc = "Reserved (do not use)"]
            _001,
            #[doc = "Reserved (do not use)"]
            _010,
            #[doc = "Reserved (do not use)"]
            _011,
            #[doc = "Software pretrigger 0"]
            _100,
            #[doc = "Software pretrigger 1"]
            _101,
            #[doc = "Software pretrigger 2"]
            _110,
            #[doc = "Software pretrigger 3"]
            _111,
        }
        impl ADC1SWPRETRGR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    ADC1SWPRETRGR::_000 => 0,
                    ADC1SWPRETRGR::_001 => 1,
                    ADC1SWPRETRGR::_010 => 2,
                    ADC1SWPRETRGR::_011 => 3,
                    ADC1SWPRETRGR::_100 => 4,
                    ADC1SWPRETRGR::_101 => 5,
                    ADC1SWPRETRGR::_110 => 6,
                    ADC1SWPRETRGR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> ADC1SWPRETRGR {
                match value {
                    0 => ADC1SWPRETRGR::_000,
                    1 => ADC1SWPRETRGR::_001,
                    2 => ADC1SWPRETRGR::_010,
                    3 => ADC1SWPRETRGR::_011,
                    4 => ADC1SWPRETRGR::_100,
                    5 => ADC1SWPRETRGR::_101,
                    6 => ADC1SWPRETRGR::_110,
                    7 => ADC1SWPRETRGR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == ADC1SWPRETRGR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == ADC1SWPRETRGR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == ADC1SWPRETRGR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == ADC1SWPRETRGR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == ADC1SWPRETRGR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == ADC1SWPRETRGR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == ADC1SWPRETRGR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == ADC1SWPRETRGR::_111
            }
        }
        #[doc = "Possible values of the field `ADC1PRETRGSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ADC1PRETRGSELR {
            #[doc = "PDB pretrigger (default)"]
            _00,
            #[doc = "TRGMUX pretrigger"]
            _01,
            #[doc = "Software pretrigger"]
            _10,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl ADC1PRETRGSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    ADC1PRETRGSELR::_00 => 0,
                    ADC1PRETRGSELR::_01 => 1,
                    ADC1PRETRGSELR::_10 => 2,
                    ADC1PRETRGSELR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> ADC1PRETRGSELR {
                match value {
                    0 => ADC1PRETRGSELR::_00,
                    1 => ADC1PRETRGSELR::_01,
                    2 => ADC1PRETRGSELR::_10,
                    i => ADC1PRETRGSELR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == ADC1PRETRGSELR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == ADC1PRETRGSELR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == ADC1PRETRGSELR::_10
            }
        }
        #[doc = "Values that can be written to the field `ADC0TRGSEL`"]
        pub enum ADC0TRGSELW {
            #[doc = "PDB output"]
            _0,
            #[doc = "TRGMUX output"]
            _1,
        }
        impl ADC0TRGSELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ADC0TRGSELW::_0 => false,
                    ADC0TRGSELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ADC0TRGSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ADC0TRGSELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ADC0TRGSELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "PDB output"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ADC0TRGSELW::_0)
            }
            #[doc = "TRGMUX output"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ADC0TRGSELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ADC0SWPRETRG`"]
        pub enum ADC0SWPRETRGW {
            #[doc = "Software pretrigger disabled"]
            _000,
            #[doc = "Reserved (do not use)"]
            _001,
            #[doc = "Reserved (do not use)"]
            _010,
            #[doc = "Reserved (do not use)"]
            _011,
            #[doc = "Software pretrigger 0"]
            _100,
            #[doc = "Software pretrigger 1"]
            _101,
            #[doc = "Software pretrigger 2"]
            _110,
            #[doc = "Software pretrigger 3"]
            _111,
        }
        impl ADC0SWPRETRGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    ADC0SWPRETRGW::_000 => 0,
                    ADC0SWPRETRGW::_001 => 1,
                    ADC0SWPRETRGW::_010 => 2,
                    ADC0SWPRETRGW::_011 => 3,
                    ADC0SWPRETRGW::_100 => 4,
                    ADC0SWPRETRGW::_101 => 5,
                    ADC0SWPRETRGW::_110 => 6,
                    ADC0SWPRETRGW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ADC0SWPRETRGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ADC0SWPRETRGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ADC0SWPRETRGW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Software pretrigger disabled"]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(ADC0SWPRETRGW::_000)
            }
            #[doc = "Reserved (do not use)"]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(ADC0SWPRETRGW::_001)
            }
            #[doc = "Reserved (do not use)"]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(ADC0SWPRETRGW::_010)
            }
            #[doc = "Reserved (do not use)"]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(ADC0SWPRETRGW::_011)
            }
            #[doc = "Software pretrigger 0"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(ADC0SWPRETRGW::_100)
            }
            #[doc = "Software pretrigger 1"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(ADC0SWPRETRGW::_101)
            }
            #[doc = "Software pretrigger 2"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(ADC0SWPRETRGW::_110)
            }
            #[doc = "Software pretrigger 3"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(ADC0SWPRETRGW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ADC0PRETRGSEL`"]
        pub enum ADC0PRETRGSELW {
            #[doc = "PDB pretrigger (default)"]
            _00,
            #[doc = "TRGMUX pretrigger"]
            _01,
            #[doc = "Software pretrigger"]
            _10,
        }
        impl ADC0PRETRGSELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    ADC0PRETRGSELW::_00 => 0,
                    ADC0PRETRGSELW::_01 => 1,
                    ADC0PRETRGSELW::_10 => 2,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ADC0PRETRGSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ADC0PRETRGSELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ADC0PRETRGSELW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "PDB pretrigger (default)"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(ADC0PRETRGSELW::_00)
            }
            #[doc = "TRGMUX pretrigger"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(ADC0PRETRGSELW::_01)
            }
            #[doc = "Software pretrigger"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(ADC0PRETRGSELW::_10)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ADC1TRGSEL`"]
        pub enum ADC1TRGSELW {
            #[doc = "PDB output"]
            _0,
            #[doc = "TRGMUX output"]
            _1,
        }
        impl ADC1TRGSELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ADC1TRGSELW::_0 => false,
                    ADC1TRGSELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ADC1TRGSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ADC1TRGSELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ADC1TRGSELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "PDB output"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ADC1TRGSELW::_0)
            }
            #[doc = "TRGMUX output"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ADC1TRGSELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ADC1SWPRETRG`"]
        pub enum ADC1SWPRETRGW {
            #[doc = "Software pretrigger disabled"]
            _000,
            #[doc = "Reserved (do not use)"]
            _001,
            #[doc = "Reserved (do not use)"]
            _010,
            #[doc = "Reserved (do not use)"]
            _011,
            #[doc = "Software pretrigger 0"]
            _100,
            #[doc = "Software pretrigger 1"]
            _101,
            #[doc = "Software pretrigger 2"]
            _110,
            #[doc = "Software pretrigger 3"]
            _111,
        }
        impl ADC1SWPRETRGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    ADC1SWPRETRGW::_000 => 0,
                    ADC1SWPRETRGW::_001 => 1,
                    ADC1SWPRETRGW::_010 => 2,
                    ADC1SWPRETRGW::_011 => 3,
                    ADC1SWPRETRGW::_100 => 4,
                    ADC1SWPRETRGW::_101 => 5,
                    ADC1SWPRETRGW::_110 => 6,
                    ADC1SWPRETRGW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ADC1SWPRETRGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ADC1SWPRETRGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ADC1SWPRETRGW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Software pretrigger disabled"]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(ADC1SWPRETRGW::_000)
            }
            #[doc = "Reserved (do not use)"]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(ADC1SWPRETRGW::_001)
            }
            #[doc = "Reserved (do not use)"]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(ADC1SWPRETRGW::_010)
            }
            #[doc = "Reserved (do not use)"]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(ADC1SWPRETRGW::_011)
            }
            #[doc = "Software pretrigger 0"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(ADC1SWPRETRGW::_100)
            }
            #[doc = "Software pretrigger 1"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(ADC1SWPRETRGW::_101)
            }
            #[doc = "Software pretrigger 2"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(ADC1SWPRETRGW::_110)
            }
            #[doc = "Software pretrigger 3"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(ADC1SWPRETRGW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ADC1PRETRGSEL`"]
        pub enum ADC1PRETRGSELW {
            #[doc = "PDB pretrigger (default)"]
            _00,
            #[doc = "TRGMUX pretrigger"]
            _01,
            #[doc = "Software pretrigger"]
            _10,
        }
        impl ADC1PRETRGSELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    ADC1PRETRGSELW::_00 => 0,
                    ADC1PRETRGSELW::_01 => 1,
                    ADC1PRETRGSELW::_10 => 2,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ADC1PRETRGSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ADC1PRETRGSELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ADC1PRETRGSELW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "PDB pretrigger (default)"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(ADC1PRETRGSELW::_00)
            }
            #[doc = "TRGMUX pretrigger"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(ADC1PRETRGSELW::_01)
            }
            #[doc = "Software pretrigger"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(ADC1PRETRGSELW::_10)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - ADC0 trigger source select"]
            #[inline(always)]
            pub fn adc0trgsel(&self) -> ADC0TRGSELR {
                ADC0TRGSELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 1:3 - ADC0 software pretrigger sources"]
            #[inline(always)]
            pub fn adc0swpretrg(&self) -> ADC0SWPRETRGR {
                ADC0SWPRETRGR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 4:5 - ADC0 pretrigger source select"]
            #[inline(always)]
            pub fn adc0pretrgsel(&self) -> ADC0PRETRGSELR {
                ADC0PRETRGSELR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 8 - ADC1 trigger source select"]
            #[inline(always)]
            pub fn adc1trgsel(&self) -> ADC1TRGSELR {
                ADC1TRGSELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 9:11 - ADC1 software pretrigger sources"]
            #[inline(always)]
            pub fn adc1swpretrg(&self) -> ADC1SWPRETRGR {
                ADC1SWPRETRGR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 12:13 - ADC1 pretrigger source select"]
            #[inline(always)]
            pub fn adc1pretrgsel(&self) -> ADC1PRETRGSELR {
                ADC1PRETRGSELR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - ADC0 trigger source select"]
            #[inline(always)]
            pub fn adc0trgsel(&mut self) -> _ADC0TRGSELW {
                _ADC0TRGSELW { w: self }
            }
            #[doc = "Bits 1:3 - ADC0 software pretrigger sources"]
            #[inline(always)]
            pub fn adc0swpretrg(&mut self) -> _ADC0SWPRETRGW {
                _ADC0SWPRETRGW { w: self }
            }
            #[doc = "Bits 4:5 - ADC0 pretrigger source select"]
            #[inline(always)]
            pub fn adc0pretrgsel(&mut self) -> _ADC0PRETRGSELW {
                _ADC0PRETRGSELW { w: self }
            }
            #[doc = "Bit 8 - ADC1 trigger source select"]
            #[inline(always)]
            pub fn adc1trgsel(&mut self) -> _ADC1TRGSELW {
                _ADC1TRGSELW { w: self }
            }
            #[doc = "Bits 9:11 - ADC1 software pretrigger sources"]
            #[inline(always)]
            pub fn adc1swpretrg(&mut self) -> _ADC1SWPRETRGW {
                _ADC1SWPRETRGW { w: self }
            }
            #[doc = "Bits 12:13 - ADC1 pretrigger source select"]
            #[inline(always)]
            pub fn adc1pretrgsel(&mut self) -> _ADC1PRETRGSELW {
                _ADC1PRETRGSELW { w: self }
            }
        }
    }
    #[doc = "FTM Option Register 1"]
    pub struct FTMOPT1 {
        register: VolatileCell<u32>,
    }
    #[doc = "FTM Option Register 1"]
    pub mod ftmopt1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FTMOPT1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct FTM0SYNCBITR {
            bits: bool,
        }
        impl FTM0SYNCBITR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct FTM1SYNCBITR {
            bits: bool,
        }
        impl FTM1SYNCBITR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct FTM2SYNCBITR {
            bits: bool,
        }
        impl FTM2SYNCBITR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct FTM3SYNCBITR {
            bits: bool,
        }
        impl FTM3SYNCBITR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `FTM1CH0SEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FTM1CH0SELR {
            #[doc = "FTM1_CH0 input"]
            _00,
            #[doc = "CMP0 output"]
            _01,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl FTM1CH0SELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    FTM1CH0SELR::_00 => 0,
                    FTM1CH0SELR::_01 => 1,
                    FTM1CH0SELR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> FTM1CH0SELR {
                match value {
                    0 => FTM1CH0SELR::_00,
                    1 => FTM1CH0SELR::_01,
                    i => FTM1CH0SELR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == FTM1CH0SELR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == FTM1CH0SELR::_01
            }
        }
        #[doc = "Possible values of the field `FTM2CH0SEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FTM2CH0SELR {
            #[doc = "FTM2_CH0 input"]
            _00,
            #[doc = "CMP0 output"]
            _01,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl FTM2CH0SELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    FTM2CH0SELR::_00 => 0,
                    FTM2CH0SELR::_01 => 1,
                    FTM2CH0SELR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> FTM2CH0SELR {
                match value {
                    0 => FTM2CH0SELR::_00,
                    1 => FTM2CH0SELR::_01,
                    i => FTM2CH0SELR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == FTM2CH0SELR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == FTM2CH0SELR::_01
            }
        }
        #[doc = "Possible values of the field `FTM2CH1SEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FTM2CH1SELR {
            #[doc = "FTM2_CH1 input"]
            _0,
            #[doc = "exclusive OR of FTM2_CH0,FTM2_CH1,and FTM1_CH1"]
            _1,
        }
        impl FTM2CH1SELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FTM2CH1SELR::_0 => false,
                    FTM2CH1SELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FTM2CH1SELR {
                match value {
                    false => FTM2CH1SELR::_0,
                    true => FTM2CH1SELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FTM2CH1SELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FTM2CH1SELR::_1
            }
        }
        #[doc = "Possible values of the field `FTMGLDOK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FTMGLDOKR {
            #[doc = "FTM Global load mechanism disabled."]
            _0,
            #[doc = "FTM Global load mechanism enabled"]
            _1,
        }
        impl FTMGLDOKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FTMGLDOKR::_0 => false,
                    FTMGLDOKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FTMGLDOKR {
                match value {
                    false => FTMGLDOKR::_0,
                    true => FTMGLDOKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FTMGLDOKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FTMGLDOKR::_1
            }
        }
        #[doc = "Possible values of the field `FTM0_OUTSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FTM0_OUTSELR {
            #[doc = "No modulation with FTM1_CH1"]
            _00000000,
            #[doc = "Modulation with FTM1_CH1"]
            _00000001,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl FTM0_OUTSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    FTM0_OUTSELR::_00000000 => 0,
                    FTM0_OUTSELR::_00000001 => 1,
                    FTM0_OUTSELR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> FTM0_OUTSELR {
                match value {
                    0 => FTM0_OUTSELR::_00000000,
                    1 => FTM0_OUTSELR::_00000001,
                    i => FTM0_OUTSELR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_00000000`"]
            #[inline(always)]
            pub fn is_00000000(&self) -> bool {
                *self == FTM0_OUTSELR::_00000000
            }
            #[doc = "Checks if the value of the field is `_00000001`"]
            #[inline(always)]
            pub fn is_00000001(&self) -> bool {
                *self == FTM0_OUTSELR::_00000001
            }
        }
        #[doc = "Possible values of the field `FTM3_OUTSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FTM3_OUTSELR {
            #[doc = "No modulation with FTM2_CH1"]
            _00000000,
            #[doc = "Modulation with FTM2_CH1"]
            _00000001,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl FTM3_OUTSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    FTM3_OUTSELR::_00000000 => 0,
                    FTM3_OUTSELR::_00000001 => 1,
                    FTM3_OUTSELR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> FTM3_OUTSELR {
                match value {
                    0 => FTM3_OUTSELR::_00000000,
                    1 => FTM3_OUTSELR::_00000001,
                    i => FTM3_OUTSELR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_00000000`"]
            #[inline(always)]
            pub fn is_00000000(&self) -> bool {
                *self == FTM3_OUTSELR::_00000000
            }
            #[doc = "Checks if the value of the field is `_00000001`"]
            #[inline(always)]
            pub fn is_00000001(&self) -> bool {
                *self == FTM3_OUTSELR::_00000001
            }
        }
        #[doc = r" Proxy"]
        pub struct _FTM0SYNCBITW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FTM0SYNCBITW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _FTM1SYNCBITW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FTM1SYNCBITW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _FTM2SYNCBITW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FTM2SYNCBITW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _FTM3SYNCBITW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FTM3SYNCBITW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FTM1CH0SEL`"]
        pub enum FTM1CH0SELW {
            #[doc = "FTM1_CH0 input"]
            _00,
            #[doc = "CMP0 output"]
            _01,
        }
        impl FTM1CH0SELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    FTM1CH0SELW::_00 => 0,
                    FTM1CH0SELW::_01 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FTM1CH0SELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FTM1CH0SELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FTM1CH0SELW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "FTM1_CH0 input"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(FTM1CH0SELW::_00)
            }
            #[doc = "CMP0 output"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(FTM1CH0SELW::_01)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FTM2CH0SEL`"]
        pub enum FTM2CH0SELW {
            #[doc = "FTM2_CH0 input"]
            _00,
            #[doc = "CMP0 output"]
            _01,
        }
        impl FTM2CH0SELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    FTM2CH0SELW::_00 => 0,
                    FTM2CH0SELW::_01 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FTM2CH0SELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FTM2CH0SELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FTM2CH0SELW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "FTM2_CH0 input"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(FTM2CH0SELW::_00)
            }
            #[doc = "CMP0 output"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(FTM2CH0SELW::_01)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FTM2CH1SEL`"]
        pub enum FTM2CH1SELW {
            #[doc = "FTM2_CH1 input"]
            _0,
            #[doc = "exclusive OR of FTM2_CH0,FTM2_CH1,and FTM1_CH1"]
            _1,
        }
        impl FTM2CH1SELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FTM2CH1SELW::_0 => false,
                    FTM2CH1SELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FTM2CH1SELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FTM2CH1SELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FTM2CH1SELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM2_CH1 input"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FTM2CH1SELW::_0)
            }
            #[doc = "exclusive OR of FTM2_CH0,FTM2_CH1,and FTM1_CH1"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FTM2CH1SELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FTMGLDOK`"]
        pub enum FTMGLDOKW {
            #[doc = "FTM Global load mechanism disabled."]
            _0,
            #[doc = "FTM Global load mechanism enabled"]
            _1,
        }
        impl FTMGLDOKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FTMGLDOKW::_0 => false,
                    FTMGLDOKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FTMGLDOKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FTMGLDOKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FTMGLDOKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FTM Global load mechanism disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FTMGLDOKW::_0)
            }
            #[doc = "FTM Global load mechanism enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FTMGLDOKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FTM0_OUTSEL`"]
        pub enum FTM0_OUTSELW {
            #[doc = "No modulation with FTM1_CH1"]
            _00000000,
            #[doc = "Modulation with FTM1_CH1"]
            _00000001,
        }
        impl FTM0_OUTSELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    FTM0_OUTSELW::_00000000 => 0,
                    FTM0_OUTSELW::_00000001 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FTM0_OUTSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FTM0_OUTSELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FTM0_OUTSELW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "No modulation with FTM1_CH1"]
            #[inline(always)]
            pub fn _00000000(self) -> &'a mut W {
                self.variant(FTM0_OUTSELW::_00000000)
            }
            #[doc = "Modulation with FTM1_CH1"]
            #[inline(always)]
            pub fn _00000001(self) -> &'a mut W {
                self.variant(FTM0_OUTSELW::_00000001)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FTM3_OUTSEL`"]
        pub enum FTM3_OUTSELW {
            #[doc = "No modulation with FTM2_CH1"]
            _00000000,
            #[doc = "Modulation with FTM2_CH1"]
            _00000001,
        }
        impl FTM3_OUTSELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    FTM3_OUTSELW::_00000000 => 0,
                    FTM3_OUTSELW::_00000001 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FTM3_OUTSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FTM3_OUTSELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FTM3_OUTSELW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "No modulation with FTM2_CH1"]
            #[inline(always)]
            pub fn _00000000(self) -> &'a mut W {
                self.variant(FTM3_OUTSELW::_00000000)
            }
            #[doc = "Modulation with FTM2_CH1"]
            #[inline(always)]
            pub fn _00000001(self) -> &'a mut W {
                self.variant(FTM3_OUTSELW::_00000001)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - FTM0 Sync Bit"]
            #[inline(always)]
            pub fn ftm0syncbit(&self) -> FTM0SYNCBITR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                FTM0SYNCBITR { bits }
            }
            #[doc = "Bit 1 - FTM1 Sync Bit"]
            #[inline(always)]
            pub fn ftm1syncbit(&self) -> FTM1SYNCBITR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                FTM1SYNCBITR { bits }
            }
            #[doc = "Bit 2 - FTM2 Sync Bit"]
            #[inline(always)]
            pub fn ftm2syncbit(&self) -> FTM2SYNCBITR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                FTM2SYNCBITR { bits }
            }
            #[doc = "Bit 3 - FTM3 Sync Bit"]
            #[inline(always)]
            pub fn ftm3syncbit(&self) -> FTM3SYNCBITR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                FTM3SYNCBITR { bits }
            }
            #[doc = "Bits 4:5 - FTM1 CH0 Select"]
            #[inline(always)]
            pub fn ftm1ch0sel(&self) -> FTM1CH0SELR {
                FTM1CH0SELR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 6:7 - FTM2 CH0 Select"]
            #[inline(always)]
            pub fn ftm2ch0sel(&self) -> FTM2CH0SELR {
                FTM2CH0SELR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 8 - FTM2 CH1 Select"]
            #[inline(always)]
            pub fn ftm2ch1sel(&self) -> FTM2CH1SELR {
                FTM2CH1SELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - FTM global load enable"]
            #[inline(always)]
            pub fn ftmgldok(&self) -> FTMGLDOKR {
                FTMGLDOKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:23 - FTM0 channel modulation select with FTM1_CH1"]
            #[inline(always)]
            pub fn ftm0_outsel(&self) -> FTM0_OUTSELR {
                FTM0_OUTSELR::_from({
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 24:31 - FTM3 channel modulation select with FTM2_CH1"]
            #[inline(always)]
            pub fn ftm3_outsel(&self) -> FTM3_OUTSELR {
                FTM3_OUTSELR::_from({
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - FTM0 Sync Bit"]
            #[inline(always)]
            pub fn ftm0syncbit(&mut self) -> _FTM0SYNCBITW {
                _FTM0SYNCBITW { w: self }
            }
            #[doc = "Bit 1 - FTM1 Sync Bit"]
            #[inline(always)]
            pub fn ftm1syncbit(&mut self) -> _FTM1SYNCBITW {
                _FTM1SYNCBITW { w: self }
            }
            #[doc = "Bit 2 - FTM2 Sync Bit"]
            #[inline(always)]
            pub fn ftm2syncbit(&mut self) -> _FTM2SYNCBITW {
                _FTM2SYNCBITW { w: self }
            }
            #[doc = "Bit 3 - FTM3 Sync Bit"]
            #[inline(always)]
            pub fn ftm3syncbit(&mut self) -> _FTM3SYNCBITW {
                _FTM3SYNCBITW { w: self }
            }
            #[doc = "Bits 4:5 - FTM1 CH0 Select"]
            #[inline(always)]
            pub fn ftm1ch0sel(&mut self) -> _FTM1CH0SELW {
                _FTM1CH0SELW { w: self }
            }
            #[doc = "Bits 6:7 - FTM2 CH0 Select"]
            #[inline(always)]
            pub fn ftm2ch0sel(&mut self) -> _FTM2CH0SELW {
                _FTM2CH0SELW { w: self }
            }
            #[doc = "Bit 8 - FTM2 CH1 Select"]
            #[inline(always)]
            pub fn ftm2ch1sel(&mut self) -> _FTM2CH1SELW {
                _FTM2CH1SELW { w: self }
            }
            #[doc = "Bit 15 - FTM global load enable"]
            #[inline(always)]
            pub fn ftmgldok(&mut self) -> _FTMGLDOKW {
                _FTMGLDOKW { w: self }
            }
            #[doc = "Bits 16:23 - FTM0 channel modulation select with FTM1_CH1"]
            #[inline(always)]
            pub fn ftm0_outsel(&mut self) -> _FTM0_OUTSELW {
                _FTM0_OUTSELW { w: self }
            }
            #[doc = "Bits 24:31 - FTM3 channel modulation select with FTM2_CH1"]
            #[inline(always)]
            pub fn ftm3_outsel(&mut self) -> _FTM3_OUTSELW {
                _FTM3_OUTSELW { w: self }
            }
        }
    }
    #[doc = "Miscellaneous control register 0"]
    pub struct MISCTRL0 {
        register: VolatileCell<u32>,
    }
    #[doc = "Miscellaneous control register 0"]
    pub mod misctrl0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::MISCTRL0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `FTM0_OBE_CTRL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FTM0_OBE_CTRLR {
            #[doc = "The FTM channel output is put to safe state when the FTM counter is enabled and the FTM channel output is enabled by Fault Control (FTM_MODE[FAULTM]!=2'b00 and FTM_FLTCTRL[FSTATE]=1'b0) and PWM is enabled (FTM_SC[PWMENn] = 1'b1). Otherwise the channel output is tristated."]
            _0,
            #[doc = "The FTM channel output state is retained when the channel is in output mode. The output channel is tristated when the channel is in input capture [DECAPEN=1'b0, COMBINE=1'b0, MSnB:MSnA=2'b00] or dual edge capture mode [DECAPEN=1'b1]."]
            _1,
        }
        impl FTM0_OBE_CTRLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FTM0_OBE_CTRLR::_0 => false,
                    FTM0_OBE_CTRLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FTM0_OBE_CTRLR {
                match value {
                    false => FTM0_OBE_CTRLR::_0,
                    true => FTM0_OBE_CTRLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FTM0_OBE_CTRLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FTM0_OBE_CTRLR::_1
            }
        }
        #[doc = "Possible values of the field `FTM1_OBE_CTRL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FTM1_OBE_CTRLR {
            #[doc = "The FTM channel output is put to safe state when the FTM counter is enabled and the FTM channel output is enabled by Fault Control (FTM_MODE[FAULTM]!=2'b00 and FTM_FLTCTRL[FSTATE]=1'b0) and PWM is enabled (FTM_SC[PWMENn] = 1'b1). Otherwise the channel output is tristated."]
            _0,
            #[doc = "The FTM channel output state is retained when the channel is in output mode. The output channel is tristated when the channel is in input capture [DECAPEN=1'b0, COMBINE=1'b0, MSnB:MSnA=2'b00] or dual edge capture mode [DECAPEN=1'b1]."]
            _1,
        }
        impl FTM1_OBE_CTRLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FTM1_OBE_CTRLR::_0 => false,
                    FTM1_OBE_CTRLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FTM1_OBE_CTRLR {
                match value {
                    false => FTM1_OBE_CTRLR::_0,
                    true => FTM1_OBE_CTRLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FTM1_OBE_CTRLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FTM1_OBE_CTRLR::_1
            }
        }
        #[doc = "Possible values of the field `FTM2_OBE_CTRL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FTM2_OBE_CTRLR {
            #[doc = "The FTM channel output is put to safe state when the FTM counter is enabled and the FTM channel output is enabled by Fault Control (FTM_MODE[FAULTM]!=2'b00 and FTM_FLTCTRL[FSTATE]=1'b0) and PWM is enabled (FTM_SC[PWMENn] = 1'b1). Otherwise the channel output is tristated."]
            _0,
            #[doc = "The FTM channel output state is retained when the channel is in output mode. The output channel is tristated when the channel is in input capture [DECAPEN=1'b0, COMBINE=1'b0, MSnB:MSnA=2'b00] or dual edge capture mode [DECAPEN=1'b1]."]
            _1,
        }
        impl FTM2_OBE_CTRLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FTM2_OBE_CTRLR::_0 => false,
                    FTM2_OBE_CTRLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FTM2_OBE_CTRLR {
                match value {
                    false => FTM2_OBE_CTRLR::_0,
                    true => FTM2_OBE_CTRLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FTM2_OBE_CTRLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FTM2_OBE_CTRLR::_1
            }
        }
        #[doc = "Possible values of the field `FTM3_OBE_CTRL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FTM3_OBE_CTRLR {
            #[doc = "The FTM channel output is put to safe state when the FTM counter is enabled and the FTM channel output is enabled by Fault Control (FTM_MODE[FAULTM]!=2'b00 and FTM_FLTCTRL[FSTATE]=1'b0) and PWM is enabled (FTM_SC[PWMENn] = 1'b1). Otherwise the channel output is tristated."]
            _0,
            #[doc = "The FTM channel output state is retained when the channel is in output mode. The output channel is tristated when the channel is in input capture [DECAPEN=1'b0, COMBINE=1'b0, MSnB:MSnA=2'b00] or dual edge capture mode [DECAPEN=1'b1]."]
            _1,
        }
        impl FTM3_OBE_CTRLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FTM3_OBE_CTRLR::_0 => false,
                    FTM3_OBE_CTRLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FTM3_OBE_CTRLR {
                match value {
                    false => FTM3_OBE_CTRLR::_0,
                    true => FTM3_OBE_CTRLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FTM3_OBE_CTRLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FTM3_OBE_CTRLR::_1
            }
        }
        #[doc = "Values that can be written to the field `FTM0_OBE_CTRL`"]
        pub enum FTM0_OBE_CTRLW {
            #[doc = "The FTM channel output is put to safe state when the FTM counter is enabled and the FTM channel output is enabled by Fault Control (FTM_MODE[FAULTM]!=2'b00 and FTM_FLTCTRL[FSTATE]=1'b0) and PWM is enabled (FTM_SC[PWMENn] = 1'b1). Otherwise the channel output is tristated."]
            _0,
            #[doc = "The FTM channel output state is retained when the channel is in output mode. The output channel is tristated when the channel is in input capture [DECAPEN=1'b0, COMBINE=1'b0, MSnB:MSnA=2'b00] or dual edge capture mode [DECAPEN=1'b1]."]
            _1,
        }
        impl FTM0_OBE_CTRLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FTM0_OBE_CTRLW::_0 => false,
                    FTM0_OBE_CTRLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FTM0_OBE_CTRLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FTM0_OBE_CTRLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FTM0_OBE_CTRLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The FTM channel output is put to safe state when the FTM counter is enabled and the FTM channel output is enabled by Fault Control (FTM_MODE[FAULTM]!=2'b00 and FTM_FLTCTRL[FSTATE]=1'b0) and PWM is enabled (FTM_SC[PWMENn] = 1'b1). Otherwise the channel output is tristated."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FTM0_OBE_CTRLW::_0)
            }
            #[doc = "The FTM channel output state is retained when the channel is in output mode. The output channel is tristated when the channel is in input capture [DECAPEN=1'b0, COMBINE=1'b0, MSnB:MSnA=2'b00] or dual edge capture mode [DECAPEN=1'b1]."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FTM0_OBE_CTRLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FTM1_OBE_CTRL`"]
        pub enum FTM1_OBE_CTRLW {
            #[doc = "The FTM channel output is put to safe state when the FTM counter is enabled and the FTM channel output is enabled by Fault Control (FTM_MODE[FAULTM]!=2'b00 and FTM_FLTCTRL[FSTATE]=1'b0) and PWM is enabled (FTM_SC[PWMENn] = 1'b1). Otherwise the channel output is tristated."]
            _0,
            #[doc = "The FTM channel output state is retained when the channel is in output mode. The output channel is tristated when the channel is in input capture [DECAPEN=1'b0, COMBINE=1'b0, MSnB:MSnA=2'b00] or dual edge capture mode [DECAPEN=1'b1]."]
            _1,
        }
        impl FTM1_OBE_CTRLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FTM1_OBE_CTRLW::_0 => false,
                    FTM1_OBE_CTRLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FTM1_OBE_CTRLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FTM1_OBE_CTRLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FTM1_OBE_CTRLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The FTM channel output is put to safe state when the FTM counter is enabled and the FTM channel output is enabled by Fault Control (FTM_MODE[FAULTM]!=2'b00 and FTM_FLTCTRL[FSTATE]=1'b0) and PWM is enabled (FTM_SC[PWMENn] = 1'b1). Otherwise the channel output is tristated."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FTM1_OBE_CTRLW::_0)
            }
            #[doc = "The FTM channel output state is retained when the channel is in output mode. The output channel is tristated when the channel is in input capture [DECAPEN=1'b0, COMBINE=1'b0, MSnB:MSnA=2'b00] or dual edge capture mode [DECAPEN=1'b1]."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FTM1_OBE_CTRLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FTM2_OBE_CTRL`"]
        pub enum FTM2_OBE_CTRLW {
            #[doc = "The FTM channel output is put to safe state when the FTM counter is enabled and the FTM channel output is enabled by Fault Control (FTM_MODE[FAULTM]!=2'b00 and FTM_FLTCTRL[FSTATE]=1'b0) and PWM is enabled (FTM_SC[PWMENn] = 1'b1). Otherwise the channel output is tristated."]
            _0,
            #[doc = "The FTM channel output state is retained when the channel is in output mode. The output channel is tristated when the channel is in input capture [DECAPEN=1'b0, COMBINE=1'b0, MSnB:MSnA=2'b00] or dual edge capture mode [DECAPEN=1'b1]."]
            _1,
        }
        impl FTM2_OBE_CTRLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FTM2_OBE_CTRLW::_0 => false,
                    FTM2_OBE_CTRLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FTM2_OBE_CTRLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FTM2_OBE_CTRLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FTM2_OBE_CTRLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The FTM channel output is put to safe state when the FTM counter is enabled and the FTM channel output is enabled by Fault Control (FTM_MODE[FAULTM]!=2'b00 and FTM_FLTCTRL[FSTATE]=1'b0) and PWM is enabled (FTM_SC[PWMENn] = 1'b1). Otherwise the channel output is tristated."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FTM2_OBE_CTRLW::_0)
            }
            #[doc = "The FTM channel output state is retained when the channel is in output mode. The output channel is tristated when the channel is in input capture [DECAPEN=1'b0, COMBINE=1'b0, MSnB:MSnA=2'b00] or dual edge capture mode [DECAPEN=1'b1]."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FTM2_OBE_CTRLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FTM3_OBE_CTRL`"]
        pub enum FTM3_OBE_CTRLW {
            #[doc = "The FTM channel output is put to safe state when the FTM counter is enabled and the FTM channel output is enabled by Fault Control (FTM_MODE[FAULTM]!=2'b00 and FTM_FLTCTRL[FSTATE]=1'b0) and PWM is enabled (FTM_SC[PWMENn] = 1'b1). Otherwise the channel output is tristated."]
            _0,
            #[doc = "The FTM channel output state is retained when the channel is in output mode. The output channel is tristated when the channel is in input capture [DECAPEN=1'b0, COMBINE=1'b0, MSnB:MSnA=2'b00] or dual edge capture mode [DECAPEN=1'b1]."]
            _1,
        }
        impl FTM3_OBE_CTRLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FTM3_OBE_CTRLW::_0 => false,
                    FTM3_OBE_CTRLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FTM3_OBE_CTRLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FTM3_OBE_CTRLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FTM3_OBE_CTRLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The FTM channel output is put to safe state when the FTM counter is enabled and the FTM channel output is enabled by Fault Control (FTM_MODE[FAULTM]!=2'b00 and FTM_FLTCTRL[FSTATE]=1'b0) and PWM is enabled (FTM_SC[PWMENn] = 1'b1). Otherwise the channel output is tristated."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FTM3_OBE_CTRLW::_0)
            }
            #[doc = "The FTM channel output state is retained when the channel is in output mode. The output channel is tristated when the channel is in input capture [DECAPEN=1'b0, COMBINE=1'b0, MSnB:MSnA=2'b00] or dual edge capture mode [DECAPEN=1'b1]."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FTM3_OBE_CTRLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 19;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 16 - FTM0 OBE CTRL bit"]
            #[inline(always)]
            pub fn ftm0_obe_ctrl(&self) -> FTM0_OBE_CTRLR {
                FTM0_OBE_CTRLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - FTM1 OBE CTRL bit"]
            #[inline(always)]
            pub fn ftm1_obe_ctrl(&self) -> FTM1_OBE_CTRLR {
                FTM1_OBE_CTRLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 18 - FTM2 OBE CTRL bit"]
            #[inline(always)]
            pub fn ftm2_obe_ctrl(&self) -> FTM2_OBE_CTRLR {
                FTM2_OBE_CTRLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 19 - FTM3 OBE CTRL bit"]
            #[inline(always)]
            pub fn ftm3_obe_ctrl(&self) -> FTM3_OBE_CTRLR {
                FTM3_OBE_CTRLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 19;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 16 - FTM0 OBE CTRL bit"]
            #[inline(always)]
            pub fn ftm0_obe_ctrl(&mut self) -> _FTM0_OBE_CTRLW {
                _FTM0_OBE_CTRLW { w: self }
            }
            #[doc = "Bit 17 - FTM1 OBE CTRL bit"]
            #[inline(always)]
            pub fn ftm1_obe_ctrl(&mut self) -> _FTM1_OBE_CTRLW {
                _FTM1_OBE_CTRLW { w: self }
            }
            #[doc = "Bit 18 - FTM2 OBE CTRL bit"]
            #[inline(always)]
            pub fn ftm2_obe_ctrl(&mut self) -> _FTM2_OBE_CTRLW {
                _FTM2_OBE_CTRLW { w: self }
            }
            #[doc = "Bit 19 - FTM3 OBE CTRL bit"]
            #[inline(always)]
            pub fn ftm3_obe_ctrl(&mut self) -> _FTM3_OBE_CTRLW {
                _FTM3_OBE_CTRLW { w: self }
            }
        }
    }
    #[doc = "System Device Identification Register"]
    pub struct SDID {
        register: VolatileCell<u32>,
    }
    #[doc = "System Device Identification Register"]
    pub mod sdid {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::SDID {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct FEATURESR {
            bits: u8,
        }
        impl FEATURESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `PACKAGE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PACKAGER {
            #[doc = "48 LQFP"]
            _0010,
            #[doc = "64 LQFP"]
            _0011,
            #[doc = "100 LQFP"]
            _0100,
            #[doc = "144 LQFP"]
            _0110,
            #[doc = "176 LQFP"]
            _0111,
            #[doc = "100 MAP BGA"]
            _1000,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl PACKAGER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PACKAGER::_0010 => 2,
                    PACKAGER::_0011 => 3,
                    PACKAGER::_0100 => 4,
                    PACKAGER::_0110 => 6,
                    PACKAGER::_0111 => 7,
                    PACKAGER::_1000 => 8,
                    PACKAGER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PACKAGER {
                match value {
                    2 => PACKAGER::_0010,
                    3 => PACKAGER::_0011,
                    4 => PACKAGER::_0100,
                    6 => PACKAGER::_0110,
                    7 => PACKAGER::_0111,
                    8 => PACKAGER::_1000,
                    i => PACKAGER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == PACKAGER::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == PACKAGER::_0011
            }
            #[doc = "Checks if the value of the field is `_0100`"]
            #[inline(always)]
            pub fn is_0100(&self) -> bool {
                *self == PACKAGER::_0100
            }
            #[doc = "Checks if the value of the field is `_0110`"]
            #[inline(always)]
            pub fn is_0110(&self) -> bool {
                *self == PACKAGER::_0110
            }
            #[doc = "Checks if the value of the field is `_0111`"]
            #[inline(always)]
            pub fn is_0111(&self) -> bool {
                *self == PACKAGER::_0111
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == PACKAGER::_1000
            }
        }
        #[doc = r" Value of the field"]
        pub struct REVIDR {
            bits: u8,
        }
        impl REVIDR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `RAMSIZE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RAMSIZER {
            #[doc = "128 KB (S32K148), Reserved (others)"]
            _0111,
            #[doc = "160 KB (S32K148) , Reserved (others)"]
            _1001,
            #[doc = "192 KB (S32K148), 16 KB (S32K142), Reserved (others)"]
            _1011,
            #[doc = "48 KB (S32K144), 24 KB (S32K142), Reserved (others)"]
            _1101,
            #[doc = "256 KB (S32K148), 64 KB (S32K144), 32 KB (S32K142)"]
            _1111,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl RAMSIZER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    RAMSIZER::_0111 => 7,
                    RAMSIZER::_1001 => 9,
                    RAMSIZER::_1011 => 11,
                    RAMSIZER::_1101 => 13,
                    RAMSIZER::_1111 => 15,
                    RAMSIZER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> RAMSIZER {
                match value {
                    7 => RAMSIZER::_0111,
                    9 => RAMSIZER::_1001,
                    11 => RAMSIZER::_1011,
                    13 => RAMSIZER::_1101,
                    15 => RAMSIZER::_1111,
                    i => RAMSIZER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0111`"]
            #[inline(always)]
            pub fn is_0111(&self) -> bool {
                *self == RAMSIZER::_0111
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == RAMSIZER::_1001
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == RAMSIZER::_1011
            }
            #[doc = "Checks if the value of the field is `_1101`"]
            #[inline(always)]
            pub fn is_1101(&self) -> bool {
                *self == RAMSIZER::_1101
            }
            #[doc = "Checks if the value of the field is `_1111`"]
            #[inline(always)]
            pub fn is_1111(&self) -> bool {
                *self == RAMSIZER::_1111
            }
        }
        #[doc = r" Value of the field"]
        pub struct DERIVATER {
            bits: u8,
        }
        impl DERIVATER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct SUBSERIESR {
            bits: u8,
        }
        impl SUBSERIESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct GENERATIONR {
            bits: u8,
        }
        impl GENERATIONR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Features"]
            #[inline(always)]
            pub fn features(&self) -> FEATURESR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                FEATURESR { bits }
            }
            #[doc = "Bits 8:11 - Package"]
            #[inline(always)]
            pub fn package(&self) -> PACKAGER {
                PACKAGER::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 12:15 - Device revision number"]
            #[inline(always)]
            pub fn revid(&self) -> REVIDR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                REVIDR { bits }
            }
            #[doc = "Bits 16:19 - RAM size"]
            #[inline(always)]
            pub fn ramsize(&self) -> RAMSIZER {
                RAMSIZER::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 20:23 - Derivate"]
            #[inline(always)]
            pub fn derivate(&self) -> DERIVATER {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DERIVATER { bits }
            }
            #[doc = "Bits 24:27 - Subseries"]
            #[inline(always)]
            pub fn subseries(&self) -> SUBSERIESR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SUBSERIESR { bits }
            }
            #[doc = "Bits 28:31 - S32K product series generation"]
            #[inline(always)]
            pub fn generation(&self) -> GENERATIONR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 28;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                GENERATIONR { bits }
            }
        }
    }
    #[doc = "Platform Clock Gating Control Register"]
    pub struct PLATCGC {
        register: VolatileCell<u32>,
    }
    #[doc = "Platform Clock Gating Control Register"]
    pub mod platcgc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PLATCGC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CGCMSCM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CGCMSCMR {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled"]
            _1,
        }
        impl CGCMSCMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CGCMSCMR::_0 => false,
                    CGCMSCMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CGCMSCMR {
                match value {
                    false => CGCMSCMR::_0,
                    true => CGCMSCMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CGCMSCMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CGCMSCMR::_1
            }
        }
        #[doc = "Possible values of the field `CGCMPU`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CGCMPUR {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled"]
            _1,
        }
        impl CGCMPUR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CGCMPUR::_0 => false,
                    CGCMPUR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CGCMPUR {
                match value {
                    false => CGCMPUR::_0,
                    true => CGCMPUR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CGCMPUR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CGCMPUR::_1
            }
        }
        #[doc = "Possible values of the field `CGCDMA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CGCDMAR {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled"]
            _1,
        }
        impl CGCDMAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CGCDMAR::_0 => false,
                    CGCDMAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CGCDMAR {
                match value {
                    false => CGCDMAR::_0,
                    true => CGCDMAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CGCDMAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CGCDMAR::_1
            }
        }
        #[doc = "Possible values of the field `CGCERM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CGCERMR {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled"]
            _1,
        }
        impl CGCERMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CGCERMR::_0 => false,
                    CGCERMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CGCERMR {
                match value {
                    false => CGCERMR::_0,
                    true => CGCERMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CGCERMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CGCERMR::_1
            }
        }
        #[doc = "Possible values of the field `CGCEIM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CGCEIMR {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled"]
            _1,
        }
        impl CGCEIMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CGCEIMR::_0 => false,
                    CGCEIMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CGCEIMR {
                match value {
                    false => CGCEIMR::_0,
                    true => CGCEIMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CGCEIMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CGCEIMR::_1
            }
        }
        #[doc = "Values that can be written to the field `CGCMSCM`"]
        pub enum CGCMSCMW {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled"]
            _1,
        }
        impl CGCMSCMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CGCMSCMW::_0 => false,
                    CGCMSCMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CGCMSCMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CGCMSCMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CGCMSCMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CGCMSCMW::_0)
            }
            #[doc = "Clock enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CGCMSCMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CGCMPU`"]
        pub enum CGCMPUW {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled"]
            _1,
        }
        impl CGCMPUW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CGCMPUW::_0 => false,
                    CGCMPUW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CGCMPUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CGCMPUW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CGCMPUW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CGCMPUW::_0)
            }
            #[doc = "Clock enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CGCMPUW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CGCDMA`"]
        pub enum CGCDMAW {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled"]
            _1,
        }
        impl CGCDMAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CGCDMAW::_0 => false,
                    CGCDMAW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CGCDMAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CGCDMAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CGCDMAW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CGCDMAW::_0)
            }
            #[doc = "Clock enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CGCDMAW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CGCERM`"]
        pub enum CGCERMW {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled"]
            _1,
        }
        impl CGCERMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CGCERMW::_0 => false,
                    CGCERMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CGCERMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CGCERMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CGCERMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CGCERMW::_0)
            }
            #[doc = "Clock enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CGCERMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CGCEIM`"]
        pub enum CGCEIMW {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled"]
            _1,
        }
        impl CGCEIMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CGCEIMW::_0 => false,
                    CGCEIMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CGCEIMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CGCEIMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CGCEIMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CGCEIMW::_0)
            }
            #[doc = "Clock enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CGCEIMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - MSCM Clock Gating Control"]
            #[inline(always)]
            pub fn cgcmscm(&self) -> CGCMSCMR {
                CGCMSCMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - MPU Clock Gating Control"]
            #[inline(always)]
            pub fn cgcmpu(&self) -> CGCMPUR {
                CGCMPUR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - DMA Clock Gating Control"]
            #[inline(always)]
            pub fn cgcdma(&self) -> CGCDMAR {
                CGCDMAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - ERM Clock Gating Control"]
            #[inline(always)]
            pub fn cgcerm(&self) -> CGCERMR {
                CGCERMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - EIM Clock Gating Control"]
            #[inline(always)]
            pub fn cgceim(&self) -> CGCEIMR {
                CGCEIMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 31 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - MSCM Clock Gating Control"]
            #[inline(always)]
            pub fn cgcmscm(&mut self) -> _CGCMSCMW {
                _CGCMSCMW { w: self }
            }
            #[doc = "Bit 1 - MPU Clock Gating Control"]
            #[inline(always)]
            pub fn cgcmpu(&mut self) -> _CGCMPUW {
                _CGCMPUW { w: self }
            }
            #[doc = "Bit 2 - DMA Clock Gating Control"]
            #[inline(always)]
            pub fn cgcdma(&mut self) -> _CGCDMAW {
                _CGCDMAW { w: self }
            }
            #[doc = "Bit 3 - ERM Clock Gating Control"]
            #[inline(always)]
            pub fn cgcerm(&mut self) -> _CGCERMW {
                _CGCERMW { w: self }
            }
            #[doc = "Bit 4 - EIM Clock Gating Control"]
            #[inline(always)]
            pub fn cgceim(&mut self) -> _CGCEIMW {
                _CGCEIMW { w: self }
            }
        }
    }
    #[doc = "Flash Configuration Register 1"]
    pub struct FCFG1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Flash Configuration Register 1"]
    pub mod fcfg1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FCFG1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DEPARTR {
            bits: u8,
        }
        impl DEPARTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `EEERAMSIZE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EEERAMSIZER {
            #[doc = "4 KB"]
            _0010,
            #[doc = "2 KB"]
            _0011,
            #[doc = "1 KB"]
            _0100,
            #[doc = "512 Bytes"]
            _0101,
            #[doc = "256 Bytes"]
            _0110,
            #[doc = "128 Bytes"]
            _0111,
            #[doc = "64 Bytes"]
            _1000,
            #[doc = "32 Bytes"]
            _1001,
            #[doc = "0 Bytes"]
            _1111,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl EEERAMSIZER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    EEERAMSIZER::_0010 => 2,
                    EEERAMSIZER::_0011 => 3,
                    EEERAMSIZER::_0100 => 4,
                    EEERAMSIZER::_0101 => 5,
                    EEERAMSIZER::_0110 => 6,
                    EEERAMSIZER::_0111 => 7,
                    EEERAMSIZER::_1000 => 8,
                    EEERAMSIZER::_1001 => 9,
                    EEERAMSIZER::_1111 => 15,
                    EEERAMSIZER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> EEERAMSIZER {
                match value {
                    2 => EEERAMSIZER::_0010,
                    3 => EEERAMSIZER::_0011,
                    4 => EEERAMSIZER::_0100,
                    5 => EEERAMSIZER::_0101,
                    6 => EEERAMSIZER::_0110,
                    7 => EEERAMSIZER::_0111,
                    8 => EEERAMSIZER::_1000,
                    9 => EEERAMSIZER::_1001,
                    15 => EEERAMSIZER::_1111,
                    i => EEERAMSIZER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == EEERAMSIZER::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == EEERAMSIZER::_0011
            }
            #[doc = "Checks if the value of the field is `_0100`"]
            #[inline(always)]
            pub fn is_0100(&self) -> bool {
                *self == EEERAMSIZER::_0100
            }
            #[doc = "Checks if the value of the field is `_0101`"]
            #[inline(always)]
            pub fn is_0101(&self) -> bool {
                *self == EEERAMSIZER::_0101
            }
            #[doc = "Checks if the value of the field is `_0110`"]
            #[inline(always)]
            pub fn is_0110(&self) -> bool {
                *self == EEERAMSIZER::_0110
            }
            #[doc = "Checks if the value of the field is `_0111`"]
            #[inline(always)]
            pub fn is_0111(&self) -> bool {
                *self == EEERAMSIZER::_0111
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == EEERAMSIZER::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == EEERAMSIZER::_1001
            }
            #[doc = "Checks if the value of the field is `_1111`"]
            #[inline(always)]
            pub fn is_1111(&self) -> bool {
                *self == EEERAMSIZER::_1111
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 12:15 - FlexNVM partition"]
            #[inline(always)]
            pub fn depart(&self) -> DEPARTR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DEPARTR { bits }
            }
            #[doc = "Bits 16:19 - EEE SRAM SIZE"]
            #[inline(always)]
            pub fn eeeramsize(&self) -> EEERAMSIZER {
                EEERAMSIZER::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "Unique Identification Register High"]
    pub struct UIDH {
        register: VolatileCell<u32>,
    }
    #[doc = "Unique Identification Register High"]
    pub mod uidh {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::UIDH {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct UID127_96R {
            bits: u32,
        }
        impl UID127_96R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Unique Identification"]
            #[inline(always)]
            pub fn uid127_96(&self) -> UID127_96R {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                UID127_96R { bits }
            }
        }
    }
    #[doc = "Unique Identification Register Mid-High"]
    pub struct UIDMH {
        register: VolatileCell<u32>,
    }
    #[doc = "Unique Identification Register Mid-High"]
    pub mod uidmh {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::UIDMH {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct UID95_64R {
            bits: u32,
        }
        impl UID95_64R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Unique Identification"]
            #[inline(always)]
            pub fn uid95_64(&self) -> UID95_64R {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                UID95_64R { bits }
            }
        }
    }
    #[doc = "Unique Identification Register Mid Low"]
    pub struct UIDML {
        register: VolatileCell<u32>,
    }
    #[doc = "Unique Identification Register Mid Low"]
    pub mod uidml {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::UIDML {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct UID63_32R {
            bits: u32,
        }
        impl UID63_32R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Unique Identification"]
            #[inline(always)]
            pub fn uid63_32(&self) -> UID63_32R {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                UID63_32R { bits }
            }
        }
    }
    #[doc = "Unique Identification Register Low"]
    pub struct UIDL {
        register: VolatileCell<u32>,
    }
    #[doc = "Unique Identification Register Low"]
    pub mod uidl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::UIDL {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct UID31_0R {
            bits: u32,
        }
        impl UID31_0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Unique Identification"]
            #[inline(always)]
            pub fn uid31_0(&self) -> UID31_0R {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                UID31_0R { bits }
            }
        }
    }
    #[doc = "System Clock Divider Register 4"]
    pub struct CLKDIV4 {
        register: VolatileCell<u32>,
    }
    #[doc = "System Clock Divider Register 4"]
    pub mod clkdiv4 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CLKDIV4 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct TRACEFRACR {
            bits: bool,
        }
        impl TRACEFRACR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct TRACEDIVR {
            bits: u8,
        }
        impl TRACEDIVR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `TRACEDIVEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRACEDIVENR {
            #[doc = "Debug trace divider disabled"]
            _0,
            #[doc = "Debug trace divider enabled"]
            _1,
        }
        impl TRACEDIVENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRACEDIVENR::_0 => false,
                    TRACEDIVENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRACEDIVENR {
                match value {
                    false => TRACEDIVENR::_0,
                    true => TRACEDIVENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRACEDIVENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRACEDIVENR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRACEFRACW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRACEFRACW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRACEDIVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRACEDIVW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRACEDIVEN`"]
        pub enum TRACEDIVENW {
            #[doc = "Debug trace divider disabled"]
            _0,
            #[doc = "Debug trace divider enabled"]
            _1,
        }
        impl TRACEDIVENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRACEDIVENW::_0 => false,
                    TRACEDIVENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRACEDIVENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRACEDIVENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRACEDIVENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Debug trace divider disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRACEDIVENW::_0)
            }
            #[doc = "Debug trace divider enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRACEDIVENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 28;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Trace Clock Divider fraction To configure TRACEDIV and TRACEFRAC, you must first clear TRACEDIVEN to disable the trace clock divide function."]
            #[inline(always)]
            pub fn tracefrac(&self) -> TRACEFRACR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                TRACEFRACR { bits }
            }
            #[doc = "Bits 1:3 - Trace Clock Divider value To configure TRACEDIV, you must first disable TRACEDIVEN, then enable it after setting TRACEDIV."]
            #[inline(always)]
            pub fn tracediv(&self) -> TRACEDIVR {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TRACEDIVR { bits }
            }
            #[doc = "Bit 28 - Debug Trace Divider control"]
            #[inline(always)]
            pub fn tracediven(&self) -> TRACEDIVENR {
                TRACEDIVENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 28;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 268435456 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Trace Clock Divider fraction To configure TRACEDIV and TRACEFRAC, you must first clear TRACEDIVEN to disable the trace clock divide function."]
            #[inline(always)]
            pub fn tracefrac(&mut self) -> _TRACEFRACW {
                _TRACEFRACW { w: self }
            }
            #[doc = "Bits 1:3 - Trace Clock Divider value To configure TRACEDIV, you must first disable TRACEDIVEN, then enable it after setting TRACEDIV."]
            #[inline(always)]
            pub fn tracediv(&mut self) -> _TRACEDIVW {
                _TRACEDIVW { w: self }
            }
            #[doc = "Bit 28 - Debug Trace Divider control"]
            #[inline(always)]
            pub fn tracediven(&mut self) -> _TRACEDIVENW {
                _TRACEDIVENW { w: self }
            }
        }
    }
    #[doc = "Miscellaneous Control register 1"]
    pub struct MISCTRL1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Miscellaneous Control register 1"]
    pub mod misctrl1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::MISCTRL1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SW_TRGR {
            bits: bool,
        }
        impl SW_TRGR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Proxy"]
        pub struct _SW_TRGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SW_TRGW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Software trigger to TRGMUX. Writing to this bit generates software trigger to peripherals through TRGMUX (Refer to Figure: Trigger interconnectivity)."]
            #[inline(always)]
            pub fn sw_trg(&self) -> SW_TRGR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                SW_TRGR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Software trigger to TRGMUX. Writing to this bit generates software trigger to peripherals through TRGMUX (Refer to Figure: Trigger interconnectivity)."]
            #[inline(always)]
            pub fn sw_trg(&mut self) -> _SW_TRGW {
                _SW_TRGW { w: self }
            }
        }
    }
}
#[doc = "System Integration Module"]
pub struct SIM {
    register_block: sim::RegisterBlock,
}
impl Deref for SIM {
    type Target = sim::RegisterBlock;
    fn deref(&self) -> &sim::RegisterBlock {
        &self.register_block
    }
}
#[doc = "Pin Control and Interrupts"]
pub const PORTA: Peripheral<PORTA> = unsafe { Peripheral::new(1074040832) };
#[doc = "Pin Control and Interrupts"]
pub mod porta {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - Pin Control Register n"]
        pub pcr0: PCR0,
        #[doc = "0x04 - Pin Control Register n"]
        pub pcr1: PCR1,
        #[doc = "0x08 - Pin Control Register n"]
        pub pcr2: PCR2,
        #[doc = "0x0c - Pin Control Register n"]
        pub pcr3: PCR3,
        #[doc = "0x10 - Pin Control Register n"]
        pub pcr4: PCR4,
        #[doc = "0x14 - Pin Control Register n"]
        pub pcr5: PCR5,
        #[doc = "0x18 - Pin Control Register n"]
        pub pcr6: PCR6,
        #[doc = "0x1c - Pin Control Register n"]
        pub pcr7: PCR7,
        #[doc = "0x20 - Pin Control Register n"]
        pub pcr8: PCR8,
        #[doc = "0x24 - Pin Control Register n"]
        pub pcr9: PCR9,
        #[doc = "0x28 - Pin Control Register n"]
        pub pcr10: PCR10,
        #[doc = "0x2c - Pin Control Register n"]
        pub pcr11: PCR11,
        #[doc = "0x30 - Pin Control Register n"]
        pub pcr12: PCR12,
        #[doc = "0x34 - Pin Control Register n"]
        pub pcr13: PCR13,
        #[doc = "0x38 - Pin Control Register n"]
        pub pcr14: PCR14,
        #[doc = "0x3c - Pin Control Register n"]
        pub pcr15: PCR15,
        #[doc = "0x40 - Pin Control Register n"]
        pub pcr16: PCR16,
        #[doc = "0x44 - Pin Control Register n"]
        pub pcr17: PCR17,
        #[doc = "0x48 - Pin Control Register n"]
        pub pcr18: PCR18,
        #[doc = "0x4c - Pin Control Register n"]
        pub pcr19: PCR19,
        #[doc = "0x50 - Pin Control Register n"]
        pub pcr20: PCR20,
        #[doc = "0x54 - Pin Control Register n"]
        pub pcr21: PCR21,
        #[doc = "0x58 - Pin Control Register n"]
        pub pcr22: PCR22,
        #[doc = "0x5c - Pin Control Register n"]
        pub pcr23: PCR23,
        #[doc = "0x60 - Pin Control Register n"]
        pub pcr24: PCR24,
        #[doc = "0x64 - Pin Control Register n"]
        pub pcr25: PCR25,
        #[doc = "0x68 - Pin Control Register n"]
        pub pcr26: PCR26,
        #[doc = "0x6c - Pin Control Register n"]
        pub pcr27: PCR27,
        #[doc = "0x70 - Pin Control Register n"]
        pub pcr28: PCR28,
        #[doc = "0x74 - Pin Control Register n"]
        pub pcr29: PCR29,
        #[doc = "0x78 - Pin Control Register n"]
        pub pcr30: PCR30,
        #[doc = "0x7c - Pin Control Register n"]
        pub pcr31: PCR31,
        #[doc = "0x80 - Global Pin Control Low Register"]
        pub gpclr: GPCLR,
        #[doc = "0x84 - Global Pin Control High Register"]
        pub gpchr: GPCHR,
        _reserved0: [u8; 24usize],
        #[doc = "0xa0 - Interrupt Status Flag Register"]
        pub isfr: ISFR,
        _reserved1: [u8; 28usize],
        #[doc = "0xc0 - Digital Filter Enable Register"]
        pub dfer: DFER,
        #[doc = "0xc4 - Digital Filter Clock Register"]
        pub dfcr: DFCR,
        #[doc = "0xc8 - Digital Filter Width Register"]
        pub dfwr: DFWR,
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR0 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 2 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 3 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR2 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 3 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR3 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr3 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR3 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 3 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR4 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr4 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR4 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 1795 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR5 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr5 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR5 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `PFE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PFER {
            #[doc = "Passive input filter is disabled on the corresponding pin."]
            _0,
            #[doc = "Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics."]
            _1,
        }
        impl PFER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PFER::_0 => false,
                    PFER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PFER {
                match value {
                    false => PFER::_0,
                    true => PFER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PFER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PFER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PFE`"]
        pub enum PFEW {
            #[doc = "Passive input filter is disabled on the corresponding pin."]
            _0,
            #[doc = "Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics."]
            _1,
        }
        impl PFEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PFEW::_0 => false,
                    PFEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PFEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PFEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PFEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Passive input filter is disabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PFEW::_0)
            }
            #[doc = "Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PFEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Passive Filter Enable"]
            #[inline(always)]
            pub fn pfe(&self) -> PFER {
                PFER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 1793 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bit 4 - Passive Filter Enable"]
            #[inline(always)]
            pub fn pfe(&mut self) -> _PFEW {
                _PFEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR6 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr6 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR6 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR7 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr7 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR7 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR8 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr8 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR8 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR9 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr9 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR9 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR10 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr10 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR10 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 1792 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR11 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr11 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR11 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR12 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr12 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR12 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR13 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr13 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR13 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR14 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr14 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR14 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR15 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr15 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR15 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR16 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr16 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR16 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR17 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr17 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR17 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR18 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr18 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR18 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR19 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr19 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR19 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR20 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr20 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR20 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR21 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr21 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR21 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR22 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr22 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR22 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR23 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr23 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR23 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR24 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr24 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR24 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR25 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr25 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR25 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR26 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr26 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR26 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR27 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr27 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR27 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR28 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr28 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR28 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR29 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr29 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR29 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR30 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr30 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR30 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR31 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr31 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR31 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Global Pin Control Low Register"]
    pub struct GPCLR {
        register: VolatileCell<u32>,
    }
    #[doc = "Global Pin Control Low Register"]
    pub mod gpclr {
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::GPCLR {
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
        }
        #[doc = r" Proxy"]
        pub struct _GPWDW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GPWDW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `GPWE`"]
        pub enum GPWEW {
            #[doc = "Corresponding Pin Control Register is not updated with the value in GPWD."]
            _0,
            #[doc = "Corresponding Pin Control Register is updated with the value in GPWD."]
            _1,
        }
        impl GPWEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u16 {
                match *self {
                    GPWEW::_0 => 0,
                    GPWEW::_1 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _GPWEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GPWEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: GPWEW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Corresponding Pin Control Register is not updated with the value in GPWD."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(GPWEW::_0)
            }
            #[doc = "Corresponding Pin Control Register is updated with the value in GPWD."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(GPWEW::_1)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Global Pin Write Data"]
            #[inline(always)]
            pub fn gpwd(&mut self) -> _GPWDW {
                _GPWDW { w: self }
            }
            #[doc = "Bits 16:31 - Global Pin Write Enable"]
            #[inline(always)]
            pub fn gpwe(&mut self) -> _GPWEW {
                _GPWEW { w: self }
            }
        }
    }
    #[doc = "Global Pin Control High Register"]
    pub struct GPCHR {
        register: VolatileCell<u32>,
    }
    #[doc = "Global Pin Control High Register"]
    pub mod gpchr {
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::GPCHR {
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
        }
        #[doc = r" Proxy"]
        pub struct _GPWDW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GPWDW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `GPWE`"]
        pub enum GPWEW {
            #[doc = "Corresponding Pin Control Register is not updated with the value in GPWD."]
            _0,
            #[doc = "Corresponding Pin Control Register is updated with the value in GPWD."]
            _1,
        }
        impl GPWEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u16 {
                match *self {
                    GPWEW::_0 => 0,
                    GPWEW::_1 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _GPWEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GPWEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: GPWEW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Corresponding Pin Control Register is not updated with the value in GPWD."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(GPWEW::_0)
            }
            #[doc = "Corresponding Pin Control Register is updated with the value in GPWD."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(GPWEW::_1)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Global Pin Write Data"]
            #[inline(always)]
            pub fn gpwd(&mut self) -> _GPWDW {
                _GPWDW { w: self }
            }
            #[doc = "Bits 16:31 - Global Pin Write Enable"]
            #[inline(always)]
            pub fn gpwe(&mut self) -> _GPWEW {
                _GPWEW { w: self }
            }
        }
    }
    #[doc = "Interrupt Status Flag Register"]
    pub struct ISFR {
        register: VolatileCell<u32>,
    }
    #[doc = "Interrupt Status Flag Register"]
    pub mod isfr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::ISFR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
            #[doc = r" Reserved"]
            _Reserved(u32),
        }
        impl ISFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                match *self {
                    ISFR::_0 => 0,
                    ISFR::_1 => 1,
                    ISFR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u32) -> ISFR {
                match value {
                    0 => ISFR::_0,
                    1 => ISFR::_1,
                    i => ISFR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u32 {
                match *self {
                    ISFW::_0 => 0,
                    ISFW::_1 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Digital Filter Enable Register"]
    pub struct DFER {
        register: VolatileCell<u32>,
    }
    #[doc = "Digital Filter Enable Register"]
    pub mod dfer {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::DFER {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DFE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DFER {
            #[doc = "Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero."]
            _0,
            #[doc = "Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
            #[doc = r" Reserved"]
            _Reserved(u32),
        }
        impl DFER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                match *self {
                    DFER::_0 => 0,
                    DFER::_1 => 1,
                    DFER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u32) -> DFER {
                match value {
                    0 => DFER::_0,
                    1 => DFER::_1,
                    i => DFER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DFER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DFER::_1
            }
        }
        #[doc = "Values that can be written to the field `DFE`"]
        pub enum DFEW {
            #[doc = "Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero."]
            _0,
            #[doc = "Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl DFEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u32 {
                match *self {
                    DFEW::_0 => 0,
                    DFEW::_1 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DFEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DFEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DFEW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DFEW::_0)
            }
            #[doc = "Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DFEW::_1)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Digital Filter Enable"]
            #[inline(always)]
            pub fn dfe(&self) -> DFER {
                DFER::_from({
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Digital Filter Enable"]
            #[inline(always)]
            pub fn dfe(&mut self) -> _DFEW {
                _DFEW { w: self }
            }
        }
    }
    #[doc = "Digital Filter Clock Register"]
    pub struct DFCR {
        register: VolatileCell<u32>,
    }
    #[doc = "Digital Filter Clock Register"]
    pub mod dfcr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::DFCR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CSR {
            #[doc = "Digital filters are clocked by the bus clock."]
            _0,
            #[doc = "Digital filters are clocked by the LPO clock."]
            _1,
        }
        impl CSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CSR::_0 => false,
                    CSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CSR {
                match value {
                    false => CSR::_0,
                    true => CSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CSR::_1
            }
        }
        #[doc = "Values that can be written to the field `CS`"]
        pub enum CSW {
            #[doc = "Digital filters are clocked by the bus clock."]
            _0,
            #[doc = "Digital filters are clocked by the LPO clock."]
            _1,
        }
        impl CSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CSW::_0 => false,
                    CSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Digital filters are clocked by the bus clock."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CSW::_0)
            }
            #[doc = "Digital filters are clocked by the LPO clock."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Clock Source"]
            #[inline(always)]
            pub fn cs(&self) -> CSR {
                CSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Clock Source"]
            #[inline(always)]
            pub fn cs(&mut self) -> _CSW {
                _CSW { w: self }
            }
        }
    }
    #[doc = "Digital Filter Width Register"]
    pub struct DFWR {
        register: VolatileCell<u32>,
    }
    #[doc = "Digital Filter Width Register"]
    pub mod dfwr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::DFWR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct FILTR {
            bits: u8,
        }
        impl FILTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _FILTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FILTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:4 - Filter Length"]
            #[inline(always)]
            pub fn filt(&self) -> FILTR {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                FILTR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:4 - Filter Length"]
            #[inline(always)]
            pub fn filt(&mut self) -> _FILTW {
                _FILTW { w: self }
            }
        }
    }
}
#[doc = "Pin Control and Interrupts"]
pub struct PORTA {
    register_block: porta::RegisterBlock,
}
impl Deref for PORTA {
    type Target = porta::RegisterBlock;
    fn deref(&self) -> &porta::RegisterBlock {
        &self.register_block
    }
}
#[doc = "Pin Control and Interrupts"]
pub const PORTB: Peripheral<PORTB> = unsafe { Peripheral::new(1074044928) };
#[doc = "Pin Control and Interrupts"]
pub mod portb {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - Pin Control Register n"]
        pub pcr0: PCR0,
        #[doc = "0x04 - Pin Control Register n"]
        pub pcr1: PCR1,
        #[doc = "0x08 - Pin Control Register n"]
        pub pcr2: PCR2,
        #[doc = "0x0c - Pin Control Register n"]
        pub pcr3: PCR3,
        #[doc = "0x10 - Pin Control Register n"]
        pub pcr4: PCR4,
        #[doc = "0x14 - Pin Control Register n"]
        pub pcr5: PCR5,
        #[doc = "0x18 - Pin Control Register n"]
        pub pcr6: PCR6,
        #[doc = "0x1c - Pin Control Register n"]
        pub pcr7: PCR7,
        #[doc = "0x20 - Pin Control Register n"]
        pub pcr8: PCR8,
        #[doc = "0x24 - Pin Control Register n"]
        pub pcr9: PCR9,
        #[doc = "0x28 - Pin Control Register n"]
        pub pcr10: PCR10,
        #[doc = "0x2c - Pin Control Register n"]
        pub pcr11: PCR11,
        #[doc = "0x30 - Pin Control Register n"]
        pub pcr12: PCR12,
        #[doc = "0x34 - Pin Control Register n"]
        pub pcr13: PCR13,
        #[doc = "0x38 - Pin Control Register n"]
        pub pcr14: PCR14,
        #[doc = "0x3c - Pin Control Register n"]
        pub pcr15: PCR15,
        #[doc = "0x40 - Pin Control Register n"]
        pub pcr16: PCR16,
        #[doc = "0x44 - Pin Control Register n"]
        pub pcr17: PCR17,
        #[doc = "0x48 - Pin Control Register n"]
        pub pcr18: PCR18,
        #[doc = "0x4c - Pin Control Register n"]
        pub pcr19: PCR19,
        #[doc = "0x50 - Pin Control Register n"]
        pub pcr20: PCR20,
        #[doc = "0x54 - Pin Control Register n"]
        pub pcr21: PCR21,
        #[doc = "0x58 - Pin Control Register n"]
        pub pcr22: PCR22,
        #[doc = "0x5c - Pin Control Register n"]
        pub pcr23: PCR23,
        #[doc = "0x60 - Pin Control Register n"]
        pub pcr24: PCR24,
        #[doc = "0x64 - Pin Control Register n"]
        pub pcr25: PCR25,
        #[doc = "0x68 - Pin Control Register n"]
        pub pcr26: PCR26,
        #[doc = "0x6c - Pin Control Register n"]
        pub pcr27: PCR27,
        #[doc = "0x70 - Pin Control Register n"]
        pub pcr28: PCR28,
        #[doc = "0x74 - Pin Control Register n"]
        pub pcr29: PCR29,
        #[doc = "0x78 - Pin Control Register n"]
        pub pcr30: PCR30,
        #[doc = "0x7c - Pin Control Register n"]
        pub pcr31: PCR31,
        #[doc = "0x80 - Global Pin Control Low Register"]
        pub gpclr: GPCLR,
        #[doc = "0x84 - Global Pin Control High Register"]
        pub gpchr: GPCHR,
        _reserved0: [u8; 24usize],
        #[doc = "0xa0 - Interrupt Status Flag Register"]
        pub isfr: ISFR,
        _reserved1: [u8; 28usize],
        #[doc = "0xc0 - Digital Filter Enable Register"]
        pub dfer: DFER,
        #[doc = "0xc4 - Digital Filter Clock Register"]
        pub dfcr: DFCR,
        #[doc = "0xc8 - Digital Filter Width Register"]
        pub dfwr: DFWR,
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR0 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR2 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR3 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr3 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR3 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR4 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr4 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR4 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `DSE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DSER {
            #[doc = "Low drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            _0,
            #[doc = "High drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            _1,
        }
        impl DSER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DSER::_0 => false,
                    DSER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DSER {
                match value {
                    false => DSER::_0,
                    true => DSER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DSER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DSER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DSE`"]
        pub enum DSEW {
            #[doc = "Low drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            _0,
            #[doc = "High drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            _1,
        }
        impl DSEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DSEW::_0 => false,
                    DSEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DSEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DSEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DSEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Low drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DSEW::_0)
            }
            #[doc = "High drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DSEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Drive Strength Enable"]
            #[inline(always)]
            pub fn dse(&self) -> DSER {
                DSER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bit 6 - Drive Strength Enable"]
            #[inline(always)]
            pub fn dse(&mut self) -> _DSEW {
                _DSEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR5 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr5 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR5 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `DSE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DSER {
            #[doc = "Low drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            _0,
            #[doc = "High drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            _1,
        }
        impl DSER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DSER::_0 => false,
                    DSER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DSER {
                match value {
                    false => DSER::_0,
                    true => DSER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DSER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DSER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DSE`"]
        pub enum DSEW {
            #[doc = "Low drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            _0,
            #[doc = "High drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            _1,
        }
        impl DSEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DSEW::_0 => false,
                    DSEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DSEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DSEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DSEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Low drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DSEW::_0)
            }
            #[doc = "High drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DSEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Drive Strength Enable"]
            #[inline(always)]
            pub fn dse(&self) -> DSER {
                DSER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bit 6 - Drive Strength Enable"]
            #[inline(always)]
            pub fn dse(&mut self) -> _DSEW {
                _DSEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR6 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr6 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR6 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR7 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr7 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR7 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR8 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr8 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR8 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR9 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr9 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR9 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR10 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr10 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR10 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR11 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr11 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR11 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR12 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr12 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR12 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR13 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr13 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR13 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR14 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr14 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR14 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR15 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr15 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR15 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR16 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr16 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR16 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR17 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr17 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR17 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR18 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr18 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR18 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR19 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr19 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR19 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR20 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr20 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR20 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR21 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr21 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR21 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR22 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr22 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR22 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR23 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr23 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR23 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR24 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr24 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR24 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR25 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr25 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR25 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR26 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr26 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR26 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR27 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr27 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR27 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR28 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr28 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR28 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR29 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr29 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR29 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR30 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr30 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR30 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR31 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr31 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR31 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Global Pin Control Low Register"]
    pub struct GPCLR {
        register: VolatileCell<u32>,
    }
    #[doc = "Global Pin Control Low Register"]
    pub mod gpclr {
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::GPCLR {
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
        }
        #[doc = r" Proxy"]
        pub struct _GPWDW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GPWDW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `GPWE`"]
        pub enum GPWEW {
            #[doc = "Corresponding Pin Control Register is not updated with the value in GPWD."]
            _0,
            #[doc = "Corresponding Pin Control Register is updated with the value in GPWD."]
            _1,
        }
        impl GPWEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u16 {
                match *self {
                    GPWEW::_0 => 0,
                    GPWEW::_1 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _GPWEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GPWEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: GPWEW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Corresponding Pin Control Register is not updated with the value in GPWD."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(GPWEW::_0)
            }
            #[doc = "Corresponding Pin Control Register is updated with the value in GPWD."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(GPWEW::_1)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Global Pin Write Data"]
            #[inline(always)]
            pub fn gpwd(&mut self) -> _GPWDW {
                _GPWDW { w: self }
            }
            #[doc = "Bits 16:31 - Global Pin Write Enable"]
            #[inline(always)]
            pub fn gpwe(&mut self) -> _GPWEW {
                _GPWEW { w: self }
            }
        }
    }
    #[doc = "Global Pin Control High Register"]
    pub struct GPCHR {
        register: VolatileCell<u32>,
    }
    #[doc = "Global Pin Control High Register"]
    pub mod gpchr {
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::GPCHR {
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
        }
        #[doc = r" Proxy"]
        pub struct _GPWDW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GPWDW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `GPWE`"]
        pub enum GPWEW {
            #[doc = "Corresponding Pin Control Register is not updated with the value in GPWD."]
            _0,
            #[doc = "Corresponding Pin Control Register is updated with the value in GPWD."]
            _1,
        }
        impl GPWEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u16 {
                match *self {
                    GPWEW::_0 => 0,
                    GPWEW::_1 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _GPWEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GPWEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: GPWEW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Corresponding Pin Control Register is not updated with the value in GPWD."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(GPWEW::_0)
            }
            #[doc = "Corresponding Pin Control Register is updated with the value in GPWD."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(GPWEW::_1)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Global Pin Write Data"]
            #[inline(always)]
            pub fn gpwd(&mut self) -> _GPWDW {
                _GPWDW { w: self }
            }
            #[doc = "Bits 16:31 - Global Pin Write Enable"]
            #[inline(always)]
            pub fn gpwe(&mut self) -> _GPWEW {
                _GPWEW { w: self }
            }
        }
    }
    #[doc = "Interrupt Status Flag Register"]
    pub struct ISFR {
        register: VolatileCell<u32>,
    }
    #[doc = "Interrupt Status Flag Register"]
    pub mod isfr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::ISFR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
            #[doc = r" Reserved"]
            _Reserved(u32),
        }
        impl ISFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                match *self {
                    ISFR::_0 => 0,
                    ISFR::_1 => 1,
                    ISFR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u32) -> ISFR {
                match value {
                    0 => ISFR::_0,
                    1 => ISFR::_1,
                    i => ISFR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u32 {
                match *self {
                    ISFW::_0 => 0,
                    ISFW::_1 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Digital Filter Enable Register"]
    pub struct DFER {
        register: VolatileCell<u32>,
    }
    #[doc = "Digital Filter Enable Register"]
    pub mod dfer {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::DFER {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DFE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DFER {
            #[doc = "Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero."]
            _0,
            #[doc = "Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
            #[doc = r" Reserved"]
            _Reserved(u32),
        }
        impl DFER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                match *self {
                    DFER::_0 => 0,
                    DFER::_1 => 1,
                    DFER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u32) -> DFER {
                match value {
                    0 => DFER::_0,
                    1 => DFER::_1,
                    i => DFER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DFER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DFER::_1
            }
        }
        #[doc = "Values that can be written to the field `DFE`"]
        pub enum DFEW {
            #[doc = "Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero."]
            _0,
            #[doc = "Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl DFEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u32 {
                match *self {
                    DFEW::_0 => 0,
                    DFEW::_1 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DFEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DFEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DFEW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DFEW::_0)
            }
            #[doc = "Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DFEW::_1)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Digital Filter Enable"]
            #[inline(always)]
            pub fn dfe(&self) -> DFER {
                DFER::_from({
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Digital Filter Enable"]
            #[inline(always)]
            pub fn dfe(&mut self) -> _DFEW {
                _DFEW { w: self }
            }
        }
    }
    #[doc = "Digital Filter Clock Register"]
    pub struct DFCR {
        register: VolatileCell<u32>,
    }
    #[doc = "Digital Filter Clock Register"]
    pub mod dfcr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::DFCR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CSR {
            #[doc = "Digital filters are clocked by the bus clock."]
            _0,
            #[doc = "Digital filters are clocked by the LPO clock."]
            _1,
        }
        impl CSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CSR::_0 => false,
                    CSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CSR {
                match value {
                    false => CSR::_0,
                    true => CSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CSR::_1
            }
        }
        #[doc = "Values that can be written to the field `CS`"]
        pub enum CSW {
            #[doc = "Digital filters are clocked by the bus clock."]
            _0,
            #[doc = "Digital filters are clocked by the LPO clock."]
            _1,
        }
        impl CSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CSW::_0 => false,
                    CSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Digital filters are clocked by the bus clock."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CSW::_0)
            }
            #[doc = "Digital filters are clocked by the LPO clock."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Clock Source"]
            #[inline(always)]
            pub fn cs(&self) -> CSR {
                CSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Clock Source"]
            #[inline(always)]
            pub fn cs(&mut self) -> _CSW {
                _CSW { w: self }
            }
        }
    }
    #[doc = "Digital Filter Width Register"]
    pub struct DFWR {
        register: VolatileCell<u32>,
    }
    #[doc = "Digital Filter Width Register"]
    pub mod dfwr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::DFWR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct FILTR {
            bits: u8,
        }
        impl FILTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _FILTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FILTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:4 - Filter Length"]
            #[inline(always)]
            pub fn filt(&self) -> FILTR {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                FILTR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:4 - Filter Length"]
            #[inline(always)]
            pub fn filt(&mut self) -> _FILTW {
                _FILTW { w: self }
            }
        }
    }
}
#[doc = "Pin Control and Interrupts"]
pub struct PORTB {
    register_block: portb::RegisterBlock,
}
impl Deref for PORTB {
    type Target = portb::RegisterBlock;
    fn deref(&self) -> &portb::RegisterBlock {
        &self.register_block
    }
}
#[doc = "Pin Control and Interrupts"]
pub const PORTC: Peripheral<PORTC> = unsafe { Peripheral::new(1074049024) };
#[doc = "Pin Control and Interrupts"]
pub mod portc {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - Pin Control Register n"]
        pub pcr0: PCR0,
        #[doc = "0x04 - Pin Control Register n"]
        pub pcr1: PCR1,
        #[doc = "0x08 - Pin Control Register n"]
        pub pcr2: PCR2,
        #[doc = "0x0c - Pin Control Register n"]
        pub pcr3: PCR3,
        #[doc = "0x10 - Pin Control Register n"]
        pub pcr4: PCR4,
        #[doc = "0x14 - Pin Control Register n"]
        pub pcr5: PCR5,
        #[doc = "0x18 - Pin Control Register n"]
        pub pcr6: PCR6,
        #[doc = "0x1c - Pin Control Register n"]
        pub pcr7: PCR7,
        #[doc = "0x20 - Pin Control Register n"]
        pub pcr8: PCR8,
        #[doc = "0x24 - Pin Control Register n"]
        pub pcr9: PCR9,
        #[doc = "0x28 - Pin Control Register n"]
        pub pcr10: PCR10,
        #[doc = "0x2c - Pin Control Register n"]
        pub pcr11: PCR11,
        #[doc = "0x30 - Pin Control Register n"]
        pub pcr12: PCR12,
        #[doc = "0x34 - Pin Control Register n"]
        pub pcr13: PCR13,
        #[doc = "0x38 - Pin Control Register n"]
        pub pcr14: PCR14,
        #[doc = "0x3c - Pin Control Register n"]
        pub pcr15: PCR15,
        #[doc = "0x40 - Pin Control Register n"]
        pub pcr16: PCR16,
        #[doc = "0x44 - Pin Control Register n"]
        pub pcr17: PCR17,
        #[doc = "0x48 - Pin Control Register n"]
        pub pcr18: PCR18,
        #[doc = "0x4c - Pin Control Register n"]
        pub pcr19: PCR19,
        #[doc = "0x50 - Pin Control Register n"]
        pub pcr20: PCR20,
        #[doc = "0x54 - Pin Control Register n"]
        pub pcr21: PCR21,
        #[doc = "0x58 - Pin Control Register n"]
        pub pcr22: PCR22,
        #[doc = "0x5c - Pin Control Register n"]
        pub pcr23: PCR23,
        #[doc = "0x60 - Pin Control Register n"]
        pub pcr24: PCR24,
        #[doc = "0x64 - Pin Control Register n"]
        pub pcr25: PCR25,
        #[doc = "0x68 - Pin Control Register n"]
        pub pcr26: PCR26,
        #[doc = "0x6c - Pin Control Register n"]
        pub pcr27: PCR27,
        #[doc = "0x70 - Pin Control Register n"]
        pub pcr28: PCR28,
        #[doc = "0x74 - Pin Control Register n"]
        pub pcr29: PCR29,
        #[doc = "0x78 - Pin Control Register n"]
        pub pcr30: PCR30,
        #[doc = "0x7c - Pin Control Register n"]
        pub pcr31: PCR31,
        #[doc = "0x80 - Global Pin Control Low Register"]
        pub gpclr: GPCLR,
        #[doc = "0x84 - Global Pin Control High Register"]
        pub gpchr: GPCHR,
        _reserved0: [u8; 24usize],
        #[doc = "0xa0 - Interrupt Status Flag Register"]
        pub isfr: ISFR,
        _reserved1: [u8; 28usize],
        #[doc = "0xc0 - Digital Filter Enable Register"]
        pub dfer: DFER,
        #[doc = "0xc4 - Digital Filter Clock Register"]
        pub dfcr: DFCR,
        #[doc = "0xc8 - Digital Filter Width Register"]
        pub dfwr: DFWR,
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR0 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR2 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR3 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr3 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR3 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR4 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr4 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR4 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 1792 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR5 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr5 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR5 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 1792 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR6 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr6 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR6 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR7 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr7 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR7 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR8 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr8 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR8 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR9 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr9 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR9 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR10 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr10 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR10 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR11 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr11 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR11 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR12 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr12 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR12 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR13 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr13 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR13 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR14 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr14 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR14 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR15 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr15 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR15 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR16 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr16 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR16 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR17 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr17 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR17 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR18 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr18 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR18 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR19 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr19 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR19 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR20 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr20 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR20 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR21 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr21 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR21 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR22 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr22 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR22 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR23 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr23 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR23 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR24 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr24 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR24 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR25 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr25 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR25 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR26 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr26 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR26 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR27 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr27 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR27 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR28 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr28 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR28 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR29 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr29 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR29 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR30 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr30 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR30 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR31 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr31 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR31 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Global Pin Control Low Register"]
    pub struct GPCLR {
        register: VolatileCell<u32>,
    }
    #[doc = "Global Pin Control Low Register"]
    pub mod gpclr {
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::GPCLR {
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
        }
        #[doc = r" Proxy"]
        pub struct _GPWDW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GPWDW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `GPWE`"]
        pub enum GPWEW {
            #[doc = "Corresponding Pin Control Register is not updated with the value in GPWD."]
            _0,
            #[doc = "Corresponding Pin Control Register is updated with the value in GPWD."]
            _1,
        }
        impl GPWEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u16 {
                match *self {
                    GPWEW::_0 => 0,
                    GPWEW::_1 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _GPWEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GPWEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: GPWEW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Corresponding Pin Control Register is not updated with the value in GPWD."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(GPWEW::_0)
            }
            #[doc = "Corresponding Pin Control Register is updated with the value in GPWD."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(GPWEW::_1)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Global Pin Write Data"]
            #[inline(always)]
            pub fn gpwd(&mut self) -> _GPWDW {
                _GPWDW { w: self }
            }
            #[doc = "Bits 16:31 - Global Pin Write Enable"]
            #[inline(always)]
            pub fn gpwe(&mut self) -> _GPWEW {
                _GPWEW { w: self }
            }
        }
    }
    #[doc = "Global Pin Control High Register"]
    pub struct GPCHR {
        register: VolatileCell<u32>,
    }
    #[doc = "Global Pin Control High Register"]
    pub mod gpchr {
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::GPCHR {
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
        }
        #[doc = r" Proxy"]
        pub struct _GPWDW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GPWDW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `GPWE`"]
        pub enum GPWEW {
            #[doc = "Corresponding Pin Control Register is not updated with the value in GPWD."]
            _0,
            #[doc = "Corresponding Pin Control Register is updated with the value in GPWD."]
            _1,
        }
        impl GPWEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u16 {
                match *self {
                    GPWEW::_0 => 0,
                    GPWEW::_1 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _GPWEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GPWEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: GPWEW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Corresponding Pin Control Register is not updated with the value in GPWD."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(GPWEW::_0)
            }
            #[doc = "Corresponding Pin Control Register is updated with the value in GPWD."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(GPWEW::_1)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Global Pin Write Data"]
            #[inline(always)]
            pub fn gpwd(&mut self) -> _GPWDW {
                _GPWDW { w: self }
            }
            #[doc = "Bits 16:31 - Global Pin Write Enable"]
            #[inline(always)]
            pub fn gpwe(&mut self) -> _GPWEW {
                _GPWEW { w: self }
            }
        }
    }
    #[doc = "Interrupt Status Flag Register"]
    pub struct ISFR {
        register: VolatileCell<u32>,
    }
    #[doc = "Interrupt Status Flag Register"]
    pub mod isfr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::ISFR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
            #[doc = r" Reserved"]
            _Reserved(u32),
        }
        impl ISFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                match *self {
                    ISFR::_0 => 0,
                    ISFR::_1 => 1,
                    ISFR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u32) -> ISFR {
                match value {
                    0 => ISFR::_0,
                    1 => ISFR::_1,
                    i => ISFR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u32 {
                match *self {
                    ISFW::_0 => 0,
                    ISFW::_1 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Digital Filter Enable Register"]
    pub struct DFER {
        register: VolatileCell<u32>,
    }
    #[doc = "Digital Filter Enable Register"]
    pub mod dfer {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::DFER {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DFE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DFER {
            #[doc = "Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero."]
            _0,
            #[doc = "Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
            #[doc = r" Reserved"]
            _Reserved(u32),
        }
        impl DFER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                match *self {
                    DFER::_0 => 0,
                    DFER::_1 => 1,
                    DFER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u32) -> DFER {
                match value {
                    0 => DFER::_0,
                    1 => DFER::_1,
                    i => DFER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DFER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DFER::_1
            }
        }
        #[doc = "Values that can be written to the field `DFE`"]
        pub enum DFEW {
            #[doc = "Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero."]
            _0,
            #[doc = "Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl DFEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u32 {
                match *self {
                    DFEW::_0 => 0,
                    DFEW::_1 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DFEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DFEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DFEW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DFEW::_0)
            }
            #[doc = "Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DFEW::_1)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Digital Filter Enable"]
            #[inline(always)]
            pub fn dfe(&self) -> DFER {
                DFER::_from({
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Digital Filter Enable"]
            #[inline(always)]
            pub fn dfe(&mut self) -> _DFEW {
                _DFEW { w: self }
            }
        }
    }
    #[doc = "Digital Filter Clock Register"]
    pub struct DFCR {
        register: VolatileCell<u32>,
    }
    #[doc = "Digital Filter Clock Register"]
    pub mod dfcr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::DFCR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CSR {
            #[doc = "Digital filters are clocked by the bus clock."]
            _0,
            #[doc = "Digital filters are clocked by the LPO clock."]
            _1,
        }
        impl CSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CSR::_0 => false,
                    CSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CSR {
                match value {
                    false => CSR::_0,
                    true => CSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CSR::_1
            }
        }
        #[doc = "Values that can be written to the field `CS`"]
        pub enum CSW {
            #[doc = "Digital filters are clocked by the bus clock."]
            _0,
            #[doc = "Digital filters are clocked by the LPO clock."]
            _1,
        }
        impl CSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CSW::_0 => false,
                    CSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Digital filters are clocked by the bus clock."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CSW::_0)
            }
            #[doc = "Digital filters are clocked by the LPO clock."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Clock Source"]
            #[inline(always)]
            pub fn cs(&self) -> CSR {
                CSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Clock Source"]
            #[inline(always)]
            pub fn cs(&mut self) -> _CSW {
                _CSW { w: self }
            }
        }
    }
    #[doc = "Digital Filter Width Register"]
    pub struct DFWR {
        register: VolatileCell<u32>,
    }
    #[doc = "Digital Filter Width Register"]
    pub mod dfwr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::DFWR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct FILTR {
            bits: u8,
        }
        impl FILTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _FILTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FILTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:4 - Filter Length"]
            #[inline(always)]
            pub fn filt(&self) -> FILTR {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                FILTR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:4 - Filter Length"]
            #[inline(always)]
            pub fn filt(&mut self) -> _FILTW {
                _FILTW { w: self }
            }
        }
    }
}
#[doc = "Pin Control and Interrupts"]
pub struct PORTC {
    register_block: portc::RegisterBlock,
}
impl Deref for PORTC {
    type Target = portc::RegisterBlock;
    fn deref(&self) -> &portc::RegisterBlock {
        &self.register_block
    }
}
#[doc = "Pin Control and Interrupts"]
pub const PORTD: Peripheral<PORTD> = unsafe { Peripheral::new(1074053120) };
#[doc = "Pin Control and Interrupts"]
pub mod portd {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - Pin Control Register n"]
        pub pcr0: PCR0,
        #[doc = "0x04 - Pin Control Register n"]
        pub pcr1: PCR1,
        #[doc = "0x08 - Pin Control Register n"]
        pub pcr2: PCR2,
        #[doc = "0x0c - Pin Control Register n"]
        pub pcr3: PCR3,
        #[doc = "0x10 - Pin Control Register n"]
        pub pcr4: PCR4,
        #[doc = "0x14 - Pin Control Register n"]
        pub pcr5: PCR5,
        #[doc = "0x18 - Pin Control Register n"]
        pub pcr6: PCR6,
        #[doc = "0x1c - Pin Control Register n"]
        pub pcr7: PCR7,
        #[doc = "0x20 - Pin Control Register n"]
        pub pcr8: PCR8,
        #[doc = "0x24 - Pin Control Register n"]
        pub pcr9: PCR9,
        #[doc = "0x28 - Pin Control Register n"]
        pub pcr10: PCR10,
        #[doc = "0x2c - Pin Control Register n"]
        pub pcr11: PCR11,
        #[doc = "0x30 - Pin Control Register n"]
        pub pcr12: PCR12,
        #[doc = "0x34 - Pin Control Register n"]
        pub pcr13: PCR13,
        #[doc = "0x38 - Pin Control Register n"]
        pub pcr14: PCR14,
        #[doc = "0x3c - Pin Control Register n"]
        pub pcr15: PCR15,
        #[doc = "0x40 - Pin Control Register n"]
        pub pcr16: PCR16,
        #[doc = "0x44 - Pin Control Register n"]
        pub pcr17: PCR17,
        #[doc = "0x48 - Pin Control Register n"]
        pub pcr18: PCR18,
        #[doc = "0x4c - Pin Control Register n"]
        pub pcr19: PCR19,
        #[doc = "0x50 - Pin Control Register n"]
        pub pcr20: PCR20,
        #[doc = "0x54 - Pin Control Register n"]
        pub pcr21: PCR21,
        #[doc = "0x58 - Pin Control Register n"]
        pub pcr22: PCR22,
        #[doc = "0x5c - Pin Control Register n"]
        pub pcr23: PCR23,
        #[doc = "0x60 - Pin Control Register n"]
        pub pcr24: PCR24,
        #[doc = "0x64 - Pin Control Register n"]
        pub pcr25: PCR25,
        #[doc = "0x68 - Pin Control Register n"]
        pub pcr26: PCR26,
        #[doc = "0x6c - Pin Control Register n"]
        pub pcr27: PCR27,
        #[doc = "0x70 - Pin Control Register n"]
        pub pcr28: PCR28,
        #[doc = "0x74 - Pin Control Register n"]
        pub pcr29: PCR29,
        #[doc = "0x78 - Pin Control Register n"]
        pub pcr30: PCR30,
        #[doc = "0x7c - Pin Control Register n"]
        pub pcr31: PCR31,
        #[doc = "0x80 - Global Pin Control Low Register"]
        pub gpclr: GPCLR,
        #[doc = "0x84 - Global Pin Control High Register"]
        pub gpchr: GPCHR,
        _reserved0: [u8; 24usize],
        #[doc = "0xa0 - Interrupt Status Flag Register"]
        pub isfr: ISFR,
        _reserved1: [u8; 28usize],
        #[doc = "0xc0 - Digital Filter Enable Register"]
        pub dfer: DFER,
        #[doc = "0xc4 - Digital Filter Clock Register"]
        pub dfcr: DFCR,
        #[doc = "0xc8 - Digital Filter Width Register"]
        pub dfwr: DFWR,
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR0 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `DSE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DSER {
            #[doc = "Low drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            _0,
            #[doc = "High drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            _1,
        }
        impl DSER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DSER::_0 => false,
                    DSER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DSER {
                match value {
                    false => DSER::_0,
                    true => DSER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DSER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DSER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DSE`"]
        pub enum DSEW {
            #[doc = "Low drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            _0,
            #[doc = "High drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            _1,
        }
        impl DSEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DSEW::_0 => false,
                    DSEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DSEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DSEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DSEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Low drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DSEW::_0)
            }
            #[doc = "High drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DSEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Drive Strength Enable"]
            #[inline(always)]
            pub fn dse(&self) -> DSER {
                DSER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bit 6 - Drive Strength Enable"]
            #[inline(always)]
            pub fn dse(&mut self) -> _DSEW {
                _DSEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `DSE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DSER {
            #[doc = "Low drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            _0,
            #[doc = "High drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            _1,
        }
        impl DSER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DSER::_0 => false,
                    DSER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DSER {
                match value {
                    false => DSER::_0,
                    true => DSER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DSER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DSER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DSE`"]
        pub enum DSEW {
            #[doc = "Low drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            _0,
            #[doc = "High drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            _1,
        }
        impl DSEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DSEW::_0 => false,
                    DSEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DSEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DSEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DSEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Low drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DSEW::_0)
            }
            #[doc = "High drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DSEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Drive Strength Enable"]
            #[inline(always)]
            pub fn dse(&self) -> DSER {
                DSER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bit 6 - Drive Strength Enable"]
            #[inline(always)]
            pub fn dse(&mut self) -> _DSEW {
                _DSEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR2 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR3 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr3 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR3 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `PFE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PFER {
            #[doc = "Passive input filter is disabled on the corresponding pin."]
            _0,
            #[doc = "Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics."]
            _1,
        }
        impl PFER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PFER::_0 => false,
                    PFER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PFER {
                match value {
                    false => PFER::_0,
                    true => PFER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PFER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PFER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PFE`"]
        pub enum PFEW {
            #[doc = "Passive input filter is disabled on the corresponding pin."]
            _0,
            #[doc = "Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics."]
            _1,
        }
        impl PFEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PFEW::_0 => false,
                    PFEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PFEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PFEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PFEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Passive input filter is disabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PFEW::_0)
            }
            #[doc = "Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PFEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Passive Filter Enable"]
            #[inline(always)]
            pub fn pfe(&self) -> PFER {
                PFER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bit 4 - Passive Filter Enable"]
            #[inline(always)]
            pub fn pfe(&mut self) -> _PFEW {
                _PFEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR4 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr4 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR4 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR5 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr5 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR5 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR6 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr6 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR6 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR7 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr7 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR7 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR8 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr8 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR8 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR9 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr9 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR9 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR10 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr10 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR10 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR11 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr11 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR11 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR12 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr12 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR12 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR13 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr13 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR13 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR14 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr14 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR14 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR15 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr15 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR15 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `DSE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DSER {
            #[doc = "Low drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            _0,
            #[doc = "High drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            _1,
        }
        impl DSER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DSER::_0 => false,
                    DSER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DSER {
                match value {
                    false => DSER::_0,
                    true => DSER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DSER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DSER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DSE`"]
        pub enum DSEW {
            #[doc = "Low drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            _0,
            #[doc = "High drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            _1,
        }
        impl DSEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DSEW::_0 => false,
                    DSEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DSEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DSEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DSEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Low drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DSEW::_0)
            }
            #[doc = "High drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DSEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Drive Strength Enable"]
            #[inline(always)]
            pub fn dse(&self) -> DSER {
                DSER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bit 6 - Drive Strength Enable"]
            #[inline(always)]
            pub fn dse(&mut self) -> _DSEW {
                _DSEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR16 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr16 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR16 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `DSE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DSER {
            #[doc = "Low drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            _0,
            #[doc = "High drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            _1,
        }
        impl DSER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DSER::_0 => false,
                    DSER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DSER {
                match value {
                    false => DSER::_0,
                    true => DSER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DSER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DSER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DSE`"]
        pub enum DSEW {
            #[doc = "Low drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            _0,
            #[doc = "High drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            _1,
        }
        impl DSEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DSEW::_0 => false,
                    DSEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DSEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DSEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DSEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Low drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DSEW::_0)
            }
            #[doc = "High drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DSEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Drive Strength Enable"]
            #[inline(always)]
            pub fn dse(&self) -> DSER {
                DSER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bit 6 - Drive Strength Enable"]
            #[inline(always)]
            pub fn dse(&mut self) -> _DSEW {
                _DSEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR17 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr17 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR17 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR18 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr18 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR18 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR19 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr19 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR19 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR20 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr20 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR20 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR21 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr21 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR21 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR22 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr22 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR22 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR23 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr23 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR23 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR24 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr24 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR24 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR25 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr25 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR25 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR26 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr26 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR26 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR27 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr27 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR27 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR28 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr28 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR28 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR29 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr29 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR29 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR30 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr30 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR30 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR31 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr31 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR31 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Global Pin Control Low Register"]
    pub struct GPCLR {
        register: VolatileCell<u32>,
    }
    #[doc = "Global Pin Control Low Register"]
    pub mod gpclr {
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::GPCLR {
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
        }
        #[doc = r" Proxy"]
        pub struct _GPWDW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GPWDW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `GPWE`"]
        pub enum GPWEW {
            #[doc = "Corresponding Pin Control Register is not updated with the value in GPWD."]
            _0,
            #[doc = "Corresponding Pin Control Register is updated with the value in GPWD."]
            _1,
        }
        impl GPWEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u16 {
                match *self {
                    GPWEW::_0 => 0,
                    GPWEW::_1 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _GPWEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GPWEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: GPWEW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Corresponding Pin Control Register is not updated with the value in GPWD."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(GPWEW::_0)
            }
            #[doc = "Corresponding Pin Control Register is updated with the value in GPWD."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(GPWEW::_1)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Global Pin Write Data"]
            #[inline(always)]
            pub fn gpwd(&mut self) -> _GPWDW {
                _GPWDW { w: self }
            }
            #[doc = "Bits 16:31 - Global Pin Write Enable"]
            #[inline(always)]
            pub fn gpwe(&mut self) -> _GPWEW {
                _GPWEW { w: self }
            }
        }
    }
    #[doc = "Global Pin Control High Register"]
    pub struct GPCHR {
        register: VolatileCell<u32>,
    }
    #[doc = "Global Pin Control High Register"]
    pub mod gpchr {
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::GPCHR {
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
        }
        #[doc = r" Proxy"]
        pub struct _GPWDW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GPWDW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `GPWE`"]
        pub enum GPWEW {
            #[doc = "Corresponding Pin Control Register is not updated with the value in GPWD."]
            _0,
            #[doc = "Corresponding Pin Control Register is updated with the value in GPWD."]
            _1,
        }
        impl GPWEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u16 {
                match *self {
                    GPWEW::_0 => 0,
                    GPWEW::_1 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _GPWEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GPWEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: GPWEW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Corresponding Pin Control Register is not updated with the value in GPWD."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(GPWEW::_0)
            }
            #[doc = "Corresponding Pin Control Register is updated with the value in GPWD."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(GPWEW::_1)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Global Pin Write Data"]
            #[inline(always)]
            pub fn gpwd(&mut self) -> _GPWDW {
                _GPWDW { w: self }
            }
            #[doc = "Bits 16:31 - Global Pin Write Enable"]
            #[inline(always)]
            pub fn gpwe(&mut self) -> _GPWEW {
                _GPWEW { w: self }
            }
        }
    }
    #[doc = "Interrupt Status Flag Register"]
    pub struct ISFR {
        register: VolatileCell<u32>,
    }
    #[doc = "Interrupt Status Flag Register"]
    pub mod isfr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::ISFR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
            #[doc = r" Reserved"]
            _Reserved(u32),
        }
        impl ISFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                match *self {
                    ISFR::_0 => 0,
                    ISFR::_1 => 1,
                    ISFR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u32) -> ISFR {
                match value {
                    0 => ISFR::_0,
                    1 => ISFR::_1,
                    i => ISFR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u32 {
                match *self {
                    ISFW::_0 => 0,
                    ISFW::_1 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Digital Filter Enable Register"]
    pub struct DFER {
        register: VolatileCell<u32>,
    }
    #[doc = "Digital Filter Enable Register"]
    pub mod dfer {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::DFER {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DFE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DFER {
            #[doc = "Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero."]
            _0,
            #[doc = "Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
            #[doc = r" Reserved"]
            _Reserved(u32),
        }
        impl DFER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                match *self {
                    DFER::_0 => 0,
                    DFER::_1 => 1,
                    DFER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u32) -> DFER {
                match value {
                    0 => DFER::_0,
                    1 => DFER::_1,
                    i => DFER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DFER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DFER::_1
            }
        }
        #[doc = "Values that can be written to the field `DFE`"]
        pub enum DFEW {
            #[doc = "Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero."]
            _0,
            #[doc = "Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl DFEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u32 {
                match *self {
                    DFEW::_0 => 0,
                    DFEW::_1 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DFEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DFEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DFEW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DFEW::_0)
            }
            #[doc = "Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DFEW::_1)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Digital Filter Enable"]
            #[inline(always)]
            pub fn dfe(&self) -> DFER {
                DFER::_from({
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Digital Filter Enable"]
            #[inline(always)]
            pub fn dfe(&mut self) -> _DFEW {
                _DFEW { w: self }
            }
        }
    }
    #[doc = "Digital Filter Clock Register"]
    pub struct DFCR {
        register: VolatileCell<u32>,
    }
    #[doc = "Digital Filter Clock Register"]
    pub mod dfcr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::DFCR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CSR {
            #[doc = "Digital filters are clocked by the bus clock."]
            _0,
            #[doc = "Digital filters are clocked by the LPO clock."]
            _1,
        }
        impl CSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CSR::_0 => false,
                    CSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CSR {
                match value {
                    false => CSR::_0,
                    true => CSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CSR::_1
            }
        }
        #[doc = "Values that can be written to the field `CS`"]
        pub enum CSW {
            #[doc = "Digital filters are clocked by the bus clock."]
            _0,
            #[doc = "Digital filters are clocked by the LPO clock."]
            _1,
        }
        impl CSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CSW::_0 => false,
                    CSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Digital filters are clocked by the bus clock."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CSW::_0)
            }
            #[doc = "Digital filters are clocked by the LPO clock."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Clock Source"]
            #[inline(always)]
            pub fn cs(&self) -> CSR {
                CSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Clock Source"]
            #[inline(always)]
            pub fn cs(&mut self) -> _CSW {
                _CSW { w: self }
            }
        }
    }
    #[doc = "Digital Filter Width Register"]
    pub struct DFWR {
        register: VolatileCell<u32>,
    }
    #[doc = "Digital Filter Width Register"]
    pub mod dfwr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::DFWR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct FILTR {
            bits: u8,
        }
        impl FILTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _FILTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FILTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:4 - Filter Length"]
            #[inline(always)]
            pub fn filt(&self) -> FILTR {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                FILTR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:4 - Filter Length"]
            #[inline(always)]
            pub fn filt(&mut self) -> _FILTW {
                _FILTW { w: self }
            }
        }
    }
}
#[doc = "Pin Control and Interrupts"]
pub struct PORTD {
    register_block: portd::RegisterBlock,
}
impl Deref for PORTD {
    type Target = portd::RegisterBlock;
    fn deref(&self) -> &portd::RegisterBlock {
        &self.register_block
    }
}
#[doc = "Pin Control and Interrupts"]
pub const PORTE: Peripheral<PORTE> = unsafe { Peripheral::new(1074057216) };
#[doc = "Pin Control and Interrupts"]
pub mod porte {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - Pin Control Register n"]
        pub pcr0: PCR0,
        #[doc = "0x04 - Pin Control Register n"]
        pub pcr1: PCR1,
        #[doc = "0x08 - Pin Control Register n"]
        pub pcr2: PCR2,
        #[doc = "0x0c - Pin Control Register n"]
        pub pcr3: PCR3,
        #[doc = "0x10 - Pin Control Register n"]
        pub pcr4: PCR4,
        #[doc = "0x14 - Pin Control Register n"]
        pub pcr5: PCR5,
        #[doc = "0x18 - Pin Control Register n"]
        pub pcr6: PCR6,
        #[doc = "0x1c - Pin Control Register n"]
        pub pcr7: PCR7,
        #[doc = "0x20 - Pin Control Register n"]
        pub pcr8: PCR8,
        #[doc = "0x24 - Pin Control Register n"]
        pub pcr9: PCR9,
        #[doc = "0x28 - Pin Control Register n"]
        pub pcr10: PCR10,
        #[doc = "0x2c - Pin Control Register n"]
        pub pcr11: PCR11,
        #[doc = "0x30 - Pin Control Register n"]
        pub pcr12: PCR12,
        #[doc = "0x34 - Pin Control Register n"]
        pub pcr13: PCR13,
        #[doc = "0x38 - Pin Control Register n"]
        pub pcr14: PCR14,
        #[doc = "0x3c - Pin Control Register n"]
        pub pcr15: PCR15,
        #[doc = "0x40 - Pin Control Register n"]
        pub pcr16: PCR16,
        #[doc = "0x44 - Pin Control Register n"]
        pub pcr17: PCR17,
        #[doc = "0x48 - Pin Control Register n"]
        pub pcr18: PCR18,
        #[doc = "0x4c - Pin Control Register n"]
        pub pcr19: PCR19,
        #[doc = "0x50 - Pin Control Register n"]
        pub pcr20: PCR20,
        #[doc = "0x54 - Pin Control Register n"]
        pub pcr21: PCR21,
        #[doc = "0x58 - Pin Control Register n"]
        pub pcr22: PCR22,
        #[doc = "0x5c - Pin Control Register n"]
        pub pcr23: PCR23,
        #[doc = "0x60 - Pin Control Register n"]
        pub pcr24: PCR24,
        #[doc = "0x64 - Pin Control Register n"]
        pub pcr25: PCR25,
        #[doc = "0x68 - Pin Control Register n"]
        pub pcr26: PCR26,
        #[doc = "0x6c - Pin Control Register n"]
        pub pcr27: PCR27,
        #[doc = "0x70 - Pin Control Register n"]
        pub pcr28: PCR28,
        #[doc = "0x74 - Pin Control Register n"]
        pub pcr29: PCR29,
        #[doc = "0x78 - Pin Control Register n"]
        pub pcr30: PCR30,
        #[doc = "0x7c - Pin Control Register n"]
        pub pcr31: PCR31,
        #[doc = "0x80 - Global Pin Control Low Register"]
        pub gpclr: GPCLR,
        #[doc = "0x84 - Global Pin Control High Register"]
        pub gpchr: GPCHR,
        _reserved0: [u8; 24usize],
        #[doc = "0xa0 - Interrupt Status Flag Register"]
        pub isfr: ISFR,
        _reserved1: [u8; 28usize],
        #[doc = "0xc0 - Digital Filter Enable Register"]
        pub dfer: DFER,
        #[doc = "0xc4 - Digital Filter Clock Register"]
        pub dfcr: DFCR,
        #[doc = "0xc8 - Digital Filter Width Register"]
        pub dfwr: DFWR,
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR0 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `DSE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DSER {
            #[doc = "Low drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            _0,
            #[doc = "High drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            _1,
        }
        impl DSER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DSER::_0 => false,
                    DSER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DSER {
                match value {
                    false => DSER::_0,
                    true => DSER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DSER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DSER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DSE`"]
        pub enum DSEW {
            #[doc = "Low drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            _0,
            #[doc = "High drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            _1,
        }
        impl DSEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DSEW::_0 => false,
                    DSEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DSEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DSEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DSEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Low drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DSEW::_0)
            }
            #[doc = "High drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DSEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Drive Strength Enable"]
            #[inline(always)]
            pub fn dse(&self) -> DSER {
                DSER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bit 6 - Drive Strength Enable"]
            #[inline(always)]
            pub fn dse(&mut self) -> _DSEW {
                _DSEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `DSE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DSER {
            #[doc = "Low drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            _0,
            #[doc = "High drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            _1,
        }
        impl DSER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DSER::_0 => false,
                    DSER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DSER {
                match value {
                    false => DSER::_0,
                    true => DSER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DSER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DSER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DSE`"]
        pub enum DSEW {
            #[doc = "Low drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            _0,
            #[doc = "High drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            _1,
        }
        impl DSEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DSEW::_0 => false,
                    DSEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DSEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DSEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DSEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Low drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DSEW::_0)
            }
            #[doc = "High drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DSEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Drive Strength Enable"]
            #[inline(always)]
            pub fn dse(&self) -> DSER {
                DSER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bit 6 - Drive Strength Enable"]
            #[inline(always)]
            pub fn dse(&mut self) -> _DSEW {
                _DSEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR2 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR3 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr3 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR3 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR4 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr4 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR4 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR5 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr5 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR5 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR6 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr6 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR6 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR7 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr7 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR7 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR8 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr8 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR8 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR9 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr9 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR9 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR10 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr10 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR10 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR11 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr11 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR11 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR12 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr12 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR12 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR13 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr13 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR13 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR14 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr14 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR14 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR15 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr15 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR15 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR16 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr16 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR16 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR17 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr17 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR17 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR18 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr18 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR18 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR19 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr19 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR19 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR20 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr20 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR20 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR21 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr21 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR21 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR22 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr22 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR22 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR23 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr23 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR23 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR24 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr24 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR24 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR25 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr25 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR25 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR26 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr26 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR26 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR27 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr27 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR27 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR28 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr28 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR28 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR29 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr29 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR29 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR30 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr30 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR30 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Pin Control Register n"]
    pub struct PCR31 {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin Control Register n"]
    pub mod pcr31 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCR31 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSR {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PSR::_0 => false,
                    PSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PSR {
                match value {
                    false => PSR::_0,
                    true => PSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PSR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `MUX`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MUXR {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MUXR::_000 => 0,
                    MUXR::_001 => 1,
                    MUXR::_010 => 2,
                    MUXR::_011 => 3,
                    MUXR::_100 => 4,
                    MUXR::_101 => 5,
                    MUXR::_110 => 6,
                    MUXR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MUXR {
                match value {
                    0 => MUXR::_000,
                    1 => MUXR::_001,
                    2 => MUXR::_010,
                    3 => MUXR::_011,
                    4 => MUXR::_100,
                    5 => MUXR::_101,
                    6 => MUXR::_110,
                    7 => MUXR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MUXR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MUXR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MUXR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MUXR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MUXR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MUXR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MUXR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MUXR::_111
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `IRQC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRQCR {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl IRQCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IRQCR::_0000 => 0,
                    IRQCR::_0001 => 1,
                    IRQCR::_0010 => 2,
                    IRQCR::_0011 => 3,
                    IRQCR::_1000 => 8,
                    IRQCR::_1001 => 9,
                    IRQCR::_1010 => 10,
                    IRQCR::_1011 => 11,
                    IRQCR::_1100 => 12,
                    IRQCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IRQCR {
                match value {
                    0 => IRQCR::_0000,
                    1 => IRQCR::_0001,
                    2 => IRQCR::_0010,
                    3 => IRQCR::_0011,
                    8 => IRQCR::_1000,
                    9 => IRQCR::_1001,
                    10 => IRQCR::_1010,
                    11 => IRQCR::_1011,
                    12 => IRQCR::_1100,
                    i => IRQCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == IRQCR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == IRQCR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == IRQCR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == IRQCR::_0011
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == IRQCR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == IRQCR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == IRQCR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == IRQCR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == IRQCR::_1100
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ISFR::_0 => false,
                    ISFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ISFR {
                match value {
                    false => ISFR::_0,
                    true => ISFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `PS`"]
        pub enum PSW {
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _0,
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            _1,
        }
        impl PSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PSW::_0 => false,
                    PSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PSW::_0)
            }
            #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            _0,
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MUX`"]
        pub enum MUXW {
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            _000,
            #[doc = "Alternative 1 (GPIO)."]
            _001,
            #[doc = "Alternative 2 (chip-specific)."]
            _010,
            #[doc = "Alternative 3 (chip-specific)."]
            _011,
            #[doc = "Alternative 4 (chip-specific)."]
            _100,
            #[doc = "Alternative 5 (chip-specific)."]
            _101,
            #[doc = "Alternative 6 (chip-specific)."]
            _110,
            #[doc = "Alternative 7 (chip-specific)."]
            _111,
        }
        impl MUXW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MUXW::_000 => 0,
                    MUXW::_001 => 1,
                    MUXW::_010 => 2,
                    MUXW::_011 => 3,
                    MUXW::_100 => 4,
                    MUXW::_101 => 5,
                    MUXW::_110 => 6,
                    MUXW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MUXW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MUXW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MUXW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Pin disabled (Alternative 0) (analog)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MUXW::_000)
            }
            #[doc = "Alternative 1 (GPIO)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MUXW::_001)
            }
            #[doc = "Alternative 2 (chip-specific)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MUXW::_010)
            }
            #[doc = "Alternative 3 (chip-specific)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MUXW::_011)
            }
            #[doc = "Alternative 4 (chip-specific)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MUXW::_100)
            }
            #[doc = "Alternative 5 (chip-specific)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MUXW::_101)
            }
            #[doc = "Alternative 6 (chip-specific)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MUXW::_110)
            }
            #[doc = "Alternative 7 (chip-specific)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MUXW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            _0,
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Control Register fields [15:0] are not locked."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Pin Control Register fields [15:0] are locked and cannot be updated until the next system reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IRQC`"]
        pub enum IRQCW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            _0000,
            #[doc = "ISF flag and DMA request on rising edge."]
            _0001,
            #[doc = "ISF flag and DMA request on falling edge."]
            _0010,
            #[doc = "ISF flag and DMA request on either edge."]
            _0011,
            #[doc = "ISF flag and Interrupt when logic 0."]
            _1000,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            _1001,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            _1010,
            #[doc = "ISF flag and Interrupt on either edge."]
            _1011,
            #[doc = "ISF flag and Interrupt when logic 1."]
            _1100,
        }
        impl IRQCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IRQCW::_0000 => 0,
                    IRQCW::_0001 => 1,
                    IRQCW::_0010 => 2,
                    IRQCW::_0011 => 3,
                    IRQCW::_1000 => 8,
                    IRQCW::_1001 => 9,
                    IRQCW::_1010 => 10,
                    IRQCW::_1011 => 11,
                    IRQCW::_1100 => 12,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRQCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRQCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRQCW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(IRQCW::_0000)
            }
            #[doc = "ISF flag and DMA request on rising edge."]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(IRQCW::_0001)
            }
            #[doc = "ISF flag and DMA request on falling edge."]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(IRQCW::_0010)
            }
            #[doc = "ISF flag and DMA request on either edge."]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(IRQCW::_0011)
            }
            #[doc = "ISF flag and Interrupt when logic 0."]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(IRQCW::_1000)
            }
            #[doc = "ISF flag and Interrupt on rising-edge."]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(IRQCW::_1001)
            }
            #[doc = "ISF flag and Interrupt on falling-edge."]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(IRQCW::_1010)
            }
            #[doc = "ISF flag and Interrupt on either edge."]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(IRQCW::_1011)
            }
            #[doc = "ISF flag and Interrupt when logic 1."]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(IRQCW::_1100)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ISFW::_0 => false,
                    ISFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&self) -> PSR {
                PSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&self) -> MUXR {
                MUXR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&self) -> IRQCR {
                IRQCR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Pull Select"]
            #[inline(always)]
            pub fn ps(&mut self) -> _PSW {
                _PSW { w: self }
            }
            #[doc = "Bit 1 - Pull Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bits 8:10 - Pin Mux Control"]
            #[inline(always)]
            pub fn mux(&mut self) -> _MUXW {
                _MUXW { w: self }
            }
            #[doc = "Bit 15 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bits 16:19 - Interrupt Configuration"]
            #[inline(always)]
            pub fn irqc(&mut self) -> _IRQCW {
                _IRQCW { w: self }
            }
            #[doc = "Bit 24 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Global Pin Control Low Register"]
    pub struct GPCLR {
        register: VolatileCell<u32>,
    }
    #[doc = "Global Pin Control Low Register"]
    pub mod gpclr {
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::GPCLR {
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
        }
        #[doc = r" Proxy"]
        pub struct _GPWDW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GPWDW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `GPWE`"]
        pub enum GPWEW {
            #[doc = "Corresponding Pin Control Register is not updated with the value in GPWD."]
            _0,
            #[doc = "Corresponding Pin Control Register is updated with the value in GPWD."]
            _1,
        }
        impl GPWEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u16 {
                match *self {
                    GPWEW::_0 => 0,
                    GPWEW::_1 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _GPWEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GPWEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: GPWEW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Corresponding Pin Control Register is not updated with the value in GPWD."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(GPWEW::_0)
            }
            #[doc = "Corresponding Pin Control Register is updated with the value in GPWD."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(GPWEW::_1)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Global Pin Write Data"]
            #[inline(always)]
            pub fn gpwd(&mut self) -> _GPWDW {
                _GPWDW { w: self }
            }
            #[doc = "Bits 16:31 - Global Pin Write Enable"]
            #[inline(always)]
            pub fn gpwe(&mut self) -> _GPWEW {
                _GPWEW { w: self }
            }
        }
    }
    #[doc = "Global Pin Control High Register"]
    pub struct GPCHR {
        register: VolatileCell<u32>,
    }
    #[doc = "Global Pin Control High Register"]
    pub mod gpchr {
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::GPCHR {
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
        }
        #[doc = r" Proxy"]
        pub struct _GPWDW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GPWDW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `GPWE`"]
        pub enum GPWEW {
            #[doc = "Corresponding Pin Control Register is not updated with the value in GPWD."]
            _0,
            #[doc = "Corresponding Pin Control Register is updated with the value in GPWD."]
            _1,
        }
        impl GPWEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u16 {
                match *self {
                    GPWEW::_0 => 0,
                    GPWEW::_1 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _GPWEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GPWEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: GPWEW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Corresponding Pin Control Register is not updated with the value in GPWD."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(GPWEW::_0)
            }
            #[doc = "Corresponding Pin Control Register is updated with the value in GPWD."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(GPWEW::_1)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Global Pin Write Data"]
            #[inline(always)]
            pub fn gpwd(&mut self) -> _GPWDW {
                _GPWDW { w: self }
            }
            #[doc = "Bits 16:31 - Global Pin Write Enable"]
            #[inline(always)]
            pub fn gpwe(&mut self) -> _GPWEW {
                _GPWEW { w: self }
            }
        }
    }
    #[doc = "Interrupt Status Flag Register"]
    pub struct ISFR {
        register: VolatileCell<u32>,
    }
    #[doc = "Interrupt Status Flag Register"]
    pub mod isfr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::ISFR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `ISF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ISFR {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
            #[doc = r" Reserved"]
            _Reserved(u32),
        }
        impl ISFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                match *self {
                    ISFR::_0 => 0,
                    ISFR::_1 => 1,
                    ISFR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u32) -> ISFR {
                match value {
                    0 => ISFR::_0,
                    1 => ISFR::_1,
                    i => ISFR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ISFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ISFR::_1
            }
        }
        #[doc = "Values that can be written to the field `ISF`"]
        pub enum ISFW {
            #[doc = "Configured interrupt is not detected."]
            _0,
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            _1,
        }
        impl ISFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u32 {
                match *self {
                    ISFW::_0 => 0,
                    ISFW::_1 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ISFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ISFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ISFW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Configured interrupt is not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ISFW::_0)
            }
            #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic 1 is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ISFW::_1)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&self) -> ISFR {
                ISFR::_from({
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Interrupt Status Flag"]
            #[inline(always)]
            pub fn isf(&mut self) -> _ISFW {
                _ISFW { w: self }
            }
        }
    }
    #[doc = "Digital Filter Enable Register"]
    pub struct DFER {
        register: VolatileCell<u32>,
    }
    #[doc = "Digital Filter Enable Register"]
    pub mod dfer {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::DFER {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DFE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DFER {
            #[doc = "Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero."]
            _0,
            #[doc = "Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
            #[doc = r" Reserved"]
            _Reserved(u32),
        }
        impl DFER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                match *self {
                    DFER::_0 => 0,
                    DFER::_1 => 1,
                    DFER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u32) -> DFER {
                match value {
                    0 => DFER::_0,
                    1 => DFER::_1,
                    i => DFER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DFER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DFER::_1
            }
        }
        #[doc = "Values that can be written to the field `DFE`"]
        pub enum DFEW {
            #[doc = "Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero."]
            _0,
            #[doc = "Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input."]
            _1,
        }
        impl DFEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u32 {
                match *self {
                    DFEW::_0 => 0,
                    DFEW::_1 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DFEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DFEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DFEW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Digital filter is disabled on the corresponding pin and output of the digital filter is reset to zero."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DFEW::_0)
            }
            #[doc = "Digital filter is enabled on the corresponding pin, if the pin is configured as a digital input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DFEW::_1)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Digital Filter Enable"]
            #[inline(always)]
            pub fn dfe(&self) -> DFER {
                DFER::_from({
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Digital Filter Enable"]
            #[inline(always)]
            pub fn dfe(&mut self) -> _DFEW {
                _DFEW { w: self }
            }
        }
    }
    #[doc = "Digital Filter Clock Register"]
    pub struct DFCR {
        register: VolatileCell<u32>,
    }
    #[doc = "Digital Filter Clock Register"]
    pub mod dfcr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::DFCR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CSR {
            #[doc = "Digital filters are clocked by the bus clock."]
            _0,
            #[doc = "Digital filters are clocked by the LPO clock."]
            _1,
        }
        impl CSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CSR::_0 => false,
                    CSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CSR {
                match value {
                    false => CSR::_0,
                    true => CSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CSR::_1
            }
        }
        #[doc = "Values that can be written to the field `CS`"]
        pub enum CSW {
            #[doc = "Digital filters are clocked by the bus clock."]
            _0,
            #[doc = "Digital filters are clocked by the LPO clock."]
            _1,
        }
        impl CSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CSW::_0 => false,
                    CSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Digital filters are clocked by the bus clock."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CSW::_0)
            }
            #[doc = "Digital filters are clocked by the LPO clock."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Clock Source"]
            #[inline(always)]
            pub fn cs(&self) -> CSR {
                CSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Clock Source"]
            #[inline(always)]
            pub fn cs(&mut self) -> _CSW {
                _CSW { w: self }
            }
        }
    }
    #[doc = "Digital Filter Width Register"]
    pub struct DFWR {
        register: VolatileCell<u32>,
    }
    #[doc = "Digital Filter Width Register"]
    pub mod dfwr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::DFWR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct FILTR {
            bits: u8,
        }
        impl FILTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _FILTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FILTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:4 - Filter Length"]
            #[inline(always)]
            pub fn filt(&self) -> FILTR {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                FILTR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:4 - Filter Length"]
            #[inline(always)]
            pub fn filt(&mut self) -> _FILTW {
                _FILTW { w: self }
            }
        }
    }
}
#[doc = "Pin Control and Interrupts"]
pub struct PORTE {
    register_block: porte::RegisterBlock,
}
impl Deref for PORTE {
    type Target = porte::RegisterBlock;
    fn deref(&self) -> &porte::RegisterBlock {
        &self.register_block
    }
}
#[doc = "Watchdog timer"]
pub const WDOG: Peripheral<WDOG> = unsafe { Peripheral::new(1074077696) };
#[doc = "Watchdog timer"]
pub mod wdog {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - Watchdog Control and Status Register"]
        pub cs: CS,
        #[doc = "0x04 - Watchdog Counter Register"]
        pub cnt: CNT,
        #[doc = "0x08 - Watchdog Timeout Value Register"]
        pub toval: TOVAL,
        #[doc = "0x0c - Watchdog Window Register"]
        pub win: WIN,
    }
    #[doc = "Watchdog Control and Status Register"]
    pub struct CS {
        register: VolatileCell<u32>,
    }
    #[doc = "Watchdog Control and Status Register"]
    pub mod cs {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CS {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `STOP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum STOPR {
            #[doc = "Watchdog disabled in chip stop mode."]
            _0,
            #[doc = "Watchdog enabled in chip stop mode."]
            _1,
        }
        impl STOPR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    STOPR::_0 => false,
                    STOPR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> STOPR {
                match value {
                    false => STOPR::_0,
                    true => STOPR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == STOPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == STOPR::_1
            }
        }
        #[doc = "Possible values of the field `WAIT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WAITR {
            #[doc = "Watchdog disabled in chip wait mode."]
            _0,
            #[doc = "Watchdog enabled in chip wait mode."]
            _1,
        }
        impl WAITR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WAITR::_0 => false,
                    WAITR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WAITR {
                match value {
                    false => WAITR::_0,
                    true => WAITR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WAITR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WAITR::_1
            }
        }
        #[doc = "Possible values of the field `DBG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DBGR {
            #[doc = "Watchdog disabled in chip debug mode."]
            _0,
            #[doc = "Watchdog enabled in chip debug mode."]
            _1,
        }
        impl DBGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DBGR::_0 => false,
                    DBGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DBGR {
                match value {
                    false => DBGR::_0,
                    true => DBGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DBGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DBGR::_1
            }
        }
        #[doc = "Possible values of the field `TST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TSTR {
            #[doc = "Watchdog test mode disabled."]
            _00,
            #[doc = "Watchdog user mode enabled. (Watchdog test mode disabled.) After testing the watchdog, software should use this setting to indicate that the watchdog is functioning normally in user mode."]
            _01,
            #[doc = "Watchdog test mode enabled, only the low byte is used. CNT[CNTLOW] is compared with TOVAL[TOVALLOW]."]
            _10,
            #[doc = "Watchdog test mode enabled, only the high byte is used. CNT[CNTHIGH] is compared with TOVAL[TOVALHIGH]."]
            _11,
        }
        impl TSTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TSTR::_00 => 0,
                    TSTR::_01 => 1,
                    TSTR::_10 => 2,
                    TSTR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TSTR {
                match value {
                    0 => TSTR::_00,
                    1 => TSTR::_01,
                    2 => TSTR::_10,
                    3 => TSTR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == TSTR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == TSTR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == TSTR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == TSTR::_11
            }
        }
        #[doc = "Possible values of the field `UPDATE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum UPDATER {
            #[doc = "Updates not allowed. After the initial configuration, the watchdog cannot be later modified without forcing a reset."]
            _0,
            #[doc = "Updates allowed. Software can modify the watchdog configuration registers within 8'd128 bus clocks after performing the unlock write sequence."]
            _1,
        }
        impl UPDATER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    UPDATER::_0 => false,
                    UPDATER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> UPDATER {
                match value {
                    false => UPDATER::_0,
                    true => UPDATER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == UPDATER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == UPDATER::_1
            }
        }
        #[doc = "Possible values of the field `INT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INTR {
            #[doc = "Watchdog interrupts are disabled. Watchdog resets are not delayed."]
            _0,
            #[doc = "Watchdog interrupts are enabled. Watchdog resets are delayed by 8'd128 bus clocks from the interrupt vector fetch."]
            _1,
        }
        impl INTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INTR::_0 => false,
                    INTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INTR {
                match value {
                    false => INTR::_0,
                    true => INTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INTR::_1
            }
        }
        #[doc = "Possible values of the field `EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ENR {
            #[doc = "Watchdog disabled."]
            _0,
            #[doc = "Watchdog enabled."]
            _1,
        }
        impl ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ENR::_0 => false,
                    ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ENR {
                match value {
                    false => ENR::_0,
                    true => ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ENR::_1
            }
        }
        #[doc = "Possible values of the field `CLK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CLKR {
            #[doc = "Bus clock"]
            _00,
            #[doc = "LPO clock"]
            _01,
            #[doc = "INTCLK (internal clock)"]
            _10,
            #[doc = "ERCLK (external reference clock)"]
            _11,
        }
        impl CLKR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    CLKR::_00 => 0,
                    CLKR::_01 => 1,
                    CLKR::_10 => 2,
                    CLKR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> CLKR {
                match value {
                    0 => CLKR::_00,
                    1 => CLKR::_01,
                    2 => CLKR::_10,
                    3 => CLKR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == CLKR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == CLKR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == CLKR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == CLKR::_11
            }
        }
        #[doc = "Possible values of the field `RCS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RCSR {
            #[doc = "Reconfiguring WDOG."]
            _0,
            #[doc = "Reconfiguration is successful."]
            _1,
        }
        impl RCSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RCSR::_0 => false,
                    RCSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RCSR {
                match value {
                    false => RCSR::_0,
                    true => RCSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RCSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RCSR::_1
            }
        }
        #[doc = "Possible values of the field `ULK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ULKR {
            #[doc = "WDOG is locked."]
            _0,
            #[doc = "WDOG is unlocked."]
            _1,
        }
        impl ULKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ULKR::_0 => false,
                    ULKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ULKR {
                match value {
                    false => ULKR::_0,
                    true => ULKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ULKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ULKR::_1
            }
        }
        #[doc = "Possible values of the field `PRES`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PRESR {
            #[doc = "256 prescaler disabled."]
            _0,
            #[doc = "256 prescaler enabled."]
            _1,
        }
        impl PRESR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PRESR::_0 => false,
                    PRESR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PRESR {
                match value {
                    false => PRESR::_0,
                    true => PRESR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PRESR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PRESR::_1
            }
        }
        #[doc = "Possible values of the field `CMD32EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CMD32ENR {
            #[doc = "Disables support for 32-bit refresh/unlock command write words. Only 16-bit or 8-bit is supported."]
            _0,
            #[doc = "Enables support for 32-bit refresh/unlock command write words. 16-bit or 8-bit is NOT supported."]
            _1,
        }
        impl CMD32ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CMD32ENR::_0 => false,
                    CMD32ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CMD32ENR {
                match value {
                    false => CMD32ENR::_0,
                    true => CMD32ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CMD32ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CMD32ENR::_1
            }
        }
        #[doc = "Possible values of the field `FLG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FLGR {
            #[doc = "No interrupt occurred."]
            _0,
            #[doc = "An interrupt occurred."]
            _1,
        }
        impl FLGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FLGR::_0 => false,
                    FLGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FLGR {
                match value {
                    false => FLGR::_0,
                    true => FLGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FLGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FLGR::_1
            }
        }
        #[doc = "Possible values of the field `WIN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WINR {
            #[doc = "Window mode disabled."]
            _0,
            #[doc = "Window mode enabled."]
            _1,
        }
        impl WINR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WINR::_0 => false,
                    WINR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WINR {
                match value {
                    false => WINR::_0,
                    true => WINR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WINR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WINR::_1
            }
        }
        #[doc = "Values that can be written to the field `STOP`"]
        pub enum STOPW {
            #[doc = "Watchdog disabled in chip stop mode."]
            _0,
            #[doc = "Watchdog enabled in chip stop mode."]
            _1,
        }
        impl STOPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    STOPW::_0 => false,
                    STOPW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _STOPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _STOPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: STOPW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Watchdog disabled in chip stop mode."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(STOPW::_0)
            }
            #[doc = "Watchdog enabled in chip stop mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(STOPW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WAIT`"]
        pub enum WAITW {
            #[doc = "Watchdog disabled in chip wait mode."]
            _0,
            #[doc = "Watchdog enabled in chip wait mode."]
            _1,
        }
        impl WAITW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WAITW::_0 => false,
                    WAITW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WAITW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WAITW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WAITW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Watchdog disabled in chip wait mode."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WAITW::_0)
            }
            #[doc = "Watchdog enabled in chip wait mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WAITW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DBG`"]
        pub enum DBGW {
            #[doc = "Watchdog disabled in chip debug mode."]
            _0,
            #[doc = "Watchdog enabled in chip debug mode."]
            _1,
        }
        impl DBGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DBGW::_0 => false,
                    DBGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DBGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DBGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DBGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Watchdog disabled in chip debug mode."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DBGW::_0)
            }
            #[doc = "Watchdog enabled in chip debug mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DBGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TST`"]
        pub enum TSTW {
            #[doc = "Watchdog test mode disabled."]
            _00,
            #[doc = "Watchdog user mode enabled. (Watchdog test mode disabled.) After testing the watchdog, software should use this setting to indicate that the watchdog is functioning normally in user mode."]
            _01,
            #[doc = "Watchdog test mode enabled, only the low byte is used. CNT[CNTLOW] is compared with TOVAL[TOVALLOW]."]
            _10,
            #[doc = "Watchdog test mode enabled, only the high byte is used. CNT[CNTHIGH] is compared with TOVAL[TOVALHIGH]."]
            _11,
        }
        impl TSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TSTW::_00 => 0,
                    TSTW::_01 => 1,
                    TSTW::_10 => 2,
                    TSTW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TSTW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Watchdog test mode disabled."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(TSTW::_00)
            }
            #[doc = "Watchdog user mode enabled. (Watchdog test mode disabled.) After testing the watchdog, software should use this setting to indicate that the watchdog is functioning normally in user mode."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(TSTW::_01)
            }
            #[doc = "Watchdog test mode enabled, only the low byte is used. CNT[CNTLOW] is compared with TOVAL[TOVALLOW]."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(TSTW::_10)
            }
            #[doc = "Watchdog test mode enabled, only the high byte is used. CNT[CNTHIGH] is compared with TOVAL[TOVALHIGH]."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(TSTW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `UPDATE`"]
        pub enum UPDATEW {
            #[doc = "Updates not allowed. After the initial configuration, the watchdog cannot be later modified without forcing a reset."]
            _0,
            #[doc = "Updates allowed. Software can modify the watchdog configuration registers within 8'd128 bus clocks after performing the unlock write sequence."]
            _1,
        }
        impl UPDATEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    UPDATEW::_0 => false,
                    UPDATEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _UPDATEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _UPDATEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: UPDATEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Updates not allowed. After the initial configuration, the watchdog cannot be later modified without forcing a reset."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(UPDATEW::_0)
            }
            #[doc = "Updates allowed. Software can modify the watchdog configuration registers within 8'd128 bus clocks after performing the unlock write sequence."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(UPDATEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INT`"]
        pub enum INTW {
            #[doc = "Watchdog interrupts are disabled. Watchdog resets are not delayed."]
            _0,
            #[doc = "Watchdog interrupts are enabled. Watchdog resets are delayed by 8'd128 bus clocks from the interrupt vector fetch."]
            _1,
        }
        impl INTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INTW::_0 => false,
                    INTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Watchdog interrupts are disabled. Watchdog resets are not delayed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INTW::_0)
            }
            #[doc = "Watchdog interrupts are enabled. Watchdog resets are delayed by 8'd128 bus clocks from the interrupt vector fetch."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `EN`"]
        pub enum ENW {
            #[doc = "Watchdog disabled."]
            _0,
            #[doc = "Watchdog enabled."]
            _1,
        }
        impl ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ENW::_0 => false,
                    ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Watchdog disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ENW::_0)
            }
            #[doc = "Watchdog enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CLK`"]
        pub enum CLKW {
            #[doc = "Bus clock"]
            _00,
            #[doc = "LPO clock"]
            _01,
            #[doc = "INTCLK (internal clock)"]
            _10,
            #[doc = "ERCLK (external reference clock)"]
            _11,
        }
        impl CLKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    CLKW::_00 => 0,
                    CLKW::_01 => 1,
                    CLKW::_10 => 2,
                    CLKW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CLKW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Bus clock"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(CLKW::_00)
            }
            #[doc = "LPO clock"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(CLKW::_01)
            }
            #[doc = "INTCLK (internal clock)"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(CLKW::_10)
            }
            #[doc = "ERCLK (external reference clock)"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(CLKW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PRES`"]
        pub enum PRESW {
            #[doc = "256 prescaler disabled."]
            _0,
            #[doc = "256 prescaler enabled."]
            _1,
        }
        impl PRESW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PRESW::_0 => false,
                    PRESW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PRESW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PRESW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PRESW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "256 prescaler disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PRESW::_0)
            }
            #[doc = "256 prescaler enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PRESW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CMD32EN`"]
        pub enum CMD32ENW {
            #[doc = "Disables support for 32-bit refresh/unlock command write words. Only 16-bit or 8-bit is supported."]
            _0,
            #[doc = "Enables support for 32-bit refresh/unlock command write words. 16-bit or 8-bit is NOT supported."]
            _1,
        }
        impl CMD32ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CMD32ENW::_0 => false,
                    CMD32ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CMD32ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CMD32ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CMD32ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disables support for 32-bit refresh/unlock command write words. Only 16-bit or 8-bit is supported."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CMD32ENW::_0)
            }
            #[doc = "Enables support for 32-bit refresh/unlock command write words. 16-bit or 8-bit is NOT supported."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CMD32ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FLG`"]
        pub enum FLGW {
            #[doc = "No interrupt occurred."]
            _0,
            #[doc = "An interrupt occurred."]
            _1,
        }
        impl FLGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FLGW::_0 => false,
                    FLGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FLGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FLGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FLGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No interrupt occurred."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FLGW::_0)
            }
            #[doc = "An interrupt occurred."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FLGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WIN`"]
        pub enum WINW {
            #[doc = "Window mode disabled."]
            _0,
            #[doc = "Window mode enabled."]
            _1,
        }
        impl WINW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WINW::_0 => false,
                    WINW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WINW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WINW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WINW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Window mode disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WINW::_0)
            }
            #[doc = "Window mode enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WINW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Stop Enable"]
            #[inline(always)]
            pub fn stop(&self) -> STOPR {
                STOPR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Wait Enable"]
            #[inline(always)]
            pub fn wait(&self) -> WAITR {
                WAITR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Debug Enable"]
            #[inline(always)]
            pub fn dbg(&self) -> DBGR {
                DBGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 3:4 - Watchdog Test"]
            #[inline(always)]
            pub fn tst(&self) -> TSTR {
                TSTR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 5 - Allow updates"]
            #[inline(always)]
            pub fn update(&self) -> UPDATER {
                UPDATER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Watchdog Interrupt"]
            #[inline(always)]
            pub fn int(&self) -> INTR {
                INTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Watchdog Enable"]
            #[inline(always)]
            pub fn en(&self) -> ENR {
                ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:9 - Watchdog Clock"]
            #[inline(always)]
            pub fn clk(&self) -> CLKR {
                CLKR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 10 - Reconfiguration Success"]
            #[inline(always)]
            pub fn rcs(&self) -> RCSR {
                RCSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 11 - Unlock status"]
            #[inline(always)]
            pub fn ulk(&self) -> ULKR {
                ULKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Watchdog prescaler"]
            #[inline(always)]
            pub fn pres(&self) -> PRESR {
                PRESR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Enables or disables WDOG support for 32-bit (otherwise 16-bit or 8-bit) refresh/unlock command write words"]
            #[inline(always)]
            pub fn cmd32en(&self) -> CMD32ENR {
                CMD32ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - Watchdog Interrupt Flag"]
            #[inline(always)]
            pub fn flg(&self) -> FLGR {
                FLGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - Watchdog Window"]
            #[inline(always)]
            pub fn win(&self) -> WINR {
                WINR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 10624 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Stop Enable"]
            #[inline(always)]
            pub fn stop(&mut self) -> _STOPW {
                _STOPW { w: self }
            }
            #[doc = "Bit 1 - Wait Enable"]
            #[inline(always)]
            pub fn wait(&mut self) -> _WAITW {
                _WAITW { w: self }
            }
            #[doc = "Bit 2 - Debug Enable"]
            #[inline(always)]
            pub fn dbg(&mut self) -> _DBGW {
                _DBGW { w: self }
            }
            #[doc = "Bits 3:4 - Watchdog Test"]
            #[inline(always)]
            pub fn tst(&mut self) -> _TSTW {
                _TSTW { w: self }
            }
            #[doc = "Bit 5 - Allow updates"]
            #[inline(always)]
            pub fn update(&mut self) -> _UPDATEW {
                _UPDATEW { w: self }
            }
            #[doc = "Bit 6 - Watchdog Interrupt"]
            #[inline(always)]
            pub fn int(&mut self) -> _INTW {
                _INTW { w: self }
            }
            #[doc = "Bit 7 - Watchdog Enable"]
            #[inline(always)]
            pub fn en(&mut self) -> _ENW {
                _ENW { w: self }
            }
            #[doc = "Bits 8:9 - Watchdog Clock"]
            #[inline(always)]
            pub fn clk(&mut self) -> _CLKW {
                _CLKW { w: self }
            }
            #[doc = "Bit 12 - Watchdog prescaler"]
            #[inline(always)]
            pub fn pres(&mut self) -> _PRESW {
                _PRESW { w: self }
            }
            #[doc = "Bit 13 - Enables or disables WDOG support for 32-bit (otherwise 16-bit or 8-bit) refresh/unlock command write words"]
            #[inline(always)]
            pub fn cmd32en(&mut self) -> _CMD32ENW {
                _CMD32ENW { w: self }
            }
            #[doc = "Bit 14 - Watchdog Interrupt Flag"]
            #[inline(always)]
            pub fn flg(&mut self) -> _FLGW {
                _FLGW { w: self }
            }
            #[doc = "Bit 15 - Watchdog Window"]
            #[inline(always)]
            pub fn win(&mut self) -> _WINW {
                _WINW { w: self }
            }
        }
    }
    #[doc = "Watchdog Counter Register"]
    pub struct CNT {
        register: VolatileCell<u32>,
    }
    #[doc = "Watchdog Counter Register"]
    pub mod cnt {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CNT {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CNTLOWR {
            bits: u8,
        }
        impl CNTLOWR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct CNTHIGHR {
            bits: u8,
        }
        impl CNTHIGHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CNTLOWW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CNTLOWW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CNTHIGHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CNTHIGHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Low byte of the Watchdog Counter"]
            #[inline(always)]
            pub fn cntlow(&self) -> CNTLOWR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CNTLOWR { bits }
            }
            #[doc = "Bits 8:15 - High byte of the Watchdog Counter"]
            #[inline(always)]
            pub fn cnthigh(&self) -> CNTHIGHR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CNTHIGHR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Low byte of the Watchdog Counter"]
            #[inline(always)]
            pub fn cntlow(&mut self) -> _CNTLOWW {
                _CNTLOWW { w: self }
            }
            #[doc = "Bits 8:15 - High byte of the Watchdog Counter"]
            #[inline(always)]
            pub fn cnthigh(&mut self) -> _CNTHIGHW {
                _CNTHIGHW { w: self }
            }
        }
    }
    #[doc = "Watchdog Timeout Value Register"]
    pub struct TOVAL {
        register: VolatileCell<u32>,
    }
    #[doc = "Watchdog Timeout Value Register"]
    pub mod toval {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TOVAL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct TOVALLOWR {
            bits: u8,
        }
        impl TOVALLOWR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct TOVALHIGHR {
            bits: u8,
        }
        impl TOVALHIGHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _TOVALLOWW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TOVALLOWW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _TOVALHIGHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TOVALHIGHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Low byte of the timeout value"]
            #[inline(always)]
            pub fn tovallow(&self) -> TOVALLOWR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TOVALLOWR { bits }
            }
            #[doc = "Bits 8:15 - High byte of the timeout value"]
            #[inline(always)]
            pub fn tovalhigh(&self) -> TOVALHIGHR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TOVALHIGHR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 1024 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Low byte of the timeout value"]
            #[inline(always)]
            pub fn tovallow(&mut self) -> _TOVALLOWW {
                _TOVALLOWW { w: self }
            }
            #[doc = "Bits 8:15 - High byte of the timeout value"]
            #[inline(always)]
            pub fn tovalhigh(&mut self) -> _TOVALHIGHW {
                _TOVALHIGHW { w: self }
            }
        }
    }
    #[doc = "Watchdog Window Register"]
    pub struct WIN {
        register: VolatileCell<u32>,
    }
    #[doc = "Watchdog Window Register"]
    pub mod win {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::WIN {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct WINLOWR {
            bits: u8,
        }
        impl WINLOWR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct WINHIGHR {
            bits: u8,
        }
        impl WINHIGHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _WINLOWW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WINLOWW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _WINHIGHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WINHIGHW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Low byte of Watchdog Window"]
            #[inline(always)]
            pub fn winlow(&self) -> WINLOWR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                WINLOWR { bits }
            }
            #[doc = "Bits 8:15 - High byte of Watchdog Window"]
            #[inline(always)]
            pub fn winhigh(&self) -> WINHIGHR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                WINHIGHR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Low byte of Watchdog Window"]
            #[inline(always)]
            pub fn winlow(&mut self) -> _WINLOWW {
                _WINLOWW { w: self }
            }
            #[doc = "Bits 8:15 - High byte of Watchdog Window"]
            #[inline(always)]
            pub fn winhigh(&mut self) -> _WINHIGHW {
                _WINHIGHW { w: self }
            }
        }
    }
}
#[doc = "Watchdog timer"]
pub struct WDOG {
    register_block: wdog::RegisterBlock,
}
impl Deref for WDOG {
    type Target = wdog::RegisterBlock;
    fn deref(&self) -> &wdog::RegisterBlock {
        &self.register_block
    }
}
#[doc = "The FLEXIO Memory Map/Register Definition can be found here."]
pub const FLEXIO: Peripheral<FLEXIO> = unsafe { Peripheral::new(1074110464) };
#[doc = "The FLEXIO Memory Map/Register Definition can be found here."]
pub mod flexio {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - Version ID Register"]
        pub verid: VERID,
        #[doc = "0x04 - Parameter Register"]
        pub param: PARAM,
        #[doc = "0x08 - FlexIO Control Register"]
        pub ctrl: CTRL,
        #[doc = "0x0c - Pin State Register"]
        pub pin: PIN,
        #[doc = "0x10 - Shifter Status Register"]
        pub shiftstat: SHIFTSTAT,
        #[doc = "0x14 - Shifter Error Register"]
        pub shifterr: SHIFTERR,
        #[doc = "0x18 - Timer Status Register"]
        pub timstat: TIMSTAT,
        _reserved0: [u8; 4usize],
        #[doc = "0x20 - Shifter Status Interrupt Enable"]
        pub shiftsien: SHIFTSIEN,
        #[doc = "0x24 - Shifter Error Interrupt Enable"]
        pub shifteien: SHIFTEIEN,
        #[doc = "0x28 - Timer Interrupt Enable Register"]
        pub timien: TIMIEN,
        _reserved1: [u8; 4usize],
        #[doc = "0x30 - Shifter Status DMA Enable"]
        pub shiftsden: SHIFTSDEN,
        _reserved2: [u8; 76usize],
        #[doc = "0x80 - Shifter Control N Register"]
        pub shiftctl0: SHIFTCTL0,
        #[doc = "0x84 - Shifter Control N Register"]
        pub shiftctl1: SHIFTCTL1,
        #[doc = "0x88 - Shifter Control N Register"]
        pub shiftctl2: SHIFTCTL2,
        #[doc = "0x8c - Shifter Control N Register"]
        pub shiftctl3: SHIFTCTL3,
        _reserved3: [u8; 112usize],
        #[doc = "0x100 - Shifter Configuration N Register"]
        pub shiftcfg0: SHIFTCFG0,
        #[doc = "0x104 - Shifter Configuration N Register"]
        pub shiftcfg1: SHIFTCFG1,
        #[doc = "0x108 - Shifter Configuration N Register"]
        pub shiftcfg2: SHIFTCFG2,
        #[doc = "0x10c - Shifter Configuration N Register"]
        pub shiftcfg3: SHIFTCFG3,
        _reserved4: [u8; 240usize],
        #[doc = "0x200 - Shifter Buffer N Register"]
        pub shiftbuf0: SHIFTBUF0,
        #[doc = "0x204 - Shifter Buffer N Register"]
        pub shiftbuf1: SHIFTBUF1,
        #[doc = "0x208 - Shifter Buffer N Register"]
        pub shiftbuf2: SHIFTBUF2,
        #[doc = "0x20c - Shifter Buffer N Register"]
        pub shiftbuf3: SHIFTBUF3,
        _reserved5: [u8; 112usize],
        #[doc = "0x280 - Shifter Buffer N Bit Swapped Register"]
        pub shiftbufbis0: SHIFTBUFBIS0,
        #[doc = "0x284 - Shifter Buffer N Bit Swapped Register"]
        pub shiftbufbis1: SHIFTBUFBIS1,
        #[doc = "0x288 - Shifter Buffer N Bit Swapped Register"]
        pub shiftbufbis2: SHIFTBUFBIS2,
        #[doc = "0x28c - Shifter Buffer N Bit Swapped Register"]
        pub shiftbufbis3: SHIFTBUFBIS3,
        _reserved6: [u8; 112usize],
        #[doc = "0x300 - Shifter Buffer N Byte Swapped Register"]
        pub shiftbufbys0: SHIFTBUFBYS0,
        #[doc = "0x304 - Shifter Buffer N Byte Swapped Register"]
        pub shiftbufbys1: SHIFTBUFBYS1,
        #[doc = "0x308 - Shifter Buffer N Byte Swapped Register"]
        pub shiftbufbys2: SHIFTBUFBYS2,
        #[doc = "0x30c - Shifter Buffer N Byte Swapped Register"]
        pub shiftbufbys3: SHIFTBUFBYS3,
        _reserved7: [u8; 112usize],
        #[doc = "0x380 - Shifter Buffer N Bit Byte Swapped Register"]
        pub shiftbufbbs0: SHIFTBUFBBS0,
        #[doc = "0x384 - Shifter Buffer N Bit Byte Swapped Register"]
        pub shiftbufbbs1: SHIFTBUFBBS1,
        #[doc = "0x388 - Shifter Buffer N Bit Byte Swapped Register"]
        pub shiftbufbbs2: SHIFTBUFBBS2,
        #[doc = "0x38c - Shifter Buffer N Bit Byte Swapped Register"]
        pub shiftbufbbs3: SHIFTBUFBBS3,
        _reserved8: [u8; 112usize],
        #[doc = "0x400 - Timer Control N Register"]
        pub timctl0: TIMCTL0,
        #[doc = "0x404 - Timer Control N Register"]
        pub timctl1: TIMCTL1,
        #[doc = "0x408 - Timer Control N Register"]
        pub timctl2: TIMCTL2,
        #[doc = "0x40c - Timer Control N Register"]
        pub timctl3: TIMCTL3,
        _reserved9: [u8; 112usize],
        #[doc = "0x480 - Timer Configuration N Register"]
        pub timcfg0: TIMCFG0,
        #[doc = "0x484 - Timer Configuration N Register"]
        pub timcfg1: TIMCFG1,
        #[doc = "0x488 - Timer Configuration N Register"]
        pub timcfg2: TIMCFG2,
        #[doc = "0x48c - Timer Configuration N Register"]
        pub timcfg3: TIMCFG3,
        _reserved10: [u8; 112usize],
        #[doc = "0x500 - Timer Compare N Register"]
        pub timcmp0: TIMCMP0,
        #[doc = "0x504 - Timer Compare N Register"]
        pub timcmp1: TIMCMP1,
        #[doc = "0x508 - Timer Compare N Register"]
        pub timcmp2: TIMCMP2,
        #[doc = "0x50c - Timer Compare N Register"]
        pub timcmp3: TIMCMP3,
    }
    #[doc = "Version ID Register"]
    pub struct VERID {
        register: VolatileCell<u32>,
    }
    #[doc = "Version ID Register"]
    pub mod verid {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::VERID {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = "Possible values of the field `FEATURE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FEATURER {
            #[doc = "Standard features implemented."]
            _0000000000000000,
            #[doc = "Supports state, logic and parallel modes."]
            _0000000000000001,
            #[doc = r" Reserved"]
            _Reserved(u16),
        }
        impl FEATURER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                match *self {
                    FEATURER::_0000000000000000 => 0,
                    FEATURER::_0000000000000001 => 1,
                    FEATURER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u16) -> FEATURER {
                match value {
                    0 => FEATURER::_0000000000000000,
                    1 => FEATURER::_0000000000000001,
                    i => FEATURER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000000000000000`"]
            #[inline(always)]
            pub fn is_0000000000000000(&self) -> bool {
                *self == FEATURER::_0000000000000000
            }
            #[doc = "Checks if the value of the field is `_0000000000000001`"]
            #[inline(always)]
            pub fn is_0000000000000001(&self) -> bool {
                *self == FEATURER::_0000000000000001
            }
        }
        #[doc = r" Value of the field"]
        pub struct MINORR {
            bits: u8,
        }
        impl MINORR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct MAJORR {
            bits: u8,
        }
        impl MAJORR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Feature Specification Number"]
            #[inline(always)]
            pub fn feature(&self) -> FEATURER {
                FEATURER::_from({
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                })
            }
            #[doc = "Bits 16:23 - Minor Version Number"]
            #[inline(always)]
            pub fn minor(&self) -> MINORR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                MINORR { bits }
            }
            #[doc = "Bits 24:31 - Major Version Number"]
            #[inline(always)]
            pub fn major(&self) -> MAJORR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                MAJORR { bits }
            }
        }
    }
    #[doc = "Parameter Register"]
    pub struct PARAM {
        register: VolatileCell<u32>,
    }
    #[doc = "Parameter Register"]
    pub mod param {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::PARAM {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct SHIFTERR {
            bits: u8,
        }
        impl SHIFTERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct TIMERR {
            bits: u8,
        }
        impl TIMERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct PINR {
            bits: u8,
        }
        impl PINR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct TRIGGERR {
            bits: u8,
        }
        impl TRIGGERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Shifter Number"]
            #[inline(always)]
            pub fn shifter(&self) -> SHIFTERR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SHIFTERR { bits }
            }
            #[doc = "Bits 8:15 - Timer Number"]
            #[inline(always)]
            pub fn timer(&self) -> TIMERR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TIMERR { bits }
            }
            #[doc = "Bits 16:23 - Pin Number"]
            #[inline(always)]
            pub fn pin(&self) -> PINR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                PINR { bits }
            }
            #[doc = "Bits 24:31 - Trigger Number"]
            #[inline(always)]
            pub fn trigger(&self) -> TRIGGERR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TRIGGERR { bits }
            }
        }
    }
    #[doc = "FlexIO Control Register"]
    pub struct CTRL {
        register: VolatileCell<u32>,
    }
    #[doc = "FlexIO Control Register"]
    pub mod ctrl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CTRL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `FLEXEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FLEXENR {
            #[doc = "FlexIO module is disabled."]
            _0,
            #[doc = "FlexIO module is enabled."]
            _1,
        }
        impl FLEXENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FLEXENR::_0 => false,
                    FLEXENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FLEXENR {
                match value {
                    false => FLEXENR::_0,
                    true => FLEXENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FLEXENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FLEXENR::_1
            }
        }
        #[doc = "Possible values of the field `SWRST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SWRSTR {
            #[doc = "Software reset is disabled"]
            _0,
            #[doc = "Software reset is enabled, all FlexIO registers except the Control Register are reset."]
            _1,
        }
        impl SWRSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SWRSTR::_0 => false,
                    SWRSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SWRSTR {
                match value {
                    false => SWRSTR::_0,
                    true => SWRSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SWRSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SWRSTR::_1
            }
        }
        #[doc = "Possible values of the field `FASTACC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FASTACCR {
            #[doc = "Configures for normal register accesses to FlexIO"]
            _0,
            #[doc = "Configures for fast register accesses to FlexIO"]
            _1,
        }
        impl FASTACCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FASTACCR::_0 => false,
                    FASTACCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FASTACCR {
                match value {
                    false => FASTACCR::_0,
                    true => FASTACCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FASTACCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FASTACCR::_1
            }
        }
        #[doc = "Possible values of the field `DBGE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DBGER {
            #[doc = "FlexIO is disabled in debug modes."]
            _0,
            #[doc = "FlexIO is enabled in debug modes"]
            _1,
        }
        impl DBGER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DBGER::_0 => false,
                    DBGER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DBGER {
                match value {
                    false => DBGER::_0,
                    true => DBGER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DBGER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DBGER::_1
            }
        }
        #[doc = "Possible values of the field `DOZEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DOZENR {
            #[doc = "FlexIO enabled in Doze modes."]
            _0,
            #[doc = "FlexIO disabled in Doze modes."]
            _1,
        }
        impl DOZENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DOZENR::_0 => false,
                    DOZENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DOZENR {
                match value {
                    false => DOZENR::_0,
                    true => DOZENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DOZENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DOZENR::_1
            }
        }
        #[doc = "Values that can be written to the field `FLEXEN`"]
        pub enum FLEXENW {
            #[doc = "FlexIO module is disabled."]
            _0,
            #[doc = "FlexIO module is enabled."]
            _1,
        }
        impl FLEXENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FLEXENW::_0 => false,
                    FLEXENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FLEXENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FLEXENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FLEXENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FlexIO module is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FLEXENW::_0)
            }
            #[doc = "FlexIO module is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FLEXENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SWRST`"]
        pub enum SWRSTW {
            #[doc = "Software reset is disabled"]
            _0,
            #[doc = "Software reset is enabled, all FlexIO registers except the Control Register are reset."]
            _1,
        }
        impl SWRSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SWRSTW::_0 => false,
                    SWRSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SWRSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SWRSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SWRSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Software reset is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SWRSTW::_0)
            }
            #[doc = "Software reset is enabled, all FlexIO registers except the Control Register are reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SWRSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FASTACC`"]
        pub enum FASTACCW {
            #[doc = "Configures for normal register accesses to FlexIO"]
            _0,
            #[doc = "Configures for fast register accesses to FlexIO"]
            _1,
        }
        impl FASTACCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FASTACCW::_0 => false,
                    FASTACCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FASTACCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FASTACCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FASTACCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configures for normal register accesses to FlexIO"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FASTACCW::_0)
            }
            #[doc = "Configures for fast register accesses to FlexIO"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FASTACCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DBGE`"]
        pub enum DBGEW {
            #[doc = "FlexIO is disabled in debug modes."]
            _0,
            #[doc = "FlexIO is enabled in debug modes"]
            _1,
        }
        impl DBGEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DBGEW::_0 => false,
                    DBGEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DBGEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DBGEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DBGEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FlexIO is disabled in debug modes."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DBGEW::_0)
            }
            #[doc = "FlexIO is enabled in debug modes"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DBGEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DOZEN`"]
        pub enum DOZENW {
            #[doc = "FlexIO enabled in Doze modes."]
            _0,
            #[doc = "FlexIO disabled in Doze modes."]
            _1,
        }
        impl DOZENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DOZENW::_0 => false,
                    DOZENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DOZENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DOZENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DOZENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FlexIO enabled in Doze modes."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DOZENW::_0)
            }
            #[doc = "FlexIO disabled in Doze modes."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DOZENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - FlexIO Enable"]
            #[inline(always)]
            pub fn flexen(&self) -> FLEXENR {
                FLEXENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Software Reset"]
            #[inline(always)]
            pub fn swrst(&self) -> SWRSTR {
                SWRSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Fast Access"]
            #[inline(always)]
            pub fn fastacc(&self) -> FASTACCR {
                FASTACCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 30 - Debug Enable"]
            #[inline(always)]
            pub fn dbge(&self) -> DBGER {
                DBGER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Doze Enable"]
            #[inline(always)]
            pub fn dozen(&self) -> DOZENR {
                DOZENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - FlexIO Enable"]
            #[inline(always)]
            pub fn flexen(&mut self) -> _FLEXENW {
                _FLEXENW { w: self }
            }
            #[doc = "Bit 1 - Software Reset"]
            #[inline(always)]
            pub fn swrst(&mut self) -> _SWRSTW {
                _SWRSTW { w: self }
            }
            #[doc = "Bit 2 - Fast Access"]
            #[inline(always)]
            pub fn fastacc(&mut self) -> _FASTACCW {
                _FASTACCW { w: self }
            }
            #[doc = "Bit 30 - Debug Enable"]
            #[inline(always)]
            pub fn dbge(&mut self) -> _DBGEW {
                _DBGEW { w: self }
            }
            #[doc = "Bit 31 - Doze Enable"]
            #[inline(always)]
            pub fn dozen(&mut self) -> _DOZENW {
                _DOZENW { w: self }
            }
        }
    }
    #[doc = "Pin State Register"]
    pub struct PIN {
        register: VolatileCell<u32>,
    }
    #[doc = "Pin State Register"]
    pub mod pin {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::PIN {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct PDIR {
            bits: u8,
        }
        impl PDIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Pin Data Input"]
            #[inline(always)]
            pub fn pdi(&self) -> PDIR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                PDIR { bits }
            }
        }
    }
    #[doc = "Shifter Status Register"]
    pub struct SHIFTSTAT {
        register: VolatileCell<u32>,
    }
    #[doc = "Shifter Status Register"]
    pub mod shiftstat {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SHIFTSTAT {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SSFR {
            bits: u8,
        }
        impl SSFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SSFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SSFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:3 - Shifter Status Flag"]
            #[inline(always)]
            pub fn ssf(&self) -> SSFR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SSFR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Shifter Status Flag"]
            #[inline(always)]
            pub fn ssf(&mut self) -> _SSFW {
                _SSFW { w: self }
            }
        }
    }
    #[doc = "Shifter Error Register"]
    pub struct SHIFTERR {
        register: VolatileCell<u32>,
    }
    #[doc = "Shifter Error Register"]
    pub mod shifterr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SHIFTERR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEFR {
            bits: u8,
        }
        impl SEFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:3 - Shifter Error Flags"]
            #[inline(always)]
            pub fn sef(&self) -> SEFR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEFR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Shifter Error Flags"]
            #[inline(always)]
            pub fn sef(&mut self) -> _SEFW {
                _SEFW { w: self }
            }
        }
    }
    #[doc = "Timer Status Register"]
    pub struct TIMSTAT {
        register: VolatileCell<u32>,
    }
    #[doc = "Timer Status Register"]
    pub mod timstat {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TIMSTAT {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct TSFR {
            bits: u8,
        }
        impl TSFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _TSFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TSFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:3 - Timer Status Flags"]
            #[inline(always)]
            pub fn tsf(&self) -> TSFR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TSFR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Timer Status Flags"]
            #[inline(always)]
            pub fn tsf(&mut self) -> _TSFW {
                _TSFW { w: self }
            }
        }
    }
    #[doc = "Shifter Status Interrupt Enable"]
    pub struct SHIFTSIEN {
        register: VolatileCell<u32>,
    }
    #[doc = "Shifter Status Interrupt Enable"]
    pub mod shiftsien {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SHIFTSIEN {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SSIER {
            bits: u8,
        }
        impl SSIER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SSIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SSIEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:3 - Shifter Status Interrupt Enable"]
            #[inline(always)]
            pub fn ssie(&self) -> SSIER {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SSIER { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Shifter Status Interrupt Enable"]
            #[inline(always)]
            pub fn ssie(&mut self) -> _SSIEW {
                _SSIEW { w: self }
            }
        }
    }
    #[doc = "Shifter Error Interrupt Enable"]
    pub struct SHIFTEIEN {
        register: VolatileCell<u32>,
    }
    #[doc = "Shifter Error Interrupt Enable"]
    pub mod shifteien {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SHIFTEIEN {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEIER {
            bits: u8,
        }
        impl SEIER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEIEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:3 - Shifter Error Interrupt Enable"]
            #[inline(always)]
            pub fn seie(&self) -> SEIER {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEIER { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Shifter Error Interrupt Enable"]
            #[inline(always)]
            pub fn seie(&mut self) -> _SEIEW {
                _SEIEW { w: self }
            }
        }
    }
    #[doc = "Timer Interrupt Enable Register"]
    pub struct TIMIEN {
        register: VolatileCell<u32>,
    }
    #[doc = "Timer Interrupt Enable Register"]
    pub mod timien {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TIMIEN {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct TEIER {
            bits: u8,
        }
        impl TEIER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _TEIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TEIEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:3 - Timer Status Interrupt Enable"]
            #[inline(always)]
            pub fn teie(&self) -> TEIER {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TEIER { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Timer Status Interrupt Enable"]
            #[inline(always)]
            pub fn teie(&mut self) -> _TEIEW {
                _TEIEW { w: self }
            }
        }
    }
    #[doc = "Shifter Status DMA Enable"]
    pub struct SHIFTSDEN {
        register: VolatileCell<u32>,
    }
    #[doc = "Shifter Status DMA Enable"]
    pub mod shiftsden {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SHIFTSDEN {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SSDER {
            bits: u8,
        }
        impl SSDER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SSDEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SSDEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:3 - Shifter Status DMA Enable"]
            #[inline(always)]
            pub fn ssde(&self) -> SSDER {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SSDER { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Shifter Status DMA Enable"]
            #[inline(always)]
            pub fn ssde(&mut self) -> _SSDEW {
                _SSDEW { w: self }
            }
        }
    }
    #[doc = "Shifter Control N Register"]
    pub struct SHIFTCTL0 {
        register: VolatileCell<u32>,
    }
    #[doc = "Shifter Control N Register"]
    pub mod shiftctl0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SHIFTCTL0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `SMOD`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMODR {
            #[doc = "Disabled."]
            _0,
            #[doc = "Receive mode. Captures the current Shifter content into the SHIFTBUF on expiration of the Timer."]
            _1,
            #[doc = "Transmit mode. Load SHIFTBUF contents into the Shifter on expiration of the Timer."]
            _10,
            #[doc = "Match Store mode. Shifter data is compared to SHIFTBUF content on expiration of the Timer."]
            _100,
            #[doc = "Match Continuous mode. Shifter data is continuously compared to SHIFTBUF contents."]
            _101,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl SMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SMODR::_0 => 0,
                    SMODR::_1 => 1,
                    SMODR::_10 => 2,
                    SMODR::_100 => 4,
                    SMODR::_101 => 5,
                    SMODR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SMODR {
                match value {
                    0 => SMODR::_0,
                    1 => SMODR::_1,
                    2 => SMODR::_10,
                    4 => SMODR::_100,
                    5 => SMODR::_101,
                    i => SMODR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMODR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SMODR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == SMODR::_10
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == SMODR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == SMODR::_101
            }
        }
        #[doc = "Possible values of the field `PINPOL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PINPOLR {
            #[doc = "Pin is active high"]
            _0,
            #[doc = "Pin is active low"]
            _1,
        }
        impl PINPOLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PINPOLR::_0 => false,
                    PINPOLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PINPOLR {
                match value {
                    false => PINPOLR::_0,
                    true => PINPOLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PINPOLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PINPOLR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct PINSELR {
            bits: u8,
        }
        impl PINSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `PINCFG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PINCFGR {
            #[doc = "Shifter pin output disabled"]
            _0,
            #[doc = "Shifter pin open drain or bidirectional output enable"]
            _1,
            #[doc = "Shifter pin bidirectional output data"]
            _10,
            #[doc = "Shifter pin output"]
            _11,
        }
        impl PINCFGR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PINCFGR::_0 => 0,
                    PINCFGR::_1 => 1,
                    PINCFGR::_10 => 2,
                    PINCFGR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PINCFGR {
                match value {
                    0 => PINCFGR::_0,
                    1 => PINCFGR::_1,
                    2 => PINCFGR::_10,
                    3 => PINCFGR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PINCFGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PINCFGR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == PINCFGR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == PINCFGR::_11
            }
        }
        #[doc = "Possible values of the field `TIMPOL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIMPOLR {
            #[doc = "Shift on posedge of Shift clock"]
            _0,
            #[doc = "Shift on negedge of Shift clock"]
            _1,
        }
        impl TIMPOLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TIMPOLR::_0 => false,
                    TIMPOLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TIMPOLR {
                match value {
                    false => TIMPOLR::_0,
                    true => TIMPOLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIMPOLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TIMPOLR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct TIMSELR {
            bits: u8,
        }
        impl TIMSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Values that can be written to the field `SMOD`"]
        pub enum SMODW {
            #[doc = "Disabled."]
            _0,
            #[doc = "Receive mode. Captures the current Shifter content into the SHIFTBUF on expiration of the Timer."]
            _1,
            #[doc = "Transmit mode. Load SHIFTBUF contents into the Shifter on expiration of the Timer."]
            _10,
            #[doc = "Match Store mode. Shifter data is compared to SHIFTBUF content on expiration of the Timer."]
            _100,
            #[doc = "Match Continuous mode. Shifter data is continuously compared to SHIFTBUF contents."]
            _101,
        }
        impl SMODW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SMODW::_0 => 0,
                    SMODW::_1 => 1,
                    SMODW::_10 => 2,
                    SMODW::_100 => 4,
                    SMODW::_101 => 5,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMODW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMODW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMODW::_0)
            }
            #[doc = "Receive mode. Captures the current Shifter content into the SHIFTBUF on expiration of the Timer."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SMODW::_1)
            }
            #[doc = "Transmit mode. Load SHIFTBUF contents into the Shifter on expiration of the Timer."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(SMODW::_10)
            }
            #[doc = "Match Store mode. Shifter data is compared to SHIFTBUF content on expiration of the Timer."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(SMODW::_100)
            }
            #[doc = "Match Continuous mode. Shifter data is continuously compared to SHIFTBUF contents."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(SMODW::_101)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PINPOL`"]
        pub enum PINPOLW {
            #[doc = "Pin is active high"]
            _0,
            #[doc = "Pin is active low"]
            _1,
        }
        impl PINPOLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PINPOLW::_0 => false,
                    PINPOLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PINPOLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PINPOLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PINPOLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin is active high"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PINPOLW::_0)
            }
            #[doc = "Pin is active low"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PINPOLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _PINSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PINSELW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PINCFG`"]
        pub enum PINCFGW {
            #[doc = "Shifter pin output disabled"]
            _0,
            #[doc = "Shifter pin open drain or bidirectional output enable"]
            _1,
            #[doc = "Shifter pin bidirectional output data"]
            _10,
            #[doc = "Shifter pin output"]
            _11,
        }
        impl PINCFGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PINCFGW::_0 => 0,
                    PINCFGW::_1 => 1,
                    PINCFGW::_10 => 2,
                    PINCFGW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PINCFGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PINCFGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PINCFGW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Shifter pin output disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PINCFGW::_0)
            }
            #[doc = "Shifter pin open drain or bidirectional output enable"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PINCFGW::_1)
            }
            #[doc = "Shifter pin bidirectional output data"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(PINCFGW::_10)
            }
            #[doc = "Shifter pin output"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(PINCFGW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TIMPOL`"]
        pub enum TIMPOLW {
            #[doc = "Shift on posedge of Shift clock"]
            _0,
            #[doc = "Shift on negedge of Shift clock"]
            _1,
        }
        impl TIMPOLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TIMPOLW::_0 => false,
                    TIMPOLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIMPOLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIMPOLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIMPOLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Shift on posedge of Shift clock"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIMPOLW::_0)
            }
            #[doc = "Shift on negedge of Shift clock"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TIMPOLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 23;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIMSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIMSELW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:2 - Shifter Mode"]
            #[inline(always)]
            pub fn smod(&self) -> SMODR {
                SMODR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 7 - Shifter Pin Polarity"]
            #[inline(always)]
            pub fn pinpol(&self) -> PINPOLR {
                PINPOLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Shifter Pin Select"]
            #[inline(always)]
            pub fn pinsel(&self) -> PINSELR {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                PINSELR { bits }
            }
            #[doc = "Bits 16:17 - Shifter Pin Configuration"]
            #[inline(always)]
            pub fn pincfg(&self) -> PINCFGR {
                PINCFGR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 23 - Timer Polarity"]
            #[inline(always)]
            pub fn timpol(&self) -> TIMPOLR {
                TIMPOLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 24:25 - Timer Select"]
            #[inline(always)]
            pub fn timsel(&self) -> TIMSELR {
                let bits = {
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TIMSELR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:2 - Shifter Mode"]
            #[inline(always)]
            pub fn smod(&mut self) -> _SMODW {
                _SMODW { w: self }
            }
            #[doc = "Bit 7 - Shifter Pin Polarity"]
            #[inline(always)]
            pub fn pinpol(&mut self) -> _PINPOLW {
                _PINPOLW { w: self }
            }
            #[doc = "Bits 8:10 - Shifter Pin Select"]
            #[inline(always)]
            pub fn pinsel(&mut self) -> _PINSELW {
                _PINSELW { w: self }
            }
            #[doc = "Bits 16:17 - Shifter Pin Configuration"]
            #[inline(always)]
            pub fn pincfg(&mut self) -> _PINCFGW {
                _PINCFGW { w: self }
            }
            #[doc = "Bit 23 - Timer Polarity"]
            #[inline(always)]
            pub fn timpol(&mut self) -> _TIMPOLW {
                _TIMPOLW { w: self }
            }
            #[doc = "Bits 24:25 - Timer Select"]
            #[inline(always)]
            pub fn timsel(&mut self) -> _TIMSELW {
                _TIMSELW { w: self }
            }
        }
    }
    #[doc = "Shifter Control N Register"]
    pub struct SHIFTCTL1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Shifter Control N Register"]
    pub mod shiftctl1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SHIFTCTL1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `SMOD`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMODR {
            #[doc = "Disabled."]
            _0,
            #[doc = "Receive mode. Captures the current Shifter content into the SHIFTBUF on expiration of the Timer."]
            _1,
            #[doc = "Transmit mode. Load SHIFTBUF contents into the Shifter on expiration of the Timer."]
            _10,
            #[doc = "Match Store mode. Shifter data is compared to SHIFTBUF content on expiration of the Timer."]
            _100,
            #[doc = "Match Continuous mode. Shifter data is continuously compared to SHIFTBUF contents."]
            _101,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl SMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SMODR::_0 => 0,
                    SMODR::_1 => 1,
                    SMODR::_10 => 2,
                    SMODR::_100 => 4,
                    SMODR::_101 => 5,
                    SMODR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SMODR {
                match value {
                    0 => SMODR::_0,
                    1 => SMODR::_1,
                    2 => SMODR::_10,
                    4 => SMODR::_100,
                    5 => SMODR::_101,
                    i => SMODR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMODR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SMODR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == SMODR::_10
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == SMODR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == SMODR::_101
            }
        }
        #[doc = "Possible values of the field `PINPOL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PINPOLR {
            #[doc = "Pin is active high"]
            _0,
            #[doc = "Pin is active low"]
            _1,
        }
        impl PINPOLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PINPOLR::_0 => false,
                    PINPOLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PINPOLR {
                match value {
                    false => PINPOLR::_0,
                    true => PINPOLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PINPOLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PINPOLR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct PINSELR {
            bits: u8,
        }
        impl PINSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `PINCFG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PINCFGR {
            #[doc = "Shifter pin output disabled"]
            _0,
            #[doc = "Shifter pin open drain or bidirectional output enable"]
            _1,
            #[doc = "Shifter pin bidirectional output data"]
            _10,
            #[doc = "Shifter pin output"]
            _11,
        }
        impl PINCFGR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PINCFGR::_0 => 0,
                    PINCFGR::_1 => 1,
                    PINCFGR::_10 => 2,
                    PINCFGR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PINCFGR {
                match value {
                    0 => PINCFGR::_0,
                    1 => PINCFGR::_1,
                    2 => PINCFGR::_10,
                    3 => PINCFGR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PINCFGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PINCFGR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == PINCFGR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == PINCFGR::_11
            }
        }
        #[doc = "Possible values of the field `TIMPOL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIMPOLR {
            #[doc = "Shift on posedge of Shift clock"]
            _0,
            #[doc = "Shift on negedge of Shift clock"]
            _1,
        }
        impl TIMPOLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TIMPOLR::_0 => false,
                    TIMPOLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TIMPOLR {
                match value {
                    false => TIMPOLR::_0,
                    true => TIMPOLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIMPOLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TIMPOLR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct TIMSELR {
            bits: u8,
        }
        impl TIMSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Values that can be written to the field `SMOD`"]
        pub enum SMODW {
            #[doc = "Disabled."]
            _0,
            #[doc = "Receive mode. Captures the current Shifter content into the SHIFTBUF on expiration of the Timer."]
            _1,
            #[doc = "Transmit mode. Load SHIFTBUF contents into the Shifter on expiration of the Timer."]
            _10,
            #[doc = "Match Store mode. Shifter data is compared to SHIFTBUF content on expiration of the Timer."]
            _100,
            #[doc = "Match Continuous mode. Shifter data is continuously compared to SHIFTBUF contents."]
            _101,
        }
        impl SMODW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SMODW::_0 => 0,
                    SMODW::_1 => 1,
                    SMODW::_10 => 2,
                    SMODW::_100 => 4,
                    SMODW::_101 => 5,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMODW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMODW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMODW::_0)
            }
            #[doc = "Receive mode. Captures the current Shifter content into the SHIFTBUF on expiration of the Timer."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SMODW::_1)
            }
            #[doc = "Transmit mode. Load SHIFTBUF contents into the Shifter on expiration of the Timer."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(SMODW::_10)
            }
            #[doc = "Match Store mode. Shifter data is compared to SHIFTBUF content on expiration of the Timer."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(SMODW::_100)
            }
            #[doc = "Match Continuous mode. Shifter data is continuously compared to SHIFTBUF contents."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(SMODW::_101)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PINPOL`"]
        pub enum PINPOLW {
            #[doc = "Pin is active high"]
            _0,
            #[doc = "Pin is active low"]
            _1,
        }
        impl PINPOLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PINPOLW::_0 => false,
                    PINPOLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PINPOLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PINPOLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PINPOLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin is active high"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PINPOLW::_0)
            }
            #[doc = "Pin is active low"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PINPOLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _PINSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PINSELW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PINCFG`"]
        pub enum PINCFGW {
            #[doc = "Shifter pin output disabled"]
            _0,
            #[doc = "Shifter pin open drain or bidirectional output enable"]
            _1,
            #[doc = "Shifter pin bidirectional output data"]
            _10,
            #[doc = "Shifter pin output"]
            _11,
        }
        impl PINCFGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PINCFGW::_0 => 0,
                    PINCFGW::_1 => 1,
                    PINCFGW::_10 => 2,
                    PINCFGW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PINCFGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PINCFGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PINCFGW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Shifter pin output disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PINCFGW::_0)
            }
            #[doc = "Shifter pin open drain or bidirectional output enable"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PINCFGW::_1)
            }
            #[doc = "Shifter pin bidirectional output data"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(PINCFGW::_10)
            }
            #[doc = "Shifter pin output"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(PINCFGW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TIMPOL`"]
        pub enum TIMPOLW {
            #[doc = "Shift on posedge of Shift clock"]
            _0,
            #[doc = "Shift on negedge of Shift clock"]
            _1,
        }
        impl TIMPOLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TIMPOLW::_0 => false,
                    TIMPOLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIMPOLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIMPOLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIMPOLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Shift on posedge of Shift clock"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIMPOLW::_0)
            }
            #[doc = "Shift on negedge of Shift clock"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TIMPOLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 23;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIMSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIMSELW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:2 - Shifter Mode"]
            #[inline(always)]
            pub fn smod(&self) -> SMODR {
                SMODR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 7 - Shifter Pin Polarity"]
            #[inline(always)]
            pub fn pinpol(&self) -> PINPOLR {
                PINPOLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Shifter Pin Select"]
            #[inline(always)]
            pub fn pinsel(&self) -> PINSELR {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                PINSELR { bits }
            }
            #[doc = "Bits 16:17 - Shifter Pin Configuration"]
            #[inline(always)]
            pub fn pincfg(&self) -> PINCFGR {
                PINCFGR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 23 - Timer Polarity"]
            #[inline(always)]
            pub fn timpol(&self) -> TIMPOLR {
                TIMPOLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 24:25 - Timer Select"]
            #[inline(always)]
            pub fn timsel(&self) -> TIMSELR {
                let bits = {
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TIMSELR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:2 - Shifter Mode"]
            #[inline(always)]
            pub fn smod(&mut self) -> _SMODW {
                _SMODW { w: self }
            }
            #[doc = "Bit 7 - Shifter Pin Polarity"]
            #[inline(always)]
            pub fn pinpol(&mut self) -> _PINPOLW {
                _PINPOLW { w: self }
            }
            #[doc = "Bits 8:10 - Shifter Pin Select"]
            #[inline(always)]
            pub fn pinsel(&mut self) -> _PINSELW {
                _PINSELW { w: self }
            }
            #[doc = "Bits 16:17 - Shifter Pin Configuration"]
            #[inline(always)]
            pub fn pincfg(&mut self) -> _PINCFGW {
                _PINCFGW { w: self }
            }
            #[doc = "Bit 23 - Timer Polarity"]
            #[inline(always)]
            pub fn timpol(&mut self) -> _TIMPOLW {
                _TIMPOLW { w: self }
            }
            #[doc = "Bits 24:25 - Timer Select"]
            #[inline(always)]
            pub fn timsel(&mut self) -> _TIMSELW {
                _TIMSELW { w: self }
            }
        }
    }
    #[doc = "Shifter Control N Register"]
    pub struct SHIFTCTL2 {
        register: VolatileCell<u32>,
    }
    #[doc = "Shifter Control N Register"]
    pub mod shiftctl2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SHIFTCTL2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `SMOD`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMODR {
            #[doc = "Disabled."]
            _0,
            #[doc = "Receive mode. Captures the current Shifter content into the SHIFTBUF on expiration of the Timer."]
            _1,
            #[doc = "Transmit mode. Load SHIFTBUF contents into the Shifter on expiration of the Timer."]
            _10,
            #[doc = "Match Store mode. Shifter data is compared to SHIFTBUF content on expiration of the Timer."]
            _100,
            #[doc = "Match Continuous mode. Shifter data is continuously compared to SHIFTBUF contents."]
            _101,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl SMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SMODR::_0 => 0,
                    SMODR::_1 => 1,
                    SMODR::_10 => 2,
                    SMODR::_100 => 4,
                    SMODR::_101 => 5,
                    SMODR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SMODR {
                match value {
                    0 => SMODR::_0,
                    1 => SMODR::_1,
                    2 => SMODR::_10,
                    4 => SMODR::_100,
                    5 => SMODR::_101,
                    i => SMODR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMODR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SMODR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == SMODR::_10
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == SMODR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == SMODR::_101
            }
        }
        #[doc = "Possible values of the field `PINPOL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PINPOLR {
            #[doc = "Pin is active high"]
            _0,
            #[doc = "Pin is active low"]
            _1,
        }
        impl PINPOLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PINPOLR::_0 => false,
                    PINPOLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PINPOLR {
                match value {
                    false => PINPOLR::_0,
                    true => PINPOLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PINPOLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PINPOLR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct PINSELR {
            bits: u8,
        }
        impl PINSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `PINCFG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PINCFGR {
            #[doc = "Shifter pin output disabled"]
            _0,
            #[doc = "Shifter pin open drain or bidirectional output enable"]
            _1,
            #[doc = "Shifter pin bidirectional output data"]
            _10,
            #[doc = "Shifter pin output"]
            _11,
        }
        impl PINCFGR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PINCFGR::_0 => 0,
                    PINCFGR::_1 => 1,
                    PINCFGR::_10 => 2,
                    PINCFGR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PINCFGR {
                match value {
                    0 => PINCFGR::_0,
                    1 => PINCFGR::_1,
                    2 => PINCFGR::_10,
                    3 => PINCFGR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PINCFGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PINCFGR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == PINCFGR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == PINCFGR::_11
            }
        }
        #[doc = "Possible values of the field `TIMPOL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIMPOLR {
            #[doc = "Shift on posedge of Shift clock"]
            _0,
            #[doc = "Shift on negedge of Shift clock"]
            _1,
        }
        impl TIMPOLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TIMPOLR::_0 => false,
                    TIMPOLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TIMPOLR {
                match value {
                    false => TIMPOLR::_0,
                    true => TIMPOLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIMPOLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TIMPOLR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct TIMSELR {
            bits: u8,
        }
        impl TIMSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Values that can be written to the field `SMOD`"]
        pub enum SMODW {
            #[doc = "Disabled."]
            _0,
            #[doc = "Receive mode. Captures the current Shifter content into the SHIFTBUF on expiration of the Timer."]
            _1,
            #[doc = "Transmit mode. Load SHIFTBUF contents into the Shifter on expiration of the Timer."]
            _10,
            #[doc = "Match Store mode. Shifter data is compared to SHIFTBUF content on expiration of the Timer."]
            _100,
            #[doc = "Match Continuous mode. Shifter data is continuously compared to SHIFTBUF contents."]
            _101,
        }
        impl SMODW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SMODW::_0 => 0,
                    SMODW::_1 => 1,
                    SMODW::_10 => 2,
                    SMODW::_100 => 4,
                    SMODW::_101 => 5,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMODW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMODW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMODW::_0)
            }
            #[doc = "Receive mode. Captures the current Shifter content into the SHIFTBUF on expiration of the Timer."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SMODW::_1)
            }
            #[doc = "Transmit mode. Load SHIFTBUF contents into the Shifter on expiration of the Timer."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(SMODW::_10)
            }
            #[doc = "Match Store mode. Shifter data is compared to SHIFTBUF content on expiration of the Timer."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(SMODW::_100)
            }
            #[doc = "Match Continuous mode. Shifter data is continuously compared to SHIFTBUF contents."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(SMODW::_101)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PINPOL`"]
        pub enum PINPOLW {
            #[doc = "Pin is active high"]
            _0,
            #[doc = "Pin is active low"]
            _1,
        }
        impl PINPOLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PINPOLW::_0 => false,
                    PINPOLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PINPOLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PINPOLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PINPOLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin is active high"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PINPOLW::_0)
            }
            #[doc = "Pin is active low"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PINPOLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _PINSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PINSELW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PINCFG`"]
        pub enum PINCFGW {
            #[doc = "Shifter pin output disabled"]
            _0,
            #[doc = "Shifter pin open drain or bidirectional output enable"]
            _1,
            #[doc = "Shifter pin bidirectional output data"]
            _10,
            #[doc = "Shifter pin output"]
            _11,
        }
        impl PINCFGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PINCFGW::_0 => 0,
                    PINCFGW::_1 => 1,
                    PINCFGW::_10 => 2,
                    PINCFGW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PINCFGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PINCFGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PINCFGW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Shifter pin output disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PINCFGW::_0)
            }
            #[doc = "Shifter pin open drain or bidirectional output enable"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PINCFGW::_1)
            }
            #[doc = "Shifter pin bidirectional output data"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(PINCFGW::_10)
            }
            #[doc = "Shifter pin output"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(PINCFGW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TIMPOL`"]
        pub enum TIMPOLW {
            #[doc = "Shift on posedge of Shift clock"]
            _0,
            #[doc = "Shift on negedge of Shift clock"]
            _1,
        }
        impl TIMPOLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TIMPOLW::_0 => false,
                    TIMPOLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIMPOLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIMPOLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIMPOLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Shift on posedge of Shift clock"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIMPOLW::_0)
            }
            #[doc = "Shift on negedge of Shift clock"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TIMPOLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 23;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIMSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIMSELW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:2 - Shifter Mode"]
            #[inline(always)]
            pub fn smod(&self) -> SMODR {
                SMODR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 7 - Shifter Pin Polarity"]
            #[inline(always)]
            pub fn pinpol(&self) -> PINPOLR {
                PINPOLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Shifter Pin Select"]
            #[inline(always)]
            pub fn pinsel(&self) -> PINSELR {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                PINSELR { bits }
            }
            #[doc = "Bits 16:17 - Shifter Pin Configuration"]
            #[inline(always)]
            pub fn pincfg(&self) -> PINCFGR {
                PINCFGR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 23 - Timer Polarity"]
            #[inline(always)]
            pub fn timpol(&self) -> TIMPOLR {
                TIMPOLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 24:25 - Timer Select"]
            #[inline(always)]
            pub fn timsel(&self) -> TIMSELR {
                let bits = {
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TIMSELR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:2 - Shifter Mode"]
            #[inline(always)]
            pub fn smod(&mut self) -> _SMODW {
                _SMODW { w: self }
            }
            #[doc = "Bit 7 - Shifter Pin Polarity"]
            #[inline(always)]
            pub fn pinpol(&mut self) -> _PINPOLW {
                _PINPOLW { w: self }
            }
            #[doc = "Bits 8:10 - Shifter Pin Select"]
            #[inline(always)]
            pub fn pinsel(&mut self) -> _PINSELW {
                _PINSELW { w: self }
            }
            #[doc = "Bits 16:17 - Shifter Pin Configuration"]
            #[inline(always)]
            pub fn pincfg(&mut self) -> _PINCFGW {
                _PINCFGW { w: self }
            }
            #[doc = "Bit 23 - Timer Polarity"]
            #[inline(always)]
            pub fn timpol(&mut self) -> _TIMPOLW {
                _TIMPOLW { w: self }
            }
            #[doc = "Bits 24:25 - Timer Select"]
            #[inline(always)]
            pub fn timsel(&mut self) -> _TIMSELW {
                _TIMSELW { w: self }
            }
        }
    }
    #[doc = "Shifter Control N Register"]
    pub struct SHIFTCTL3 {
        register: VolatileCell<u32>,
    }
    #[doc = "Shifter Control N Register"]
    pub mod shiftctl3 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SHIFTCTL3 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `SMOD`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMODR {
            #[doc = "Disabled."]
            _0,
            #[doc = "Receive mode. Captures the current Shifter content into the SHIFTBUF on expiration of the Timer."]
            _1,
            #[doc = "Transmit mode. Load SHIFTBUF contents into the Shifter on expiration of the Timer."]
            _10,
            #[doc = "Match Store mode. Shifter data is compared to SHIFTBUF content on expiration of the Timer."]
            _100,
            #[doc = "Match Continuous mode. Shifter data is continuously compared to SHIFTBUF contents."]
            _101,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl SMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SMODR::_0 => 0,
                    SMODR::_1 => 1,
                    SMODR::_10 => 2,
                    SMODR::_100 => 4,
                    SMODR::_101 => 5,
                    SMODR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SMODR {
                match value {
                    0 => SMODR::_0,
                    1 => SMODR::_1,
                    2 => SMODR::_10,
                    4 => SMODR::_100,
                    5 => SMODR::_101,
                    i => SMODR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMODR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SMODR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == SMODR::_10
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == SMODR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == SMODR::_101
            }
        }
        #[doc = "Possible values of the field `PINPOL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PINPOLR {
            #[doc = "Pin is active high"]
            _0,
            #[doc = "Pin is active low"]
            _1,
        }
        impl PINPOLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PINPOLR::_0 => false,
                    PINPOLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PINPOLR {
                match value {
                    false => PINPOLR::_0,
                    true => PINPOLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PINPOLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PINPOLR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct PINSELR {
            bits: u8,
        }
        impl PINSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `PINCFG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PINCFGR {
            #[doc = "Shifter pin output disabled"]
            _0,
            #[doc = "Shifter pin open drain or bidirectional output enable"]
            _1,
            #[doc = "Shifter pin bidirectional output data"]
            _10,
            #[doc = "Shifter pin output"]
            _11,
        }
        impl PINCFGR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PINCFGR::_0 => 0,
                    PINCFGR::_1 => 1,
                    PINCFGR::_10 => 2,
                    PINCFGR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PINCFGR {
                match value {
                    0 => PINCFGR::_0,
                    1 => PINCFGR::_1,
                    2 => PINCFGR::_10,
                    3 => PINCFGR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PINCFGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PINCFGR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == PINCFGR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == PINCFGR::_11
            }
        }
        #[doc = "Possible values of the field `TIMPOL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIMPOLR {
            #[doc = "Shift on posedge of Shift clock"]
            _0,
            #[doc = "Shift on negedge of Shift clock"]
            _1,
        }
        impl TIMPOLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TIMPOLR::_0 => false,
                    TIMPOLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TIMPOLR {
                match value {
                    false => TIMPOLR::_0,
                    true => TIMPOLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIMPOLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TIMPOLR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct TIMSELR {
            bits: u8,
        }
        impl TIMSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Values that can be written to the field `SMOD`"]
        pub enum SMODW {
            #[doc = "Disabled."]
            _0,
            #[doc = "Receive mode. Captures the current Shifter content into the SHIFTBUF on expiration of the Timer."]
            _1,
            #[doc = "Transmit mode. Load SHIFTBUF contents into the Shifter on expiration of the Timer."]
            _10,
            #[doc = "Match Store mode. Shifter data is compared to SHIFTBUF content on expiration of the Timer."]
            _100,
            #[doc = "Match Continuous mode. Shifter data is continuously compared to SHIFTBUF contents."]
            _101,
        }
        impl SMODW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SMODW::_0 => 0,
                    SMODW::_1 => 1,
                    SMODW::_10 => 2,
                    SMODW::_100 => 4,
                    SMODW::_101 => 5,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMODW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMODW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMODW::_0)
            }
            #[doc = "Receive mode. Captures the current Shifter content into the SHIFTBUF on expiration of the Timer."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SMODW::_1)
            }
            #[doc = "Transmit mode. Load SHIFTBUF contents into the Shifter on expiration of the Timer."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(SMODW::_10)
            }
            #[doc = "Match Store mode. Shifter data is compared to SHIFTBUF content on expiration of the Timer."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(SMODW::_100)
            }
            #[doc = "Match Continuous mode. Shifter data is continuously compared to SHIFTBUF contents."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(SMODW::_101)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PINPOL`"]
        pub enum PINPOLW {
            #[doc = "Pin is active high"]
            _0,
            #[doc = "Pin is active low"]
            _1,
        }
        impl PINPOLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PINPOLW::_0 => false,
                    PINPOLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PINPOLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PINPOLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PINPOLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin is active high"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PINPOLW::_0)
            }
            #[doc = "Pin is active low"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PINPOLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _PINSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PINSELW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PINCFG`"]
        pub enum PINCFGW {
            #[doc = "Shifter pin output disabled"]
            _0,
            #[doc = "Shifter pin open drain or bidirectional output enable"]
            _1,
            #[doc = "Shifter pin bidirectional output data"]
            _10,
            #[doc = "Shifter pin output"]
            _11,
        }
        impl PINCFGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PINCFGW::_0 => 0,
                    PINCFGW::_1 => 1,
                    PINCFGW::_10 => 2,
                    PINCFGW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PINCFGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PINCFGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PINCFGW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Shifter pin output disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PINCFGW::_0)
            }
            #[doc = "Shifter pin open drain or bidirectional output enable"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PINCFGW::_1)
            }
            #[doc = "Shifter pin bidirectional output data"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(PINCFGW::_10)
            }
            #[doc = "Shifter pin output"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(PINCFGW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TIMPOL`"]
        pub enum TIMPOLW {
            #[doc = "Shift on posedge of Shift clock"]
            _0,
            #[doc = "Shift on negedge of Shift clock"]
            _1,
        }
        impl TIMPOLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TIMPOLW::_0 => false,
                    TIMPOLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIMPOLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIMPOLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIMPOLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Shift on posedge of Shift clock"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIMPOLW::_0)
            }
            #[doc = "Shift on negedge of Shift clock"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TIMPOLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 23;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIMSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIMSELW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:2 - Shifter Mode"]
            #[inline(always)]
            pub fn smod(&self) -> SMODR {
                SMODR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 7 - Shifter Pin Polarity"]
            #[inline(always)]
            pub fn pinpol(&self) -> PINPOLR {
                PINPOLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Shifter Pin Select"]
            #[inline(always)]
            pub fn pinsel(&self) -> PINSELR {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                PINSELR { bits }
            }
            #[doc = "Bits 16:17 - Shifter Pin Configuration"]
            #[inline(always)]
            pub fn pincfg(&self) -> PINCFGR {
                PINCFGR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 23 - Timer Polarity"]
            #[inline(always)]
            pub fn timpol(&self) -> TIMPOLR {
                TIMPOLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 24:25 - Timer Select"]
            #[inline(always)]
            pub fn timsel(&self) -> TIMSELR {
                let bits = {
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TIMSELR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:2 - Shifter Mode"]
            #[inline(always)]
            pub fn smod(&mut self) -> _SMODW {
                _SMODW { w: self }
            }
            #[doc = "Bit 7 - Shifter Pin Polarity"]
            #[inline(always)]
            pub fn pinpol(&mut self) -> _PINPOLW {
                _PINPOLW { w: self }
            }
            #[doc = "Bits 8:10 - Shifter Pin Select"]
            #[inline(always)]
            pub fn pinsel(&mut self) -> _PINSELW {
                _PINSELW { w: self }
            }
            #[doc = "Bits 16:17 - Shifter Pin Configuration"]
            #[inline(always)]
            pub fn pincfg(&mut self) -> _PINCFGW {
                _PINCFGW { w: self }
            }
            #[doc = "Bit 23 - Timer Polarity"]
            #[inline(always)]
            pub fn timpol(&mut self) -> _TIMPOLW {
                _TIMPOLW { w: self }
            }
            #[doc = "Bits 24:25 - Timer Select"]
            #[inline(always)]
            pub fn timsel(&mut self) -> _TIMSELW {
                _TIMSELW { w: self }
            }
        }
    }
    #[doc = "Shifter Configuration N Register"]
    pub struct SHIFTCFG0 {
        register: VolatileCell<u32>,
    }
    #[doc = "Shifter Configuration N Register"]
    pub mod shiftcfg0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SHIFTCFG0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `SSTART`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SSTARTR {
            #[doc = "Start bit disabled for transmitter/receiver/match store, transmitter loads data on enable"]
            _0,
            #[doc = "Start bit disabled for transmitter/receiver/match store, transmitter loads data on first shift"]
            _1,
            #[doc = "Transmitter outputs start bit value 0 before loading data on first shift, receiver/match store sets error flag if start bit is not 0"]
            _10,
            #[doc = "Transmitter outputs start bit value 1 before loading data on first shift, receiver/match store sets error flag if start bit is not 1"]
            _11,
        }
        impl SSTARTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SSTARTR::_0 => 0,
                    SSTARTR::_1 => 1,
                    SSTARTR::_10 => 2,
                    SSTARTR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SSTARTR {
                match value {
                    0 => SSTARTR::_0,
                    1 => SSTARTR::_1,
                    2 => SSTARTR::_10,
                    3 => SSTARTR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SSTARTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SSTARTR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == SSTARTR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == SSTARTR::_11
            }
        }
        #[doc = "Possible values of the field `SSTOP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SSTOPR {
            #[doc = "Stop bit disabled for transmitter/receiver/match store"]
            _0,
            #[doc = "Reserved for transmitter/receiver/match store"]
            _1,
            #[doc = "Transmitter outputs stop bit value 0 on store, receiver/match store sets error flag if stop bit is not 0"]
            _10,
            #[doc = "Transmitter outputs stop bit value 1 on store, receiver/match store sets error flag if stop bit is not 1"]
            _11,
        }
        impl SSTOPR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SSTOPR::_0 => 0,
                    SSTOPR::_1 => 1,
                    SSTOPR::_10 => 2,
                    SSTOPR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SSTOPR {
                match value {
                    0 => SSTOPR::_0,
                    1 => SSTOPR::_1,
                    2 => SSTOPR::_10,
                    3 => SSTOPR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SSTOPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SSTOPR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == SSTOPR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == SSTOPR::_11
            }
        }
        #[doc = "Possible values of the field `INSRC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INSRCR {
            #[doc = "Pin"]
            _0,
            #[doc = "Shifter N+1 Output"]
            _1,
        }
        impl INSRCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INSRCR::_0 => false,
                    INSRCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INSRCR {
                match value {
                    false => INSRCR::_0,
                    true => INSRCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INSRCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INSRCR::_1
            }
        }
        #[doc = "Values that can be written to the field `SSTART`"]
        pub enum SSTARTW {
            #[doc = "Start bit disabled for transmitter/receiver/match store, transmitter loads data on enable"]
            _0,
            #[doc = "Start bit disabled for transmitter/receiver/match store, transmitter loads data on first shift"]
            _1,
            #[doc = "Transmitter outputs start bit value 0 before loading data on first shift, receiver/match store sets error flag if start bit is not 0"]
            _10,
            #[doc = "Transmitter outputs start bit value 1 before loading data on first shift, receiver/match store sets error flag if start bit is not 1"]
            _11,
        }
        impl SSTARTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SSTARTW::_0 => 0,
                    SSTARTW::_1 => 1,
                    SSTARTW::_10 => 2,
                    SSTARTW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SSTARTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SSTARTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SSTARTW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Start bit disabled for transmitter/receiver/match store, transmitter loads data on enable"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SSTARTW::_0)
            }
            #[doc = "Start bit disabled for transmitter/receiver/match store, transmitter loads data on first shift"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SSTARTW::_1)
            }
            #[doc = "Transmitter outputs start bit value 0 before loading data on first shift, receiver/match store sets error flag if start bit is not 0"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(SSTARTW::_10)
            }
            #[doc = "Transmitter outputs start bit value 1 before loading data on first shift, receiver/match store sets error flag if start bit is not 1"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(SSTARTW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SSTOP`"]
        pub enum SSTOPW {
            #[doc = "Stop bit disabled for transmitter/receiver/match store"]
            _0,
            #[doc = "Reserved for transmitter/receiver/match store"]
            _1,
            #[doc = "Transmitter outputs stop bit value 0 on store, receiver/match store sets error flag if stop bit is not 0"]
            _10,
            #[doc = "Transmitter outputs stop bit value 1 on store, receiver/match store sets error flag if stop bit is not 1"]
            _11,
        }
        impl SSTOPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SSTOPW::_0 => 0,
                    SSTOPW::_1 => 1,
                    SSTOPW::_10 => 2,
                    SSTOPW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SSTOPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SSTOPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SSTOPW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Stop bit disabled for transmitter/receiver/match store"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SSTOPW::_0)
            }
            #[doc = "Reserved for transmitter/receiver/match store"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SSTOPW::_1)
            }
            #[doc = "Transmitter outputs stop bit value 0 on store, receiver/match store sets error flag if stop bit is not 0"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(SSTOPW::_10)
            }
            #[doc = "Transmitter outputs stop bit value 1 on store, receiver/match store sets error flag if stop bit is not 1"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(SSTOPW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INSRC`"]
        pub enum INSRCW {
            #[doc = "Pin"]
            _0,
            #[doc = "Shifter N+1 Output"]
            _1,
        }
        impl INSRCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INSRCW::_0 => false,
                    INSRCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INSRCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INSRCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INSRCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INSRCW::_0)
            }
            #[doc = "Shifter N+1 Output"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INSRCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:1 - Shifter Start bit"]
            #[inline(always)]
            pub fn sstart(&self) -> SSTARTR {
                SSTARTR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 4:5 - Shifter Stop bit"]
            #[inline(always)]
            pub fn sstop(&self) -> SSTOPR {
                SSTOPR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 8 - Input Source"]
            #[inline(always)]
            pub fn insrc(&self) -> INSRCR {
                INSRCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:1 - Shifter Start bit"]
            #[inline(always)]
            pub fn sstart(&mut self) -> _SSTARTW {
                _SSTARTW { w: self }
            }
            #[doc = "Bits 4:5 - Shifter Stop bit"]
            #[inline(always)]
            pub fn sstop(&mut self) -> _SSTOPW {
                _SSTOPW { w: self }
            }
            #[doc = "Bit 8 - Input Source"]
            #[inline(always)]
            pub fn insrc(&mut self) -> _INSRCW {
                _INSRCW { w: self }
            }
        }
    }
    #[doc = "Shifter Configuration N Register"]
    pub struct SHIFTCFG1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Shifter Configuration N Register"]
    pub mod shiftcfg1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SHIFTCFG1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `SSTART`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SSTARTR {
            #[doc = "Start bit disabled for transmitter/receiver/match store, transmitter loads data on enable"]
            _0,
            #[doc = "Start bit disabled for transmitter/receiver/match store, transmitter loads data on first shift"]
            _1,
            #[doc = "Transmitter outputs start bit value 0 before loading data on first shift, receiver/match store sets error flag if start bit is not 0"]
            _10,
            #[doc = "Transmitter outputs start bit value 1 before loading data on first shift, receiver/match store sets error flag if start bit is not 1"]
            _11,
        }
        impl SSTARTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SSTARTR::_0 => 0,
                    SSTARTR::_1 => 1,
                    SSTARTR::_10 => 2,
                    SSTARTR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SSTARTR {
                match value {
                    0 => SSTARTR::_0,
                    1 => SSTARTR::_1,
                    2 => SSTARTR::_10,
                    3 => SSTARTR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SSTARTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SSTARTR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == SSTARTR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == SSTARTR::_11
            }
        }
        #[doc = "Possible values of the field `SSTOP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SSTOPR {
            #[doc = "Stop bit disabled for transmitter/receiver/match store"]
            _0,
            #[doc = "Reserved for transmitter/receiver/match store"]
            _1,
            #[doc = "Transmitter outputs stop bit value 0 on store, receiver/match store sets error flag if stop bit is not 0"]
            _10,
            #[doc = "Transmitter outputs stop bit value 1 on store, receiver/match store sets error flag if stop bit is not 1"]
            _11,
        }
        impl SSTOPR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SSTOPR::_0 => 0,
                    SSTOPR::_1 => 1,
                    SSTOPR::_10 => 2,
                    SSTOPR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SSTOPR {
                match value {
                    0 => SSTOPR::_0,
                    1 => SSTOPR::_1,
                    2 => SSTOPR::_10,
                    3 => SSTOPR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SSTOPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SSTOPR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == SSTOPR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == SSTOPR::_11
            }
        }
        #[doc = "Possible values of the field `INSRC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INSRCR {
            #[doc = "Pin"]
            _0,
            #[doc = "Shifter N+1 Output"]
            _1,
        }
        impl INSRCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INSRCR::_0 => false,
                    INSRCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INSRCR {
                match value {
                    false => INSRCR::_0,
                    true => INSRCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INSRCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INSRCR::_1
            }
        }
        #[doc = "Values that can be written to the field `SSTART`"]
        pub enum SSTARTW {
            #[doc = "Start bit disabled for transmitter/receiver/match store, transmitter loads data on enable"]
            _0,
            #[doc = "Start bit disabled for transmitter/receiver/match store, transmitter loads data on first shift"]
            _1,
            #[doc = "Transmitter outputs start bit value 0 before loading data on first shift, receiver/match store sets error flag if start bit is not 0"]
            _10,
            #[doc = "Transmitter outputs start bit value 1 before loading data on first shift, receiver/match store sets error flag if start bit is not 1"]
            _11,
        }
        impl SSTARTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SSTARTW::_0 => 0,
                    SSTARTW::_1 => 1,
                    SSTARTW::_10 => 2,
                    SSTARTW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SSTARTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SSTARTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SSTARTW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Start bit disabled for transmitter/receiver/match store, transmitter loads data on enable"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SSTARTW::_0)
            }
            #[doc = "Start bit disabled for transmitter/receiver/match store, transmitter loads data on first shift"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SSTARTW::_1)
            }
            #[doc = "Transmitter outputs start bit value 0 before loading data on first shift, receiver/match store sets error flag if start bit is not 0"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(SSTARTW::_10)
            }
            #[doc = "Transmitter outputs start bit value 1 before loading data on first shift, receiver/match store sets error flag if start bit is not 1"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(SSTARTW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SSTOP`"]
        pub enum SSTOPW {
            #[doc = "Stop bit disabled for transmitter/receiver/match store"]
            _0,
            #[doc = "Reserved for transmitter/receiver/match store"]
            _1,
            #[doc = "Transmitter outputs stop bit value 0 on store, receiver/match store sets error flag if stop bit is not 0"]
            _10,
            #[doc = "Transmitter outputs stop bit value 1 on store, receiver/match store sets error flag if stop bit is not 1"]
            _11,
        }
        impl SSTOPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SSTOPW::_0 => 0,
                    SSTOPW::_1 => 1,
                    SSTOPW::_10 => 2,
                    SSTOPW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SSTOPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SSTOPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SSTOPW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Stop bit disabled for transmitter/receiver/match store"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SSTOPW::_0)
            }
            #[doc = "Reserved for transmitter/receiver/match store"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SSTOPW::_1)
            }
            #[doc = "Transmitter outputs stop bit value 0 on store, receiver/match store sets error flag if stop bit is not 0"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(SSTOPW::_10)
            }
            #[doc = "Transmitter outputs stop bit value 1 on store, receiver/match store sets error flag if stop bit is not 1"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(SSTOPW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INSRC`"]
        pub enum INSRCW {
            #[doc = "Pin"]
            _0,
            #[doc = "Shifter N+1 Output"]
            _1,
        }
        impl INSRCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INSRCW::_0 => false,
                    INSRCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INSRCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INSRCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INSRCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INSRCW::_0)
            }
            #[doc = "Shifter N+1 Output"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INSRCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:1 - Shifter Start bit"]
            #[inline(always)]
            pub fn sstart(&self) -> SSTARTR {
                SSTARTR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 4:5 - Shifter Stop bit"]
            #[inline(always)]
            pub fn sstop(&self) -> SSTOPR {
                SSTOPR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 8 - Input Source"]
            #[inline(always)]
            pub fn insrc(&self) -> INSRCR {
                INSRCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:1 - Shifter Start bit"]
            #[inline(always)]
            pub fn sstart(&mut self) -> _SSTARTW {
                _SSTARTW { w: self }
            }
            #[doc = "Bits 4:5 - Shifter Stop bit"]
            #[inline(always)]
            pub fn sstop(&mut self) -> _SSTOPW {
                _SSTOPW { w: self }
            }
            #[doc = "Bit 8 - Input Source"]
            #[inline(always)]
            pub fn insrc(&mut self) -> _INSRCW {
                _INSRCW { w: self }
            }
        }
    }
    #[doc = "Shifter Configuration N Register"]
    pub struct SHIFTCFG2 {
        register: VolatileCell<u32>,
    }
    #[doc = "Shifter Configuration N Register"]
    pub mod shiftcfg2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SHIFTCFG2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `SSTART`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SSTARTR {
            #[doc = "Start bit disabled for transmitter/receiver/match store, transmitter loads data on enable"]
            _0,
            #[doc = "Start bit disabled for transmitter/receiver/match store, transmitter loads data on first shift"]
            _1,
            #[doc = "Transmitter outputs start bit value 0 before loading data on first shift, receiver/match store sets error flag if start bit is not 0"]
            _10,
            #[doc = "Transmitter outputs start bit value 1 before loading data on first shift, receiver/match store sets error flag if start bit is not 1"]
            _11,
        }
        impl SSTARTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SSTARTR::_0 => 0,
                    SSTARTR::_1 => 1,
                    SSTARTR::_10 => 2,
                    SSTARTR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SSTARTR {
                match value {
                    0 => SSTARTR::_0,
                    1 => SSTARTR::_1,
                    2 => SSTARTR::_10,
                    3 => SSTARTR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SSTARTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SSTARTR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == SSTARTR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == SSTARTR::_11
            }
        }
        #[doc = "Possible values of the field `SSTOP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SSTOPR {
            #[doc = "Stop bit disabled for transmitter/receiver/match store"]
            _0,
            #[doc = "Reserved for transmitter/receiver/match store"]
            _1,
            #[doc = "Transmitter outputs stop bit value 0 on store, receiver/match store sets error flag if stop bit is not 0"]
            _10,
            #[doc = "Transmitter outputs stop bit value 1 on store, receiver/match store sets error flag if stop bit is not 1"]
            _11,
        }
        impl SSTOPR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SSTOPR::_0 => 0,
                    SSTOPR::_1 => 1,
                    SSTOPR::_10 => 2,
                    SSTOPR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SSTOPR {
                match value {
                    0 => SSTOPR::_0,
                    1 => SSTOPR::_1,
                    2 => SSTOPR::_10,
                    3 => SSTOPR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SSTOPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SSTOPR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == SSTOPR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == SSTOPR::_11
            }
        }
        #[doc = "Possible values of the field `INSRC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INSRCR {
            #[doc = "Pin"]
            _0,
            #[doc = "Shifter N+1 Output"]
            _1,
        }
        impl INSRCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INSRCR::_0 => false,
                    INSRCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INSRCR {
                match value {
                    false => INSRCR::_0,
                    true => INSRCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INSRCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INSRCR::_1
            }
        }
        #[doc = "Values that can be written to the field `SSTART`"]
        pub enum SSTARTW {
            #[doc = "Start bit disabled for transmitter/receiver/match store, transmitter loads data on enable"]
            _0,
            #[doc = "Start bit disabled for transmitter/receiver/match store, transmitter loads data on first shift"]
            _1,
            #[doc = "Transmitter outputs start bit value 0 before loading data on first shift, receiver/match store sets error flag if start bit is not 0"]
            _10,
            #[doc = "Transmitter outputs start bit value 1 before loading data on first shift, receiver/match store sets error flag if start bit is not 1"]
            _11,
        }
        impl SSTARTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SSTARTW::_0 => 0,
                    SSTARTW::_1 => 1,
                    SSTARTW::_10 => 2,
                    SSTARTW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SSTARTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SSTARTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SSTARTW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Start bit disabled for transmitter/receiver/match store, transmitter loads data on enable"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SSTARTW::_0)
            }
            #[doc = "Start bit disabled for transmitter/receiver/match store, transmitter loads data on first shift"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SSTARTW::_1)
            }
            #[doc = "Transmitter outputs start bit value 0 before loading data on first shift, receiver/match store sets error flag if start bit is not 0"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(SSTARTW::_10)
            }
            #[doc = "Transmitter outputs start bit value 1 before loading data on first shift, receiver/match store sets error flag if start bit is not 1"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(SSTARTW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SSTOP`"]
        pub enum SSTOPW {
            #[doc = "Stop bit disabled for transmitter/receiver/match store"]
            _0,
            #[doc = "Reserved for transmitter/receiver/match store"]
            _1,
            #[doc = "Transmitter outputs stop bit value 0 on store, receiver/match store sets error flag if stop bit is not 0"]
            _10,
            #[doc = "Transmitter outputs stop bit value 1 on store, receiver/match store sets error flag if stop bit is not 1"]
            _11,
        }
        impl SSTOPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SSTOPW::_0 => 0,
                    SSTOPW::_1 => 1,
                    SSTOPW::_10 => 2,
                    SSTOPW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SSTOPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SSTOPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SSTOPW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Stop bit disabled for transmitter/receiver/match store"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SSTOPW::_0)
            }
            #[doc = "Reserved for transmitter/receiver/match store"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SSTOPW::_1)
            }
            #[doc = "Transmitter outputs stop bit value 0 on store, receiver/match store sets error flag if stop bit is not 0"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(SSTOPW::_10)
            }
            #[doc = "Transmitter outputs stop bit value 1 on store, receiver/match store sets error flag if stop bit is not 1"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(SSTOPW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INSRC`"]
        pub enum INSRCW {
            #[doc = "Pin"]
            _0,
            #[doc = "Shifter N+1 Output"]
            _1,
        }
        impl INSRCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INSRCW::_0 => false,
                    INSRCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INSRCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INSRCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INSRCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INSRCW::_0)
            }
            #[doc = "Shifter N+1 Output"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INSRCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:1 - Shifter Start bit"]
            #[inline(always)]
            pub fn sstart(&self) -> SSTARTR {
                SSTARTR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 4:5 - Shifter Stop bit"]
            #[inline(always)]
            pub fn sstop(&self) -> SSTOPR {
                SSTOPR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 8 - Input Source"]
            #[inline(always)]
            pub fn insrc(&self) -> INSRCR {
                INSRCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:1 - Shifter Start bit"]
            #[inline(always)]
            pub fn sstart(&mut self) -> _SSTARTW {
                _SSTARTW { w: self }
            }
            #[doc = "Bits 4:5 - Shifter Stop bit"]
            #[inline(always)]
            pub fn sstop(&mut self) -> _SSTOPW {
                _SSTOPW { w: self }
            }
            #[doc = "Bit 8 - Input Source"]
            #[inline(always)]
            pub fn insrc(&mut self) -> _INSRCW {
                _INSRCW { w: self }
            }
        }
    }
    #[doc = "Shifter Configuration N Register"]
    pub struct SHIFTCFG3 {
        register: VolatileCell<u32>,
    }
    #[doc = "Shifter Configuration N Register"]
    pub mod shiftcfg3 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SHIFTCFG3 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `SSTART`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SSTARTR {
            #[doc = "Start bit disabled for transmitter/receiver/match store, transmitter loads data on enable"]
            _0,
            #[doc = "Start bit disabled for transmitter/receiver/match store, transmitter loads data on first shift"]
            _1,
            #[doc = "Transmitter outputs start bit value 0 before loading data on first shift, receiver/match store sets error flag if start bit is not 0"]
            _10,
            #[doc = "Transmitter outputs start bit value 1 before loading data on first shift, receiver/match store sets error flag if start bit is not 1"]
            _11,
        }
        impl SSTARTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SSTARTR::_0 => 0,
                    SSTARTR::_1 => 1,
                    SSTARTR::_10 => 2,
                    SSTARTR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SSTARTR {
                match value {
                    0 => SSTARTR::_0,
                    1 => SSTARTR::_1,
                    2 => SSTARTR::_10,
                    3 => SSTARTR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SSTARTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SSTARTR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == SSTARTR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == SSTARTR::_11
            }
        }
        #[doc = "Possible values of the field `SSTOP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SSTOPR {
            #[doc = "Stop bit disabled for transmitter/receiver/match store"]
            _0,
            #[doc = "Reserved for transmitter/receiver/match store"]
            _1,
            #[doc = "Transmitter outputs stop bit value 0 on store, receiver/match store sets error flag if stop bit is not 0"]
            _10,
            #[doc = "Transmitter outputs stop bit value 1 on store, receiver/match store sets error flag if stop bit is not 1"]
            _11,
        }
        impl SSTOPR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SSTOPR::_0 => 0,
                    SSTOPR::_1 => 1,
                    SSTOPR::_10 => 2,
                    SSTOPR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SSTOPR {
                match value {
                    0 => SSTOPR::_0,
                    1 => SSTOPR::_1,
                    2 => SSTOPR::_10,
                    3 => SSTOPR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SSTOPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SSTOPR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == SSTOPR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == SSTOPR::_11
            }
        }
        #[doc = "Possible values of the field `INSRC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INSRCR {
            #[doc = "Pin"]
            _0,
            #[doc = "Shifter N+1 Output"]
            _1,
        }
        impl INSRCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INSRCR::_0 => false,
                    INSRCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INSRCR {
                match value {
                    false => INSRCR::_0,
                    true => INSRCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INSRCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INSRCR::_1
            }
        }
        #[doc = "Values that can be written to the field `SSTART`"]
        pub enum SSTARTW {
            #[doc = "Start bit disabled for transmitter/receiver/match store, transmitter loads data on enable"]
            _0,
            #[doc = "Start bit disabled for transmitter/receiver/match store, transmitter loads data on first shift"]
            _1,
            #[doc = "Transmitter outputs start bit value 0 before loading data on first shift, receiver/match store sets error flag if start bit is not 0"]
            _10,
            #[doc = "Transmitter outputs start bit value 1 before loading data on first shift, receiver/match store sets error flag if start bit is not 1"]
            _11,
        }
        impl SSTARTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SSTARTW::_0 => 0,
                    SSTARTW::_1 => 1,
                    SSTARTW::_10 => 2,
                    SSTARTW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SSTARTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SSTARTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SSTARTW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Start bit disabled for transmitter/receiver/match store, transmitter loads data on enable"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SSTARTW::_0)
            }
            #[doc = "Start bit disabled for transmitter/receiver/match store, transmitter loads data on first shift"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SSTARTW::_1)
            }
            #[doc = "Transmitter outputs start bit value 0 before loading data on first shift, receiver/match store sets error flag if start bit is not 0"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(SSTARTW::_10)
            }
            #[doc = "Transmitter outputs start bit value 1 before loading data on first shift, receiver/match store sets error flag if start bit is not 1"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(SSTARTW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SSTOP`"]
        pub enum SSTOPW {
            #[doc = "Stop bit disabled for transmitter/receiver/match store"]
            _0,
            #[doc = "Reserved for transmitter/receiver/match store"]
            _1,
            #[doc = "Transmitter outputs stop bit value 0 on store, receiver/match store sets error flag if stop bit is not 0"]
            _10,
            #[doc = "Transmitter outputs stop bit value 1 on store, receiver/match store sets error flag if stop bit is not 1"]
            _11,
        }
        impl SSTOPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SSTOPW::_0 => 0,
                    SSTOPW::_1 => 1,
                    SSTOPW::_10 => 2,
                    SSTOPW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SSTOPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SSTOPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SSTOPW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Stop bit disabled for transmitter/receiver/match store"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SSTOPW::_0)
            }
            #[doc = "Reserved for transmitter/receiver/match store"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SSTOPW::_1)
            }
            #[doc = "Transmitter outputs stop bit value 0 on store, receiver/match store sets error flag if stop bit is not 0"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(SSTOPW::_10)
            }
            #[doc = "Transmitter outputs stop bit value 1 on store, receiver/match store sets error flag if stop bit is not 1"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(SSTOPW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INSRC`"]
        pub enum INSRCW {
            #[doc = "Pin"]
            _0,
            #[doc = "Shifter N+1 Output"]
            _1,
        }
        impl INSRCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INSRCW::_0 => false,
                    INSRCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INSRCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INSRCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INSRCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INSRCW::_0)
            }
            #[doc = "Shifter N+1 Output"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INSRCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:1 - Shifter Start bit"]
            #[inline(always)]
            pub fn sstart(&self) -> SSTARTR {
                SSTARTR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 4:5 - Shifter Stop bit"]
            #[inline(always)]
            pub fn sstop(&self) -> SSTOPR {
                SSTOPR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 8 - Input Source"]
            #[inline(always)]
            pub fn insrc(&self) -> INSRCR {
                INSRCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:1 - Shifter Start bit"]
            #[inline(always)]
            pub fn sstart(&mut self) -> _SSTARTW {
                _SSTARTW { w: self }
            }
            #[doc = "Bits 4:5 - Shifter Stop bit"]
            #[inline(always)]
            pub fn sstop(&mut self) -> _SSTOPW {
                _SSTOPW { w: self }
            }
            #[doc = "Bit 8 - Input Source"]
            #[inline(always)]
            pub fn insrc(&mut self) -> _INSRCW {
                _INSRCW { w: self }
            }
        }
    }
    #[doc = "Shifter Buffer N Register"]
    pub struct SHIFTBUF0 {
        register: VolatileCell<u32>,
    }
    #[doc = "Shifter Buffer N Register"]
    pub mod shiftbuf0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SHIFTBUF0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SHIFTBUFR {
            bits: u32,
        }
        impl SHIFTBUFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SHIFTBUFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SHIFTBUFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Shift Buffer"]
            #[inline(always)]
            pub fn shiftbuf(&self) -> SHIFTBUFR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SHIFTBUFR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Shift Buffer"]
            #[inline(always)]
            pub fn shiftbuf(&mut self) -> _SHIFTBUFW {
                _SHIFTBUFW { w: self }
            }
        }
    }
    #[doc = "Shifter Buffer N Register"]
    pub struct SHIFTBUF1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Shifter Buffer N Register"]
    pub mod shiftbuf1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SHIFTBUF1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SHIFTBUFR {
            bits: u32,
        }
        impl SHIFTBUFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SHIFTBUFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SHIFTBUFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Shift Buffer"]
            #[inline(always)]
            pub fn shiftbuf(&self) -> SHIFTBUFR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SHIFTBUFR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Shift Buffer"]
            #[inline(always)]
            pub fn shiftbuf(&mut self) -> _SHIFTBUFW {
                _SHIFTBUFW { w: self }
            }
        }
    }
    #[doc = "Shifter Buffer N Register"]
    pub struct SHIFTBUF2 {
        register: VolatileCell<u32>,
    }
    #[doc = "Shifter Buffer N Register"]
    pub mod shiftbuf2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SHIFTBUF2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SHIFTBUFR {
            bits: u32,
        }
        impl SHIFTBUFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SHIFTBUFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SHIFTBUFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Shift Buffer"]
            #[inline(always)]
            pub fn shiftbuf(&self) -> SHIFTBUFR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SHIFTBUFR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Shift Buffer"]
            #[inline(always)]
            pub fn shiftbuf(&mut self) -> _SHIFTBUFW {
                _SHIFTBUFW { w: self }
            }
        }
    }
    #[doc = "Shifter Buffer N Register"]
    pub struct SHIFTBUF3 {
        register: VolatileCell<u32>,
    }
    #[doc = "Shifter Buffer N Register"]
    pub mod shiftbuf3 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SHIFTBUF3 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SHIFTBUFR {
            bits: u32,
        }
        impl SHIFTBUFR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SHIFTBUFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SHIFTBUFW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Shift Buffer"]
            #[inline(always)]
            pub fn shiftbuf(&self) -> SHIFTBUFR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SHIFTBUFR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Shift Buffer"]
            #[inline(always)]
            pub fn shiftbuf(&mut self) -> _SHIFTBUFW {
                _SHIFTBUFW { w: self }
            }
        }
    }
    #[doc = "Shifter Buffer N Bit Swapped Register"]
    pub struct SHIFTBUFBIS0 {
        register: VolatileCell<u32>,
    }
    #[doc = "Shifter Buffer N Bit Swapped Register"]
    pub mod shiftbufbis0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SHIFTBUFBIS0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SHIFTBUFBISR {
            bits: u32,
        }
        impl SHIFTBUFBISR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SHIFTBUFBISW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SHIFTBUFBISW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Shift Buffer"]
            #[inline(always)]
            pub fn shiftbufbis(&self) -> SHIFTBUFBISR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SHIFTBUFBISR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Shift Buffer"]
            #[inline(always)]
            pub fn shiftbufbis(&mut self) -> _SHIFTBUFBISW {
                _SHIFTBUFBISW { w: self }
            }
        }
    }
    #[doc = "Shifter Buffer N Bit Swapped Register"]
    pub struct SHIFTBUFBIS1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Shifter Buffer N Bit Swapped Register"]
    pub mod shiftbufbis1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SHIFTBUFBIS1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SHIFTBUFBISR {
            bits: u32,
        }
        impl SHIFTBUFBISR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SHIFTBUFBISW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SHIFTBUFBISW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Shift Buffer"]
            #[inline(always)]
            pub fn shiftbufbis(&self) -> SHIFTBUFBISR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SHIFTBUFBISR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Shift Buffer"]
            #[inline(always)]
            pub fn shiftbufbis(&mut self) -> _SHIFTBUFBISW {
                _SHIFTBUFBISW { w: self }
            }
        }
    }
    #[doc = "Shifter Buffer N Bit Swapped Register"]
    pub struct SHIFTBUFBIS2 {
        register: VolatileCell<u32>,
    }
    #[doc = "Shifter Buffer N Bit Swapped Register"]
    pub mod shiftbufbis2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SHIFTBUFBIS2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SHIFTBUFBISR {
            bits: u32,
        }
        impl SHIFTBUFBISR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SHIFTBUFBISW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SHIFTBUFBISW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Shift Buffer"]
            #[inline(always)]
            pub fn shiftbufbis(&self) -> SHIFTBUFBISR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SHIFTBUFBISR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Shift Buffer"]
            #[inline(always)]
            pub fn shiftbufbis(&mut self) -> _SHIFTBUFBISW {
                _SHIFTBUFBISW { w: self }
            }
        }
    }
    #[doc = "Shifter Buffer N Bit Swapped Register"]
    pub struct SHIFTBUFBIS3 {
        register: VolatileCell<u32>,
    }
    #[doc = "Shifter Buffer N Bit Swapped Register"]
    pub mod shiftbufbis3 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SHIFTBUFBIS3 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SHIFTBUFBISR {
            bits: u32,
        }
        impl SHIFTBUFBISR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SHIFTBUFBISW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SHIFTBUFBISW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Shift Buffer"]
            #[inline(always)]
            pub fn shiftbufbis(&self) -> SHIFTBUFBISR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SHIFTBUFBISR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Shift Buffer"]
            #[inline(always)]
            pub fn shiftbufbis(&mut self) -> _SHIFTBUFBISW {
                _SHIFTBUFBISW { w: self }
            }
        }
    }
    #[doc = "Shifter Buffer N Byte Swapped Register"]
    pub struct SHIFTBUFBYS0 {
        register: VolatileCell<u32>,
    }
    #[doc = "Shifter Buffer N Byte Swapped Register"]
    pub mod shiftbufbys0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SHIFTBUFBYS0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SHIFTBUFBYSR {
            bits: u32,
        }
        impl SHIFTBUFBYSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SHIFTBUFBYSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SHIFTBUFBYSW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Shift Buffer"]
            #[inline(always)]
            pub fn shiftbufbys(&self) -> SHIFTBUFBYSR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SHIFTBUFBYSR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Shift Buffer"]
            #[inline(always)]
            pub fn shiftbufbys(&mut self) -> _SHIFTBUFBYSW {
                _SHIFTBUFBYSW { w: self }
            }
        }
    }
    #[doc = "Shifter Buffer N Byte Swapped Register"]
    pub struct SHIFTBUFBYS1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Shifter Buffer N Byte Swapped Register"]
    pub mod shiftbufbys1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SHIFTBUFBYS1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SHIFTBUFBYSR {
            bits: u32,
        }
        impl SHIFTBUFBYSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SHIFTBUFBYSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SHIFTBUFBYSW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Shift Buffer"]
            #[inline(always)]
            pub fn shiftbufbys(&self) -> SHIFTBUFBYSR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SHIFTBUFBYSR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Shift Buffer"]
            #[inline(always)]
            pub fn shiftbufbys(&mut self) -> _SHIFTBUFBYSW {
                _SHIFTBUFBYSW { w: self }
            }
        }
    }
    #[doc = "Shifter Buffer N Byte Swapped Register"]
    pub struct SHIFTBUFBYS2 {
        register: VolatileCell<u32>,
    }
    #[doc = "Shifter Buffer N Byte Swapped Register"]
    pub mod shiftbufbys2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SHIFTBUFBYS2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SHIFTBUFBYSR {
            bits: u32,
        }
        impl SHIFTBUFBYSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SHIFTBUFBYSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SHIFTBUFBYSW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Shift Buffer"]
            #[inline(always)]
            pub fn shiftbufbys(&self) -> SHIFTBUFBYSR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SHIFTBUFBYSR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Shift Buffer"]
            #[inline(always)]
            pub fn shiftbufbys(&mut self) -> _SHIFTBUFBYSW {
                _SHIFTBUFBYSW { w: self }
            }
        }
    }
    #[doc = "Shifter Buffer N Byte Swapped Register"]
    pub struct SHIFTBUFBYS3 {
        register: VolatileCell<u32>,
    }
    #[doc = "Shifter Buffer N Byte Swapped Register"]
    pub mod shiftbufbys3 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SHIFTBUFBYS3 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SHIFTBUFBYSR {
            bits: u32,
        }
        impl SHIFTBUFBYSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SHIFTBUFBYSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SHIFTBUFBYSW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Shift Buffer"]
            #[inline(always)]
            pub fn shiftbufbys(&self) -> SHIFTBUFBYSR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SHIFTBUFBYSR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Shift Buffer"]
            #[inline(always)]
            pub fn shiftbufbys(&mut self) -> _SHIFTBUFBYSW {
                _SHIFTBUFBYSW { w: self }
            }
        }
    }
    #[doc = "Shifter Buffer N Bit Byte Swapped Register"]
    pub struct SHIFTBUFBBS0 {
        register: VolatileCell<u32>,
    }
    #[doc = "Shifter Buffer N Bit Byte Swapped Register"]
    pub mod shiftbufbbs0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SHIFTBUFBBS0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SHIFTBUFBBSR {
            bits: u32,
        }
        impl SHIFTBUFBBSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SHIFTBUFBBSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SHIFTBUFBBSW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Shift Buffer"]
            #[inline(always)]
            pub fn shiftbufbbs(&self) -> SHIFTBUFBBSR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SHIFTBUFBBSR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Shift Buffer"]
            #[inline(always)]
            pub fn shiftbufbbs(&mut self) -> _SHIFTBUFBBSW {
                _SHIFTBUFBBSW { w: self }
            }
        }
    }
    #[doc = "Shifter Buffer N Bit Byte Swapped Register"]
    pub struct SHIFTBUFBBS1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Shifter Buffer N Bit Byte Swapped Register"]
    pub mod shiftbufbbs1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SHIFTBUFBBS1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SHIFTBUFBBSR {
            bits: u32,
        }
        impl SHIFTBUFBBSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SHIFTBUFBBSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SHIFTBUFBBSW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Shift Buffer"]
            #[inline(always)]
            pub fn shiftbufbbs(&self) -> SHIFTBUFBBSR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SHIFTBUFBBSR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Shift Buffer"]
            #[inline(always)]
            pub fn shiftbufbbs(&mut self) -> _SHIFTBUFBBSW {
                _SHIFTBUFBBSW { w: self }
            }
        }
    }
    #[doc = "Shifter Buffer N Bit Byte Swapped Register"]
    pub struct SHIFTBUFBBS2 {
        register: VolatileCell<u32>,
    }
    #[doc = "Shifter Buffer N Bit Byte Swapped Register"]
    pub mod shiftbufbbs2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SHIFTBUFBBS2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SHIFTBUFBBSR {
            bits: u32,
        }
        impl SHIFTBUFBBSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SHIFTBUFBBSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SHIFTBUFBBSW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Shift Buffer"]
            #[inline(always)]
            pub fn shiftbufbbs(&self) -> SHIFTBUFBBSR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SHIFTBUFBBSR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Shift Buffer"]
            #[inline(always)]
            pub fn shiftbufbbs(&mut self) -> _SHIFTBUFBBSW {
                _SHIFTBUFBBSW { w: self }
            }
        }
    }
    #[doc = "Shifter Buffer N Bit Byte Swapped Register"]
    pub struct SHIFTBUFBBS3 {
        register: VolatileCell<u32>,
    }
    #[doc = "Shifter Buffer N Bit Byte Swapped Register"]
    pub mod shiftbufbbs3 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SHIFTBUFBBS3 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SHIFTBUFBBSR {
            bits: u32,
        }
        impl SHIFTBUFBBSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _SHIFTBUFBBSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SHIFTBUFBBSW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Shift Buffer"]
            #[inline(always)]
            pub fn shiftbufbbs(&self) -> SHIFTBUFBBSR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                SHIFTBUFBBSR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Shift Buffer"]
            #[inline(always)]
            pub fn shiftbufbbs(&mut self) -> _SHIFTBUFBBSW {
                _SHIFTBUFBBSW { w: self }
            }
        }
    }
    #[doc = "Timer Control N Register"]
    pub struct TIMCTL0 {
        register: VolatileCell<u32>,
    }
    #[doc = "Timer Control N Register"]
    pub mod timctl0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TIMCTL0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TIMOD`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIMODR {
            #[doc = "Timer Disabled."]
            _0,
            #[doc = "Dual 8-bit counters baud/bit mode."]
            _1,
            #[doc = "Dual 8-bit counters PWM mode."]
            _10,
            #[doc = "Single 16-bit counter mode."]
            _11,
        }
        impl TIMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TIMODR::_0 => 0,
                    TIMODR::_1 => 1,
                    TIMODR::_10 => 2,
                    TIMODR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TIMODR {
                match value {
                    0 => TIMODR::_0,
                    1 => TIMODR::_1,
                    2 => TIMODR::_10,
                    3 => TIMODR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIMODR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TIMODR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == TIMODR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == TIMODR::_11
            }
        }
        #[doc = "Possible values of the field `PINPOL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PINPOLR {
            #[doc = "Pin is active high"]
            _0,
            #[doc = "Pin is active low"]
            _1,
        }
        impl PINPOLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PINPOLR::_0 => false,
                    PINPOLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PINPOLR {
                match value {
                    false => PINPOLR::_0,
                    true => PINPOLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PINPOLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PINPOLR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct PINSELR {
            bits: u8,
        }
        impl PINSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `PINCFG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PINCFGR {
            #[doc = "Timer pin output disabled"]
            _0,
            #[doc = "Timer pin open drain or bidirectional output enable"]
            _1,
            #[doc = "Timer pin bidirectional output data"]
            _10,
            #[doc = "Timer pin output"]
            _11,
        }
        impl PINCFGR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PINCFGR::_0 => 0,
                    PINCFGR::_1 => 1,
                    PINCFGR::_10 => 2,
                    PINCFGR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PINCFGR {
                match value {
                    0 => PINCFGR::_0,
                    1 => PINCFGR::_1,
                    2 => PINCFGR::_10,
                    3 => PINCFGR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PINCFGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PINCFGR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == PINCFGR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == PINCFGR::_11
            }
        }
        #[doc = "Possible values of the field `TRGSRC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRGSRCR {
            #[doc = "External trigger selected"]
            _0,
            #[doc = "Internal trigger selected"]
            _1,
        }
        impl TRGSRCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRGSRCR::_0 => false,
                    TRGSRCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRGSRCR {
                match value {
                    false => TRGSRCR::_0,
                    true => TRGSRCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRGSRCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRGSRCR::_1
            }
        }
        #[doc = "Possible values of the field `TRGPOL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRGPOLR {
            #[doc = "Trigger active high"]
            _0,
            #[doc = "Trigger active low"]
            _1,
        }
        impl TRGPOLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRGPOLR::_0 => false,
                    TRGPOLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRGPOLR {
                match value {
                    false => TRGPOLR::_0,
                    true => TRGPOLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRGPOLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRGPOLR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct TRGSELR {
            bits: u8,
        }
        impl TRGSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Values that can be written to the field `TIMOD`"]
        pub enum TIMODW {
            #[doc = "Timer Disabled."]
            _0,
            #[doc = "Dual 8-bit counters baud/bit mode."]
            _1,
            #[doc = "Dual 8-bit counters PWM mode."]
            _10,
            #[doc = "Single 16-bit counter mode."]
            _11,
        }
        impl TIMODW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TIMODW::_0 => 0,
                    TIMODW::_1 => 1,
                    TIMODW::_10 => 2,
                    TIMODW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIMODW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIMODW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Timer Disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIMODW::_0)
            }
            #[doc = "Dual 8-bit counters baud/bit mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TIMODW::_1)
            }
            #[doc = "Dual 8-bit counters PWM mode."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(TIMODW::_10)
            }
            #[doc = "Single 16-bit counter mode."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(TIMODW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PINPOL`"]
        pub enum PINPOLW {
            #[doc = "Pin is active high"]
            _0,
            #[doc = "Pin is active low"]
            _1,
        }
        impl PINPOLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PINPOLW::_0 => false,
                    PINPOLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PINPOLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PINPOLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PINPOLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin is active high"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PINPOLW::_0)
            }
            #[doc = "Pin is active low"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PINPOLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _PINSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PINSELW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PINCFG`"]
        pub enum PINCFGW {
            #[doc = "Timer pin output disabled"]
            _0,
            #[doc = "Timer pin open drain or bidirectional output enable"]
            _1,
            #[doc = "Timer pin bidirectional output data"]
            _10,
            #[doc = "Timer pin output"]
            _11,
        }
        impl PINCFGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PINCFGW::_0 => 0,
                    PINCFGW::_1 => 1,
                    PINCFGW::_10 => 2,
                    PINCFGW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PINCFGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PINCFGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PINCFGW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Timer pin output disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PINCFGW::_0)
            }
            #[doc = "Timer pin open drain or bidirectional output enable"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PINCFGW::_1)
            }
            #[doc = "Timer pin bidirectional output data"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(PINCFGW::_10)
            }
            #[doc = "Timer pin output"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(PINCFGW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRGSRC`"]
        pub enum TRGSRCW {
            #[doc = "External trigger selected"]
            _0,
            #[doc = "Internal trigger selected"]
            _1,
        }
        impl TRGSRCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRGSRCW::_0 => false,
                    TRGSRCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRGSRCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRGSRCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRGSRCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "External trigger selected"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRGSRCW::_0)
            }
            #[doc = "Internal trigger selected"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRGSRCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 22;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRGPOL`"]
        pub enum TRGPOLW {
            #[doc = "Trigger active high"]
            _0,
            #[doc = "Trigger active low"]
            _1,
        }
        impl TRGPOLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRGPOLW::_0 => false,
                    TRGPOLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRGPOLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRGPOLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRGPOLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Trigger active high"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRGPOLW::_0)
            }
            #[doc = "Trigger active low"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRGPOLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 23;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRGSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRGSELW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:1 - Timer Mode"]
            #[inline(always)]
            pub fn timod(&self) -> TIMODR {
                TIMODR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 7 - Timer Pin Polarity"]
            #[inline(always)]
            pub fn pinpol(&self) -> PINPOLR {
                PINPOLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Timer Pin Select"]
            #[inline(always)]
            pub fn pinsel(&self) -> PINSELR {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                PINSELR { bits }
            }
            #[doc = "Bits 16:17 - Timer Pin Configuration"]
            #[inline(always)]
            pub fn pincfg(&self) -> PINCFGR {
                PINCFGR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 22 - Trigger Source"]
            #[inline(always)]
            pub fn trgsrc(&self) -> TRGSRCR {
                TRGSRCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 23 - Trigger Polarity"]
            #[inline(always)]
            pub fn trgpol(&self) -> TRGPOLR {
                TRGPOLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 24:27 - Trigger Select"]
            #[inline(always)]
            pub fn trgsel(&self) -> TRGSELR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TRGSELR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:1 - Timer Mode"]
            #[inline(always)]
            pub fn timod(&mut self) -> _TIMODW {
                _TIMODW { w: self }
            }
            #[doc = "Bit 7 - Timer Pin Polarity"]
            #[inline(always)]
            pub fn pinpol(&mut self) -> _PINPOLW {
                _PINPOLW { w: self }
            }
            #[doc = "Bits 8:10 - Timer Pin Select"]
            #[inline(always)]
            pub fn pinsel(&mut self) -> _PINSELW {
                _PINSELW { w: self }
            }
            #[doc = "Bits 16:17 - Timer Pin Configuration"]
            #[inline(always)]
            pub fn pincfg(&mut self) -> _PINCFGW {
                _PINCFGW { w: self }
            }
            #[doc = "Bit 22 - Trigger Source"]
            #[inline(always)]
            pub fn trgsrc(&mut self) -> _TRGSRCW {
                _TRGSRCW { w: self }
            }
            #[doc = "Bit 23 - Trigger Polarity"]
            #[inline(always)]
            pub fn trgpol(&mut self) -> _TRGPOLW {
                _TRGPOLW { w: self }
            }
            #[doc = "Bits 24:27 - Trigger Select"]
            #[inline(always)]
            pub fn trgsel(&mut self) -> _TRGSELW {
                _TRGSELW { w: self }
            }
        }
    }
    #[doc = "Timer Control N Register"]
    pub struct TIMCTL1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Timer Control N Register"]
    pub mod timctl1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TIMCTL1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TIMOD`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIMODR {
            #[doc = "Timer Disabled."]
            _0,
            #[doc = "Dual 8-bit counters baud/bit mode."]
            _1,
            #[doc = "Dual 8-bit counters PWM mode."]
            _10,
            #[doc = "Single 16-bit counter mode."]
            _11,
        }
        impl TIMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TIMODR::_0 => 0,
                    TIMODR::_1 => 1,
                    TIMODR::_10 => 2,
                    TIMODR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TIMODR {
                match value {
                    0 => TIMODR::_0,
                    1 => TIMODR::_1,
                    2 => TIMODR::_10,
                    3 => TIMODR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIMODR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TIMODR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == TIMODR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == TIMODR::_11
            }
        }
        #[doc = "Possible values of the field `PINPOL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PINPOLR {
            #[doc = "Pin is active high"]
            _0,
            #[doc = "Pin is active low"]
            _1,
        }
        impl PINPOLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PINPOLR::_0 => false,
                    PINPOLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PINPOLR {
                match value {
                    false => PINPOLR::_0,
                    true => PINPOLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PINPOLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PINPOLR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct PINSELR {
            bits: u8,
        }
        impl PINSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `PINCFG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PINCFGR {
            #[doc = "Timer pin output disabled"]
            _0,
            #[doc = "Timer pin open drain or bidirectional output enable"]
            _1,
            #[doc = "Timer pin bidirectional output data"]
            _10,
            #[doc = "Timer pin output"]
            _11,
        }
        impl PINCFGR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PINCFGR::_0 => 0,
                    PINCFGR::_1 => 1,
                    PINCFGR::_10 => 2,
                    PINCFGR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PINCFGR {
                match value {
                    0 => PINCFGR::_0,
                    1 => PINCFGR::_1,
                    2 => PINCFGR::_10,
                    3 => PINCFGR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PINCFGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PINCFGR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == PINCFGR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == PINCFGR::_11
            }
        }
        #[doc = "Possible values of the field `TRGSRC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRGSRCR {
            #[doc = "External trigger selected"]
            _0,
            #[doc = "Internal trigger selected"]
            _1,
        }
        impl TRGSRCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRGSRCR::_0 => false,
                    TRGSRCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRGSRCR {
                match value {
                    false => TRGSRCR::_0,
                    true => TRGSRCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRGSRCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRGSRCR::_1
            }
        }
        #[doc = "Possible values of the field `TRGPOL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRGPOLR {
            #[doc = "Trigger active high"]
            _0,
            #[doc = "Trigger active low"]
            _1,
        }
        impl TRGPOLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRGPOLR::_0 => false,
                    TRGPOLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRGPOLR {
                match value {
                    false => TRGPOLR::_0,
                    true => TRGPOLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRGPOLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRGPOLR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct TRGSELR {
            bits: u8,
        }
        impl TRGSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Values that can be written to the field `TIMOD`"]
        pub enum TIMODW {
            #[doc = "Timer Disabled."]
            _0,
            #[doc = "Dual 8-bit counters baud/bit mode."]
            _1,
            #[doc = "Dual 8-bit counters PWM mode."]
            _10,
            #[doc = "Single 16-bit counter mode."]
            _11,
        }
        impl TIMODW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TIMODW::_0 => 0,
                    TIMODW::_1 => 1,
                    TIMODW::_10 => 2,
                    TIMODW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIMODW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIMODW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Timer Disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIMODW::_0)
            }
            #[doc = "Dual 8-bit counters baud/bit mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TIMODW::_1)
            }
            #[doc = "Dual 8-bit counters PWM mode."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(TIMODW::_10)
            }
            #[doc = "Single 16-bit counter mode."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(TIMODW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PINPOL`"]
        pub enum PINPOLW {
            #[doc = "Pin is active high"]
            _0,
            #[doc = "Pin is active low"]
            _1,
        }
        impl PINPOLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PINPOLW::_0 => false,
                    PINPOLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PINPOLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PINPOLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PINPOLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin is active high"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PINPOLW::_0)
            }
            #[doc = "Pin is active low"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PINPOLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _PINSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PINSELW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PINCFG`"]
        pub enum PINCFGW {
            #[doc = "Timer pin output disabled"]
            _0,
            #[doc = "Timer pin open drain or bidirectional output enable"]
            _1,
            #[doc = "Timer pin bidirectional output data"]
            _10,
            #[doc = "Timer pin output"]
            _11,
        }
        impl PINCFGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PINCFGW::_0 => 0,
                    PINCFGW::_1 => 1,
                    PINCFGW::_10 => 2,
                    PINCFGW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PINCFGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PINCFGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PINCFGW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Timer pin output disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PINCFGW::_0)
            }
            #[doc = "Timer pin open drain or bidirectional output enable"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PINCFGW::_1)
            }
            #[doc = "Timer pin bidirectional output data"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(PINCFGW::_10)
            }
            #[doc = "Timer pin output"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(PINCFGW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRGSRC`"]
        pub enum TRGSRCW {
            #[doc = "External trigger selected"]
            _0,
            #[doc = "Internal trigger selected"]
            _1,
        }
        impl TRGSRCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRGSRCW::_0 => false,
                    TRGSRCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRGSRCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRGSRCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRGSRCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "External trigger selected"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRGSRCW::_0)
            }
            #[doc = "Internal trigger selected"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRGSRCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 22;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRGPOL`"]
        pub enum TRGPOLW {
            #[doc = "Trigger active high"]
            _0,
            #[doc = "Trigger active low"]
            _1,
        }
        impl TRGPOLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRGPOLW::_0 => false,
                    TRGPOLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRGPOLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRGPOLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRGPOLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Trigger active high"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRGPOLW::_0)
            }
            #[doc = "Trigger active low"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRGPOLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 23;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRGSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRGSELW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:1 - Timer Mode"]
            #[inline(always)]
            pub fn timod(&self) -> TIMODR {
                TIMODR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 7 - Timer Pin Polarity"]
            #[inline(always)]
            pub fn pinpol(&self) -> PINPOLR {
                PINPOLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Timer Pin Select"]
            #[inline(always)]
            pub fn pinsel(&self) -> PINSELR {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                PINSELR { bits }
            }
            #[doc = "Bits 16:17 - Timer Pin Configuration"]
            #[inline(always)]
            pub fn pincfg(&self) -> PINCFGR {
                PINCFGR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 22 - Trigger Source"]
            #[inline(always)]
            pub fn trgsrc(&self) -> TRGSRCR {
                TRGSRCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 23 - Trigger Polarity"]
            #[inline(always)]
            pub fn trgpol(&self) -> TRGPOLR {
                TRGPOLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 24:27 - Trigger Select"]
            #[inline(always)]
            pub fn trgsel(&self) -> TRGSELR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TRGSELR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:1 - Timer Mode"]
            #[inline(always)]
            pub fn timod(&mut self) -> _TIMODW {
                _TIMODW { w: self }
            }
            #[doc = "Bit 7 - Timer Pin Polarity"]
            #[inline(always)]
            pub fn pinpol(&mut self) -> _PINPOLW {
                _PINPOLW { w: self }
            }
            #[doc = "Bits 8:10 - Timer Pin Select"]
            #[inline(always)]
            pub fn pinsel(&mut self) -> _PINSELW {
                _PINSELW { w: self }
            }
            #[doc = "Bits 16:17 - Timer Pin Configuration"]
            #[inline(always)]
            pub fn pincfg(&mut self) -> _PINCFGW {
                _PINCFGW { w: self }
            }
            #[doc = "Bit 22 - Trigger Source"]
            #[inline(always)]
            pub fn trgsrc(&mut self) -> _TRGSRCW {
                _TRGSRCW { w: self }
            }
            #[doc = "Bit 23 - Trigger Polarity"]
            #[inline(always)]
            pub fn trgpol(&mut self) -> _TRGPOLW {
                _TRGPOLW { w: self }
            }
            #[doc = "Bits 24:27 - Trigger Select"]
            #[inline(always)]
            pub fn trgsel(&mut self) -> _TRGSELW {
                _TRGSELW { w: self }
            }
        }
    }
    #[doc = "Timer Control N Register"]
    pub struct TIMCTL2 {
        register: VolatileCell<u32>,
    }
    #[doc = "Timer Control N Register"]
    pub mod timctl2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TIMCTL2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TIMOD`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIMODR {
            #[doc = "Timer Disabled."]
            _0,
            #[doc = "Dual 8-bit counters baud/bit mode."]
            _1,
            #[doc = "Dual 8-bit counters PWM mode."]
            _10,
            #[doc = "Single 16-bit counter mode."]
            _11,
        }
        impl TIMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TIMODR::_0 => 0,
                    TIMODR::_1 => 1,
                    TIMODR::_10 => 2,
                    TIMODR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TIMODR {
                match value {
                    0 => TIMODR::_0,
                    1 => TIMODR::_1,
                    2 => TIMODR::_10,
                    3 => TIMODR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIMODR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TIMODR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == TIMODR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == TIMODR::_11
            }
        }
        #[doc = "Possible values of the field `PINPOL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PINPOLR {
            #[doc = "Pin is active high"]
            _0,
            #[doc = "Pin is active low"]
            _1,
        }
        impl PINPOLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PINPOLR::_0 => false,
                    PINPOLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PINPOLR {
                match value {
                    false => PINPOLR::_0,
                    true => PINPOLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PINPOLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PINPOLR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct PINSELR {
            bits: u8,
        }
        impl PINSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `PINCFG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PINCFGR {
            #[doc = "Timer pin output disabled"]
            _0,
            #[doc = "Timer pin open drain or bidirectional output enable"]
            _1,
            #[doc = "Timer pin bidirectional output data"]
            _10,
            #[doc = "Timer pin output"]
            _11,
        }
        impl PINCFGR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PINCFGR::_0 => 0,
                    PINCFGR::_1 => 1,
                    PINCFGR::_10 => 2,
                    PINCFGR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PINCFGR {
                match value {
                    0 => PINCFGR::_0,
                    1 => PINCFGR::_1,
                    2 => PINCFGR::_10,
                    3 => PINCFGR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PINCFGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PINCFGR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == PINCFGR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == PINCFGR::_11
            }
        }
        #[doc = "Possible values of the field `TRGSRC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRGSRCR {
            #[doc = "External trigger selected"]
            _0,
            #[doc = "Internal trigger selected"]
            _1,
        }
        impl TRGSRCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRGSRCR::_0 => false,
                    TRGSRCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRGSRCR {
                match value {
                    false => TRGSRCR::_0,
                    true => TRGSRCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRGSRCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRGSRCR::_1
            }
        }
        #[doc = "Possible values of the field `TRGPOL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRGPOLR {
            #[doc = "Trigger active high"]
            _0,
            #[doc = "Trigger active low"]
            _1,
        }
        impl TRGPOLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRGPOLR::_0 => false,
                    TRGPOLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRGPOLR {
                match value {
                    false => TRGPOLR::_0,
                    true => TRGPOLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRGPOLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRGPOLR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct TRGSELR {
            bits: u8,
        }
        impl TRGSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Values that can be written to the field `TIMOD`"]
        pub enum TIMODW {
            #[doc = "Timer Disabled."]
            _0,
            #[doc = "Dual 8-bit counters baud/bit mode."]
            _1,
            #[doc = "Dual 8-bit counters PWM mode."]
            _10,
            #[doc = "Single 16-bit counter mode."]
            _11,
        }
        impl TIMODW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TIMODW::_0 => 0,
                    TIMODW::_1 => 1,
                    TIMODW::_10 => 2,
                    TIMODW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIMODW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIMODW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Timer Disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIMODW::_0)
            }
            #[doc = "Dual 8-bit counters baud/bit mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TIMODW::_1)
            }
            #[doc = "Dual 8-bit counters PWM mode."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(TIMODW::_10)
            }
            #[doc = "Single 16-bit counter mode."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(TIMODW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PINPOL`"]
        pub enum PINPOLW {
            #[doc = "Pin is active high"]
            _0,
            #[doc = "Pin is active low"]
            _1,
        }
        impl PINPOLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PINPOLW::_0 => false,
                    PINPOLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PINPOLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PINPOLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PINPOLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin is active high"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PINPOLW::_0)
            }
            #[doc = "Pin is active low"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PINPOLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _PINSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PINSELW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PINCFG`"]
        pub enum PINCFGW {
            #[doc = "Timer pin output disabled"]
            _0,
            #[doc = "Timer pin open drain or bidirectional output enable"]
            _1,
            #[doc = "Timer pin bidirectional output data"]
            _10,
            #[doc = "Timer pin output"]
            _11,
        }
        impl PINCFGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PINCFGW::_0 => 0,
                    PINCFGW::_1 => 1,
                    PINCFGW::_10 => 2,
                    PINCFGW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PINCFGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PINCFGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PINCFGW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Timer pin output disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PINCFGW::_0)
            }
            #[doc = "Timer pin open drain or bidirectional output enable"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PINCFGW::_1)
            }
            #[doc = "Timer pin bidirectional output data"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(PINCFGW::_10)
            }
            #[doc = "Timer pin output"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(PINCFGW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRGSRC`"]
        pub enum TRGSRCW {
            #[doc = "External trigger selected"]
            _0,
            #[doc = "Internal trigger selected"]
            _1,
        }
        impl TRGSRCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRGSRCW::_0 => false,
                    TRGSRCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRGSRCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRGSRCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRGSRCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "External trigger selected"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRGSRCW::_0)
            }
            #[doc = "Internal trigger selected"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRGSRCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 22;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRGPOL`"]
        pub enum TRGPOLW {
            #[doc = "Trigger active high"]
            _0,
            #[doc = "Trigger active low"]
            _1,
        }
        impl TRGPOLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRGPOLW::_0 => false,
                    TRGPOLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRGPOLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRGPOLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRGPOLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Trigger active high"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRGPOLW::_0)
            }
            #[doc = "Trigger active low"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRGPOLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 23;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRGSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRGSELW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:1 - Timer Mode"]
            #[inline(always)]
            pub fn timod(&self) -> TIMODR {
                TIMODR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 7 - Timer Pin Polarity"]
            #[inline(always)]
            pub fn pinpol(&self) -> PINPOLR {
                PINPOLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Timer Pin Select"]
            #[inline(always)]
            pub fn pinsel(&self) -> PINSELR {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                PINSELR { bits }
            }
            #[doc = "Bits 16:17 - Timer Pin Configuration"]
            #[inline(always)]
            pub fn pincfg(&self) -> PINCFGR {
                PINCFGR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 22 - Trigger Source"]
            #[inline(always)]
            pub fn trgsrc(&self) -> TRGSRCR {
                TRGSRCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 23 - Trigger Polarity"]
            #[inline(always)]
            pub fn trgpol(&self) -> TRGPOLR {
                TRGPOLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 24:27 - Trigger Select"]
            #[inline(always)]
            pub fn trgsel(&self) -> TRGSELR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TRGSELR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:1 - Timer Mode"]
            #[inline(always)]
            pub fn timod(&mut self) -> _TIMODW {
                _TIMODW { w: self }
            }
            #[doc = "Bit 7 - Timer Pin Polarity"]
            #[inline(always)]
            pub fn pinpol(&mut self) -> _PINPOLW {
                _PINPOLW { w: self }
            }
            #[doc = "Bits 8:10 - Timer Pin Select"]
            #[inline(always)]
            pub fn pinsel(&mut self) -> _PINSELW {
                _PINSELW { w: self }
            }
            #[doc = "Bits 16:17 - Timer Pin Configuration"]
            #[inline(always)]
            pub fn pincfg(&mut self) -> _PINCFGW {
                _PINCFGW { w: self }
            }
            #[doc = "Bit 22 - Trigger Source"]
            #[inline(always)]
            pub fn trgsrc(&mut self) -> _TRGSRCW {
                _TRGSRCW { w: self }
            }
            #[doc = "Bit 23 - Trigger Polarity"]
            #[inline(always)]
            pub fn trgpol(&mut self) -> _TRGPOLW {
                _TRGPOLW { w: self }
            }
            #[doc = "Bits 24:27 - Trigger Select"]
            #[inline(always)]
            pub fn trgsel(&mut self) -> _TRGSELW {
                _TRGSELW { w: self }
            }
        }
    }
    #[doc = "Timer Control N Register"]
    pub struct TIMCTL3 {
        register: VolatileCell<u32>,
    }
    #[doc = "Timer Control N Register"]
    pub mod timctl3 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TIMCTL3 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TIMOD`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIMODR {
            #[doc = "Timer Disabled."]
            _0,
            #[doc = "Dual 8-bit counters baud/bit mode."]
            _1,
            #[doc = "Dual 8-bit counters PWM mode."]
            _10,
            #[doc = "Single 16-bit counter mode."]
            _11,
        }
        impl TIMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TIMODR::_0 => 0,
                    TIMODR::_1 => 1,
                    TIMODR::_10 => 2,
                    TIMODR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TIMODR {
                match value {
                    0 => TIMODR::_0,
                    1 => TIMODR::_1,
                    2 => TIMODR::_10,
                    3 => TIMODR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIMODR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TIMODR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == TIMODR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == TIMODR::_11
            }
        }
        #[doc = "Possible values of the field `PINPOL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PINPOLR {
            #[doc = "Pin is active high"]
            _0,
            #[doc = "Pin is active low"]
            _1,
        }
        impl PINPOLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PINPOLR::_0 => false,
                    PINPOLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PINPOLR {
                match value {
                    false => PINPOLR::_0,
                    true => PINPOLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PINPOLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PINPOLR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct PINSELR {
            bits: u8,
        }
        impl PINSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `PINCFG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PINCFGR {
            #[doc = "Timer pin output disabled"]
            _0,
            #[doc = "Timer pin open drain or bidirectional output enable"]
            _1,
            #[doc = "Timer pin bidirectional output data"]
            _10,
            #[doc = "Timer pin output"]
            _11,
        }
        impl PINCFGR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PINCFGR::_0 => 0,
                    PINCFGR::_1 => 1,
                    PINCFGR::_10 => 2,
                    PINCFGR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PINCFGR {
                match value {
                    0 => PINCFGR::_0,
                    1 => PINCFGR::_1,
                    2 => PINCFGR::_10,
                    3 => PINCFGR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PINCFGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PINCFGR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == PINCFGR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == PINCFGR::_11
            }
        }
        #[doc = "Possible values of the field `TRGSRC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRGSRCR {
            #[doc = "External trigger selected"]
            _0,
            #[doc = "Internal trigger selected"]
            _1,
        }
        impl TRGSRCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRGSRCR::_0 => false,
                    TRGSRCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRGSRCR {
                match value {
                    false => TRGSRCR::_0,
                    true => TRGSRCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRGSRCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRGSRCR::_1
            }
        }
        #[doc = "Possible values of the field `TRGPOL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRGPOLR {
            #[doc = "Trigger active high"]
            _0,
            #[doc = "Trigger active low"]
            _1,
        }
        impl TRGPOLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TRGPOLR::_0 => false,
                    TRGPOLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TRGPOLR {
                match value {
                    false => TRGPOLR::_0,
                    true => TRGPOLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TRGPOLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TRGPOLR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct TRGSELR {
            bits: u8,
        }
        impl TRGSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Values that can be written to the field `TIMOD`"]
        pub enum TIMODW {
            #[doc = "Timer Disabled."]
            _0,
            #[doc = "Dual 8-bit counters baud/bit mode."]
            _1,
            #[doc = "Dual 8-bit counters PWM mode."]
            _10,
            #[doc = "Single 16-bit counter mode."]
            _11,
        }
        impl TIMODW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TIMODW::_0 => 0,
                    TIMODW::_1 => 1,
                    TIMODW::_10 => 2,
                    TIMODW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIMODW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIMODW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Timer Disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIMODW::_0)
            }
            #[doc = "Dual 8-bit counters baud/bit mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TIMODW::_1)
            }
            #[doc = "Dual 8-bit counters PWM mode."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(TIMODW::_10)
            }
            #[doc = "Single 16-bit counter mode."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(TIMODW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PINPOL`"]
        pub enum PINPOLW {
            #[doc = "Pin is active high"]
            _0,
            #[doc = "Pin is active low"]
            _1,
        }
        impl PINPOLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PINPOLW::_0 => false,
                    PINPOLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PINPOLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PINPOLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PINPOLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin is active high"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PINPOLW::_0)
            }
            #[doc = "Pin is active low"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PINPOLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _PINSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PINSELW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PINCFG`"]
        pub enum PINCFGW {
            #[doc = "Timer pin output disabled"]
            _0,
            #[doc = "Timer pin open drain or bidirectional output enable"]
            _1,
            #[doc = "Timer pin bidirectional output data"]
            _10,
            #[doc = "Timer pin output"]
            _11,
        }
        impl PINCFGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PINCFGW::_0 => 0,
                    PINCFGW::_1 => 1,
                    PINCFGW::_10 => 2,
                    PINCFGW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PINCFGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PINCFGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PINCFGW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Timer pin output disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PINCFGW::_0)
            }
            #[doc = "Timer pin open drain or bidirectional output enable"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PINCFGW::_1)
            }
            #[doc = "Timer pin bidirectional output data"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(PINCFGW::_10)
            }
            #[doc = "Timer pin output"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(PINCFGW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRGSRC`"]
        pub enum TRGSRCW {
            #[doc = "External trigger selected"]
            _0,
            #[doc = "Internal trigger selected"]
            _1,
        }
        impl TRGSRCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRGSRCW::_0 => false,
                    TRGSRCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRGSRCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRGSRCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRGSRCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "External trigger selected"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRGSRCW::_0)
            }
            #[doc = "Internal trigger selected"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRGSRCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 22;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TRGPOL`"]
        pub enum TRGPOLW {
            #[doc = "Trigger active high"]
            _0,
            #[doc = "Trigger active low"]
            _1,
        }
        impl TRGPOLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TRGPOLW::_0 => false,
                    TRGPOLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRGPOLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRGPOLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRGPOLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Trigger active high"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TRGPOLW::_0)
            }
            #[doc = "Trigger active low"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TRGPOLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 23;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRGSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRGSELW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:1 - Timer Mode"]
            #[inline(always)]
            pub fn timod(&self) -> TIMODR {
                TIMODR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 7 - Timer Pin Polarity"]
            #[inline(always)]
            pub fn pinpol(&self) -> PINPOLR {
                PINPOLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Timer Pin Select"]
            #[inline(always)]
            pub fn pinsel(&self) -> PINSELR {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                PINSELR { bits }
            }
            #[doc = "Bits 16:17 - Timer Pin Configuration"]
            #[inline(always)]
            pub fn pincfg(&self) -> PINCFGR {
                PINCFGR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 22 - Trigger Source"]
            #[inline(always)]
            pub fn trgsrc(&self) -> TRGSRCR {
                TRGSRCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 23 - Trigger Polarity"]
            #[inline(always)]
            pub fn trgpol(&self) -> TRGPOLR {
                TRGPOLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 24:27 - Trigger Select"]
            #[inline(always)]
            pub fn trgsel(&self) -> TRGSELR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TRGSELR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:1 - Timer Mode"]
            #[inline(always)]
            pub fn timod(&mut self) -> _TIMODW {
                _TIMODW { w: self }
            }
            #[doc = "Bit 7 - Timer Pin Polarity"]
            #[inline(always)]
            pub fn pinpol(&mut self) -> _PINPOLW {
                _PINPOLW { w: self }
            }
            #[doc = "Bits 8:10 - Timer Pin Select"]
            #[inline(always)]
            pub fn pinsel(&mut self) -> _PINSELW {
                _PINSELW { w: self }
            }
            #[doc = "Bits 16:17 - Timer Pin Configuration"]
            #[inline(always)]
            pub fn pincfg(&mut self) -> _PINCFGW {
                _PINCFGW { w: self }
            }
            #[doc = "Bit 22 - Trigger Source"]
            #[inline(always)]
            pub fn trgsrc(&mut self) -> _TRGSRCW {
                _TRGSRCW { w: self }
            }
            #[doc = "Bit 23 - Trigger Polarity"]
            #[inline(always)]
            pub fn trgpol(&mut self) -> _TRGPOLW {
                _TRGPOLW { w: self }
            }
            #[doc = "Bits 24:27 - Trigger Select"]
            #[inline(always)]
            pub fn trgsel(&mut self) -> _TRGSELW {
                _TRGSELW { w: self }
            }
        }
    }
    #[doc = "Timer Configuration N Register"]
    pub struct TIMCFG0 {
        register: VolatileCell<u32>,
    }
    #[doc = "Timer Configuration N Register"]
    pub mod timcfg0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TIMCFG0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TSTART`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TSTARTR {
            #[doc = "Start bit disabled"]
            _0,
            #[doc = "Start bit enabled"]
            _1,
        }
        impl TSTARTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TSTARTR::_0 => false,
                    TSTARTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TSTARTR {
                match value {
                    false => TSTARTR::_0,
                    true => TSTARTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TSTARTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TSTARTR::_1
            }
        }
        #[doc = "Possible values of the field `TSTOP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TSTOPR {
            #[doc = "Stop bit disabled"]
            _0,
            #[doc = "Stop bit is enabled on timer compare"]
            _1,
            #[doc = "Stop bit is enabled on timer disable"]
            _10,
            #[doc = "Stop bit is enabled on timer compare and timer disable"]
            _11,
        }
        impl TSTOPR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TSTOPR::_0 => 0,
                    TSTOPR::_1 => 1,
                    TSTOPR::_10 => 2,
                    TSTOPR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TSTOPR {
                match value {
                    0 => TSTOPR::_0,
                    1 => TSTOPR::_1,
                    2 => TSTOPR::_10,
                    3 => TSTOPR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TSTOPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TSTOPR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == TSTOPR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == TSTOPR::_11
            }
        }
        #[doc = "Possible values of the field `TIMENA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIMENAR {
            #[doc = "Timer always enabled"]
            _0,
            #[doc = "Timer enabled on Timer N-1 enable"]
            _1,
            #[doc = "Timer enabled on Trigger high"]
            _10,
            #[doc = "Timer enabled on Trigger high and Pin high"]
            _11,
            #[doc = "Timer enabled on Pin rising edge"]
            _100,
            #[doc = "Timer enabled on Pin rising edge and Trigger high"]
            _101,
            #[doc = "Timer enabled on Trigger rising edge"]
            _110,
            #[doc = "Timer enabled on Trigger rising or falling edge"]
            _111,
        }
        impl TIMENAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TIMENAR::_0 => 0,
                    TIMENAR::_1 => 1,
                    TIMENAR::_10 => 2,
                    TIMENAR::_11 => 3,
                    TIMENAR::_100 => 4,
                    TIMENAR::_101 => 5,
                    TIMENAR::_110 => 6,
                    TIMENAR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TIMENAR {
                match value {
                    0 => TIMENAR::_0,
                    1 => TIMENAR::_1,
                    2 => TIMENAR::_10,
                    3 => TIMENAR::_11,
                    4 => TIMENAR::_100,
                    5 => TIMENAR::_101,
                    6 => TIMENAR::_110,
                    7 => TIMENAR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIMENAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TIMENAR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == TIMENAR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == TIMENAR::_11
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == TIMENAR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == TIMENAR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == TIMENAR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == TIMENAR::_111
            }
        }
        #[doc = "Possible values of the field `TIMDIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIMDISR {
            #[doc = "Timer never disabled"]
            _0,
            #[doc = "Timer disabled on Timer N-1 disable"]
            _1,
            #[doc = "Timer disabled on Timer compare"]
            _10,
            #[doc = "Timer disabled on Timer compare and Trigger Low"]
            _11,
            #[doc = "Timer disabled on Pin rising or falling edge"]
            _100,
            #[doc = "Timer disabled on Pin rising or falling edge provided Trigger is high"]
            _101,
            #[doc = "Timer disabled on Trigger falling edge"]
            _110,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl TIMDISR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TIMDISR::_0 => 0,
                    TIMDISR::_1 => 1,
                    TIMDISR::_10 => 2,
                    TIMDISR::_11 => 3,
                    TIMDISR::_100 => 4,
                    TIMDISR::_101 => 5,
                    TIMDISR::_110 => 6,
                    TIMDISR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TIMDISR {
                match value {
                    0 => TIMDISR::_0,
                    1 => TIMDISR::_1,
                    2 => TIMDISR::_10,
                    3 => TIMDISR::_11,
                    4 => TIMDISR::_100,
                    5 => TIMDISR::_101,
                    6 => TIMDISR::_110,
                    i => TIMDISR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIMDISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TIMDISR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == TIMDISR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == TIMDISR::_11
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == TIMDISR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == TIMDISR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == TIMDISR::_110
            }
        }
        #[doc = "Possible values of the field `TIMRST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIMRSTR {
            #[doc = "Timer never reset"]
            _0,
            #[doc = "Timer reset on Timer Pin equal to Timer Output"]
            _10,
            #[doc = "Timer reset on Timer Trigger equal to Timer Output"]
            _11,
            #[doc = "Timer reset on Timer Pin rising edge"]
            _100,
            #[doc = "Timer reset on Trigger rising edge"]
            _110,
            #[doc = "Timer reset on Trigger rising or falling edge"]
            _111,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl TIMRSTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TIMRSTR::_0 => 0,
                    TIMRSTR::_10 => 2,
                    TIMRSTR::_11 => 3,
                    TIMRSTR::_100 => 4,
                    TIMRSTR::_110 => 6,
                    TIMRSTR::_111 => 7,
                    TIMRSTR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TIMRSTR {
                match value {
                    0 => TIMRSTR::_0,
                    2 => TIMRSTR::_10,
                    3 => TIMRSTR::_11,
                    4 => TIMRSTR::_100,
                    6 => TIMRSTR::_110,
                    7 => TIMRSTR::_111,
                    i => TIMRSTR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIMRSTR::_0
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == TIMRSTR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == TIMRSTR::_11
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == TIMRSTR::_100
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == TIMRSTR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == TIMRSTR::_111
            }
        }
        #[doc = "Possible values of the field `TIMDEC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIMDECR {
            #[doc = "Decrement counter on FlexIO clock, Shift clock equals Timer output."]
            _0,
            #[doc = "Decrement counter on Trigger input (both edges), Shift clock equals Timer output."]
            _1,
            #[doc = "Decrement counter on Pin input (both edges), Shift clock equals Pin input."]
            _10,
            #[doc = "Decrement counter on Trigger input (both edges), Shift clock equals Trigger input."]
            _11,
        }
        impl TIMDECR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TIMDECR::_0 => 0,
                    TIMDECR::_1 => 1,
                    TIMDECR::_10 => 2,
                    TIMDECR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TIMDECR {
                match value {
                    0 => TIMDECR::_0,
                    1 => TIMDECR::_1,
                    2 => TIMDECR::_10,
                    3 => TIMDECR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIMDECR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TIMDECR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == TIMDECR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == TIMDECR::_11
            }
        }
        #[doc = "Possible values of the field `TIMOUT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIMOUTR {
            #[doc = "Timer output is logic one when enabled and is not affected by timer reset"]
            _0,
            #[doc = "Timer output is logic zero when enabled and is not affected by timer reset"]
            _1,
            #[doc = "Timer output is logic one when enabled and on timer reset"]
            _10,
            #[doc = "Timer output is logic zero when enabled and on timer reset"]
            _11,
        }
        impl TIMOUTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TIMOUTR::_0 => 0,
                    TIMOUTR::_1 => 1,
                    TIMOUTR::_10 => 2,
                    TIMOUTR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TIMOUTR {
                match value {
                    0 => TIMOUTR::_0,
                    1 => TIMOUTR::_1,
                    2 => TIMOUTR::_10,
                    3 => TIMOUTR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIMOUTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TIMOUTR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == TIMOUTR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == TIMOUTR::_11
            }
        }
        #[doc = "Values that can be written to the field `TSTART`"]
        pub enum TSTARTW {
            #[doc = "Start bit disabled"]
            _0,
            #[doc = "Start bit enabled"]
            _1,
        }
        impl TSTARTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TSTARTW::_0 => false,
                    TSTARTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TSTARTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TSTARTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TSTARTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Start bit disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TSTARTW::_0)
            }
            #[doc = "Start bit enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TSTARTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TSTOP`"]
        pub enum TSTOPW {
            #[doc = "Stop bit disabled"]
            _0,
            #[doc = "Stop bit is enabled on timer compare"]
            _1,
            #[doc = "Stop bit is enabled on timer disable"]
            _10,
            #[doc = "Stop bit is enabled on timer compare and timer disable"]
            _11,
        }
        impl TSTOPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TSTOPW::_0 => 0,
                    TSTOPW::_1 => 1,
                    TSTOPW::_10 => 2,
                    TSTOPW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TSTOPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TSTOPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TSTOPW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Stop bit disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TSTOPW::_0)
            }
            #[doc = "Stop bit is enabled on timer compare"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TSTOPW::_1)
            }
            #[doc = "Stop bit is enabled on timer disable"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(TSTOPW::_10)
            }
            #[doc = "Stop bit is enabled on timer compare and timer disable"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(TSTOPW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TIMENA`"]
        pub enum TIMENAW {
            #[doc = "Timer always enabled"]
            _0,
            #[doc = "Timer enabled on Timer N-1 enable"]
            _1,
            #[doc = "Timer enabled on Trigger high"]
            _10,
            #[doc = "Timer enabled on Trigger high and Pin high"]
            _11,
            #[doc = "Timer enabled on Pin rising edge"]
            _100,
            #[doc = "Timer enabled on Pin rising edge and Trigger high"]
            _101,
            #[doc = "Timer enabled on Trigger rising edge"]
            _110,
            #[doc = "Timer enabled on Trigger rising or falling edge"]
            _111,
        }
        impl TIMENAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TIMENAW::_0 => 0,
                    TIMENAW::_1 => 1,
                    TIMENAW::_10 => 2,
                    TIMENAW::_11 => 3,
                    TIMENAW::_100 => 4,
                    TIMENAW::_101 => 5,
                    TIMENAW::_110 => 6,
                    TIMENAW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIMENAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIMENAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIMENAW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Timer always enabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIMENAW::_0)
            }
            #[doc = "Timer enabled on Timer N-1 enable"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TIMENAW::_1)
            }
            #[doc = "Timer enabled on Trigger high"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(TIMENAW::_10)
            }
            #[doc = "Timer enabled on Trigger high and Pin high"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(TIMENAW::_11)
            }
            #[doc = "Timer enabled on Pin rising edge"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(TIMENAW::_100)
            }
            #[doc = "Timer enabled on Pin rising edge and Trigger high"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(TIMENAW::_101)
            }
            #[doc = "Timer enabled on Trigger rising edge"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(TIMENAW::_110)
            }
            #[doc = "Timer enabled on Trigger rising or falling edge"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(TIMENAW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TIMDIS`"]
        pub enum TIMDISW {
            #[doc = "Timer never disabled"]
            _0,
            #[doc = "Timer disabled on Timer N-1 disable"]
            _1,
            #[doc = "Timer disabled on Timer compare"]
            _10,
            #[doc = "Timer disabled on Timer compare and Trigger Low"]
            _11,
            #[doc = "Timer disabled on Pin rising or falling edge"]
            _100,
            #[doc = "Timer disabled on Pin rising or falling edge provided Trigger is high"]
            _101,
            #[doc = "Timer disabled on Trigger falling edge"]
            _110,
        }
        impl TIMDISW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TIMDISW::_0 => 0,
                    TIMDISW::_1 => 1,
                    TIMDISW::_10 => 2,
                    TIMDISW::_11 => 3,
                    TIMDISW::_100 => 4,
                    TIMDISW::_101 => 5,
                    TIMDISW::_110 => 6,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIMDISW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIMDISW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIMDISW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Timer never disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIMDISW::_0)
            }
            #[doc = "Timer disabled on Timer N-1 disable"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TIMDISW::_1)
            }
            #[doc = "Timer disabled on Timer compare"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(TIMDISW::_10)
            }
            #[doc = "Timer disabled on Timer compare and Trigger Low"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(TIMDISW::_11)
            }
            #[doc = "Timer disabled on Pin rising or falling edge"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(TIMDISW::_100)
            }
            #[doc = "Timer disabled on Pin rising or falling edge provided Trigger is high"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(TIMDISW::_101)
            }
            #[doc = "Timer disabled on Trigger falling edge"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(TIMDISW::_110)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TIMRST`"]
        pub enum TIMRSTW {
            #[doc = "Timer never reset"]
            _0,
            #[doc = "Timer reset on Timer Pin equal to Timer Output"]
            _10,
            #[doc = "Timer reset on Timer Trigger equal to Timer Output"]
            _11,
            #[doc = "Timer reset on Timer Pin rising edge"]
            _100,
            #[doc = "Timer reset on Trigger rising edge"]
            _110,
            #[doc = "Timer reset on Trigger rising or falling edge"]
            _111,
        }
        impl TIMRSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TIMRSTW::_0 => 0,
                    TIMRSTW::_10 => 2,
                    TIMRSTW::_11 => 3,
                    TIMRSTW::_100 => 4,
                    TIMRSTW::_110 => 6,
                    TIMRSTW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIMRSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIMRSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIMRSTW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Timer never reset"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIMRSTW::_0)
            }
            #[doc = "Timer reset on Timer Pin equal to Timer Output"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(TIMRSTW::_10)
            }
            #[doc = "Timer reset on Timer Trigger equal to Timer Output"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(TIMRSTW::_11)
            }
            #[doc = "Timer reset on Timer Pin rising edge"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(TIMRSTW::_100)
            }
            #[doc = "Timer reset on Trigger rising edge"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(TIMRSTW::_110)
            }
            #[doc = "Timer reset on Trigger rising or falling edge"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(TIMRSTW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TIMDEC`"]
        pub enum TIMDECW {
            #[doc = "Decrement counter on FlexIO clock, Shift clock equals Timer output."]
            _0,
            #[doc = "Decrement counter on Trigger input (both edges), Shift clock equals Timer output."]
            _1,
            #[doc = "Decrement counter on Pin input (both edges), Shift clock equals Pin input."]
            _10,
            #[doc = "Decrement counter on Trigger input (both edges), Shift clock equals Trigger input."]
            _11,
        }
        impl TIMDECW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TIMDECW::_0 => 0,
                    TIMDECW::_1 => 1,
                    TIMDECW::_10 => 2,
                    TIMDECW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIMDECW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIMDECW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIMDECW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Decrement counter on FlexIO clock, Shift clock equals Timer output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIMDECW::_0)
            }
            #[doc = "Decrement counter on Trigger input (both edges), Shift clock equals Timer output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TIMDECW::_1)
            }
            #[doc = "Decrement counter on Pin input (both edges), Shift clock equals Pin input."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(TIMDECW::_10)
            }
            #[doc = "Decrement counter on Trigger input (both edges), Shift clock equals Trigger input."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(TIMDECW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TIMOUT`"]
        pub enum TIMOUTW {
            #[doc = "Timer output is logic one when enabled and is not affected by timer reset"]
            _0,
            #[doc = "Timer output is logic zero when enabled and is not affected by timer reset"]
            _1,
            #[doc = "Timer output is logic one when enabled and on timer reset"]
            _10,
            #[doc = "Timer output is logic zero when enabled and on timer reset"]
            _11,
        }
        impl TIMOUTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TIMOUTW::_0 => 0,
                    TIMOUTW::_1 => 1,
                    TIMOUTW::_10 => 2,
                    TIMOUTW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIMOUTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIMOUTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIMOUTW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Timer output is logic one when enabled and is not affected by timer reset"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIMOUTW::_0)
            }
            #[doc = "Timer output is logic zero when enabled and is not affected by timer reset"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TIMOUTW::_1)
            }
            #[doc = "Timer output is logic one when enabled and on timer reset"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(TIMOUTW::_10)
            }
            #[doc = "Timer output is logic zero when enabled and on timer reset"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(TIMOUTW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 1 - Timer Start Bit"]
            #[inline(always)]
            pub fn tstart(&self) -> TSTARTR {
                TSTARTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 4:5 - Timer Stop Bit"]
            #[inline(always)]
            pub fn tstop(&self) -> TSTOPR {
                TSTOPR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 8:10 - Timer Enable"]
            #[inline(always)]
            pub fn timena(&self) -> TIMENAR {
                TIMENAR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 12:14 - Timer Disable"]
            #[inline(always)]
            pub fn timdis(&self) -> TIMDISR {
                TIMDISR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 16:18 - Timer Reset"]
            #[inline(always)]
            pub fn timrst(&self) -> TIMRSTR {
                TIMRSTR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 20:21 - Timer Decrement"]
            #[inline(always)]
            pub fn timdec(&self) -> TIMDECR {
                TIMDECR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 24:25 - Timer Output"]
            #[inline(always)]
            pub fn timout(&self) -> TIMOUTR {
                TIMOUTR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 1 - Timer Start Bit"]
            #[inline(always)]
            pub fn tstart(&mut self) -> _TSTARTW {
                _TSTARTW { w: self }
            }
            #[doc = "Bits 4:5 - Timer Stop Bit"]
            #[inline(always)]
            pub fn tstop(&mut self) -> _TSTOPW {
                _TSTOPW { w: self }
            }
            #[doc = "Bits 8:10 - Timer Enable"]
            #[inline(always)]
            pub fn timena(&mut self) -> _TIMENAW {
                _TIMENAW { w: self }
            }
            #[doc = "Bits 12:14 - Timer Disable"]
            #[inline(always)]
            pub fn timdis(&mut self) -> _TIMDISW {
                _TIMDISW { w: self }
            }
            #[doc = "Bits 16:18 - Timer Reset"]
            #[inline(always)]
            pub fn timrst(&mut self) -> _TIMRSTW {
                _TIMRSTW { w: self }
            }
            #[doc = "Bits 20:21 - Timer Decrement"]
            #[inline(always)]
            pub fn timdec(&mut self) -> _TIMDECW {
                _TIMDECW { w: self }
            }
            #[doc = "Bits 24:25 - Timer Output"]
            #[inline(always)]
            pub fn timout(&mut self) -> _TIMOUTW {
                _TIMOUTW { w: self }
            }
        }
    }
    #[doc = "Timer Configuration N Register"]
    pub struct TIMCFG1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Timer Configuration N Register"]
    pub mod timcfg1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TIMCFG1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TSTART`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TSTARTR {
            #[doc = "Start bit disabled"]
            _0,
            #[doc = "Start bit enabled"]
            _1,
        }
        impl TSTARTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TSTARTR::_0 => false,
                    TSTARTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TSTARTR {
                match value {
                    false => TSTARTR::_0,
                    true => TSTARTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TSTARTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TSTARTR::_1
            }
        }
        #[doc = "Possible values of the field `TSTOP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TSTOPR {
            #[doc = "Stop bit disabled"]
            _0,
            #[doc = "Stop bit is enabled on timer compare"]
            _1,
            #[doc = "Stop bit is enabled on timer disable"]
            _10,
            #[doc = "Stop bit is enabled on timer compare and timer disable"]
            _11,
        }
        impl TSTOPR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TSTOPR::_0 => 0,
                    TSTOPR::_1 => 1,
                    TSTOPR::_10 => 2,
                    TSTOPR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TSTOPR {
                match value {
                    0 => TSTOPR::_0,
                    1 => TSTOPR::_1,
                    2 => TSTOPR::_10,
                    3 => TSTOPR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TSTOPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TSTOPR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == TSTOPR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == TSTOPR::_11
            }
        }
        #[doc = "Possible values of the field `TIMENA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIMENAR {
            #[doc = "Timer always enabled"]
            _0,
            #[doc = "Timer enabled on Timer N-1 enable"]
            _1,
            #[doc = "Timer enabled on Trigger high"]
            _10,
            #[doc = "Timer enabled on Trigger high and Pin high"]
            _11,
            #[doc = "Timer enabled on Pin rising edge"]
            _100,
            #[doc = "Timer enabled on Pin rising edge and Trigger high"]
            _101,
            #[doc = "Timer enabled on Trigger rising edge"]
            _110,
            #[doc = "Timer enabled on Trigger rising or falling edge"]
            _111,
        }
        impl TIMENAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TIMENAR::_0 => 0,
                    TIMENAR::_1 => 1,
                    TIMENAR::_10 => 2,
                    TIMENAR::_11 => 3,
                    TIMENAR::_100 => 4,
                    TIMENAR::_101 => 5,
                    TIMENAR::_110 => 6,
                    TIMENAR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TIMENAR {
                match value {
                    0 => TIMENAR::_0,
                    1 => TIMENAR::_1,
                    2 => TIMENAR::_10,
                    3 => TIMENAR::_11,
                    4 => TIMENAR::_100,
                    5 => TIMENAR::_101,
                    6 => TIMENAR::_110,
                    7 => TIMENAR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIMENAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TIMENAR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == TIMENAR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == TIMENAR::_11
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == TIMENAR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == TIMENAR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == TIMENAR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == TIMENAR::_111
            }
        }
        #[doc = "Possible values of the field `TIMDIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIMDISR {
            #[doc = "Timer never disabled"]
            _0,
            #[doc = "Timer disabled on Timer N-1 disable"]
            _1,
            #[doc = "Timer disabled on Timer compare"]
            _10,
            #[doc = "Timer disabled on Timer compare and Trigger Low"]
            _11,
            #[doc = "Timer disabled on Pin rising or falling edge"]
            _100,
            #[doc = "Timer disabled on Pin rising or falling edge provided Trigger is high"]
            _101,
            #[doc = "Timer disabled on Trigger falling edge"]
            _110,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl TIMDISR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TIMDISR::_0 => 0,
                    TIMDISR::_1 => 1,
                    TIMDISR::_10 => 2,
                    TIMDISR::_11 => 3,
                    TIMDISR::_100 => 4,
                    TIMDISR::_101 => 5,
                    TIMDISR::_110 => 6,
                    TIMDISR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TIMDISR {
                match value {
                    0 => TIMDISR::_0,
                    1 => TIMDISR::_1,
                    2 => TIMDISR::_10,
                    3 => TIMDISR::_11,
                    4 => TIMDISR::_100,
                    5 => TIMDISR::_101,
                    6 => TIMDISR::_110,
                    i => TIMDISR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIMDISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TIMDISR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == TIMDISR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == TIMDISR::_11
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == TIMDISR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == TIMDISR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == TIMDISR::_110
            }
        }
        #[doc = "Possible values of the field `TIMRST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIMRSTR {
            #[doc = "Timer never reset"]
            _0,
            #[doc = "Timer reset on Timer Pin equal to Timer Output"]
            _10,
            #[doc = "Timer reset on Timer Trigger equal to Timer Output"]
            _11,
            #[doc = "Timer reset on Timer Pin rising edge"]
            _100,
            #[doc = "Timer reset on Trigger rising edge"]
            _110,
            #[doc = "Timer reset on Trigger rising or falling edge"]
            _111,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl TIMRSTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TIMRSTR::_0 => 0,
                    TIMRSTR::_10 => 2,
                    TIMRSTR::_11 => 3,
                    TIMRSTR::_100 => 4,
                    TIMRSTR::_110 => 6,
                    TIMRSTR::_111 => 7,
                    TIMRSTR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TIMRSTR {
                match value {
                    0 => TIMRSTR::_0,
                    2 => TIMRSTR::_10,
                    3 => TIMRSTR::_11,
                    4 => TIMRSTR::_100,
                    6 => TIMRSTR::_110,
                    7 => TIMRSTR::_111,
                    i => TIMRSTR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIMRSTR::_0
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == TIMRSTR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == TIMRSTR::_11
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == TIMRSTR::_100
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == TIMRSTR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == TIMRSTR::_111
            }
        }
        #[doc = "Possible values of the field `TIMDEC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIMDECR {
            #[doc = "Decrement counter on FlexIO clock, Shift clock equals Timer output."]
            _0,
            #[doc = "Decrement counter on Trigger input (both edges), Shift clock equals Timer output."]
            _1,
            #[doc = "Decrement counter on Pin input (both edges), Shift clock equals Pin input."]
            _10,
            #[doc = "Decrement counter on Trigger input (both edges), Shift clock equals Trigger input."]
            _11,
        }
        impl TIMDECR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TIMDECR::_0 => 0,
                    TIMDECR::_1 => 1,
                    TIMDECR::_10 => 2,
                    TIMDECR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TIMDECR {
                match value {
                    0 => TIMDECR::_0,
                    1 => TIMDECR::_1,
                    2 => TIMDECR::_10,
                    3 => TIMDECR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIMDECR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TIMDECR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == TIMDECR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == TIMDECR::_11
            }
        }
        #[doc = "Possible values of the field `TIMOUT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIMOUTR {
            #[doc = "Timer output is logic one when enabled and is not affected by timer reset"]
            _0,
            #[doc = "Timer output is logic zero when enabled and is not affected by timer reset"]
            _1,
            #[doc = "Timer output is logic one when enabled and on timer reset"]
            _10,
            #[doc = "Timer output is logic zero when enabled and on timer reset"]
            _11,
        }
        impl TIMOUTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TIMOUTR::_0 => 0,
                    TIMOUTR::_1 => 1,
                    TIMOUTR::_10 => 2,
                    TIMOUTR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TIMOUTR {
                match value {
                    0 => TIMOUTR::_0,
                    1 => TIMOUTR::_1,
                    2 => TIMOUTR::_10,
                    3 => TIMOUTR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIMOUTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TIMOUTR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == TIMOUTR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == TIMOUTR::_11
            }
        }
        #[doc = "Values that can be written to the field `TSTART`"]
        pub enum TSTARTW {
            #[doc = "Start bit disabled"]
            _0,
            #[doc = "Start bit enabled"]
            _1,
        }
        impl TSTARTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TSTARTW::_0 => false,
                    TSTARTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TSTARTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TSTARTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TSTARTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Start bit disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TSTARTW::_0)
            }
            #[doc = "Start bit enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TSTARTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TSTOP`"]
        pub enum TSTOPW {
            #[doc = "Stop bit disabled"]
            _0,
            #[doc = "Stop bit is enabled on timer compare"]
            _1,
            #[doc = "Stop bit is enabled on timer disable"]
            _10,
            #[doc = "Stop bit is enabled on timer compare and timer disable"]
            _11,
        }
        impl TSTOPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TSTOPW::_0 => 0,
                    TSTOPW::_1 => 1,
                    TSTOPW::_10 => 2,
                    TSTOPW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TSTOPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TSTOPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TSTOPW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Stop bit disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TSTOPW::_0)
            }
            #[doc = "Stop bit is enabled on timer compare"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TSTOPW::_1)
            }
            #[doc = "Stop bit is enabled on timer disable"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(TSTOPW::_10)
            }
            #[doc = "Stop bit is enabled on timer compare and timer disable"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(TSTOPW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TIMENA`"]
        pub enum TIMENAW {
            #[doc = "Timer always enabled"]
            _0,
            #[doc = "Timer enabled on Timer N-1 enable"]
            _1,
            #[doc = "Timer enabled on Trigger high"]
            _10,
            #[doc = "Timer enabled on Trigger high and Pin high"]
            _11,
            #[doc = "Timer enabled on Pin rising edge"]
            _100,
            #[doc = "Timer enabled on Pin rising edge and Trigger high"]
            _101,
            #[doc = "Timer enabled on Trigger rising edge"]
            _110,
            #[doc = "Timer enabled on Trigger rising or falling edge"]
            _111,
        }
        impl TIMENAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TIMENAW::_0 => 0,
                    TIMENAW::_1 => 1,
                    TIMENAW::_10 => 2,
                    TIMENAW::_11 => 3,
                    TIMENAW::_100 => 4,
                    TIMENAW::_101 => 5,
                    TIMENAW::_110 => 6,
                    TIMENAW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIMENAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIMENAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIMENAW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Timer always enabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIMENAW::_0)
            }
            #[doc = "Timer enabled on Timer N-1 enable"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TIMENAW::_1)
            }
            #[doc = "Timer enabled on Trigger high"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(TIMENAW::_10)
            }
            #[doc = "Timer enabled on Trigger high and Pin high"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(TIMENAW::_11)
            }
            #[doc = "Timer enabled on Pin rising edge"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(TIMENAW::_100)
            }
            #[doc = "Timer enabled on Pin rising edge and Trigger high"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(TIMENAW::_101)
            }
            #[doc = "Timer enabled on Trigger rising edge"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(TIMENAW::_110)
            }
            #[doc = "Timer enabled on Trigger rising or falling edge"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(TIMENAW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TIMDIS`"]
        pub enum TIMDISW {
            #[doc = "Timer never disabled"]
            _0,
            #[doc = "Timer disabled on Timer N-1 disable"]
            _1,
            #[doc = "Timer disabled on Timer compare"]
            _10,
            #[doc = "Timer disabled on Timer compare and Trigger Low"]
            _11,
            #[doc = "Timer disabled on Pin rising or falling edge"]
            _100,
            #[doc = "Timer disabled on Pin rising or falling edge provided Trigger is high"]
            _101,
            #[doc = "Timer disabled on Trigger falling edge"]
            _110,
        }
        impl TIMDISW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TIMDISW::_0 => 0,
                    TIMDISW::_1 => 1,
                    TIMDISW::_10 => 2,
                    TIMDISW::_11 => 3,
                    TIMDISW::_100 => 4,
                    TIMDISW::_101 => 5,
                    TIMDISW::_110 => 6,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIMDISW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIMDISW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIMDISW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Timer never disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIMDISW::_0)
            }
            #[doc = "Timer disabled on Timer N-1 disable"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TIMDISW::_1)
            }
            #[doc = "Timer disabled on Timer compare"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(TIMDISW::_10)
            }
            #[doc = "Timer disabled on Timer compare and Trigger Low"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(TIMDISW::_11)
            }
            #[doc = "Timer disabled on Pin rising or falling edge"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(TIMDISW::_100)
            }
            #[doc = "Timer disabled on Pin rising or falling edge provided Trigger is high"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(TIMDISW::_101)
            }
            #[doc = "Timer disabled on Trigger falling edge"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(TIMDISW::_110)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TIMRST`"]
        pub enum TIMRSTW {
            #[doc = "Timer never reset"]
            _0,
            #[doc = "Timer reset on Timer Pin equal to Timer Output"]
            _10,
            #[doc = "Timer reset on Timer Trigger equal to Timer Output"]
            _11,
            #[doc = "Timer reset on Timer Pin rising edge"]
            _100,
            #[doc = "Timer reset on Trigger rising edge"]
            _110,
            #[doc = "Timer reset on Trigger rising or falling edge"]
            _111,
        }
        impl TIMRSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TIMRSTW::_0 => 0,
                    TIMRSTW::_10 => 2,
                    TIMRSTW::_11 => 3,
                    TIMRSTW::_100 => 4,
                    TIMRSTW::_110 => 6,
                    TIMRSTW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIMRSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIMRSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIMRSTW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Timer never reset"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIMRSTW::_0)
            }
            #[doc = "Timer reset on Timer Pin equal to Timer Output"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(TIMRSTW::_10)
            }
            #[doc = "Timer reset on Timer Trigger equal to Timer Output"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(TIMRSTW::_11)
            }
            #[doc = "Timer reset on Timer Pin rising edge"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(TIMRSTW::_100)
            }
            #[doc = "Timer reset on Trigger rising edge"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(TIMRSTW::_110)
            }
            #[doc = "Timer reset on Trigger rising or falling edge"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(TIMRSTW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TIMDEC`"]
        pub enum TIMDECW {
            #[doc = "Decrement counter on FlexIO clock, Shift clock equals Timer output."]
            _0,
            #[doc = "Decrement counter on Trigger input (both edges), Shift clock equals Timer output."]
            _1,
            #[doc = "Decrement counter on Pin input (both edges), Shift clock equals Pin input."]
            _10,
            #[doc = "Decrement counter on Trigger input (both edges), Shift clock equals Trigger input."]
            _11,
        }
        impl TIMDECW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TIMDECW::_0 => 0,
                    TIMDECW::_1 => 1,
                    TIMDECW::_10 => 2,
                    TIMDECW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIMDECW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIMDECW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIMDECW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Decrement counter on FlexIO clock, Shift clock equals Timer output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIMDECW::_0)
            }
            #[doc = "Decrement counter on Trigger input (both edges), Shift clock equals Timer output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TIMDECW::_1)
            }
            #[doc = "Decrement counter on Pin input (both edges), Shift clock equals Pin input."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(TIMDECW::_10)
            }
            #[doc = "Decrement counter on Trigger input (both edges), Shift clock equals Trigger input."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(TIMDECW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TIMOUT`"]
        pub enum TIMOUTW {
            #[doc = "Timer output is logic one when enabled and is not affected by timer reset"]
            _0,
            #[doc = "Timer output is logic zero when enabled and is not affected by timer reset"]
            _1,
            #[doc = "Timer output is logic one when enabled and on timer reset"]
            _10,
            #[doc = "Timer output is logic zero when enabled and on timer reset"]
            _11,
        }
        impl TIMOUTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TIMOUTW::_0 => 0,
                    TIMOUTW::_1 => 1,
                    TIMOUTW::_10 => 2,
                    TIMOUTW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIMOUTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIMOUTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIMOUTW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Timer output is logic one when enabled and is not affected by timer reset"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIMOUTW::_0)
            }
            #[doc = "Timer output is logic zero when enabled and is not affected by timer reset"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TIMOUTW::_1)
            }
            #[doc = "Timer output is logic one when enabled and on timer reset"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(TIMOUTW::_10)
            }
            #[doc = "Timer output is logic zero when enabled and on timer reset"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(TIMOUTW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 1 - Timer Start Bit"]
            #[inline(always)]
            pub fn tstart(&self) -> TSTARTR {
                TSTARTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 4:5 - Timer Stop Bit"]
            #[inline(always)]
            pub fn tstop(&self) -> TSTOPR {
                TSTOPR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 8:10 - Timer Enable"]
            #[inline(always)]
            pub fn timena(&self) -> TIMENAR {
                TIMENAR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 12:14 - Timer Disable"]
            #[inline(always)]
            pub fn timdis(&self) -> TIMDISR {
                TIMDISR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 16:18 - Timer Reset"]
            #[inline(always)]
            pub fn timrst(&self) -> TIMRSTR {
                TIMRSTR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 20:21 - Timer Decrement"]
            #[inline(always)]
            pub fn timdec(&self) -> TIMDECR {
                TIMDECR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 24:25 - Timer Output"]
            #[inline(always)]
            pub fn timout(&self) -> TIMOUTR {
                TIMOUTR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 1 - Timer Start Bit"]
            #[inline(always)]
            pub fn tstart(&mut self) -> _TSTARTW {
                _TSTARTW { w: self }
            }
            #[doc = "Bits 4:5 - Timer Stop Bit"]
            #[inline(always)]
            pub fn tstop(&mut self) -> _TSTOPW {
                _TSTOPW { w: self }
            }
            #[doc = "Bits 8:10 - Timer Enable"]
            #[inline(always)]
            pub fn timena(&mut self) -> _TIMENAW {
                _TIMENAW { w: self }
            }
            #[doc = "Bits 12:14 - Timer Disable"]
            #[inline(always)]
            pub fn timdis(&mut self) -> _TIMDISW {
                _TIMDISW { w: self }
            }
            #[doc = "Bits 16:18 - Timer Reset"]
            #[inline(always)]
            pub fn timrst(&mut self) -> _TIMRSTW {
                _TIMRSTW { w: self }
            }
            #[doc = "Bits 20:21 - Timer Decrement"]
            #[inline(always)]
            pub fn timdec(&mut self) -> _TIMDECW {
                _TIMDECW { w: self }
            }
            #[doc = "Bits 24:25 - Timer Output"]
            #[inline(always)]
            pub fn timout(&mut self) -> _TIMOUTW {
                _TIMOUTW { w: self }
            }
        }
    }
    #[doc = "Timer Configuration N Register"]
    pub struct TIMCFG2 {
        register: VolatileCell<u32>,
    }
    #[doc = "Timer Configuration N Register"]
    pub mod timcfg2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TIMCFG2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TSTART`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TSTARTR {
            #[doc = "Start bit disabled"]
            _0,
            #[doc = "Start bit enabled"]
            _1,
        }
        impl TSTARTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TSTARTR::_0 => false,
                    TSTARTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TSTARTR {
                match value {
                    false => TSTARTR::_0,
                    true => TSTARTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TSTARTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TSTARTR::_1
            }
        }
        #[doc = "Possible values of the field `TSTOP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TSTOPR {
            #[doc = "Stop bit disabled"]
            _0,
            #[doc = "Stop bit is enabled on timer compare"]
            _1,
            #[doc = "Stop bit is enabled on timer disable"]
            _10,
            #[doc = "Stop bit is enabled on timer compare and timer disable"]
            _11,
        }
        impl TSTOPR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TSTOPR::_0 => 0,
                    TSTOPR::_1 => 1,
                    TSTOPR::_10 => 2,
                    TSTOPR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TSTOPR {
                match value {
                    0 => TSTOPR::_0,
                    1 => TSTOPR::_1,
                    2 => TSTOPR::_10,
                    3 => TSTOPR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TSTOPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TSTOPR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == TSTOPR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == TSTOPR::_11
            }
        }
        #[doc = "Possible values of the field `TIMENA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIMENAR {
            #[doc = "Timer always enabled"]
            _0,
            #[doc = "Timer enabled on Timer N-1 enable"]
            _1,
            #[doc = "Timer enabled on Trigger high"]
            _10,
            #[doc = "Timer enabled on Trigger high and Pin high"]
            _11,
            #[doc = "Timer enabled on Pin rising edge"]
            _100,
            #[doc = "Timer enabled on Pin rising edge and Trigger high"]
            _101,
            #[doc = "Timer enabled on Trigger rising edge"]
            _110,
            #[doc = "Timer enabled on Trigger rising or falling edge"]
            _111,
        }
        impl TIMENAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TIMENAR::_0 => 0,
                    TIMENAR::_1 => 1,
                    TIMENAR::_10 => 2,
                    TIMENAR::_11 => 3,
                    TIMENAR::_100 => 4,
                    TIMENAR::_101 => 5,
                    TIMENAR::_110 => 6,
                    TIMENAR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TIMENAR {
                match value {
                    0 => TIMENAR::_0,
                    1 => TIMENAR::_1,
                    2 => TIMENAR::_10,
                    3 => TIMENAR::_11,
                    4 => TIMENAR::_100,
                    5 => TIMENAR::_101,
                    6 => TIMENAR::_110,
                    7 => TIMENAR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIMENAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TIMENAR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == TIMENAR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == TIMENAR::_11
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == TIMENAR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == TIMENAR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == TIMENAR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == TIMENAR::_111
            }
        }
        #[doc = "Possible values of the field `TIMDIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIMDISR {
            #[doc = "Timer never disabled"]
            _0,
            #[doc = "Timer disabled on Timer N-1 disable"]
            _1,
            #[doc = "Timer disabled on Timer compare"]
            _10,
            #[doc = "Timer disabled on Timer compare and Trigger Low"]
            _11,
            #[doc = "Timer disabled on Pin rising or falling edge"]
            _100,
            #[doc = "Timer disabled on Pin rising or falling edge provided Trigger is high"]
            _101,
            #[doc = "Timer disabled on Trigger falling edge"]
            _110,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl TIMDISR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TIMDISR::_0 => 0,
                    TIMDISR::_1 => 1,
                    TIMDISR::_10 => 2,
                    TIMDISR::_11 => 3,
                    TIMDISR::_100 => 4,
                    TIMDISR::_101 => 5,
                    TIMDISR::_110 => 6,
                    TIMDISR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TIMDISR {
                match value {
                    0 => TIMDISR::_0,
                    1 => TIMDISR::_1,
                    2 => TIMDISR::_10,
                    3 => TIMDISR::_11,
                    4 => TIMDISR::_100,
                    5 => TIMDISR::_101,
                    6 => TIMDISR::_110,
                    i => TIMDISR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIMDISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TIMDISR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == TIMDISR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == TIMDISR::_11
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == TIMDISR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == TIMDISR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == TIMDISR::_110
            }
        }
        #[doc = "Possible values of the field `TIMRST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIMRSTR {
            #[doc = "Timer never reset"]
            _0,
            #[doc = "Timer reset on Timer Pin equal to Timer Output"]
            _10,
            #[doc = "Timer reset on Timer Trigger equal to Timer Output"]
            _11,
            #[doc = "Timer reset on Timer Pin rising edge"]
            _100,
            #[doc = "Timer reset on Trigger rising edge"]
            _110,
            #[doc = "Timer reset on Trigger rising or falling edge"]
            _111,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl TIMRSTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TIMRSTR::_0 => 0,
                    TIMRSTR::_10 => 2,
                    TIMRSTR::_11 => 3,
                    TIMRSTR::_100 => 4,
                    TIMRSTR::_110 => 6,
                    TIMRSTR::_111 => 7,
                    TIMRSTR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TIMRSTR {
                match value {
                    0 => TIMRSTR::_0,
                    2 => TIMRSTR::_10,
                    3 => TIMRSTR::_11,
                    4 => TIMRSTR::_100,
                    6 => TIMRSTR::_110,
                    7 => TIMRSTR::_111,
                    i => TIMRSTR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIMRSTR::_0
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == TIMRSTR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == TIMRSTR::_11
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == TIMRSTR::_100
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == TIMRSTR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == TIMRSTR::_111
            }
        }
        #[doc = "Possible values of the field `TIMDEC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIMDECR {
            #[doc = "Decrement counter on FlexIO clock, Shift clock equals Timer output."]
            _0,
            #[doc = "Decrement counter on Trigger input (both edges), Shift clock equals Timer output."]
            _1,
            #[doc = "Decrement counter on Pin input (both edges), Shift clock equals Pin input."]
            _10,
            #[doc = "Decrement counter on Trigger input (both edges), Shift clock equals Trigger input."]
            _11,
        }
        impl TIMDECR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TIMDECR::_0 => 0,
                    TIMDECR::_1 => 1,
                    TIMDECR::_10 => 2,
                    TIMDECR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TIMDECR {
                match value {
                    0 => TIMDECR::_0,
                    1 => TIMDECR::_1,
                    2 => TIMDECR::_10,
                    3 => TIMDECR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIMDECR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TIMDECR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == TIMDECR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == TIMDECR::_11
            }
        }
        #[doc = "Possible values of the field `TIMOUT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIMOUTR {
            #[doc = "Timer output is logic one when enabled and is not affected by timer reset"]
            _0,
            #[doc = "Timer output is logic zero when enabled and is not affected by timer reset"]
            _1,
            #[doc = "Timer output is logic one when enabled and on timer reset"]
            _10,
            #[doc = "Timer output is logic zero when enabled and on timer reset"]
            _11,
        }
        impl TIMOUTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TIMOUTR::_0 => 0,
                    TIMOUTR::_1 => 1,
                    TIMOUTR::_10 => 2,
                    TIMOUTR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TIMOUTR {
                match value {
                    0 => TIMOUTR::_0,
                    1 => TIMOUTR::_1,
                    2 => TIMOUTR::_10,
                    3 => TIMOUTR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIMOUTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TIMOUTR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == TIMOUTR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == TIMOUTR::_11
            }
        }
        #[doc = "Values that can be written to the field `TSTART`"]
        pub enum TSTARTW {
            #[doc = "Start bit disabled"]
            _0,
            #[doc = "Start bit enabled"]
            _1,
        }
        impl TSTARTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TSTARTW::_0 => false,
                    TSTARTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TSTARTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TSTARTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TSTARTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Start bit disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TSTARTW::_0)
            }
            #[doc = "Start bit enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TSTARTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TSTOP`"]
        pub enum TSTOPW {
            #[doc = "Stop bit disabled"]
            _0,
            #[doc = "Stop bit is enabled on timer compare"]
            _1,
            #[doc = "Stop bit is enabled on timer disable"]
            _10,
            #[doc = "Stop bit is enabled on timer compare and timer disable"]
            _11,
        }
        impl TSTOPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TSTOPW::_0 => 0,
                    TSTOPW::_1 => 1,
                    TSTOPW::_10 => 2,
                    TSTOPW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TSTOPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TSTOPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TSTOPW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Stop bit disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TSTOPW::_0)
            }
            #[doc = "Stop bit is enabled on timer compare"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TSTOPW::_1)
            }
            #[doc = "Stop bit is enabled on timer disable"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(TSTOPW::_10)
            }
            #[doc = "Stop bit is enabled on timer compare and timer disable"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(TSTOPW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TIMENA`"]
        pub enum TIMENAW {
            #[doc = "Timer always enabled"]
            _0,
            #[doc = "Timer enabled on Timer N-1 enable"]
            _1,
            #[doc = "Timer enabled on Trigger high"]
            _10,
            #[doc = "Timer enabled on Trigger high and Pin high"]
            _11,
            #[doc = "Timer enabled on Pin rising edge"]
            _100,
            #[doc = "Timer enabled on Pin rising edge and Trigger high"]
            _101,
            #[doc = "Timer enabled on Trigger rising edge"]
            _110,
            #[doc = "Timer enabled on Trigger rising or falling edge"]
            _111,
        }
        impl TIMENAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TIMENAW::_0 => 0,
                    TIMENAW::_1 => 1,
                    TIMENAW::_10 => 2,
                    TIMENAW::_11 => 3,
                    TIMENAW::_100 => 4,
                    TIMENAW::_101 => 5,
                    TIMENAW::_110 => 6,
                    TIMENAW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIMENAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIMENAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIMENAW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Timer always enabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIMENAW::_0)
            }
            #[doc = "Timer enabled on Timer N-1 enable"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TIMENAW::_1)
            }
            #[doc = "Timer enabled on Trigger high"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(TIMENAW::_10)
            }
            #[doc = "Timer enabled on Trigger high and Pin high"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(TIMENAW::_11)
            }
            #[doc = "Timer enabled on Pin rising edge"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(TIMENAW::_100)
            }
            #[doc = "Timer enabled on Pin rising edge and Trigger high"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(TIMENAW::_101)
            }
            #[doc = "Timer enabled on Trigger rising edge"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(TIMENAW::_110)
            }
            #[doc = "Timer enabled on Trigger rising or falling edge"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(TIMENAW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TIMDIS`"]
        pub enum TIMDISW {
            #[doc = "Timer never disabled"]
            _0,
            #[doc = "Timer disabled on Timer N-1 disable"]
            _1,
            #[doc = "Timer disabled on Timer compare"]
            _10,
            #[doc = "Timer disabled on Timer compare and Trigger Low"]
            _11,
            #[doc = "Timer disabled on Pin rising or falling edge"]
            _100,
            #[doc = "Timer disabled on Pin rising or falling edge provided Trigger is high"]
            _101,
            #[doc = "Timer disabled on Trigger falling edge"]
            _110,
        }
        impl TIMDISW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TIMDISW::_0 => 0,
                    TIMDISW::_1 => 1,
                    TIMDISW::_10 => 2,
                    TIMDISW::_11 => 3,
                    TIMDISW::_100 => 4,
                    TIMDISW::_101 => 5,
                    TIMDISW::_110 => 6,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIMDISW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIMDISW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIMDISW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Timer never disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIMDISW::_0)
            }
            #[doc = "Timer disabled on Timer N-1 disable"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TIMDISW::_1)
            }
            #[doc = "Timer disabled on Timer compare"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(TIMDISW::_10)
            }
            #[doc = "Timer disabled on Timer compare and Trigger Low"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(TIMDISW::_11)
            }
            #[doc = "Timer disabled on Pin rising or falling edge"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(TIMDISW::_100)
            }
            #[doc = "Timer disabled on Pin rising or falling edge provided Trigger is high"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(TIMDISW::_101)
            }
            #[doc = "Timer disabled on Trigger falling edge"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(TIMDISW::_110)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TIMRST`"]
        pub enum TIMRSTW {
            #[doc = "Timer never reset"]
            _0,
            #[doc = "Timer reset on Timer Pin equal to Timer Output"]
            _10,
            #[doc = "Timer reset on Timer Trigger equal to Timer Output"]
            _11,
            #[doc = "Timer reset on Timer Pin rising edge"]
            _100,
            #[doc = "Timer reset on Trigger rising edge"]
            _110,
            #[doc = "Timer reset on Trigger rising or falling edge"]
            _111,
        }
        impl TIMRSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TIMRSTW::_0 => 0,
                    TIMRSTW::_10 => 2,
                    TIMRSTW::_11 => 3,
                    TIMRSTW::_100 => 4,
                    TIMRSTW::_110 => 6,
                    TIMRSTW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIMRSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIMRSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIMRSTW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Timer never reset"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIMRSTW::_0)
            }
            #[doc = "Timer reset on Timer Pin equal to Timer Output"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(TIMRSTW::_10)
            }
            #[doc = "Timer reset on Timer Trigger equal to Timer Output"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(TIMRSTW::_11)
            }
            #[doc = "Timer reset on Timer Pin rising edge"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(TIMRSTW::_100)
            }
            #[doc = "Timer reset on Trigger rising edge"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(TIMRSTW::_110)
            }
            #[doc = "Timer reset on Trigger rising or falling edge"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(TIMRSTW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TIMDEC`"]
        pub enum TIMDECW {
            #[doc = "Decrement counter on FlexIO clock, Shift clock equals Timer output."]
            _0,
            #[doc = "Decrement counter on Trigger input (both edges), Shift clock equals Timer output."]
            _1,
            #[doc = "Decrement counter on Pin input (both edges), Shift clock equals Pin input."]
            _10,
            #[doc = "Decrement counter on Trigger input (both edges), Shift clock equals Trigger input."]
            _11,
        }
        impl TIMDECW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TIMDECW::_0 => 0,
                    TIMDECW::_1 => 1,
                    TIMDECW::_10 => 2,
                    TIMDECW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIMDECW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIMDECW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIMDECW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Decrement counter on FlexIO clock, Shift clock equals Timer output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIMDECW::_0)
            }
            #[doc = "Decrement counter on Trigger input (both edges), Shift clock equals Timer output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TIMDECW::_1)
            }
            #[doc = "Decrement counter on Pin input (both edges), Shift clock equals Pin input."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(TIMDECW::_10)
            }
            #[doc = "Decrement counter on Trigger input (both edges), Shift clock equals Trigger input."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(TIMDECW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TIMOUT`"]
        pub enum TIMOUTW {
            #[doc = "Timer output is logic one when enabled and is not affected by timer reset"]
            _0,
            #[doc = "Timer output is logic zero when enabled and is not affected by timer reset"]
            _1,
            #[doc = "Timer output is logic one when enabled and on timer reset"]
            _10,
            #[doc = "Timer output is logic zero when enabled and on timer reset"]
            _11,
        }
        impl TIMOUTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TIMOUTW::_0 => 0,
                    TIMOUTW::_1 => 1,
                    TIMOUTW::_10 => 2,
                    TIMOUTW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIMOUTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIMOUTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIMOUTW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Timer output is logic one when enabled and is not affected by timer reset"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIMOUTW::_0)
            }
            #[doc = "Timer output is logic zero when enabled and is not affected by timer reset"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TIMOUTW::_1)
            }
            #[doc = "Timer output is logic one when enabled and on timer reset"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(TIMOUTW::_10)
            }
            #[doc = "Timer output is logic zero when enabled and on timer reset"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(TIMOUTW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 1 - Timer Start Bit"]
            #[inline(always)]
            pub fn tstart(&self) -> TSTARTR {
                TSTARTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 4:5 - Timer Stop Bit"]
            #[inline(always)]
            pub fn tstop(&self) -> TSTOPR {
                TSTOPR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 8:10 - Timer Enable"]
            #[inline(always)]
            pub fn timena(&self) -> TIMENAR {
                TIMENAR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 12:14 - Timer Disable"]
            #[inline(always)]
            pub fn timdis(&self) -> TIMDISR {
                TIMDISR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 16:18 - Timer Reset"]
            #[inline(always)]
            pub fn timrst(&self) -> TIMRSTR {
                TIMRSTR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 20:21 - Timer Decrement"]
            #[inline(always)]
            pub fn timdec(&self) -> TIMDECR {
                TIMDECR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 24:25 - Timer Output"]
            #[inline(always)]
            pub fn timout(&self) -> TIMOUTR {
                TIMOUTR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 1 - Timer Start Bit"]
            #[inline(always)]
            pub fn tstart(&mut self) -> _TSTARTW {
                _TSTARTW { w: self }
            }
            #[doc = "Bits 4:5 - Timer Stop Bit"]
            #[inline(always)]
            pub fn tstop(&mut self) -> _TSTOPW {
                _TSTOPW { w: self }
            }
            #[doc = "Bits 8:10 - Timer Enable"]
            #[inline(always)]
            pub fn timena(&mut self) -> _TIMENAW {
                _TIMENAW { w: self }
            }
            #[doc = "Bits 12:14 - Timer Disable"]
            #[inline(always)]
            pub fn timdis(&mut self) -> _TIMDISW {
                _TIMDISW { w: self }
            }
            #[doc = "Bits 16:18 - Timer Reset"]
            #[inline(always)]
            pub fn timrst(&mut self) -> _TIMRSTW {
                _TIMRSTW { w: self }
            }
            #[doc = "Bits 20:21 - Timer Decrement"]
            #[inline(always)]
            pub fn timdec(&mut self) -> _TIMDECW {
                _TIMDECW { w: self }
            }
            #[doc = "Bits 24:25 - Timer Output"]
            #[inline(always)]
            pub fn timout(&mut self) -> _TIMOUTW {
                _TIMOUTW { w: self }
            }
        }
    }
    #[doc = "Timer Configuration N Register"]
    pub struct TIMCFG3 {
        register: VolatileCell<u32>,
    }
    #[doc = "Timer Configuration N Register"]
    pub mod timcfg3 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TIMCFG3 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TSTART`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TSTARTR {
            #[doc = "Start bit disabled"]
            _0,
            #[doc = "Start bit enabled"]
            _1,
        }
        impl TSTARTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TSTARTR::_0 => false,
                    TSTARTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TSTARTR {
                match value {
                    false => TSTARTR::_0,
                    true => TSTARTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TSTARTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TSTARTR::_1
            }
        }
        #[doc = "Possible values of the field `TSTOP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TSTOPR {
            #[doc = "Stop bit disabled"]
            _0,
            #[doc = "Stop bit is enabled on timer compare"]
            _1,
            #[doc = "Stop bit is enabled on timer disable"]
            _10,
            #[doc = "Stop bit is enabled on timer compare and timer disable"]
            _11,
        }
        impl TSTOPR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TSTOPR::_0 => 0,
                    TSTOPR::_1 => 1,
                    TSTOPR::_10 => 2,
                    TSTOPR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TSTOPR {
                match value {
                    0 => TSTOPR::_0,
                    1 => TSTOPR::_1,
                    2 => TSTOPR::_10,
                    3 => TSTOPR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TSTOPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TSTOPR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == TSTOPR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == TSTOPR::_11
            }
        }
        #[doc = "Possible values of the field `TIMENA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIMENAR {
            #[doc = "Timer always enabled"]
            _0,
            #[doc = "Timer enabled on Timer N-1 enable"]
            _1,
            #[doc = "Timer enabled on Trigger high"]
            _10,
            #[doc = "Timer enabled on Trigger high and Pin high"]
            _11,
            #[doc = "Timer enabled on Pin rising edge"]
            _100,
            #[doc = "Timer enabled on Pin rising edge and Trigger high"]
            _101,
            #[doc = "Timer enabled on Trigger rising edge"]
            _110,
            #[doc = "Timer enabled on Trigger rising or falling edge"]
            _111,
        }
        impl TIMENAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TIMENAR::_0 => 0,
                    TIMENAR::_1 => 1,
                    TIMENAR::_10 => 2,
                    TIMENAR::_11 => 3,
                    TIMENAR::_100 => 4,
                    TIMENAR::_101 => 5,
                    TIMENAR::_110 => 6,
                    TIMENAR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TIMENAR {
                match value {
                    0 => TIMENAR::_0,
                    1 => TIMENAR::_1,
                    2 => TIMENAR::_10,
                    3 => TIMENAR::_11,
                    4 => TIMENAR::_100,
                    5 => TIMENAR::_101,
                    6 => TIMENAR::_110,
                    7 => TIMENAR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIMENAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TIMENAR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == TIMENAR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == TIMENAR::_11
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == TIMENAR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == TIMENAR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == TIMENAR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == TIMENAR::_111
            }
        }
        #[doc = "Possible values of the field `TIMDIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIMDISR {
            #[doc = "Timer never disabled"]
            _0,
            #[doc = "Timer disabled on Timer N-1 disable"]
            _1,
            #[doc = "Timer disabled on Timer compare"]
            _10,
            #[doc = "Timer disabled on Timer compare and Trigger Low"]
            _11,
            #[doc = "Timer disabled on Pin rising or falling edge"]
            _100,
            #[doc = "Timer disabled on Pin rising or falling edge provided Trigger is high"]
            _101,
            #[doc = "Timer disabled on Trigger falling edge"]
            _110,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl TIMDISR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TIMDISR::_0 => 0,
                    TIMDISR::_1 => 1,
                    TIMDISR::_10 => 2,
                    TIMDISR::_11 => 3,
                    TIMDISR::_100 => 4,
                    TIMDISR::_101 => 5,
                    TIMDISR::_110 => 6,
                    TIMDISR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TIMDISR {
                match value {
                    0 => TIMDISR::_0,
                    1 => TIMDISR::_1,
                    2 => TIMDISR::_10,
                    3 => TIMDISR::_11,
                    4 => TIMDISR::_100,
                    5 => TIMDISR::_101,
                    6 => TIMDISR::_110,
                    i => TIMDISR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIMDISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TIMDISR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == TIMDISR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == TIMDISR::_11
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == TIMDISR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == TIMDISR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == TIMDISR::_110
            }
        }
        #[doc = "Possible values of the field `TIMRST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIMRSTR {
            #[doc = "Timer never reset"]
            _0,
            #[doc = "Timer reset on Timer Pin equal to Timer Output"]
            _10,
            #[doc = "Timer reset on Timer Trigger equal to Timer Output"]
            _11,
            #[doc = "Timer reset on Timer Pin rising edge"]
            _100,
            #[doc = "Timer reset on Trigger rising edge"]
            _110,
            #[doc = "Timer reset on Trigger rising or falling edge"]
            _111,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl TIMRSTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TIMRSTR::_0 => 0,
                    TIMRSTR::_10 => 2,
                    TIMRSTR::_11 => 3,
                    TIMRSTR::_100 => 4,
                    TIMRSTR::_110 => 6,
                    TIMRSTR::_111 => 7,
                    TIMRSTR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TIMRSTR {
                match value {
                    0 => TIMRSTR::_0,
                    2 => TIMRSTR::_10,
                    3 => TIMRSTR::_11,
                    4 => TIMRSTR::_100,
                    6 => TIMRSTR::_110,
                    7 => TIMRSTR::_111,
                    i => TIMRSTR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIMRSTR::_0
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == TIMRSTR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == TIMRSTR::_11
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == TIMRSTR::_100
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == TIMRSTR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == TIMRSTR::_111
            }
        }
        #[doc = "Possible values of the field `TIMDEC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIMDECR {
            #[doc = "Decrement counter on FlexIO clock, Shift clock equals Timer output."]
            _0,
            #[doc = "Decrement counter on Trigger input (both edges), Shift clock equals Timer output."]
            _1,
            #[doc = "Decrement counter on Pin input (both edges), Shift clock equals Pin input."]
            _10,
            #[doc = "Decrement counter on Trigger input (both edges), Shift clock equals Trigger input."]
            _11,
        }
        impl TIMDECR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TIMDECR::_0 => 0,
                    TIMDECR::_1 => 1,
                    TIMDECR::_10 => 2,
                    TIMDECR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TIMDECR {
                match value {
                    0 => TIMDECR::_0,
                    1 => TIMDECR::_1,
                    2 => TIMDECR::_10,
                    3 => TIMDECR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIMDECR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TIMDECR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == TIMDECR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == TIMDECR::_11
            }
        }
        #[doc = "Possible values of the field `TIMOUT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIMOUTR {
            #[doc = "Timer output is logic one when enabled and is not affected by timer reset"]
            _0,
            #[doc = "Timer output is logic zero when enabled and is not affected by timer reset"]
            _1,
            #[doc = "Timer output is logic one when enabled and on timer reset"]
            _10,
            #[doc = "Timer output is logic zero when enabled and on timer reset"]
            _11,
        }
        impl TIMOUTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TIMOUTR::_0 => 0,
                    TIMOUTR::_1 => 1,
                    TIMOUTR::_10 => 2,
                    TIMOUTR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TIMOUTR {
                match value {
                    0 => TIMOUTR::_0,
                    1 => TIMOUTR::_1,
                    2 => TIMOUTR::_10,
                    3 => TIMOUTR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIMOUTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TIMOUTR::_1
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == TIMOUTR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == TIMOUTR::_11
            }
        }
        #[doc = "Values that can be written to the field `TSTART`"]
        pub enum TSTARTW {
            #[doc = "Start bit disabled"]
            _0,
            #[doc = "Start bit enabled"]
            _1,
        }
        impl TSTARTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TSTARTW::_0 => false,
                    TSTARTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TSTARTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TSTARTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TSTARTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Start bit disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TSTARTW::_0)
            }
            #[doc = "Start bit enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TSTARTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TSTOP`"]
        pub enum TSTOPW {
            #[doc = "Stop bit disabled"]
            _0,
            #[doc = "Stop bit is enabled on timer compare"]
            _1,
            #[doc = "Stop bit is enabled on timer disable"]
            _10,
            #[doc = "Stop bit is enabled on timer compare and timer disable"]
            _11,
        }
        impl TSTOPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TSTOPW::_0 => 0,
                    TSTOPW::_1 => 1,
                    TSTOPW::_10 => 2,
                    TSTOPW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TSTOPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TSTOPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TSTOPW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Stop bit disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TSTOPW::_0)
            }
            #[doc = "Stop bit is enabled on timer compare"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TSTOPW::_1)
            }
            #[doc = "Stop bit is enabled on timer disable"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(TSTOPW::_10)
            }
            #[doc = "Stop bit is enabled on timer compare and timer disable"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(TSTOPW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TIMENA`"]
        pub enum TIMENAW {
            #[doc = "Timer always enabled"]
            _0,
            #[doc = "Timer enabled on Timer N-1 enable"]
            _1,
            #[doc = "Timer enabled on Trigger high"]
            _10,
            #[doc = "Timer enabled on Trigger high and Pin high"]
            _11,
            #[doc = "Timer enabled on Pin rising edge"]
            _100,
            #[doc = "Timer enabled on Pin rising edge and Trigger high"]
            _101,
            #[doc = "Timer enabled on Trigger rising edge"]
            _110,
            #[doc = "Timer enabled on Trigger rising or falling edge"]
            _111,
        }
        impl TIMENAW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TIMENAW::_0 => 0,
                    TIMENAW::_1 => 1,
                    TIMENAW::_10 => 2,
                    TIMENAW::_11 => 3,
                    TIMENAW::_100 => 4,
                    TIMENAW::_101 => 5,
                    TIMENAW::_110 => 6,
                    TIMENAW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIMENAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIMENAW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIMENAW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Timer always enabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIMENAW::_0)
            }
            #[doc = "Timer enabled on Timer N-1 enable"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TIMENAW::_1)
            }
            #[doc = "Timer enabled on Trigger high"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(TIMENAW::_10)
            }
            #[doc = "Timer enabled on Trigger high and Pin high"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(TIMENAW::_11)
            }
            #[doc = "Timer enabled on Pin rising edge"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(TIMENAW::_100)
            }
            #[doc = "Timer enabled on Pin rising edge and Trigger high"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(TIMENAW::_101)
            }
            #[doc = "Timer enabled on Trigger rising edge"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(TIMENAW::_110)
            }
            #[doc = "Timer enabled on Trigger rising or falling edge"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(TIMENAW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TIMDIS`"]
        pub enum TIMDISW {
            #[doc = "Timer never disabled"]
            _0,
            #[doc = "Timer disabled on Timer N-1 disable"]
            _1,
            #[doc = "Timer disabled on Timer compare"]
            _10,
            #[doc = "Timer disabled on Timer compare and Trigger Low"]
            _11,
            #[doc = "Timer disabled on Pin rising or falling edge"]
            _100,
            #[doc = "Timer disabled on Pin rising or falling edge provided Trigger is high"]
            _101,
            #[doc = "Timer disabled on Trigger falling edge"]
            _110,
        }
        impl TIMDISW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TIMDISW::_0 => 0,
                    TIMDISW::_1 => 1,
                    TIMDISW::_10 => 2,
                    TIMDISW::_11 => 3,
                    TIMDISW::_100 => 4,
                    TIMDISW::_101 => 5,
                    TIMDISW::_110 => 6,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIMDISW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIMDISW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIMDISW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Timer never disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIMDISW::_0)
            }
            #[doc = "Timer disabled on Timer N-1 disable"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TIMDISW::_1)
            }
            #[doc = "Timer disabled on Timer compare"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(TIMDISW::_10)
            }
            #[doc = "Timer disabled on Timer compare and Trigger Low"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(TIMDISW::_11)
            }
            #[doc = "Timer disabled on Pin rising or falling edge"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(TIMDISW::_100)
            }
            #[doc = "Timer disabled on Pin rising or falling edge provided Trigger is high"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(TIMDISW::_101)
            }
            #[doc = "Timer disabled on Trigger falling edge"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(TIMDISW::_110)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TIMRST`"]
        pub enum TIMRSTW {
            #[doc = "Timer never reset"]
            _0,
            #[doc = "Timer reset on Timer Pin equal to Timer Output"]
            _10,
            #[doc = "Timer reset on Timer Trigger equal to Timer Output"]
            _11,
            #[doc = "Timer reset on Timer Pin rising edge"]
            _100,
            #[doc = "Timer reset on Trigger rising edge"]
            _110,
            #[doc = "Timer reset on Trigger rising or falling edge"]
            _111,
        }
        impl TIMRSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TIMRSTW::_0 => 0,
                    TIMRSTW::_10 => 2,
                    TIMRSTW::_11 => 3,
                    TIMRSTW::_100 => 4,
                    TIMRSTW::_110 => 6,
                    TIMRSTW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIMRSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIMRSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIMRSTW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Timer never reset"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIMRSTW::_0)
            }
            #[doc = "Timer reset on Timer Pin equal to Timer Output"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(TIMRSTW::_10)
            }
            #[doc = "Timer reset on Timer Trigger equal to Timer Output"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(TIMRSTW::_11)
            }
            #[doc = "Timer reset on Timer Pin rising edge"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(TIMRSTW::_100)
            }
            #[doc = "Timer reset on Trigger rising edge"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(TIMRSTW::_110)
            }
            #[doc = "Timer reset on Trigger rising or falling edge"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(TIMRSTW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TIMDEC`"]
        pub enum TIMDECW {
            #[doc = "Decrement counter on FlexIO clock, Shift clock equals Timer output."]
            _0,
            #[doc = "Decrement counter on Trigger input (both edges), Shift clock equals Timer output."]
            _1,
            #[doc = "Decrement counter on Pin input (both edges), Shift clock equals Pin input."]
            _10,
            #[doc = "Decrement counter on Trigger input (both edges), Shift clock equals Trigger input."]
            _11,
        }
        impl TIMDECW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TIMDECW::_0 => 0,
                    TIMDECW::_1 => 1,
                    TIMDECW::_10 => 2,
                    TIMDECW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIMDECW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIMDECW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIMDECW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Decrement counter on FlexIO clock, Shift clock equals Timer output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIMDECW::_0)
            }
            #[doc = "Decrement counter on Trigger input (both edges), Shift clock equals Timer output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TIMDECW::_1)
            }
            #[doc = "Decrement counter on Pin input (both edges), Shift clock equals Pin input."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(TIMDECW::_10)
            }
            #[doc = "Decrement counter on Trigger input (both edges), Shift clock equals Trigger input."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(TIMDECW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TIMOUT`"]
        pub enum TIMOUTW {
            #[doc = "Timer output is logic one when enabled and is not affected by timer reset"]
            _0,
            #[doc = "Timer output is logic zero when enabled and is not affected by timer reset"]
            _1,
            #[doc = "Timer output is logic one when enabled and on timer reset"]
            _10,
            #[doc = "Timer output is logic zero when enabled and on timer reset"]
            _11,
        }
        impl TIMOUTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TIMOUTW::_0 => 0,
                    TIMOUTW::_1 => 1,
                    TIMOUTW::_10 => 2,
                    TIMOUTW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIMOUTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIMOUTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIMOUTW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Timer output is logic one when enabled and is not affected by timer reset"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIMOUTW::_0)
            }
            #[doc = "Timer output is logic zero when enabled and is not affected by timer reset"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TIMOUTW::_1)
            }
            #[doc = "Timer output is logic one when enabled and on timer reset"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(TIMOUTW::_10)
            }
            #[doc = "Timer output is logic zero when enabled and on timer reset"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(TIMOUTW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 1 - Timer Start Bit"]
            #[inline(always)]
            pub fn tstart(&self) -> TSTARTR {
                TSTARTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 4:5 - Timer Stop Bit"]
            #[inline(always)]
            pub fn tstop(&self) -> TSTOPR {
                TSTOPR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 8:10 - Timer Enable"]
            #[inline(always)]
            pub fn timena(&self) -> TIMENAR {
                TIMENAR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 12:14 - Timer Disable"]
            #[inline(always)]
            pub fn timdis(&self) -> TIMDISR {
                TIMDISR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 16:18 - Timer Reset"]
            #[inline(always)]
            pub fn timrst(&self) -> TIMRSTR {
                TIMRSTR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 20:21 - Timer Decrement"]
            #[inline(always)]
            pub fn timdec(&self) -> TIMDECR {
                TIMDECR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 24:25 - Timer Output"]
            #[inline(always)]
            pub fn timout(&self) -> TIMOUTR {
                TIMOUTR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 1 - Timer Start Bit"]
            #[inline(always)]
            pub fn tstart(&mut self) -> _TSTARTW {
                _TSTARTW { w: self }
            }
            #[doc = "Bits 4:5 - Timer Stop Bit"]
            #[inline(always)]
            pub fn tstop(&mut self) -> _TSTOPW {
                _TSTOPW { w: self }
            }
            #[doc = "Bits 8:10 - Timer Enable"]
            #[inline(always)]
            pub fn timena(&mut self) -> _TIMENAW {
                _TIMENAW { w: self }
            }
            #[doc = "Bits 12:14 - Timer Disable"]
            #[inline(always)]
            pub fn timdis(&mut self) -> _TIMDISW {
                _TIMDISW { w: self }
            }
            #[doc = "Bits 16:18 - Timer Reset"]
            #[inline(always)]
            pub fn timrst(&mut self) -> _TIMRSTW {
                _TIMRSTW { w: self }
            }
            #[doc = "Bits 20:21 - Timer Decrement"]
            #[inline(always)]
            pub fn timdec(&mut self) -> _TIMDECW {
                _TIMDECW { w: self }
            }
            #[doc = "Bits 24:25 - Timer Output"]
            #[inline(always)]
            pub fn timout(&mut self) -> _TIMOUTW {
                _TIMOUTW { w: self }
            }
        }
    }
    #[doc = "Timer Compare N Register"]
    pub struct TIMCMP0 {
        register: VolatileCell<u32>,
    }
    #[doc = "Timer Compare N Register"]
    pub mod timcmp0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TIMCMP0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CMPR {
            bits: u16,
        }
        impl CMPR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CMPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CMPW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Timer Compare Value"]
            #[inline(always)]
            pub fn cmp(&self) -> CMPR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                CMPR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Timer Compare Value"]
            #[inline(always)]
            pub fn cmp(&mut self) -> _CMPW {
                _CMPW { w: self }
            }
        }
    }
    #[doc = "Timer Compare N Register"]
    pub struct TIMCMP1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Timer Compare N Register"]
    pub mod timcmp1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TIMCMP1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CMPR {
            bits: u16,
        }
        impl CMPR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CMPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CMPW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Timer Compare Value"]
            #[inline(always)]
            pub fn cmp(&self) -> CMPR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                CMPR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Timer Compare Value"]
            #[inline(always)]
            pub fn cmp(&mut self) -> _CMPW {
                _CMPW { w: self }
            }
        }
    }
    #[doc = "Timer Compare N Register"]
    pub struct TIMCMP2 {
        register: VolatileCell<u32>,
    }
    #[doc = "Timer Compare N Register"]
    pub mod timcmp2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TIMCMP2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CMPR {
            bits: u16,
        }
        impl CMPR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CMPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CMPW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Timer Compare Value"]
            #[inline(always)]
            pub fn cmp(&self) -> CMPR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                CMPR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Timer Compare Value"]
            #[inline(always)]
            pub fn cmp(&mut self) -> _CMPW {
                _CMPW { w: self }
            }
        }
    }
    #[doc = "Timer Compare N Register"]
    pub struct TIMCMP3 {
        register: VolatileCell<u32>,
    }
    #[doc = "Timer Compare N Register"]
    pub mod timcmp3 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TIMCMP3 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CMPR {
            bits: u16,
        }
        impl CMPR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CMPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CMPW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 65535;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Timer Compare Value"]
            #[inline(always)]
            pub fn cmp(&self) -> CMPR {
                let bits = {
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                CMPR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:15 - Timer Compare Value"]
            #[inline(always)]
            pub fn cmp(&mut self) -> _CMPW {
                _CMPW { w: self }
            }
        }
    }
}
#[doc = "The FLEXIO Memory Map/Register Definition can be found here."]
pub struct FLEXIO {
    register_block: flexio::RegisterBlock,
}
impl Deref for FLEXIO {
    type Target = flexio::RegisterBlock;
    fn deref(&self) -> &flexio::RegisterBlock {
        &self.register_block
    }
}
#[doc = "External Watchdog Monitor"]
pub const EWM: Peripheral<EWM> = unsafe { Peripheral::new(1074139136) };
#[doc = "External Watchdog Monitor"]
pub mod ewm {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - Control Register"]
        pub ctrl: CTRL,
        #[doc = "0x01 - Service Register"]
        pub serv: SERV,
        #[doc = "0x02 - Compare Low Register"]
        pub cmpl: CMPL,
        #[doc = "0x03 - Compare High Register"]
        pub cmph: CMPH,
        _reserved0: [u8; 1usize],
        #[doc = "0x05 - Clock Prescaler Register"]
        pub clkprescaler: CLKPRESCALER,
    }
    #[doc = "Control Register"]
    pub struct CTRL {
        register: VolatileCell<u8>,
    }
    #[doc = "Control Register"]
    pub mod ctrl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::CTRL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct EWMENR {
            bits: bool,
        }
        impl EWMENR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct ASSINR {
            bits: bool,
        }
        impl ASSINR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct INENR {
            bits: bool,
        }
        impl INENR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct INTENR {
            bits: bool,
        }
        impl INTENR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Proxy"]
        pub struct _EWMENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _EWMENW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ASSINW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ASSINW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _INENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INENW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _INTENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INTENW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bit 0 - EWM enable."]
            #[inline(always)]
            pub fn ewmen(&self) -> EWMENR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                };
                EWMENR { bits }
            }
            #[doc = "Bit 1 - EWM_in's Assertion State Select."]
            #[inline(always)]
            pub fn assin(&self) -> ASSINR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                };
                ASSINR { bits }
            }
            #[doc = "Bit 2 - Input Enable."]
            #[inline(always)]
            pub fn inen(&self) -> INENR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                };
                INENR { bits }
            }
            #[doc = "Bit 3 - Interrupt Enable."]
            #[inline(always)]
            pub fn inten(&self) -> INTENR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                };
                INTENR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - EWM enable."]
            #[inline(always)]
            pub fn ewmen(&mut self) -> _EWMENW {
                _EWMENW { w: self }
            }
            #[doc = "Bit 1 - EWM_in's Assertion State Select."]
            #[inline(always)]
            pub fn assin(&mut self) -> _ASSINW {
                _ASSINW { w: self }
            }
            #[doc = "Bit 2 - Input Enable."]
            #[inline(always)]
            pub fn inen(&mut self) -> _INENW {
                _INENW { w: self }
            }
            #[doc = "Bit 3 - Interrupt Enable."]
            #[inline(always)]
            pub fn inten(&mut self) -> _INTENW {
                _INTENW { w: self }
            }
        }
    }
    #[doc = "Service Register"]
    pub struct SERV {
        register: VolatileCell<u8>,
    }
    #[doc = "Service Register"]
    pub mod serv {
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::SERV {
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
        }
        #[doc = r" Proxy"]
        pub struct _SERVICEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SERVICEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - SERVICE"]
            #[inline(always)]
            pub fn service(&mut self) -> _SERVICEW {
                _SERVICEW { w: self }
            }
        }
    }
    #[doc = "Compare Low Register"]
    pub struct CMPL {
        register: VolatileCell<u8>,
    }
    #[doc = "Compare Low Register"]
    pub mod cmpl {
        impl super::CMPL {}
    }
    #[doc = "Compare High Register"]
    pub struct CMPH {
        register: VolatileCell<u8>,
    }
    #[doc = "Compare High Register"]
    pub mod cmph {
        impl super::CMPH {}
    }
    #[doc = "Clock Prescaler Register"]
    pub struct CLKPRESCALER {
        register: VolatileCell<u8>,
    }
    #[doc = "Clock Prescaler Register"]
    pub mod clkprescaler {
        impl super::CLKPRESCALER {}
    }
}
#[doc = "External Watchdog Monitor"]
pub struct EWM {
    register_block: ewm::RegisterBlock,
}
impl Deref for EWM {
    type Target = ewm::RegisterBlock;
    fn deref(&self) -> &ewm::RegisterBlock {
        &self.register_block
    }
}
#[doc = "TRGMUX"]
pub const TRGMUX: Peripheral<TRGMUX> = unsafe { Peripheral::new(1074147328) };
#[doc = "TRGMUX"]
pub mod trgmux {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - TRGMUX DMAMUX0 Register"]
        pub trgmux_dmamux0: TRGMUX_DMAMUX0,
        #[doc = "0x04 - TRGMUX EXTOUT0 Register"]
        pub trgmux_extout0: TRGMUX_EXTOUT0,
        #[doc = "0x08 - TRGMUX EXTOUT1 Register"]
        pub trgmux_extout1: TRGMUX_EXTOUT1,
        #[doc = "0x0c - TRGMUX ADC0 Register"]
        pub trgmux_adc0: TRGMUX_ADC0,
        #[doc = "0x10 - TRGMUX ADC1 Register"]
        pub trgmux_adc1: TRGMUX_ADC1,
        #[doc = "0x14 - TRGMUX Reserved Register 5"]
        pub trgmuxdummy5: TRGMUXDUMMY5,
        #[doc = "0x18 - TRGMUX Reserved Register 6"]
        pub trgmuxdummy6: TRGMUXDUMMY6,
        #[doc = "0x1c - TRGMUX CMP0 Register"]
        pub trgmux_cmp0: TRGMUX_CMP0,
        #[doc = "0x20 - TRGMUX Reserved Register 8"]
        pub trgmuxdummy8: TRGMUXDUMMY8,
        #[doc = "0x24 - TRGMUX Reserved Register 9"]
        pub trgmuxdummy9: TRGMUXDUMMY9,
        #[doc = "0x28 - TRGMUX FTM0 Register"]
        pub trgmux_ftm0: TRGMUX_FTM0,
        #[doc = "0x2c - TRGMUX FTM1 Register"]
        pub trgmux_ftm1: TRGMUX_FTM1,
        #[doc = "0x30 - TRGMUX FTM2 Register"]
        pub trgmux_ftm2: TRGMUX_FTM2,
        #[doc = "0x34 - TRGMUX FTM3 Register"]
        pub trgmux_ftm3: TRGMUX_FTM3,
        #[doc = "0x38 - TRGMUX PDB0 Register"]
        pub trgmux_pdb0: TRGMUX_PDB0,
        #[doc = "0x3c - TRGMUX PDB1 Register"]
        pub trgmux_pdb1: TRGMUX_PDB1,
        #[doc = "0x40 - TRGMUX Reserved Register 16"]
        pub trgmuxdummy16: TRGMUXDUMMY16,
        #[doc = "0x44 - TRGMUX FLEXIO Register"]
        pub trgmux_flexio: TRGMUX_FLEXIO,
        #[doc = "0x48 - TRGMUX LPIT0 Register"]
        pub trgmux_lpit0: TRGMUX_LPIT0,
        #[doc = "0x4c - TRGMUX LPUART0 Register"]
        pub trgmux_lpuart0: TRGMUX_LPUART0,
        #[doc = "0x50 - TRGMUX LPUART1 Register"]
        pub trgmux_lpuart1: TRGMUX_LPUART1,
        #[doc = "0x54 - TRGMUX LPI2C0 Register"]
        pub trgmux_lpi2c0: TRGMUX_LPI2C0,
        #[doc = "0x58 - TRGMUX Reserved Register 22"]
        pub trgmuxdummy22: TRGMUXDUMMY22,
        #[doc = "0x5c - TRGMUX LPSPI0 Register"]
        pub trgmux_lpspi0: TRGMUX_LPSPI0,
        #[doc = "0x60 - TRGMUX LPSPI1 Register"]
        pub trgmux_lpspi1: TRGMUX_LPSPI1,
        #[doc = "0x64 - TRGMUX LPTMR0 Register"]
        pub trgmux_lptmr0: TRGMUX_LPTMR0,
    }
    #[doc = "TRGMUX DMAMUX0 Register"]
    pub struct TRGMUX_DMAMUX0 {
        register: VolatileCell<u32>,
    }
    #[doc = "TRGMUX DMAMUX0 Register"]
    pub mod trgmux_dmamux0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TRGMUX_DMAMUX0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL0R {
            bits: u8,
        }
        impl SEL0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL1R {
            bits: u8,
        }
        impl SEL1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL2R {
            bits: u8,
        }
        impl SEL2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL3R {
            bits: u8,
        }
        impl SEL3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Register can be written."]
            _0,
            #[doc = "Register cannot be written until the next system Reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Register can be written."]
            _0,
            #[doc = "Register cannot be written until the next system Reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Register can be written."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Register cannot be written until the next system Reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Trigger MUX Input 0 Source Select"]
            #[inline(always)]
            pub fn sel0(&self) -> SEL0R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL0R { bits }
            }
            #[doc = "Bits 8:13 - Trigger MUX Input 1 Source Select"]
            #[inline(always)]
            pub fn sel1(&self) -> SEL1R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL1R { bits }
            }
            #[doc = "Bits 16:21 - Trigger MUX Input 2 Source Select"]
            #[inline(always)]
            pub fn sel2(&self) -> SEL2R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL2R { bits }
            }
            #[doc = "Bits 24:29 - Trigger MUX Input 3 Source Select"]
            #[inline(always)]
            pub fn sel3(&self) -> SEL3R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL3R { bits }
            }
            #[doc = "Bit 31 - TRGMUX register lock."]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - Trigger MUX Input 0 Source Select"]
            #[inline(always)]
            pub fn sel0(&mut self) -> _SEL0W {
                _SEL0W { w: self }
            }
            #[doc = "Bits 8:13 - Trigger MUX Input 1 Source Select"]
            #[inline(always)]
            pub fn sel1(&mut self) -> _SEL1W {
                _SEL1W { w: self }
            }
            #[doc = "Bits 16:21 - Trigger MUX Input 2 Source Select"]
            #[inline(always)]
            pub fn sel2(&mut self) -> _SEL2W {
                _SEL2W { w: self }
            }
            #[doc = "Bits 24:29 - Trigger MUX Input 3 Source Select"]
            #[inline(always)]
            pub fn sel3(&mut self) -> _SEL3W {
                _SEL3W { w: self }
            }
            #[doc = "Bit 31 - TRGMUX register lock."]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
        }
    }
    #[doc = "TRGMUX EXTOUT0 Register"]
    pub struct TRGMUX_EXTOUT0 {
        register: VolatileCell<u32>,
    }
    #[doc = "TRGMUX EXTOUT0 Register"]
    pub mod trgmux_extout0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TRGMUX_EXTOUT0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL0R {
            bits: u8,
        }
        impl SEL0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL1R {
            bits: u8,
        }
        impl SEL1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL2R {
            bits: u8,
        }
        impl SEL2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL3R {
            bits: u8,
        }
        impl SEL3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Register can be written."]
            _0,
            #[doc = "Register cannot be written until the next system Reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Register can be written."]
            _0,
            #[doc = "Register cannot be written until the next system Reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Register can be written."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Register cannot be written until the next system Reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Trigger MUX Input 0 Source Select"]
            #[inline(always)]
            pub fn sel0(&self) -> SEL0R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL0R { bits }
            }
            #[doc = "Bits 8:13 - Trigger MUX Input 1 Source Select"]
            #[inline(always)]
            pub fn sel1(&self) -> SEL1R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL1R { bits }
            }
            #[doc = "Bits 16:21 - Trigger MUX Input 2 Source Select"]
            #[inline(always)]
            pub fn sel2(&self) -> SEL2R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL2R { bits }
            }
            #[doc = "Bits 24:29 - Trigger MUX Input 3 Source Select"]
            #[inline(always)]
            pub fn sel3(&self) -> SEL3R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL3R { bits }
            }
            #[doc = "Bit 31 - TRGMUX register lock."]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - Trigger MUX Input 0 Source Select"]
            #[inline(always)]
            pub fn sel0(&mut self) -> _SEL0W {
                _SEL0W { w: self }
            }
            #[doc = "Bits 8:13 - Trigger MUX Input 1 Source Select"]
            #[inline(always)]
            pub fn sel1(&mut self) -> _SEL1W {
                _SEL1W { w: self }
            }
            #[doc = "Bits 16:21 - Trigger MUX Input 2 Source Select"]
            #[inline(always)]
            pub fn sel2(&mut self) -> _SEL2W {
                _SEL2W { w: self }
            }
            #[doc = "Bits 24:29 - Trigger MUX Input 3 Source Select"]
            #[inline(always)]
            pub fn sel3(&mut self) -> _SEL3W {
                _SEL3W { w: self }
            }
            #[doc = "Bit 31 - TRGMUX register lock."]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
        }
    }
    #[doc = "TRGMUX EXTOUT1 Register"]
    pub struct TRGMUX_EXTOUT1 {
        register: VolatileCell<u32>,
    }
    #[doc = "TRGMUX EXTOUT1 Register"]
    pub mod trgmux_extout1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TRGMUX_EXTOUT1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL0R {
            bits: u8,
        }
        impl SEL0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL1R {
            bits: u8,
        }
        impl SEL1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL2R {
            bits: u8,
        }
        impl SEL2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL3R {
            bits: u8,
        }
        impl SEL3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Register can be written."]
            _0,
            #[doc = "Register cannot be written until the next system Reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Register can be written."]
            _0,
            #[doc = "Register cannot be written until the next system Reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Register can be written."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Register cannot be written until the next system Reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Trigger MUX Input 0 Source Select"]
            #[inline(always)]
            pub fn sel0(&self) -> SEL0R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL0R { bits }
            }
            #[doc = "Bits 8:13 - Trigger MUX Input 1 Source Select"]
            #[inline(always)]
            pub fn sel1(&self) -> SEL1R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL1R { bits }
            }
            #[doc = "Bits 16:21 - Trigger MUX Input 2 Source Select"]
            #[inline(always)]
            pub fn sel2(&self) -> SEL2R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL2R { bits }
            }
            #[doc = "Bits 24:29 - Trigger MUX Input 3 Source Select"]
            #[inline(always)]
            pub fn sel3(&self) -> SEL3R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL3R { bits }
            }
            #[doc = "Bit 31 - TRGMUX register lock."]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - Trigger MUX Input 0 Source Select"]
            #[inline(always)]
            pub fn sel0(&mut self) -> _SEL0W {
                _SEL0W { w: self }
            }
            #[doc = "Bits 8:13 - Trigger MUX Input 1 Source Select"]
            #[inline(always)]
            pub fn sel1(&mut self) -> _SEL1W {
                _SEL1W { w: self }
            }
            #[doc = "Bits 16:21 - Trigger MUX Input 2 Source Select"]
            #[inline(always)]
            pub fn sel2(&mut self) -> _SEL2W {
                _SEL2W { w: self }
            }
            #[doc = "Bits 24:29 - Trigger MUX Input 3 Source Select"]
            #[inline(always)]
            pub fn sel3(&mut self) -> _SEL3W {
                _SEL3W { w: self }
            }
            #[doc = "Bit 31 - TRGMUX register lock."]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
        }
    }
    #[doc = "TRGMUX ADC0 Register"]
    pub struct TRGMUX_ADC0 {
        register: VolatileCell<u32>,
    }
    #[doc = "TRGMUX ADC0 Register"]
    pub mod trgmux_adc0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TRGMUX_ADC0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL0R {
            bits: u8,
        }
        impl SEL0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL1R {
            bits: u8,
        }
        impl SEL1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL2R {
            bits: u8,
        }
        impl SEL2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL3R {
            bits: u8,
        }
        impl SEL3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Register can be written."]
            _0,
            #[doc = "Register cannot be written until the next system Reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Register can be written."]
            _0,
            #[doc = "Register cannot be written until the next system Reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Register can be written."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Register cannot be written until the next system Reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Trigger MUX Input 0 Source Select"]
            #[inline(always)]
            pub fn sel0(&self) -> SEL0R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL0R { bits }
            }
            #[doc = "Bits 8:13 - Trigger MUX Input 1 Source Select"]
            #[inline(always)]
            pub fn sel1(&self) -> SEL1R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL1R { bits }
            }
            #[doc = "Bits 16:21 - Trigger MUX Input 2 Source Select"]
            #[inline(always)]
            pub fn sel2(&self) -> SEL2R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL2R { bits }
            }
            #[doc = "Bits 24:29 - Trigger MUX Input 3 Source Select"]
            #[inline(always)]
            pub fn sel3(&self) -> SEL3R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL3R { bits }
            }
            #[doc = "Bit 31 - TRGMUX register lock."]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - Trigger MUX Input 0 Source Select"]
            #[inline(always)]
            pub fn sel0(&mut self) -> _SEL0W {
                _SEL0W { w: self }
            }
            #[doc = "Bits 8:13 - Trigger MUX Input 1 Source Select"]
            #[inline(always)]
            pub fn sel1(&mut self) -> _SEL1W {
                _SEL1W { w: self }
            }
            #[doc = "Bits 16:21 - Trigger MUX Input 2 Source Select"]
            #[inline(always)]
            pub fn sel2(&mut self) -> _SEL2W {
                _SEL2W { w: self }
            }
            #[doc = "Bits 24:29 - Trigger MUX Input 3 Source Select"]
            #[inline(always)]
            pub fn sel3(&mut self) -> _SEL3W {
                _SEL3W { w: self }
            }
            #[doc = "Bit 31 - TRGMUX register lock."]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
        }
    }
    #[doc = "TRGMUX ADC1 Register"]
    pub struct TRGMUX_ADC1 {
        register: VolatileCell<u32>,
    }
    #[doc = "TRGMUX ADC1 Register"]
    pub mod trgmux_adc1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TRGMUX_ADC1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL0R {
            bits: u8,
        }
        impl SEL0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL1R {
            bits: u8,
        }
        impl SEL1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL2R {
            bits: u8,
        }
        impl SEL2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL3R {
            bits: u8,
        }
        impl SEL3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Register can be written."]
            _0,
            #[doc = "Register cannot be written until the next system Reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Register can be written."]
            _0,
            #[doc = "Register cannot be written until the next system Reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Register can be written."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Register cannot be written until the next system Reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Trigger MUX Input 0 Source Select"]
            #[inline(always)]
            pub fn sel0(&self) -> SEL0R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL0R { bits }
            }
            #[doc = "Bits 8:13 - Trigger MUX Input 1 Source Select"]
            #[inline(always)]
            pub fn sel1(&self) -> SEL1R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL1R { bits }
            }
            #[doc = "Bits 16:21 - Trigger MUX Input 2 Source Select"]
            #[inline(always)]
            pub fn sel2(&self) -> SEL2R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL2R { bits }
            }
            #[doc = "Bits 24:29 - Trigger MUX Input 3 Source Select"]
            #[inline(always)]
            pub fn sel3(&self) -> SEL3R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL3R { bits }
            }
            #[doc = "Bit 31 - TRGMUX register lock."]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - Trigger MUX Input 0 Source Select"]
            #[inline(always)]
            pub fn sel0(&mut self) -> _SEL0W {
                _SEL0W { w: self }
            }
            #[doc = "Bits 8:13 - Trigger MUX Input 1 Source Select"]
            #[inline(always)]
            pub fn sel1(&mut self) -> _SEL1W {
                _SEL1W { w: self }
            }
            #[doc = "Bits 16:21 - Trigger MUX Input 2 Source Select"]
            #[inline(always)]
            pub fn sel2(&mut self) -> _SEL2W {
                _SEL2W { w: self }
            }
            #[doc = "Bits 24:29 - Trigger MUX Input 3 Source Select"]
            #[inline(always)]
            pub fn sel3(&mut self) -> _SEL3W {
                _SEL3W { w: self }
            }
            #[doc = "Bit 31 - TRGMUX register lock."]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
        }
    }
    #[doc = "TRGMUX Reserved Register 5"]
    pub struct TRGMUXDUMMY5 {
        register: VolatileCell<u32>,
    }
    #[doc = "TRGMUX Reserved Register 5"]
    pub mod trgmuxdummy5 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TRGMUXDUMMY5 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "TRGMUX Reserved Register 6"]
    pub struct TRGMUXDUMMY6 {
        register: VolatileCell<u32>,
    }
    #[doc = "TRGMUX Reserved Register 6"]
    pub mod trgmuxdummy6 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TRGMUXDUMMY6 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "TRGMUX CMP0 Register"]
    pub struct TRGMUX_CMP0 {
        register: VolatileCell<u32>,
    }
    #[doc = "TRGMUX CMP0 Register"]
    pub mod trgmux_cmp0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TRGMUX_CMP0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL0R {
            bits: u8,
        }
        impl SEL0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Register can be written."]
            _0,
            #[doc = "Register cannot be written until the next system Reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Register can be written."]
            _0,
            #[doc = "Register cannot be written until the next system Reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Register can be written."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Register cannot be written until the next system Reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Trigger MUX Input 0 Source Select"]
            #[inline(always)]
            pub fn sel0(&self) -> SEL0R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL0R { bits }
            }
            #[doc = "Bit 31 - TRGMUX register lock."]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - Trigger MUX Input 0 Source Select"]
            #[inline(always)]
            pub fn sel0(&mut self) -> _SEL0W {
                _SEL0W { w: self }
            }
            #[doc = "Bit 31 - TRGMUX register lock."]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
        }
    }
    #[doc = "TRGMUX Reserved Register 8"]
    pub struct TRGMUXDUMMY8 {
        register: VolatileCell<u32>,
    }
    #[doc = "TRGMUX Reserved Register 8"]
    pub mod trgmuxdummy8 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TRGMUXDUMMY8 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "TRGMUX Reserved Register 9"]
    pub struct TRGMUXDUMMY9 {
        register: VolatileCell<u32>,
    }
    #[doc = "TRGMUX Reserved Register 9"]
    pub mod trgmuxdummy9 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TRGMUXDUMMY9 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "TRGMUX FTM0 Register"]
    pub struct TRGMUX_FTM0 {
        register: VolatileCell<u32>,
    }
    #[doc = "TRGMUX FTM0 Register"]
    pub mod trgmux_ftm0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TRGMUX_FTM0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL0R {
            bits: u8,
        }
        impl SEL0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL1R {
            bits: u8,
        }
        impl SEL1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL2R {
            bits: u8,
        }
        impl SEL2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL3R {
            bits: u8,
        }
        impl SEL3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Register can be written."]
            _0,
            #[doc = "Register cannot be written until the next system Reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Register can be written."]
            _0,
            #[doc = "Register cannot be written until the next system Reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Register can be written."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Register cannot be written until the next system Reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Trigger MUX Input 0 Source Select"]
            #[inline(always)]
            pub fn sel0(&self) -> SEL0R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL0R { bits }
            }
            #[doc = "Bits 8:13 - Trigger MUX Input 1 Source Select"]
            #[inline(always)]
            pub fn sel1(&self) -> SEL1R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL1R { bits }
            }
            #[doc = "Bits 16:21 - Trigger MUX Input 2 Source Select"]
            #[inline(always)]
            pub fn sel2(&self) -> SEL2R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL2R { bits }
            }
            #[doc = "Bits 24:29 - Trigger MUX Input 3 Source Select"]
            #[inline(always)]
            pub fn sel3(&self) -> SEL3R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL3R { bits }
            }
            #[doc = "Bit 31 - TRGMUX register lock."]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - Trigger MUX Input 0 Source Select"]
            #[inline(always)]
            pub fn sel0(&mut self) -> _SEL0W {
                _SEL0W { w: self }
            }
            #[doc = "Bits 8:13 - Trigger MUX Input 1 Source Select"]
            #[inline(always)]
            pub fn sel1(&mut self) -> _SEL1W {
                _SEL1W { w: self }
            }
            #[doc = "Bits 16:21 - Trigger MUX Input 2 Source Select"]
            #[inline(always)]
            pub fn sel2(&mut self) -> _SEL2W {
                _SEL2W { w: self }
            }
            #[doc = "Bits 24:29 - Trigger MUX Input 3 Source Select"]
            #[inline(always)]
            pub fn sel3(&mut self) -> _SEL3W {
                _SEL3W { w: self }
            }
            #[doc = "Bit 31 - TRGMUX register lock."]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
        }
    }
    #[doc = "TRGMUX FTM1 Register"]
    pub struct TRGMUX_FTM1 {
        register: VolatileCell<u32>,
    }
    #[doc = "TRGMUX FTM1 Register"]
    pub mod trgmux_ftm1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TRGMUX_FTM1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL0R {
            bits: u8,
        }
        impl SEL0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL1R {
            bits: u8,
        }
        impl SEL1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL2R {
            bits: u8,
        }
        impl SEL2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL3R {
            bits: u8,
        }
        impl SEL3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Register can be written."]
            _0,
            #[doc = "Register cannot be written until the next system Reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Register can be written."]
            _0,
            #[doc = "Register cannot be written until the next system Reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Register can be written."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Register cannot be written until the next system Reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Trigger MUX Input 0 Source Select"]
            #[inline(always)]
            pub fn sel0(&self) -> SEL0R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL0R { bits }
            }
            #[doc = "Bits 8:13 - Trigger MUX Input 1 Source Select"]
            #[inline(always)]
            pub fn sel1(&self) -> SEL1R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL1R { bits }
            }
            #[doc = "Bits 16:21 - Trigger MUX Input 2 Source Select"]
            #[inline(always)]
            pub fn sel2(&self) -> SEL2R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL2R { bits }
            }
            #[doc = "Bits 24:29 - Trigger MUX Input 3 Source Select"]
            #[inline(always)]
            pub fn sel3(&self) -> SEL3R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL3R { bits }
            }
            #[doc = "Bit 31 - TRGMUX register lock."]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - Trigger MUX Input 0 Source Select"]
            #[inline(always)]
            pub fn sel0(&mut self) -> _SEL0W {
                _SEL0W { w: self }
            }
            #[doc = "Bits 8:13 - Trigger MUX Input 1 Source Select"]
            #[inline(always)]
            pub fn sel1(&mut self) -> _SEL1W {
                _SEL1W { w: self }
            }
            #[doc = "Bits 16:21 - Trigger MUX Input 2 Source Select"]
            #[inline(always)]
            pub fn sel2(&mut self) -> _SEL2W {
                _SEL2W { w: self }
            }
            #[doc = "Bits 24:29 - Trigger MUX Input 3 Source Select"]
            #[inline(always)]
            pub fn sel3(&mut self) -> _SEL3W {
                _SEL3W { w: self }
            }
            #[doc = "Bit 31 - TRGMUX register lock."]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
        }
    }
    #[doc = "TRGMUX FTM2 Register"]
    pub struct TRGMUX_FTM2 {
        register: VolatileCell<u32>,
    }
    #[doc = "TRGMUX FTM2 Register"]
    pub mod trgmux_ftm2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TRGMUX_FTM2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL0R {
            bits: u8,
        }
        impl SEL0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL1R {
            bits: u8,
        }
        impl SEL1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL2R {
            bits: u8,
        }
        impl SEL2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL3R {
            bits: u8,
        }
        impl SEL3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Register can be written."]
            _0,
            #[doc = "Register cannot be written until the next system Reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Register can be written."]
            _0,
            #[doc = "Register cannot be written until the next system Reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Register can be written."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Register cannot be written until the next system Reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Trigger MUX Input 0 Source Select"]
            #[inline(always)]
            pub fn sel0(&self) -> SEL0R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL0R { bits }
            }
            #[doc = "Bits 8:13 - Trigger MUX Input 1 Source Select"]
            #[inline(always)]
            pub fn sel1(&self) -> SEL1R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL1R { bits }
            }
            #[doc = "Bits 16:21 - Trigger MUX Input 2 Source Select"]
            #[inline(always)]
            pub fn sel2(&self) -> SEL2R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL2R { bits }
            }
            #[doc = "Bits 24:29 - Trigger MUX Input 3 Source Select"]
            #[inline(always)]
            pub fn sel3(&self) -> SEL3R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL3R { bits }
            }
            #[doc = "Bit 31 - TRGMUX register lock."]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - Trigger MUX Input 0 Source Select"]
            #[inline(always)]
            pub fn sel0(&mut self) -> _SEL0W {
                _SEL0W { w: self }
            }
            #[doc = "Bits 8:13 - Trigger MUX Input 1 Source Select"]
            #[inline(always)]
            pub fn sel1(&mut self) -> _SEL1W {
                _SEL1W { w: self }
            }
            #[doc = "Bits 16:21 - Trigger MUX Input 2 Source Select"]
            #[inline(always)]
            pub fn sel2(&mut self) -> _SEL2W {
                _SEL2W { w: self }
            }
            #[doc = "Bits 24:29 - Trigger MUX Input 3 Source Select"]
            #[inline(always)]
            pub fn sel3(&mut self) -> _SEL3W {
                _SEL3W { w: self }
            }
            #[doc = "Bit 31 - TRGMUX register lock."]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
        }
    }
    #[doc = "TRGMUX FTM3 Register"]
    pub struct TRGMUX_FTM3 {
        register: VolatileCell<u32>,
    }
    #[doc = "TRGMUX FTM3 Register"]
    pub mod trgmux_ftm3 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TRGMUX_FTM3 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL0R {
            bits: u8,
        }
        impl SEL0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL1R {
            bits: u8,
        }
        impl SEL1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL2R {
            bits: u8,
        }
        impl SEL2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL3R {
            bits: u8,
        }
        impl SEL3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Register can be written."]
            _0,
            #[doc = "Register cannot be written until the next system Reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Register can be written."]
            _0,
            #[doc = "Register cannot be written until the next system Reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Register can be written."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Register cannot be written until the next system Reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Trigger MUX Input 0 Source Select"]
            #[inline(always)]
            pub fn sel0(&self) -> SEL0R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL0R { bits }
            }
            #[doc = "Bits 8:13 - Trigger MUX Input 1 Source Select"]
            #[inline(always)]
            pub fn sel1(&self) -> SEL1R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL1R { bits }
            }
            #[doc = "Bits 16:21 - Trigger MUX Input 2 Source Select"]
            #[inline(always)]
            pub fn sel2(&self) -> SEL2R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL2R { bits }
            }
            #[doc = "Bits 24:29 - Trigger MUX Input 3 Source Select"]
            #[inline(always)]
            pub fn sel3(&self) -> SEL3R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL3R { bits }
            }
            #[doc = "Bit 31 - TRGMUX register lock."]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - Trigger MUX Input 0 Source Select"]
            #[inline(always)]
            pub fn sel0(&mut self) -> _SEL0W {
                _SEL0W { w: self }
            }
            #[doc = "Bits 8:13 - Trigger MUX Input 1 Source Select"]
            #[inline(always)]
            pub fn sel1(&mut self) -> _SEL1W {
                _SEL1W { w: self }
            }
            #[doc = "Bits 16:21 - Trigger MUX Input 2 Source Select"]
            #[inline(always)]
            pub fn sel2(&mut self) -> _SEL2W {
                _SEL2W { w: self }
            }
            #[doc = "Bits 24:29 - Trigger MUX Input 3 Source Select"]
            #[inline(always)]
            pub fn sel3(&mut self) -> _SEL3W {
                _SEL3W { w: self }
            }
            #[doc = "Bit 31 - TRGMUX register lock."]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
        }
    }
    #[doc = "TRGMUX PDB0 Register"]
    pub struct TRGMUX_PDB0 {
        register: VolatileCell<u32>,
    }
    #[doc = "TRGMUX PDB0 Register"]
    pub mod trgmux_pdb0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TRGMUX_PDB0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL0R {
            bits: u8,
        }
        impl SEL0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Register can be written."]
            _0,
            #[doc = "Register cannot be written until the next system Reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Register can be written."]
            _0,
            #[doc = "Register cannot be written until the next system Reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Register can be written."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Register cannot be written until the next system Reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Trigger MUX Input 0 Source Select"]
            #[inline(always)]
            pub fn sel0(&self) -> SEL0R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL0R { bits }
            }
            #[doc = "Bit 31 - TRGMUX register lock."]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - Trigger MUX Input 0 Source Select"]
            #[inline(always)]
            pub fn sel0(&mut self) -> _SEL0W {
                _SEL0W { w: self }
            }
            #[doc = "Bit 31 - TRGMUX register lock."]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
        }
    }
    #[doc = "TRGMUX PDB1 Register"]
    pub struct TRGMUX_PDB1 {
        register: VolatileCell<u32>,
    }
    #[doc = "TRGMUX PDB1 Register"]
    pub mod trgmux_pdb1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TRGMUX_PDB1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL0R {
            bits: u8,
        }
        impl SEL0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Register can be written."]
            _0,
            #[doc = "Register cannot be written until the next system Reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Register can be written."]
            _0,
            #[doc = "Register cannot be written until the next system Reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Register can be written."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Register cannot be written until the next system Reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Trigger MUX Input 0 Source Select"]
            #[inline(always)]
            pub fn sel0(&self) -> SEL0R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL0R { bits }
            }
            #[doc = "Bit 31 - TRGMUX register lock."]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - Trigger MUX Input 0 Source Select"]
            #[inline(always)]
            pub fn sel0(&mut self) -> _SEL0W {
                _SEL0W { w: self }
            }
            #[doc = "Bit 31 - TRGMUX register lock."]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
        }
    }
    #[doc = "TRGMUX Reserved Register 16"]
    pub struct TRGMUXDUMMY16 {
        register: VolatileCell<u32>,
    }
    #[doc = "TRGMUX Reserved Register 16"]
    pub mod trgmuxdummy16 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TRGMUXDUMMY16 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "TRGMUX FLEXIO Register"]
    pub struct TRGMUX_FLEXIO {
        register: VolatileCell<u32>,
    }
    #[doc = "TRGMUX FLEXIO Register"]
    pub mod trgmux_flexio {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TRGMUX_FLEXIO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL0R {
            bits: u8,
        }
        impl SEL0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL1R {
            bits: u8,
        }
        impl SEL1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL2R {
            bits: u8,
        }
        impl SEL2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL3R {
            bits: u8,
        }
        impl SEL3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Register can be written."]
            _0,
            #[doc = "Register cannot be written until the next system Reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Register can be written."]
            _0,
            #[doc = "Register cannot be written until the next system Reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Register can be written."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Register cannot be written until the next system Reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Trigger MUX Input 0 Source Select"]
            #[inline(always)]
            pub fn sel0(&self) -> SEL0R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL0R { bits }
            }
            #[doc = "Bits 8:13 - Trigger MUX Input 1 Source Select"]
            #[inline(always)]
            pub fn sel1(&self) -> SEL1R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL1R { bits }
            }
            #[doc = "Bits 16:21 - Trigger MUX Input 2 Source Select"]
            #[inline(always)]
            pub fn sel2(&self) -> SEL2R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL2R { bits }
            }
            #[doc = "Bits 24:29 - Trigger MUX Input 3 Source Select"]
            #[inline(always)]
            pub fn sel3(&self) -> SEL3R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL3R { bits }
            }
            #[doc = "Bit 31 - TRGMUX register lock."]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - Trigger MUX Input 0 Source Select"]
            #[inline(always)]
            pub fn sel0(&mut self) -> _SEL0W {
                _SEL0W { w: self }
            }
            #[doc = "Bits 8:13 - Trigger MUX Input 1 Source Select"]
            #[inline(always)]
            pub fn sel1(&mut self) -> _SEL1W {
                _SEL1W { w: self }
            }
            #[doc = "Bits 16:21 - Trigger MUX Input 2 Source Select"]
            #[inline(always)]
            pub fn sel2(&mut self) -> _SEL2W {
                _SEL2W { w: self }
            }
            #[doc = "Bits 24:29 - Trigger MUX Input 3 Source Select"]
            #[inline(always)]
            pub fn sel3(&mut self) -> _SEL3W {
                _SEL3W { w: self }
            }
            #[doc = "Bit 31 - TRGMUX register lock."]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
        }
    }
    #[doc = "TRGMUX LPIT0 Register"]
    pub struct TRGMUX_LPIT0 {
        register: VolatileCell<u32>,
    }
    #[doc = "TRGMUX LPIT0 Register"]
    pub mod trgmux_lpit0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TRGMUX_LPIT0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL0R {
            bits: u8,
        }
        impl SEL0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL1R {
            bits: u8,
        }
        impl SEL1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL2R {
            bits: u8,
        }
        impl SEL2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL3R {
            bits: u8,
        }
        impl SEL3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Register can be written."]
            _0,
            #[doc = "Register cannot be written until the next system Reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL3W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Register can be written."]
            _0,
            #[doc = "Register cannot be written until the next system Reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Register can be written."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Register cannot be written until the next system Reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Trigger MUX Input 0 Source Select"]
            #[inline(always)]
            pub fn sel0(&self) -> SEL0R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL0R { bits }
            }
            #[doc = "Bits 8:13 - Trigger MUX Input 1 Source Select"]
            #[inline(always)]
            pub fn sel1(&self) -> SEL1R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL1R { bits }
            }
            #[doc = "Bits 16:21 - Trigger MUX Input 2 Source Select"]
            #[inline(always)]
            pub fn sel2(&self) -> SEL2R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL2R { bits }
            }
            #[doc = "Bits 24:29 - Trigger MUX Input 3 Source Select"]
            #[inline(always)]
            pub fn sel3(&self) -> SEL3R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL3R { bits }
            }
            #[doc = "Bit 31 - TRGMUX register lock."]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - Trigger MUX Input 0 Source Select"]
            #[inline(always)]
            pub fn sel0(&mut self) -> _SEL0W {
                _SEL0W { w: self }
            }
            #[doc = "Bits 8:13 - Trigger MUX Input 1 Source Select"]
            #[inline(always)]
            pub fn sel1(&mut self) -> _SEL1W {
                _SEL1W { w: self }
            }
            #[doc = "Bits 16:21 - Trigger MUX Input 2 Source Select"]
            #[inline(always)]
            pub fn sel2(&mut self) -> _SEL2W {
                _SEL2W { w: self }
            }
            #[doc = "Bits 24:29 - Trigger MUX Input 3 Source Select"]
            #[inline(always)]
            pub fn sel3(&mut self) -> _SEL3W {
                _SEL3W { w: self }
            }
            #[doc = "Bit 31 - TRGMUX register lock."]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
        }
    }
    #[doc = "TRGMUX LPUART0 Register"]
    pub struct TRGMUX_LPUART0 {
        register: VolatileCell<u32>,
    }
    #[doc = "TRGMUX LPUART0 Register"]
    pub mod trgmux_lpuart0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TRGMUX_LPUART0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL0R {
            bits: u8,
        }
        impl SEL0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Register can be written."]
            _0,
            #[doc = "Register cannot be written until the next system Reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Register can be written."]
            _0,
            #[doc = "Register cannot be written until the next system Reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Register can be written."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Register cannot be written until the next system Reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Trigger MUX Input 0 Source Select"]
            #[inline(always)]
            pub fn sel0(&self) -> SEL0R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL0R { bits }
            }
            #[doc = "Bit 31 - TRGMUX register lock."]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - Trigger MUX Input 0 Source Select"]
            #[inline(always)]
            pub fn sel0(&mut self) -> _SEL0W {
                _SEL0W { w: self }
            }
            #[doc = "Bit 31 - TRGMUX register lock."]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
        }
    }
    #[doc = "TRGMUX LPUART1 Register"]
    pub struct TRGMUX_LPUART1 {
        register: VolatileCell<u32>,
    }
    #[doc = "TRGMUX LPUART1 Register"]
    pub mod trgmux_lpuart1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TRGMUX_LPUART1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL0R {
            bits: u8,
        }
        impl SEL0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Register can be written."]
            _0,
            #[doc = "Register cannot be written until the next system Reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Register can be written."]
            _0,
            #[doc = "Register cannot be written until the next system Reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Register can be written."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Register cannot be written until the next system Reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Trigger MUX Input 0 Source Select"]
            #[inline(always)]
            pub fn sel0(&self) -> SEL0R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL0R { bits }
            }
            #[doc = "Bit 31 - TRGMUX register lock."]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - Trigger MUX Input 0 Source Select"]
            #[inline(always)]
            pub fn sel0(&mut self) -> _SEL0W {
                _SEL0W { w: self }
            }
            #[doc = "Bit 31 - TRGMUX register lock."]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
        }
    }
    #[doc = "TRGMUX LPI2C0 Register"]
    pub struct TRGMUX_LPI2C0 {
        register: VolatileCell<u32>,
    }
    #[doc = "TRGMUX LPI2C0 Register"]
    pub mod trgmux_lpi2c0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TRGMUX_LPI2C0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL0R {
            bits: u8,
        }
        impl SEL0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Register can be written."]
            _0,
            #[doc = "Register cannot be written until the next system Reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Register can be written."]
            _0,
            #[doc = "Register cannot be written until the next system Reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Register can be written."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Register cannot be written until the next system Reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Trigger MUX Input 0 Source Select"]
            #[inline(always)]
            pub fn sel0(&self) -> SEL0R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL0R { bits }
            }
            #[doc = "Bit 31 - TRGMUX register lock."]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - Trigger MUX Input 0 Source Select"]
            #[inline(always)]
            pub fn sel0(&mut self) -> _SEL0W {
                _SEL0W { w: self }
            }
            #[doc = "Bit 31 - TRGMUX register lock."]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
        }
    }
    #[doc = "TRGMUX Reserved Register 22"]
    pub struct TRGMUXDUMMY22 {
        register: VolatileCell<u32>,
    }
    #[doc = "TRGMUX Reserved Register 22"]
    pub mod trgmuxdummy22 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TRGMUXDUMMY22 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "TRGMUX LPSPI0 Register"]
    pub struct TRGMUX_LPSPI0 {
        register: VolatileCell<u32>,
    }
    #[doc = "TRGMUX LPSPI0 Register"]
    pub mod trgmux_lpspi0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TRGMUX_LPSPI0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL0R {
            bits: u8,
        }
        impl SEL0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Register can be written."]
            _0,
            #[doc = "Register cannot be written until the next system Reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Register can be written."]
            _0,
            #[doc = "Register cannot be written until the next system Reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Register can be written."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Register cannot be written until the next system Reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Trigger MUX Input 0 Source Select"]
            #[inline(always)]
            pub fn sel0(&self) -> SEL0R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL0R { bits }
            }
            #[doc = "Bit 31 - TRGMUX register lock."]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - Trigger MUX Input 0 Source Select"]
            #[inline(always)]
            pub fn sel0(&mut self) -> _SEL0W {
                _SEL0W { w: self }
            }
            #[doc = "Bit 31 - TRGMUX register lock."]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
        }
    }
    #[doc = "TRGMUX LPSPI1 Register"]
    pub struct TRGMUX_LPSPI1 {
        register: VolatileCell<u32>,
    }
    #[doc = "TRGMUX LPSPI1 Register"]
    pub mod trgmux_lpspi1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TRGMUX_LPSPI1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL0R {
            bits: u8,
        }
        impl SEL0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Register can be written."]
            _0,
            #[doc = "Register cannot be written until the next system Reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Register can be written."]
            _0,
            #[doc = "Register cannot be written until the next system Reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Register can be written."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Register cannot be written until the next system Reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Trigger MUX Input 0 Source Select"]
            #[inline(always)]
            pub fn sel0(&self) -> SEL0R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL0R { bits }
            }
            #[doc = "Bit 31 - TRGMUX register lock."]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - Trigger MUX Input 0 Source Select"]
            #[inline(always)]
            pub fn sel0(&mut self) -> _SEL0W {
                _SEL0W { w: self }
            }
            #[doc = "Bit 31 - TRGMUX register lock."]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
        }
    }
    #[doc = "TRGMUX LPTMR0 Register"]
    pub struct TRGMUX_LPTMR0 {
        register: VolatileCell<u32>,
    }
    #[doc = "TRGMUX LPTMR0 Register"]
    pub mod trgmux_lptmr0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::TRGMUX_LPTMR0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SEL0R {
            bits: u8,
        }
        impl SEL0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Register can be written."]
            _0,
            #[doc = "Register cannot be written until the next system Reset."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEL0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEL0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Register can be written."]
            _0,
            #[doc = "Register cannot be written until the next system Reset."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Register can be written."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Register cannot be written until the next system Reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Trigger MUX Input 0 Source Select"]
            #[inline(always)]
            pub fn sel0(&self) -> SEL0R {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SEL0R { bits }
            }
            #[doc = "Bit 31 - TRGMUX register lock."]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - Trigger MUX Input 0 Source Select"]
            #[inline(always)]
            pub fn sel0(&mut self) -> _SEL0W {
                _SEL0W { w: self }
            }
            #[doc = "Bit 31 - TRGMUX register lock."]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
        }
    }
}
#[doc = "TRGMUX"]
pub struct TRGMUX {
    register_block: trgmux::RegisterBlock,
}
impl Deref for TRGMUX {
    type Target = trgmux::RegisterBlock;
    fn deref(&self) -> &trgmux::RegisterBlock {
        &self.register_block
    }
}
#[doc = "System Clock Generator"]
pub const SCG: Peripheral<SCG> = unsafe { Peripheral::new(1074151424) };
#[doc = "System Clock Generator"]
pub mod scg {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - Version ID Register"]
        pub verid: VERID,
        #[doc = "0x04 - Parameter Register"]
        pub param: PARAM,
        _reserved0: [u8; 8usize],
        #[doc = "0x10 - Clock Status Register"]
        pub csr: CSR,
        #[doc = "0x14 - Run Clock Control Register"]
        pub rccr: RCCR,
        #[doc = "0x18 - VLPR Clock Control Register"]
        pub vccr: VCCR,
        #[doc = "0x1c - HSRUN Clock Control Register"]
        pub hccr: HCCR,
        #[doc = "0x20 - SCG CLKOUT Configuration Register"]
        pub clkoutcnfg: CLKOUTCNFG,
        _reserved1: [u8; 220usize],
        #[doc = "0x100 - System OSC Control Status Register"]
        pub sosccsr: SOSCCSR,
        #[doc = "0x104 - System OSC Divide Register"]
        pub soscdiv: SOSCDIV,
        #[doc = "0x108 - System Oscillator Configuration Register"]
        pub sosccfg: SOSCCFG,
        _reserved2: [u8; 244usize],
        #[doc = "0x200 - Slow IRC Control Status Register"]
        pub sirccsr: SIRCCSR,
        #[doc = "0x204 - Slow IRC Divide Register"]
        pub sircdiv: SIRCDIV,
        #[doc = "0x208 - Slow IRC Configuration Register"]
        pub sirccfg: SIRCCFG,
        _reserved3: [u8; 244usize],
        #[doc = "0x300 - Fast IRC Control Status Register"]
        pub firccsr: FIRCCSR,
        #[doc = "0x304 - Fast IRC Divide Register"]
        pub fircdiv: FIRCDIV,
        #[doc = "0x308 - Fast IRC Configuration Register"]
        pub firccfg: FIRCCFG,
        _reserved4: [u8; 756usize],
        #[doc = "0x600 - System PLL Control Status Register"]
        pub spllcsr: SPLLCSR,
        #[doc = "0x604 - System PLL Divide Register"]
        pub splldiv: SPLLDIV,
        #[doc = "0x608 - System PLL Configuration Register"]
        pub spllcfg: SPLLCFG,
    }
    #[doc = "Version ID Register"]
    pub struct VERID {
        register: VolatileCell<u32>,
    }
    #[doc = "Version ID Register"]
    pub mod verid {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::VERID {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct VERSIONR {
            bits: u32,
        }
        impl VERSIONR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - SCG Version Number"]
            #[inline(always)]
            pub fn version(&self) -> VERSIONR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                VERSIONR { bits }
            }
        }
    }
    #[doc = "Parameter Register"]
    pub struct PARAM {
        register: VolatileCell<u32>,
    }
    #[doc = "Parameter Register"]
    pub mod param {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::PARAM {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct CLKPRESR {
            bits: u8,
        }
        impl CLKPRESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DIVPRESR {
            bits: u8,
        }
        impl DIVPRESR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Clock Present"]
            #[inline(always)]
            pub fn clkpres(&self) -> CLKPRESR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CLKPRESR { bits }
            }
            #[doc = "Bits 27:31 - Divider Present"]
            #[inline(always)]
            pub fn divpres(&self) -> DIVPRESR {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 27;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DIVPRESR { bits }
            }
        }
    }
    #[doc = "Clock Status Register"]
    pub struct CSR {
        register: VolatileCell<u32>,
    }
    #[doc = "Clock Status Register"]
    pub mod csr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::CSR {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = "Possible values of the field `DIVSLOW`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DIVSLOWR {
            #[doc = "Divide-by-1"]
            _0000,
            #[doc = "Divide-by-2"]
            _0001,
            #[doc = "Divide-by-3"]
            _0010,
            #[doc = "Divide-by-4"]
            _0011,
            #[doc = "Divide-by-5"]
            _0100,
            #[doc = "Divide-by-6"]
            _0101,
            #[doc = "Divide-by-7"]
            _0110,
            #[doc = "Divide-by-8"]
            _0111,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl DIVSLOWR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    DIVSLOWR::_0000 => 0,
                    DIVSLOWR::_0001 => 1,
                    DIVSLOWR::_0010 => 2,
                    DIVSLOWR::_0011 => 3,
                    DIVSLOWR::_0100 => 4,
                    DIVSLOWR::_0101 => 5,
                    DIVSLOWR::_0110 => 6,
                    DIVSLOWR::_0111 => 7,
                    DIVSLOWR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> DIVSLOWR {
                match value {
                    0 => DIVSLOWR::_0000,
                    1 => DIVSLOWR::_0001,
                    2 => DIVSLOWR::_0010,
                    3 => DIVSLOWR::_0011,
                    4 => DIVSLOWR::_0100,
                    5 => DIVSLOWR::_0101,
                    6 => DIVSLOWR::_0110,
                    7 => DIVSLOWR::_0111,
                    i => DIVSLOWR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == DIVSLOWR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == DIVSLOWR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == DIVSLOWR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == DIVSLOWR::_0011
            }
            #[doc = "Checks if the value of the field is `_0100`"]
            #[inline(always)]
            pub fn is_0100(&self) -> bool {
                *self == DIVSLOWR::_0100
            }
            #[doc = "Checks if the value of the field is `_0101`"]
            #[inline(always)]
            pub fn is_0101(&self) -> bool {
                *self == DIVSLOWR::_0101
            }
            #[doc = "Checks if the value of the field is `_0110`"]
            #[inline(always)]
            pub fn is_0110(&self) -> bool {
                *self == DIVSLOWR::_0110
            }
            #[doc = "Checks if the value of the field is `_0111`"]
            #[inline(always)]
            pub fn is_0111(&self) -> bool {
                *self == DIVSLOWR::_0111
            }
        }
        #[doc = "Possible values of the field `DIVBUS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DIVBUSR {
            #[doc = "Divide-by-1"]
            _0000,
            #[doc = "Divide-by-2"]
            _0001,
            #[doc = "Divide-by-3"]
            _0010,
            #[doc = "Divide-by-4"]
            _0011,
            #[doc = "Divide-by-5"]
            _0100,
            #[doc = "Divide-by-6"]
            _0101,
            #[doc = "Divide-by-7"]
            _0110,
            #[doc = "Divide-by-8"]
            _0111,
            #[doc = "Divide-by-9"]
            _1000,
            #[doc = "Divide-by-10"]
            _1001,
            #[doc = "Divide-by-11"]
            _1010,
            #[doc = "Divide-by-12"]
            _1011,
            #[doc = "Divide-by-13"]
            _1100,
            #[doc = "Divide-by-14"]
            _1101,
            #[doc = "Divide-by-15"]
            _1110,
            #[doc = "Divide-by-16"]
            _1111,
        }
        impl DIVBUSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    DIVBUSR::_0000 => 0,
                    DIVBUSR::_0001 => 1,
                    DIVBUSR::_0010 => 2,
                    DIVBUSR::_0011 => 3,
                    DIVBUSR::_0100 => 4,
                    DIVBUSR::_0101 => 5,
                    DIVBUSR::_0110 => 6,
                    DIVBUSR::_0111 => 7,
                    DIVBUSR::_1000 => 8,
                    DIVBUSR::_1001 => 9,
                    DIVBUSR::_1010 => 10,
                    DIVBUSR::_1011 => 11,
                    DIVBUSR::_1100 => 12,
                    DIVBUSR::_1101 => 13,
                    DIVBUSR::_1110 => 14,
                    DIVBUSR::_1111 => 15,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> DIVBUSR {
                match value {
                    0 => DIVBUSR::_0000,
                    1 => DIVBUSR::_0001,
                    2 => DIVBUSR::_0010,
                    3 => DIVBUSR::_0011,
                    4 => DIVBUSR::_0100,
                    5 => DIVBUSR::_0101,
                    6 => DIVBUSR::_0110,
                    7 => DIVBUSR::_0111,
                    8 => DIVBUSR::_1000,
                    9 => DIVBUSR::_1001,
                    10 => DIVBUSR::_1010,
                    11 => DIVBUSR::_1011,
                    12 => DIVBUSR::_1100,
                    13 => DIVBUSR::_1101,
                    14 => DIVBUSR::_1110,
                    15 => DIVBUSR::_1111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == DIVBUSR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == DIVBUSR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == DIVBUSR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == DIVBUSR::_0011
            }
            #[doc = "Checks if the value of the field is `_0100`"]
            #[inline(always)]
            pub fn is_0100(&self) -> bool {
                *self == DIVBUSR::_0100
            }
            #[doc = "Checks if the value of the field is `_0101`"]
            #[inline(always)]
            pub fn is_0101(&self) -> bool {
                *self == DIVBUSR::_0101
            }
            #[doc = "Checks if the value of the field is `_0110`"]
            #[inline(always)]
            pub fn is_0110(&self) -> bool {
                *self == DIVBUSR::_0110
            }
            #[doc = "Checks if the value of the field is `_0111`"]
            #[inline(always)]
            pub fn is_0111(&self) -> bool {
                *self == DIVBUSR::_0111
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == DIVBUSR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == DIVBUSR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == DIVBUSR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == DIVBUSR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == DIVBUSR::_1100
            }
            #[doc = "Checks if the value of the field is `_1101`"]
            #[inline(always)]
            pub fn is_1101(&self) -> bool {
                *self == DIVBUSR::_1101
            }
            #[doc = "Checks if the value of the field is `_1110`"]
            #[inline(always)]
            pub fn is_1110(&self) -> bool {
                *self == DIVBUSR::_1110
            }
            #[doc = "Checks if the value of the field is `_1111`"]
            #[inline(always)]
            pub fn is_1111(&self) -> bool {
                *self == DIVBUSR::_1111
            }
        }
        #[doc = "Possible values of the field `DIVCORE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DIVCORER {
            #[doc = "Divide-by-1"]
            _0000,
            #[doc = "Divide-by-2"]
            _0001,
            #[doc = "Divide-by-3"]
            _0010,
            #[doc = "Divide-by-4"]
            _0011,
            #[doc = "Divide-by-5"]
            _0100,
            #[doc = "Divide-by-6"]
            _0101,
            #[doc = "Divide-by-7"]
            _0110,
            #[doc = "Divide-by-8"]
            _0111,
            #[doc = "Divide-by-9"]
            _1000,
            #[doc = "Divide-by-10"]
            _1001,
            #[doc = "Divide-by-11"]
            _1010,
            #[doc = "Divide-by-12"]
            _1011,
            #[doc = "Divide-by-13"]
            _1100,
            #[doc = "Divide-by-14"]
            _1101,
            #[doc = "Divide-by-15"]
            _1110,
            #[doc = "Divide-by-16"]
            _1111,
        }
        impl DIVCORER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    DIVCORER::_0000 => 0,
                    DIVCORER::_0001 => 1,
                    DIVCORER::_0010 => 2,
                    DIVCORER::_0011 => 3,
                    DIVCORER::_0100 => 4,
                    DIVCORER::_0101 => 5,
                    DIVCORER::_0110 => 6,
                    DIVCORER::_0111 => 7,
                    DIVCORER::_1000 => 8,
                    DIVCORER::_1001 => 9,
                    DIVCORER::_1010 => 10,
                    DIVCORER::_1011 => 11,
                    DIVCORER::_1100 => 12,
                    DIVCORER::_1101 => 13,
                    DIVCORER::_1110 => 14,
                    DIVCORER::_1111 => 15,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> DIVCORER {
                match value {
                    0 => DIVCORER::_0000,
                    1 => DIVCORER::_0001,
                    2 => DIVCORER::_0010,
                    3 => DIVCORER::_0011,
                    4 => DIVCORER::_0100,
                    5 => DIVCORER::_0101,
                    6 => DIVCORER::_0110,
                    7 => DIVCORER::_0111,
                    8 => DIVCORER::_1000,
                    9 => DIVCORER::_1001,
                    10 => DIVCORER::_1010,
                    11 => DIVCORER::_1011,
                    12 => DIVCORER::_1100,
                    13 => DIVCORER::_1101,
                    14 => DIVCORER::_1110,
                    15 => DIVCORER::_1111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == DIVCORER::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == DIVCORER::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == DIVCORER::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == DIVCORER::_0011
            }
            #[doc = "Checks if the value of the field is `_0100`"]
            #[inline(always)]
            pub fn is_0100(&self) -> bool {
                *self == DIVCORER::_0100
            }
            #[doc = "Checks if the value of the field is `_0101`"]
            #[inline(always)]
            pub fn is_0101(&self) -> bool {
                *self == DIVCORER::_0101
            }
            #[doc = "Checks if the value of the field is `_0110`"]
            #[inline(always)]
            pub fn is_0110(&self) -> bool {
                *self == DIVCORER::_0110
            }
            #[doc = "Checks if the value of the field is `_0111`"]
            #[inline(always)]
            pub fn is_0111(&self) -> bool {
                *self == DIVCORER::_0111
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == DIVCORER::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == DIVCORER::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == DIVCORER::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == DIVCORER::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == DIVCORER::_1100
            }
            #[doc = "Checks if the value of the field is `_1101`"]
            #[inline(always)]
            pub fn is_1101(&self) -> bool {
                *self == DIVCORER::_1101
            }
            #[doc = "Checks if the value of the field is `_1110`"]
            #[inline(always)]
            pub fn is_1110(&self) -> bool {
                *self == DIVCORER::_1110
            }
            #[doc = "Checks if the value of the field is `_1111`"]
            #[inline(always)]
            pub fn is_1111(&self) -> bool {
                *self == DIVCORER::_1111
            }
        }
        #[doc = "Possible values of the field `SCS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SCSR {
            #[doc = "System OSC (SOSC_CLK)"]
            _0001,
            #[doc = "Slow IRC (SIRC_CLK)"]
            _0010,
            #[doc = "Fast IRC (FIRC_CLK)"]
            _0011,
            #[doc = "System PLL (SPLL_CLK)"]
            _0110,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl SCSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SCSR::_0001 => 1,
                    SCSR::_0010 => 2,
                    SCSR::_0011 => 3,
                    SCSR::_0110 => 6,
                    SCSR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SCSR {
                match value {
                    1 => SCSR::_0001,
                    2 => SCSR::_0010,
                    3 => SCSR::_0011,
                    6 => SCSR::_0110,
                    i => SCSR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == SCSR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == SCSR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == SCSR::_0011
            }
            #[doc = "Checks if the value of the field is `_0110`"]
            #[inline(always)]
            pub fn is_0110(&self) -> bool {
                *self == SCSR::_0110
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:3 - Slow Clock Divide Ratio"]
            #[inline(always)]
            pub fn divslow(&self) -> DIVSLOWR {
                DIVSLOWR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 4:7 - Bus Clock Divide Ratio"]
            #[inline(always)]
            pub fn divbus(&self) -> DIVBUSR {
                DIVBUSR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 16:19 - Core Clock Divide Ratio"]
            #[inline(always)]
            pub fn divcore(&self) -> DIVCORER {
                DIVCORER::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 24:27 - System Clock Source"]
            #[inline(always)]
            pub fn scs(&self) -> SCSR {
                SCSR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
    }
    #[doc = "Run Clock Control Register"]
    pub struct RCCR {
        register: VolatileCell<u32>,
    }
    #[doc = "Run Clock Control Register"]
    pub mod rccr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RCCR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DIVSLOW`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DIVSLOWR {
            #[doc = "Divide-by-1"]
            _0000,
            #[doc = "Divide-by-2"]
            _0001,
            #[doc = "Divide-by-3"]
            _0010,
            #[doc = "Divide-by-4"]
            _0011,
            #[doc = "Divide-by-5"]
            _0100,
            #[doc = "Divide-by-6"]
            _0101,
            #[doc = "Divide-by-7"]
            _0110,
            #[doc = "Divide-by-8"]
            _0111,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl DIVSLOWR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    DIVSLOWR::_0000 => 0,
                    DIVSLOWR::_0001 => 1,
                    DIVSLOWR::_0010 => 2,
                    DIVSLOWR::_0011 => 3,
                    DIVSLOWR::_0100 => 4,
                    DIVSLOWR::_0101 => 5,
                    DIVSLOWR::_0110 => 6,
                    DIVSLOWR::_0111 => 7,
                    DIVSLOWR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> DIVSLOWR {
                match value {
                    0 => DIVSLOWR::_0000,
                    1 => DIVSLOWR::_0001,
                    2 => DIVSLOWR::_0010,
                    3 => DIVSLOWR::_0011,
                    4 => DIVSLOWR::_0100,
                    5 => DIVSLOWR::_0101,
                    6 => DIVSLOWR::_0110,
                    7 => DIVSLOWR::_0111,
                    i => DIVSLOWR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == DIVSLOWR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == DIVSLOWR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == DIVSLOWR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == DIVSLOWR::_0011
            }
            #[doc = "Checks if the value of the field is `_0100`"]
            #[inline(always)]
            pub fn is_0100(&self) -> bool {
                *self == DIVSLOWR::_0100
            }
            #[doc = "Checks if the value of the field is `_0101`"]
            #[inline(always)]
            pub fn is_0101(&self) -> bool {
                *self == DIVSLOWR::_0101
            }
            #[doc = "Checks if the value of the field is `_0110`"]
            #[inline(always)]
            pub fn is_0110(&self) -> bool {
                *self == DIVSLOWR::_0110
            }
            #[doc = "Checks if the value of the field is `_0111`"]
            #[inline(always)]
            pub fn is_0111(&self) -> bool {
                *self == DIVSLOWR::_0111
            }
        }
        #[doc = "Possible values of the field `DIVBUS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DIVBUSR {
            #[doc = "Divide-by-1"]
            _0000,
            #[doc = "Divide-by-2"]
            _0001,
            #[doc = "Divide-by-3"]
            _0010,
            #[doc = "Divide-by-4"]
            _0011,
            #[doc = "Divide-by-5"]
            _0100,
            #[doc = "Divide-by-6"]
            _0101,
            #[doc = "Divide-by-7"]
            _0110,
            #[doc = "Divide-by-8"]
            _0111,
            #[doc = "Divide-by-9"]
            _1000,
            #[doc = "Divide-by-10"]
            _1001,
            #[doc = "Divide-by-11"]
            _1010,
            #[doc = "Divide-by-12"]
            _1011,
            #[doc = "Divide-by-13"]
            _1100,
            #[doc = "Divide-by-14"]
            _1101,
            #[doc = "Divide-by-15"]
            _1110,
            #[doc = "Divide-by-16"]
            _1111,
        }
        impl DIVBUSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    DIVBUSR::_0000 => 0,
                    DIVBUSR::_0001 => 1,
                    DIVBUSR::_0010 => 2,
                    DIVBUSR::_0011 => 3,
                    DIVBUSR::_0100 => 4,
                    DIVBUSR::_0101 => 5,
                    DIVBUSR::_0110 => 6,
                    DIVBUSR::_0111 => 7,
                    DIVBUSR::_1000 => 8,
                    DIVBUSR::_1001 => 9,
                    DIVBUSR::_1010 => 10,
                    DIVBUSR::_1011 => 11,
                    DIVBUSR::_1100 => 12,
                    DIVBUSR::_1101 => 13,
                    DIVBUSR::_1110 => 14,
                    DIVBUSR::_1111 => 15,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> DIVBUSR {
                match value {
                    0 => DIVBUSR::_0000,
                    1 => DIVBUSR::_0001,
                    2 => DIVBUSR::_0010,
                    3 => DIVBUSR::_0011,
                    4 => DIVBUSR::_0100,
                    5 => DIVBUSR::_0101,
                    6 => DIVBUSR::_0110,
                    7 => DIVBUSR::_0111,
                    8 => DIVBUSR::_1000,
                    9 => DIVBUSR::_1001,
                    10 => DIVBUSR::_1010,
                    11 => DIVBUSR::_1011,
                    12 => DIVBUSR::_1100,
                    13 => DIVBUSR::_1101,
                    14 => DIVBUSR::_1110,
                    15 => DIVBUSR::_1111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == DIVBUSR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == DIVBUSR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == DIVBUSR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == DIVBUSR::_0011
            }
            #[doc = "Checks if the value of the field is `_0100`"]
            #[inline(always)]
            pub fn is_0100(&self) -> bool {
                *self == DIVBUSR::_0100
            }
            #[doc = "Checks if the value of the field is `_0101`"]
            #[inline(always)]
            pub fn is_0101(&self) -> bool {
                *self == DIVBUSR::_0101
            }
            #[doc = "Checks if the value of the field is `_0110`"]
            #[inline(always)]
            pub fn is_0110(&self) -> bool {
                *self == DIVBUSR::_0110
            }
            #[doc = "Checks if the value of the field is `_0111`"]
            #[inline(always)]
            pub fn is_0111(&self) -> bool {
                *self == DIVBUSR::_0111
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == DIVBUSR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == DIVBUSR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == DIVBUSR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == DIVBUSR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == DIVBUSR::_1100
            }
            #[doc = "Checks if the value of the field is `_1101`"]
            #[inline(always)]
            pub fn is_1101(&self) -> bool {
                *self == DIVBUSR::_1101
            }
            #[doc = "Checks if the value of the field is `_1110`"]
            #[inline(always)]
            pub fn is_1110(&self) -> bool {
                *self == DIVBUSR::_1110
            }
            #[doc = "Checks if the value of the field is `_1111`"]
            #[inline(always)]
            pub fn is_1111(&self) -> bool {
                *self == DIVBUSR::_1111
            }
        }
        #[doc = "Possible values of the field `DIVCORE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DIVCORER {
            #[doc = "Divide-by-1"]
            _0000,
            #[doc = "Divide-by-2"]
            _0001,
            #[doc = "Divide-by-3"]
            _0010,
            #[doc = "Divide-by-4"]
            _0011,
            #[doc = "Divide-by-5"]
            _0100,
            #[doc = "Divide-by-6"]
            _0101,
            #[doc = "Divide-by-7"]
            _0110,
            #[doc = "Divide-by-8"]
            _0111,
            #[doc = "Divide-by-9"]
            _1000,
            #[doc = "Divide-by-10"]
            _1001,
            #[doc = "Divide-by-11"]
            _1010,
            #[doc = "Divide-by-12"]
            _1011,
            #[doc = "Divide-by-13"]
            _1100,
            #[doc = "Divide-by-14"]
            _1101,
            #[doc = "Divide-by-15"]
            _1110,
            #[doc = "Divide-by-16"]
            _1111,
        }
        impl DIVCORER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    DIVCORER::_0000 => 0,
                    DIVCORER::_0001 => 1,
                    DIVCORER::_0010 => 2,
                    DIVCORER::_0011 => 3,
                    DIVCORER::_0100 => 4,
                    DIVCORER::_0101 => 5,
                    DIVCORER::_0110 => 6,
                    DIVCORER::_0111 => 7,
                    DIVCORER::_1000 => 8,
                    DIVCORER::_1001 => 9,
                    DIVCORER::_1010 => 10,
                    DIVCORER::_1011 => 11,
                    DIVCORER::_1100 => 12,
                    DIVCORER::_1101 => 13,
                    DIVCORER::_1110 => 14,
                    DIVCORER::_1111 => 15,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> DIVCORER {
                match value {
                    0 => DIVCORER::_0000,
                    1 => DIVCORER::_0001,
                    2 => DIVCORER::_0010,
                    3 => DIVCORER::_0011,
                    4 => DIVCORER::_0100,
                    5 => DIVCORER::_0101,
                    6 => DIVCORER::_0110,
                    7 => DIVCORER::_0111,
                    8 => DIVCORER::_1000,
                    9 => DIVCORER::_1001,
                    10 => DIVCORER::_1010,
                    11 => DIVCORER::_1011,
                    12 => DIVCORER::_1100,
                    13 => DIVCORER::_1101,
                    14 => DIVCORER::_1110,
                    15 => DIVCORER::_1111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == DIVCORER::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == DIVCORER::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == DIVCORER::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == DIVCORER::_0011
            }
            #[doc = "Checks if the value of the field is `_0100`"]
            #[inline(always)]
            pub fn is_0100(&self) -> bool {
                *self == DIVCORER::_0100
            }
            #[doc = "Checks if the value of the field is `_0101`"]
            #[inline(always)]
            pub fn is_0101(&self) -> bool {
                *self == DIVCORER::_0101
            }
            #[doc = "Checks if the value of the field is `_0110`"]
            #[inline(always)]
            pub fn is_0110(&self) -> bool {
                *self == DIVCORER::_0110
            }
            #[doc = "Checks if the value of the field is `_0111`"]
            #[inline(always)]
            pub fn is_0111(&self) -> bool {
                *self == DIVCORER::_0111
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == DIVCORER::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == DIVCORER::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == DIVCORER::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == DIVCORER::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == DIVCORER::_1100
            }
            #[doc = "Checks if the value of the field is `_1101`"]
            #[inline(always)]
            pub fn is_1101(&self) -> bool {
                *self == DIVCORER::_1101
            }
            #[doc = "Checks if the value of the field is `_1110`"]
            #[inline(always)]
            pub fn is_1110(&self) -> bool {
                *self == DIVCORER::_1110
            }
            #[doc = "Checks if the value of the field is `_1111`"]
            #[inline(always)]
            pub fn is_1111(&self) -> bool {
                *self == DIVCORER::_1111
            }
        }
        #[doc = "Possible values of the field `SCS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SCSR {
            #[doc = "System OSC (SOSC_CLK)"]
            _0001,
            #[doc = "Slow IRC (SIRC_CLK)"]
            _0010,
            #[doc = "Fast IRC (FIRC_CLK)"]
            _0011,
            #[doc = "System PLL (SPLL_CLK)"]
            _0110,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl SCSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SCSR::_0001 => 1,
                    SCSR::_0010 => 2,
                    SCSR::_0011 => 3,
                    SCSR::_0110 => 6,
                    SCSR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SCSR {
                match value {
                    1 => SCSR::_0001,
                    2 => SCSR::_0010,
                    3 => SCSR::_0011,
                    6 => SCSR::_0110,
                    i => SCSR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == SCSR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == SCSR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == SCSR::_0011
            }
            #[doc = "Checks if the value of the field is `_0110`"]
            #[inline(always)]
            pub fn is_0110(&self) -> bool {
                *self == SCSR::_0110
            }
        }
        #[doc = "Values that can be written to the field `DIVSLOW`"]
        pub enum DIVSLOWW {
            #[doc = "Divide-by-1"]
            _0000,
            #[doc = "Divide-by-2"]
            _0001,
            #[doc = "Divide-by-3"]
            _0010,
            #[doc = "Divide-by-4"]
            _0011,
            #[doc = "Divide-by-5"]
            _0100,
            #[doc = "Divide-by-6"]
            _0101,
            #[doc = "Divide-by-7"]
            _0110,
            #[doc = "Divide-by-8"]
            _0111,
        }
        impl DIVSLOWW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    DIVSLOWW::_0000 => 0,
                    DIVSLOWW::_0001 => 1,
                    DIVSLOWW::_0010 => 2,
                    DIVSLOWW::_0011 => 3,
                    DIVSLOWW::_0100 => 4,
                    DIVSLOWW::_0101 => 5,
                    DIVSLOWW::_0110 => 6,
                    DIVSLOWW::_0111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DIVSLOWW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DIVSLOWW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DIVSLOWW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Divide-by-1"]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(DIVSLOWW::_0000)
            }
            #[doc = "Divide-by-2"]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(DIVSLOWW::_0001)
            }
            #[doc = "Divide-by-3"]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(DIVSLOWW::_0010)
            }
            #[doc = "Divide-by-4"]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(DIVSLOWW::_0011)
            }
            #[doc = "Divide-by-5"]
            #[inline(always)]
            pub fn _0100(self) -> &'a mut W {
                self.variant(DIVSLOWW::_0100)
            }
            #[doc = "Divide-by-6"]
            #[inline(always)]
            pub fn _0101(self) -> &'a mut W {
                self.variant(DIVSLOWW::_0101)
            }
            #[doc = "Divide-by-7"]
            #[inline(always)]
            pub fn _0110(self) -> &'a mut W {
                self.variant(DIVSLOWW::_0110)
            }
            #[doc = "Divide-by-8"]
            #[inline(always)]
            pub fn _0111(self) -> &'a mut W {
                self.variant(DIVSLOWW::_0111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DIVBUS`"]
        pub enum DIVBUSW {
            #[doc = "Divide-by-1"]
            _0000,
            #[doc = "Divide-by-2"]
            _0001,
            #[doc = "Divide-by-3"]
            _0010,
            #[doc = "Divide-by-4"]
            _0011,
            #[doc = "Divide-by-5"]
            _0100,
            #[doc = "Divide-by-6"]
            _0101,
            #[doc = "Divide-by-7"]
            _0110,
            #[doc = "Divide-by-8"]
            _0111,
            #[doc = "Divide-by-9"]
            _1000,
            #[doc = "Divide-by-10"]
            _1001,
            #[doc = "Divide-by-11"]
            _1010,
            #[doc = "Divide-by-12"]
            _1011,
            #[doc = "Divide-by-13"]
            _1100,
            #[doc = "Divide-by-14"]
            _1101,
            #[doc = "Divide-by-15"]
            _1110,
            #[doc = "Divide-by-16"]
            _1111,
        }
        impl DIVBUSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    DIVBUSW::_0000 => 0,
                    DIVBUSW::_0001 => 1,
                    DIVBUSW::_0010 => 2,
                    DIVBUSW::_0011 => 3,
                    DIVBUSW::_0100 => 4,
                    DIVBUSW::_0101 => 5,
                    DIVBUSW::_0110 => 6,
                    DIVBUSW::_0111 => 7,
                    DIVBUSW::_1000 => 8,
                    DIVBUSW::_1001 => 9,
                    DIVBUSW::_1010 => 10,
                    DIVBUSW::_1011 => 11,
                    DIVBUSW::_1100 => 12,
                    DIVBUSW::_1101 => 13,
                    DIVBUSW::_1110 => 14,
                    DIVBUSW::_1111 => 15,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DIVBUSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DIVBUSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DIVBUSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Divide-by-1"]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(DIVBUSW::_0000)
            }
            #[doc = "Divide-by-2"]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(DIVBUSW::_0001)
            }
            #[doc = "Divide-by-3"]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(DIVBUSW::_0010)
            }
            #[doc = "Divide-by-4"]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(DIVBUSW::_0011)
            }
            #[doc = "Divide-by-5"]
            #[inline(always)]
            pub fn _0100(self) -> &'a mut W {
                self.variant(DIVBUSW::_0100)
            }
            #[doc = "Divide-by-6"]
            #[inline(always)]
            pub fn _0101(self) -> &'a mut W {
                self.variant(DIVBUSW::_0101)
            }
            #[doc = "Divide-by-7"]
            #[inline(always)]
            pub fn _0110(self) -> &'a mut W {
                self.variant(DIVBUSW::_0110)
            }
            #[doc = "Divide-by-8"]
            #[inline(always)]
            pub fn _0111(self) -> &'a mut W {
                self.variant(DIVBUSW::_0111)
            }
            #[doc = "Divide-by-9"]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(DIVBUSW::_1000)
            }
            #[doc = "Divide-by-10"]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(DIVBUSW::_1001)
            }
            #[doc = "Divide-by-11"]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(DIVBUSW::_1010)
            }
            #[doc = "Divide-by-12"]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(DIVBUSW::_1011)
            }
            #[doc = "Divide-by-13"]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(DIVBUSW::_1100)
            }
            #[doc = "Divide-by-14"]
            #[inline(always)]
            pub fn _1101(self) -> &'a mut W {
                self.variant(DIVBUSW::_1101)
            }
            #[doc = "Divide-by-15"]
            #[inline(always)]
            pub fn _1110(self) -> &'a mut W {
                self.variant(DIVBUSW::_1110)
            }
            #[doc = "Divide-by-16"]
            #[inline(always)]
            pub fn _1111(self) -> &'a mut W {
                self.variant(DIVBUSW::_1111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DIVCORE`"]
        pub enum DIVCOREW {
            #[doc = "Divide-by-1"]
            _0000,
            #[doc = "Divide-by-2"]
            _0001,
            #[doc = "Divide-by-3"]
            _0010,
            #[doc = "Divide-by-4"]
            _0011,
            #[doc = "Divide-by-5"]
            _0100,
            #[doc = "Divide-by-6"]
            _0101,
            #[doc = "Divide-by-7"]
            _0110,
            #[doc = "Divide-by-8"]
            _0111,
            #[doc = "Divide-by-9"]
            _1000,
            #[doc = "Divide-by-10"]
            _1001,
            #[doc = "Divide-by-11"]
            _1010,
            #[doc = "Divide-by-12"]
            _1011,
            #[doc = "Divide-by-13"]
            _1100,
            #[doc = "Divide-by-14"]
            _1101,
            #[doc = "Divide-by-15"]
            _1110,
            #[doc = "Divide-by-16"]
            _1111,
        }
        impl DIVCOREW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    DIVCOREW::_0000 => 0,
                    DIVCOREW::_0001 => 1,
                    DIVCOREW::_0010 => 2,
                    DIVCOREW::_0011 => 3,
                    DIVCOREW::_0100 => 4,
                    DIVCOREW::_0101 => 5,
                    DIVCOREW::_0110 => 6,
                    DIVCOREW::_0111 => 7,
                    DIVCOREW::_1000 => 8,
                    DIVCOREW::_1001 => 9,
                    DIVCOREW::_1010 => 10,
                    DIVCOREW::_1011 => 11,
                    DIVCOREW::_1100 => 12,
                    DIVCOREW::_1101 => 13,
                    DIVCOREW::_1110 => 14,
                    DIVCOREW::_1111 => 15,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DIVCOREW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DIVCOREW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DIVCOREW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Divide-by-1"]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(DIVCOREW::_0000)
            }
            #[doc = "Divide-by-2"]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(DIVCOREW::_0001)
            }
            #[doc = "Divide-by-3"]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(DIVCOREW::_0010)
            }
            #[doc = "Divide-by-4"]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(DIVCOREW::_0011)
            }
            #[doc = "Divide-by-5"]
            #[inline(always)]
            pub fn _0100(self) -> &'a mut W {
                self.variant(DIVCOREW::_0100)
            }
            #[doc = "Divide-by-6"]
            #[inline(always)]
            pub fn _0101(self) -> &'a mut W {
                self.variant(DIVCOREW::_0101)
            }
            #[doc = "Divide-by-7"]
            #[inline(always)]
            pub fn _0110(self) -> &'a mut W {
                self.variant(DIVCOREW::_0110)
            }
            #[doc = "Divide-by-8"]
            #[inline(always)]
            pub fn _0111(self) -> &'a mut W {
                self.variant(DIVCOREW::_0111)
            }
            #[doc = "Divide-by-9"]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(DIVCOREW::_1000)
            }
            #[doc = "Divide-by-10"]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(DIVCOREW::_1001)
            }
            #[doc = "Divide-by-11"]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(DIVCOREW::_1010)
            }
            #[doc = "Divide-by-12"]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(DIVCOREW::_1011)
            }
            #[doc = "Divide-by-13"]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(DIVCOREW::_1100)
            }
            #[doc = "Divide-by-14"]
            #[inline(always)]
            pub fn _1101(self) -> &'a mut W {
                self.variant(DIVCOREW::_1101)
            }
            #[doc = "Divide-by-15"]
            #[inline(always)]
            pub fn _1110(self) -> &'a mut W {
                self.variant(DIVCOREW::_1110)
            }
            #[doc = "Divide-by-16"]
            #[inline(always)]
            pub fn _1111(self) -> &'a mut W {
                self.variant(DIVCOREW::_1111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SCS`"]
        pub enum SCSW {
            #[doc = "System OSC (SOSC_CLK)"]
            _0001,
            #[doc = "Slow IRC (SIRC_CLK)"]
            _0010,
            #[doc = "Fast IRC (FIRC_CLK)"]
            _0011,
            #[doc = "System PLL (SPLL_CLK)"]
            _0110,
        }
        impl SCSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SCSW::_0001 => 1,
                    SCSW::_0010 => 2,
                    SCSW::_0011 => 3,
                    SCSW::_0110 => 6,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SCSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SCSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SCSW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "System OSC (SOSC_CLK)"]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(SCSW::_0001)
            }
            #[doc = "Slow IRC (SIRC_CLK)"]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(SCSW::_0010)
            }
            #[doc = "Fast IRC (FIRC_CLK)"]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(SCSW::_0011)
            }
            #[doc = "System PLL (SPLL_CLK)"]
            #[inline(always)]
            pub fn _0110(self) -> &'a mut W {
                self.variant(SCSW::_0110)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:3 - Slow Clock Divide Ratio"]
            #[inline(always)]
            pub fn divslow(&self) -> DIVSLOWR {
                DIVSLOWR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 4:7 - Bus Clock Divide Ratio"]
            #[inline(always)]
            pub fn divbus(&self) -> DIVBUSR {
                DIVBUSR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 16:19 - Core Clock Divide Ratio"]
            #[inline(always)]
            pub fn divcore(&self) -> DIVCORER {
                DIVCORER::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 24:27 - System Clock Source"]
            #[inline(always)]
            pub fn scs(&self) -> SCSR {
                SCSR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 50331649 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Slow Clock Divide Ratio"]
            #[inline(always)]
            pub fn divslow(&mut self) -> _DIVSLOWW {
                _DIVSLOWW { w: self }
            }
            #[doc = "Bits 4:7 - Bus Clock Divide Ratio"]
            #[inline(always)]
            pub fn divbus(&mut self) -> _DIVBUSW {
                _DIVBUSW { w: self }
            }
            #[doc = "Bits 16:19 - Core Clock Divide Ratio"]
            #[inline(always)]
            pub fn divcore(&mut self) -> _DIVCOREW {
                _DIVCOREW { w: self }
            }
            #[doc = "Bits 24:27 - System Clock Source"]
            #[inline(always)]
            pub fn scs(&mut self) -> _SCSW {
                _SCSW { w: self }
            }
        }
    }
    #[doc = "VLPR Clock Control Register"]
    pub struct VCCR {
        register: VolatileCell<u32>,
    }
    #[doc = "VLPR Clock Control Register"]
    pub mod vccr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::VCCR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DIVSLOW`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DIVSLOWR {
            #[doc = "Divide-by-1"]
            _0000,
            #[doc = "Divide-by-2"]
            _0001,
            #[doc = "Divide-by-3"]
            _0010,
            #[doc = "Divide-by-4"]
            _0011,
            #[doc = "Divide-by-5"]
            _0100,
            #[doc = "Divide-by-6"]
            _0101,
            #[doc = "Divide-by-7"]
            _0110,
            #[doc = "Divide-by-8"]
            _0111,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl DIVSLOWR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    DIVSLOWR::_0000 => 0,
                    DIVSLOWR::_0001 => 1,
                    DIVSLOWR::_0010 => 2,
                    DIVSLOWR::_0011 => 3,
                    DIVSLOWR::_0100 => 4,
                    DIVSLOWR::_0101 => 5,
                    DIVSLOWR::_0110 => 6,
                    DIVSLOWR::_0111 => 7,
                    DIVSLOWR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> DIVSLOWR {
                match value {
                    0 => DIVSLOWR::_0000,
                    1 => DIVSLOWR::_0001,
                    2 => DIVSLOWR::_0010,
                    3 => DIVSLOWR::_0011,
                    4 => DIVSLOWR::_0100,
                    5 => DIVSLOWR::_0101,
                    6 => DIVSLOWR::_0110,
                    7 => DIVSLOWR::_0111,
                    i => DIVSLOWR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == DIVSLOWR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == DIVSLOWR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == DIVSLOWR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == DIVSLOWR::_0011
            }
            #[doc = "Checks if the value of the field is `_0100`"]
            #[inline(always)]
            pub fn is_0100(&self) -> bool {
                *self == DIVSLOWR::_0100
            }
            #[doc = "Checks if the value of the field is `_0101`"]
            #[inline(always)]
            pub fn is_0101(&self) -> bool {
                *self == DIVSLOWR::_0101
            }
            #[doc = "Checks if the value of the field is `_0110`"]
            #[inline(always)]
            pub fn is_0110(&self) -> bool {
                *self == DIVSLOWR::_0110
            }
            #[doc = "Checks if the value of the field is `_0111`"]
            #[inline(always)]
            pub fn is_0111(&self) -> bool {
                *self == DIVSLOWR::_0111
            }
        }
        #[doc = "Possible values of the field `DIVBUS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DIVBUSR {
            #[doc = "Divide-by-1"]
            _0000,
            #[doc = "Divide-by-2"]
            _0001,
            #[doc = "Divide-by-3"]
            _0010,
            #[doc = "Divide-by-4"]
            _0011,
            #[doc = "Divide-by-5"]
            _0100,
            #[doc = "Divide-by-6"]
            _0101,
            #[doc = "Divide-by-7"]
            _0110,
            #[doc = "Divide-by-8"]
            _0111,
            #[doc = "Divide-by-9"]
            _1000,
            #[doc = "Divide-by-10"]
            _1001,
            #[doc = "Divide-by-11"]
            _1010,
            #[doc = "Divide-by-12"]
            _1011,
            #[doc = "Divide-by-13"]
            _1100,
            #[doc = "Divide-by-14"]
            _1101,
            #[doc = "Divide-by-15"]
            _1110,
            #[doc = "Divide-by-16"]
            _1111,
        }
        impl DIVBUSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    DIVBUSR::_0000 => 0,
                    DIVBUSR::_0001 => 1,
                    DIVBUSR::_0010 => 2,
                    DIVBUSR::_0011 => 3,
                    DIVBUSR::_0100 => 4,
                    DIVBUSR::_0101 => 5,
                    DIVBUSR::_0110 => 6,
                    DIVBUSR::_0111 => 7,
                    DIVBUSR::_1000 => 8,
                    DIVBUSR::_1001 => 9,
                    DIVBUSR::_1010 => 10,
                    DIVBUSR::_1011 => 11,
                    DIVBUSR::_1100 => 12,
                    DIVBUSR::_1101 => 13,
                    DIVBUSR::_1110 => 14,
                    DIVBUSR::_1111 => 15,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> DIVBUSR {
                match value {
                    0 => DIVBUSR::_0000,
                    1 => DIVBUSR::_0001,
                    2 => DIVBUSR::_0010,
                    3 => DIVBUSR::_0011,
                    4 => DIVBUSR::_0100,
                    5 => DIVBUSR::_0101,
                    6 => DIVBUSR::_0110,
                    7 => DIVBUSR::_0111,
                    8 => DIVBUSR::_1000,
                    9 => DIVBUSR::_1001,
                    10 => DIVBUSR::_1010,
                    11 => DIVBUSR::_1011,
                    12 => DIVBUSR::_1100,
                    13 => DIVBUSR::_1101,
                    14 => DIVBUSR::_1110,
                    15 => DIVBUSR::_1111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == DIVBUSR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == DIVBUSR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == DIVBUSR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == DIVBUSR::_0011
            }
            #[doc = "Checks if the value of the field is `_0100`"]
            #[inline(always)]
            pub fn is_0100(&self) -> bool {
                *self == DIVBUSR::_0100
            }
            #[doc = "Checks if the value of the field is `_0101`"]
            #[inline(always)]
            pub fn is_0101(&self) -> bool {
                *self == DIVBUSR::_0101
            }
            #[doc = "Checks if the value of the field is `_0110`"]
            #[inline(always)]
            pub fn is_0110(&self) -> bool {
                *self == DIVBUSR::_0110
            }
            #[doc = "Checks if the value of the field is `_0111`"]
            #[inline(always)]
            pub fn is_0111(&self) -> bool {
                *self == DIVBUSR::_0111
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == DIVBUSR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == DIVBUSR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == DIVBUSR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == DIVBUSR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == DIVBUSR::_1100
            }
            #[doc = "Checks if the value of the field is `_1101`"]
            #[inline(always)]
            pub fn is_1101(&self) -> bool {
                *self == DIVBUSR::_1101
            }
            #[doc = "Checks if the value of the field is `_1110`"]
            #[inline(always)]
            pub fn is_1110(&self) -> bool {
                *self == DIVBUSR::_1110
            }
            #[doc = "Checks if the value of the field is `_1111`"]
            #[inline(always)]
            pub fn is_1111(&self) -> bool {
                *self == DIVBUSR::_1111
            }
        }
        #[doc = "Possible values of the field `DIVCORE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DIVCORER {
            #[doc = "Divide-by-1"]
            _0000,
            #[doc = "Divide-by-2"]
            _0001,
            #[doc = "Divide-by-3"]
            _0010,
            #[doc = "Divide-by-4"]
            _0011,
            #[doc = "Divide-by-5"]
            _0100,
            #[doc = "Divide-by-6"]
            _0101,
            #[doc = "Divide-by-7"]
            _0110,
            #[doc = "Divide-by-8"]
            _0111,
            #[doc = "Divide-by-9"]
            _1000,
            #[doc = "Divide-by-10"]
            _1001,
            #[doc = "Divide-by-11"]
            _1010,
            #[doc = "Divide-by-12"]
            _1011,
            #[doc = "Divide-by-13"]
            _1100,
            #[doc = "Divide-by-14"]
            _1101,
            #[doc = "Divide-by-15"]
            _1110,
            #[doc = "Divide-by-16"]
            _1111,
        }
        impl DIVCORER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    DIVCORER::_0000 => 0,
                    DIVCORER::_0001 => 1,
                    DIVCORER::_0010 => 2,
                    DIVCORER::_0011 => 3,
                    DIVCORER::_0100 => 4,
                    DIVCORER::_0101 => 5,
                    DIVCORER::_0110 => 6,
                    DIVCORER::_0111 => 7,
                    DIVCORER::_1000 => 8,
                    DIVCORER::_1001 => 9,
                    DIVCORER::_1010 => 10,
                    DIVCORER::_1011 => 11,
                    DIVCORER::_1100 => 12,
                    DIVCORER::_1101 => 13,
                    DIVCORER::_1110 => 14,
                    DIVCORER::_1111 => 15,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> DIVCORER {
                match value {
                    0 => DIVCORER::_0000,
                    1 => DIVCORER::_0001,
                    2 => DIVCORER::_0010,
                    3 => DIVCORER::_0011,
                    4 => DIVCORER::_0100,
                    5 => DIVCORER::_0101,
                    6 => DIVCORER::_0110,
                    7 => DIVCORER::_0111,
                    8 => DIVCORER::_1000,
                    9 => DIVCORER::_1001,
                    10 => DIVCORER::_1010,
                    11 => DIVCORER::_1011,
                    12 => DIVCORER::_1100,
                    13 => DIVCORER::_1101,
                    14 => DIVCORER::_1110,
                    15 => DIVCORER::_1111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == DIVCORER::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == DIVCORER::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == DIVCORER::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == DIVCORER::_0011
            }
            #[doc = "Checks if the value of the field is `_0100`"]
            #[inline(always)]
            pub fn is_0100(&self) -> bool {
                *self == DIVCORER::_0100
            }
            #[doc = "Checks if the value of the field is `_0101`"]
            #[inline(always)]
            pub fn is_0101(&self) -> bool {
                *self == DIVCORER::_0101
            }
            #[doc = "Checks if the value of the field is `_0110`"]
            #[inline(always)]
            pub fn is_0110(&self) -> bool {
                *self == DIVCORER::_0110
            }
            #[doc = "Checks if the value of the field is `_0111`"]
            #[inline(always)]
            pub fn is_0111(&self) -> bool {
                *self == DIVCORER::_0111
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == DIVCORER::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == DIVCORER::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == DIVCORER::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == DIVCORER::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == DIVCORER::_1100
            }
            #[doc = "Checks if the value of the field is `_1101`"]
            #[inline(always)]
            pub fn is_1101(&self) -> bool {
                *self == DIVCORER::_1101
            }
            #[doc = "Checks if the value of the field is `_1110`"]
            #[inline(always)]
            pub fn is_1110(&self) -> bool {
                *self == DIVCORER::_1110
            }
            #[doc = "Checks if the value of the field is `_1111`"]
            #[inline(always)]
            pub fn is_1111(&self) -> bool {
                *self == DIVCORER::_1111
            }
        }
        #[doc = "Possible values of the field `SCS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SCSR {
            #[doc = "Slow IRC (SIRC_CLK)"]
            _0010,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl SCSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SCSR::_0010 => 2,
                    SCSR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SCSR {
                match value {
                    2 => SCSR::_0010,
                    i => SCSR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == SCSR::_0010
            }
        }
        #[doc = "Values that can be written to the field `DIVSLOW`"]
        pub enum DIVSLOWW {
            #[doc = "Divide-by-1"]
            _0000,
            #[doc = "Divide-by-2"]
            _0001,
            #[doc = "Divide-by-3"]
            _0010,
            #[doc = "Divide-by-4"]
            _0011,
            #[doc = "Divide-by-5"]
            _0100,
            #[doc = "Divide-by-6"]
            _0101,
            #[doc = "Divide-by-7"]
            _0110,
            #[doc = "Divide-by-8"]
            _0111,
        }
        impl DIVSLOWW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    DIVSLOWW::_0000 => 0,
                    DIVSLOWW::_0001 => 1,
                    DIVSLOWW::_0010 => 2,
                    DIVSLOWW::_0011 => 3,
                    DIVSLOWW::_0100 => 4,
                    DIVSLOWW::_0101 => 5,
                    DIVSLOWW::_0110 => 6,
                    DIVSLOWW::_0111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DIVSLOWW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DIVSLOWW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DIVSLOWW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Divide-by-1"]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(DIVSLOWW::_0000)
            }
            #[doc = "Divide-by-2"]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(DIVSLOWW::_0001)
            }
            #[doc = "Divide-by-3"]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(DIVSLOWW::_0010)
            }
            #[doc = "Divide-by-4"]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(DIVSLOWW::_0011)
            }
            #[doc = "Divide-by-5"]
            #[inline(always)]
            pub fn _0100(self) -> &'a mut W {
                self.variant(DIVSLOWW::_0100)
            }
            #[doc = "Divide-by-6"]
            #[inline(always)]
            pub fn _0101(self) -> &'a mut W {
                self.variant(DIVSLOWW::_0101)
            }
            #[doc = "Divide-by-7"]
            #[inline(always)]
            pub fn _0110(self) -> &'a mut W {
                self.variant(DIVSLOWW::_0110)
            }
            #[doc = "Divide-by-8"]
            #[inline(always)]
            pub fn _0111(self) -> &'a mut W {
                self.variant(DIVSLOWW::_0111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DIVBUS`"]
        pub enum DIVBUSW {
            #[doc = "Divide-by-1"]
            _0000,
            #[doc = "Divide-by-2"]
            _0001,
            #[doc = "Divide-by-3"]
            _0010,
            #[doc = "Divide-by-4"]
            _0011,
            #[doc = "Divide-by-5"]
            _0100,
            #[doc = "Divide-by-6"]
            _0101,
            #[doc = "Divide-by-7"]
            _0110,
            #[doc = "Divide-by-8"]
            _0111,
            #[doc = "Divide-by-9"]
            _1000,
            #[doc = "Divide-by-10"]
            _1001,
            #[doc = "Divide-by-11"]
            _1010,
            #[doc = "Divide-by-12"]
            _1011,
            #[doc = "Divide-by-13"]
            _1100,
            #[doc = "Divide-by-14"]
            _1101,
            #[doc = "Divide-by-15"]
            _1110,
            #[doc = "Divide-by-16"]
            _1111,
        }
        impl DIVBUSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    DIVBUSW::_0000 => 0,
                    DIVBUSW::_0001 => 1,
                    DIVBUSW::_0010 => 2,
                    DIVBUSW::_0011 => 3,
                    DIVBUSW::_0100 => 4,
                    DIVBUSW::_0101 => 5,
                    DIVBUSW::_0110 => 6,
                    DIVBUSW::_0111 => 7,
                    DIVBUSW::_1000 => 8,
                    DIVBUSW::_1001 => 9,
                    DIVBUSW::_1010 => 10,
                    DIVBUSW::_1011 => 11,
                    DIVBUSW::_1100 => 12,
                    DIVBUSW::_1101 => 13,
                    DIVBUSW::_1110 => 14,
                    DIVBUSW::_1111 => 15,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DIVBUSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DIVBUSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DIVBUSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Divide-by-1"]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(DIVBUSW::_0000)
            }
            #[doc = "Divide-by-2"]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(DIVBUSW::_0001)
            }
            #[doc = "Divide-by-3"]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(DIVBUSW::_0010)
            }
            #[doc = "Divide-by-4"]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(DIVBUSW::_0011)
            }
            #[doc = "Divide-by-5"]
            #[inline(always)]
            pub fn _0100(self) -> &'a mut W {
                self.variant(DIVBUSW::_0100)
            }
            #[doc = "Divide-by-6"]
            #[inline(always)]
            pub fn _0101(self) -> &'a mut W {
                self.variant(DIVBUSW::_0101)
            }
            #[doc = "Divide-by-7"]
            #[inline(always)]
            pub fn _0110(self) -> &'a mut W {
                self.variant(DIVBUSW::_0110)
            }
            #[doc = "Divide-by-8"]
            #[inline(always)]
            pub fn _0111(self) -> &'a mut W {
                self.variant(DIVBUSW::_0111)
            }
            #[doc = "Divide-by-9"]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(DIVBUSW::_1000)
            }
            #[doc = "Divide-by-10"]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(DIVBUSW::_1001)
            }
            #[doc = "Divide-by-11"]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(DIVBUSW::_1010)
            }
            #[doc = "Divide-by-12"]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(DIVBUSW::_1011)
            }
            #[doc = "Divide-by-13"]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(DIVBUSW::_1100)
            }
            #[doc = "Divide-by-14"]
            #[inline(always)]
            pub fn _1101(self) -> &'a mut W {
                self.variant(DIVBUSW::_1101)
            }
            #[doc = "Divide-by-15"]
            #[inline(always)]
            pub fn _1110(self) -> &'a mut W {
                self.variant(DIVBUSW::_1110)
            }
            #[doc = "Divide-by-16"]
            #[inline(always)]
            pub fn _1111(self) -> &'a mut W {
                self.variant(DIVBUSW::_1111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DIVCORE`"]
        pub enum DIVCOREW {
            #[doc = "Divide-by-1"]
            _0000,
            #[doc = "Divide-by-2"]
            _0001,
            #[doc = "Divide-by-3"]
            _0010,
            #[doc = "Divide-by-4"]
            _0011,
            #[doc = "Divide-by-5"]
            _0100,
            #[doc = "Divide-by-6"]
            _0101,
            #[doc = "Divide-by-7"]
            _0110,
            #[doc = "Divide-by-8"]
            _0111,
            #[doc = "Divide-by-9"]
            _1000,
            #[doc = "Divide-by-10"]
            _1001,
            #[doc = "Divide-by-11"]
            _1010,
            #[doc = "Divide-by-12"]
            _1011,
            #[doc = "Divide-by-13"]
            _1100,
            #[doc = "Divide-by-14"]
            _1101,
            #[doc = "Divide-by-15"]
            _1110,
            #[doc = "Divide-by-16"]
            _1111,
        }
        impl DIVCOREW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    DIVCOREW::_0000 => 0,
                    DIVCOREW::_0001 => 1,
                    DIVCOREW::_0010 => 2,
                    DIVCOREW::_0011 => 3,
                    DIVCOREW::_0100 => 4,
                    DIVCOREW::_0101 => 5,
                    DIVCOREW::_0110 => 6,
                    DIVCOREW::_0111 => 7,
                    DIVCOREW::_1000 => 8,
                    DIVCOREW::_1001 => 9,
                    DIVCOREW::_1010 => 10,
                    DIVCOREW::_1011 => 11,
                    DIVCOREW::_1100 => 12,
                    DIVCOREW::_1101 => 13,
                    DIVCOREW::_1110 => 14,
                    DIVCOREW::_1111 => 15,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DIVCOREW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DIVCOREW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DIVCOREW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Divide-by-1"]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(DIVCOREW::_0000)
            }
            #[doc = "Divide-by-2"]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(DIVCOREW::_0001)
            }
            #[doc = "Divide-by-3"]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(DIVCOREW::_0010)
            }
            #[doc = "Divide-by-4"]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(DIVCOREW::_0011)
            }
            #[doc = "Divide-by-5"]
            #[inline(always)]
            pub fn _0100(self) -> &'a mut W {
                self.variant(DIVCOREW::_0100)
            }
            #[doc = "Divide-by-6"]
            #[inline(always)]
            pub fn _0101(self) -> &'a mut W {
                self.variant(DIVCOREW::_0101)
            }
            #[doc = "Divide-by-7"]
            #[inline(always)]
            pub fn _0110(self) -> &'a mut W {
                self.variant(DIVCOREW::_0110)
            }
            #[doc = "Divide-by-8"]
            #[inline(always)]
            pub fn _0111(self) -> &'a mut W {
                self.variant(DIVCOREW::_0111)
            }
            #[doc = "Divide-by-9"]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(DIVCOREW::_1000)
            }
            #[doc = "Divide-by-10"]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(DIVCOREW::_1001)
            }
            #[doc = "Divide-by-11"]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(DIVCOREW::_1010)
            }
            #[doc = "Divide-by-12"]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(DIVCOREW::_1011)
            }
            #[doc = "Divide-by-13"]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(DIVCOREW::_1100)
            }
            #[doc = "Divide-by-14"]
            #[inline(always)]
            pub fn _1101(self) -> &'a mut W {
                self.variant(DIVCOREW::_1101)
            }
            #[doc = "Divide-by-15"]
            #[inline(always)]
            pub fn _1110(self) -> &'a mut W {
                self.variant(DIVCOREW::_1110)
            }
            #[doc = "Divide-by-16"]
            #[inline(always)]
            pub fn _1111(self) -> &'a mut W {
                self.variant(DIVCOREW::_1111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SCS`"]
        pub enum SCSW {
            #[doc = "Slow IRC (SIRC_CLK)"]
            _0010,
        }
        impl SCSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SCSW::_0010 => 2,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SCSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SCSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SCSW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Slow IRC (SIRC_CLK)"]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(SCSW::_0010)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:3 - Slow Clock Divide Ratio"]
            #[inline(always)]
            pub fn divslow(&self) -> DIVSLOWR {
                DIVSLOWR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 4:7 - Bus Clock Divide Ratio"]
            #[inline(always)]
            pub fn divbus(&self) -> DIVBUSR {
                DIVBUSR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 16:19 - Core Clock Divide Ratio"]
            #[inline(always)]
            pub fn divcore(&self) -> DIVCORER {
                DIVCORER::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 24:27 - System Clock Source"]
            #[inline(always)]
            pub fn scs(&self) -> SCSR {
                SCSR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 33554433 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Slow Clock Divide Ratio"]
            #[inline(always)]
            pub fn divslow(&mut self) -> _DIVSLOWW {
                _DIVSLOWW { w: self }
            }
            #[doc = "Bits 4:7 - Bus Clock Divide Ratio"]
            #[inline(always)]
            pub fn divbus(&mut self) -> _DIVBUSW {
                _DIVBUSW { w: self }
            }
            #[doc = "Bits 16:19 - Core Clock Divide Ratio"]
            #[inline(always)]
            pub fn divcore(&mut self) -> _DIVCOREW {
                _DIVCOREW { w: self }
            }
            #[doc = "Bits 24:27 - System Clock Source"]
            #[inline(always)]
            pub fn scs(&mut self) -> _SCSW {
                _SCSW { w: self }
            }
        }
    }
    #[doc = "HSRUN Clock Control Register"]
    pub struct HCCR {
        register: VolatileCell<u32>,
    }
    #[doc = "HSRUN Clock Control Register"]
    pub mod hccr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::HCCR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DIVSLOW`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DIVSLOWR {
            #[doc = "Divide-by-1"]
            _0000,
            #[doc = "Divide-by-2"]
            _0001,
            #[doc = "Divide-by-3"]
            _0010,
            #[doc = "Divide-by-4"]
            _0011,
            #[doc = "Divide-by-5"]
            _0100,
            #[doc = "Divide-by-6"]
            _0101,
            #[doc = "Divide-by-7"]
            _0110,
            #[doc = "Divide-by-8"]
            _0111,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl DIVSLOWR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    DIVSLOWR::_0000 => 0,
                    DIVSLOWR::_0001 => 1,
                    DIVSLOWR::_0010 => 2,
                    DIVSLOWR::_0011 => 3,
                    DIVSLOWR::_0100 => 4,
                    DIVSLOWR::_0101 => 5,
                    DIVSLOWR::_0110 => 6,
                    DIVSLOWR::_0111 => 7,
                    DIVSLOWR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> DIVSLOWR {
                match value {
                    0 => DIVSLOWR::_0000,
                    1 => DIVSLOWR::_0001,
                    2 => DIVSLOWR::_0010,
                    3 => DIVSLOWR::_0011,
                    4 => DIVSLOWR::_0100,
                    5 => DIVSLOWR::_0101,
                    6 => DIVSLOWR::_0110,
                    7 => DIVSLOWR::_0111,
                    i => DIVSLOWR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == DIVSLOWR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == DIVSLOWR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == DIVSLOWR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == DIVSLOWR::_0011
            }
            #[doc = "Checks if the value of the field is `_0100`"]
            #[inline(always)]
            pub fn is_0100(&self) -> bool {
                *self == DIVSLOWR::_0100
            }
            #[doc = "Checks if the value of the field is `_0101`"]
            #[inline(always)]
            pub fn is_0101(&self) -> bool {
                *self == DIVSLOWR::_0101
            }
            #[doc = "Checks if the value of the field is `_0110`"]
            #[inline(always)]
            pub fn is_0110(&self) -> bool {
                *self == DIVSLOWR::_0110
            }
            #[doc = "Checks if the value of the field is `_0111`"]
            #[inline(always)]
            pub fn is_0111(&self) -> bool {
                *self == DIVSLOWR::_0111
            }
        }
        #[doc = "Possible values of the field `DIVBUS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DIVBUSR {
            #[doc = "Divide-by-1"]
            _0000,
            #[doc = "Divide-by-2"]
            _0001,
            #[doc = "Divide-by-3"]
            _0010,
            #[doc = "Divide-by-4"]
            _0011,
            #[doc = "Divide-by-5"]
            _0100,
            #[doc = "Divide-by-6"]
            _0101,
            #[doc = "Divide-by-7"]
            _0110,
            #[doc = "Divide-by-8"]
            _0111,
            #[doc = "Divide-by-9"]
            _1000,
            #[doc = "Divide-by-10"]
            _1001,
            #[doc = "Divide-by-11"]
            _1010,
            #[doc = "Divide-by-12"]
            _1011,
            #[doc = "Divide-by-13"]
            _1100,
            #[doc = "Divide-by-14"]
            _1101,
            #[doc = "Divide-by-15"]
            _1110,
            #[doc = "Divide-by-16"]
            _1111,
        }
        impl DIVBUSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    DIVBUSR::_0000 => 0,
                    DIVBUSR::_0001 => 1,
                    DIVBUSR::_0010 => 2,
                    DIVBUSR::_0011 => 3,
                    DIVBUSR::_0100 => 4,
                    DIVBUSR::_0101 => 5,
                    DIVBUSR::_0110 => 6,
                    DIVBUSR::_0111 => 7,
                    DIVBUSR::_1000 => 8,
                    DIVBUSR::_1001 => 9,
                    DIVBUSR::_1010 => 10,
                    DIVBUSR::_1011 => 11,
                    DIVBUSR::_1100 => 12,
                    DIVBUSR::_1101 => 13,
                    DIVBUSR::_1110 => 14,
                    DIVBUSR::_1111 => 15,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> DIVBUSR {
                match value {
                    0 => DIVBUSR::_0000,
                    1 => DIVBUSR::_0001,
                    2 => DIVBUSR::_0010,
                    3 => DIVBUSR::_0011,
                    4 => DIVBUSR::_0100,
                    5 => DIVBUSR::_0101,
                    6 => DIVBUSR::_0110,
                    7 => DIVBUSR::_0111,
                    8 => DIVBUSR::_1000,
                    9 => DIVBUSR::_1001,
                    10 => DIVBUSR::_1010,
                    11 => DIVBUSR::_1011,
                    12 => DIVBUSR::_1100,
                    13 => DIVBUSR::_1101,
                    14 => DIVBUSR::_1110,
                    15 => DIVBUSR::_1111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == DIVBUSR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == DIVBUSR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == DIVBUSR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == DIVBUSR::_0011
            }
            #[doc = "Checks if the value of the field is `_0100`"]
            #[inline(always)]
            pub fn is_0100(&self) -> bool {
                *self == DIVBUSR::_0100
            }
            #[doc = "Checks if the value of the field is `_0101`"]
            #[inline(always)]
            pub fn is_0101(&self) -> bool {
                *self == DIVBUSR::_0101
            }
            #[doc = "Checks if the value of the field is `_0110`"]
            #[inline(always)]
            pub fn is_0110(&self) -> bool {
                *self == DIVBUSR::_0110
            }
            #[doc = "Checks if the value of the field is `_0111`"]
            #[inline(always)]
            pub fn is_0111(&self) -> bool {
                *self == DIVBUSR::_0111
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == DIVBUSR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == DIVBUSR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == DIVBUSR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == DIVBUSR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == DIVBUSR::_1100
            }
            #[doc = "Checks if the value of the field is `_1101`"]
            #[inline(always)]
            pub fn is_1101(&self) -> bool {
                *self == DIVBUSR::_1101
            }
            #[doc = "Checks if the value of the field is `_1110`"]
            #[inline(always)]
            pub fn is_1110(&self) -> bool {
                *self == DIVBUSR::_1110
            }
            #[doc = "Checks if the value of the field is `_1111`"]
            #[inline(always)]
            pub fn is_1111(&self) -> bool {
                *self == DIVBUSR::_1111
            }
        }
        #[doc = "Possible values of the field `DIVCORE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DIVCORER {
            #[doc = "Divide-by-1"]
            _0000,
            #[doc = "Divide-by-2"]
            _0001,
            #[doc = "Divide-by-3"]
            _0010,
            #[doc = "Divide-by-4"]
            _0011,
            #[doc = "Divide-by-5"]
            _0100,
            #[doc = "Divide-by-6"]
            _0101,
            #[doc = "Divide-by-7"]
            _0110,
            #[doc = "Divide-by-8"]
            _0111,
            #[doc = "Divide-by-9"]
            _1000,
            #[doc = "Divide-by-10"]
            _1001,
            #[doc = "Divide-by-11"]
            _1010,
            #[doc = "Divide-by-12"]
            _1011,
            #[doc = "Divide-by-13"]
            _1100,
            #[doc = "Divide-by-14"]
            _1101,
            #[doc = "Divide-by-15"]
            _1110,
            #[doc = "Divide-by-16"]
            _1111,
        }
        impl DIVCORER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    DIVCORER::_0000 => 0,
                    DIVCORER::_0001 => 1,
                    DIVCORER::_0010 => 2,
                    DIVCORER::_0011 => 3,
                    DIVCORER::_0100 => 4,
                    DIVCORER::_0101 => 5,
                    DIVCORER::_0110 => 6,
                    DIVCORER::_0111 => 7,
                    DIVCORER::_1000 => 8,
                    DIVCORER::_1001 => 9,
                    DIVCORER::_1010 => 10,
                    DIVCORER::_1011 => 11,
                    DIVCORER::_1100 => 12,
                    DIVCORER::_1101 => 13,
                    DIVCORER::_1110 => 14,
                    DIVCORER::_1111 => 15,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> DIVCORER {
                match value {
                    0 => DIVCORER::_0000,
                    1 => DIVCORER::_0001,
                    2 => DIVCORER::_0010,
                    3 => DIVCORER::_0011,
                    4 => DIVCORER::_0100,
                    5 => DIVCORER::_0101,
                    6 => DIVCORER::_0110,
                    7 => DIVCORER::_0111,
                    8 => DIVCORER::_1000,
                    9 => DIVCORER::_1001,
                    10 => DIVCORER::_1010,
                    11 => DIVCORER::_1011,
                    12 => DIVCORER::_1100,
                    13 => DIVCORER::_1101,
                    14 => DIVCORER::_1110,
                    15 => DIVCORER::_1111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == DIVCORER::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == DIVCORER::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == DIVCORER::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == DIVCORER::_0011
            }
            #[doc = "Checks if the value of the field is `_0100`"]
            #[inline(always)]
            pub fn is_0100(&self) -> bool {
                *self == DIVCORER::_0100
            }
            #[doc = "Checks if the value of the field is `_0101`"]
            #[inline(always)]
            pub fn is_0101(&self) -> bool {
                *self == DIVCORER::_0101
            }
            #[doc = "Checks if the value of the field is `_0110`"]
            #[inline(always)]
            pub fn is_0110(&self) -> bool {
                *self == DIVCORER::_0110
            }
            #[doc = "Checks if the value of the field is `_0111`"]
            #[inline(always)]
            pub fn is_0111(&self) -> bool {
                *self == DIVCORER::_0111
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == DIVCORER::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == DIVCORER::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == DIVCORER::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == DIVCORER::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == DIVCORER::_1100
            }
            #[doc = "Checks if the value of the field is `_1101`"]
            #[inline(always)]
            pub fn is_1101(&self) -> bool {
                *self == DIVCORER::_1101
            }
            #[doc = "Checks if the value of the field is `_1110`"]
            #[inline(always)]
            pub fn is_1110(&self) -> bool {
                *self == DIVCORER::_1110
            }
            #[doc = "Checks if the value of the field is `_1111`"]
            #[inline(always)]
            pub fn is_1111(&self) -> bool {
                *self == DIVCORER::_1111
            }
        }
        #[doc = "Possible values of the field `SCS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SCSR {
            #[doc = "System OSC (SOSC_CLK)"]
            _0001,
            #[doc = "Slow IRC (SIRC_CLK)"]
            _0010,
            #[doc = "Fast IRC (FIRC_CLK)"]
            _0011,
            #[doc = "System PLL (SPLL_CLK)"]
            _0110,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl SCSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SCSR::_0001 => 1,
                    SCSR::_0010 => 2,
                    SCSR::_0011 => 3,
                    SCSR::_0110 => 6,
                    SCSR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SCSR {
                match value {
                    1 => SCSR::_0001,
                    2 => SCSR::_0010,
                    3 => SCSR::_0011,
                    6 => SCSR::_0110,
                    i => SCSR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == SCSR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == SCSR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == SCSR::_0011
            }
            #[doc = "Checks if the value of the field is `_0110`"]
            #[inline(always)]
            pub fn is_0110(&self) -> bool {
                *self == SCSR::_0110
            }
        }
        #[doc = "Values that can be written to the field `DIVSLOW`"]
        pub enum DIVSLOWW {
            #[doc = "Divide-by-1"]
            _0000,
            #[doc = "Divide-by-2"]
            _0001,
            #[doc = "Divide-by-3"]
            _0010,
            #[doc = "Divide-by-4"]
            _0011,
            #[doc = "Divide-by-5"]
            _0100,
            #[doc = "Divide-by-6"]
            _0101,
            #[doc = "Divide-by-7"]
            _0110,
            #[doc = "Divide-by-8"]
            _0111,
        }
        impl DIVSLOWW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    DIVSLOWW::_0000 => 0,
                    DIVSLOWW::_0001 => 1,
                    DIVSLOWW::_0010 => 2,
                    DIVSLOWW::_0011 => 3,
                    DIVSLOWW::_0100 => 4,
                    DIVSLOWW::_0101 => 5,
                    DIVSLOWW::_0110 => 6,
                    DIVSLOWW::_0111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DIVSLOWW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DIVSLOWW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DIVSLOWW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Divide-by-1"]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(DIVSLOWW::_0000)
            }
            #[doc = "Divide-by-2"]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(DIVSLOWW::_0001)
            }
            #[doc = "Divide-by-3"]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(DIVSLOWW::_0010)
            }
            #[doc = "Divide-by-4"]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(DIVSLOWW::_0011)
            }
            #[doc = "Divide-by-5"]
            #[inline(always)]
            pub fn _0100(self) -> &'a mut W {
                self.variant(DIVSLOWW::_0100)
            }
            #[doc = "Divide-by-6"]
            #[inline(always)]
            pub fn _0101(self) -> &'a mut W {
                self.variant(DIVSLOWW::_0101)
            }
            #[doc = "Divide-by-7"]
            #[inline(always)]
            pub fn _0110(self) -> &'a mut W {
                self.variant(DIVSLOWW::_0110)
            }
            #[doc = "Divide-by-8"]
            #[inline(always)]
            pub fn _0111(self) -> &'a mut W {
                self.variant(DIVSLOWW::_0111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DIVBUS`"]
        pub enum DIVBUSW {
            #[doc = "Divide-by-1"]
            _0000,
            #[doc = "Divide-by-2"]
            _0001,
            #[doc = "Divide-by-3"]
            _0010,
            #[doc = "Divide-by-4"]
            _0011,
            #[doc = "Divide-by-5"]
            _0100,
            #[doc = "Divide-by-6"]
            _0101,
            #[doc = "Divide-by-7"]
            _0110,
            #[doc = "Divide-by-8"]
            _0111,
            #[doc = "Divide-by-9"]
            _1000,
            #[doc = "Divide-by-10"]
            _1001,
            #[doc = "Divide-by-11"]
            _1010,
            #[doc = "Divide-by-12"]
            _1011,
            #[doc = "Divide-by-13"]
            _1100,
            #[doc = "Divide-by-14"]
            _1101,
            #[doc = "Divide-by-15"]
            _1110,
            #[doc = "Divide-by-16"]
            _1111,
        }
        impl DIVBUSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    DIVBUSW::_0000 => 0,
                    DIVBUSW::_0001 => 1,
                    DIVBUSW::_0010 => 2,
                    DIVBUSW::_0011 => 3,
                    DIVBUSW::_0100 => 4,
                    DIVBUSW::_0101 => 5,
                    DIVBUSW::_0110 => 6,
                    DIVBUSW::_0111 => 7,
                    DIVBUSW::_1000 => 8,
                    DIVBUSW::_1001 => 9,
                    DIVBUSW::_1010 => 10,
                    DIVBUSW::_1011 => 11,
                    DIVBUSW::_1100 => 12,
                    DIVBUSW::_1101 => 13,
                    DIVBUSW::_1110 => 14,
                    DIVBUSW::_1111 => 15,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DIVBUSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DIVBUSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DIVBUSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Divide-by-1"]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(DIVBUSW::_0000)
            }
            #[doc = "Divide-by-2"]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(DIVBUSW::_0001)
            }
            #[doc = "Divide-by-3"]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(DIVBUSW::_0010)
            }
            #[doc = "Divide-by-4"]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(DIVBUSW::_0011)
            }
            #[doc = "Divide-by-5"]
            #[inline(always)]
            pub fn _0100(self) -> &'a mut W {
                self.variant(DIVBUSW::_0100)
            }
            #[doc = "Divide-by-6"]
            #[inline(always)]
            pub fn _0101(self) -> &'a mut W {
                self.variant(DIVBUSW::_0101)
            }
            #[doc = "Divide-by-7"]
            #[inline(always)]
            pub fn _0110(self) -> &'a mut W {
                self.variant(DIVBUSW::_0110)
            }
            #[doc = "Divide-by-8"]
            #[inline(always)]
            pub fn _0111(self) -> &'a mut W {
                self.variant(DIVBUSW::_0111)
            }
            #[doc = "Divide-by-9"]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(DIVBUSW::_1000)
            }
            #[doc = "Divide-by-10"]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(DIVBUSW::_1001)
            }
            #[doc = "Divide-by-11"]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(DIVBUSW::_1010)
            }
            #[doc = "Divide-by-12"]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(DIVBUSW::_1011)
            }
            #[doc = "Divide-by-13"]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(DIVBUSW::_1100)
            }
            #[doc = "Divide-by-14"]
            #[inline(always)]
            pub fn _1101(self) -> &'a mut W {
                self.variant(DIVBUSW::_1101)
            }
            #[doc = "Divide-by-15"]
            #[inline(always)]
            pub fn _1110(self) -> &'a mut W {
                self.variant(DIVBUSW::_1110)
            }
            #[doc = "Divide-by-16"]
            #[inline(always)]
            pub fn _1111(self) -> &'a mut W {
                self.variant(DIVBUSW::_1111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DIVCORE`"]
        pub enum DIVCOREW {
            #[doc = "Divide-by-1"]
            _0000,
            #[doc = "Divide-by-2"]
            _0001,
            #[doc = "Divide-by-3"]
            _0010,
            #[doc = "Divide-by-4"]
            _0011,
            #[doc = "Divide-by-5"]
            _0100,
            #[doc = "Divide-by-6"]
            _0101,
            #[doc = "Divide-by-7"]
            _0110,
            #[doc = "Divide-by-8"]
            _0111,
            #[doc = "Divide-by-9"]
            _1000,
            #[doc = "Divide-by-10"]
            _1001,
            #[doc = "Divide-by-11"]
            _1010,
            #[doc = "Divide-by-12"]
            _1011,
            #[doc = "Divide-by-13"]
            _1100,
            #[doc = "Divide-by-14"]
            _1101,
            #[doc = "Divide-by-15"]
            _1110,
            #[doc = "Divide-by-16"]
            _1111,
        }
        impl DIVCOREW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    DIVCOREW::_0000 => 0,
                    DIVCOREW::_0001 => 1,
                    DIVCOREW::_0010 => 2,
                    DIVCOREW::_0011 => 3,
                    DIVCOREW::_0100 => 4,
                    DIVCOREW::_0101 => 5,
                    DIVCOREW::_0110 => 6,
                    DIVCOREW::_0111 => 7,
                    DIVCOREW::_1000 => 8,
                    DIVCOREW::_1001 => 9,
                    DIVCOREW::_1010 => 10,
                    DIVCOREW::_1011 => 11,
                    DIVCOREW::_1100 => 12,
                    DIVCOREW::_1101 => 13,
                    DIVCOREW::_1110 => 14,
                    DIVCOREW::_1111 => 15,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DIVCOREW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DIVCOREW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DIVCOREW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Divide-by-1"]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(DIVCOREW::_0000)
            }
            #[doc = "Divide-by-2"]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(DIVCOREW::_0001)
            }
            #[doc = "Divide-by-3"]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(DIVCOREW::_0010)
            }
            #[doc = "Divide-by-4"]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(DIVCOREW::_0011)
            }
            #[doc = "Divide-by-5"]
            #[inline(always)]
            pub fn _0100(self) -> &'a mut W {
                self.variant(DIVCOREW::_0100)
            }
            #[doc = "Divide-by-6"]
            #[inline(always)]
            pub fn _0101(self) -> &'a mut W {
                self.variant(DIVCOREW::_0101)
            }
            #[doc = "Divide-by-7"]
            #[inline(always)]
            pub fn _0110(self) -> &'a mut W {
                self.variant(DIVCOREW::_0110)
            }
            #[doc = "Divide-by-8"]
            #[inline(always)]
            pub fn _0111(self) -> &'a mut W {
                self.variant(DIVCOREW::_0111)
            }
            #[doc = "Divide-by-9"]
            #[inline(always)]
            pub fn _1000(self) -> &'a mut W {
                self.variant(DIVCOREW::_1000)
            }
            #[doc = "Divide-by-10"]
            #[inline(always)]
            pub fn _1001(self) -> &'a mut W {
                self.variant(DIVCOREW::_1001)
            }
            #[doc = "Divide-by-11"]
            #[inline(always)]
            pub fn _1010(self) -> &'a mut W {
                self.variant(DIVCOREW::_1010)
            }
            #[doc = "Divide-by-12"]
            #[inline(always)]
            pub fn _1011(self) -> &'a mut W {
                self.variant(DIVCOREW::_1011)
            }
            #[doc = "Divide-by-13"]
            #[inline(always)]
            pub fn _1100(self) -> &'a mut W {
                self.variant(DIVCOREW::_1100)
            }
            #[doc = "Divide-by-14"]
            #[inline(always)]
            pub fn _1101(self) -> &'a mut W {
                self.variant(DIVCOREW::_1101)
            }
            #[doc = "Divide-by-15"]
            #[inline(always)]
            pub fn _1110(self) -> &'a mut W {
                self.variant(DIVCOREW::_1110)
            }
            #[doc = "Divide-by-16"]
            #[inline(always)]
            pub fn _1111(self) -> &'a mut W {
                self.variant(DIVCOREW::_1111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SCS`"]
        pub enum SCSW {
            #[doc = "System OSC (SOSC_CLK)"]
            _0001,
            #[doc = "Slow IRC (SIRC_CLK)"]
            _0010,
            #[doc = "Fast IRC (FIRC_CLK)"]
            _0011,
            #[doc = "System PLL (SPLL_CLK)"]
            _0110,
        }
        impl SCSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SCSW::_0001 => 1,
                    SCSW::_0010 => 2,
                    SCSW::_0011 => 3,
                    SCSW::_0110 => 6,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SCSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SCSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SCSW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "System OSC (SOSC_CLK)"]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(SCSW::_0001)
            }
            #[doc = "Slow IRC (SIRC_CLK)"]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(SCSW::_0010)
            }
            #[doc = "Fast IRC (FIRC_CLK)"]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(SCSW::_0011)
            }
            #[doc = "System PLL (SPLL_CLK)"]
            #[inline(always)]
            pub fn _0110(self) -> &'a mut W {
                self.variant(SCSW::_0110)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:3 - Slow Clock Divide Ratio"]
            #[inline(always)]
            pub fn divslow(&self) -> DIVSLOWR {
                DIVSLOWR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 4:7 - Bus Clock Divide Ratio"]
            #[inline(always)]
            pub fn divbus(&self) -> DIVBUSR {
                DIVBUSR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 16:19 - Core Clock Divide Ratio"]
            #[inline(always)]
            pub fn divcore(&self) -> DIVCORER {
                DIVCORER::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 24:27 - System Clock Source"]
            #[inline(always)]
            pub fn scs(&self) -> SCSR {
                SCSR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 50331649 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Slow Clock Divide Ratio"]
            #[inline(always)]
            pub fn divslow(&mut self) -> _DIVSLOWW {
                _DIVSLOWW { w: self }
            }
            #[doc = "Bits 4:7 - Bus Clock Divide Ratio"]
            #[inline(always)]
            pub fn divbus(&mut self) -> _DIVBUSW {
                _DIVBUSW { w: self }
            }
            #[doc = "Bits 16:19 - Core Clock Divide Ratio"]
            #[inline(always)]
            pub fn divcore(&mut self) -> _DIVCOREW {
                _DIVCOREW { w: self }
            }
            #[doc = "Bits 24:27 - System Clock Source"]
            #[inline(always)]
            pub fn scs(&mut self) -> _SCSW {
                _SCSW { w: self }
            }
        }
    }
    #[doc = "SCG CLKOUT Configuration Register"]
    pub struct CLKOUTCNFG {
        register: VolatileCell<u32>,
    }
    #[doc = "SCG CLKOUT Configuration Register"]
    pub mod clkoutcnfg {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CLKOUTCNFG {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CLKOUTSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CLKOUTSELR {
            #[doc = "SCG SLOW Clock"]
            _0000,
            #[doc = "System OSC (SOSC_CLK)"]
            _0001,
            #[doc = "Slow IRC (SIRC_CLK)"]
            _0010,
            #[doc = "Fast IRC (FIRC_CLK)"]
            _0011,
            #[doc = "System PLL (SPLL_CLK)"]
            _0110,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl CLKOUTSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    CLKOUTSELR::_0000 => 0,
                    CLKOUTSELR::_0001 => 1,
                    CLKOUTSELR::_0010 => 2,
                    CLKOUTSELR::_0011 => 3,
                    CLKOUTSELR::_0110 => 6,
                    CLKOUTSELR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> CLKOUTSELR {
                match value {
                    0 => CLKOUTSELR::_0000,
                    1 => CLKOUTSELR::_0001,
                    2 => CLKOUTSELR::_0010,
                    3 => CLKOUTSELR::_0011,
                    6 => CLKOUTSELR::_0110,
                    i => CLKOUTSELR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == CLKOUTSELR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == CLKOUTSELR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == CLKOUTSELR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == CLKOUTSELR::_0011
            }
            #[doc = "Checks if the value of the field is `_0110`"]
            #[inline(always)]
            pub fn is_0110(&self) -> bool {
                *self == CLKOUTSELR::_0110
            }
        }
        #[doc = "Values that can be written to the field `CLKOUTSEL`"]
        pub enum CLKOUTSELW {
            #[doc = "SCG SLOW Clock"]
            _0000,
            #[doc = "System OSC (SOSC_CLK)"]
            _0001,
            #[doc = "Slow IRC (SIRC_CLK)"]
            _0010,
            #[doc = "Fast IRC (FIRC_CLK)"]
            _0011,
            #[doc = "System PLL (SPLL_CLK)"]
            _0110,
        }
        impl CLKOUTSELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    CLKOUTSELW::_0000 => 0,
                    CLKOUTSELW::_0001 => 1,
                    CLKOUTSELW::_0010 => 2,
                    CLKOUTSELW::_0011 => 3,
                    CLKOUTSELW::_0110 => 6,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLKOUTSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLKOUTSELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CLKOUTSELW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "SCG SLOW Clock"]
            #[inline(always)]
            pub fn _0000(self) -> &'a mut W {
                self.variant(CLKOUTSELW::_0000)
            }
            #[doc = "System OSC (SOSC_CLK)"]
            #[inline(always)]
            pub fn _0001(self) -> &'a mut W {
                self.variant(CLKOUTSELW::_0001)
            }
            #[doc = "Slow IRC (SIRC_CLK)"]
            #[inline(always)]
            pub fn _0010(self) -> &'a mut W {
                self.variant(CLKOUTSELW::_0010)
            }
            #[doc = "Fast IRC (FIRC_CLK)"]
            #[inline(always)]
            pub fn _0011(self) -> &'a mut W {
                self.variant(CLKOUTSELW::_0011)
            }
            #[doc = "System PLL (SPLL_CLK)"]
            #[inline(always)]
            pub fn _0110(self) -> &'a mut W {
                self.variant(CLKOUTSELW::_0110)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 24:27 - SCG Clkout Select"]
            #[inline(always)]
            pub fn clkoutsel(&self) -> CLKOUTSELR {
                CLKOUTSELR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 50331648 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 24:27 - SCG Clkout Select"]
            #[inline(always)]
            pub fn clkoutsel(&mut self) -> _CLKOUTSELW {
                _CLKOUTSELW { w: self }
            }
        }
    }
    #[doc = "System OSC Control Status Register"]
    pub struct SOSCCSR {
        register: VolatileCell<u32>,
    }
    #[doc = "System OSC Control Status Register"]
    pub mod sosccsr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SOSCCSR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `SOSCEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SOSCENR {
            #[doc = "System OSC is disabled"]
            _0,
            #[doc = "System OSC is enabled"]
            _1,
        }
        impl SOSCENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SOSCENR::_0 => false,
                    SOSCENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SOSCENR {
                match value {
                    false => SOSCENR::_0,
                    true => SOSCENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SOSCENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SOSCENR::_1
            }
        }
        #[doc = "Possible values of the field `SOSCCM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SOSCCMR {
            #[doc = "System OSC Clock Monitor is disabled"]
            _0,
            #[doc = "System OSC Clock Monitor is enabled"]
            _1,
        }
        impl SOSCCMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SOSCCMR::_0 => false,
                    SOSCCMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SOSCCMR {
                match value {
                    false => SOSCCMR::_0,
                    true => SOSCCMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SOSCCMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SOSCCMR::_1
            }
        }
        #[doc = "Possible values of the field `SOSCCMRE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SOSCCMRER {
            #[doc = "Clock Monitor generates interrupt when error detected"]
            _0,
            #[doc = "Clock Monitor generates reset when error detected"]
            _1,
        }
        impl SOSCCMRER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SOSCCMRER::_0 => false,
                    SOSCCMRER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SOSCCMRER {
                match value {
                    false => SOSCCMRER::_0,
                    true => SOSCCMRER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SOSCCMRER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SOSCCMRER::_1
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "This Control Status Register can be written."]
            _0,
            #[doc = "This Control Status Register cannot be written."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `SOSCVLD`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SOSCVLDR {
            #[doc = "System OSC is not enabled or clock is not valid"]
            _0,
            #[doc = "System OSC is enabled and output clock is valid"]
            _1,
        }
        impl SOSCVLDR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SOSCVLDR::_0 => false,
                    SOSCVLDR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SOSCVLDR {
                match value {
                    false => SOSCVLDR::_0,
                    true => SOSCVLDR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SOSCVLDR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SOSCVLDR::_1
            }
        }
        #[doc = "Possible values of the field `SOSCSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SOSCSELR {
            #[doc = "System OSC is not the system clock source"]
            _0,
            #[doc = "System OSC is the system clock source"]
            _1,
        }
        impl SOSCSELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SOSCSELR::_0 => false,
                    SOSCSELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SOSCSELR {
                match value {
                    false => SOSCSELR::_0,
                    true => SOSCSELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SOSCSELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SOSCSELR::_1
            }
        }
        #[doc = "Possible values of the field `SOSCERR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SOSCERRR {
            #[doc = "System OSC Clock Monitor is disabled or has not detected an error"]
            _0,
            #[doc = "System OSC Clock Monitor is enabled and detected an error"]
            _1,
        }
        impl SOSCERRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SOSCERRR::_0 => false,
                    SOSCERRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SOSCERRR {
                match value {
                    false => SOSCERRR::_0,
                    true => SOSCERRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SOSCERRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SOSCERRR::_1
            }
        }
        #[doc = "Values that can be written to the field `SOSCEN`"]
        pub enum SOSCENW {
            #[doc = "System OSC is disabled"]
            _0,
            #[doc = "System OSC is enabled"]
            _1,
        }
        impl SOSCENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SOSCENW::_0 => false,
                    SOSCENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SOSCENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SOSCENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SOSCENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "System OSC is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SOSCENW::_0)
            }
            #[doc = "System OSC is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SOSCENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SOSCCM`"]
        pub enum SOSCCMW {
            #[doc = "System OSC Clock Monitor is disabled"]
            _0,
            #[doc = "System OSC Clock Monitor is enabled"]
            _1,
        }
        impl SOSCCMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SOSCCMW::_0 => false,
                    SOSCCMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SOSCCMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SOSCCMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SOSCCMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "System OSC Clock Monitor is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SOSCCMW::_0)
            }
            #[doc = "System OSC Clock Monitor is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SOSCCMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SOSCCMRE`"]
        pub enum SOSCCMREW {
            #[doc = "Clock Monitor generates interrupt when error detected"]
            _0,
            #[doc = "Clock Monitor generates reset when error detected"]
            _1,
        }
        impl SOSCCMREW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SOSCCMREW::_0 => false,
                    SOSCCMREW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SOSCCMREW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SOSCCMREW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SOSCCMREW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock Monitor generates interrupt when error detected"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SOSCCMREW::_0)
            }
            #[doc = "Clock Monitor generates reset when error detected"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SOSCCMREW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "This Control Status Register can be written."]
            _0,
            #[doc = "This Control Status Register cannot be written."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "This Control Status Register can be written."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "This Control Status Register cannot be written."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 23;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SOSCERR`"]
        pub enum SOSCERRW {
            #[doc = "System OSC Clock Monitor is disabled or has not detected an error"]
            _0,
            #[doc = "System OSC Clock Monitor is enabled and detected an error"]
            _1,
        }
        impl SOSCERRW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SOSCERRW::_0 => false,
                    SOSCERRW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SOSCERRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SOSCERRW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SOSCERRW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "System OSC Clock Monitor is disabled or has not detected an error"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SOSCERRW::_0)
            }
            #[doc = "System OSC Clock Monitor is enabled and detected an error"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SOSCERRW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 26;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - System OSC Enable"]
            #[inline(always)]
            pub fn soscen(&self) -> SOSCENR {
                SOSCENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 16 - System OSC Clock Monitor"]
            #[inline(always)]
            pub fn sosccm(&self) -> SOSCCMR {
                SOSCCMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - System OSC Clock Monitor Reset Enable"]
            #[inline(always)]
            pub fn sosccmre(&self) -> SOSCCMRER {
                SOSCCMRER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 23 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 24 - System OSC Valid"]
            #[inline(always)]
            pub fn soscvld(&self) -> SOSCVLDR {
                SOSCVLDR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 25 - System OSC Selected"]
            #[inline(always)]
            pub fn soscsel(&self) -> SOSCSELR {
                SOSCSELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 25;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 26 - System OSC Clock Error"]
            #[inline(always)]
            pub fn soscerr(&self) -> SOSCERRR {
                SOSCERRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 26;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - System OSC Enable"]
            #[inline(always)]
            pub fn soscen(&mut self) -> _SOSCENW {
                _SOSCENW { w: self }
            }
            #[doc = "Bit 16 - System OSC Clock Monitor"]
            #[inline(always)]
            pub fn sosccm(&mut self) -> _SOSCCMW {
                _SOSCCMW { w: self }
            }
            #[doc = "Bit 17 - System OSC Clock Monitor Reset Enable"]
            #[inline(always)]
            pub fn sosccmre(&mut self) -> _SOSCCMREW {
                _SOSCCMREW { w: self }
            }
            #[doc = "Bit 23 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bit 26 - System OSC Clock Error"]
            #[inline(always)]
            pub fn soscerr(&mut self) -> _SOSCERRW {
                _SOSCERRW { w: self }
            }
        }
    }
    #[doc = "System OSC Divide Register"]
    pub struct SOSCDIV {
        register: VolatileCell<u32>,
    }
    #[doc = "System OSC Divide Register"]
    pub mod soscdiv {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SOSCDIV {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `SOSCDIV1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SOSCDIV1R {
            #[doc = "Output disabled"]
            _000,
            #[doc = "Divide by 1"]
            _001,
            #[doc = "Divide by 2"]
            _010,
            #[doc = "Divide by 4"]
            _011,
            #[doc = "Divide by 8"]
            _100,
            #[doc = "Divide by 16"]
            _101,
            #[doc = "Divide by 32"]
            _110,
            #[doc = "Divide by 64"]
            _111,
        }
        impl SOSCDIV1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SOSCDIV1R::_000 => 0,
                    SOSCDIV1R::_001 => 1,
                    SOSCDIV1R::_010 => 2,
                    SOSCDIV1R::_011 => 3,
                    SOSCDIV1R::_100 => 4,
                    SOSCDIV1R::_101 => 5,
                    SOSCDIV1R::_110 => 6,
                    SOSCDIV1R::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SOSCDIV1R {
                match value {
                    0 => SOSCDIV1R::_000,
                    1 => SOSCDIV1R::_001,
                    2 => SOSCDIV1R::_010,
                    3 => SOSCDIV1R::_011,
                    4 => SOSCDIV1R::_100,
                    5 => SOSCDIV1R::_101,
                    6 => SOSCDIV1R::_110,
                    7 => SOSCDIV1R::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == SOSCDIV1R::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == SOSCDIV1R::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == SOSCDIV1R::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == SOSCDIV1R::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == SOSCDIV1R::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == SOSCDIV1R::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == SOSCDIV1R::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == SOSCDIV1R::_111
            }
        }
        #[doc = "Possible values of the field `SOSCDIV2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SOSCDIV2R {
            #[doc = "Output disabled"]
            _000,
            #[doc = "Divide by 1"]
            _001,
            #[doc = "Divide by 2"]
            _010,
            #[doc = "Divide by 4"]
            _011,
            #[doc = "Divide by 8"]
            _100,
            #[doc = "Divide by 16"]
            _101,
            #[doc = "Divide by 32"]
            _110,
            #[doc = "Divide by 64"]
            _111,
        }
        impl SOSCDIV2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SOSCDIV2R::_000 => 0,
                    SOSCDIV2R::_001 => 1,
                    SOSCDIV2R::_010 => 2,
                    SOSCDIV2R::_011 => 3,
                    SOSCDIV2R::_100 => 4,
                    SOSCDIV2R::_101 => 5,
                    SOSCDIV2R::_110 => 6,
                    SOSCDIV2R::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SOSCDIV2R {
                match value {
                    0 => SOSCDIV2R::_000,
                    1 => SOSCDIV2R::_001,
                    2 => SOSCDIV2R::_010,
                    3 => SOSCDIV2R::_011,
                    4 => SOSCDIV2R::_100,
                    5 => SOSCDIV2R::_101,
                    6 => SOSCDIV2R::_110,
                    7 => SOSCDIV2R::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == SOSCDIV2R::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == SOSCDIV2R::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == SOSCDIV2R::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == SOSCDIV2R::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == SOSCDIV2R::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == SOSCDIV2R::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == SOSCDIV2R::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == SOSCDIV2R::_111
            }
        }
        #[doc = "Values that can be written to the field `SOSCDIV1`"]
        pub enum SOSCDIV1W {
            #[doc = "Output disabled"]
            _000,
            #[doc = "Divide by 1"]
            _001,
            #[doc = "Divide by 2"]
            _010,
            #[doc = "Divide by 4"]
            _011,
            #[doc = "Divide by 8"]
            _100,
            #[doc = "Divide by 16"]
            _101,
            #[doc = "Divide by 32"]
            _110,
            #[doc = "Divide by 64"]
            _111,
        }
        impl SOSCDIV1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SOSCDIV1W::_000 => 0,
                    SOSCDIV1W::_001 => 1,
                    SOSCDIV1W::_010 => 2,
                    SOSCDIV1W::_011 => 3,
                    SOSCDIV1W::_100 => 4,
                    SOSCDIV1W::_101 => 5,
                    SOSCDIV1W::_110 => 6,
                    SOSCDIV1W::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SOSCDIV1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SOSCDIV1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SOSCDIV1W) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Output disabled"]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(SOSCDIV1W::_000)
            }
            #[doc = "Divide by 1"]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(SOSCDIV1W::_001)
            }
            #[doc = "Divide by 2"]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(SOSCDIV1W::_010)
            }
            #[doc = "Divide by 4"]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(SOSCDIV1W::_011)
            }
            #[doc = "Divide by 8"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(SOSCDIV1W::_100)
            }
            #[doc = "Divide by 16"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(SOSCDIV1W::_101)
            }
            #[doc = "Divide by 32"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(SOSCDIV1W::_110)
            }
            #[doc = "Divide by 64"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(SOSCDIV1W::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SOSCDIV2`"]
        pub enum SOSCDIV2W {
            #[doc = "Output disabled"]
            _000,
            #[doc = "Divide by 1"]
            _001,
            #[doc = "Divide by 2"]
            _010,
            #[doc = "Divide by 4"]
            _011,
            #[doc = "Divide by 8"]
            _100,
            #[doc = "Divide by 16"]
            _101,
            #[doc = "Divide by 32"]
            _110,
            #[doc = "Divide by 64"]
            _111,
        }
        impl SOSCDIV2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SOSCDIV2W::_000 => 0,
                    SOSCDIV2W::_001 => 1,
                    SOSCDIV2W::_010 => 2,
                    SOSCDIV2W::_011 => 3,
                    SOSCDIV2W::_100 => 4,
                    SOSCDIV2W::_101 => 5,
                    SOSCDIV2W::_110 => 6,
                    SOSCDIV2W::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SOSCDIV2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SOSCDIV2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SOSCDIV2W) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Output disabled"]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(SOSCDIV2W::_000)
            }
            #[doc = "Divide by 1"]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(SOSCDIV2W::_001)
            }
            #[doc = "Divide by 2"]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(SOSCDIV2W::_010)
            }
            #[doc = "Divide by 4"]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(SOSCDIV2W::_011)
            }
            #[doc = "Divide by 8"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(SOSCDIV2W::_100)
            }
            #[doc = "Divide by 16"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(SOSCDIV2W::_101)
            }
            #[doc = "Divide by 32"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(SOSCDIV2W::_110)
            }
            #[doc = "Divide by 64"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(SOSCDIV2W::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:2 - System OSC Clock Divide 1"]
            #[inline(always)]
            pub fn soscdiv1(&self) -> SOSCDIV1R {
                SOSCDIV1R::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 8:10 - System OSC Clock Divide 2"]
            #[inline(always)]
            pub fn soscdiv2(&self) -> SOSCDIV2R {
                SOSCDIV2R::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:2 - System OSC Clock Divide 1"]
            #[inline(always)]
            pub fn soscdiv1(&mut self) -> _SOSCDIV1W {
                _SOSCDIV1W { w: self }
            }
            #[doc = "Bits 8:10 - System OSC Clock Divide 2"]
            #[inline(always)]
            pub fn soscdiv2(&mut self) -> _SOSCDIV2W {
                _SOSCDIV2W { w: self }
            }
        }
    }
    #[doc = "System Oscillator Configuration Register"]
    pub struct SOSCCFG {
        register: VolatileCell<u32>,
    }
    #[doc = "System Oscillator Configuration Register"]
    pub mod sosccfg {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SOSCCFG {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `EREFS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EREFSR {
            #[doc = "External reference clock selected"]
            _0,
            #[doc = "Internal crystal oscillator of OSC selected."]
            _1,
        }
        impl EREFSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EREFSR::_0 => false,
                    EREFSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EREFSR {
                match value {
                    false => EREFSR::_0,
                    true => EREFSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EREFSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EREFSR::_1
            }
        }
        #[doc = "Possible values of the field `HGO`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HGOR {
            #[doc = "Configure crystal oscillator for low-gain operation"]
            _0,
            #[doc = "Configure crystal oscillator for high-gain operation"]
            _1,
        }
        impl HGOR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HGOR::_0 => false,
                    HGOR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HGOR {
                match value {
                    false => HGOR::_0,
                    true => HGOR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HGOR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HGOR::_1
            }
        }
        #[doc = "Possible values of the field `RANGE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RANGER {
            #[doc = "Low frequency range selected for the crystal oscillator"]
            _01,
            #[doc = "Medium frequency range selected for the crytstal oscillator"]
            _10,
            #[doc = "High frequency range selected for the crystal oscillator"]
            _11,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl RANGER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    RANGER::_01 => 1,
                    RANGER::_10 => 2,
                    RANGER::_11 => 3,
                    RANGER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> RANGER {
                match value {
                    1 => RANGER::_01,
                    2 => RANGER::_10,
                    3 => RANGER::_11,
                    i => RANGER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == RANGER::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == RANGER::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == RANGER::_11
            }
        }
        #[doc = "Values that can be written to the field `EREFS`"]
        pub enum EREFSW {
            #[doc = "External reference clock selected"]
            _0,
            #[doc = "Internal crystal oscillator of OSC selected."]
            _1,
        }
        impl EREFSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EREFSW::_0 => false,
                    EREFSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EREFSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _EREFSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EREFSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "External reference clock selected"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EREFSW::_0)
            }
            #[doc = "Internal crystal oscillator of OSC selected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EREFSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `HGO`"]
        pub enum HGOW {
            #[doc = "Configure crystal oscillator for low-gain operation"]
            _0,
            #[doc = "Configure crystal oscillator for high-gain operation"]
            _1,
        }
        impl HGOW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HGOW::_0 => false,
                    HGOW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HGOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HGOW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HGOW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configure crystal oscillator for low-gain operation"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HGOW::_0)
            }
            #[doc = "Configure crystal oscillator for high-gain operation"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HGOW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RANGE`"]
        pub enum RANGEW {
            #[doc = "Low frequency range selected for the crystal oscillator"]
            _01,
            #[doc = "Medium frequency range selected for the crytstal oscillator"]
            _10,
            #[doc = "High frequency range selected for the crystal oscillator"]
            _11,
        }
        impl RANGEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    RANGEW::_01 => 1,
                    RANGEW::_10 => 2,
                    RANGEW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RANGEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RANGEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RANGEW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Low frequency range selected for the crystal oscillator"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(RANGEW::_01)
            }
            #[doc = "Medium frequency range selected for the crytstal oscillator"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(RANGEW::_10)
            }
            #[doc = "High frequency range selected for the crystal oscillator"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(RANGEW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 2 - External Reference Select"]
            #[inline(always)]
            pub fn erefs(&self) -> EREFSR {
                EREFSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - High Gain Oscillator Select"]
            #[inline(always)]
            pub fn hgo(&self) -> HGOR {
                HGOR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 4:5 - System OSC Range Select"]
            #[inline(always)]
            pub fn range(&self) -> RANGER {
                RANGER::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 16 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 2 - External Reference Select"]
            #[inline(always)]
            pub fn erefs(&mut self) -> _EREFSW {
                _EREFSW { w: self }
            }
            #[doc = "Bit 3 - High Gain Oscillator Select"]
            #[inline(always)]
            pub fn hgo(&mut self) -> _HGOW {
                _HGOW { w: self }
            }
            #[doc = "Bits 4:5 - System OSC Range Select"]
            #[inline(always)]
            pub fn range(&mut self) -> _RANGEW {
                _RANGEW { w: self }
            }
        }
    }
    #[doc = "Slow IRC Control Status Register"]
    pub struct SIRCCSR {
        register: VolatileCell<u32>,
    }
    #[doc = "Slow IRC Control Status Register"]
    pub mod sirccsr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SIRCCSR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `SIRCEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SIRCENR {
            #[doc = "Slow IRC is disabled"]
            _0,
            #[doc = "Slow IRC is enabled"]
            _1,
        }
        impl SIRCENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SIRCENR::_0 => false,
                    SIRCENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SIRCENR {
                match value {
                    false => SIRCENR::_0,
                    true => SIRCENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SIRCENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SIRCENR::_1
            }
        }
        #[doc = "Possible values of the field `SIRCSTEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SIRCSTENR {
            #[doc = "Slow IRC is disabled in supported Stop modes"]
            _0,
            #[doc = "Slow IRC is enabled in supported Stop modes"]
            _1,
        }
        impl SIRCSTENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SIRCSTENR::_0 => false,
                    SIRCSTENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SIRCSTENR {
                match value {
                    false => SIRCSTENR::_0,
                    true => SIRCSTENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SIRCSTENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SIRCSTENR::_1
            }
        }
        #[doc = "Possible values of the field `SIRCLPEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SIRCLPENR {
            #[doc = "Slow IRC is disabled in VLP modes"]
            _0,
            #[doc = "Slow IRC is enabled in VLP modes"]
            _1,
        }
        impl SIRCLPENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SIRCLPENR::_0 => false,
                    SIRCLPENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SIRCLPENR {
                match value {
                    false => SIRCLPENR::_0,
                    true => SIRCLPENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SIRCLPENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SIRCLPENR::_1
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Control Status Register can be written."]
            _0,
            #[doc = "Control Status Register cannot be written."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `SIRCVLD`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SIRCVLDR {
            #[doc = "Slow IRC is not enabled or clock is not valid"]
            _0,
            #[doc = "Slow IRC is enabled and output clock is valid"]
            _1,
        }
        impl SIRCVLDR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SIRCVLDR::_0 => false,
                    SIRCVLDR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SIRCVLDR {
                match value {
                    false => SIRCVLDR::_0,
                    true => SIRCVLDR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SIRCVLDR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SIRCVLDR::_1
            }
        }
        #[doc = "Possible values of the field `SIRCSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SIRCSELR {
            #[doc = "Slow IRC is not the system clock source"]
            _0,
            #[doc = "Slow IRC is the system clock source"]
            _1,
        }
        impl SIRCSELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SIRCSELR::_0 => false,
                    SIRCSELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SIRCSELR {
                match value {
                    false => SIRCSELR::_0,
                    true => SIRCSELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SIRCSELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SIRCSELR::_1
            }
        }
        #[doc = "Values that can be written to the field `SIRCEN`"]
        pub enum SIRCENW {
            #[doc = "Slow IRC is disabled"]
            _0,
            #[doc = "Slow IRC is enabled"]
            _1,
        }
        impl SIRCENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SIRCENW::_0 => false,
                    SIRCENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SIRCENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SIRCENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SIRCENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Slow IRC is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SIRCENW::_0)
            }
            #[doc = "Slow IRC is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SIRCENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SIRCSTEN`"]
        pub enum SIRCSTENW {
            #[doc = "Slow IRC is disabled in supported Stop modes"]
            _0,
            #[doc = "Slow IRC is enabled in supported Stop modes"]
            _1,
        }
        impl SIRCSTENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SIRCSTENW::_0 => false,
                    SIRCSTENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SIRCSTENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SIRCSTENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SIRCSTENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Slow IRC is disabled in supported Stop modes"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SIRCSTENW::_0)
            }
            #[doc = "Slow IRC is enabled in supported Stop modes"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SIRCSTENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SIRCLPEN`"]
        pub enum SIRCLPENW {
            #[doc = "Slow IRC is disabled in VLP modes"]
            _0,
            #[doc = "Slow IRC is enabled in VLP modes"]
            _1,
        }
        impl SIRCLPENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SIRCLPENW::_0 => false,
                    SIRCLPENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SIRCLPENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SIRCLPENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SIRCLPENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Slow IRC is disabled in VLP modes"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SIRCLPENW::_0)
            }
            #[doc = "Slow IRC is enabled in VLP modes"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SIRCLPENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Control Status Register can be written."]
            _0,
            #[doc = "Control Status Register cannot be written."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Control Status Register can be written."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Control Status Register cannot be written."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 23;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Slow IRC Enable"]
            #[inline(always)]
            pub fn sircen(&self) -> SIRCENR {
                SIRCENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Slow IRC Stop Enable"]
            #[inline(always)]
            pub fn sircsten(&self) -> SIRCSTENR {
                SIRCSTENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Slow IRC Low Power Enable"]
            #[inline(always)]
            pub fn sirclpen(&self) -> SIRCLPENR {
                SIRCLPENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 23 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 24 - Slow IRC Valid"]
            #[inline(always)]
            pub fn sircvld(&self) -> SIRCVLDR {
                SIRCVLDR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 25 - Slow IRC Selected"]
            #[inline(always)]
            pub fn sircsel(&self) -> SIRCSELR {
                SIRCSELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 25;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 16777221 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Slow IRC Enable"]
            #[inline(always)]
            pub fn sircen(&mut self) -> _SIRCENW {
                _SIRCENW { w: self }
            }
            #[doc = "Bit 1 - Slow IRC Stop Enable"]
            #[inline(always)]
            pub fn sircsten(&mut self) -> _SIRCSTENW {
                _SIRCSTENW { w: self }
            }
            #[doc = "Bit 2 - Slow IRC Low Power Enable"]
            #[inline(always)]
            pub fn sirclpen(&mut self) -> _SIRCLPENW {
                _SIRCLPENW { w: self }
            }
            #[doc = "Bit 23 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
        }
    }
    #[doc = "Slow IRC Divide Register"]
    pub struct SIRCDIV {
        register: VolatileCell<u32>,
    }
    #[doc = "Slow IRC Divide Register"]
    pub mod sircdiv {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SIRCDIV {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `SIRCDIV1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SIRCDIV1R {
            #[doc = "Output disabled"]
            _000,
            #[doc = "Divide by 1"]
            _001,
            #[doc = "Divide by 2"]
            _010,
            #[doc = "Divide by 4"]
            _011,
            #[doc = "Divide by 8"]
            _100,
            #[doc = "Divide by 16"]
            _101,
            #[doc = "Divide by 32"]
            _110,
            #[doc = "Divide by 64"]
            _111,
        }
        impl SIRCDIV1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SIRCDIV1R::_000 => 0,
                    SIRCDIV1R::_001 => 1,
                    SIRCDIV1R::_010 => 2,
                    SIRCDIV1R::_011 => 3,
                    SIRCDIV1R::_100 => 4,
                    SIRCDIV1R::_101 => 5,
                    SIRCDIV1R::_110 => 6,
                    SIRCDIV1R::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SIRCDIV1R {
                match value {
                    0 => SIRCDIV1R::_000,
                    1 => SIRCDIV1R::_001,
                    2 => SIRCDIV1R::_010,
                    3 => SIRCDIV1R::_011,
                    4 => SIRCDIV1R::_100,
                    5 => SIRCDIV1R::_101,
                    6 => SIRCDIV1R::_110,
                    7 => SIRCDIV1R::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == SIRCDIV1R::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == SIRCDIV1R::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == SIRCDIV1R::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == SIRCDIV1R::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == SIRCDIV1R::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == SIRCDIV1R::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == SIRCDIV1R::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == SIRCDIV1R::_111
            }
        }
        #[doc = "Possible values of the field `SIRCDIV2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SIRCDIV2R {
            #[doc = "Output disabled"]
            _000,
            #[doc = "Divide by 1"]
            _001,
            #[doc = "Divide by 2"]
            _010,
            #[doc = "Divide by 4"]
            _011,
            #[doc = "Divide by 8"]
            _100,
            #[doc = "Divide by 16"]
            _101,
            #[doc = "Divide by 32"]
            _110,
            #[doc = "Divide by 64"]
            _111,
        }
        impl SIRCDIV2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SIRCDIV2R::_000 => 0,
                    SIRCDIV2R::_001 => 1,
                    SIRCDIV2R::_010 => 2,
                    SIRCDIV2R::_011 => 3,
                    SIRCDIV2R::_100 => 4,
                    SIRCDIV2R::_101 => 5,
                    SIRCDIV2R::_110 => 6,
                    SIRCDIV2R::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SIRCDIV2R {
                match value {
                    0 => SIRCDIV2R::_000,
                    1 => SIRCDIV2R::_001,
                    2 => SIRCDIV2R::_010,
                    3 => SIRCDIV2R::_011,
                    4 => SIRCDIV2R::_100,
                    5 => SIRCDIV2R::_101,
                    6 => SIRCDIV2R::_110,
                    7 => SIRCDIV2R::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == SIRCDIV2R::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == SIRCDIV2R::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == SIRCDIV2R::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == SIRCDIV2R::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == SIRCDIV2R::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == SIRCDIV2R::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == SIRCDIV2R::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == SIRCDIV2R::_111
            }
        }
        #[doc = "Values that can be written to the field `SIRCDIV1`"]
        pub enum SIRCDIV1W {
            #[doc = "Output disabled"]
            _000,
            #[doc = "Divide by 1"]
            _001,
            #[doc = "Divide by 2"]
            _010,
            #[doc = "Divide by 4"]
            _011,
            #[doc = "Divide by 8"]
            _100,
            #[doc = "Divide by 16"]
            _101,
            #[doc = "Divide by 32"]
            _110,
            #[doc = "Divide by 64"]
            _111,
        }
        impl SIRCDIV1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SIRCDIV1W::_000 => 0,
                    SIRCDIV1W::_001 => 1,
                    SIRCDIV1W::_010 => 2,
                    SIRCDIV1W::_011 => 3,
                    SIRCDIV1W::_100 => 4,
                    SIRCDIV1W::_101 => 5,
                    SIRCDIV1W::_110 => 6,
                    SIRCDIV1W::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SIRCDIV1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SIRCDIV1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SIRCDIV1W) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Output disabled"]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(SIRCDIV1W::_000)
            }
            #[doc = "Divide by 1"]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(SIRCDIV1W::_001)
            }
            #[doc = "Divide by 2"]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(SIRCDIV1W::_010)
            }
            #[doc = "Divide by 4"]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(SIRCDIV1W::_011)
            }
            #[doc = "Divide by 8"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(SIRCDIV1W::_100)
            }
            #[doc = "Divide by 16"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(SIRCDIV1W::_101)
            }
            #[doc = "Divide by 32"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(SIRCDIV1W::_110)
            }
            #[doc = "Divide by 64"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(SIRCDIV1W::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SIRCDIV2`"]
        pub enum SIRCDIV2W {
            #[doc = "Output disabled"]
            _000,
            #[doc = "Divide by 1"]
            _001,
            #[doc = "Divide by 2"]
            _010,
            #[doc = "Divide by 4"]
            _011,
            #[doc = "Divide by 8"]
            _100,
            #[doc = "Divide by 16"]
            _101,
            #[doc = "Divide by 32"]
            _110,
            #[doc = "Divide by 64"]
            _111,
        }
        impl SIRCDIV2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SIRCDIV2W::_000 => 0,
                    SIRCDIV2W::_001 => 1,
                    SIRCDIV2W::_010 => 2,
                    SIRCDIV2W::_011 => 3,
                    SIRCDIV2W::_100 => 4,
                    SIRCDIV2W::_101 => 5,
                    SIRCDIV2W::_110 => 6,
                    SIRCDIV2W::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SIRCDIV2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SIRCDIV2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SIRCDIV2W) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Output disabled"]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(SIRCDIV2W::_000)
            }
            #[doc = "Divide by 1"]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(SIRCDIV2W::_001)
            }
            #[doc = "Divide by 2"]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(SIRCDIV2W::_010)
            }
            #[doc = "Divide by 4"]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(SIRCDIV2W::_011)
            }
            #[doc = "Divide by 8"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(SIRCDIV2W::_100)
            }
            #[doc = "Divide by 16"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(SIRCDIV2W::_101)
            }
            #[doc = "Divide by 32"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(SIRCDIV2W::_110)
            }
            #[doc = "Divide by 64"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(SIRCDIV2W::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:2 - Slow IRC Clock Divide 1"]
            #[inline(always)]
            pub fn sircdiv1(&self) -> SIRCDIV1R {
                SIRCDIV1R::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 8:10 - Slow IRC Clock Divide 2"]
            #[inline(always)]
            pub fn sircdiv2(&self) -> SIRCDIV2R {
                SIRCDIV2R::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:2 - Slow IRC Clock Divide 1"]
            #[inline(always)]
            pub fn sircdiv1(&mut self) -> _SIRCDIV1W {
                _SIRCDIV1W { w: self }
            }
            #[doc = "Bits 8:10 - Slow IRC Clock Divide 2"]
            #[inline(always)]
            pub fn sircdiv2(&mut self) -> _SIRCDIV2W {
                _SIRCDIV2W { w: self }
            }
        }
    }
    #[doc = "Slow IRC Configuration Register"]
    pub struct SIRCCFG {
        register: VolatileCell<u32>,
    }
    #[doc = "Slow IRC Configuration Register"]
    pub mod sirccfg {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SIRCCFG {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `RANGE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RANGER {
            #[doc = "Slow IRC low range clock (2 MHz)"]
            _0,
            #[doc = "Slow IRC high range clock (8 MHz )"]
            _1,
        }
        impl RANGER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RANGER::_0 => false,
                    RANGER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RANGER {
                match value {
                    false => RANGER::_0,
                    true => RANGER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RANGER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RANGER::_1
            }
        }
        #[doc = "Values that can be written to the field `RANGE`"]
        pub enum RANGEW {
            #[doc = "Slow IRC low range clock (2 MHz)"]
            _0,
            #[doc = "Slow IRC high range clock (8 MHz )"]
            _1,
        }
        impl RANGEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RANGEW::_0 => false,
                    RANGEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RANGEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RANGEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RANGEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Slow IRC low range clock (2 MHz)"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RANGEW::_0)
            }
            #[doc = "Slow IRC high range clock (8 MHz )"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RANGEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Frequency Range"]
            #[inline(always)]
            pub fn range(&self) -> RANGER {
                RANGER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 1 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Frequency Range"]
            #[inline(always)]
            pub fn range(&mut self) -> _RANGEW {
                _RANGEW { w: self }
            }
        }
    }
    #[doc = "Fast IRC Control Status Register"]
    pub struct FIRCCSR {
        register: VolatileCell<u32>,
    }
    #[doc = "Fast IRC Control Status Register"]
    pub mod firccsr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FIRCCSR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `FIRCEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FIRCENR {
            #[doc = "Fast IRC is disabled"]
            _0,
            #[doc = "Fast IRC is enabled"]
            _1,
        }
        impl FIRCENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FIRCENR::_0 => false,
                    FIRCENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FIRCENR {
                match value {
                    false => FIRCENR::_0,
                    true => FIRCENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FIRCENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FIRCENR::_1
            }
        }
        #[doc = "Possible values of the field `FIRCREGOFF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FIRCREGOFFR {
            #[doc = "Fast IRC Regulator is enabled."]
            _0,
            #[doc = "Fast IRC Regulator is disabled."]
            _1,
        }
        impl FIRCREGOFFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FIRCREGOFFR::_0 => false,
                    FIRCREGOFFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FIRCREGOFFR {
                match value {
                    false => FIRCREGOFFR::_0,
                    true => FIRCREGOFFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FIRCREGOFFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FIRCREGOFFR::_1
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Control Status Register can be written."]
            _0,
            #[doc = "Control Status Register cannot be written."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `FIRCVLD`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FIRCVLDR {
            #[doc = "Fast IRC is not enabled or clock is not valid."]
            _0,
            #[doc = "Fast IRC is enabled and output clock is valid. The clock is valid once there is an output clock from the FIRC analog."]
            _1,
        }
        impl FIRCVLDR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FIRCVLDR::_0 => false,
                    FIRCVLDR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FIRCVLDR {
                match value {
                    false => FIRCVLDR::_0,
                    true => FIRCVLDR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FIRCVLDR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FIRCVLDR::_1
            }
        }
        #[doc = "Possible values of the field `FIRCSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FIRCSELR {
            #[doc = "Fast IRC is not the system clock source"]
            _0,
            #[doc = "Fast IRC is the system clock source"]
            _1,
        }
        impl FIRCSELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FIRCSELR::_0 => false,
                    FIRCSELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FIRCSELR {
                match value {
                    false => FIRCSELR::_0,
                    true => FIRCSELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FIRCSELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FIRCSELR::_1
            }
        }
        #[doc = "Possible values of the field `FIRCERR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FIRCERRR {
            #[doc = "Error not detected with the Fast IRC trimming."]
            _0,
            #[doc = "Error detected with the Fast IRC trimming."]
            _1,
        }
        impl FIRCERRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FIRCERRR::_0 => false,
                    FIRCERRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FIRCERRR {
                match value {
                    false => FIRCERRR::_0,
                    true => FIRCERRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FIRCERRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FIRCERRR::_1
            }
        }
        #[doc = "Values that can be written to the field `FIRCEN`"]
        pub enum FIRCENW {
            #[doc = "Fast IRC is disabled"]
            _0,
            #[doc = "Fast IRC is enabled"]
            _1,
        }
        impl FIRCENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FIRCENW::_0 => false,
                    FIRCENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FIRCENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FIRCENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FIRCENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Fast IRC is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FIRCENW::_0)
            }
            #[doc = "Fast IRC is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FIRCENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FIRCREGOFF`"]
        pub enum FIRCREGOFFW {
            #[doc = "Fast IRC Regulator is enabled."]
            _0,
            #[doc = "Fast IRC Regulator is disabled."]
            _1,
        }
        impl FIRCREGOFFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FIRCREGOFFW::_0 => false,
                    FIRCREGOFFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FIRCREGOFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FIRCREGOFFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FIRCREGOFFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Fast IRC Regulator is enabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FIRCREGOFFW::_0)
            }
            #[doc = "Fast IRC Regulator is disabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FIRCREGOFFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Control Status Register can be written."]
            _0,
            #[doc = "Control Status Register cannot be written."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Control Status Register can be written."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Control Status Register cannot be written."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 23;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FIRCERR`"]
        pub enum FIRCERRW {
            #[doc = "Error not detected with the Fast IRC trimming."]
            _0,
            #[doc = "Error detected with the Fast IRC trimming."]
            _1,
        }
        impl FIRCERRW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FIRCERRW::_0 => false,
                    FIRCERRW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FIRCERRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FIRCERRW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FIRCERRW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Error not detected with the Fast IRC trimming."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FIRCERRW::_0)
            }
            #[doc = "Error detected with the Fast IRC trimming."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FIRCERRW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 26;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Fast IRC Enable"]
            #[inline(always)]
            pub fn fircen(&self) -> FIRCENR {
                FIRCENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Fast IRC Regulator Enable"]
            #[inline(always)]
            pub fn fircregoff(&self) -> FIRCREGOFFR {
                FIRCREGOFFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 23 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 24 - Fast IRC Valid status"]
            #[inline(always)]
            pub fn fircvld(&self) -> FIRCVLDR {
                FIRCVLDR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 25 - Fast IRC Selected status"]
            #[inline(always)]
            pub fn fircsel(&self) -> FIRCSELR {
                FIRCSELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 25;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 26 - Fast IRC Clock Error"]
            #[inline(always)]
            pub fn fircerr(&self) -> FIRCERRR {
                FIRCERRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 26;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 50331649 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Fast IRC Enable"]
            #[inline(always)]
            pub fn fircen(&mut self) -> _FIRCENW {
                _FIRCENW { w: self }
            }
            #[doc = "Bit 3 - Fast IRC Regulator Enable"]
            #[inline(always)]
            pub fn fircregoff(&mut self) -> _FIRCREGOFFW {
                _FIRCREGOFFW { w: self }
            }
            #[doc = "Bit 23 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bit 26 - Fast IRC Clock Error"]
            #[inline(always)]
            pub fn fircerr(&mut self) -> _FIRCERRW {
                _FIRCERRW { w: self }
            }
        }
    }
    #[doc = "Fast IRC Divide Register"]
    pub struct FIRCDIV {
        register: VolatileCell<u32>,
    }
    #[doc = "Fast IRC Divide Register"]
    pub mod fircdiv {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FIRCDIV {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `FIRCDIV1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FIRCDIV1R {
            #[doc = "Output disabled"]
            _000,
            #[doc = "Divide by 1"]
            _001,
            #[doc = "Divide by 2"]
            _010,
            #[doc = "Divide by 4"]
            _011,
            #[doc = "Divide by 8"]
            _100,
            #[doc = "Divide by 16"]
            _101,
            #[doc = "Divide by 32"]
            _110,
            #[doc = "Divide by 64"]
            _111,
        }
        impl FIRCDIV1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    FIRCDIV1R::_000 => 0,
                    FIRCDIV1R::_001 => 1,
                    FIRCDIV1R::_010 => 2,
                    FIRCDIV1R::_011 => 3,
                    FIRCDIV1R::_100 => 4,
                    FIRCDIV1R::_101 => 5,
                    FIRCDIV1R::_110 => 6,
                    FIRCDIV1R::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> FIRCDIV1R {
                match value {
                    0 => FIRCDIV1R::_000,
                    1 => FIRCDIV1R::_001,
                    2 => FIRCDIV1R::_010,
                    3 => FIRCDIV1R::_011,
                    4 => FIRCDIV1R::_100,
                    5 => FIRCDIV1R::_101,
                    6 => FIRCDIV1R::_110,
                    7 => FIRCDIV1R::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == FIRCDIV1R::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == FIRCDIV1R::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == FIRCDIV1R::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == FIRCDIV1R::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == FIRCDIV1R::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == FIRCDIV1R::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == FIRCDIV1R::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == FIRCDIV1R::_111
            }
        }
        #[doc = "Possible values of the field `FIRCDIV2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FIRCDIV2R {
            #[doc = "Output disabled"]
            _000,
            #[doc = "Divide by 1"]
            _001,
            #[doc = "Divide by 2"]
            _010,
            #[doc = "Divide by 4"]
            _011,
            #[doc = "Divide by 8"]
            _100,
            #[doc = "Divide by 16"]
            _101,
            #[doc = "Divide by 32"]
            _110,
            #[doc = "Divide by 64"]
            _111,
        }
        impl FIRCDIV2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    FIRCDIV2R::_000 => 0,
                    FIRCDIV2R::_001 => 1,
                    FIRCDIV2R::_010 => 2,
                    FIRCDIV2R::_011 => 3,
                    FIRCDIV2R::_100 => 4,
                    FIRCDIV2R::_101 => 5,
                    FIRCDIV2R::_110 => 6,
                    FIRCDIV2R::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> FIRCDIV2R {
                match value {
                    0 => FIRCDIV2R::_000,
                    1 => FIRCDIV2R::_001,
                    2 => FIRCDIV2R::_010,
                    3 => FIRCDIV2R::_011,
                    4 => FIRCDIV2R::_100,
                    5 => FIRCDIV2R::_101,
                    6 => FIRCDIV2R::_110,
                    7 => FIRCDIV2R::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == FIRCDIV2R::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == FIRCDIV2R::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == FIRCDIV2R::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == FIRCDIV2R::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == FIRCDIV2R::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == FIRCDIV2R::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == FIRCDIV2R::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == FIRCDIV2R::_111
            }
        }
        #[doc = "Values that can be written to the field `FIRCDIV1`"]
        pub enum FIRCDIV1W {
            #[doc = "Output disabled"]
            _000,
            #[doc = "Divide by 1"]
            _001,
            #[doc = "Divide by 2"]
            _010,
            #[doc = "Divide by 4"]
            _011,
            #[doc = "Divide by 8"]
            _100,
            #[doc = "Divide by 16"]
            _101,
            #[doc = "Divide by 32"]
            _110,
            #[doc = "Divide by 64"]
            _111,
        }
        impl FIRCDIV1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    FIRCDIV1W::_000 => 0,
                    FIRCDIV1W::_001 => 1,
                    FIRCDIV1W::_010 => 2,
                    FIRCDIV1W::_011 => 3,
                    FIRCDIV1W::_100 => 4,
                    FIRCDIV1W::_101 => 5,
                    FIRCDIV1W::_110 => 6,
                    FIRCDIV1W::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FIRCDIV1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _FIRCDIV1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FIRCDIV1W) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Output disabled"]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(FIRCDIV1W::_000)
            }
            #[doc = "Divide by 1"]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(FIRCDIV1W::_001)
            }
            #[doc = "Divide by 2"]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(FIRCDIV1W::_010)
            }
            #[doc = "Divide by 4"]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(FIRCDIV1W::_011)
            }
            #[doc = "Divide by 8"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(FIRCDIV1W::_100)
            }
            #[doc = "Divide by 16"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(FIRCDIV1W::_101)
            }
            #[doc = "Divide by 32"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(FIRCDIV1W::_110)
            }
            #[doc = "Divide by 64"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(FIRCDIV1W::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FIRCDIV2`"]
        pub enum FIRCDIV2W {
            #[doc = "Output disabled"]
            _000,
            #[doc = "Divide by 1"]
            _001,
            #[doc = "Divide by 2"]
            _010,
            #[doc = "Divide by 4"]
            _011,
            #[doc = "Divide by 8"]
            _100,
            #[doc = "Divide by 16"]
            _101,
            #[doc = "Divide by 32"]
            _110,
            #[doc = "Divide by 64"]
            _111,
        }
        impl FIRCDIV2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    FIRCDIV2W::_000 => 0,
                    FIRCDIV2W::_001 => 1,
                    FIRCDIV2W::_010 => 2,
                    FIRCDIV2W::_011 => 3,
                    FIRCDIV2W::_100 => 4,
                    FIRCDIV2W::_101 => 5,
                    FIRCDIV2W::_110 => 6,
                    FIRCDIV2W::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FIRCDIV2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _FIRCDIV2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FIRCDIV2W) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Output disabled"]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(FIRCDIV2W::_000)
            }
            #[doc = "Divide by 1"]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(FIRCDIV2W::_001)
            }
            #[doc = "Divide by 2"]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(FIRCDIV2W::_010)
            }
            #[doc = "Divide by 4"]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(FIRCDIV2W::_011)
            }
            #[doc = "Divide by 8"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(FIRCDIV2W::_100)
            }
            #[doc = "Divide by 16"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(FIRCDIV2W::_101)
            }
            #[doc = "Divide by 32"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(FIRCDIV2W::_110)
            }
            #[doc = "Divide by 64"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(FIRCDIV2W::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:2 - Fast IRC Clock Divide 1"]
            #[inline(always)]
            pub fn fircdiv1(&self) -> FIRCDIV1R {
                FIRCDIV1R::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 8:10 - Fast IRC Clock Divide 2"]
            #[inline(always)]
            pub fn fircdiv2(&self) -> FIRCDIV2R {
                FIRCDIV2R::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:2 - Fast IRC Clock Divide 1"]
            #[inline(always)]
            pub fn fircdiv1(&mut self) -> _FIRCDIV1W {
                _FIRCDIV1W { w: self }
            }
            #[doc = "Bits 8:10 - Fast IRC Clock Divide 2"]
            #[inline(always)]
            pub fn fircdiv2(&mut self) -> _FIRCDIV2W {
                _FIRCDIV2W { w: self }
            }
        }
    }
    #[doc = "Fast IRC Configuration Register"]
    pub struct FIRCCFG {
        register: VolatileCell<u32>,
    }
    #[doc = "Fast IRC Configuration Register"]
    pub mod firccfg {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FIRCCFG {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `RANGE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RANGER {
            #[doc = "Fast IRC is trimmed to 48 MHz"]
            _00,
            #[doc = "Fast IRC is trimmed to 52 MHz"]
            _01,
            #[doc = "Fast IRC is trimmed to 56 MHz"]
            _10,
            #[doc = "Fast IRC is trimmed to 60 MHz"]
            _11,
        }
        impl RANGER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    RANGER::_00 => 0,
                    RANGER::_01 => 1,
                    RANGER::_10 => 2,
                    RANGER::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> RANGER {
                match value {
                    0 => RANGER::_00,
                    1 => RANGER::_01,
                    2 => RANGER::_10,
                    3 => RANGER::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == RANGER::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == RANGER::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == RANGER::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == RANGER::_11
            }
        }
        #[doc = "Values that can be written to the field `RANGE`"]
        pub enum RANGEW {
            #[doc = "Fast IRC is trimmed to 48 MHz"]
            _00,
            #[doc = "Fast IRC is trimmed to 52 MHz"]
            _01,
            #[doc = "Fast IRC is trimmed to 56 MHz"]
            _10,
            #[doc = "Fast IRC is trimmed to 60 MHz"]
            _11,
        }
        impl RANGEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    RANGEW::_00 => 0,
                    RANGEW::_01 => 1,
                    RANGEW::_10 => 2,
                    RANGEW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RANGEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RANGEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RANGEW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Fast IRC is trimmed to 48 MHz"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(RANGEW::_00)
            }
            #[doc = "Fast IRC is trimmed to 52 MHz"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(RANGEW::_01)
            }
            #[doc = "Fast IRC is trimmed to 56 MHz"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(RANGEW::_10)
            }
            #[doc = "Fast IRC is trimmed to 60 MHz"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(RANGEW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:1 - Frequency Range"]
            #[inline(always)]
            pub fn range(&self) -> RANGER {
                RANGER::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:1 - Frequency Range"]
            #[inline(always)]
            pub fn range(&mut self) -> _RANGEW {
                _RANGEW { w: self }
            }
        }
    }
    #[doc = "System PLL Control Status Register"]
    pub struct SPLLCSR {
        register: VolatileCell<u32>,
    }
    #[doc = "System PLL Control Status Register"]
    pub mod spllcsr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SPLLCSR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `SPLLEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SPLLENR {
            #[doc = "System PLL is disabled"]
            _0,
            #[doc = "System PLL is enabled"]
            _1,
        }
        impl SPLLENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SPLLENR::_0 => false,
                    SPLLENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SPLLENR {
                match value {
                    false => SPLLENR::_0,
                    true => SPLLENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SPLLENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SPLLENR::_1
            }
        }
        #[doc = "Possible values of the field `SPLLCM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SPLLCMR {
            #[doc = "System PLL Clock Monitor is disabled"]
            _0,
            #[doc = "System PLL Clock Monitor is enabled"]
            _1,
        }
        impl SPLLCMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SPLLCMR::_0 => false,
                    SPLLCMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SPLLCMR {
                match value {
                    false => SPLLCMR::_0,
                    true => SPLLCMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SPLLCMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SPLLCMR::_1
            }
        }
        #[doc = "Possible values of the field `SPLLCMRE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SPLLCMRER {
            #[doc = "Clock Monitor generates interrupt when error detected"]
            _0,
            #[doc = "Clock Monitor generates reset when error detected"]
            _1,
        }
        impl SPLLCMRER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SPLLCMRER::_0 => false,
                    SPLLCMRER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SPLLCMRER {
                match value {
                    false => SPLLCMRER::_0,
                    true => SPLLCMRER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SPLLCMRER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SPLLCMRER::_1
            }
        }
        #[doc = "Possible values of the field `LK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LKR {
            #[doc = "Control Status Register can be written."]
            _0,
            #[doc = "Control Status Register cannot be written."]
            _1,
        }
        impl LKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LKR::_0 => false,
                    LKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LKR {
                match value {
                    false => LKR::_0,
                    true => LKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LKR::_1
            }
        }
        #[doc = "Possible values of the field `SPLLVLD`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SPLLVLDR {
            #[doc = "System PLL is not enabled or clock is not valid"]
            _0,
            #[doc = "System PLL is enabled and output clock is valid"]
            _1,
        }
        impl SPLLVLDR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SPLLVLDR::_0 => false,
                    SPLLVLDR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SPLLVLDR {
                match value {
                    false => SPLLVLDR::_0,
                    true => SPLLVLDR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SPLLVLDR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SPLLVLDR::_1
            }
        }
        #[doc = "Possible values of the field `SPLLSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SPLLSELR {
            #[doc = "System PLL is not the system clock source"]
            _0,
            #[doc = "System PLL is the system clock source"]
            _1,
        }
        impl SPLLSELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SPLLSELR::_0 => false,
                    SPLLSELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SPLLSELR {
                match value {
                    false => SPLLSELR::_0,
                    true => SPLLSELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SPLLSELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SPLLSELR::_1
            }
        }
        #[doc = "Possible values of the field `SPLLERR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SPLLERRR {
            #[doc = "System PLL Clock Monitor is disabled or has not detected an error"]
            _0,
            #[doc = "System PLL Clock Monitor is enabled and detected an error. System PLL Clock Error flag will not set when System OSC is selected as its source and SOSCERR has set."]
            _1,
        }
        impl SPLLERRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SPLLERRR::_0 => false,
                    SPLLERRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SPLLERRR {
                match value {
                    false => SPLLERRR::_0,
                    true => SPLLERRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SPLLERRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SPLLERRR::_1
            }
        }
        #[doc = "Values that can be written to the field `SPLLEN`"]
        pub enum SPLLENW {
            #[doc = "System PLL is disabled"]
            _0,
            #[doc = "System PLL is enabled"]
            _1,
        }
        impl SPLLENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SPLLENW::_0 => false,
                    SPLLENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SPLLENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SPLLENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SPLLENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "System PLL is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SPLLENW::_0)
            }
            #[doc = "System PLL is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SPLLENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SPLLCM`"]
        pub enum SPLLCMW {
            #[doc = "System PLL Clock Monitor is disabled"]
            _0,
            #[doc = "System PLL Clock Monitor is enabled"]
            _1,
        }
        impl SPLLCMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SPLLCMW::_0 => false,
                    SPLLCMW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SPLLCMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SPLLCMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SPLLCMW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "System PLL Clock Monitor is disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SPLLCMW::_0)
            }
            #[doc = "System PLL Clock Monitor is enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SPLLCMW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SPLLCMRE`"]
        pub enum SPLLCMREW {
            #[doc = "Clock Monitor generates interrupt when error detected"]
            _0,
            #[doc = "Clock Monitor generates reset when error detected"]
            _1,
        }
        impl SPLLCMREW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SPLLCMREW::_0 => false,
                    SPLLCMREW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SPLLCMREW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SPLLCMREW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SPLLCMREW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock Monitor generates interrupt when error detected"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SPLLCMREW::_0)
            }
            #[doc = "Clock Monitor generates reset when error detected"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SPLLCMREW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LK`"]
        pub enum LKW {
            #[doc = "Control Status Register can be written."]
            _0,
            #[doc = "Control Status Register cannot be written."]
            _1,
        }
        impl LKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LKW::_0 => false,
                    LKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Control Status Register can be written."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LKW::_0)
            }
            #[doc = "Control Status Register cannot be written."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 23;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SPLLERR`"]
        pub enum SPLLERRW {
            #[doc = "System PLL Clock Monitor is disabled or has not detected an error"]
            _0,
            #[doc = "System PLL Clock Monitor is enabled and detected an error. System PLL Clock Error flag will not set when System OSC is selected as its source and SOSCERR has set."]
            _1,
        }
        impl SPLLERRW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SPLLERRW::_0 => false,
                    SPLLERRW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SPLLERRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SPLLERRW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SPLLERRW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "System PLL Clock Monitor is disabled or has not detected an error"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SPLLERRW::_0)
            }
            #[doc = "System PLL Clock Monitor is enabled and detected an error. System PLL Clock Error flag will not set when System OSC is selected as its source and SOSCERR has set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SPLLERRW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 26;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - System PLL Enable"]
            #[inline(always)]
            pub fn spllen(&self) -> SPLLENR {
                SPLLENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 16 - System PLL Clock Monitor"]
            #[inline(always)]
            pub fn spllcm(&self) -> SPLLCMR {
                SPLLCMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - System PLL Clock Monitor Reset Enable"]
            #[inline(always)]
            pub fn spllcmre(&self) -> SPLLCMRER {
                SPLLCMRER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 23 - Lock Register"]
            #[inline(always)]
            pub fn lk(&self) -> LKR {
                LKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 24 - System PLL Valid"]
            #[inline(always)]
            pub fn spllvld(&self) -> SPLLVLDR {
                SPLLVLDR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 25 - System PLL Selected"]
            #[inline(always)]
            pub fn spllsel(&self) -> SPLLSELR {
                SPLLSELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 25;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 26 - System PLL Clock Error"]
            #[inline(always)]
            pub fn spllerr(&self) -> SPLLERRR {
                SPLLERRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 26;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - System PLL Enable"]
            #[inline(always)]
            pub fn spllen(&mut self) -> _SPLLENW {
                _SPLLENW { w: self }
            }
            #[doc = "Bit 16 - System PLL Clock Monitor"]
            #[inline(always)]
            pub fn spllcm(&mut self) -> _SPLLCMW {
                _SPLLCMW { w: self }
            }
            #[doc = "Bit 17 - System PLL Clock Monitor Reset Enable"]
            #[inline(always)]
            pub fn spllcmre(&mut self) -> _SPLLCMREW {
                _SPLLCMREW { w: self }
            }
            #[doc = "Bit 23 - Lock Register"]
            #[inline(always)]
            pub fn lk(&mut self) -> _LKW {
                _LKW { w: self }
            }
            #[doc = "Bit 26 - System PLL Clock Error"]
            #[inline(always)]
            pub fn spllerr(&mut self) -> _SPLLERRW {
                _SPLLERRW { w: self }
            }
        }
    }
    #[doc = "System PLL Divide Register"]
    pub struct SPLLDIV {
        register: VolatileCell<u32>,
    }
    #[doc = "System PLL Divide Register"]
    pub mod splldiv {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SPLLDIV {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `SPLLDIV1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SPLLDIV1R {
            #[doc = "Clock disabled"]
            _000,
            #[doc = "Divide by 1"]
            _001,
            #[doc = "Divide by 2"]
            _010,
            #[doc = "Divide by 4"]
            _011,
            #[doc = "Divide by 8"]
            _100,
            #[doc = "Divide by 16"]
            _101,
            #[doc = "Divide by 32"]
            _110,
            #[doc = "Divide by 64"]
            _111,
        }
        impl SPLLDIV1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SPLLDIV1R::_000 => 0,
                    SPLLDIV1R::_001 => 1,
                    SPLLDIV1R::_010 => 2,
                    SPLLDIV1R::_011 => 3,
                    SPLLDIV1R::_100 => 4,
                    SPLLDIV1R::_101 => 5,
                    SPLLDIV1R::_110 => 6,
                    SPLLDIV1R::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SPLLDIV1R {
                match value {
                    0 => SPLLDIV1R::_000,
                    1 => SPLLDIV1R::_001,
                    2 => SPLLDIV1R::_010,
                    3 => SPLLDIV1R::_011,
                    4 => SPLLDIV1R::_100,
                    5 => SPLLDIV1R::_101,
                    6 => SPLLDIV1R::_110,
                    7 => SPLLDIV1R::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == SPLLDIV1R::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == SPLLDIV1R::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == SPLLDIV1R::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == SPLLDIV1R::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == SPLLDIV1R::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == SPLLDIV1R::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == SPLLDIV1R::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == SPLLDIV1R::_111
            }
        }
        #[doc = "Possible values of the field `SPLLDIV2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SPLLDIV2R {
            #[doc = "Clock disabled"]
            _000,
            #[doc = "Divide by 1"]
            _001,
            #[doc = "Divide by 2"]
            _010,
            #[doc = "Divide by 4"]
            _011,
            #[doc = "Divide by 8"]
            _100,
            #[doc = "Divide by 16"]
            _101,
            #[doc = "Divide by 32"]
            _110,
            #[doc = "Divide by 64"]
            _111,
        }
        impl SPLLDIV2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SPLLDIV2R::_000 => 0,
                    SPLLDIV2R::_001 => 1,
                    SPLLDIV2R::_010 => 2,
                    SPLLDIV2R::_011 => 3,
                    SPLLDIV2R::_100 => 4,
                    SPLLDIV2R::_101 => 5,
                    SPLLDIV2R::_110 => 6,
                    SPLLDIV2R::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SPLLDIV2R {
                match value {
                    0 => SPLLDIV2R::_000,
                    1 => SPLLDIV2R::_001,
                    2 => SPLLDIV2R::_010,
                    3 => SPLLDIV2R::_011,
                    4 => SPLLDIV2R::_100,
                    5 => SPLLDIV2R::_101,
                    6 => SPLLDIV2R::_110,
                    7 => SPLLDIV2R::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == SPLLDIV2R::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == SPLLDIV2R::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == SPLLDIV2R::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == SPLLDIV2R::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == SPLLDIV2R::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == SPLLDIV2R::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == SPLLDIV2R::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == SPLLDIV2R::_111
            }
        }
        #[doc = "Values that can be written to the field `SPLLDIV1`"]
        pub enum SPLLDIV1W {
            #[doc = "Clock disabled"]
            _000,
            #[doc = "Divide by 1"]
            _001,
            #[doc = "Divide by 2"]
            _010,
            #[doc = "Divide by 4"]
            _011,
            #[doc = "Divide by 8"]
            _100,
            #[doc = "Divide by 16"]
            _101,
            #[doc = "Divide by 32"]
            _110,
            #[doc = "Divide by 64"]
            _111,
        }
        impl SPLLDIV1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SPLLDIV1W::_000 => 0,
                    SPLLDIV1W::_001 => 1,
                    SPLLDIV1W::_010 => 2,
                    SPLLDIV1W::_011 => 3,
                    SPLLDIV1W::_100 => 4,
                    SPLLDIV1W::_101 => 5,
                    SPLLDIV1W::_110 => 6,
                    SPLLDIV1W::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SPLLDIV1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SPLLDIV1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SPLLDIV1W) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Clock disabled"]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(SPLLDIV1W::_000)
            }
            #[doc = "Divide by 1"]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(SPLLDIV1W::_001)
            }
            #[doc = "Divide by 2"]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(SPLLDIV1W::_010)
            }
            #[doc = "Divide by 4"]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(SPLLDIV1W::_011)
            }
            #[doc = "Divide by 8"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(SPLLDIV1W::_100)
            }
            #[doc = "Divide by 16"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(SPLLDIV1W::_101)
            }
            #[doc = "Divide by 32"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(SPLLDIV1W::_110)
            }
            #[doc = "Divide by 64"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(SPLLDIV1W::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SPLLDIV2`"]
        pub enum SPLLDIV2W {
            #[doc = "Clock disabled"]
            _000,
            #[doc = "Divide by 1"]
            _001,
            #[doc = "Divide by 2"]
            _010,
            #[doc = "Divide by 4"]
            _011,
            #[doc = "Divide by 8"]
            _100,
            #[doc = "Divide by 16"]
            _101,
            #[doc = "Divide by 32"]
            _110,
            #[doc = "Divide by 64"]
            _111,
        }
        impl SPLLDIV2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SPLLDIV2W::_000 => 0,
                    SPLLDIV2W::_001 => 1,
                    SPLLDIV2W::_010 => 2,
                    SPLLDIV2W::_011 => 3,
                    SPLLDIV2W::_100 => 4,
                    SPLLDIV2W::_101 => 5,
                    SPLLDIV2W::_110 => 6,
                    SPLLDIV2W::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SPLLDIV2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _SPLLDIV2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SPLLDIV2W) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Clock disabled"]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(SPLLDIV2W::_000)
            }
            #[doc = "Divide by 1"]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(SPLLDIV2W::_001)
            }
            #[doc = "Divide by 2"]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(SPLLDIV2W::_010)
            }
            #[doc = "Divide by 4"]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(SPLLDIV2W::_011)
            }
            #[doc = "Divide by 8"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(SPLLDIV2W::_100)
            }
            #[doc = "Divide by 16"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(SPLLDIV2W::_101)
            }
            #[doc = "Divide by 32"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(SPLLDIV2W::_110)
            }
            #[doc = "Divide by 64"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(SPLLDIV2W::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:2 - System PLL Clock Divide 1"]
            #[inline(always)]
            pub fn splldiv1(&self) -> SPLLDIV1R {
                SPLLDIV1R::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 8:10 - System PLL Clock Divide 2"]
            #[inline(always)]
            pub fn splldiv2(&self) -> SPLLDIV2R {
                SPLLDIV2R::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:2 - System PLL Clock Divide 1"]
            #[inline(always)]
            pub fn splldiv1(&mut self) -> _SPLLDIV1W {
                _SPLLDIV1W { w: self }
            }
            #[doc = "Bits 8:10 - System PLL Clock Divide 2"]
            #[inline(always)]
            pub fn splldiv2(&mut self) -> _SPLLDIV2W {
                _SPLLDIV2W { w: self }
            }
        }
    }
    #[doc = "System PLL Configuration Register"]
    pub struct SPLLCFG {
        register: VolatileCell<u32>,
    }
    #[doc = "System PLL Configuration Register"]
    pub mod spllcfg {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SPLLCFG {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct PREDIVR {
            bits: u8,
        }
        impl PREDIVR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct MULTR {
            bits: u8,
        }
        impl MULTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _PREDIVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PREDIVW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MULTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MULTW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 8:10 - PLL Reference Clock Divider"]
            #[inline(always)]
            pub fn prediv(&self) -> PREDIVR {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                PREDIVR { bits }
            }
            #[doc = "Bits 16:20 - System PLL Multiplier"]
            #[inline(always)]
            pub fn mult(&self) -> MULTR {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                MULTR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 8:10 - PLL Reference Clock Divider"]
            #[inline(always)]
            pub fn prediv(&mut self) -> _PREDIVW {
                _PREDIVW { w: self }
            }
            #[doc = "Bits 16:20 - System PLL Multiplier"]
            #[inline(always)]
            pub fn mult(&mut self) -> _MULTW {
                _MULTW { w: self }
            }
        }
    }
}
#[doc = "System Clock Generator"]
pub struct SCG {
    register_block: scg::RegisterBlock,
}
impl Deref for SCG {
    type Target = scg::RegisterBlock;
    fn deref(&self) -> &scg::RegisterBlock {
        &self.register_block
    }
}
#[doc = "PCC"]
pub const PCC: Peripheral<PCC> = unsafe { Peripheral::new(1074155520) };
#[doc = "PCC"]
pub mod pcc {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - PCC Reserved Register 0"]
        pub pccdummy0: PCCDUMMY0,
        #[doc = "0x04 - PCC Reserved Register 1"]
        pub pccdummy1: PCCDUMMY1,
        #[doc = "0x08 - PCC Reserved Register 2"]
        pub pccdummy2: PCCDUMMY2,
        #[doc = "0x0c - PCC Reserved Register 3"]
        pub pccdummy3: PCCDUMMY3,
        #[doc = "0x10 - PCC Reserved Register 4"]
        pub pccdummy4: PCCDUMMY4,
        #[doc = "0x14 - PCC Reserved Register 5"]
        pub pccdummy5: PCCDUMMY5,
        #[doc = "0x18 - PCC Reserved Register 6"]
        pub pccdummy6: PCCDUMMY6,
        #[doc = "0x1c - PCC Reserved Register 7"]
        pub pccdummy7: PCCDUMMY7,
        #[doc = "0x20 - PCC Reserved Register 8"]
        pub pccdummy8: PCCDUMMY8,
        #[doc = "0x24 - PCC Reserved Register 9"]
        pub pccdummy9: PCCDUMMY9,
        #[doc = "0x28 - PCC Reserved Register 10"]
        pub pccdummy10: PCCDUMMY10,
        #[doc = "0x2c - PCC Reserved Register 11"]
        pub pccdummy11: PCCDUMMY11,
        #[doc = "0x30 - PCC Reserved Register 12"]
        pub pccdummy12: PCCDUMMY12,
        #[doc = "0x34 - PCC Reserved Register 13"]
        pub pccdummy13: PCCDUMMY13,
        #[doc = "0x38 - PCC Reserved Register 14"]
        pub pccdummy14: PCCDUMMY14,
        #[doc = "0x3c - PCC Reserved Register 15"]
        pub pccdummy15: PCCDUMMY15,
        #[doc = "0x40 - PCC Reserved Register 16"]
        pub pccdummy16: PCCDUMMY16,
        #[doc = "0x44 - PCC Reserved Register 17"]
        pub pccdummy17: PCCDUMMY17,
        #[doc = "0x48 - PCC Reserved Register 18"]
        pub pccdummy18: PCCDUMMY18,
        #[doc = "0x4c - PCC Reserved Register 19"]
        pub pccdummy19: PCCDUMMY19,
        #[doc = "0x50 - PCC Reserved Register 20"]
        pub pccdummy20: PCCDUMMY20,
        #[doc = "0x54 - PCC Reserved Register 21"]
        pub pccdummy21: PCCDUMMY21,
        #[doc = "0x58 - PCC Reserved Register 22"]
        pub pccdummy22: PCCDUMMY22,
        #[doc = "0x5c - PCC Reserved Register 23"]
        pub pccdummy23: PCCDUMMY23,
        #[doc = "0x60 - PCC Reserved Register 24"]
        pub pccdummy24: PCCDUMMY24,
        #[doc = "0x64 - PCC Reserved Register 25"]
        pub pccdummy25: PCCDUMMY25,
        #[doc = "0x68 - PCC Reserved Register 26"]
        pub pccdummy26: PCCDUMMY26,
        #[doc = "0x6c - PCC Reserved Register 27"]
        pub pccdummy27: PCCDUMMY27,
        #[doc = "0x70 - PCC Reserved Register 28"]
        pub pccdummy28: PCCDUMMY28,
        #[doc = "0x74 - PCC Reserved Register 29"]
        pub pccdummy29: PCCDUMMY29,
        #[doc = "0x78 - PCC Reserved Register 30"]
        pub pccdummy30: PCCDUMMY30,
        #[doc = "0x7c - PCC Reserved Register 31"]
        pub pccdummy31: PCCDUMMY31,
        #[doc = "0x80 - PCC FTFC Register"]
        pub pcc_ftfc: PCC_FTFC,
        #[doc = "0x84 - PCC DMAMUX Register"]
        pub pcc_dmamux: PCC_DMAMUX,
        #[doc = "0x88 - PCC Reserved Register 34"]
        pub pccdummy34: PCCDUMMY34,
        #[doc = "0x8c - PCC Reserved Register 35"]
        pub pccdummy35: PCCDUMMY35,
        #[doc = "0x90 - PCC FlexCAN0 Register"]
        pub pcc_flex_can0: PCC_FLEXCAN0,
        #[doc = "0x94 - PCC FlexCAN1 Register"]
        pub pcc_flex_can1: PCC_FLEXCAN1,
        #[doc = "0x98 - PCC FTM3 Register"]
        pub pcc_ftm3: PCC_FTM3,
        #[doc = "0x9c - PCC ADC1 Register"]
        pub pcc_adc1: PCC_ADC1,
        #[doc = "0xa0 - PCC Reserved Register 40"]
        pub pccdummy40: PCCDUMMY40,
        #[doc = "0xa4 - PCC Reserved Register 41"]
        pub pccdummy41: PCCDUMMY41,
        #[doc = "0xa8 - PCC Reserved Register 42"]
        pub pccdummy42: PCCDUMMY42,
        #[doc = "0xac - PCC FlexCAN2 Register"]
        pub pcc_flex_can2: PCC_FLEXCAN2,
        #[doc = "0xb0 - PCC LPSPI0 Register"]
        pub pcc_lpspi0: PCC_LPSPI0,
        #[doc = "0xb4 - PCC LPSPI1 Register"]
        pub pcc_lpspi1: PCC_LPSPI1,
        #[doc = "0xb8 - PCC LPSPI2 Register"]
        pub pcc_lpspi2: PCC_LPSPI2,
        #[doc = "0xbc - PCC Reserved Register 47"]
        pub pccdummy47: PCCDUMMY47,
        #[doc = "0xc0 - PCC Reserved Register 48"]
        pub pccdummy48: PCCDUMMY48,
        #[doc = "0xc4 - PCC PDB1 Register"]
        pub pcc_pdb1: PCC_PDB1,
        #[doc = "0xc8 - PCC CRC Register"]
        pub pcc_crc: PCC_CRC,
        #[doc = "0xcc - PCC Reserved Register 51"]
        pub pccdummy51: PCCDUMMY51,
        #[doc = "0xd0 - PCC Reserved Register 52"]
        pub pccdummy52: PCCDUMMY52,
        #[doc = "0xd4 - PCC Reserved Register 53"]
        pub pccdummy53: PCCDUMMY53,
        #[doc = "0xd8 - PCC PDB0 Register"]
        pub pcc_pdb0: PCC_PDB0,
        #[doc = "0xdc - PCC LPIT Register"]
        pub pcc_lpit: PCC_LPIT,
        #[doc = "0xe0 - PCC FTM0 Register"]
        pub pcc_ftm0: PCC_FTM0,
        #[doc = "0xe4 - PCC FTM1 Register"]
        pub pcc_ftm1: PCC_FTM1,
        #[doc = "0xe8 - PCC FTM2 Register"]
        pub pcc_ftm2: PCC_FTM2,
        #[doc = "0xec - PCC ADC0 Register"]
        pub pcc_adc0: PCC_ADC0,
        #[doc = "0xf0 - PCC Reserved Register 60"]
        pub pccdummy60: PCCDUMMY60,
        #[doc = "0xf4 - PCC RTC Register"]
        pub pcc_rtc: PCC_RTC,
        #[doc = "0xf8 - PCC Reserved Register 62"]
        pub pccdummy62: PCCDUMMY62,
        #[doc = "0xfc - PCC Reserved Register 63"]
        pub pccdummy63: PCCDUMMY63,
        #[doc = "0x100 - PCC LPTMR0 Register"]
        pub pcc_lptmr0: PCC_LPTMR0,
        #[doc = "0x104 - PCC Reserved Register 65"]
        pub pccdummy65: PCCDUMMY65,
        #[doc = "0x108 - PCC Reserved Register 66"]
        pub pccdummy66: PCCDUMMY66,
        #[doc = "0x10c - PCC Reserved Register 67"]
        pub pccdummy67: PCCDUMMY67,
        #[doc = "0x110 - PCC Reserved Register 68"]
        pub pccdummy68: PCCDUMMY68,
        #[doc = "0x114 - PCC Reserved Register 69"]
        pub pccdummy69: PCCDUMMY69,
        #[doc = "0x118 - PCC Reserved Register 70"]
        pub pccdummy70: PCCDUMMY70,
        #[doc = "0x11c - PCC Reserved Register 71"]
        pub pccdummy71: PCCDUMMY71,
        #[doc = "0x120 - PCC Reserved Register 72"]
        pub pccdummy72: PCCDUMMY72,
        #[doc = "0x124 - PCC PORTA Register"]
        pub pcc_porta: PCC_PORTA,
        #[doc = "0x128 - PCC PORTB Register"]
        pub pcc_portb: PCC_PORTB,
        #[doc = "0x12c - PCC PORTC Register"]
        pub pcc_portc: PCC_PORTC,
        #[doc = "0x130 - PCC PORTD Register"]
        pub pcc_portd: PCC_PORTD,
        #[doc = "0x134 - PCC PORTE Register"]
        pub pcc_porte: PCC_PORTE,
        #[doc = "0x138 - PCC Reserved Register 78"]
        pub pccdummy78: PCCDUMMY78,
        #[doc = "0x13c - PCC Reserved Register 79"]
        pub pccdummy79: PCCDUMMY79,
        #[doc = "0x140 - PCC Reserved Register 80"]
        pub pccdummy80: PCCDUMMY80,
        #[doc = "0x144 - PCC Reserved Register 81"]
        pub pccdummy81: PCCDUMMY81,
        #[doc = "0x148 - PCC Reserved Register 82"]
        pub pccdummy82: PCCDUMMY82,
        #[doc = "0x14c - PCC Reserved Register 83"]
        pub pccdummy83: PCCDUMMY83,
        #[doc = "0x150 - PCC Reserved Register 84"]
        pub pccdummy84: PCCDUMMY84,
        #[doc = "0x154 - PCC Reserved Register 85"]
        pub pccdummy85: PCCDUMMY85,
        #[doc = "0x158 - PCC Reserved Register 86"]
        pub pccdummy86: PCCDUMMY86,
        #[doc = "0x15c - PCC Reserved Register 87"]
        pub pccdummy87: PCCDUMMY87,
        #[doc = "0x160 - PCC Reserved Register 88"]
        pub pccdummy88: PCCDUMMY88,
        #[doc = "0x164 - PCC Reserved Register 89"]
        pub pccdummy89: PCCDUMMY89,
        #[doc = "0x168 - PCC FlexIO Register"]
        pub pcc_flexio: PCC_FLEXIO,
        #[doc = "0x16c - PCC Reserved Register 91"]
        pub pccdummy91: PCCDUMMY91,
        #[doc = "0x170 - PCC Reserved Register 92"]
        pub pccdummy92: PCCDUMMY92,
        #[doc = "0x174 - PCC Reserved Register 93"]
        pub pccdummy93: PCCDUMMY93,
        #[doc = "0x178 - PCC Reserved Register 94"]
        pub pccdummy94: PCCDUMMY94,
        #[doc = "0x17c - PCC Reserved Register 95"]
        pub pccdummy95: PCCDUMMY95,
        #[doc = "0x180 - PCC Reserved Register 96"]
        pub pccdummy96: PCCDUMMY96,
        #[doc = "0x184 - PCC EWM Register"]
        pub pcc_ewm: PCC_EWM,
        #[doc = "0x188 - PCC Reserved Register 98"]
        pub pccdummy98: PCCDUMMY98,
        #[doc = "0x18c - PCC Reserved Register 99"]
        pub pccdummy99: PCCDUMMY99,
        #[doc = "0x190 - PCC Reserved Register 100"]
        pub pccdummy100: PCCDUMMY100,
        #[doc = "0x194 - PCC Reserved Register 101"]
        pub pccdummy101: PCCDUMMY101,
        #[doc = "0x198 - PCC LPI2C0 Register"]
        pub pcc_lpi2c0: PCC_LPI2C0,
        #[doc = "0x19c - PCC Reserved Register 103"]
        pub pccdummy103: PCCDUMMY103,
        #[doc = "0x1a0 - PCC Reserved Register 104"]
        pub pccdummy104: PCCDUMMY104,
        #[doc = "0x1a4 - PCC Reserved Register 105"]
        pub pccdummy105: PCCDUMMY105,
        #[doc = "0x1a8 - PCC LPUART0 Register"]
        pub pcc_lpuart0: PCC_LPUART0,
        #[doc = "0x1ac - PCC LPUART1 Register"]
        pub pcc_lpuart1: PCC_LPUART1,
        #[doc = "0x1b0 - PCC LPUART2 Register"]
        pub pcc_lpuart2: PCC_LPUART2,
        #[doc = "0x1b4 - PCC Reserved Register 109"]
        pub pccdummy109: PCCDUMMY109,
        #[doc = "0x1b8 - PCC Reserved Register 110"]
        pub pccdummy110: PCCDUMMY110,
        #[doc = "0x1bc - PCC Reserved Register 111"]
        pub pccdummy111: PCCDUMMY111,
        #[doc = "0x1c0 - PCC Reserved Register 112"]
        pub pccdummy112: PCCDUMMY112,
        #[doc = "0x1c4 - PCC Reserved Register 113"]
        pub pccdummy113: PCCDUMMY113,
        #[doc = "0x1c8 - PCC Reserved Register 114"]
        pub pccdummy114: PCCDUMMY114,
        #[doc = "0x1cc - PCC CMP0 Register"]
        pub pcc_cmp0: PCC_CMP0,
    }
    #[doc = "PCC Reserved Register 0"]
    pub struct PCCDUMMY0 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 0"]
    pub mod pccdummy0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 1"]
    pub struct PCCDUMMY1 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 1"]
    pub mod pccdummy1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 2"]
    pub struct PCCDUMMY2 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 2"]
    pub mod pccdummy2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 3"]
    pub struct PCCDUMMY3 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 3"]
    pub mod pccdummy3 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY3 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 4"]
    pub struct PCCDUMMY4 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 4"]
    pub mod pccdummy4 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY4 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 5"]
    pub struct PCCDUMMY5 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 5"]
    pub mod pccdummy5 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY5 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 6"]
    pub struct PCCDUMMY6 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 6"]
    pub mod pccdummy6 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY6 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 7"]
    pub struct PCCDUMMY7 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 7"]
    pub mod pccdummy7 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY7 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 8"]
    pub struct PCCDUMMY8 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 8"]
    pub mod pccdummy8 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY8 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 9"]
    pub struct PCCDUMMY9 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 9"]
    pub mod pccdummy9 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY9 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 10"]
    pub struct PCCDUMMY10 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 10"]
    pub mod pccdummy10 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY10 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 11"]
    pub struct PCCDUMMY11 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 11"]
    pub mod pccdummy11 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY11 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 12"]
    pub struct PCCDUMMY12 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 12"]
    pub mod pccdummy12 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY12 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 13"]
    pub struct PCCDUMMY13 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 13"]
    pub mod pccdummy13 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY13 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 14"]
    pub struct PCCDUMMY14 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 14"]
    pub mod pccdummy14 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY14 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 15"]
    pub struct PCCDUMMY15 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 15"]
    pub mod pccdummy15 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY15 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 16"]
    pub struct PCCDUMMY16 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 16"]
    pub mod pccdummy16 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY16 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 17"]
    pub struct PCCDUMMY17 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 17"]
    pub mod pccdummy17 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY17 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 18"]
    pub struct PCCDUMMY18 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 18"]
    pub mod pccdummy18 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY18 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 19"]
    pub struct PCCDUMMY19 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 19"]
    pub mod pccdummy19 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY19 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 20"]
    pub struct PCCDUMMY20 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 20"]
    pub mod pccdummy20 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY20 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 21"]
    pub struct PCCDUMMY21 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 21"]
    pub mod pccdummy21 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY21 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 22"]
    pub struct PCCDUMMY22 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 22"]
    pub mod pccdummy22 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY22 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 23"]
    pub struct PCCDUMMY23 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 23"]
    pub mod pccdummy23 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY23 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 24"]
    pub struct PCCDUMMY24 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 24"]
    pub mod pccdummy24 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY24 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 25"]
    pub struct PCCDUMMY25 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 25"]
    pub mod pccdummy25 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY25 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 26"]
    pub struct PCCDUMMY26 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 26"]
    pub mod pccdummy26 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY26 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 27"]
    pub struct PCCDUMMY27 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 27"]
    pub mod pccdummy27 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY27 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 28"]
    pub struct PCCDUMMY28 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 28"]
    pub mod pccdummy28 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY28 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 29"]
    pub struct PCCDUMMY29 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 29"]
    pub mod pccdummy29 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY29 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 30"]
    pub struct PCCDUMMY30 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 30"]
    pub mod pccdummy30 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY30 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 31"]
    pub struct PCCDUMMY31 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 31"]
    pub mod pccdummy31 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY31 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC FTFC Register"]
    pub struct PCC_FTFC {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC FTFC Register"]
    pub mod pcc_ftfc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCC_FTFC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CGC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CGCR {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CGCR::_0 => false,
                    CGCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CGCR {
                match value {
                    false => CGCR::_0,
                    true => CGCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CGCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CGCR::_1
            }
        }
        #[doc = "Possible values of the field `PR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PRR {
            #[doc = "Peripheral is not present."]
            _0,
            #[doc = "Peripheral is present."]
            _1,
        }
        impl PRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PRR::_0 => false,
                    PRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PRR {
                match value {
                    false => PRR::_0,
                    true => PRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PRR::_1
            }
        }
        #[doc = "Values that can be written to the field `CGC`"]
        pub enum CGCW {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CGCW::_0 => false,
                    CGCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CGCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CGCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CGCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CGCW::_0)
            }
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CGCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&self) -> CGCR {
                CGCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Present"]
            #[inline(always)]
            pub fn pr(&self) -> PRR {
                PRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 3221225472 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&mut self) -> _CGCW {
                _CGCW { w: self }
            }
        }
    }
    #[doc = "PCC DMAMUX Register"]
    pub struct PCC_DMAMUX {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC DMAMUX Register"]
    pub mod pcc_dmamux {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCC_DMAMUX {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CGC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CGCR {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CGCR::_0 => false,
                    CGCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CGCR {
                match value {
                    false => CGCR::_0,
                    true => CGCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CGCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CGCR::_1
            }
        }
        #[doc = "Possible values of the field `PR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PRR {
            #[doc = "Peripheral is not present."]
            _0,
            #[doc = "Peripheral is present."]
            _1,
        }
        impl PRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PRR::_0 => false,
                    PRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PRR {
                match value {
                    false => PRR::_0,
                    true => PRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PRR::_1
            }
        }
        #[doc = "Values that can be written to the field `CGC`"]
        pub enum CGCW {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CGCW::_0 => false,
                    CGCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CGCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CGCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CGCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CGCW::_0)
            }
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CGCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&self) -> CGCR {
                CGCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Present"]
            #[inline(always)]
            pub fn pr(&self) -> PRR {
                PRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 2147483648 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&mut self) -> _CGCW {
                _CGCW { w: self }
            }
        }
    }
    #[doc = "PCC Reserved Register 34"]
    pub struct PCCDUMMY34 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 34"]
    pub mod pccdummy34 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY34 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 35"]
    pub struct PCCDUMMY35 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 35"]
    pub mod pccdummy35 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY35 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC FlexCAN0 Register"]
    pub struct PCC_FLEXCAN0 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC FlexCAN0 Register"]
    pub mod pcc_flex_can0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCC_FLEXCAN0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CGC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CGCR {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CGCR::_0 => false,
                    CGCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CGCR {
                match value {
                    false => CGCR::_0,
                    true => CGCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CGCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CGCR::_1
            }
        }
        #[doc = "Possible values of the field `PR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PRR {
            #[doc = "Peripheral is not present."]
            _0,
            #[doc = "Peripheral is present."]
            _1,
        }
        impl PRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PRR::_0 => false,
                    PRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PRR {
                match value {
                    false => PRR::_0,
                    true => PRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PRR::_1
            }
        }
        #[doc = "Values that can be written to the field `CGC`"]
        pub enum CGCW {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CGCW::_0 => false,
                    CGCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CGCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CGCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CGCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CGCW::_0)
            }
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CGCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&self) -> CGCR {
                CGCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Present"]
            #[inline(always)]
            pub fn pr(&self) -> PRR {
                PRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 2147483648 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&mut self) -> _CGCW {
                _CGCW { w: self }
            }
        }
    }
    #[doc = "PCC FlexCAN1 Register"]
    pub struct PCC_FLEXCAN1 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC FlexCAN1 Register"]
    pub mod pcc_flex_can1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCC_FLEXCAN1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CGC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CGCR {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CGCR::_0 => false,
                    CGCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CGCR {
                match value {
                    false => CGCR::_0,
                    true => CGCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CGCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CGCR::_1
            }
        }
        #[doc = "Possible values of the field `PR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PRR {
            #[doc = "Peripheral is not present."]
            _0,
            #[doc = "Peripheral is present."]
            _1,
        }
        impl PRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PRR::_0 => false,
                    PRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PRR {
                match value {
                    false => PRR::_0,
                    true => PRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PRR::_1
            }
        }
        #[doc = "Values that can be written to the field `CGC`"]
        pub enum CGCW {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CGCW::_0 => false,
                    CGCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CGCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CGCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CGCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CGCW::_0)
            }
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CGCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&self) -> CGCR {
                CGCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Present"]
            #[inline(always)]
            pub fn pr(&self) -> PRR {
                PRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 2147483648 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&mut self) -> _CGCW {
                _CGCW { w: self }
            }
        }
    }
    #[doc = "PCC FTM3 Register"]
    pub struct PCC_FTM3 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC FTM3 Register"]
    pub mod pcc_ftm3 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCC_FTM3 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PCS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PCSR {
            #[doc = "Clock is off. An external clock can be enabled for this peripheral."]
            _000,
            #[doc = "Clock option 1"]
            _001,
            #[doc = "Clock option 2"]
            _010,
            #[doc = "Clock option 3"]
            _011,
            #[doc = "Clock option 4"]
            _100,
            #[doc = "Clock option 5"]
            _101,
            #[doc = "Clock option 6"]
            _110,
            #[doc = "Clock option 7"]
            _111,
        }
        impl PCSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PCSR::_000 => 0,
                    PCSR::_001 => 1,
                    PCSR::_010 => 2,
                    PCSR::_011 => 3,
                    PCSR::_100 => 4,
                    PCSR::_101 => 5,
                    PCSR::_110 => 6,
                    PCSR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PCSR {
                match value {
                    0 => PCSR::_000,
                    1 => PCSR::_001,
                    2 => PCSR::_010,
                    3 => PCSR::_011,
                    4 => PCSR::_100,
                    5 => PCSR::_101,
                    6 => PCSR::_110,
                    7 => PCSR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == PCSR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == PCSR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == PCSR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == PCSR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == PCSR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == PCSR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == PCSR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == PCSR::_111
            }
        }
        #[doc = "Possible values of the field `CGC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CGCR {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CGCR::_0 => false,
                    CGCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CGCR {
                match value {
                    false => CGCR::_0,
                    true => CGCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CGCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CGCR::_1
            }
        }
        #[doc = "Possible values of the field `PR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PRR {
            #[doc = "Peripheral is not present."]
            _0,
            #[doc = "Peripheral is present."]
            _1,
        }
        impl PRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PRR::_0 => false,
                    PRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PRR {
                match value {
                    false => PRR::_0,
                    true => PRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PRR::_1
            }
        }
        #[doc = "Values that can be written to the field `PCS`"]
        pub enum PCSW {
            #[doc = "Clock is off. An external clock can be enabled for this peripheral."]
            _000,
            #[doc = "Clock option 1"]
            _001,
            #[doc = "Clock option 2"]
            _010,
            #[doc = "Clock option 3"]
            _011,
            #[doc = "Clock option 4"]
            _100,
            #[doc = "Clock option 5"]
            _101,
            #[doc = "Clock option 6"]
            _110,
            #[doc = "Clock option 7"]
            _111,
        }
        impl PCSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PCSW::_000 => 0,
                    PCSW::_001 => 1,
                    PCSW::_010 => 2,
                    PCSW::_011 => 3,
                    PCSW::_100 => 4,
                    PCSW::_101 => 5,
                    PCSW::_110 => 6,
                    PCSW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PCSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PCSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PCSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Clock is off. An external clock can be enabled for this peripheral."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(PCSW::_000)
            }
            #[doc = "Clock option 1"]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(PCSW::_001)
            }
            #[doc = "Clock option 2"]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(PCSW::_010)
            }
            #[doc = "Clock option 3"]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(PCSW::_011)
            }
            #[doc = "Clock option 4"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(PCSW::_100)
            }
            #[doc = "Clock option 5"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(PCSW::_101)
            }
            #[doc = "Clock option 6"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(PCSW::_110)
            }
            #[doc = "Clock option 7"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(PCSW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CGC`"]
        pub enum CGCW {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CGCW::_0 => false,
                    CGCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CGCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CGCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CGCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CGCW::_0)
            }
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CGCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 24:26 - Peripheral Clock Source Select"]
            #[inline(always)]
            pub fn pcs(&self) -> PCSR {
                PCSR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&self) -> CGCR {
                CGCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Present"]
            #[inline(always)]
            pub fn pr(&self) -> PRR {
                PRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 2147483648 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 24:26 - Peripheral Clock Source Select"]
            #[inline(always)]
            pub fn pcs(&mut self) -> _PCSW {
                _PCSW { w: self }
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&mut self) -> _CGCW {
                _CGCW { w: self }
            }
        }
    }
    #[doc = "PCC ADC1 Register"]
    pub struct PCC_ADC1 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC ADC1 Register"]
    pub mod pcc_adc1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCC_ADC1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PCS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PCSR {
            #[doc = "Clock is off."]
            _000,
            #[doc = "Clock option 1"]
            _001,
            #[doc = "Clock option 2"]
            _010,
            #[doc = "Clock option 3"]
            _011,
            #[doc = "Clock option 4"]
            _100,
            #[doc = "Clock option 5"]
            _101,
            #[doc = "Clock option 6"]
            _110,
            #[doc = "Clock option 7"]
            _111,
        }
        impl PCSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PCSR::_000 => 0,
                    PCSR::_001 => 1,
                    PCSR::_010 => 2,
                    PCSR::_011 => 3,
                    PCSR::_100 => 4,
                    PCSR::_101 => 5,
                    PCSR::_110 => 6,
                    PCSR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PCSR {
                match value {
                    0 => PCSR::_000,
                    1 => PCSR::_001,
                    2 => PCSR::_010,
                    3 => PCSR::_011,
                    4 => PCSR::_100,
                    5 => PCSR::_101,
                    6 => PCSR::_110,
                    7 => PCSR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == PCSR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == PCSR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == PCSR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == PCSR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == PCSR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == PCSR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == PCSR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == PCSR::_111
            }
        }
        #[doc = "Possible values of the field `CGC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CGCR {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CGCR::_0 => false,
                    CGCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CGCR {
                match value {
                    false => CGCR::_0,
                    true => CGCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CGCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CGCR::_1
            }
        }
        #[doc = "Possible values of the field `PR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PRR {
            #[doc = "Peripheral is not present."]
            _0,
            #[doc = "Peripheral is present."]
            _1,
        }
        impl PRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PRR::_0 => false,
                    PRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PRR {
                match value {
                    false => PRR::_0,
                    true => PRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PRR::_1
            }
        }
        #[doc = "Values that can be written to the field `PCS`"]
        pub enum PCSW {
            #[doc = "Clock is off."]
            _000,
            #[doc = "Clock option 1"]
            _001,
            #[doc = "Clock option 2"]
            _010,
            #[doc = "Clock option 3"]
            _011,
            #[doc = "Clock option 4"]
            _100,
            #[doc = "Clock option 5"]
            _101,
            #[doc = "Clock option 6"]
            _110,
            #[doc = "Clock option 7"]
            _111,
        }
        impl PCSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PCSW::_000 => 0,
                    PCSW::_001 => 1,
                    PCSW::_010 => 2,
                    PCSW::_011 => 3,
                    PCSW::_100 => 4,
                    PCSW::_101 => 5,
                    PCSW::_110 => 6,
                    PCSW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PCSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PCSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PCSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Clock is off."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(PCSW::_000)
            }
            #[doc = "Clock option 1"]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(PCSW::_001)
            }
            #[doc = "Clock option 2"]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(PCSW::_010)
            }
            #[doc = "Clock option 3"]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(PCSW::_011)
            }
            #[doc = "Clock option 4"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(PCSW::_100)
            }
            #[doc = "Clock option 5"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(PCSW::_101)
            }
            #[doc = "Clock option 6"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(PCSW::_110)
            }
            #[doc = "Clock option 7"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(PCSW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CGC`"]
        pub enum CGCW {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CGCW::_0 => false,
                    CGCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CGCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CGCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CGCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CGCW::_0)
            }
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CGCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 24:26 - Peripheral Clock Source Select"]
            #[inline(always)]
            pub fn pcs(&self) -> PCSR {
                PCSR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&self) -> CGCR {
                CGCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Present"]
            #[inline(always)]
            pub fn pr(&self) -> PRR {
                PRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 2147483648 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 24:26 - Peripheral Clock Source Select"]
            #[inline(always)]
            pub fn pcs(&mut self) -> _PCSW {
                _PCSW { w: self }
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&mut self) -> _CGCW {
                _CGCW { w: self }
            }
        }
    }
    #[doc = "PCC Reserved Register 40"]
    pub struct PCCDUMMY40 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 40"]
    pub mod pccdummy40 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY40 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 41"]
    pub struct PCCDUMMY41 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 41"]
    pub mod pccdummy41 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY41 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 42"]
    pub struct PCCDUMMY42 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 42"]
    pub mod pccdummy42 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY42 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC FlexCAN2 Register"]
    pub struct PCC_FLEXCAN2 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC FlexCAN2 Register"]
    pub mod pcc_flex_can2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCC_FLEXCAN2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CGC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CGCR {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CGCR::_0 => false,
                    CGCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CGCR {
                match value {
                    false => CGCR::_0,
                    true => CGCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CGCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CGCR::_1
            }
        }
        #[doc = "Possible values of the field `PR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PRR {
            #[doc = "Peripheral is not present."]
            _0,
            #[doc = "Peripheral is present."]
            _1,
        }
        impl PRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PRR::_0 => false,
                    PRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PRR {
                match value {
                    false => PRR::_0,
                    true => PRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PRR::_1
            }
        }
        #[doc = "Values that can be written to the field `CGC`"]
        pub enum CGCW {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CGCW::_0 => false,
                    CGCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CGCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CGCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CGCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CGCW::_0)
            }
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CGCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&self) -> CGCR {
                CGCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Present"]
            #[inline(always)]
            pub fn pr(&self) -> PRR {
                PRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 2147483648 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&mut self) -> _CGCW {
                _CGCW { w: self }
            }
        }
    }
    #[doc = "PCC LPSPI0 Register"]
    pub struct PCC_LPSPI0 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC LPSPI0 Register"]
    pub mod pcc_lpspi0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCC_LPSPI0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PCS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PCSR {
            #[doc = "Clock is off."]
            _000,
            #[doc = "Clock option 1"]
            _001,
            #[doc = "Clock option 2"]
            _010,
            #[doc = "Clock option 3"]
            _011,
            #[doc = "Clock option 4"]
            _100,
            #[doc = "Clock option 5"]
            _101,
            #[doc = "Clock option 6"]
            _110,
            #[doc = "Clock option 7"]
            _111,
        }
        impl PCSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PCSR::_000 => 0,
                    PCSR::_001 => 1,
                    PCSR::_010 => 2,
                    PCSR::_011 => 3,
                    PCSR::_100 => 4,
                    PCSR::_101 => 5,
                    PCSR::_110 => 6,
                    PCSR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PCSR {
                match value {
                    0 => PCSR::_000,
                    1 => PCSR::_001,
                    2 => PCSR::_010,
                    3 => PCSR::_011,
                    4 => PCSR::_100,
                    5 => PCSR::_101,
                    6 => PCSR::_110,
                    7 => PCSR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == PCSR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == PCSR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == PCSR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == PCSR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == PCSR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == PCSR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == PCSR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == PCSR::_111
            }
        }
        #[doc = "Possible values of the field `CGC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CGCR {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CGCR::_0 => false,
                    CGCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CGCR {
                match value {
                    false => CGCR::_0,
                    true => CGCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CGCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CGCR::_1
            }
        }
        #[doc = "Possible values of the field `PR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PRR {
            #[doc = "Peripheral is not present."]
            _0,
            #[doc = "Peripheral is present."]
            _1,
        }
        impl PRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PRR::_0 => false,
                    PRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PRR {
                match value {
                    false => PRR::_0,
                    true => PRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PRR::_1
            }
        }
        #[doc = "Values that can be written to the field `PCS`"]
        pub enum PCSW {
            #[doc = "Clock is off."]
            _000,
            #[doc = "Clock option 1"]
            _001,
            #[doc = "Clock option 2"]
            _010,
            #[doc = "Clock option 3"]
            _011,
            #[doc = "Clock option 4"]
            _100,
            #[doc = "Clock option 5"]
            _101,
            #[doc = "Clock option 6"]
            _110,
            #[doc = "Clock option 7"]
            _111,
        }
        impl PCSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PCSW::_000 => 0,
                    PCSW::_001 => 1,
                    PCSW::_010 => 2,
                    PCSW::_011 => 3,
                    PCSW::_100 => 4,
                    PCSW::_101 => 5,
                    PCSW::_110 => 6,
                    PCSW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PCSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PCSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PCSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Clock is off."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(PCSW::_000)
            }
            #[doc = "Clock option 1"]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(PCSW::_001)
            }
            #[doc = "Clock option 2"]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(PCSW::_010)
            }
            #[doc = "Clock option 3"]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(PCSW::_011)
            }
            #[doc = "Clock option 4"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(PCSW::_100)
            }
            #[doc = "Clock option 5"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(PCSW::_101)
            }
            #[doc = "Clock option 6"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(PCSW::_110)
            }
            #[doc = "Clock option 7"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(PCSW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CGC`"]
        pub enum CGCW {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CGCW::_0 => false,
                    CGCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CGCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CGCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CGCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CGCW::_0)
            }
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CGCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 24:26 - Peripheral Clock Source Select"]
            #[inline(always)]
            pub fn pcs(&self) -> PCSR {
                PCSR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&self) -> CGCR {
                CGCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Present"]
            #[inline(always)]
            pub fn pr(&self) -> PRR {
                PRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 2147483648 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 24:26 - Peripheral Clock Source Select"]
            #[inline(always)]
            pub fn pcs(&mut self) -> _PCSW {
                _PCSW { w: self }
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&mut self) -> _CGCW {
                _CGCW { w: self }
            }
        }
    }
    #[doc = "PCC LPSPI1 Register"]
    pub struct PCC_LPSPI1 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC LPSPI1 Register"]
    pub mod pcc_lpspi1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCC_LPSPI1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PCS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PCSR {
            #[doc = "Clock is off."]
            _000,
            #[doc = "Clock option 1"]
            _001,
            #[doc = "Clock option 2"]
            _010,
            #[doc = "Clock option 3"]
            _011,
            #[doc = "Clock option 4"]
            _100,
            #[doc = "Clock option 5"]
            _101,
            #[doc = "Clock option 6"]
            _110,
            #[doc = "Clock option 7"]
            _111,
        }
        impl PCSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PCSR::_000 => 0,
                    PCSR::_001 => 1,
                    PCSR::_010 => 2,
                    PCSR::_011 => 3,
                    PCSR::_100 => 4,
                    PCSR::_101 => 5,
                    PCSR::_110 => 6,
                    PCSR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PCSR {
                match value {
                    0 => PCSR::_000,
                    1 => PCSR::_001,
                    2 => PCSR::_010,
                    3 => PCSR::_011,
                    4 => PCSR::_100,
                    5 => PCSR::_101,
                    6 => PCSR::_110,
                    7 => PCSR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == PCSR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == PCSR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == PCSR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == PCSR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == PCSR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == PCSR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == PCSR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == PCSR::_111
            }
        }
        #[doc = "Possible values of the field `CGC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CGCR {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CGCR::_0 => false,
                    CGCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CGCR {
                match value {
                    false => CGCR::_0,
                    true => CGCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CGCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CGCR::_1
            }
        }
        #[doc = "Possible values of the field `PR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PRR {
            #[doc = "Peripheral is not present."]
            _0,
            #[doc = "Peripheral is present."]
            _1,
        }
        impl PRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PRR::_0 => false,
                    PRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PRR {
                match value {
                    false => PRR::_0,
                    true => PRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PRR::_1
            }
        }
        #[doc = "Values that can be written to the field `PCS`"]
        pub enum PCSW {
            #[doc = "Clock is off."]
            _000,
            #[doc = "Clock option 1"]
            _001,
            #[doc = "Clock option 2"]
            _010,
            #[doc = "Clock option 3"]
            _011,
            #[doc = "Clock option 4"]
            _100,
            #[doc = "Clock option 5"]
            _101,
            #[doc = "Clock option 6"]
            _110,
            #[doc = "Clock option 7"]
            _111,
        }
        impl PCSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PCSW::_000 => 0,
                    PCSW::_001 => 1,
                    PCSW::_010 => 2,
                    PCSW::_011 => 3,
                    PCSW::_100 => 4,
                    PCSW::_101 => 5,
                    PCSW::_110 => 6,
                    PCSW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PCSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PCSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PCSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Clock is off."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(PCSW::_000)
            }
            #[doc = "Clock option 1"]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(PCSW::_001)
            }
            #[doc = "Clock option 2"]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(PCSW::_010)
            }
            #[doc = "Clock option 3"]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(PCSW::_011)
            }
            #[doc = "Clock option 4"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(PCSW::_100)
            }
            #[doc = "Clock option 5"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(PCSW::_101)
            }
            #[doc = "Clock option 6"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(PCSW::_110)
            }
            #[doc = "Clock option 7"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(PCSW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CGC`"]
        pub enum CGCW {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CGCW::_0 => false,
                    CGCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CGCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CGCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CGCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CGCW::_0)
            }
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CGCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 24:26 - Peripheral Clock Source Select"]
            #[inline(always)]
            pub fn pcs(&self) -> PCSR {
                PCSR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&self) -> CGCR {
                CGCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Present"]
            #[inline(always)]
            pub fn pr(&self) -> PRR {
                PRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 2147483648 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 24:26 - Peripheral Clock Source Select"]
            #[inline(always)]
            pub fn pcs(&mut self) -> _PCSW {
                _PCSW { w: self }
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&mut self) -> _CGCW {
                _CGCW { w: self }
            }
        }
    }
    #[doc = "PCC LPSPI2 Register"]
    pub struct PCC_LPSPI2 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC LPSPI2 Register"]
    pub mod pcc_lpspi2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCC_LPSPI2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PCS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PCSR {
            #[doc = "Clock is off."]
            _000,
            #[doc = "Clock option 1"]
            _001,
            #[doc = "Clock option 2"]
            _010,
            #[doc = "Clock option 3"]
            _011,
            #[doc = "Clock option 4"]
            _100,
            #[doc = "Clock option 5"]
            _101,
            #[doc = "Clock option 6"]
            _110,
            #[doc = "Clock option 7"]
            _111,
        }
        impl PCSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PCSR::_000 => 0,
                    PCSR::_001 => 1,
                    PCSR::_010 => 2,
                    PCSR::_011 => 3,
                    PCSR::_100 => 4,
                    PCSR::_101 => 5,
                    PCSR::_110 => 6,
                    PCSR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PCSR {
                match value {
                    0 => PCSR::_000,
                    1 => PCSR::_001,
                    2 => PCSR::_010,
                    3 => PCSR::_011,
                    4 => PCSR::_100,
                    5 => PCSR::_101,
                    6 => PCSR::_110,
                    7 => PCSR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == PCSR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == PCSR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == PCSR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == PCSR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == PCSR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == PCSR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == PCSR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == PCSR::_111
            }
        }
        #[doc = "Possible values of the field `CGC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CGCR {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CGCR::_0 => false,
                    CGCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CGCR {
                match value {
                    false => CGCR::_0,
                    true => CGCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CGCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CGCR::_1
            }
        }
        #[doc = "Possible values of the field `PR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PRR {
            #[doc = "Peripheral is not present."]
            _0,
            #[doc = "Peripheral is present."]
            _1,
        }
        impl PRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PRR::_0 => false,
                    PRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PRR {
                match value {
                    false => PRR::_0,
                    true => PRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PRR::_1
            }
        }
        #[doc = "Values that can be written to the field `PCS`"]
        pub enum PCSW {
            #[doc = "Clock is off."]
            _000,
            #[doc = "Clock option 1"]
            _001,
            #[doc = "Clock option 2"]
            _010,
            #[doc = "Clock option 3"]
            _011,
            #[doc = "Clock option 4"]
            _100,
            #[doc = "Clock option 5"]
            _101,
            #[doc = "Clock option 6"]
            _110,
            #[doc = "Clock option 7"]
            _111,
        }
        impl PCSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PCSW::_000 => 0,
                    PCSW::_001 => 1,
                    PCSW::_010 => 2,
                    PCSW::_011 => 3,
                    PCSW::_100 => 4,
                    PCSW::_101 => 5,
                    PCSW::_110 => 6,
                    PCSW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PCSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PCSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PCSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Clock is off."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(PCSW::_000)
            }
            #[doc = "Clock option 1"]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(PCSW::_001)
            }
            #[doc = "Clock option 2"]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(PCSW::_010)
            }
            #[doc = "Clock option 3"]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(PCSW::_011)
            }
            #[doc = "Clock option 4"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(PCSW::_100)
            }
            #[doc = "Clock option 5"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(PCSW::_101)
            }
            #[doc = "Clock option 6"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(PCSW::_110)
            }
            #[doc = "Clock option 7"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(PCSW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CGC`"]
        pub enum CGCW {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CGCW::_0 => false,
                    CGCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CGCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CGCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CGCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CGCW::_0)
            }
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CGCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 24:26 - Peripheral Clock Source Select"]
            #[inline(always)]
            pub fn pcs(&self) -> PCSR {
                PCSR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&self) -> CGCR {
                CGCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Present"]
            #[inline(always)]
            pub fn pr(&self) -> PRR {
                PRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 2147483648 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 24:26 - Peripheral Clock Source Select"]
            #[inline(always)]
            pub fn pcs(&mut self) -> _PCSW {
                _PCSW { w: self }
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&mut self) -> _CGCW {
                _CGCW { w: self }
            }
        }
    }
    #[doc = "PCC Reserved Register 47"]
    pub struct PCCDUMMY47 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 47"]
    pub mod pccdummy47 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY47 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 48"]
    pub struct PCCDUMMY48 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 48"]
    pub mod pccdummy48 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY48 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC PDB1 Register"]
    pub struct PCC_PDB1 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC PDB1 Register"]
    pub mod pcc_pdb1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCC_PDB1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CGC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CGCR {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CGCR::_0 => false,
                    CGCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CGCR {
                match value {
                    false => CGCR::_0,
                    true => CGCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CGCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CGCR::_1
            }
        }
        #[doc = "Possible values of the field `PR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PRR {
            #[doc = "Peripheral is not present."]
            _0,
            #[doc = "Peripheral is present."]
            _1,
        }
        impl PRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PRR::_0 => false,
                    PRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PRR {
                match value {
                    false => PRR::_0,
                    true => PRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PRR::_1
            }
        }
        #[doc = "Values that can be written to the field `CGC`"]
        pub enum CGCW {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CGCW::_0 => false,
                    CGCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CGCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CGCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CGCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CGCW::_0)
            }
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CGCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&self) -> CGCR {
                CGCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Present"]
            #[inline(always)]
            pub fn pr(&self) -> PRR {
                PRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 2147483648 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&mut self) -> _CGCW {
                _CGCW { w: self }
            }
        }
    }
    #[doc = "PCC CRC Register"]
    pub struct PCC_CRC {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC CRC Register"]
    pub mod pcc_crc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCC_CRC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CGC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CGCR {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CGCR::_0 => false,
                    CGCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CGCR {
                match value {
                    false => CGCR::_0,
                    true => CGCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CGCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CGCR::_1
            }
        }
        #[doc = "Possible values of the field `PR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PRR {
            #[doc = "Peripheral is not present."]
            _0,
            #[doc = "Peripheral is present."]
            _1,
        }
        impl PRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PRR::_0 => false,
                    PRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PRR {
                match value {
                    false => PRR::_0,
                    true => PRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PRR::_1
            }
        }
        #[doc = "Values that can be written to the field `CGC`"]
        pub enum CGCW {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CGCW::_0 => false,
                    CGCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CGCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CGCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CGCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CGCW::_0)
            }
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CGCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&self) -> CGCR {
                CGCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Present"]
            #[inline(always)]
            pub fn pr(&self) -> PRR {
                PRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 2147483648 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&mut self) -> _CGCW {
                _CGCW { w: self }
            }
        }
    }
    #[doc = "PCC Reserved Register 51"]
    pub struct PCCDUMMY51 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 51"]
    pub mod pccdummy51 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY51 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 52"]
    pub struct PCCDUMMY52 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 52"]
    pub mod pccdummy52 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY52 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 53"]
    pub struct PCCDUMMY53 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 53"]
    pub mod pccdummy53 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY53 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC PDB0 Register"]
    pub struct PCC_PDB0 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC PDB0 Register"]
    pub mod pcc_pdb0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCC_PDB0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CGC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CGCR {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CGCR::_0 => false,
                    CGCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CGCR {
                match value {
                    false => CGCR::_0,
                    true => CGCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CGCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CGCR::_1
            }
        }
        #[doc = "Possible values of the field `PR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PRR {
            #[doc = "Peripheral is not present."]
            _0,
            #[doc = "Peripheral is present."]
            _1,
        }
        impl PRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PRR::_0 => false,
                    PRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PRR {
                match value {
                    false => PRR::_0,
                    true => PRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PRR::_1
            }
        }
        #[doc = "Values that can be written to the field `CGC`"]
        pub enum CGCW {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CGCW::_0 => false,
                    CGCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CGCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CGCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CGCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CGCW::_0)
            }
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CGCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&self) -> CGCR {
                CGCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Present"]
            #[inline(always)]
            pub fn pr(&self) -> PRR {
                PRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 2147483648 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&mut self) -> _CGCW {
                _CGCW { w: self }
            }
        }
    }
    #[doc = "PCC LPIT Register"]
    pub struct PCC_LPIT {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC LPIT Register"]
    pub mod pcc_lpit {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCC_LPIT {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PCS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PCSR {
            #[doc = "Clock is off."]
            _000,
            #[doc = "Clock option 1"]
            _001,
            #[doc = "Clock option 2"]
            _010,
            #[doc = "Clock option 3"]
            _011,
            #[doc = "Clock option 4"]
            _100,
            #[doc = "Clock option 5"]
            _101,
            #[doc = "Clock option 6"]
            _110,
            #[doc = "Clock option 7"]
            _111,
        }
        impl PCSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PCSR::_000 => 0,
                    PCSR::_001 => 1,
                    PCSR::_010 => 2,
                    PCSR::_011 => 3,
                    PCSR::_100 => 4,
                    PCSR::_101 => 5,
                    PCSR::_110 => 6,
                    PCSR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PCSR {
                match value {
                    0 => PCSR::_000,
                    1 => PCSR::_001,
                    2 => PCSR::_010,
                    3 => PCSR::_011,
                    4 => PCSR::_100,
                    5 => PCSR::_101,
                    6 => PCSR::_110,
                    7 => PCSR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == PCSR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == PCSR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == PCSR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == PCSR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == PCSR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == PCSR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == PCSR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == PCSR::_111
            }
        }
        #[doc = "Possible values of the field `CGC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CGCR {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CGCR::_0 => false,
                    CGCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CGCR {
                match value {
                    false => CGCR::_0,
                    true => CGCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CGCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CGCR::_1
            }
        }
        #[doc = "Possible values of the field `PR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PRR {
            #[doc = "Peripheral is not present."]
            _0,
            #[doc = "Peripheral is present."]
            _1,
        }
        impl PRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PRR::_0 => false,
                    PRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PRR {
                match value {
                    false => PRR::_0,
                    true => PRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PRR::_1
            }
        }
        #[doc = "Values that can be written to the field `PCS`"]
        pub enum PCSW {
            #[doc = "Clock is off."]
            _000,
            #[doc = "Clock option 1"]
            _001,
            #[doc = "Clock option 2"]
            _010,
            #[doc = "Clock option 3"]
            _011,
            #[doc = "Clock option 4"]
            _100,
            #[doc = "Clock option 5"]
            _101,
            #[doc = "Clock option 6"]
            _110,
            #[doc = "Clock option 7"]
            _111,
        }
        impl PCSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PCSW::_000 => 0,
                    PCSW::_001 => 1,
                    PCSW::_010 => 2,
                    PCSW::_011 => 3,
                    PCSW::_100 => 4,
                    PCSW::_101 => 5,
                    PCSW::_110 => 6,
                    PCSW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PCSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PCSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PCSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Clock is off."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(PCSW::_000)
            }
            #[doc = "Clock option 1"]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(PCSW::_001)
            }
            #[doc = "Clock option 2"]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(PCSW::_010)
            }
            #[doc = "Clock option 3"]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(PCSW::_011)
            }
            #[doc = "Clock option 4"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(PCSW::_100)
            }
            #[doc = "Clock option 5"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(PCSW::_101)
            }
            #[doc = "Clock option 6"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(PCSW::_110)
            }
            #[doc = "Clock option 7"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(PCSW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CGC`"]
        pub enum CGCW {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CGCW::_0 => false,
                    CGCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CGCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CGCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CGCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CGCW::_0)
            }
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CGCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 24:26 - Peripheral Clock Source Select"]
            #[inline(always)]
            pub fn pcs(&self) -> PCSR {
                PCSR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&self) -> CGCR {
                CGCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Present"]
            #[inline(always)]
            pub fn pr(&self) -> PRR {
                PRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 2147483648 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 24:26 - Peripheral Clock Source Select"]
            #[inline(always)]
            pub fn pcs(&mut self) -> _PCSW {
                _PCSW { w: self }
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&mut self) -> _CGCW {
                _CGCW { w: self }
            }
        }
    }
    #[doc = "PCC FTM0 Register"]
    pub struct PCC_FTM0 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC FTM0 Register"]
    pub mod pcc_ftm0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCC_FTM0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PCS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PCSR {
            #[doc = "Clock is off. An external clock can be enabled for this peripheral."]
            _000,
            #[doc = "Clock option 1"]
            _001,
            #[doc = "Clock option 2"]
            _010,
            #[doc = "Clock option 3"]
            _011,
            #[doc = "Clock option 4"]
            _100,
            #[doc = "Clock option 5"]
            _101,
            #[doc = "Clock option 6"]
            _110,
            #[doc = "Clock option 7"]
            _111,
        }
        impl PCSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PCSR::_000 => 0,
                    PCSR::_001 => 1,
                    PCSR::_010 => 2,
                    PCSR::_011 => 3,
                    PCSR::_100 => 4,
                    PCSR::_101 => 5,
                    PCSR::_110 => 6,
                    PCSR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PCSR {
                match value {
                    0 => PCSR::_000,
                    1 => PCSR::_001,
                    2 => PCSR::_010,
                    3 => PCSR::_011,
                    4 => PCSR::_100,
                    5 => PCSR::_101,
                    6 => PCSR::_110,
                    7 => PCSR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == PCSR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == PCSR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == PCSR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == PCSR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == PCSR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == PCSR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == PCSR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == PCSR::_111
            }
        }
        #[doc = "Possible values of the field `CGC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CGCR {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CGCR::_0 => false,
                    CGCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CGCR {
                match value {
                    false => CGCR::_0,
                    true => CGCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CGCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CGCR::_1
            }
        }
        #[doc = "Possible values of the field `PR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PRR {
            #[doc = "Peripheral is not present."]
            _0,
            #[doc = "Peripheral is present."]
            _1,
        }
        impl PRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PRR::_0 => false,
                    PRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PRR {
                match value {
                    false => PRR::_0,
                    true => PRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PRR::_1
            }
        }
        #[doc = "Values that can be written to the field `PCS`"]
        pub enum PCSW {
            #[doc = "Clock is off. An external clock can be enabled for this peripheral."]
            _000,
            #[doc = "Clock option 1"]
            _001,
            #[doc = "Clock option 2"]
            _010,
            #[doc = "Clock option 3"]
            _011,
            #[doc = "Clock option 4"]
            _100,
            #[doc = "Clock option 5"]
            _101,
            #[doc = "Clock option 6"]
            _110,
            #[doc = "Clock option 7"]
            _111,
        }
        impl PCSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PCSW::_000 => 0,
                    PCSW::_001 => 1,
                    PCSW::_010 => 2,
                    PCSW::_011 => 3,
                    PCSW::_100 => 4,
                    PCSW::_101 => 5,
                    PCSW::_110 => 6,
                    PCSW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PCSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PCSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PCSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Clock is off. An external clock can be enabled for this peripheral."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(PCSW::_000)
            }
            #[doc = "Clock option 1"]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(PCSW::_001)
            }
            #[doc = "Clock option 2"]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(PCSW::_010)
            }
            #[doc = "Clock option 3"]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(PCSW::_011)
            }
            #[doc = "Clock option 4"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(PCSW::_100)
            }
            #[doc = "Clock option 5"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(PCSW::_101)
            }
            #[doc = "Clock option 6"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(PCSW::_110)
            }
            #[doc = "Clock option 7"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(PCSW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CGC`"]
        pub enum CGCW {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CGCW::_0 => false,
                    CGCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CGCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CGCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CGCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CGCW::_0)
            }
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CGCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 24:26 - Peripheral Clock Source Select"]
            #[inline(always)]
            pub fn pcs(&self) -> PCSR {
                PCSR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&self) -> CGCR {
                CGCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Present"]
            #[inline(always)]
            pub fn pr(&self) -> PRR {
                PRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 2147483648 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 24:26 - Peripheral Clock Source Select"]
            #[inline(always)]
            pub fn pcs(&mut self) -> _PCSW {
                _PCSW { w: self }
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&mut self) -> _CGCW {
                _CGCW { w: self }
            }
        }
    }
    #[doc = "PCC FTM1 Register"]
    pub struct PCC_FTM1 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC FTM1 Register"]
    pub mod pcc_ftm1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCC_FTM1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PCS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PCSR {
            #[doc = "Clock is off. An external clock can be enabled for this peripheral."]
            _000,
            #[doc = "Clock option 1"]
            _001,
            #[doc = "Clock option 2"]
            _010,
            #[doc = "Clock option 3"]
            _011,
            #[doc = "Clock option 4"]
            _100,
            #[doc = "Clock option 5"]
            _101,
            #[doc = "Clock option 6"]
            _110,
            #[doc = "Clock option 7"]
            _111,
        }
        impl PCSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PCSR::_000 => 0,
                    PCSR::_001 => 1,
                    PCSR::_010 => 2,
                    PCSR::_011 => 3,
                    PCSR::_100 => 4,
                    PCSR::_101 => 5,
                    PCSR::_110 => 6,
                    PCSR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PCSR {
                match value {
                    0 => PCSR::_000,
                    1 => PCSR::_001,
                    2 => PCSR::_010,
                    3 => PCSR::_011,
                    4 => PCSR::_100,
                    5 => PCSR::_101,
                    6 => PCSR::_110,
                    7 => PCSR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == PCSR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == PCSR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == PCSR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == PCSR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == PCSR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == PCSR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == PCSR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == PCSR::_111
            }
        }
        #[doc = "Possible values of the field `CGC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CGCR {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CGCR::_0 => false,
                    CGCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CGCR {
                match value {
                    false => CGCR::_0,
                    true => CGCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CGCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CGCR::_1
            }
        }
        #[doc = "Possible values of the field `PR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PRR {
            #[doc = "Peripheral is not present."]
            _0,
            #[doc = "Peripheral is present."]
            _1,
        }
        impl PRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PRR::_0 => false,
                    PRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PRR {
                match value {
                    false => PRR::_0,
                    true => PRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PRR::_1
            }
        }
        #[doc = "Values that can be written to the field `PCS`"]
        pub enum PCSW {
            #[doc = "Clock is off. An external clock can be enabled for this peripheral."]
            _000,
            #[doc = "Clock option 1"]
            _001,
            #[doc = "Clock option 2"]
            _010,
            #[doc = "Clock option 3"]
            _011,
            #[doc = "Clock option 4"]
            _100,
            #[doc = "Clock option 5"]
            _101,
            #[doc = "Clock option 6"]
            _110,
            #[doc = "Clock option 7"]
            _111,
        }
        impl PCSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PCSW::_000 => 0,
                    PCSW::_001 => 1,
                    PCSW::_010 => 2,
                    PCSW::_011 => 3,
                    PCSW::_100 => 4,
                    PCSW::_101 => 5,
                    PCSW::_110 => 6,
                    PCSW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PCSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PCSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PCSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Clock is off. An external clock can be enabled for this peripheral."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(PCSW::_000)
            }
            #[doc = "Clock option 1"]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(PCSW::_001)
            }
            #[doc = "Clock option 2"]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(PCSW::_010)
            }
            #[doc = "Clock option 3"]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(PCSW::_011)
            }
            #[doc = "Clock option 4"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(PCSW::_100)
            }
            #[doc = "Clock option 5"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(PCSW::_101)
            }
            #[doc = "Clock option 6"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(PCSW::_110)
            }
            #[doc = "Clock option 7"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(PCSW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CGC`"]
        pub enum CGCW {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CGCW::_0 => false,
                    CGCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CGCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CGCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CGCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CGCW::_0)
            }
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CGCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 24:26 - Peripheral Clock Source Select"]
            #[inline(always)]
            pub fn pcs(&self) -> PCSR {
                PCSR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&self) -> CGCR {
                CGCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Present"]
            #[inline(always)]
            pub fn pr(&self) -> PRR {
                PRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 2147483648 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 24:26 - Peripheral Clock Source Select"]
            #[inline(always)]
            pub fn pcs(&mut self) -> _PCSW {
                _PCSW { w: self }
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&mut self) -> _CGCW {
                _CGCW { w: self }
            }
        }
    }
    #[doc = "PCC FTM2 Register"]
    pub struct PCC_FTM2 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC FTM2 Register"]
    pub mod pcc_ftm2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCC_FTM2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PCS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PCSR {
            #[doc = "Clock is off. An external clock can be enabled for this peripheral."]
            _000,
            #[doc = "Clock option 1"]
            _001,
            #[doc = "Clock option 2"]
            _010,
            #[doc = "Clock option 3"]
            _011,
            #[doc = "Clock option 4"]
            _100,
            #[doc = "Clock option 5"]
            _101,
            #[doc = "Clock option 6"]
            _110,
            #[doc = "Clock option 7"]
            _111,
        }
        impl PCSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PCSR::_000 => 0,
                    PCSR::_001 => 1,
                    PCSR::_010 => 2,
                    PCSR::_011 => 3,
                    PCSR::_100 => 4,
                    PCSR::_101 => 5,
                    PCSR::_110 => 6,
                    PCSR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PCSR {
                match value {
                    0 => PCSR::_000,
                    1 => PCSR::_001,
                    2 => PCSR::_010,
                    3 => PCSR::_011,
                    4 => PCSR::_100,
                    5 => PCSR::_101,
                    6 => PCSR::_110,
                    7 => PCSR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == PCSR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == PCSR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == PCSR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == PCSR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == PCSR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == PCSR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == PCSR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == PCSR::_111
            }
        }
        #[doc = "Possible values of the field `CGC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CGCR {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CGCR::_0 => false,
                    CGCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CGCR {
                match value {
                    false => CGCR::_0,
                    true => CGCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CGCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CGCR::_1
            }
        }
        #[doc = "Possible values of the field `PR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PRR {
            #[doc = "Peripheral is not present."]
            _0,
            #[doc = "Peripheral is present."]
            _1,
        }
        impl PRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PRR::_0 => false,
                    PRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PRR {
                match value {
                    false => PRR::_0,
                    true => PRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PRR::_1
            }
        }
        #[doc = "Values that can be written to the field `PCS`"]
        pub enum PCSW {
            #[doc = "Clock is off. An external clock can be enabled for this peripheral."]
            _000,
            #[doc = "Clock option 1"]
            _001,
            #[doc = "Clock option 2"]
            _010,
            #[doc = "Clock option 3"]
            _011,
            #[doc = "Clock option 4"]
            _100,
            #[doc = "Clock option 5"]
            _101,
            #[doc = "Clock option 6"]
            _110,
            #[doc = "Clock option 7"]
            _111,
        }
        impl PCSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PCSW::_000 => 0,
                    PCSW::_001 => 1,
                    PCSW::_010 => 2,
                    PCSW::_011 => 3,
                    PCSW::_100 => 4,
                    PCSW::_101 => 5,
                    PCSW::_110 => 6,
                    PCSW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PCSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PCSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PCSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Clock is off. An external clock can be enabled for this peripheral."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(PCSW::_000)
            }
            #[doc = "Clock option 1"]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(PCSW::_001)
            }
            #[doc = "Clock option 2"]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(PCSW::_010)
            }
            #[doc = "Clock option 3"]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(PCSW::_011)
            }
            #[doc = "Clock option 4"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(PCSW::_100)
            }
            #[doc = "Clock option 5"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(PCSW::_101)
            }
            #[doc = "Clock option 6"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(PCSW::_110)
            }
            #[doc = "Clock option 7"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(PCSW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CGC`"]
        pub enum CGCW {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CGCW::_0 => false,
                    CGCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CGCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CGCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CGCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CGCW::_0)
            }
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CGCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 24:26 - Peripheral Clock Source Select"]
            #[inline(always)]
            pub fn pcs(&self) -> PCSR {
                PCSR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&self) -> CGCR {
                CGCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Present"]
            #[inline(always)]
            pub fn pr(&self) -> PRR {
                PRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 2147483648 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 24:26 - Peripheral Clock Source Select"]
            #[inline(always)]
            pub fn pcs(&mut self) -> _PCSW {
                _PCSW { w: self }
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&mut self) -> _CGCW {
                _CGCW { w: self }
            }
        }
    }
    #[doc = "PCC ADC0 Register"]
    pub struct PCC_ADC0 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC ADC0 Register"]
    pub mod pcc_adc0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCC_ADC0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PCS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PCSR {
            #[doc = "Clock is off."]
            _000,
            #[doc = "Clock option 1"]
            _001,
            #[doc = "Clock option 2"]
            _010,
            #[doc = "Clock option 3"]
            _011,
            #[doc = "Clock option 4"]
            _100,
            #[doc = "Clock option 5"]
            _101,
            #[doc = "Clock option 6"]
            _110,
            #[doc = "Clock option 7"]
            _111,
        }
        impl PCSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PCSR::_000 => 0,
                    PCSR::_001 => 1,
                    PCSR::_010 => 2,
                    PCSR::_011 => 3,
                    PCSR::_100 => 4,
                    PCSR::_101 => 5,
                    PCSR::_110 => 6,
                    PCSR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PCSR {
                match value {
                    0 => PCSR::_000,
                    1 => PCSR::_001,
                    2 => PCSR::_010,
                    3 => PCSR::_011,
                    4 => PCSR::_100,
                    5 => PCSR::_101,
                    6 => PCSR::_110,
                    7 => PCSR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == PCSR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == PCSR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == PCSR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == PCSR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == PCSR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == PCSR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == PCSR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == PCSR::_111
            }
        }
        #[doc = "Possible values of the field `CGC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CGCR {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CGCR::_0 => false,
                    CGCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CGCR {
                match value {
                    false => CGCR::_0,
                    true => CGCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CGCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CGCR::_1
            }
        }
        #[doc = "Possible values of the field `PR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PRR {
            #[doc = "Peripheral is not present."]
            _0,
            #[doc = "Peripheral is present."]
            _1,
        }
        impl PRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PRR::_0 => false,
                    PRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PRR {
                match value {
                    false => PRR::_0,
                    true => PRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PRR::_1
            }
        }
        #[doc = "Values that can be written to the field `PCS`"]
        pub enum PCSW {
            #[doc = "Clock is off."]
            _000,
            #[doc = "Clock option 1"]
            _001,
            #[doc = "Clock option 2"]
            _010,
            #[doc = "Clock option 3"]
            _011,
            #[doc = "Clock option 4"]
            _100,
            #[doc = "Clock option 5"]
            _101,
            #[doc = "Clock option 6"]
            _110,
            #[doc = "Clock option 7"]
            _111,
        }
        impl PCSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PCSW::_000 => 0,
                    PCSW::_001 => 1,
                    PCSW::_010 => 2,
                    PCSW::_011 => 3,
                    PCSW::_100 => 4,
                    PCSW::_101 => 5,
                    PCSW::_110 => 6,
                    PCSW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PCSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PCSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PCSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Clock is off."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(PCSW::_000)
            }
            #[doc = "Clock option 1"]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(PCSW::_001)
            }
            #[doc = "Clock option 2"]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(PCSW::_010)
            }
            #[doc = "Clock option 3"]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(PCSW::_011)
            }
            #[doc = "Clock option 4"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(PCSW::_100)
            }
            #[doc = "Clock option 5"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(PCSW::_101)
            }
            #[doc = "Clock option 6"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(PCSW::_110)
            }
            #[doc = "Clock option 7"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(PCSW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CGC`"]
        pub enum CGCW {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CGCW::_0 => false,
                    CGCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CGCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CGCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CGCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CGCW::_0)
            }
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CGCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 24:26 - Peripheral Clock Source Select"]
            #[inline(always)]
            pub fn pcs(&self) -> PCSR {
                PCSR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&self) -> CGCR {
                CGCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Present"]
            #[inline(always)]
            pub fn pr(&self) -> PRR {
                PRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 2147483648 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 24:26 - Peripheral Clock Source Select"]
            #[inline(always)]
            pub fn pcs(&mut self) -> _PCSW {
                _PCSW { w: self }
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&mut self) -> _CGCW {
                _CGCW { w: self }
            }
        }
    }
    #[doc = "PCC Reserved Register 60"]
    pub struct PCCDUMMY60 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 60"]
    pub mod pccdummy60 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY60 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC RTC Register"]
    pub struct PCC_RTC {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC RTC Register"]
    pub mod pcc_rtc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCC_RTC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CGC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CGCR {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CGCR::_0 => false,
                    CGCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CGCR {
                match value {
                    false => CGCR::_0,
                    true => CGCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CGCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CGCR::_1
            }
        }
        #[doc = "Possible values of the field `PR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PRR {
            #[doc = "Peripheral is not present."]
            _0,
            #[doc = "Peripheral is present."]
            _1,
        }
        impl PRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PRR::_0 => false,
                    PRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PRR {
                match value {
                    false => PRR::_0,
                    true => PRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PRR::_1
            }
        }
        #[doc = "Values that can be written to the field `CGC`"]
        pub enum CGCW {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CGCW::_0 => false,
                    CGCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CGCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CGCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CGCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CGCW::_0)
            }
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CGCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&self) -> CGCR {
                CGCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Present"]
            #[inline(always)]
            pub fn pr(&self) -> PRR {
                PRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 2147483648 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&mut self) -> _CGCW {
                _CGCW { w: self }
            }
        }
    }
    #[doc = "PCC Reserved Register 62"]
    pub struct PCCDUMMY62 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 62"]
    pub mod pccdummy62 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY62 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 63"]
    pub struct PCCDUMMY63 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 63"]
    pub mod pccdummy63 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY63 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC LPTMR0 Register"]
    pub struct PCC_LPTMR0 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC LPTMR0 Register"]
    pub mod pcc_lptmr0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCC_LPTMR0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PCD`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PCDR {
            #[doc = "Divide by 1."]
            _000,
            #[doc = "Divide by 2."]
            _001,
            #[doc = "Divide by 3."]
            _010,
            #[doc = "Divide by 4."]
            _011,
            #[doc = "Divide by 5."]
            _100,
            #[doc = "Divide by 6."]
            _101,
            #[doc = "Divide by 7."]
            _110,
            #[doc = "Divide by 8."]
            _111,
        }
        impl PCDR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PCDR::_000 => 0,
                    PCDR::_001 => 1,
                    PCDR::_010 => 2,
                    PCDR::_011 => 3,
                    PCDR::_100 => 4,
                    PCDR::_101 => 5,
                    PCDR::_110 => 6,
                    PCDR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PCDR {
                match value {
                    0 => PCDR::_000,
                    1 => PCDR::_001,
                    2 => PCDR::_010,
                    3 => PCDR::_011,
                    4 => PCDR::_100,
                    5 => PCDR::_101,
                    6 => PCDR::_110,
                    7 => PCDR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == PCDR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == PCDR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == PCDR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == PCDR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == PCDR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == PCDR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == PCDR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == PCDR::_111
            }
        }
        #[doc = "Possible values of the field `FRAC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FRACR {
            #[doc = "Fractional value is 0."]
            _0,
            #[doc = "Fractional value is 1."]
            _1,
        }
        impl FRACR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FRACR::_0 => false,
                    FRACR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FRACR {
                match value {
                    false => FRACR::_0,
                    true => FRACR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FRACR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FRACR::_1
            }
        }
        #[doc = "Possible values of the field `PCS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PCSR {
            #[doc = "Clock is off."]
            _000,
            #[doc = "Clock option 1"]
            _001,
            #[doc = "Clock option 2"]
            _010,
            #[doc = "Clock option 3"]
            _011,
            #[doc = "Clock option 4"]
            _100,
            #[doc = "Clock option 5"]
            _101,
            #[doc = "Clock option 6"]
            _110,
            #[doc = "Clock option 7"]
            _111,
        }
        impl PCSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PCSR::_000 => 0,
                    PCSR::_001 => 1,
                    PCSR::_010 => 2,
                    PCSR::_011 => 3,
                    PCSR::_100 => 4,
                    PCSR::_101 => 5,
                    PCSR::_110 => 6,
                    PCSR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PCSR {
                match value {
                    0 => PCSR::_000,
                    1 => PCSR::_001,
                    2 => PCSR::_010,
                    3 => PCSR::_011,
                    4 => PCSR::_100,
                    5 => PCSR::_101,
                    6 => PCSR::_110,
                    7 => PCSR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == PCSR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == PCSR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == PCSR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == PCSR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == PCSR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == PCSR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == PCSR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == PCSR::_111
            }
        }
        #[doc = "Possible values of the field `CGC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CGCR {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CGCR::_0 => false,
                    CGCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CGCR {
                match value {
                    false => CGCR::_0,
                    true => CGCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CGCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CGCR::_1
            }
        }
        #[doc = "Possible values of the field `PR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PRR {
            #[doc = "Peripheral is not present."]
            _0,
            #[doc = "Peripheral is present."]
            _1,
        }
        impl PRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PRR::_0 => false,
                    PRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PRR {
                match value {
                    false => PRR::_0,
                    true => PRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PRR::_1
            }
        }
        #[doc = "Values that can be written to the field `PCD`"]
        pub enum PCDW {
            #[doc = "Divide by 1."]
            _000,
            #[doc = "Divide by 2."]
            _001,
            #[doc = "Divide by 3."]
            _010,
            #[doc = "Divide by 4."]
            _011,
            #[doc = "Divide by 5."]
            _100,
            #[doc = "Divide by 6."]
            _101,
            #[doc = "Divide by 7."]
            _110,
            #[doc = "Divide by 8."]
            _111,
        }
        impl PCDW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PCDW::_000 => 0,
                    PCDW::_001 => 1,
                    PCDW::_010 => 2,
                    PCDW::_011 => 3,
                    PCDW::_100 => 4,
                    PCDW::_101 => 5,
                    PCDW::_110 => 6,
                    PCDW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PCDW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PCDW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PCDW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Divide by 1."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(PCDW::_000)
            }
            #[doc = "Divide by 2."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(PCDW::_001)
            }
            #[doc = "Divide by 3."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(PCDW::_010)
            }
            #[doc = "Divide by 4."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(PCDW::_011)
            }
            #[doc = "Divide by 5."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(PCDW::_100)
            }
            #[doc = "Divide by 6."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(PCDW::_101)
            }
            #[doc = "Divide by 7."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(PCDW::_110)
            }
            #[doc = "Divide by 8."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(PCDW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FRAC`"]
        pub enum FRACW {
            #[doc = "Fractional value is 0."]
            _0,
            #[doc = "Fractional value is 1."]
            _1,
        }
        impl FRACW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FRACW::_0 => false,
                    FRACW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FRACW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FRACW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FRACW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Fractional value is 0."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FRACW::_0)
            }
            #[doc = "Fractional value is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FRACW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PCS`"]
        pub enum PCSW {
            #[doc = "Clock is off."]
            _000,
            #[doc = "Clock option 1"]
            _001,
            #[doc = "Clock option 2"]
            _010,
            #[doc = "Clock option 3"]
            _011,
            #[doc = "Clock option 4"]
            _100,
            #[doc = "Clock option 5"]
            _101,
            #[doc = "Clock option 6"]
            _110,
            #[doc = "Clock option 7"]
            _111,
        }
        impl PCSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PCSW::_000 => 0,
                    PCSW::_001 => 1,
                    PCSW::_010 => 2,
                    PCSW::_011 => 3,
                    PCSW::_100 => 4,
                    PCSW::_101 => 5,
                    PCSW::_110 => 6,
                    PCSW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PCSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PCSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PCSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Clock is off."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(PCSW::_000)
            }
            #[doc = "Clock option 1"]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(PCSW::_001)
            }
            #[doc = "Clock option 2"]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(PCSW::_010)
            }
            #[doc = "Clock option 3"]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(PCSW::_011)
            }
            #[doc = "Clock option 4"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(PCSW::_100)
            }
            #[doc = "Clock option 5"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(PCSW::_101)
            }
            #[doc = "Clock option 6"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(PCSW::_110)
            }
            #[doc = "Clock option 7"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(PCSW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CGC`"]
        pub enum CGCW {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CGCW::_0 => false,
                    CGCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CGCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CGCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CGCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CGCW::_0)
            }
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CGCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:2 - Peripheral Clock Divider Select"]
            #[inline(always)]
            pub fn pcd(&self) -> PCDR {
                PCDR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 3 - Peripheral Clock Divider Fraction"]
            #[inline(always)]
            pub fn frac(&self) -> FRACR {
                FRACR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 24:26 - Peripheral Clock Source Select"]
            #[inline(always)]
            pub fn pcs(&self) -> PCSR {
                PCSR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&self) -> CGCR {
                CGCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Present"]
            #[inline(always)]
            pub fn pr(&self) -> PRR {
                PRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 2147483648 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:2 - Peripheral Clock Divider Select"]
            #[inline(always)]
            pub fn pcd(&mut self) -> _PCDW {
                _PCDW { w: self }
            }
            #[doc = "Bit 3 - Peripheral Clock Divider Fraction"]
            #[inline(always)]
            pub fn frac(&mut self) -> _FRACW {
                _FRACW { w: self }
            }
            #[doc = "Bits 24:26 - Peripheral Clock Source Select"]
            #[inline(always)]
            pub fn pcs(&mut self) -> _PCSW {
                _PCSW { w: self }
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&mut self) -> _CGCW {
                _CGCW { w: self }
            }
        }
    }
    #[doc = "PCC Reserved Register 65"]
    pub struct PCCDUMMY65 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 65"]
    pub mod pccdummy65 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY65 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 66"]
    pub struct PCCDUMMY66 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 66"]
    pub mod pccdummy66 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY66 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 67"]
    pub struct PCCDUMMY67 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 67"]
    pub mod pccdummy67 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY67 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 68"]
    pub struct PCCDUMMY68 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 68"]
    pub mod pccdummy68 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY68 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 69"]
    pub struct PCCDUMMY69 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 69"]
    pub mod pccdummy69 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY69 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 70"]
    pub struct PCCDUMMY70 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 70"]
    pub mod pccdummy70 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY70 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 71"]
    pub struct PCCDUMMY71 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 71"]
    pub mod pccdummy71 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY71 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 72"]
    pub struct PCCDUMMY72 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 72"]
    pub mod pccdummy72 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY72 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC PORTA Register"]
    pub struct PCC_PORTA {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC PORTA Register"]
    pub mod pcc_porta {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCC_PORTA {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CGC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CGCR {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CGCR::_0 => false,
                    CGCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CGCR {
                match value {
                    false => CGCR::_0,
                    true => CGCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CGCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CGCR::_1
            }
        }
        #[doc = "Possible values of the field `PR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PRR {
            #[doc = "Peripheral is not present."]
            _0,
            #[doc = "Peripheral is present."]
            _1,
        }
        impl PRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PRR::_0 => false,
                    PRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PRR {
                match value {
                    false => PRR::_0,
                    true => PRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PRR::_1
            }
        }
        #[doc = "Values that can be written to the field `CGC`"]
        pub enum CGCW {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CGCW::_0 => false,
                    CGCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CGCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CGCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CGCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CGCW::_0)
            }
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CGCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&self) -> CGCR {
                CGCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Present"]
            #[inline(always)]
            pub fn pr(&self) -> PRR {
                PRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 2147483648 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&mut self) -> _CGCW {
                _CGCW { w: self }
            }
        }
    }
    #[doc = "PCC PORTB Register"]
    pub struct PCC_PORTB {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC PORTB Register"]
    pub mod pcc_portb {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCC_PORTB {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CGC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CGCR {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CGCR::_0 => false,
                    CGCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CGCR {
                match value {
                    false => CGCR::_0,
                    true => CGCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CGCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CGCR::_1
            }
        }
        #[doc = "Possible values of the field `PR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PRR {
            #[doc = "Peripheral is not present."]
            _0,
            #[doc = "Peripheral is present."]
            _1,
        }
        impl PRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PRR::_0 => false,
                    PRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PRR {
                match value {
                    false => PRR::_0,
                    true => PRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PRR::_1
            }
        }
        #[doc = "Values that can be written to the field `CGC`"]
        pub enum CGCW {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CGCW::_0 => false,
                    CGCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CGCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CGCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CGCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CGCW::_0)
            }
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CGCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&self) -> CGCR {
                CGCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Present"]
            #[inline(always)]
            pub fn pr(&self) -> PRR {
                PRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 2147483648 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&mut self) -> _CGCW {
                _CGCW { w: self }
            }
        }
    }
    #[doc = "PCC PORTC Register"]
    pub struct PCC_PORTC {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC PORTC Register"]
    pub mod pcc_portc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCC_PORTC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CGC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CGCR {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CGCR::_0 => false,
                    CGCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CGCR {
                match value {
                    false => CGCR::_0,
                    true => CGCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CGCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CGCR::_1
            }
        }
        #[doc = "Possible values of the field `PR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PRR {
            #[doc = "Peripheral is not present."]
            _0,
            #[doc = "Peripheral is present."]
            _1,
        }
        impl PRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PRR::_0 => false,
                    PRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PRR {
                match value {
                    false => PRR::_0,
                    true => PRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PRR::_1
            }
        }
        #[doc = "Values that can be written to the field `CGC`"]
        pub enum CGCW {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CGCW::_0 => false,
                    CGCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CGCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CGCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CGCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CGCW::_0)
            }
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CGCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&self) -> CGCR {
                CGCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Present"]
            #[inline(always)]
            pub fn pr(&self) -> PRR {
                PRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 2147483648 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&mut self) -> _CGCW {
                _CGCW { w: self }
            }
        }
    }
    #[doc = "PCC PORTD Register"]
    pub struct PCC_PORTD {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC PORTD Register"]
    pub mod pcc_portd {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCC_PORTD {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CGC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CGCR {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CGCR::_0 => false,
                    CGCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CGCR {
                match value {
                    false => CGCR::_0,
                    true => CGCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CGCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CGCR::_1
            }
        }
        #[doc = "Possible values of the field `PR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PRR {
            #[doc = "Peripheral is not present."]
            _0,
            #[doc = "Peripheral is present."]
            _1,
        }
        impl PRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PRR::_0 => false,
                    PRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PRR {
                match value {
                    false => PRR::_0,
                    true => PRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PRR::_1
            }
        }
        #[doc = "Values that can be written to the field `CGC`"]
        pub enum CGCW {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CGCW::_0 => false,
                    CGCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CGCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CGCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CGCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CGCW::_0)
            }
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CGCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&self) -> CGCR {
                CGCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Present"]
            #[inline(always)]
            pub fn pr(&self) -> PRR {
                PRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 2147483648 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&mut self) -> _CGCW {
                _CGCW { w: self }
            }
        }
    }
    #[doc = "PCC PORTE Register"]
    pub struct PCC_PORTE {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC PORTE Register"]
    pub mod pcc_porte {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCC_PORTE {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CGC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CGCR {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CGCR::_0 => false,
                    CGCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CGCR {
                match value {
                    false => CGCR::_0,
                    true => CGCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CGCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CGCR::_1
            }
        }
        #[doc = "Possible values of the field `PR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PRR {
            #[doc = "Peripheral is not present."]
            _0,
            #[doc = "Peripheral is present."]
            _1,
        }
        impl PRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PRR::_0 => false,
                    PRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PRR {
                match value {
                    false => PRR::_0,
                    true => PRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PRR::_1
            }
        }
        #[doc = "Values that can be written to the field `CGC`"]
        pub enum CGCW {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CGCW::_0 => false,
                    CGCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CGCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CGCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CGCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CGCW::_0)
            }
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CGCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&self) -> CGCR {
                CGCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Present"]
            #[inline(always)]
            pub fn pr(&self) -> PRR {
                PRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 2147483648 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&mut self) -> _CGCW {
                _CGCW { w: self }
            }
        }
    }
    #[doc = "PCC Reserved Register 78"]
    pub struct PCCDUMMY78 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 78"]
    pub mod pccdummy78 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY78 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 79"]
    pub struct PCCDUMMY79 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 79"]
    pub mod pccdummy79 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY79 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 80"]
    pub struct PCCDUMMY80 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 80"]
    pub mod pccdummy80 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY80 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 81"]
    pub struct PCCDUMMY81 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 81"]
    pub mod pccdummy81 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY81 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 82"]
    pub struct PCCDUMMY82 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 82"]
    pub mod pccdummy82 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY82 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 83"]
    pub struct PCCDUMMY83 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 83"]
    pub mod pccdummy83 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY83 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 84"]
    pub struct PCCDUMMY84 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 84"]
    pub mod pccdummy84 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY84 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 85"]
    pub struct PCCDUMMY85 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 85"]
    pub mod pccdummy85 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY85 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 86"]
    pub struct PCCDUMMY86 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 86"]
    pub mod pccdummy86 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY86 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 87"]
    pub struct PCCDUMMY87 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 87"]
    pub mod pccdummy87 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY87 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 88"]
    pub struct PCCDUMMY88 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 88"]
    pub mod pccdummy88 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY88 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 89"]
    pub struct PCCDUMMY89 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 89"]
    pub mod pccdummy89 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY89 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC FlexIO Register"]
    pub struct PCC_FLEXIO {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC FlexIO Register"]
    pub mod pcc_flexio {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCC_FLEXIO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PCS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PCSR {
            #[doc = "Clock is off."]
            _000,
            #[doc = "Clock option 1"]
            _001,
            #[doc = "Clock option 2"]
            _010,
            #[doc = "Clock option 3"]
            _011,
            #[doc = "Clock option 4"]
            _100,
            #[doc = "Clock option 5"]
            _101,
            #[doc = "Clock option 6"]
            _110,
            #[doc = "Clock option 7"]
            _111,
        }
        impl PCSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PCSR::_000 => 0,
                    PCSR::_001 => 1,
                    PCSR::_010 => 2,
                    PCSR::_011 => 3,
                    PCSR::_100 => 4,
                    PCSR::_101 => 5,
                    PCSR::_110 => 6,
                    PCSR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PCSR {
                match value {
                    0 => PCSR::_000,
                    1 => PCSR::_001,
                    2 => PCSR::_010,
                    3 => PCSR::_011,
                    4 => PCSR::_100,
                    5 => PCSR::_101,
                    6 => PCSR::_110,
                    7 => PCSR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == PCSR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == PCSR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == PCSR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == PCSR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == PCSR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == PCSR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == PCSR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == PCSR::_111
            }
        }
        #[doc = "Possible values of the field `CGC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CGCR {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CGCR::_0 => false,
                    CGCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CGCR {
                match value {
                    false => CGCR::_0,
                    true => CGCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CGCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CGCR::_1
            }
        }
        #[doc = "Possible values of the field `PR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PRR {
            #[doc = "Peripheral is not present."]
            _0,
            #[doc = "Peripheral is present."]
            _1,
        }
        impl PRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PRR::_0 => false,
                    PRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PRR {
                match value {
                    false => PRR::_0,
                    true => PRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PRR::_1
            }
        }
        #[doc = "Values that can be written to the field `PCS`"]
        pub enum PCSW {
            #[doc = "Clock is off."]
            _000,
            #[doc = "Clock option 1"]
            _001,
            #[doc = "Clock option 2"]
            _010,
            #[doc = "Clock option 3"]
            _011,
            #[doc = "Clock option 4"]
            _100,
            #[doc = "Clock option 5"]
            _101,
            #[doc = "Clock option 6"]
            _110,
            #[doc = "Clock option 7"]
            _111,
        }
        impl PCSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PCSW::_000 => 0,
                    PCSW::_001 => 1,
                    PCSW::_010 => 2,
                    PCSW::_011 => 3,
                    PCSW::_100 => 4,
                    PCSW::_101 => 5,
                    PCSW::_110 => 6,
                    PCSW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PCSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PCSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PCSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Clock is off."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(PCSW::_000)
            }
            #[doc = "Clock option 1"]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(PCSW::_001)
            }
            #[doc = "Clock option 2"]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(PCSW::_010)
            }
            #[doc = "Clock option 3"]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(PCSW::_011)
            }
            #[doc = "Clock option 4"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(PCSW::_100)
            }
            #[doc = "Clock option 5"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(PCSW::_101)
            }
            #[doc = "Clock option 6"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(PCSW::_110)
            }
            #[doc = "Clock option 7"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(PCSW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CGC`"]
        pub enum CGCW {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CGCW::_0 => false,
                    CGCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CGCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CGCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CGCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CGCW::_0)
            }
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CGCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 24:26 - Peripheral Clock Source Select"]
            #[inline(always)]
            pub fn pcs(&self) -> PCSR {
                PCSR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&self) -> CGCR {
                CGCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Present"]
            #[inline(always)]
            pub fn pr(&self) -> PRR {
                PRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 2147483648 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 24:26 - Peripheral Clock Source Select"]
            #[inline(always)]
            pub fn pcs(&mut self) -> _PCSW {
                _PCSW { w: self }
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&mut self) -> _CGCW {
                _CGCW { w: self }
            }
        }
    }
    #[doc = "PCC Reserved Register 91"]
    pub struct PCCDUMMY91 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 91"]
    pub mod pccdummy91 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY91 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 92"]
    pub struct PCCDUMMY92 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 92"]
    pub mod pccdummy92 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY92 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 93"]
    pub struct PCCDUMMY93 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 93"]
    pub mod pccdummy93 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY93 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 94"]
    pub struct PCCDUMMY94 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 94"]
    pub mod pccdummy94 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY94 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 95"]
    pub struct PCCDUMMY95 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 95"]
    pub mod pccdummy95 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY95 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 96"]
    pub struct PCCDUMMY96 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 96"]
    pub mod pccdummy96 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY96 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC EWM Register"]
    pub struct PCC_EWM {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC EWM Register"]
    pub mod pcc_ewm {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCC_EWM {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CGC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CGCR {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CGCR::_0 => false,
                    CGCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CGCR {
                match value {
                    false => CGCR::_0,
                    true => CGCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CGCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CGCR::_1
            }
        }
        #[doc = "Possible values of the field `PR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PRR {
            #[doc = "Peripheral is not present."]
            _0,
            #[doc = "Peripheral is present."]
            _1,
        }
        impl PRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PRR::_0 => false,
                    PRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PRR {
                match value {
                    false => PRR::_0,
                    true => PRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PRR::_1
            }
        }
        #[doc = "Values that can be written to the field `CGC`"]
        pub enum CGCW {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CGCW::_0 => false,
                    CGCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CGCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CGCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CGCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CGCW::_0)
            }
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CGCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&self) -> CGCR {
                CGCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Present"]
            #[inline(always)]
            pub fn pr(&self) -> PRR {
                PRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 2147483648 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&mut self) -> _CGCW {
                _CGCW { w: self }
            }
        }
    }
    #[doc = "PCC Reserved Register 98"]
    pub struct PCCDUMMY98 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 98"]
    pub mod pccdummy98 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY98 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 99"]
    pub struct PCCDUMMY99 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 99"]
    pub mod pccdummy99 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY99 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 100"]
    pub struct PCCDUMMY100 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 100"]
    pub mod pccdummy100 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY100 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 101"]
    pub struct PCCDUMMY101 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 101"]
    pub mod pccdummy101 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY101 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC LPI2C0 Register"]
    pub struct PCC_LPI2C0 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC LPI2C0 Register"]
    pub mod pcc_lpi2c0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCC_LPI2C0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PCS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PCSR {
            #[doc = "Clock is off."]
            _000,
            #[doc = "Clock option 1"]
            _001,
            #[doc = "Clock option 2"]
            _010,
            #[doc = "Clock option 3"]
            _011,
            #[doc = "Clock option 4"]
            _100,
            #[doc = "Clock option 5"]
            _101,
            #[doc = "Clock option 6"]
            _110,
            #[doc = "Clock option 7"]
            _111,
        }
        impl PCSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PCSR::_000 => 0,
                    PCSR::_001 => 1,
                    PCSR::_010 => 2,
                    PCSR::_011 => 3,
                    PCSR::_100 => 4,
                    PCSR::_101 => 5,
                    PCSR::_110 => 6,
                    PCSR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PCSR {
                match value {
                    0 => PCSR::_000,
                    1 => PCSR::_001,
                    2 => PCSR::_010,
                    3 => PCSR::_011,
                    4 => PCSR::_100,
                    5 => PCSR::_101,
                    6 => PCSR::_110,
                    7 => PCSR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == PCSR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == PCSR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == PCSR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == PCSR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == PCSR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == PCSR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == PCSR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == PCSR::_111
            }
        }
        #[doc = "Possible values of the field `CGC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CGCR {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CGCR::_0 => false,
                    CGCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CGCR {
                match value {
                    false => CGCR::_0,
                    true => CGCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CGCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CGCR::_1
            }
        }
        #[doc = "Possible values of the field `PR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PRR {
            #[doc = "Peripheral is not present."]
            _0,
            #[doc = "Peripheral is present."]
            _1,
        }
        impl PRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PRR::_0 => false,
                    PRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PRR {
                match value {
                    false => PRR::_0,
                    true => PRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PRR::_1
            }
        }
        #[doc = "Values that can be written to the field `PCS`"]
        pub enum PCSW {
            #[doc = "Clock is off."]
            _000,
            #[doc = "Clock option 1"]
            _001,
            #[doc = "Clock option 2"]
            _010,
            #[doc = "Clock option 3"]
            _011,
            #[doc = "Clock option 4"]
            _100,
            #[doc = "Clock option 5"]
            _101,
            #[doc = "Clock option 6"]
            _110,
            #[doc = "Clock option 7"]
            _111,
        }
        impl PCSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PCSW::_000 => 0,
                    PCSW::_001 => 1,
                    PCSW::_010 => 2,
                    PCSW::_011 => 3,
                    PCSW::_100 => 4,
                    PCSW::_101 => 5,
                    PCSW::_110 => 6,
                    PCSW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PCSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PCSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PCSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Clock is off."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(PCSW::_000)
            }
            #[doc = "Clock option 1"]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(PCSW::_001)
            }
            #[doc = "Clock option 2"]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(PCSW::_010)
            }
            #[doc = "Clock option 3"]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(PCSW::_011)
            }
            #[doc = "Clock option 4"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(PCSW::_100)
            }
            #[doc = "Clock option 5"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(PCSW::_101)
            }
            #[doc = "Clock option 6"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(PCSW::_110)
            }
            #[doc = "Clock option 7"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(PCSW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CGC`"]
        pub enum CGCW {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CGCW::_0 => false,
                    CGCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CGCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CGCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CGCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CGCW::_0)
            }
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CGCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 24:26 - Peripheral Clock Source Select"]
            #[inline(always)]
            pub fn pcs(&self) -> PCSR {
                PCSR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&self) -> CGCR {
                CGCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Present"]
            #[inline(always)]
            pub fn pr(&self) -> PRR {
                PRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 2147483648 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 24:26 - Peripheral Clock Source Select"]
            #[inline(always)]
            pub fn pcs(&mut self) -> _PCSW {
                _PCSW { w: self }
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&mut self) -> _CGCW {
                _CGCW { w: self }
            }
        }
    }
    #[doc = "PCC Reserved Register 103"]
    pub struct PCCDUMMY103 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 103"]
    pub mod pccdummy103 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY103 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 104"]
    pub struct PCCDUMMY104 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 104"]
    pub mod pccdummy104 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY104 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 105"]
    pub struct PCCDUMMY105 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 105"]
    pub mod pccdummy105 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY105 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC LPUART0 Register"]
    pub struct PCC_LPUART0 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC LPUART0 Register"]
    pub mod pcc_lpuart0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCC_LPUART0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PCS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PCSR {
            #[doc = "Clock is off."]
            _000,
            #[doc = "Clock option 1"]
            _001,
            #[doc = "Clock option 2"]
            _010,
            #[doc = "Clock option 3"]
            _011,
            #[doc = "Clock option 4"]
            _100,
            #[doc = "Clock option 5"]
            _101,
            #[doc = "Clock option 6"]
            _110,
            #[doc = "Clock option 7"]
            _111,
        }
        impl PCSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PCSR::_000 => 0,
                    PCSR::_001 => 1,
                    PCSR::_010 => 2,
                    PCSR::_011 => 3,
                    PCSR::_100 => 4,
                    PCSR::_101 => 5,
                    PCSR::_110 => 6,
                    PCSR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PCSR {
                match value {
                    0 => PCSR::_000,
                    1 => PCSR::_001,
                    2 => PCSR::_010,
                    3 => PCSR::_011,
                    4 => PCSR::_100,
                    5 => PCSR::_101,
                    6 => PCSR::_110,
                    7 => PCSR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == PCSR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == PCSR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == PCSR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == PCSR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == PCSR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == PCSR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == PCSR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == PCSR::_111
            }
        }
        #[doc = "Possible values of the field `CGC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CGCR {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CGCR::_0 => false,
                    CGCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CGCR {
                match value {
                    false => CGCR::_0,
                    true => CGCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CGCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CGCR::_1
            }
        }
        #[doc = "Possible values of the field `PR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PRR {
            #[doc = "Peripheral is not present."]
            _0,
            #[doc = "Peripheral is present."]
            _1,
        }
        impl PRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PRR::_0 => false,
                    PRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PRR {
                match value {
                    false => PRR::_0,
                    true => PRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PRR::_1
            }
        }
        #[doc = "Values that can be written to the field `PCS`"]
        pub enum PCSW {
            #[doc = "Clock is off."]
            _000,
            #[doc = "Clock option 1"]
            _001,
            #[doc = "Clock option 2"]
            _010,
            #[doc = "Clock option 3"]
            _011,
            #[doc = "Clock option 4"]
            _100,
            #[doc = "Clock option 5"]
            _101,
            #[doc = "Clock option 6"]
            _110,
            #[doc = "Clock option 7"]
            _111,
        }
        impl PCSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PCSW::_000 => 0,
                    PCSW::_001 => 1,
                    PCSW::_010 => 2,
                    PCSW::_011 => 3,
                    PCSW::_100 => 4,
                    PCSW::_101 => 5,
                    PCSW::_110 => 6,
                    PCSW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PCSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PCSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PCSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Clock is off."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(PCSW::_000)
            }
            #[doc = "Clock option 1"]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(PCSW::_001)
            }
            #[doc = "Clock option 2"]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(PCSW::_010)
            }
            #[doc = "Clock option 3"]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(PCSW::_011)
            }
            #[doc = "Clock option 4"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(PCSW::_100)
            }
            #[doc = "Clock option 5"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(PCSW::_101)
            }
            #[doc = "Clock option 6"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(PCSW::_110)
            }
            #[doc = "Clock option 7"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(PCSW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CGC`"]
        pub enum CGCW {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CGCW::_0 => false,
                    CGCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CGCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CGCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CGCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CGCW::_0)
            }
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CGCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 24:26 - Peripheral Clock Source Select"]
            #[inline(always)]
            pub fn pcs(&self) -> PCSR {
                PCSR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&self) -> CGCR {
                CGCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Present"]
            #[inline(always)]
            pub fn pr(&self) -> PRR {
                PRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 2147483648 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 24:26 - Peripheral Clock Source Select"]
            #[inline(always)]
            pub fn pcs(&mut self) -> _PCSW {
                _PCSW { w: self }
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&mut self) -> _CGCW {
                _CGCW { w: self }
            }
        }
    }
    #[doc = "PCC LPUART1 Register"]
    pub struct PCC_LPUART1 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC LPUART1 Register"]
    pub mod pcc_lpuart1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCC_LPUART1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PCS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PCSR {
            #[doc = "Clock is off."]
            _000,
            #[doc = "Clock option 1"]
            _001,
            #[doc = "Clock option 2"]
            _010,
            #[doc = "Clock option 3"]
            _011,
            #[doc = "Clock option 4"]
            _100,
            #[doc = "Clock option 5"]
            _101,
            #[doc = "Clock option 6"]
            _110,
            #[doc = "Clock option 7"]
            _111,
        }
        impl PCSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PCSR::_000 => 0,
                    PCSR::_001 => 1,
                    PCSR::_010 => 2,
                    PCSR::_011 => 3,
                    PCSR::_100 => 4,
                    PCSR::_101 => 5,
                    PCSR::_110 => 6,
                    PCSR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PCSR {
                match value {
                    0 => PCSR::_000,
                    1 => PCSR::_001,
                    2 => PCSR::_010,
                    3 => PCSR::_011,
                    4 => PCSR::_100,
                    5 => PCSR::_101,
                    6 => PCSR::_110,
                    7 => PCSR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == PCSR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == PCSR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == PCSR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == PCSR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == PCSR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == PCSR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == PCSR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == PCSR::_111
            }
        }
        #[doc = "Possible values of the field `CGC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CGCR {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CGCR::_0 => false,
                    CGCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CGCR {
                match value {
                    false => CGCR::_0,
                    true => CGCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CGCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CGCR::_1
            }
        }
        #[doc = "Possible values of the field `PR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PRR {
            #[doc = "Peripheral is not present."]
            _0,
            #[doc = "Peripheral is present."]
            _1,
        }
        impl PRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PRR::_0 => false,
                    PRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PRR {
                match value {
                    false => PRR::_0,
                    true => PRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PRR::_1
            }
        }
        #[doc = "Values that can be written to the field `PCS`"]
        pub enum PCSW {
            #[doc = "Clock is off."]
            _000,
            #[doc = "Clock option 1"]
            _001,
            #[doc = "Clock option 2"]
            _010,
            #[doc = "Clock option 3"]
            _011,
            #[doc = "Clock option 4"]
            _100,
            #[doc = "Clock option 5"]
            _101,
            #[doc = "Clock option 6"]
            _110,
            #[doc = "Clock option 7"]
            _111,
        }
        impl PCSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PCSW::_000 => 0,
                    PCSW::_001 => 1,
                    PCSW::_010 => 2,
                    PCSW::_011 => 3,
                    PCSW::_100 => 4,
                    PCSW::_101 => 5,
                    PCSW::_110 => 6,
                    PCSW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PCSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PCSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PCSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Clock is off."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(PCSW::_000)
            }
            #[doc = "Clock option 1"]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(PCSW::_001)
            }
            #[doc = "Clock option 2"]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(PCSW::_010)
            }
            #[doc = "Clock option 3"]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(PCSW::_011)
            }
            #[doc = "Clock option 4"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(PCSW::_100)
            }
            #[doc = "Clock option 5"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(PCSW::_101)
            }
            #[doc = "Clock option 6"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(PCSW::_110)
            }
            #[doc = "Clock option 7"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(PCSW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CGC`"]
        pub enum CGCW {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CGCW::_0 => false,
                    CGCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CGCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CGCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CGCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CGCW::_0)
            }
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CGCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 24:26 - Peripheral Clock Source Select"]
            #[inline(always)]
            pub fn pcs(&self) -> PCSR {
                PCSR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&self) -> CGCR {
                CGCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Present"]
            #[inline(always)]
            pub fn pr(&self) -> PRR {
                PRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 2147483648 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 24:26 - Peripheral Clock Source Select"]
            #[inline(always)]
            pub fn pcs(&mut self) -> _PCSW {
                _PCSW { w: self }
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&mut self) -> _CGCW {
                _CGCW { w: self }
            }
        }
    }
    #[doc = "PCC LPUART2 Register"]
    pub struct PCC_LPUART2 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC LPUART2 Register"]
    pub mod pcc_lpuart2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCC_LPUART2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PCS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PCSR {
            #[doc = "Clock is off."]
            _000,
            #[doc = "Clock option 1"]
            _001,
            #[doc = "Clock option 2"]
            _010,
            #[doc = "Clock option 3"]
            _011,
            #[doc = "Clock option 4"]
            _100,
            #[doc = "Clock option 5"]
            _101,
            #[doc = "Clock option 6"]
            _110,
            #[doc = "Clock option 7"]
            _111,
        }
        impl PCSR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PCSR::_000 => 0,
                    PCSR::_001 => 1,
                    PCSR::_010 => 2,
                    PCSR::_011 => 3,
                    PCSR::_100 => 4,
                    PCSR::_101 => 5,
                    PCSR::_110 => 6,
                    PCSR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PCSR {
                match value {
                    0 => PCSR::_000,
                    1 => PCSR::_001,
                    2 => PCSR::_010,
                    3 => PCSR::_011,
                    4 => PCSR::_100,
                    5 => PCSR::_101,
                    6 => PCSR::_110,
                    7 => PCSR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == PCSR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == PCSR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == PCSR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == PCSR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == PCSR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == PCSR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == PCSR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == PCSR::_111
            }
        }
        #[doc = "Possible values of the field `CGC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CGCR {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CGCR::_0 => false,
                    CGCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CGCR {
                match value {
                    false => CGCR::_0,
                    true => CGCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CGCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CGCR::_1
            }
        }
        #[doc = "Possible values of the field `PR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PRR {
            #[doc = "Peripheral is not present."]
            _0,
            #[doc = "Peripheral is present."]
            _1,
        }
        impl PRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PRR::_0 => false,
                    PRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PRR {
                match value {
                    false => PRR::_0,
                    true => PRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PRR::_1
            }
        }
        #[doc = "Values that can be written to the field `PCS`"]
        pub enum PCSW {
            #[doc = "Clock is off."]
            _000,
            #[doc = "Clock option 1"]
            _001,
            #[doc = "Clock option 2"]
            _010,
            #[doc = "Clock option 3"]
            _011,
            #[doc = "Clock option 4"]
            _100,
            #[doc = "Clock option 5"]
            _101,
            #[doc = "Clock option 6"]
            _110,
            #[doc = "Clock option 7"]
            _111,
        }
        impl PCSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PCSW::_000 => 0,
                    PCSW::_001 => 1,
                    PCSW::_010 => 2,
                    PCSW::_011 => 3,
                    PCSW::_100 => 4,
                    PCSW::_101 => 5,
                    PCSW::_110 => 6,
                    PCSW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PCSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PCSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PCSW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Clock is off."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(PCSW::_000)
            }
            #[doc = "Clock option 1"]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(PCSW::_001)
            }
            #[doc = "Clock option 2"]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(PCSW::_010)
            }
            #[doc = "Clock option 3"]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(PCSW::_011)
            }
            #[doc = "Clock option 4"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(PCSW::_100)
            }
            #[doc = "Clock option 5"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(PCSW::_101)
            }
            #[doc = "Clock option 6"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(PCSW::_110)
            }
            #[doc = "Clock option 7"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(PCSW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CGC`"]
        pub enum CGCW {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CGCW::_0 => false,
                    CGCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CGCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CGCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CGCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CGCW::_0)
            }
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CGCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 24:26 - Peripheral Clock Source Select"]
            #[inline(always)]
            pub fn pcs(&self) -> PCSR {
                PCSR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&self) -> CGCR {
                CGCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Present"]
            #[inline(always)]
            pub fn pr(&self) -> PRR {
                PRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 2147483648 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 24:26 - Peripheral Clock Source Select"]
            #[inline(always)]
            pub fn pcs(&mut self) -> _PCSW {
                _PCSW { w: self }
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&mut self) -> _CGCW {
                _CGCW { w: self }
            }
        }
    }
    #[doc = "PCC Reserved Register 109"]
    pub struct PCCDUMMY109 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 109"]
    pub mod pccdummy109 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY109 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 110"]
    pub struct PCCDUMMY110 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 110"]
    pub mod pccdummy110 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY110 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 111"]
    pub struct PCCDUMMY111 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 111"]
    pub mod pccdummy111 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY111 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 112"]
    pub struct PCCDUMMY112 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 112"]
    pub mod pccdummy112 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY112 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 113"]
    pub struct PCCDUMMY113 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 113"]
    pub mod pccdummy113 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY113 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC Reserved Register 114"]
    pub struct PCCDUMMY114 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC Reserved Register 114"]
    pub mod pccdummy114 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCDUMMY114 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
        }
    }
    #[doc = "PCC CMP0 Register"]
    pub struct PCC_CMP0 {
        register: VolatileCell<u32>,
    }
    #[doc = "PCC CMP0 Register"]
    pub mod pcc_cmp0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCC_CMP0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CGC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CGCR {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CGCR::_0 => false,
                    CGCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CGCR {
                match value {
                    false => CGCR::_0,
                    true => CGCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CGCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CGCR::_1
            }
        }
        #[doc = "Possible values of the field `PR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PRR {
            #[doc = "Peripheral is not present."]
            _0,
            #[doc = "Peripheral is present."]
            _1,
        }
        impl PRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PRR::_0 => false,
                    PRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PRR {
                match value {
                    false => PRR::_0,
                    true => PRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PRR::_1
            }
        }
        #[doc = "Values that can be written to the field `CGC`"]
        pub enum CGCW {
            #[doc = "Clock disabled"]
            _0,
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            _1,
        }
        impl CGCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CGCW::_0 => false,
                    CGCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CGCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CGCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CGCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CGCW::_0)
            }
            #[doc = "Clock enabled. The current clock selection and divider options are locked."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CGCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&self) -> CGCR {
                CGCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Present"]
            #[inline(always)]
            pub fn pr(&self) -> PRR {
                PRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 2147483648 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 30 - Clock Gate Control"]
            #[inline(always)]
            pub fn cgc(&mut self) -> _CGCW {
                _CGCW { w: self }
            }
        }
    }
}
#[doc = "PCC"]
pub struct PCC {
    register_block: pcc::RegisterBlock,
}
impl Deref for PCC {
    type Target = pcc::RegisterBlock;
    fn deref(&self) -> &pcc::RegisterBlock {
        &self.register_block
    }
}
#[doc = "The LPI2C Memory Map/Register Definition can be found here."]
pub const LPI2C0: Peripheral<LPI2C0> = unsafe { Peripheral::new(1074159616) };
#[doc = "The LPI2C Memory Map/Register Definition can be found here."]
pub mod lpi2c0 {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - Version ID Register"]
        pub verid: VERID,
        #[doc = "0x04 - Parameter Register"]
        pub param: PARAM,
        _reserved0: [u8; 8usize],
        #[doc = "0x10 - Master Control Register"]
        pub mcr: MCR,
        #[doc = "0x14 - Master Status Register"]
        pub msr: MSR,
        #[doc = "0x18 - Master Interrupt Enable Register"]
        pub mier: MIER,
        #[doc = "0x1c - Master DMA Enable Register"]
        pub mder: MDER,
        #[doc = "0x20 - Master Configuration Register 0"]
        pub mcfgr0: MCFGR0,
        #[doc = "0x24 - Master Configuration Register 1"]
        pub mcfgr1: MCFGR1,
        #[doc = "0x28 - Master Configuration Register 2"]
        pub mcfgr2: MCFGR2,
        #[doc = "0x2c - Master Configuration Register 3"]
        pub mcfgr3: MCFGR3,
        _reserved1: [u8; 16usize],
        #[doc = "0x40 - Master Data Match Register"]
        pub mdmr: MDMR,
        _reserved2: [u8; 4usize],
        #[doc = "0x48 - Master Clock Configuration Register 0"]
        pub mccr0: MCCR0,
        _reserved3: [u8; 4usize],
        #[doc = "0x50 - Master Clock Configuration Register 1"]
        pub mccr1: MCCR1,
        _reserved4: [u8; 4usize],
        #[doc = "0x58 - Master FIFO Control Register"]
        pub mfcr: MFCR,
        #[doc = "0x5c - Master FIFO Status Register"]
        pub mfsr: MFSR,
        #[doc = "0x60 - Master Transmit Data Register"]
        pub mtdr: MTDR,
        _reserved5: [u8; 12usize],
        #[doc = "0x70 - Master Receive Data Register"]
        pub mrdr: MRDR,
        _reserved6: [u8; 156usize],
        #[doc = "0x110 - Slave Control Register"]
        pub scr: SCR,
        #[doc = "0x114 - Slave Status Register"]
        pub ssr: SSR,
        #[doc = "0x118 - Slave Interrupt Enable Register"]
        pub sier: SIER,
        #[doc = "0x11c - Slave DMA Enable Register"]
        pub sder: SDER,
        _reserved7: [u8; 4usize],
        #[doc = "0x124 - Slave Configuration Register 1"]
        pub scfgr1: SCFGR1,
        #[doc = "0x128 - Slave Configuration Register 2"]
        pub scfgr2: SCFGR2,
        _reserved8: [u8; 20usize],
        #[doc = "0x140 - Slave Address Match Register"]
        pub samr: SAMR,
        _reserved9: [u8; 12usize],
        #[doc = "0x150 - Slave Address Status Register"]
        pub sasr: SASR,
        #[doc = "0x154 - Slave Transmit ACK Register"]
        pub star: STAR,
        _reserved10: [u8; 8usize],
        #[doc = "0x160 - Slave Transmit Data Register"]
        pub stdr: STDR,
        _reserved11: [u8; 12usize],
        #[doc = "0x170 - Slave Receive Data Register"]
        pub srdr: SRDR,
    }
    #[doc = "Version ID Register"]
    pub struct VERID {
        register: VolatileCell<u32>,
    }
    #[doc = "Version ID Register"]
    pub mod verid {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::VERID {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = "Possible values of the field `FEATURE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FEATURER {
            #[doc = "Master only with standard feature set."]
            _0000000000000010,
            #[doc = "Master and slave with standard feature set."]
            _0000000000000011,
            #[doc = r" Reserved"]
            _Reserved(u16),
        }
        impl FEATURER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                match *self {
                    FEATURER::_0000000000000010 => 2,
                    FEATURER::_0000000000000011 => 3,
                    FEATURER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u16) -> FEATURER {
                match value {
                    2 => FEATURER::_0000000000000010,
                    3 => FEATURER::_0000000000000011,
                    i => FEATURER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000000000000010`"]
            #[inline(always)]
            pub fn is_0000000000000010(&self) -> bool {
                *self == FEATURER::_0000000000000010
            }
            #[doc = "Checks if the value of the field is `_0000000000000011`"]
            #[inline(always)]
            pub fn is_0000000000000011(&self) -> bool {
                *self == FEATURER::_0000000000000011
            }
        }
        #[doc = r" Value of the field"]
        pub struct MINORR {
            bits: u8,
        }
        impl MINORR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct MAJORR {
            bits: u8,
        }
        impl MAJORR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Feature Specification Number"]
            #[inline(always)]
            pub fn feature(&self) -> FEATURER {
                FEATURER::_from({
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                })
            }
            #[doc = "Bits 16:23 - Minor Version Number"]
            #[inline(always)]
            pub fn minor(&self) -> MINORR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                MINORR { bits }
            }
            #[doc = "Bits 24:31 - Major Version Number"]
            #[inline(always)]
            pub fn major(&self) -> MAJORR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                MAJORR { bits }
            }
        }
    }
    #[doc = "Parameter Register"]
    pub struct PARAM {
        register: VolatileCell<u32>,
    }
    #[doc = "Parameter Register"]
    pub mod param {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::PARAM {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct MTXFIFOR {
            bits: u8,
        }
        impl MTXFIFOR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct MRXFIFOR {
            bits: u8,
        }
        impl MRXFIFOR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:3 - Master Transmit FIFO Size"]
            #[inline(always)]
            pub fn mtxfifo(&self) -> MTXFIFOR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                MTXFIFOR { bits }
            }
            #[doc = "Bits 8:11 - Master Receive FIFO Size"]
            #[inline(always)]
            pub fn mrxfifo(&self) -> MRXFIFOR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                MRXFIFOR { bits }
            }
        }
    }
    #[doc = "Master Control Register"]
    pub struct MCR {
        register: VolatileCell<u32>,
    }
    #[doc = "Master Control Register"]
    pub mod mcr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::MCR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `MEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MENR {
            #[doc = "Master logic is disabled."]
            _0,
            #[doc = "Master logic is enabled."]
            _1,
        }
        impl MENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MENR::_0 => false,
                    MENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MENR {
                match value {
                    false => MENR::_0,
                    true => MENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MENR::_1
            }
        }
        #[doc = "Possible values of the field `RST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RSTR {
            #[doc = "Master logic is not reset."]
            _0,
            #[doc = "Master logic is reset."]
            _1,
        }
        impl RSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RSTR::_0 => false,
                    RSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RSTR {
                match value {
                    false => RSTR::_0,
                    true => RSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RSTR::_1
            }
        }
        #[doc = "Possible values of the field `DOZEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DOZENR {
            #[doc = "Master is enabled in Doze mode."]
            _0,
            #[doc = "Master is disabled in Doze mode."]
            _1,
        }
        impl DOZENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DOZENR::_0 => false,
                    DOZENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DOZENR {
                match value {
                    false => DOZENR::_0,
                    true => DOZENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DOZENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DOZENR::_1
            }
        }
        #[doc = "Possible values of the field `DBGEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DBGENR {
            #[doc = "Master is disabled in debug mode."]
            _0,
            #[doc = "Master is enabled in debug mode."]
            _1,
        }
        impl DBGENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DBGENR::_0 => false,
                    DBGENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DBGENR {
                match value {
                    false => DBGENR::_0,
                    true => DBGENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DBGENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DBGENR::_1
            }
        }
        #[doc = "Values that can be written to the field `MEN`"]
        pub enum MENW {
            #[doc = "Master logic is disabled."]
            _0,
            #[doc = "Master logic is enabled."]
            _1,
        }
        impl MENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MENW::_0 => false,
                    MENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Master logic is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MENW::_0)
            }
            #[doc = "Master logic is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RST`"]
        pub enum RSTW {
            #[doc = "Master logic is not reset."]
            _0,
            #[doc = "Master logic is reset."]
            _1,
        }
        impl RSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RSTW::_0 => false,
                    RSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Master logic is not reset."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RSTW::_0)
            }
            #[doc = "Master logic is reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DOZEN`"]
        pub enum DOZENW {
            #[doc = "Master is enabled in Doze mode."]
            _0,
            #[doc = "Master is disabled in Doze mode."]
            _1,
        }
        impl DOZENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DOZENW::_0 => false,
                    DOZENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DOZENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DOZENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DOZENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Master is enabled in Doze mode."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DOZENW::_0)
            }
            #[doc = "Master is disabled in Doze mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DOZENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DBGEN`"]
        pub enum DBGENW {
            #[doc = "Master is disabled in debug mode."]
            _0,
            #[doc = "Master is enabled in debug mode."]
            _1,
        }
        impl DBGENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DBGENW::_0 => false,
                    DBGENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DBGENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DBGENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DBGENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Master is disabled in debug mode."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DBGENW::_0)
            }
            #[doc = "Master is enabled in debug mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DBGENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RTF`"]
        pub enum RTFW {
            #[doc = "No effect."]
            _0,
            #[doc = "Transmit FIFO is reset."]
            _1,
        }
        impl RTFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RTFW::_0 => false,
                    RTFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RTFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RTFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RTFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No effect."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RTFW::_0)
            }
            #[doc = "Transmit FIFO is reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RTFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RRF`"]
        pub enum RRFW {
            #[doc = "No effect."]
            _0,
            #[doc = "Receive FIFO is reset."]
            _1,
        }
        impl RRFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RRFW::_0 => false,
                    RRFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RRFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RRFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RRFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No effect."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RRFW::_0)
            }
            #[doc = "Receive FIFO is reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RRFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Master Enable"]
            #[inline(always)]
            pub fn men(&self) -> MENR {
                MENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Software Reset"]
            #[inline(always)]
            pub fn rst(&self) -> RSTR {
                RSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Doze mode enable"]
            #[inline(always)]
            pub fn dozen(&self) -> DOZENR {
                DOZENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Debug Enable"]
            #[inline(always)]
            pub fn dbgen(&self) -> DBGENR {
                DBGENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Master Enable"]
            #[inline(always)]
            pub fn men(&mut self) -> _MENW {
                _MENW { w: self }
            }
            #[doc = "Bit 1 - Software Reset"]
            #[inline(always)]
            pub fn rst(&mut self) -> _RSTW {
                _RSTW { w: self }
            }
            #[doc = "Bit 2 - Doze mode enable"]
            #[inline(always)]
            pub fn dozen(&mut self) -> _DOZENW {
                _DOZENW { w: self }
            }
            #[doc = "Bit 3 - Debug Enable"]
            #[inline(always)]
            pub fn dbgen(&mut self) -> _DBGENW {
                _DBGENW { w: self }
            }
            #[doc = "Bit 8 - Reset Transmit FIFO"]
            #[inline(always)]
            pub fn rtf(&mut self) -> _RTFW {
                _RTFW { w: self }
            }
            #[doc = "Bit 9 - Reset Receive FIFO"]
            #[inline(always)]
            pub fn rrf(&mut self) -> _RRFW {
                _RRFW { w: self }
            }
        }
    }
    #[doc = "Master Status Register"]
    pub struct MSR {
        register: VolatileCell<u32>,
    }
    #[doc = "Master Status Register"]
    pub mod msr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::MSR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TDF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TDFR {
            #[doc = "Transmit data not requested."]
            _0,
            #[doc = "Transmit data is requested."]
            _1,
        }
        impl TDFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TDFR::_0 => false,
                    TDFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TDFR {
                match value {
                    false => TDFR::_0,
                    true => TDFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TDFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TDFR::_1
            }
        }
        #[doc = "Possible values of the field `RDF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RDFR {
            #[doc = "Receive Data is not ready."]
            _0,
            #[doc = "Receive data is ready."]
            _1,
        }
        impl RDFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RDFR::_0 => false,
                    RDFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RDFR {
                match value {
                    false => RDFR::_0,
                    true => RDFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RDFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RDFR::_1
            }
        }
        #[doc = "Possible values of the field `EPF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EPFR {
            #[doc = "Master has not generated a STOP or Repeated START condition."]
            _0,
            #[doc = "Master has generated a STOP or Repeated START condition."]
            _1,
        }
        impl EPFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EPFR::_0 => false,
                    EPFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EPFR {
                match value {
                    false => EPFR::_0,
                    true => EPFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EPFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EPFR::_1
            }
        }
        #[doc = "Possible values of the field `SDF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SDFR {
            #[doc = "Master has not generated a STOP condition."]
            _0,
            #[doc = "Master has generated a STOP condition."]
            _1,
        }
        impl SDFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SDFR::_0 => false,
                    SDFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SDFR {
                match value {
                    false => SDFR::_0,
                    true => SDFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SDFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SDFR::_1
            }
        }
        #[doc = "Possible values of the field `NDF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum NDFR {
            #[doc = "Unexpected NACK not detected."]
            _0,
            #[doc = "Unexpected NACK was detected."]
            _1,
        }
        impl NDFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    NDFR::_0 => false,
                    NDFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> NDFR {
                match value {
                    false => NDFR::_0,
                    true => NDFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == NDFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == NDFR::_1
            }
        }
        #[doc = "Possible values of the field `ALF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ALFR {
            #[doc = "Master has not lost arbitration."]
            _0,
            #[doc = "Master has lost arbitration."]
            _1,
        }
        impl ALFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ALFR::_0 => false,
                    ALFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ALFR {
                match value {
                    false => ALFR::_0,
                    true => ALFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ALFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ALFR::_1
            }
        }
        #[doc = "Possible values of the field `FEF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FEFR {
            #[doc = "No error."]
            _0,
            #[doc = "Master sending or receiving data without START condition."]
            _1,
        }
        impl FEFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FEFR::_0 => false,
                    FEFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FEFR {
                match value {
                    false => FEFR::_0,
                    true => FEFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FEFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FEFR::_1
            }
        }
        #[doc = "Possible values of the field `PLTF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PLTFR {
            #[doc = "Pin low timeout has not occurred or is disabled."]
            _0,
            #[doc = "Pin low timeout has occurred."]
            _1,
        }
        impl PLTFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PLTFR::_0 => false,
                    PLTFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PLTFR {
                match value {
                    false => PLTFR::_0,
                    true => PLTFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PLTFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PLTFR::_1
            }
        }
        #[doc = "Possible values of the field `DMF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMFR {
            #[doc = "Have not received matching data."]
            _0,
            #[doc = "Have received matching data."]
            _1,
        }
        impl DMFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMFR::_0 => false,
                    DMFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMFR {
                match value {
                    false => DMFR::_0,
                    true => DMFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMFR::_1
            }
        }
        #[doc = "Possible values of the field `MBF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MBFR {
            #[doc = "I2C Master is idle."]
            _0,
            #[doc = "I2C Master is busy."]
            _1,
        }
        impl MBFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MBFR::_0 => false,
                    MBFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MBFR {
                match value {
                    false => MBFR::_0,
                    true => MBFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MBFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MBFR::_1
            }
        }
        #[doc = "Possible values of the field `BBF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BBFR {
            #[doc = "I2C Bus is idle."]
            _0,
            #[doc = "I2C Bus is busy."]
            _1,
        }
        impl BBFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BBFR::_0 => false,
                    BBFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BBFR {
                match value {
                    false => BBFR::_0,
                    true => BBFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BBFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BBFR::_1
            }
        }
        #[doc = "Values that can be written to the field `EPF`"]
        pub enum EPFW {
            #[doc = "Master has not generated a STOP or Repeated START condition."]
            _0,
            #[doc = "Master has generated a STOP or Repeated START condition."]
            _1,
        }
        impl EPFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EPFW::_0 => false,
                    EPFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EPFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _EPFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EPFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Master has not generated a STOP or Repeated START condition."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EPFW::_0)
            }
            #[doc = "Master has generated a STOP or Repeated START condition."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EPFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SDF`"]
        pub enum SDFW {
            #[doc = "Master has not generated a STOP condition."]
            _0,
            #[doc = "Master has generated a STOP condition."]
            _1,
        }
        impl SDFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SDFW::_0 => false,
                    SDFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SDFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SDFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SDFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Master has not generated a STOP condition."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SDFW::_0)
            }
            #[doc = "Master has generated a STOP condition."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SDFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `NDF`"]
        pub enum NDFW {
            #[doc = "Unexpected NACK not detected."]
            _0,
            #[doc = "Unexpected NACK was detected."]
            _1,
        }
        impl NDFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    NDFW::_0 => false,
                    NDFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _NDFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NDFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: NDFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Unexpected NACK not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(NDFW::_0)
            }
            #[doc = "Unexpected NACK was detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(NDFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ALF`"]
        pub enum ALFW {
            #[doc = "Master has not lost arbitration."]
            _0,
            #[doc = "Master has lost arbitration."]
            _1,
        }
        impl ALFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ALFW::_0 => false,
                    ALFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ALFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ALFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ALFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Master has not lost arbitration."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ALFW::_0)
            }
            #[doc = "Master has lost arbitration."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ALFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FEF`"]
        pub enum FEFW {
            #[doc = "No error."]
            _0,
            #[doc = "Master sending or receiving data without START condition."]
            _1,
        }
        impl FEFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FEFW::_0 => false,
                    FEFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FEFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FEFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FEFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No error."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FEFW::_0)
            }
            #[doc = "Master sending or receiving data without START condition."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FEFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PLTF`"]
        pub enum PLTFW {
            #[doc = "Pin low timeout has not occurred or is disabled."]
            _0,
            #[doc = "Pin low timeout has occurred."]
            _1,
        }
        impl PLTFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PLTFW::_0 => false,
                    PLTFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PLTFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PLTFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PLTFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin low timeout has not occurred or is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PLTFW::_0)
            }
            #[doc = "Pin low timeout has occurred."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PLTFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMF`"]
        pub enum DMFW {
            #[doc = "Have not received matching data."]
            _0,
            #[doc = "Have received matching data."]
            _1,
        }
        impl DMFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMFW::_0 => false,
                    DMFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Have not received matching data."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMFW::_0)
            }
            #[doc = "Have received matching data."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Transmit Data Flag"]
            #[inline(always)]
            pub fn tdf(&self) -> TDFR {
                TDFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Receive Data Flag"]
            #[inline(always)]
            pub fn rdf(&self) -> RDFR {
                RDFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - End Packet Flag"]
            #[inline(always)]
            pub fn epf(&self) -> EPFR {
                EPFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - STOP Detect Flag"]
            #[inline(always)]
            pub fn sdf(&self) -> SDFR {
                SDFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - NACK Detect Flag"]
            #[inline(always)]
            pub fn ndf(&self) -> NDFR {
                NDFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 11 - Arbitration Lost Flag"]
            #[inline(always)]
            pub fn alf(&self) -> ALFR {
                ALFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - FIFO Error Flag"]
            #[inline(always)]
            pub fn fef(&self) -> FEFR {
                FEFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Pin Low Timeout Flag"]
            #[inline(always)]
            pub fn pltf(&self) -> PLTFR {
                PLTFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - Data Match Flag"]
            #[inline(always)]
            pub fn dmf(&self) -> DMFR {
                DMFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 24 - Master Busy Flag"]
            #[inline(always)]
            pub fn mbf(&self) -> MBFR {
                MBFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 25 - Bus Busy Flag"]
            #[inline(always)]
            pub fn bbf(&self) -> BBFR {
                BBFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 25;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 1 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 8 - End Packet Flag"]
            #[inline(always)]
            pub fn epf(&mut self) -> _EPFW {
                _EPFW { w: self }
            }
            #[doc = "Bit 9 - STOP Detect Flag"]
            #[inline(always)]
            pub fn sdf(&mut self) -> _SDFW {
                _SDFW { w: self }
            }
            #[doc = "Bit 10 - NACK Detect Flag"]
            #[inline(always)]
            pub fn ndf(&mut self) -> _NDFW {
                _NDFW { w: self }
            }
            #[doc = "Bit 11 - Arbitration Lost Flag"]
            #[inline(always)]
            pub fn alf(&mut self) -> _ALFW {
                _ALFW { w: self }
            }
            #[doc = "Bit 12 - FIFO Error Flag"]
            #[inline(always)]
            pub fn fef(&mut self) -> _FEFW {
                _FEFW { w: self }
            }
            #[doc = "Bit 13 - Pin Low Timeout Flag"]
            #[inline(always)]
            pub fn pltf(&mut self) -> _PLTFW {
                _PLTFW { w: self }
            }
            #[doc = "Bit 14 - Data Match Flag"]
            #[inline(always)]
            pub fn dmf(&mut self) -> _DMFW {
                _DMFW { w: self }
            }
        }
    }
    #[doc = "Master Interrupt Enable Register"]
    pub struct MIER {
        register: VolatileCell<u32>,
    }
    #[doc = "Master Interrupt Enable Register"]
    pub mod mier {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::MIER {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TDIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TDIER {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled"]
            _1,
        }
        impl TDIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TDIER::_0 => false,
                    TDIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TDIER {
                match value {
                    false => TDIER::_0,
                    true => TDIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TDIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TDIER::_1
            }
        }
        #[doc = "Possible values of the field `RDIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RDIER {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl RDIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RDIER::_0 => false,
                    RDIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RDIER {
                match value {
                    false => RDIER::_0,
                    true => RDIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RDIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RDIER::_1
            }
        }
        #[doc = "Possible values of the field `EPIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EPIER {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl EPIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EPIER::_0 => false,
                    EPIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EPIER {
                match value {
                    false => EPIER::_0,
                    true => EPIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EPIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EPIER::_1
            }
        }
        #[doc = "Possible values of the field `SDIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SDIER {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl SDIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SDIER::_0 => false,
                    SDIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SDIER {
                match value {
                    false => SDIER::_0,
                    true => SDIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SDIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SDIER::_1
            }
        }
        #[doc = "Possible values of the field `NDIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum NDIER {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl NDIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    NDIER::_0 => false,
                    NDIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> NDIER {
                match value {
                    false => NDIER::_0,
                    true => NDIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == NDIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == NDIER::_1
            }
        }
        #[doc = "Possible values of the field `ALIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ALIER {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl ALIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ALIER::_0 => false,
                    ALIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ALIER {
                match value {
                    false => ALIER::_0,
                    true => ALIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ALIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ALIER::_1
            }
        }
        #[doc = "Possible values of the field `FEIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FEIER {
            #[doc = "Interrupt enabled."]
            _0,
            #[doc = "Interrupt disabled."]
            _1,
        }
        impl FEIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FEIER::_0 => false,
                    FEIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FEIER {
                match value {
                    false => FEIER::_0,
                    true => FEIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FEIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FEIER::_1
            }
        }
        #[doc = "Possible values of the field `PLTIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PLTIER {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl PLTIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PLTIER::_0 => false,
                    PLTIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PLTIER {
                match value {
                    false => PLTIER::_0,
                    true => PLTIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PLTIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PLTIER::_1
            }
        }
        #[doc = "Possible values of the field `DMIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMIER {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl DMIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMIER::_0 => false,
                    DMIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMIER {
                match value {
                    false => DMIER::_0,
                    true => DMIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMIER::_1
            }
        }
        #[doc = "Values that can be written to the field `TDIE`"]
        pub enum TDIEW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled"]
            _1,
        }
        impl TDIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TDIEW::_0 => false,
                    TDIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TDIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TDIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TDIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TDIEW::_0)
            }
            #[doc = "Interrupt enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TDIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RDIE`"]
        pub enum RDIEW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl RDIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RDIEW::_0 => false,
                    RDIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RDIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RDIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RDIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RDIEW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RDIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `EPIE`"]
        pub enum EPIEW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl EPIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    EPIEW::_0 => false,
                    EPIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _EPIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _EPIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: EPIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(EPIEW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(EPIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SDIE`"]
        pub enum SDIEW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl SDIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SDIEW::_0 => false,
                    SDIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SDIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SDIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SDIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SDIEW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SDIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `NDIE`"]
        pub enum NDIEW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl NDIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    NDIEW::_0 => false,
                    NDIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _NDIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NDIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: NDIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(NDIEW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(NDIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ALIE`"]
        pub enum ALIEW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl ALIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ALIEW::_0 => false,
                    ALIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ALIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ALIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ALIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ALIEW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ALIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FEIE`"]
        pub enum FEIEW {
            #[doc = "Interrupt enabled."]
            _0,
            #[doc = "Interrupt disabled."]
            _1,
        }
        impl FEIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FEIEW::_0 => false,
                    FEIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FEIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FEIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FEIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FEIEW::_0)
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FEIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PLTIE`"]
        pub enum PLTIEW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl PLTIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PLTIEW::_0 => false,
                    PLTIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PLTIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PLTIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PLTIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PLTIEW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PLTIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMIE`"]
        pub enum DMIEW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl DMIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMIEW::_0 => false,
                    DMIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMIEW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Transmit Data Interrupt Enable"]
            #[inline(always)]
            pub fn tdie(&self) -> TDIER {
                TDIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Receive Data Interrupt Enable"]
            #[inline(always)]
            pub fn rdie(&self) -> RDIER {
                RDIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - End Packet Interrupt Enable"]
            #[inline(always)]
            pub fn epie(&self) -> EPIER {
                EPIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - STOP Detect Interrupt Enable"]
            #[inline(always)]
            pub fn sdie(&self) -> SDIER {
                SDIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - NACK Detect Interrupt Enable"]
            #[inline(always)]
            pub fn ndie(&self) -> NDIER {
                NDIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 11 - Arbitration Lost Interrupt Enable"]
            #[inline(always)]
            pub fn alie(&self) -> ALIER {
                ALIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - FIFO Error Interrupt Enable"]
            #[inline(always)]
            pub fn feie(&self) -> FEIER {
                FEIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Pin Low Timeout Interrupt Enable"]
            #[inline(always)]
            pub fn pltie(&self) -> PLTIER {
                PLTIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - Data Match Interrupt Enable"]
            #[inline(always)]
            pub fn dmie(&self) -> DMIER {
                DMIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Transmit Data Interrupt Enable"]
            #[inline(always)]
            pub fn tdie(&mut self) -> _TDIEW {
                _TDIEW { w: self }
            }
            #[doc = "Bit 1 - Receive Data Interrupt Enable"]
            #[inline(always)]
            pub fn rdie(&mut self) -> _RDIEW {
                _RDIEW { w: self }
            }
            #[doc = "Bit 8 - End Packet Interrupt Enable"]
            #[inline(always)]
            pub fn epie(&mut self) -> _EPIEW {
                _EPIEW { w: self }
            }
            #[doc = "Bit 9 - STOP Detect Interrupt Enable"]
            #[inline(always)]
            pub fn sdie(&mut self) -> _SDIEW {
                _SDIEW { w: self }
            }
            #[doc = "Bit 10 - NACK Detect Interrupt Enable"]
            #[inline(always)]
            pub fn ndie(&mut self) -> _NDIEW {
                _NDIEW { w: self }
            }
            #[doc = "Bit 11 - Arbitration Lost Interrupt Enable"]
            #[inline(always)]
            pub fn alie(&mut self) -> _ALIEW {
                _ALIEW { w: self }
            }
            #[doc = "Bit 12 - FIFO Error Interrupt Enable"]
            #[inline(always)]
            pub fn feie(&mut self) -> _FEIEW {
                _FEIEW { w: self }
            }
            #[doc = "Bit 13 - Pin Low Timeout Interrupt Enable"]
            #[inline(always)]
            pub fn pltie(&mut self) -> _PLTIEW {
                _PLTIEW { w: self }
            }
            #[doc = "Bit 14 - Data Match Interrupt Enable"]
            #[inline(always)]
            pub fn dmie(&mut self) -> _DMIEW {
                _DMIEW { w: self }
            }
        }
    }
    #[doc = "Master DMA Enable Register"]
    pub struct MDER {
        register: VolatileCell<u32>,
    }
    #[doc = "Master DMA Enable Register"]
    pub mod mder {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::MDER {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TDDE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TDDER {
            #[doc = "DMA request disabled."]
            _0,
            #[doc = "DMA request enabled"]
            _1,
        }
        impl TDDER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TDDER::_0 => false,
                    TDDER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TDDER {
                match value {
                    false => TDDER::_0,
                    true => TDDER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TDDER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TDDER::_1
            }
        }
        #[doc = "Possible values of the field `RDDE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RDDER {
            #[doc = "DMA request disabled."]
            _0,
            #[doc = "DMA request enabled."]
            _1,
        }
        impl RDDER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RDDER::_0 => false,
                    RDDER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RDDER {
                match value {
                    false => RDDER::_0,
                    true => RDDER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RDDER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RDDER::_1
            }
        }
        #[doc = "Values that can be written to the field `TDDE`"]
        pub enum TDDEW {
            #[doc = "DMA request disabled."]
            _0,
            #[doc = "DMA request enabled"]
            _1,
        }
        impl TDDEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TDDEW::_0 => false,
                    TDDEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TDDEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TDDEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TDDEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA request disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TDDEW::_0)
            }
            #[doc = "DMA request enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TDDEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RDDE`"]
        pub enum RDDEW {
            #[doc = "DMA request disabled."]
            _0,
            #[doc = "DMA request enabled."]
            _1,
        }
        impl RDDEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RDDEW::_0 => false,
                    RDDEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RDDEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RDDEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RDDEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA request disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RDDEW::_0)
            }
            #[doc = "DMA request enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RDDEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Transmit Data DMA Enable"]
            #[inline(always)]
            pub fn tdde(&self) -> TDDER {
                TDDER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Receive Data DMA Enable"]
            #[inline(always)]
            pub fn rdde(&self) -> RDDER {
                RDDER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Transmit Data DMA Enable"]
            #[inline(always)]
            pub fn tdde(&mut self) -> _TDDEW {
                _TDDEW { w: self }
            }
            #[doc = "Bit 1 - Receive Data DMA Enable"]
            #[inline(always)]
            pub fn rdde(&mut self) -> _RDDEW {
                _RDDEW { w: self }
            }
        }
    }
    #[doc = "Master Configuration Register 0"]
    pub struct MCFGR0 {
        register: VolatileCell<u32>,
    }
    #[doc = "Master Configuration Register 0"]
    pub mod mcfgr0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::MCFGR0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `HREN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HRENR {
            #[doc = "Host request input is disabled."]
            _0,
            #[doc = "Host request input is enabled."]
            _1,
        }
        impl HRENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HRENR::_0 => false,
                    HRENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HRENR {
                match value {
                    false => HRENR::_0,
                    true => HRENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HRENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HRENR::_1
            }
        }
        #[doc = "Possible values of the field `HRPOL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HRPOLR {
            #[doc = "Active low."]
            _0,
            #[doc = "Active high."]
            _1,
        }
        impl HRPOLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HRPOLR::_0 => false,
                    HRPOLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HRPOLR {
                match value {
                    false => HRPOLR::_0,
                    true => HRPOLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HRPOLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HRPOLR::_1
            }
        }
        #[doc = "Possible values of the field `HRSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HRSELR {
            #[doc = "Host request input is pin HREQ."]
            _0,
            #[doc = "Host request input is input trigger."]
            _1,
        }
        impl HRSELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HRSELR::_0 => false,
                    HRSELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HRSELR {
                match value {
                    false => HRSELR::_0,
                    true => HRSELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HRSELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HRSELR::_1
            }
        }
        #[doc = "Possible values of the field `CIRFIFO`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CIRFIFOR {
            #[doc = "Circular FIFO is disabled."]
            _0,
            #[doc = "Circular FIFO is enabled."]
            _1,
        }
        impl CIRFIFOR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CIRFIFOR::_0 => false,
                    CIRFIFOR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CIRFIFOR {
                match value {
                    false => CIRFIFOR::_0,
                    true => CIRFIFOR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CIRFIFOR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CIRFIFOR::_1
            }
        }
        #[doc = "Possible values of the field `RDMO`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RDMOR {
            #[doc = "Received data is stored in the receive FIFO as normal."]
            _0,
            #[doc = "Received data is discarded unless the RMF is set."]
            _1,
        }
        impl RDMOR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RDMOR::_0 => false,
                    RDMOR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RDMOR {
                match value {
                    false => RDMOR::_0,
                    true => RDMOR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RDMOR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RDMOR::_1
            }
        }
        #[doc = "Values that can be written to the field `HREN`"]
        pub enum HRENW {
            #[doc = "Host request input is disabled."]
            _0,
            #[doc = "Host request input is enabled."]
            _1,
        }
        impl HRENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HRENW::_0 => false,
                    HRENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HRENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HRENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HRENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Host request input is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HRENW::_0)
            }
            #[doc = "Host request input is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HRENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `HRPOL`"]
        pub enum HRPOLW {
            #[doc = "Active low."]
            _0,
            #[doc = "Active high."]
            _1,
        }
        impl HRPOLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HRPOLW::_0 => false,
                    HRPOLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HRPOLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HRPOLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HRPOLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Active low."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HRPOLW::_0)
            }
            #[doc = "Active high."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HRPOLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `HRSEL`"]
        pub enum HRSELW {
            #[doc = "Host request input is pin HREQ."]
            _0,
            #[doc = "Host request input is input trigger."]
            _1,
        }
        impl HRSELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HRSELW::_0 => false,
                    HRSELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HRSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HRSELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HRSELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Host request input is pin HREQ."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HRSELW::_0)
            }
            #[doc = "Host request input is input trigger."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HRSELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CIRFIFO`"]
        pub enum CIRFIFOW {
            #[doc = "Circular FIFO is disabled."]
            _0,
            #[doc = "Circular FIFO is enabled."]
            _1,
        }
        impl CIRFIFOW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CIRFIFOW::_0 => false,
                    CIRFIFOW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CIRFIFOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CIRFIFOW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CIRFIFOW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Circular FIFO is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CIRFIFOW::_0)
            }
            #[doc = "Circular FIFO is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CIRFIFOW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RDMO`"]
        pub enum RDMOW {
            #[doc = "Received data is stored in the receive FIFO as normal."]
            _0,
            #[doc = "Received data is discarded unless the RMF is set."]
            _1,
        }
        impl RDMOW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RDMOW::_0 => false,
                    RDMOW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RDMOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RDMOW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RDMOW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Received data is stored in the receive FIFO as normal."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RDMOW::_0)
            }
            #[doc = "Received data is discarded unless the RMF is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RDMOW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Host Request Enable"]
            #[inline(always)]
            pub fn hren(&self) -> HRENR {
                HRENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Host Request Polarity"]
            #[inline(always)]
            pub fn hrpol(&self) -> HRPOLR {
                HRPOLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Host Request Select"]
            #[inline(always)]
            pub fn hrsel(&self) -> HRSELR {
                HRSELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Circular FIFO Enable"]
            #[inline(always)]
            pub fn cirfifo(&self) -> CIRFIFOR {
                CIRFIFOR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Receive Data Match Only"]
            #[inline(always)]
            pub fn rdmo(&self) -> RDMOR {
                RDMOR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Host Request Enable"]
            #[inline(always)]
            pub fn hren(&mut self) -> _HRENW {
                _HRENW { w: self }
            }
            #[doc = "Bit 1 - Host Request Polarity"]
            #[inline(always)]
            pub fn hrpol(&mut self) -> _HRPOLW {
                _HRPOLW { w: self }
            }
            #[doc = "Bit 2 - Host Request Select"]
            #[inline(always)]
            pub fn hrsel(&mut self) -> _HRSELW {
                _HRSELW { w: self }
            }
            #[doc = "Bit 8 - Circular FIFO Enable"]
            #[inline(always)]
            pub fn cirfifo(&mut self) -> _CIRFIFOW {
                _CIRFIFOW { w: self }
            }
            #[doc = "Bit 9 - Receive Data Match Only"]
            #[inline(always)]
            pub fn rdmo(&mut self) -> _RDMOW {
                _RDMOW { w: self }
            }
        }
    }
    #[doc = "Master Configuration Register 1"]
    pub struct MCFGR1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Master Configuration Register 1"]
    pub mod mcfgr1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::MCFGR1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PRESCALE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PRESCALER {
            #[doc = "Divide by 1."]
            _000,
            #[doc = "Divide by 2."]
            _001,
            #[doc = "Divide by 4."]
            _010,
            #[doc = "Divide by 8."]
            _011,
            #[doc = "Divide by 16."]
            _100,
            #[doc = "Divide by 32."]
            _101,
            #[doc = "Divide by 64."]
            _110,
            #[doc = "Divide by 128."]
            _111,
        }
        impl PRESCALER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PRESCALER::_000 => 0,
                    PRESCALER::_001 => 1,
                    PRESCALER::_010 => 2,
                    PRESCALER::_011 => 3,
                    PRESCALER::_100 => 4,
                    PRESCALER::_101 => 5,
                    PRESCALER::_110 => 6,
                    PRESCALER::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PRESCALER {
                match value {
                    0 => PRESCALER::_000,
                    1 => PRESCALER::_001,
                    2 => PRESCALER::_010,
                    3 => PRESCALER::_011,
                    4 => PRESCALER::_100,
                    5 => PRESCALER::_101,
                    6 => PRESCALER::_110,
                    7 => PRESCALER::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == PRESCALER::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == PRESCALER::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == PRESCALER::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == PRESCALER::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == PRESCALER::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == PRESCALER::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == PRESCALER::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == PRESCALER::_111
            }
        }
        #[doc = "Possible values of the field `AUTOSTOP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum AUTOSTOPR {
            #[doc = "No effect."]
            _0,
            #[doc = "STOP condition is automatically generated whenever the transmit FIFO is empty and LPI2C master is busy."]
            _1,
        }
        impl AUTOSTOPR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    AUTOSTOPR::_0 => false,
                    AUTOSTOPR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> AUTOSTOPR {
                match value {
                    false => AUTOSTOPR::_0,
                    true => AUTOSTOPR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == AUTOSTOPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == AUTOSTOPR::_1
            }
        }
        #[doc = "Possible values of the field `IGNACK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IGNACKR {
            #[doc = "LPI2C Master will receive ACK and NACK normally."]
            _0,
            #[doc = "LPI2C Master will treat a received NACK as if it was an ACK."]
            _1,
        }
        impl IGNACKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    IGNACKR::_0 => false,
                    IGNACKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> IGNACKR {
                match value {
                    false => IGNACKR::_0,
                    true => IGNACKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == IGNACKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == IGNACKR::_1
            }
        }
        #[doc = "Possible values of the field `TIMECFG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIMECFGR {
            #[doc = "Pin Low Timeout Flag will set if SCL is low for longer than the configured timeout."]
            _0,
            #[doc = "Pin Low Timeout Flag will set if either SCL or SDA is low for longer than the configured timeout."]
            _1,
        }
        impl TIMECFGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TIMECFGR::_0 => false,
                    TIMECFGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TIMECFGR {
                match value {
                    false => TIMECFGR::_0,
                    true => TIMECFGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIMECFGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TIMECFGR::_1
            }
        }
        #[doc = "Possible values of the field `MATCFG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MATCFGR {
            #[doc = "Match disabled."]
            _000,
            #[doc = "Match enabled (1st data word equals MATCH0 OR MATCH1)."]
            _010,
            #[doc = "Match enabled (any data word equals MATCH0 OR MATCH1)."]
            _011,
            #[doc = "Match enabled (1st data word equals MATCH0 AND 2nd data word equals MATCH1)."]
            _100,
            #[doc = "Match enabled (any data word equals MATCH0 AND next data word equals MATCH1)."]
            _101,
            #[doc = "Match enabled (1st data word AND MATCH1 equals MATCH0 AND MATCH1)."]
            _110,
            #[doc = "Match enabled (any data word AND MATCH1 equals MATCH0 AND MATCH1)."]
            _111,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl MATCFGR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MATCFGR::_000 => 0,
                    MATCFGR::_010 => 2,
                    MATCFGR::_011 => 3,
                    MATCFGR::_100 => 4,
                    MATCFGR::_101 => 5,
                    MATCFGR::_110 => 6,
                    MATCFGR::_111 => 7,
                    MATCFGR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MATCFGR {
                match value {
                    0 => MATCFGR::_000,
                    2 => MATCFGR::_010,
                    3 => MATCFGR::_011,
                    4 => MATCFGR::_100,
                    5 => MATCFGR::_101,
                    6 => MATCFGR::_110,
                    7 => MATCFGR::_111,
                    i => MATCFGR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MATCFGR::_000
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MATCFGR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MATCFGR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MATCFGR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MATCFGR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MATCFGR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MATCFGR::_111
            }
        }
        #[doc = "Possible values of the field `PINCFG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PINCFGR {
            #[doc = "LPI2C configured for 2-pin open drain mode."]
            _000,
            #[doc = "LPI2C configured for 2-pin output only mode (ultra-fast mode)."]
            _001,
            #[doc = "LPI2C configured for 2-pin push-pull mode."]
            _010,
            #[doc = "LPI2C configured for 4-pin push-pull mode."]
            _011,
            #[doc = "LPI2C configured for 2-pin open drain mode with separate LPI2C slave."]
            _100,
            #[doc = "LPI2C configured for 2-pin output only mode (ultra-fast mode) with separate LPI2C slave."]
            _101,
            #[doc = "LPI2C configured for 2-pin push-pull mode with separate LPI2C slave."]
            _110,
            #[doc = "LPI2C configured for 4-pin push-pull mode (inverted outputs)."]
            _111,
        }
        impl PINCFGR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PINCFGR::_000 => 0,
                    PINCFGR::_001 => 1,
                    PINCFGR::_010 => 2,
                    PINCFGR::_011 => 3,
                    PINCFGR::_100 => 4,
                    PINCFGR::_101 => 5,
                    PINCFGR::_110 => 6,
                    PINCFGR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PINCFGR {
                match value {
                    0 => PINCFGR::_000,
                    1 => PINCFGR::_001,
                    2 => PINCFGR::_010,
                    3 => PINCFGR::_011,
                    4 => PINCFGR::_100,
                    5 => PINCFGR::_101,
                    6 => PINCFGR::_110,
                    7 => PINCFGR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == PINCFGR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == PINCFGR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == PINCFGR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == PINCFGR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == PINCFGR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == PINCFGR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == PINCFGR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == PINCFGR::_111
            }
        }
        #[doc = "Values that can be written to the field `PRESCALE`"]
        pub enum PRESCALEW {
            #[doc = "Divide by 1."]
            _000,
            #[doc = "Divide by 2."]
            _001,
            #[doc = "Divide by 4."]
            _010,
            #[doc = "Divide by 8."]
            _011,
            #[doc = "Divide by 16."]
            _100,
            #[doc = "Divide by 32."]
            _101,
            #[doc = "Divide by 64."]
            _110,
            #[doc = "Divide by 128."]
            _111,
        }
        impl PRESCALEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PRESCALEW::_000 => 0,
                    PRESCALEW::_001 => 1,
                    PRESCALEW::_010 => 2,
                    PRESCALEW::_011 => 3,
                    PRESCALEW::_100 => 4,
                    PRESCALEW::_101 => 5,
                    PRESCALEW::_110 => 6,
                    PRESCALEW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PRESCALEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PRESCALEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PRESCALEW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Divide by 1."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(PRESCALEW::_000)
            }
            #[doc = "Divide by 2."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(PRESCALEW::_001)
            }
            #[doc = "Divide by 4."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(PRESCALEW::_010)
            }
            #[doc = "Divide by 8."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(PRESCALEW::_011)
            }
            #[doc = "Divide by 16."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(PRESCALEW::_100)
            }
            #[doc = "Divide by 32."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(PRESCALEW::_101)
            }
            #[doc = "Divide by 64."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(PRESCALEW::_110)
            }
            #[doc = "Divide by 128."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(PRESCALEW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `AUTOSTOP`"]
        pub enum AUTOSTOPW {
            #[doc = "No effect."]
            _0,
            #[doc = "STOP condition is automatically generated whenever the transmit FIFO is empty and LPI2C master is busy."]
            _1,
        }
        impl AUTOSTOPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    AUTOSTOPW::_0 => false,
                    AUTOSTOPW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _AUTOSTOPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _AUTOSTOPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: AUTOSTOPW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No effect."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(AUTOSTOPW::_0)
            }
            #[doc = "STOP condition is automatically generated whenever the transmit FIFO is empty and LPI2C master is busy."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(AUTOSTOPW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IGNACK`"]
        pub enum IGNACKW {
            #[doc = "LPI2C Master will receive ACK and NACK normally."]
            _0,
            #[doc = "LPI2C Master will treat a received NACK as if it was an ACK."]
            _1,
        }
        impl IGNACKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    IGNACKW::_0 => false,
                    IGNACKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IGNACKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IGNACKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IGNACKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "LPI2C Master will receive ACK and NACK normally."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(IGNACKW::_0)
            }
            #[doc = "LPI2C Master will treat a received NACK as if it was an ACK."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(IGNACKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TIMECFG`"]
        pub enum TIMECFGW {
            #[doc = "Pin Low Timeout Flag will set if SCL is low for longer than the configured timeout."]
            _0,
            #[doc = "Pin Low Timeout Flag will set if either SCL or SDA is low for longer than the configured timeout."]
            _1,
        }
        impl TIMECFGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TIMECFGW::_0 => false,
                    TIMECFGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIMECFGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIMECFGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIMECFGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Pin Low Timeout Flag will set if SCL is low for longer than the configured timeout."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIMECFGW::_0)
            }
            #[doc = "Pin Low Timeout Flag will set if either SCL or SDA is low for longer than the configured timeout."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TIMECFGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MATCFG`"]
        pub enum MATCFGW {
            #[doc = "Match disabled."]
            _000,
            #[doc = "Match enabled (1st data word equals MATCH0 OR MATCH1)."]
            _010,
            #[doc = "Match enabled (any data word equals MATCH0 OR MATCH1)."]
            _011,
            #[doc = "Match enabled (1st data word equals MATCH0 AND 2nd data word equals MATCH1)."]
            _100,
            #[doc = "Match enabled (any data word equals MATCH0 AND next data word equals MATCH1)."]
            _101,
            #[doc = "Match enabled (1st data word AND MATCH1 equals MATCH0 AND MATCH1)."]
            _110,
            #[doc = "Match enabled (any data word AND MATCH1 equals MATCH0 AND MATCH1)."]
            _111,
        }
        impl MATCFGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MATCFGW::_000 => 0,
                    MATCFGW::_010 => 2,
                    MATCFGW::_011 => 3,
                    MATCFGW::_100 => 4,
                    MATCFGW::_101 => 5,
                    MATCFGW::_110 => 6,
                    MATCFGW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MATCFGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MATCFGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MATCFGW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Match disabled."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MATCFGW::_000)
            }
            #[doc = "Match enabled (1st data word equals MATCH0 OR MATCH1)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MATCFGW::_010)
            }
            #[doc = "Match enabled (any data word equals MATCH0 OR MATCH1)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MATCFGW::_011)
            }
            #[doc = "Match enabled (1st data word equals MATCH0 AND 2nd data word equals MATCH1)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MATCFGW::_100)
            }
            #[doc = "Match enabled (any data word equals MATCH0 AND next data word equals MATCH1)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MATCFGW::_101)
            }
            #[doc = "Match enabled (1st data word AND MATCH1 equals MATCH0 AND MATCH1)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MATCFGW::_110)
            }
            #[doc = "Match enabled (any data word AND MATCH1 equals MATCH0 AND MATCH1)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MATCFGW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PINCFG`"]
        pub enum PINCFGW {
            #[doc = "LPI2C configured for 2-pin open drain mode."]
            _000,
            #[doc = "LPI2C configured for 2-pin output only mode (ultra-fast mode)."]
            _001,
            #[doc = "LPI2C configured for 2-pin push-pull mode."]
            _010,
            #[doc = "LPI2C configured for 4-pin push-pull mode."]
            _011,
            #[doc = "LPI2C configured for 2-pin open drain mode with separate LPI2C slave."]
            _100,
            #[doc = "LPI2C configured for 2-pin output only mode (ultra-fast mode) with separate LPI2C slave."]
            _101,
            #[doc = "LPI2C configured for 2-pin push-pull mode with separate LPI2C slave."]
            _110,
            #[doc = "LPI2C configured for 4-pin push-pull mode (inverted outputs)."]
            _111,
        }
        impl PINCFGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PINCFGW::_000 => 0,
                    PINCFGW::_001 => 1,
                    PINCFGW::_010 => 2,
                    PINCFGW::_011 => 3,
                    PINCFGW::_100 => 4,
                    PINCFGW::_101 => 5,
                    PINCFGW::_110 => 6,
                    PINCFGW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PINCFGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PINCFGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PINCFGW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "LPI2C configured for 2-pin open drain mode."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(PINCFGW::_000)
            }
            #[doc = "LPI2C configured for 2-pin output only mode (ultra-fast mode)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(PINCFGW::_001)
            }
            #[doc = "LPI2C configured for 2-pin push-pull mode."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(PINCFGW::_010)
            }
            #[doc = "LPI2C configured for 4-pin push-pull mode."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(PINCFGW::_011)
            }
            #[doc = "LPI2C configured for 2-pin open drain mode with separate LPI2C slave."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(PINCFGW::_100)
            }
            #[doc = "LPI2C configured for 2-pin output only mode (ultra-fast mode) with separate LPI2C slave."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(PINCFGW::_101)
            }
            #[doc = "LPI2C configured for 2-pin push-pull mode with separate LPI2C slave."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(PINCFGW::_110)
            }
            #[doc = "LPI2C configured for 4-pin push-pull mode (inverted outputs)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(PINCFGW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:2 - Prescaler"]
            #[inline(always)]
            pub fn prescale(&self) -> PRESCALER {
                PRESCALER::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 8 - Automatic STOP Generation"]
            #[inline(always)]
            pub fn autostop(&self) -> AUTOSTOPR {
                AUTOSTOPR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - IGNACK"]
            #[inline(always)]
            pub fn ignack(&self) -> IGNACKR {
                IGNACKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Timeout Configuration"]
            #[inline(always)]
            pub fn timecfg(&self) -> TIMECFGR {
                TIMECFGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:18 - Match Configuration"]
            #[inline(always)]
            pub fn matcfg(&self) -> MATCFGR {
                MATCFGR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 24:26 - Pin Configuration"]
            #[inline(always)]
            pub fn pincfg(&self) -> PINCFGR {
                PINCFGR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:2 - Prescaler"]
            #[inline(always)]
            pub fn prescale(&mut self) -> _PRESCALEW {
                _PRESCALEW { w: self }
            }
            #[doc = "Bit 8 - Automatic STOP Generation"]
            #[inline(always)]
            pub fn autostop(&mut self) -> _AUTOSTOPW {
                _AUTOSTOPW { w: self }
            }
            #[doc = "Bit 9 - IGNACK"]
            #[inline(always)]
            pub fn ignack(&mut self) -> _IGNACKW {
                _IGNACKW { w: self }
            }
            #[doc = "Bit 10 - Timeout Configuration"]
            #[inline(always)]
            pub fn timecfg(&mut self) -> _TIMECFGW {
                _TIMECFGW { w: self }
            }
            #[doc = "Bits 16:18 - Match Configuration"]
            #[inline(always)]
            pub fn matcfg(&mut self) -> _MATCFGW {
                _MATCFGW { w: self }
            }
            #[doc = "Bits 24:26 - Pin Configuration"]
            #[inline(always)]
            pub fn pincfg(&mut self) -> _PINCFGW {
                _PINCFGW { w: self }
            }
        }
    }
    #[doc = "Master Configuration Register 2"]
    pub struct MCFGR2 {
        register: VolatileCell<u32>,
    }
    #[doc = "Master Configuration Register 2"]
    pub mod mcfgr2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::MCFGR2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct BUSIDLER {
            bits: u16,
        }
        impl BUSIDLER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct FILTSCLR {
            bits: u8,
        }
        impl FILTSCLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct FILTSDAR {
            bits: u8,
        }
        impl FILTSDAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _BUSIDLEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BUSIDLEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 4095;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _FILTSCLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FILTSCLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _FILTSDAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FILTSDAW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:11 - Bus Idle Timeout"]
            #[inline(always)]
            pub fn busidle(&self) -> BUSIDLER {
                let bits = {
                    const MASK: u16 = 4095;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                BUSIDLER { bits }
            }
            #[doc = "Bits 16:19 - Glitch Filter SCL"]
            #[inline(always)]
            pub fn filtscl(&self) -> FILTSCLR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                FILTSCLR { bits }
            }
            #[doc = "Bits 24:27 - Glitch Filter SDA"]
            #[inline(always)]
            pub fn filtsda(&self) -> FILTSDAR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                FILTSDAR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:11 - Bus Idle Timeout"]
            #[inline(always)]
            pub fn busidle(&mut self) -> _BUSIDLEW {
                _BUSIDLEW { w: self }
            }
            #[doc = "Bits 16:19 - Glitch Filter SCL"]
            #[inline(always)]
            pub fn filtscl(&mut self) -> _FILTSCLW {
                _FILTSCLW { w: self }
            }
            #[doc = "Bits 24:27 - Glitch Filter SDA"]
            #[inline(always)]
            pub fn filtsda(&mut self) -> _FILTSDAW {
                _FILTSDAW { w: self }
            }
        }
    }
    #[doc = "Master Configuration Register 3"]
    pub struct MCFGR3 {
        register: VolatileCell<u32>,
    }
    #[doc = "Master Configuration Register 3"]
    pub mod mcfgr3 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::MCFGR3 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct PINLOWR {
            bits: u16,
        }
        impl PINLOWR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _PINLOWW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PINLOWW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 4095;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 8:19 - Pin Low Timeout"]
            #[inline(always)]
            pub fn pinlow(&self) -> PINLOWR {
                let bits = {
                    const MASK: u16 = 4095;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                PINLOWR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 8:19 - Pin Low Timeout"]
            #[inline(always)]
            pub fn pinlow(&mut self) -> _PINLOWW {
                _PINLOWW { w: self }
            }
        }
    }
    #[doc = "Master Data Match Register"]
    pub struct MDMR {
        register: VolatileCell<u32>,
    }
    #[doc = "Master Data Match Register"]
    pub mod mdmr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::MDMR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MATCH0R {
            bits: u8,
        }
        impl MATCH0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct MATCH1R {
            bits: u8,
        }
        impl MATCH1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MATCH0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MATCH0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MATCH1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MATCH1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Match 0 Value"]
            #[inline(always)]
            pub fn match0(&self) -> MATCH0R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                MATCH0R { bits }
            }
            #[doc = "Bits 16:23 - Match 1 Value"]
            #[inline(always)]
            pub fn match1(&self) -> MATCH1R {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                MATCH1R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Match 0 Value"]
            #[inline(always)]
            pub fn match0(&mut self) -> _MATCH0W {
                _MATCH0W { w: self }
            }
            #[doc = "Bits 16:23 - Match 1 Value"]
            #[inline(always)]
            pub fn match1(&mut self) -> _MATCH1W {
                _MATCH1W { w: self }
            }
        }
    }
    #[doc = "Master Clock Configuration Register 0"]
    pub struct MCCR0 {
        register: VolatileCell<u32>,
    }
    #[doc = "Master Clock Configuration Register 0"]
    pub mod mccr0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::MCCR0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CLKLOR {
            bits: u8,
        }
        impl CLKLOR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct CLKHIR {
            bits: u8,
        }
        impl CLKHIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct SETHOLDR {
            bits: u8,
        }
        impl SETHOLDR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATAVDR {
            bits: u8,
        }
        impl DATAVDR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLKLOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLKLOW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLKHIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLKHIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SETHOLDW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SETHOLDW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATAVDW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATAVDW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Clock Low Period"]
            #[inline(always)]
            pub fn clklo(&self) -> CLKLOR {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CLKLOR { bits }
            }
            #[doc = "Bits 8:13 - Clock High Period"]
            #[inline(always)]
            pub fn clkhi(&self) -> CLKHIR {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CLKHIR { bits }
            }
            #[doc = "Bits 16:21 - Setup Hold Delay"]
            #[inline(always)]
            pub fn sethold(&self) -> SETHOLDR {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SETHOLDR { bits }
            }
            #[doc = "Bits 24:29 - Data Valid Delay"]
            #[inline(always)]
            pub fn datavd(&self) -> DATAVDR {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATAVDR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - Clock Low Period"]
            #[inline(always)]
            pub fn clklo(&mut self) -> _CLKLOW {
                _CLKLOW { w: self }
            }
            #[doc = "Bits 8:13 - Clock High Period"]
            #[inline(always)]
            pub fn clkhi(&mut self) -> _CLKHIW {
                _CLKHIW { w: self }
            }
            #[doc = "Bits 16:21 - Setup Hold Delay"]
            #[inline(always)]
            pub fn sethold(&mut self) -> _SETHOLDW {
                _SETHOLDW { w: self }
            }
            #[doc = "Bits 24:29 - Data Valid Delay"]
            #[inline(always)]
            pub fn datavd(&mut self) -> _DATAVDW {
                _DATAVDW { w: self }
            }
        }
    }
    #[doc = "Master Clock Configuration Register 1"]
    pub struct MCCR1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Master Clock Configuration Register 1"]
    pub mod mccr1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::MCCR1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CLKLOR {
            bits: u8,
        }
        impl CLKLOR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct CLKHIR {
            bits: u8,
        }
        impl CLKHIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct SETHOLDR {
            bits: u8,
        }
        impl SETHOLDR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATAVDR {
            bits: u8,
        }
        impl DATAVDR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLKLOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLKLOW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLKHIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLKHIW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SETHOLDW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SETHOLDW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATAVDW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATAVDW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:5 - Clock Low Period"]
            #[inline(always)]
            pub fn clklo(&self) -> CLKLOR {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CLKLOR { bits }
            }
            #[doc = "Bits 8:13 - Clock High Period"]
            #[inline(always)]
            pub fn clkhi(&self) -> CLKHIR {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CLKHIR { bits }
            }
            #[doc = "Bits 16:21 - Setup Hold Delay"]
            #[inline(always)]
            pub fn sethold(&self) -> SETHOLDR {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                SETHOLDR { bits }
            }
            #[doc = "Bits 24:29 - Data Valid Delay"]
            #[inline(always)]
            pub fn datavd(&self) -> DATAVDR {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATAVDR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:5 - Clock Low Period"]
            #[inline(always)]
            pub fn clklo(&mut self) -> _CLKLOW {
                _CLKLOW { w: self }
            }
            #[doc = "Bits 8:13 - Clock High Period"]
            #[inline(always)]
            pub fn clkhi(&mut self) -> _CLKHIW {
                _CLKHIW { w: self }
            }
            #[doc = "Bits 16:21 - Setup Hold Delay"]
            #[inline(always)]
            pub fn sethold(&mut self) -> _SETHOLDW {
                _SETHOLDW { w: self }
            }
            #[doc = "Bits 24:29 - Data Valid Delay"]
            #[inline(always)]
            pub fn datavd(&mut self) -> _DATAVDW {
                _DATAVDW { w: self }
            }
        }
    }
    #[doc = "Master FIFO Control Register"]
    pub struct MFCR {
        register: VolatileCell<u32>,
    }
    #[doc = "Master FIFO Control Register"]
    pub mod mfcr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::MFCR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct TXWATERR {
            bits: u8,
        }
        impl TXWATERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct RXWATERR {
            bits: u8,
        }
        impl RXWATERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXWATERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXWATERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXWATERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXWATERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:1 - Transmit FIFO Watermark"]
            #[inline(always)]
            pub fn txwater(&self) -> TXWATERR {
                let bits = {
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TXWATERR { bits }
            }
            #[doc = "Bits 16:17 - Receive FIFO Watermark"]
            #[inline(always)]
            pub fn rxwater(&self) -> RXWATERR {
                let bits = {
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                RXWATERR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:1 - Transmit FIFO Watermark"]
            #[inline(always)]
            pub fn txwater(&mut self) -> _TXWATERW {
                _TXWATERW { w: self }
            }
            #[doc = "Bits 16:17 - Receive FIFO Watermark"]
            #[inline(always)]
            pub fn rxwater(&mut self) -> _RXWATERW {
                _RXWATERW { w: self }
            }
        }
    }
    #[doc = "Master FIFO Status Register"]
    pub struct MFSR {
        register: VolatileCell<u32>,
    }
    #[doc = "Master FIFO Status Register"]
    pub mod mfsr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::MFSR {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct TXCOUNTR {
            bits: u8,
        }
        impl TXCOUNTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct RXCOUNTR {
            bits: u8,
        }
        impl RXCOUNTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:2 - Transmit FIFO Count"]
            #[inline(always)]
            pub fn txcount(&self) -> TXCOUNTR {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TXCOUNTR { bits }
            }
            #[doc = "Bits 16:18 - Receive FIFO Count"]
            #[inline(always)]
            pub fn rxcount(&self) -> RXCOUNTR {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                RXCOUNTR { bits }
            }
        }
    }
    #[doc = "Master Transmit Data Register"]
    pub struct MTDR {
        register: VolatileCell<u32>,
    }
    #[doc = "Master Transmit Data Register"]
    pub mod mtdr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::MTDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATAW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CMD`"]
        pub enum CMDW {
            #[doc = "Transmit DATA[7:0]."]
            _000,
            #[doc = "Receive (DATA[7:0] + 1) bytes."]
            _001,
            #[doc = "Generate STOP condition."]
            _010,
            #[doc = "Receive and discard (DATA[7:0] + 1) bytes."]
            _011,
            #[doc = "Generate (repeated) START and transmit address in DATA[7:0]."]
            _100,
            #[doc = "Generate (repeated) START and transmit address in DATA[7:0]. This transfer expects a NACK to be returned."]
            _101,
            #[doc = "Generate (repeated) START and transmit address in DATA[7:0] using high speed mode."]
            _110,
            #[doc = "Generate (repeated) START and transmit address in DATA[7:0] using high speed mode. This transfer expects a NACK to be returned."]
            _111,
        }
        impl CMDW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    CMDW::_000 => 0,
                    CMDW::_001 => 1,
                    CMDW::_010 => 2,
                    CMDW::_011 => 3,
                    CMDW::_100 => 4,
                    CMDW::_101 => 5,
                    CMDW::_110 => 6,
                    CMDW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CMDW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CMDW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CMDW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Transmit DATA[7:0]."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(CMDW::_000)
            }
            #[doc = "Receive (DATA[7:0] + 1) bytes."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(CMDW::_001)
            }
            #[doc = "Generate STOP condition."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(CMDW::_010)
            }
            #[doc = "Receive and discard (DATA[7:0] + 1) bytes."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(CMDW::_011)
            }
            #[doc = "Generate (repeated) START and transmit address in DATA[7:0]."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(CMDW::_100)
            }
            #[doc = "Generate (repeated) START and transmit address in DATA[7:0]. This transfer expects a NACK to be returned."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(CMDW::_101)
            }
            #[doc = "Generate (repeated) START and transmit address in DATA[7:0] using high speed mode."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(CMDW::_110)
            }
            #[doc = "Generate (repeated) START and transmit address in DATA[7:0] using high speed mode. This transfer expects a NACK to be returned."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(CMDW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Transmit Data"]
            #[inline(always)]
            pub fn data(&mut self) -> _DATAW {
                _DATAW { w: self }
            }
            #[doc = "Bits 8:10 - Command Data"]
            #[inline(always)]
            pub fn cmd(&mut self) -> _CMDW {
                _CMDW { w: self }
            }
        }
    }
    #[doc = "Master Receive Data Register"]
    pub struct MRDR {
        register: VolatileCell<u32>,
    }
    #[doc = "Master Receive Data Register"]
    pub mod mrdr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::MRDR {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATAR {
            bits: u8,
        }
        impl DATAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `RXEMPTY`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXEMPTYR {
            #[doc = "Receive FIFO is not empty."]
            _0,
            #[doc = "Receive FIFO is empty."]
            _1,
        }
        impl RXEMPTYR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXEMPTYR::_0 => false,
                    RXEMPTYR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXEMPTYR {
                match value {
                    false => RXEMPTYR::_0,
                    true => RXEMPTYR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXEMPTYR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RXEMPTYR::_1
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Receive Data"]
            #[inline(always)]
            pub fn data(&self) -> DATAR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATAR { bits }
            }
            #[doc = "Bit 14 - RX Empty"]
            #[inline(always)]
            pub fn rxempty(&self) -> RXEMPTYR {
                RXEMPTYR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
    }
    #[doc = "Slave Control Register"]
    pub struct SCR {
        register: VolatileCell<u32>,
    }
    #[doc = "Slave Control Register"]
    pub mod scr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SCR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `SEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SENR {
            #[doc = "Slave mode is disabled."]
            _0,
            #[doc = "Slave mode is enabled."]
            _1,
        }
        impl SENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SENR::_0 => false,
                    SENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SENR {
                match value {
                    false => SENR::_0,
                    true => SENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SENR::_1
            }
        }
        #[doc = "Possible values of the field `RST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RSTR {
            #[doc = "Slave logic is not reset."]
            _0,
            #[doc = "Slave logic is reset."]
            _1,
        }
        impl RSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RSTR::_0 => false,
                    RSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RSTR {
                match value {
                    false => RSTR::_0,
                    true => RSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RSTR::_1
            }
        }
        #[doc = "Possible values of the field `FILTEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FILTENR {
            #[doc = "Disable digital filter and output delay counter for slave mode."]
            _0,
            #[doc = "Enable digital filter and output delay counter for slave mode."]
            _1,
        }
        impl FILTENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FILTENR::_0 => false,
                    FILTENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FILTENR {
                match value {
                    false => FILTENR::_0,
                    true => FILTENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FILTENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FILTENR::_1
            }
        }
        #[doc = "Possible values of the field `FILTDZ`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FILTDZR {
            #[doc = "Filter remains enabled in Doze mode."]
            _0,
            #[doc = "Filter is disabled in Doze mode."]
            _1,
        }
        impl FILTDZR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FILTDZR::_0 => false,
                    FILTDZR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FILTDZR {
                match value {
                    false => FILTDZR::_0,
                    true => FILTDZR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FILTDZR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FILTDZR::_1
            }
        }
        #[doc = "Values that can be written to the field `SEN`"]
        pub enum SENW {
            #[doc = "Slave mode is disabled."]
            _0,
            #[doc = "Slave mode is enabled."]
            _1,
        }
        impl SENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SENW::_0 => false,
                    SENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Slave mode is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SENW::_0)
            }
            #[doc = "Slave mode is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RST`"]
        pub enum RSTW {
            #[doc = "Slave logic is not reset."]
            _0,
            #[doc = "Slave logic is reset."]
            _1,
        }
        impl RSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RSTW::_0 => false,
                    RSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Slave logic is not reset."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RSTW::_0)
            }
            #[doc = "Slave logic is reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FILTEN`"]
        pub enum FILTENW {
            #[doc = "Disable digital filter and output delay counter for slave mode."]
            _0,
            #[doc = "Enable digital filter and output delay counter for slave mode."]
            _1,
        }
        impl FILTENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FILTENW::_0 => false,
                    FILTENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FILTENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FILTENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FILTENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable digital filter and output delay counter for slave mode."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FILTENW::_0)
            }
            #[doc = "Enable digital filter and output delay counter for slave mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FILTENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FILTDZ`"]
        pub enum FILTDZW {
            #[doc = "Filter remains enabled in Doze mode."]
            _0,
            #[doc = "Filter is disabled in Doze mode."]
            _1,
        }
        impl FILTDZW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FILTDZW::_0 => false,
                    FILTDZW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FILTDZW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FILTDZW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FILTDZW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Filter remains enabled in Doze mode."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FILTDZW::_0)
            }
            #[doc = "Filter is disabled in Doze mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FILTDZW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Slave Enable"]
            #[inline(always)]
            pub fn sen(&self) -> SENR {
                SENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Software Reset"]
            #[inline(always)]
            pub fn rst(&self) -> RSTR {
                RSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Filter Enable"]
            #[inline(always)]
            pub fn filten(&self) -> FILTENR {
                FILTENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Filter Doze Enable"]
            #[inline(always)]
            pub fn filtdz(&self) -> FILTDZR {
                FILTDZR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Slave Enable"]
            #[inline(always)]
            pub fn sen(&mut self) -> _SENW {
                _SENW { w: self }
            }
            #[doc = "Bit 1 - Software Reset"]
            #[inline(always)]
            pub fn rst(&mut self) -> _RSTW {
                _RSTW { w: self }
            }
            #[doc = "Bit 4 - Filter Enable"]
            #[inline(always)]
            pub fn filten(&mut self) -> _FILTENW {
                _FILTENW { w: self }
            }
            #[doc = "Bit 5 - Filter Doze Enable"]
            #[inline(always)]
            pub fn filtdz(&mut self) -> _FILTDZW {
                _FILTDZW { w: self }
            }
        }
    }
    #[doc = "Slave Status Register"]
    pub struct SSR {
        register: VolatileCell<u32>,
    }
    #[doc = "Slave Status Register"]
    pub mod ssr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SSR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TDF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TDFR {
            #[doc = "Transmit data not requested."]
            _0,
            #[doc = "Transmit data is requested."]
            _1,
        }
        impl TDFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TDFR::_0 => false,
                    TDFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TDFR {
                match value {
                    false => TDFR::_0,
                    true => TDFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TDFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TDFR::_1
            }
        }
        #[doc = "Possible values of the field `RDF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RDFR {
            #[doc = "Receive Data is not ready."]
            _0,
            #[doc = "Receive data is ready."]
            _1,
        }
        impl RDFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RDFR::_0 => false,
                    RDFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RDFR {
                match value {
                    false => RDFR::_0,
                    true => RDFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RDFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RDFR::_1
            }
        }
        #[doc = "Possible values of the field `AVF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum AVFR {
            #[doc = "Address Status Register is not valid."]
            _0,
            #[doc = "Address Status Register is valid."]
            _1,
        }
        impl AVFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    AVFR::_0 => false,
                    AVFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> AVFR {
                match value {
                    false => AVFR::_0,
                    true => AVFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == AVFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == AVFR::_1
            }
        }
        #[doc = "Possible values of the field `TAF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TAFR {
            #[doc = "Transmit ACK/NACK is not required."]
            _0,
            #[doc = "Transmit ACK/NACK is required."]
            _1,
        }
        impl TAFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TAFR::_0 => false,
                    TAFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TAFR {
                match value {
                    false => TAFR::_0,
                    true => TAFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TAFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TAFR::_1
            }
        }
        #[doc = "Possible values of the field `RSF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RSFR {
            #[doc = "Slave has not detected a Repeated START condition."]
            _0,
            #[doc = "Slave has detected a Repeated START condition."]
            _1,
        }
        impl RSFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RSFR::_0 => false,
                    RSFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RSFR {
                match value {
                    false => RSFR::_0,
                    true => RSFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RSFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RSFR::_1
            }
        }
        #[doc = "Possible values of the field `SDF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SDFR {
            #[doc = "Slave has not detected a STOP condition."]
            _0,
            #[doc = "Slave has detected a STOP condition."]
            _1,
        }
        impl SDFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SDFR::_0 => false,
                    SDFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SDFR {
                match value {
                    false => SDFR::_0,
                    true => SDFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SDFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SDFR::_1
            }
        }
        #[doc = "Possible values of the field `BEF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BEFR {
            #[doc = "Slave has not detected a bit error."]
            _0,
            #[doc = "Slave has detected a bit error."]
            _1,
        }
        impl BEFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BEFR::_0 => false,
                    BEFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BEFR {
                match value {
                    false => BEFR::_0,
                    true => BEFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BEFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BEFR::_1
            }
        }
        #[doc = "Possible values of the field `FEF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FEFR {
            #[doc = "FIFO underflow or overflow not detected."]
            _0,
            #[doc = "FIFO underflow or overflow detected."]
            _1,
        }
        impl FEFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FEFR::_0 => false,
                    FEFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FEFR {
                match value {
                    false => FEFR::_0,
                    true => FEFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FEFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FEFR::_1
            }
        }
        #[doc = "Possible values of the field `AM0F`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum AM0FR {
            #[doc = "Have not received ADDR0 matching address."]
            _0,
            #[doc = "Have received ADDR0 matching address."]
            _1,
        }
        impl AM0FR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    AM0FR::_0 => false,
                    AM0FR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> AM0FR {
                match value {
                    false => AM0FR::_0,
                    true => AM0FR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == AM0FR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == AM0FR::_1
            }
        }
        #[doc = "Possible values of the field `AM1F`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum AM1FR {
            #[doc = "Have not received ADDR1 or ADDR0/ADDR1 range matching address."]
            _0,
            #[doc = "Have received ADDR1 or ADDR0/ADDR1 range matching address."]
            _1,
        }
        impl AM1FR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    AM1FR::_0 => false,
                    AM1FR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> AM1FR {
                match value {
                    false => AM1FR::_0,
                    true => AM1FR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == AM1FR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == AM1FR::_1
            }
        }
        #[doc = "Possible values of the field `GCF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum GCFR {
            #[doc = "Slave has not detected the General Call Address or General Call Address disabled."]
            _0,
            #[doc = "Slave has detected the General Call Address."]
            _1,
        }
        impl GCFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    GCFR::_0 => false,
                    GCFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> GCFR {
                match value {
                    false => GCFR::_0,
                    true => GCFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == GCFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == GCFR::_1
            }
        }
        #[doc = "Possible values of the field `SARF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SARFR {
            #[doc = "SMBus Alert Response disabled or not detected."]
            _0,
            #[doc = "SMBus Alert Response enabled and detected."]
            _1,
        }
        impl SARFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SARFR::_0 => false,
                    SARFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SARFR {
                match value {
                    false => SARFR::_0,
                    true => SARFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SARFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SARFR::_1
            }
        }
        #[doc = "Possible values of the field `SBF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SBFR {
            #[doc = "I2C Slave is idle."]
            _0,
            #[doc = "I2C Slave is busy."]
            _1,
        }
        impl SBFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SBFR::_0 => false,
                    SBFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SBFR {
                match value {
                    false => SBFR::_0,
                    true => SBFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SBFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SBFR::_1
            }
        }
        #[doc = "Possible values of the field `BBF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BBFR {
            #[doc = "I2C Bus is idle."]
            _0,
            #[doc = "I2C Bus is busy."]
            _1,
        }
        impl BBFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BBFR::_0 => false,
                    BBFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BBFR {
                match value {
                    false => BBFR::_0,
                    true => BBFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BBFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BBFR::_1
            }
        }
        #[doc = "Values that can be written to the field `RSF`"]
        pub enum RSFW {
            #[doc = "Slave has not detected a Repeated START condition."]
            _0,
            #[doc = "Slave has detected a Repeated START condition."]
            _1,
        }
        impl RSFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RSFW::_0 => false,
                    RSFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RSFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RSFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RSFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Slave has not detected a Repeated START condition."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RSFW::_0)
            }
            #[doc = "Slave has detected a Repeated START condition."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RSFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SDF`"]
        pub enum SDFW {
            #[doc = "Slave has not detected a STOP condition."]
            _0,
            #[doc = "Slave has detected a STOP condition."]
            _1,
        }
        impl SDFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SDFW::_0 => false,
                    SDFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SDFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SDFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SDFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Slave has not detected a STOP condition."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SDFW::_0)
            }
            #[doc = "Slave has detected a STOP condition."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SDFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BEF`"]
        pub enum BEFW {
            #[doc = "Slave has not detected a bit error."]
            _0,
            #[doc = "Slave has detected a bit error."]
            _1,
        }
        impl BEFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    BEFW::_0 => false,
                    BEFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BEFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BEFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BEFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Slave has not detected a bit error."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BEFW::_0)
            }
            #[doc = "Slave has detected a bit error."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BEFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FEF`"]
        pub enum FEFW {
            #[doc = "FIFO underflow or overflow not detected."]
            _0,
            #[doc = "FIFO underflow or overflow detected."]
            _1,
        }
        impl FEFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FEFW::_0 => false,
                    FEFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FEFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FEFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FEFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FIFO underflow or overflow not detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FEFW::_0)
            }
            #[doc = "FIFO underflow or overflow detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FEFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Transmit Data Flag"]
            #[inline(always)]
            pub fn tdf(&self) -> TDFR {
                TDFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Receive Data Flag"]
            #[inline(always)]
            pub fn rdf(&self) -> RDFR {
                RDFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Address Valid Flag"]
            #[inline(always)]
            pub fn avf(&self) -> AVFR {
                AVFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Transmit ACK Flag"]
            #[inline(always)]
            pub fn taf(&self) -> TAFR {
                TAFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Repeated Start Flag"]
            #[inline(always)]
            pub fn rsf(&self) -> RSFR {
                RSFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - STOP Detect Flag"]
            #[inline(always)]
            pub fn sdf(&self) -> SDFR {
                SDFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Bit Error Flag"]
            #[inline(always)]
            pub fn bef(&self) -> BEFR {
                BEFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 11 - FIFO Error Flag"]
            #[inline(always)]
            pub fn fef(&self) -> FEFR {
                FEFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Address Match 0 Flag"]
            #[inline(always)]
            pub fn am0f(&self) -> AM0FR {
                AM0FR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Address Match 1 Flag"]
            #[inline(always)]
            pub fn am1f(&self) -> AM1FR {
                AM1FR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - General Call Flag"]
            #[inline(always)]
            pub fn gcf(&self) -> GCFR {
                GCFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - SMBus Alert Response Flag"]
            #[inline(always)]
            pub fn sarf(&self) -> SARFR {
                SARFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 24 - Slave Busy Flag"]
            #[inline(always)]
            pub fn sbf(&self) -> SBFR {
                SBFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 25 - Bus Busy Flag"]
            #[inline(always)]
            pub fn bbf(&self) -> BBFR {
                BBFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 25;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 8 - Repeated Start Flag"]
            #[inline(always)]
            pub fn rsf(&mut self) -> _RSFW {
                _RSFW { w: self }
            }
            #[doc = "Bit 9 - STOP Detect Flag"]
            #[inline(always)]
            pub fn sdf(&mut self) -> _SDFW {
                _SDFW { w: self }
            }
            #[doc = "Bit 10 - Bit Error Flag"]
            #[inline(always)]
            pub fn bef(&mut self) -> _BEFW {
                _BEFW { w: self }
            }
            #[doc = "Bit 11 - FIFO Error Flag"]
            #[inline(always)]
            pub fn fef(&mut self) -> _FEFW {
                _FEFW { w: self }
            }
        }
    }
    #[doc = "Slave Interrupt Enable Register"]
    pub struct SIER {
        register: VolatileCell<u32>,
    }
    #[doc = "Slave Interrupt Enable Register"]
    pub mod sier {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SIER {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TDIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TDIER {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled"]
            _1,
        }
        impl TDIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TDIER::_0 => false,
                    TDIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TDIER {
                match value {
                    false => TDIER::_0,
                    true => TDIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TDIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TDIER::_1
            }
        }
        #[doc = "Possible values of the field `RDIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RDIER {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl RDIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RDIER::_0 => false,
                    RDIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RDIER {
                match value {
                    false => RDIER::_0,
                    true => RDIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RDIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RDIER::_1
            }
        }
        #[doc = "Possible values of the field `AVIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum AVIER {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl AVIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    AVIER::_0 => false,
                    AVIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> AVIER {
                match value {
                    false => AVIER::_0,
                    true => AVIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == AVIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == AVIER::_1
            }
        }
        #[doc = "Possible values of the field `TAIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TAIER {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl TAIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TAIER::_0 => false,
                    TAIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TAIER {
                match value {
                    false => TAIER::_0,
                    true => TAIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TAIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TAIER::_1
            }
        }
        #[doc = "Possible values of the field `RSIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RSIER {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl RSIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RSIER::_0 => false,
                    RSIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RSIER {
                match value {
                    false => RSIER::_0,
                    true => RSIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RSIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RSIER::_1
            }
        }
        #[doc = "Possible values of the field `SDIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SDIER {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl SDIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SDIER::_0 => false,
                    SDIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SDIER {
                match value {
                    false => SDIER::_0,
                    true => SDIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SDIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SDIER::_1
            }
        }
        #[doc = "Possible values of the field `BEIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BEIER {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl BEIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BEIER::_0 => false,
                    BEIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BEIER {
                match value {
                    false => BEIER::_0,
                    true => BEIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BEIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BEIER::_1
            }
        }
        #[doc = "Possible values of the field `FEIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FEIER {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl FEIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FEIER::_0 => false,
                    FEIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FEIER {
                match value {
                    false => FEIER::_0,
                    true => FEIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FEIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FEIER::_1
            }
        }
        #[doc = "Possible values of the field `AM0IE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum AM0IER {
            #[doc = "Interrupt enabled."]
            _0,
            #[doc = "Interrupt disabled."]
            _1,
        }
        impl AM0IER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    AM0IER::_0 => false,
                    AM0IER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> AM0IER {
                match value {
                    false => AM0IER::_0,
                    true => AM0IER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == AM0IER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == AM0IER::_1
            }
        }
        #[doc = "Possible values of the field `AM1F`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum AM1FR {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl AM1FR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    AM1FR::_0 => false,
                    AM1FR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> AM1FR {
                match value {
                    false => AM1FR::_0,
                    true => AM1FR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == AM1FR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == AM1FR::_1
            }
        }
        #[doc = "Possible values of the field `GCIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum GCIER {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl GCIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    GCIER::_0 => false,
                    GCIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> GCIER {
                match value {
                    false => GCIER::_0,
                    true => GCIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == GCIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == GCIER::_1
            }
        }
        #[doc = "Possible values of the field `SARIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SARIER {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl SARIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SARIER::_0 => false,
                    SARIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SARIER {
                match value {
                    false => SARIER::_0,
                    true => SARIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SARIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SARIER::_1
            }
        }
        #[doc = "Values that can be written to the field `TDIE`"]
        pub enum TDIEW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled"]
            _1,
        }
        impl TDIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TDIEW::_0 => false,
                    TDIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TDIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TDIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TDIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TDIEW::_0)
            }
            #[doc = "Interrupt enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TDIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RDIE`"]
        pub enum RDIEW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl RDIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RDIEW::_0 => false,
                    RDIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RDIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RDIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RDIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RDIEW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RDIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `AVIE`"]
        pub enum AVIEW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl AVIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    AVIEW::_0 => false,
                    AVIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _AVIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _AVIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: AVIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(AVIEW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(AVIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TAIE`"]
        pub enum TAIEW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl TAIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TAIEW::_0 => false,
                    TAIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TAIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TAIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TAIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TAIEW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TAIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RSIE`"]
        pub enum RSIEW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl RSIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RSIEW::_0 => false,
                    RSIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RSIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RSIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RSIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RSIEW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RSIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SDIE`"]
        pub enum SDIEW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl SDIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SDIEW::_0 => false,
                    SDIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SDIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SDIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SDIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SDIEW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SDIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BEIE`"]
        pub enum BEIEW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl BEIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    BEIEW::_0 => false,
                    BEIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BEIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BEIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BEIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BEIEW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BEIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FEIE`"]
        pub enum FEIEW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl FEIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FEIEW::_0 => false,
                    FEIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FEIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FEIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FEIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FEIEW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FEIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `AM0IE`"]
        pub enum AM0IEW {
            #[doc = "Interrupt enabled."]
            _0,
            #[doc = "Interrupt disabled."]
            _1,
        }
        impl AM0IEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    AM0IEW::_0 => false,
                    AM0IEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _AM0IEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _AM0IEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: AM0IEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(AM0IEW::_0)
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(AM0IEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `AM1F`"]
        pub enum AM1FW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl AM1FW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    AM1FW::_0 => false,
                    AM1FW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _AM1FW<'a> {
            w: &'a mut W,
        }
        impl<'a> _AM1FW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: AM1FW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(AM1FW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(AM1FW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `GCIE`"]
        pub enum GCIEW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl GCIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    GCIEW::_0 => false,
                    GCIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _GCIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GCIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: GCIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(GCIEW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(GCIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SARIE`"]
        pub enum SARIEW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl SARIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SARIEW::_0 => false,
                    SARIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SARIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SARIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SARIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SARIEW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SARIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Transmit Data Interrupt Enable"]
            #[inline(always)]
            pub fn tdie(&self) -> TDIER {
                TDIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Receive Data Interrupt Enable"]
            #[inline(always)]
            pub fn rdie(&self) -> RDIER {
                RDIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Address Valid Interrupt Enable"]
            #[inline(always)]
            pub fn avie(&self) -> AVIER {
                AVIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Transmit ACK Interrupt Enable"]
            #[inline(always)]
            pub fn taie(&self) -> TAIER {
                TAIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Repeated Start Interrupt Enable"]
            #[inline(always)]
            pub fn rsie(&self) -> RSIER {
                RSIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - STOP Detect Interrupt Enable"]
            #[inline(always)]
            pub fn sdie(&self) -> SDIER {
                SDIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Bit Error Interrupt Enable"]
            #[inline(always)]
            pub fn beie(&self) -> BEIER {
                BEIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 11 - FIFO Error Interrupt Enable"]
            #[inline(always)]
            pub fn feie(&self) -> FEIER {
                FEIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Address Match 0 Interrupt Enable"]
            #[inline(always)]
            pub fn am0ie(&self) -> AM0IER {
                AM0IER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Address Match 1 Interrupt Enable"]
            #[inline(always)]
            pub fn am1f(&self) -> AM1FR {
                AM1FR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - General Call Interrupt Enable"]
            #[inline(always)]
            pub fn gcie(&self) -> GCIER {
                GCIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - SMBus Alert Response Interrupt Enable"]
            #[inline(always)]
            pub fn sarie(&self) -> SARIER {
                SARIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Transmit Data Interrupt Enable"]
            #[inline(always)]
            pub fn tdie(&mut self) -> _TDIEW {
                _TDIEW { w: self }
            }
            #[doc = "Bit 1 - Receive Data Interrupt Enable"]
            #[inline(always)]
            pub fn rdie(&mut self) -> _RDIEW {
                _RDIEW { w: self }
            }
            #[doc = "Bit 2 - Address Valid Interrupt Enable"]
            #[inline(always)]
            pub fn avie(&mut self) -> _AVIEW {
                _AVIEW { w: self }
            }
            #[doc = "Bit 3 - Transmit ACK Interrupt Enable"]
            #[inline(always)]
            pub fn taie(&mut self) -> _TAIEW {
                _TAIEW { w: self }
            }
            #[doc = "Bit 8 - Repeated Start Interrupt Enable"]
            #[inline(always)]
            pub fn rsie(&mut self) -> _RSIEW {
                _RSIEW { w: self }
            }
            #[doc = "Bit 9 - STOP Detect Interrupt Enable"]
            #[inline(always)]
            pub fn sdie(&mut self) -> _SDIEW {
                _SDIEW { w: self }
            }
            #[doc = "Bit 10 - Bit Error Interrupt Enable"]
            #[inline(always)]
            pub fn beie(&mut self) -> _BEIEW {
                _BEIEW { w: self }
            }
            #[doc = "Bit 11 - FIFO Error Interrupt Enable"]
            #[inline(always)]
            pub fn feie(&mut self) -> _FEIEW {
                _FEIEW { w: self }
            }
            #[doc = "Bit 12 - Address Match 0 Interrupt Enable"]
            #[inline(always)]
            pub fn am0ie(&mut self) -> _AM0IEW {
                _AM0IEW { w: self }
            }
            #[doc = "Bit 13 - Address Match 1 Interrupt Enable"]
            #[inline(always)]
            pub fn am1f(&mut self) -> _AM1FW {
                _AM1FW { w: self }
            }
            #[doc = "Bit 14 - General Call Interrupt Enable"]
            #[inline(always)]
            pub fn gcie(&mut self) -> _GCIEW {
                _GCIEW { w: self }
            }
            #[doc = "Bit 15 - SMBus Alert Response Interrupt Enable"]
            #[inline(always)]
            pub fn sarie(&mut self) -> _SARIEW {
                _SARIEW { w: self }
            }
        }
    }
    #[doc = "Slave DMA Enable Register"]
    pub struct SDER {
        register: VolatileCell<u32>,
    }
    #[doc = "Slave DMA Enable Register"]
    pub mod sder {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SDER {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TDDE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TDDER {
            #[doc = "DMA request disabled."]
            _0,
            #[doc = "DMA request enabled"]
            _1,
        }
        impl TDDER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TDDER::_0 => false,
                    TDDER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TDDER {
                match value {
                    false => TDDER::_0,
                    true => TDDER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TDDER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TDDER::_1
            }
        }
        #[doc = "Possible values of the field `RDDE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RDDER {
            #[doc = "DMA request disabled."]
            _0,
            #[doc = "DMA request enabled."]
            _1,
        }
        impl RDDER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RDDER::_0 => false,
                    RDDER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RDDER {
                match value {
                    false => RDDER::_0,
                    true => RDDER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RDDER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RDDER::_1
            }
        }
        #[doc = "Possible values of the field `AVDE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum AVDER {
            #[doc = "DMA request disabled."]
            _0,
            #[doc = "DMA request enabled."]
            _1,
        }
        impl AVDER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    AVDER::_0 => false,
                    AVDER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> AVDER {
                match value {
                    false => AVDER::_0,
                    true => AVDER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == AVDER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == AVDER::_1
            }
        }
        #[doc = "Values that can be written to the field `TDDE`"]
        pub enum TDDEW {
            #[doc = "DMA request disabled."]
            _0,
            #[doc = "DMA request enabled"]
            _1,
        }
        impl TDDEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TDDEW::_0 => false,
                    TDDEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TDDEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TDDEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TDDEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA request disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TDDEW::_0)
            }
            #[doc = "DMA request enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TDDEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RDDE`"]
        pub enum RDDEW {
            #[doc = "DMA request disabled."]
            _0,
            #[doc = "DMA request enabled."]
            _1,
        }
        impl RDDEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RDDEW::_0 => false,
                    RDDEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RDDEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RDDEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RDDEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA request disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RDDEW::_0)
            }
            #[doc = "DMA request enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RDDEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `AVDE`"]
        pub enum AVDEW {
            #[doc = "DMA request disabled."]
            _0,
            #[doc = "DMA request enabled."]
            _1,
        }
        impl AVDEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    AVDEW::_0 => false,
                    AVDEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _AVDEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _AVDEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: AVDEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA request disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(AVDEW::_0)
            }
            #[doc = "DMA request enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(AVDEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Transmit Data DMA Enable"]
            #[inline(always)]
            pub fn tdde(&self) -> TDDER {
                TDDER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Receive Data DMA Enable"]
            #[inline(always)]
            pub fn rdde(&self) -> RDDER {
                RDDER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Address Valid DMA Enable"]
            #[inline(always)]
            pub fn avde(&self) -> AVDER {
                AVDER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Transmit Data DMA Enable"]
            #[inline(always)]
            pub fn tdde(&mut self) -> _TDDEW {
                _TDDEW { w: self }
            }
            #[doc = "Bit 1 - Receive Data DMA Enable"]
            #[inline(always)]
            pub fn rdde(&mut self) -> _RDDEW {
                _RDDEW { w: self }
            }
            #[doc = "Bit 2 - Address Valid DMA Enable"]
            #[inline(always)]
            pub fn avde(&mut self) -> _AVDEW {
                _AVDEW { w: self }
            }
        }
    }
    #[doc = "Slave Configuration Register 1"]
    pub struct SCFGR1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Slave Configuration Register 1"]
    pub mod scfgr1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SCFGR1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `ADRSTALL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ADRSTALLR {
            #[doc = "Clock stretching disabled."]
            _0,
            #[doc = "Clock stretching enabled."]
            _1,
        }
        impl ADRSTALLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ADRSTALLR::_0 => false,
                    ADRSTALLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ADRSTALLR {
                match value {
                    false => ADRSTALLR::_0,
                    true => ADRSTALLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ADRSTALLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ADRSTALLR::_1
            }
        }
        #[doc = "Possible values of the field `RXSTALL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXSTALLR {
            #[doc = "Clock stretching disabled."]
            _0,
            #[doc = "Clock stretching enabled."]
            _1,
        }
        impl RXSTALLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXSTALLR::_0 => false,
                    RXSTALLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXSTALLR {
                match value {
                    false => RXSTALLR::_0,
                    true => RXSTALLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXSTALLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RXSTALLR::_1
            }
        }
        #[doc = "Possible values of the field `TXDSTALL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXDSTALLR {
            #[doc = "Clock stretching disabled."]
            _0,
            #[doc = "Clock stretching enabled."]
            _1,
        }
        impl TXDSTALLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXDSTALLR::_0 => false,
                    TXDSTALLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXDSTALLR {
                match value {
                    false => TXDSTALLR::_0,
                    true => TXDSTALLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXDSTALLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXDSTALLR::_1
            }
        }
        #[doc = "Possible values of the field `ACKSTALL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ACKSTALLR {
            #[doc = "Clock stretching disabled."]
            _0,
            #[doc = "Clock stretching enabled."]
            _1,
        }
        impl ACKSTALLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ACKSTALLR::_0 => false,
                    ACKSTALLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ACKSTALLR {
                match value {
                    false => ACKSTALLR::_0,
                    true => ACKSTALLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ACKSTALLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ACKSTALLR::_1
            }
        }
        #[doc = "Possible values of the field `GCEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum GCENR {
            #[doc = "General Call address is disabled."]
            _0,
            #[doc = "General call address is enabled."]
            _1,
        }
        impl GCENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    GCENR::_0 => false,
                    GCENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> GCENR {
                match value {
                    false => GCENR::_0,
                    true => GCENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == GCENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == GCENR::_1
            }
        }
        #[doc = "Possible values of the field `SAEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SAENR {
            #[doc = "Disables match on SMBus Alert."]
            _0,
            #[doc = "Enables match on SMBus Alert."]
            _1,
        }
        impl SAENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SAENR::_0 => false,
                    SAENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SAENR {
                match value {
                    false => SAENR::_0,
                    true => SAENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SAENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SAENR::_1
            }
        }
        #[doc = "Possible values of the field `TXCFG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXCFGR {
            #[doc = "Transmit Data Flag will only assert during a slave-transmit transfer when the transmit data register is empty."]
            _0,
            #[doc = "Transmit Data Flag will assert whenever the transmit data register is empty."]
            _1,
        }
        impl TXCFGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXCFGR::_0 => false,
                    TXCFGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXCFGR {
                match value {
                    false => TXCFGR::_0,
                    true => TXCFGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXCFGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXCFGR::_1
            }
        }
        #[doc = "Possible values of the field `RXCFG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXCFGR {
            #[doc = "Reading the receive data register will return receive data and clear the receive data flag."]
            _0,
            #[doc = "Reading the receive data register when the address valid flag is set will return the address status register and clear the address valid flag. Reading the receive data register when the address valid flag is clear will return receive data and clear the receive data flag."]
            _1,
        }
        impl RXCFGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXCFGR::_0 => false,
                    RXCFGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXCFGR {
                match value {
                    false => RXCFGR::_0,
                    true => RXCFGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXCFGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RXCFGR::_1
            }
        }
        #[doc = "Possible values of the field `IGNACK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IGNACKR {
            #[doc = "Slave will end transfer when NACK detected."]
            _0,
            #[doc = "Slave will not end transfer when NACK detected."]
            _1,
        }
        impl IGNACKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    IGNACKR::_0 => false,
                    IGNACKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> IGNACKR {
                match value {
                    false => IGNACKR::_0,
                    true => IGNACKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == IGNACKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == IGNACKR::_1
            }
        }
        #[doc = "Possible values of the field `HSMEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HSMENR {
            #[doc = "Disables detection of Hs-mode master code."]
            _0,
            #[doc = "Enables detection of Hs-mode master code."]
            _1,
        }
        impl HSMENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    HSMENR::_0 => false,
                    HSMENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> HSMENR {
                match value {
                    false => HSMENR::_0,
                    true => HSMENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == HSMENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == HSMENR::_1
            }
        }
        #[doc = "Possible values of the field `ADDRCFG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ADDRCFGR {
            #[doc = "Address match 0 (7-bit)."]
            _000,
            #[doc = "Address match 0 (10-bit)."]
            _001,
            #[doc = "Address match 0 (7-bit) or Address match 1 (7-bit)."]
            _010,
            #[doc = "Address match 0 (10-bit) or Address match 1 (10-bit)."]
            _011,
            #[doc = "Address match 0 (7-bit) or Address match 1 (10-bit)."]
            _100,
            #[doc = "Address match 0 (10-bit) or Address match 1 (7-bit)."]
            _101,
            #[doc = "From Address match 0 (7-bit) to Address match 1 (7-bit)."]
            _110,
            #[doc = "From Address match 0 (10-bit) to Address match 1 (10-bit)."]
            _111,
        }
        impl ADDRCFGR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    ADDRCFGR::_000 => 0,
                    ADDRCFGR::_001 => 1,
                    ADDRCFGR::_010 => 2,
                    ADDRCFGR::_011 => 3,
                    ADDRCFGR::_100 => 4,
                    ADDRCFGR::_101 => 5,
                    ADDRCFGR::_110 => 6,
                    ADDRCFGR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> ADDRCFGR {
                match value {
                    0 => ADDRCFGR::_000,
                    1 => ADDRCFGR::_001,
                    2 => ADDRCFGR::_010,
                    3 => ADDRCFGR::_011,
                    4 => ADDRCFGR::_100,
                    5 => ADDRCFGR::_101,
                    6 => ADDRCFGR::_110,
                    7 => ADDRCFGR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == ADDRCFGR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == ADDRCFGR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == ADDRCFGR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == ADDRCFGR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == ADDRCFGR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == ADDRCFGR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == ADDRCFGR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == ADDRCFGR::_111
            }
        }
        #[doc = "Values that can be written to the field `ADRSTALL`"]
        pub enum ADRSTALLW {
            #[doc = "Clock stretching disabled."]
            _0,
            #[doc = "Clock stretching enabled."]
            _1,
        }
        impl ADRSTALLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ADRSTALLW::_0 => false,
                    ADRSTALLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ADRSTALLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ADRSTALLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ADRSTALLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock stretching disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ADRSTALLW::_0)
            }
            #[doc = "Clock stretching enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ADRSTALLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RXSTALL`"]
        pub enum RXSTALLW {
            #[doc = "Clock stretching disabled."]
            _0,
            #[doc = "Clock stretching enabled."]
            _1,
        }
        impl RXSTALLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RXSTALLW::_0 => false,
                    RXSTALLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXSTALLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXSTALLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RXSTALLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock stretching disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RXSTALLW::_0)
            }
            #[doc = "Clock stretching enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RXSTALLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TXDSTALL`"]
        pub enum TXDSTALLW {
            #[doc = "Clock stretching disabled."]
            _0,
            #[doc = "Clock stretching enabled."]
            _1,
        }
        impl TXDSTALLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TXDSTALLW::_0 => false,
                    TXDSTALLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXDSTALLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXDSTALLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TXDSTALLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock stretching disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TXDSTALLW::_0)
            }
            #[doc = "Clock stretching enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TXDSTALLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ACKSTALL`"]
        pub enum ACKSTALLW {
            #[doc = "Clock stretching disabled."]
            _0,
            #[doc = "Clock stretching enabled."]
            _1,
        }
        impl ACKSTALLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ACKSTALLW::_0 => false,
                    ACKSTALLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ACKSTALLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ACKSTALLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ACKSTALLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Clock stretching disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ACKSTALLW::_0)
            }
            #[doc = "Clock stretching enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ACKSTALLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `GCEN`"]
        pub enum GCENW {
            #[doc = "General Call address is disabled."]
            _0,
            #[doc = "General call address is enabled."]
            _1,
        }
        impl GCENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    GCENW::_0 => false,
                    GCENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _GCENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GCENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: GCENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "General Call address is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(GCENW::_0)
            }
            #[doc = "General call address is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(GCENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SAEN`"]
        pub enum SAENW {
            #[doc = "Disables match on SMBus Alert."]
            _0,
            #[doc = "Enables match on SMBus Alert."]
            _1,
        }
        impl SAENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SAENW::_0 => false,
                    SAENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SAENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SAENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SAENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disables match on SMBus Alert."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SAENW::_0)
            }
            #[doc = "Enables match on SMBus Alert."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SAENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TXCFG`"]
        pub enum TXCFGW {
            #[doc = "Transmit Data Flag will only assert during a slave-transmit transfer when the transmit data register is empty."]
            _0,
            #[doc = "Transmit Data Flag will assert whenever the transmit data register is empty."]
            _1,
        }
        impl TXCFGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TXCFGW::_0 => false,
                    TXCFGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXCFGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXCFGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TXCFGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Transmit Data Flag will only assert during a slave-transmit transfer when the transmit data register is empty."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TXCFGW::_0)
            }
            #[doc = "Transmit Data Flag will assert whenever the transmit data register is empty."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TXCFGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RXCFG`"]
        pub enum RXCFGW {
            #[doc = "Reading the receive data register will return receive data and clear the receive data flag."]
            _0,
            #[doc = "Reading the receive data register when the address valid flag is set will return the address status register and clear the address valid flag. Reading the receive data register when the address valid flag is clear will return receive data and clear the receive data flag."]
            _1,
        }
        impl RXCFGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RXCFGW::_0 => false,
                    RXCFGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXCFGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXCFGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RXCFGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Reading the receive data register will return receive data and clear the receive data flag."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RXCFGW::_0)
            }
            #[doc = "Reading the receive data register when the address valid flag is set will return the address status register and clear the address valid flag. Reading the receive data register when the address valid flag is clear will return receive data and clear the receive data flag."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RXCFGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IGNACK`"]
        pub enum IGNACKW {
            #[doc = "Slave will end transfer when NACK detected."]
            _0,
            #[doc = "Slave will not end transfer when NACK detected."]
            _1,
        }
        impl IGNACKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    IGNACKW::_0 => false,
                    IGNACKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IGNACKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IGNACKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IGNACKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Slave will end transfer when NACK detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(IGNACKW::_0)
            }
            #[doc = "Slave will not end transfer when NACK detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(IGNACKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `HSMEN`"]
        pub enum HSMENW {
            #[doc = "Disables detection of Hs-mode master code."]
            _0,
            #[doc = "Enables detection of Hs-mode master code."]
            _1,
        }
        impl HSMENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    HSMENW::_0 => false,
                    HSMENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HSMENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HSMENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HSMENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disables detection of Hs-mode master code."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(HSMENW::_0)
            }
            #[doc = "Enables detection of Hs-mode master code."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(HSMENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ADDRCFG`"]
        pub enum ADDRCFGW {
            #[doc = "Address match 0 (7-bit)."]
            _000,
            #[doc = "Address match 0 (10-bit)."]
            _001,
            #[doc = "Address match 0 (7-bit) or Address match 1 (7-bit)."]
            _010,
            #[doc = "Address match 0 (10-bit) or Address match 1 (10-bit)."]
            _011,
            #[doc = "Address match 0 (7-bit) or Address match 1 (10-bit)."]
            _100,
            #[doc = "Address match 0 (10-bit) or Address match 1 (7-bit)."]
            _101,
            #[doc = "From Address match 0 (7-bit) to Address match 1 (7-bit)."]
            _110,
            #[doc = "From Address match 0 (10-bit) to Address match 1 (10-bit)."]
            _111,
        }
        impl ADDRCFGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    ADDRCFGW::_000 => 0,
                    ADDRCFGW::_001 => 1,
                    ADDRCFGW::_010 => 2,
                    ADDRCFGW::_011 => 3,
                    ADDRCFGW::_100 => 4,
                    ADDRCFGW::_101 => 5,
                    ADDRCFGW::_110 => 6,
                    ADDRCFGW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ADDRCFGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ADDRCFGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ADDRCFGW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Address match 0 (7-bit)."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(ADDRCFGW::_000)
            }
            #[doc = "Address match 0 (10-bit)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(ADDRCFGW::_001)
            }
            #[doc = "Address match 0 (7-bit) or Address match 1 (7-bit)."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(ADDRCFGW::_010)
            }
            #[doc = "Address match 0 (10-bit) or Address match 1 (10-bit)."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(ADDRCFGW::_011)
            }
            #[doc = "Address match 0 (7-bit) or Address match 1 (10-bit)."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(ADDRCFGW::_100)
            }
            #[doc = "Address match 0 (10-bit) or Address match 1 (7-bit)."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(ADDRCFGW::_101)
            }
            #[doc = "From Address match 0 (7-bit) to Address match 1 (7-bit)."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(ADDRCFGW::_110)
            }
            #[doc = "From Address match 0 (10-bit) to Address match 1 (10-bit)."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(ADDRCFGW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Address SCL Stall"]
            #[inline(always)]
            pub fn adrstall(&self) -> ADRSTALLR {
                ADRSTALLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - RX SCL Stall"]
            #[inline(always)]
            pub fn rxstall(&self) -> RXSTALLR {
                RXSTALLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - TX Data SCL Stall"]
            #[inline(always)]
            pub fn txdstall(&self) -> TXDSTALLR {
                TXDSTALLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - ACK SCL Stall"]
            #[inline(always)]
            pub fn ackstall(&self) -> ACKSTALLR {
                ACKSTALLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - General Call Enable"]
            #[inline(always)]
            pub fn gcen(&self) -> GCENR {
                GCENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - SMBus Alert Enable"]
            #[inline(always)]
            pub fn saen(&self) -> SAENR {
                SAENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Transmit Flag Configuration"]
            #[inline(always)]
            pub fn txcfg(&self) -> TXCFGR {
                TXCFGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 11 - Receive Data Configuration"]
            #[inline(always)]
            pub fn rxcfg(&self) -> RXCFGR {
                RXCFGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Ignore NACK"]
            #[inline(always)]
            pub fn ignack(&self) -> IGNACKR {
                IGNACKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - High Speed Mode Enable"]
            #[inline(always)]
            pub fn hsmen(&self) -> HSMENR {
                HSMENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:18 - Address Configuration"]
            #[inline(always)]
            pub fn addrcfg(&self) -> ADDRCFGR {
                ADDRCFGR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Address SCL Stall"]
            #[inline(always)]
            pub fn adrstall(&mut self) -> _ADRSTALLW {
                _ADRSTALLW { w: self }
            }
            #[doc = "Bit 1 - RX SCL Stall"]
            #[inline(always)]
            pub fn rxstall(&mut self) -> _RXSTALLW {
                _RXSTALLW { w: self }
            }
            #[doc = "Bit 2 - TX Data SCL Stall"]
            #[inline(always)]
            pub fn txdstall(&mut self) -> _TXDSTALLW {
                _TXDSTALLW { w: self }
            }
            #[doc = "Bit 3 - ACK SCL Stall"]
            #[inline(always)]
            pub fn ackstall(&mut self) -> _ACKSTALLW {
                _ACKSTALLW { w: self }
            }
            #[doc = "Bit 8 - General Call Enable"]
            #[inline(always)]
            pub fn gcen(&mut self) -> _GCENW {
                _GCENW { w: self }
            }
            #[doc = "Bit 9 - SMBus Alert Enable"]
            #[inline(always)]
            pub fn saen(&mut self) -> _SAENW {
                _SAENW { w: self }
            }
            #[doc = "Bit 10 - Transmit Flag Configuration"]
            #[inline(always)]
            pub fn txcfg(&mut self) -> _TXCFGW {
                _TXCFGW { w: self }
            }
            #[doc = "Bit 11 - Receive Data Configuration"]
            #[inline(always)]
            pub fn rxcfg(&mut self) -> _RXCFGW {
                _RXCFGW { w: self }
            }
            #[doc = "Bit 12 - Ignore NACK"]
            #[inline(always)]
            pub fn ignack(&mut self) -> _IGNACKW {
                _IGNACKW { w: self }
            }
            #[doc = "Bit 13 - High Speed Mode Enable"]
            #[inline(always)]
            pub fn hsmen(&mut self) -> _HSMENW {
                _HSMENW { w: self }
            }
            #[doc = "Bits 16:18 - Address Configuration"]
            #[inline(always)]
            pub fn addrcfg(&mut self) -> _ADDRCFGW {
                _ADDRCFGW { w: self }
            }
        }
    }
    #[doc = "Slave Configuration Register 2"]
    pub struct SCFGR2 {
        register: VolatileCell<u32>,
    }
    #[doc = "Slave Configuration Register 2"]
    pub mod scfgr2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SCFGR2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CLKHOLDR {
            bits: u8,
        }
        impl CLKHOLDR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATAVDR {
            bits: u8,
        }
        impl DATAVDR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct FILTSCLR {
            bits: u8,
        }
        impl FILTSCLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct FILTSDAR {
            bits: u8,
        }
        impl FILTSDAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLKHOLDW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLKHOLDW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATAVDW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATAVDW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _FILTSCLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FILTSCLW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _FILTSDAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FILTSDAW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:3 - Clock Hold Time"]
            #[inline(always)]
            pub fn clkhold(&self) -> CLKHOLDR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CLKHOLDR { bits }
            }
            #[doc = "Bits 8:13 - Data Valid Delay"]
            #[inline(always)]
            pub fn datavd(&self) -> DATAVDR {
                let bits = {
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATAVDR { bits }
            }
            #[doc = "Bits 16:19 - Glitch Filter SCL"]
            #[inline(always)]
            pub fn filtscl(&self) -> FILTSCLR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                FILTSCLR { bits }
            }
            #[doc = "Bits 24:27 - Glitch Filter SDA"]
            #[inline(always)]
            pub fn filtsda(&self) -> FILTSDAR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                FILTSDAR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Clock Hold Time"]
            #[inline(always)]
            pub fn clkhold(&mut self) -> _CLKHOLDW {
                _CLKHOLDW { w: self }
            }
            #[doc = "Bits 8:13 - Data Valid Delay"]
            #[inline(always)]
            pub fn datavd(&mut self) -> _DATAVDW {
                _DATAVDW { w: self }
            }
            #[doc = "Bits 16:19 - Glitch Filter SCL"]
            #[inline(always)]
            pub fn filtscl(&mut self) -> _FILTSCLW {
                _FILTSCLW { w: self }
            }
            #[doc = "Bits 24:27 - Glitch Filter SDA"]
            #[inline(always)]
            pub fn filtsda(&mut self) -> _FILTSDAW {
                _FILTSDAW { w: self }
            }
        }
    }
    #[doc = "Slave Address Match Register"]
    pub struct SAMR {
        register: VolatileCell<u32>,
    }
    #[doc = "Slave Address Match Register"]
    pub mod samr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SAMR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct ADDR0R {
            bits: u16,
        }
        impl ADDR0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct ADDR1R {
            bits: u16,
        }
        impl ADDR1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _ADDR0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _ADDR0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 1023;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _ADDR1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _ADDR1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 1023;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 1:10 - Address 0 Value"]
            #[inline(always)]
            pub fn addr0(&self) -> ADDR0R {
                let bits = {
                    const MASK: u16 = 1023;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                ADDR0R { bits }
            }
            #[doc = "Bits 17:26 - Address 1 Value"]
            #[inline(always)]
            pub fn addr1(&self) -> ADDR1R {
                let bits = {
                    const MASK: u16 = 1023;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                ADDR1R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 1:10 - Address 0 Value"]
            #[inline(always)]
            pub fn addr0(&mut self) -> _ADDR0W {
                _ADDR0W { w: self }
            }
            #[doc = "Bits 17:26 - Address 1 Value"]
            #[inline(always)]
            pub fn addr1(&mut self) -> _ADDR1W {
                _ADDR1W { w: self }
            }
        }
    }
    #[doc = "Slave Address Status Register"]
    pub struct SASR {
        register: VolatileCell<u32>,
    }
    #[doc = "Slave Address Status Register"]
    pub mod sasr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::SASR {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct RADDRR {
            bits: u16,
        }
        impl RADDRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `ANV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ANVR {
            #[doc = "RADDR is valid."]
            _0,
            #[doc = "RADDR is not valid."]
            _1,
        }
        impl ANVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ANVR::_0 => false,
                    ANVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ANVR {
                match value {
                    false => ANVR::_0,
                    true => ANVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ANVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ANVR::_1
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:10 - Received Address"]
            #[inline(always)]
            pub fn raddr(&self) -> RADDRR {
                let bits = {
                    const MASK: u16 = 2047;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                RADDRR { bits }
            }
            #[doc = "Bit 14 - Address Not Valid"]
            #[inline(always)]
            pub fn anv(&self) -> ANVR {
                ANVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
    }
    #[doc = "Slave Transmit ACK Register"]
    pub struct STAR {
        register: VolatileCell<u32>,
    }
    #[doc = "Slave Transmit ACK Register"]
    pub mod star {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::STAR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TXNACK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXNACKR {
            #[doc = "Transmit ACK for received word."]
            _0,
            #[doc = "Transmit NACK for received word."]
            _1,
        }
        impl TXNACKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXNACKR::_0 => false,
                    TXNACKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXNACKR {
                match value {
                    false => TXNACKR::_0,
                    true => TXNACKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXNACKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXNACKR::_1
            }
        }
        #[doc = "Values that can be written to the field `TXNACK`"]
        pub enum TXNACKW {
            #[doc = "Transmit ACK for received word."]
            _0,
            #[doc = "Transmit NACK for received word."]
            _1,
        }
        impl TXNACKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TXNACKW::_0 => false,
                    TXNACKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXNACKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXNACKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TXNACKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Transmit ACK for received word."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TXNACKW::_0)
            }
            #[doc = "Transmit NACK for received word."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TXNACKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Transmit NACK"]
            #[inline(always)]
            pub fn txnack(&self) -> TXNACKR {
                TXNACKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Transmit NACK"]
            #[inline(always)]
            pub fn txnack(&mut self) -> _TXNACKW {
                _TXNACKW { w: self }
            }
        }
    }
    #[doc = "Slave Transmit Data Register"]
    pub struct STDR {
        register: VolatileCell<u32>,
    }
    #[doc = "Slave Transmit Data Register"]
    pub mod stdr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::STDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATAW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - Transmit Data"]
            #[inline(always)]
            pub fn data(&mut self) -> _DATAW {
                _DATAW { w: self }
            }
        }
    }
    #[doc = "Slave Receive Data Register"]
    pub struct SRDR {
        register: VolatileCell<u32>,
    }
    #[doc = "Slave Receive Data Register"]
    pub mod srdr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::SRDR {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATAR {
            bits: u8,
        }
        impl DATAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `RXEMPTY`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXEMPTYR {
            #[doc = "The Receive Data Register is not empty."]
            _0,
            #[doc = "The Receive Data Register is empty."]
            _1,
        }
        impl RXEMPTYR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXEMPTYR::_0 => false,
                    RXEMPTYR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXEMPTYR {
                match value {
                    false => RXEMPTYR::_0,
                    true => RXEMPTYR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXEMPTYR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RXEMPTYR::_1
            }
        }
        #[doc = "Possible values of the field `SOF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SOFR {
            #[doc = "Indicates this is not the first data word since a (repeated) START or STOP condition."]
            _0,
            #[doc = "Indicates this is the first data word since a (repeated) START or STOP condition."]
            _1,
        }
        impl SOFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SOFR::_0 => false,
                    SOFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SOFR {
                match value {
                    false => SOFR::_0,
                    true => SOFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SOFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SOFR::_1
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Receive Data"]
            #[inline(always)]
            pub fn data(&self) -> DATAR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                DATAR { bits }
            }
            #[doc = "Bit 14 - RX Empty"]
            #[inline(always)]
            pub fn rxempty(&self) -> RXEMPTYR {
                RXEMPTYR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - Start Of Frame"]
            #[inline(always)]
            pub fn sof(&self) -> SOFR {
                SOFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
    }
}
#[doc = "The LPI2C Memory Map/Register Definition can be found here."]
pub struct LPI2C0 {
    register_block: lpi2c0::RegisterBlock,
}
impl Deref for LPI2C0 {
    type Target = lpi2c0::RegisterBlock;
    fn deref(&self) -> &lpi2c0::RegisterBlock {
        &self.register_block
    }
}
#[doc = "Universal Asynchronous Receiver/Transmitter"]
pub const LPUART0: Peripheral<LPUART0> = unsafe { Peripheral::new(1074176000) };
#[doc = "Universal Asynchronous Receiver/Transmitter"]
pub mod lpuart0 {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - Version ID Register"]
        pub verid: VERID,
        #[doc = "0x04 - Parameter Register"]
        pub param: PARAM,
        #[doc = "0x08 - LPUART Global Register"]
        pub global: GLOBAL,
        #[doc = "0x0c - LPUART Pin Configuration Register"]
        pub pincfg: PINCFG,
        #[doc = "0x10 - LPUART Baud Rate Register"]
        pub baud: BAUD,
        #[doc = "0x14 - LPUART Status Register"]
        pub stat: STAT,
        #[doc = "0x18 - LPUART Control Register"]
        pub ctrl: CTRL,
        #[doc = "0x1c - LPUART Data Register"]
        pub data: DATA,
        #[doc = "0x20 - LPUART Match Address Register"]
        pub match_: MATCH,
        #[doc = "0x24 - LPUART Modem IrDA Register"]
        pub modir: MODIR,
        #[doc = "0x28 - LPUART FIFO Register"]
        pub fifo: FIFO,
        #[doc = "0x2c - LPUART Watermark Register"]
        pub water: WATER,
    }
    #[doc = "Version ID Register"]
    pub struct VERID {
        register: VolatileCell<u32>,
    }
    #[doc = "Version ID Register"]
    pub mod verid {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::VERID {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = "Possible values of the field `FEATURE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FEATURER {
            #[doc = "Standard feature set."]
            _0000000000000001,
            #[doc = "Standard feature set with MODEM/IrDA support."]
            _0000000000000011,
            #[doc = r" Reserved"]
            _Reserved(u16),
        }
        impl FEATURER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                match *self {
                    FEATURER::_0000000000000001 => 1,
                    FEATURER::_0000000000000011 => 3,
                    FEATURER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u16) -> FEATURER {
                match value {
                    1 => FEATURER::_0000000000000001,
                    3 => FEATURER::_0000000000000011,
                    i => FEATURER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000000000000001`"]
            #[inline(always)]
            pub fn is_0000000000000001(&self) -> bool {
                *self == FEATURER::_0000000000000001
            }
            #[doc = "Checks if the value of the field is `_0000000000000011`"]
            #[inline(always)]
            pub fn is_0000000000000011(&self) -> bool {
                *self == FEATURER::_0000000000000011
            }
        }
        #[doc = r" Value of the field"]
        pub struct MINORR {
            bits: u8,
        }
        impl MINORR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct MAJORR {
            bits: u8,
        }
        impl MAJORR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Feature Identification Number"]
            #[inline(always)]
            pub fn feature(&self) -> FEATURER {
                FEATURER::_from({
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                })
            }
            #[doc = "Bits 16:23 - Minor Version Number"]
            #[inline(always)]
            pub fn minor(&self) -> MINORR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                MINORR { bits }
            }
            #[doc = "Bits 24:31 - Major Version Number"]
            #[inline(always)]
            pub fn major(&self) -> MAJORR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                MAJORR { bits }
            }
        }
    }
    #[doc = "Parameter Register"]
    pub struct PARAM {
        register: VolatileCell<u32>,
    }
    #[doc = "Parameter Register"]
    pub mod param {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::PARAM {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct TXFIFOR {
            bits: u8,
        }
        impl TXFIFOR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct RXFIFOR {
            bits: u8,
        }
        impl RXFIFOR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Transmit FIFO Size"]
            #[inline(always)]
            pub fn txfifo(&self) -> TXFIFOR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TXFIFOR { bits }
            }
            #[doc = "Bits 8:15 - Receive FIFO Size"]
            #[inline(always)]
            pub fn rxfifo(&self) -> RXFIFOR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                RXFIFOR { bits }
            }
        }
    }
    #[doc = "LPUART Global Register"]
    pub struct GLOBAL {
        register: VolatileCell<u32>,
    }
    #[doc = "LPUART Global Register"]
    pub mod global {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::GLOBAL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `RST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RSTR {
            #[doc = "Module is not reset."]
            _0,
            #[doc = "Module is reset."]
            _1,
        }
        impl RSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RSTR::_0 => false,
                    RSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RSTR {
                match value {
                    false => RSTR::_0,
                    true => RSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RSTR::_1
            }
        }
        #[doc = "Values that can be written to the field `RST`"]
        pub enum RSTW {
            #[doc = "Module is not reset."]
            _0,
            #[doc = "Module is reset."]
            _1,
        }
        impl RSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RSTW::_0 => false,
                    RSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Module is not reset."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RSTW::_0)
            }
            #[doc = "Module is reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 1 - Software Reset"]
            #[inline(always)]
            pub fn rst(&self) -> RSTR {
                RSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 1 - Software Reset"]
            #[inline(always)]
            pub fn rst(&mut self) -> _RSTW {
                _RSTW { w: self }
            }
        }
    }
    #[doc = "LPUART Pin Configuration Register"]
    pub struct PINCFG {
        register: VolatileCell<u32>,
    }
    #[doc = "LPUART Pin Configuration Register"]
    pub mod pincfg {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PINCFG {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TRGSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRGSELR {
            #[doc = "Input trigger is disabled."]
            _00,
            #[doc = "Input trigger is used instead of RXD pin input."]
            _01,
            #[doc = "Input trigger is used instead of CTS_B pin input."]
            _10,
            #[doc = "Input trigger is used to modulate the TXD pin output. The TXD pin output (after TXINV configuration) is ANDed with the input trigger."]
            _11,
        }
        impl TRGSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TRGSELR::_00 => 0,
                    TRGSELR::_01 => 1,
                    TRGSELR::_10 => 2,
                    TRGSELR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TRGSELR {
                match value {
                    0 => TRGSELR::_00,
                    1 => TRGSELR::_01,
                    2 => TRGSELR::_10,
                    3 => TRGSELR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == TRGSELR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == TRGSELR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == TRGSELR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == TRGSELR::_11
            }
        }
        #[doc = "Values that can be written to the field `TRGSEL`"]
        pub enum TRGSELW {
            #[doc = "Input trigger is disabled."]
            _00,
            #[doc = "Input trigger is used instead of RXD pin input."]
            _01,
            #[doc = "Input trigger is used instead of CTS_B pin input."]
            _10,
            #[doc = "Input trigger is used to modulate the TXD pin output. The TXD pin output (after TXINV configuration) is ANDed with the input trigger."]
            _11,
        }
        impl TRGSELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TRGSELW::_00 => 0,
                    TRGSELW::_01 => 1,
                    TRGSELW::_10 => 2,
                    TRGSELW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRGSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRGSELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRGSELW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Input trigger is disabled."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(TRGSELW::_00)
            }
            #[doc = "Input trigger is used instead of RXD pin input."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(TRGSELW::_01)
            }
            #[doc = "Input trigger is used instead of CTS_B pin input."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(TRGSELW::_10)
            }
            #[doc = "Input trigger is used to modulate the TXD pin output. The TXD pin output (after TXINV configuration) is ANDed with the input trigger."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(TRGSELW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:1 - Trigger Select"]
            #[inline(always)]
            pub fn trgsel(&self) -> TRGSELR {
                TRGSELR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:1 - Trigger Select"]
            #[inline(always)]
            pub fn trgsel(&mut self) -> _TRGSELW {
                _TRGSELW { w: self }
            }
        }
    }
    #[doc = "LPUART Baud Rate Register"]
    pub struct BAUD {
        register: VolatileCell<u32>,
    }
    #[doc = "LPUART Baud Rate Register"]
    pub mod baud {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::BAUD {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SBRR {
            bits: u16,
        }
        impl SBRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `SBNS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SBNSR {
            #[doc = "One stop bit."]
            _0,
            #[doc = "Two stop bits."]
            _1,
        }
        impl SBNSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SBNSR::_0 => false,
                    SBNSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SBNSR {
                match value {
                    false => SBNSR::_0,
                    true => SBNSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SBNSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SBNSR::_1
            }
        }
        #[doc = "Possible values of the field `RXEDGIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXEDGIER {
            #[doc = "Hardware interrupts from LPUART_STAT[RXEDGIF] disabled."]
            _0,
            #[doc = "Hardware interrupt requested when LPUART_STAT[RXEDGIF] flag is 1."]
            _1,
        }
        impl RXEDGIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXEDGIER::_0 => false,
                    RXEDGIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXEDGIER {
                match value {
                    false => RXEDGIER::_0,
                    true => RXEDGIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXEDGIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RXEDGIER::_1
            }
        }
        #[doc = "Possible values of the field `LBKDIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LBKDIER {
            #[doc = "Hardware interrupts from LPUART_STAT[LBKDIF] disabled (use polling)."]
            _0,
            #[doc = "Hardware interrupt requested when LPUART_STAT[LBKDIF] flag is 1."]
            _1,
        }
        impl LBKDIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LBKDIER::_0 => false,
                    LBKDIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LBKDIER {
                match value {
                    false => LBKDIER::_0,
                    true => LBKDIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LBKDIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LBKDIER::_1
            }
        }
        #[doc = "Possible values of the field `RESYNCDIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RESYNCDISR {
            #[doc = "Resynchronization during received data word is supported"]
            _0,
            #[doc = "Resynchronization during received data word is disabled"]
            _1,
        }
        impl RESYNCDISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RESYNCDISR::_0 => false,
                    RESYNCDISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RESYNCDISR {
                match value {
                    false => RESYNCDISR::_0,
                    true => RESYNCDISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RESYNCDISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RESYNCDISR::_1
            }
        }
        #[doc = "Possible values of the field `BOTHEDGE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BOTHEDGER {
            #[doc = "Receiver samples input data using the rising edge of the baud rate clock."]
            _0,
            #[doc = "Receiver samples input data using the rising and falling edge of the baud rate clock."]
            _1,
        }
        impl BOTHEDGER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BOTHEDGER::_0 => false,
                    BOTHEDGER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BOTHEDGER {
                match value {
                    false => BOTHEDGER::_0,
                    true => BOTHEDGER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BOTHEDGER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BOTHEDGER::_1
            }
        }
        #[doc = "Possible values of the field `MATCFG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MATCFGR {
            #[doc = "Address Match Wakeup"]
            _00,
            #[doc = "Idle Match Wakeup"]
            _01,
            #[doc = "Match On and Match Off"]
            _10,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl MATCFGR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MATCFGR::_00 => 0,
                    MATCFGR::_01 => 1,
                    MATCFGR::_10 => 2,
                    MATCFGR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MATCFGR {
                match value {
                    0 => MATCFGR::_00,
                    1 => MATCFGR::_01,
                    2 => MATCFGR::_10,
                    i => MATCFGR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == MATCFGR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == MATCFGR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == MATCFGR::_10
            }
        }
        #[doc = "Possible values of the field `RIDMAE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RIDMAER {
            #[doc = "DMA request disabled."]
            _0,
            #[doc = "DMA request enabled."]
            _1,
        }
        impl RIDMAER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RIDMAER::_0 => false,
                    RIDMAER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RIDMAER {
                match value {
                    false => RIDMAER::_0,
                    true => RIDMAER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RIDMAER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RIDMAER::_1
            }
        }
        #[doc = "Possible values of the field `RDMAE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RDMAER {
            #[doc = "DMA request disabled."]
            _0,
            #[doc = "DMA request enabled."]
            _1,
        }
        impl RDMAER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RDMAER::_0 => false,
                    RDMAER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RDMAER {
                match value {
                    false => RDMAER::_0,
                    true => RDMAER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RDMAER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RDMAER::_1
            }
        }
        #[doc = "Possible values of the field `TDMAE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TDMAER {
            #[doc = "DMA request disabled."]
            _0,
            #[doc = "DMA request enabled."]
            _1,
        }
        impl TDMAER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TDMAER::_0 => false,
                    TDMAER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TDMAER {
                match value {
                    false => TDMAER::_0,
                    true => TDMAER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TDMAER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TDMAER::_1
            }
        }
        #[doc = "Possible values of the field `OSR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum OSRR {
            #[doc = "Writing 0 to this field will result in an oversampling ratio of 16"]
            _00000,
            #[doc = "Oversampling ratio of 4, requires BOTHEDGE to be set."]
            _00011,
            #[doc = "Oversampling ratio of 5, requires BOTHEDGE to be set."]
            _00100,
            #[doc = "Oversampling ratio of 6, requires BOTHEDGE to be set."]
            _00101,
            #[doc = "Oversampling ratio of 7, requires BOTHEDGE to be set."]
            _00110,
            #[doc = "Oversampling ratio of 8."]
            _00111,
            #[doc = "Oversampling ratio of 9."]
            _01000,
            #[doc = "Oversampling ratio of 10."]
            _01001,
            #[doc = "Oversampling ratio of 11."]
            _01010,
            #[doc = "Oversampling ratio of 12."]
            _01011,
            #[doc = "Oversampling ratio of 13."]
            _01100,
            #[doc = "Oversampling ratio of 14."]
            _01101,
            #[doc = "Oversampling ratio of 15."]
            _01110,
            #[doc = "Oversampling ratio of 16."]
            _01111,
            #[doc = "Oversampling ratio of 17."]
            _10000,
            #[doc = "Oversampling ratio of 18."]
            _10001,
            #[doc = "Oversampling ratio of 19."]
            _10010,
            #[doc = "Oversampling ratio of 20."]
            _10011,
            #[doc = "Oversampling ratio of 21."]
            _10100,
            #[doc = "Oversampling ratio of 22."]
            _10101,
            #[doc = "Oversampling ratio of 23."]
            _10110,
            #[doc = "Oversampling ratio of 24."]
            _10111,
            #[doc = "Oversampling ratio of 25."]
            _11000,
            #[doc = "Oversampling ratio of 26."]
            _11001,
            #[doc = "Oversampling ratio of 27."]
            _11010,
            #[doc = "Oversampling ratio of 28."]
            _11011,
            #[doc = "Oversampling ratio of 29."]
            _11100,
            #[doc = "Oversampling ratio of 30."]
            _11101,
            #[doc = "Oversampling ratio of 31."]
            _11110,
            #[doc = "Oversampling ratio of 32."]
            _11111,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl OSRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    OSRR::_00000 => 0,
                    OSRR::_00011 => 3,
                    OSRR::_00100 => 4,
                    OSRR::_00101 => 5,
                    OSRR::_00110 => 6,
                    OSRR::_00111 => 7,
                    OSRR::_01000 => 8,
                    OSRR::_01001 => 9,
                    OSRR::_01010 => 10,
                    OSRR::_01011 => 11,
                    OSRR::_01100 => 12,
                    OSRR::_01101 => 13,
                    OSRR::_01110 => 14,
                    OSRR::_01111 => 15,
                    OSRR::_10000 => 16,
                    OSRR::_10001 => 17,
                    OSRR::_10010 => 18,
                    OSRR::_10011 => 19,
                    OSRR::_10100 => 20,
                    OSRR::_10101 => 21,
                    OSRR::_10110 => 22,
                    OSRR::_10111 => 23,
                    OSRR::_11000 => 24,
                    OSRR::_11001 => 25,
                    OSRR::_11010 => 26,
                    OSRR::_11011 => 27,
                    OSRR::_11100 => 28,
                    OSRR::_11101 => 29,
                    OSRR::_11110 => 30,
                    OSRR::_11111 => 31,
                    OSRR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> OSRR {
                match value {
                    0 => OSRR::_00000,
                    3 => OSRR::_00011,
                    4 => OSRR::_00100,
                    5 => OSRR::_00101,
                    6 => OSRR::_00110,
                    7 => OSRR::_00111,
                    8 => OSRR::_01000,
                    9 => OSRR::_01001,
                    10 => OSRR::_01010,
                    11 => OSRR::_01011,
                    12 => OSRR::_01100,
                    13 => OSRR::_01101,
                    14 => OSRR::_01110,
                    15 => OSRR::_01111,
                    16 => OSRR::_10000,
                    17 => OSRR::_10001,
                    18 => OSRR::_10010,
                    19 => OSRR::_10011,
                    20 => OSRR::_10100,
                    21 => OSRR::_10101,
                    22 => OSRR::_10110,
                    23 => OSRR::_10111,
                    24 => OSRR::_11000,
                    25 => OSRR::_11001,
                    26 => OSRR::_11010,
                    27 => OSRR::_11011,
                    28 => OSRR::_11100,
                    29 => OSRR::_11101,
                    30 => OSRR::_11110,
                    31 => OSRR::_11111,
                    i => OSRR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_00000`"]
            #[inline(always)]
            pub fn is_00000(&self) -> bool {
                *self == OSRR::_00000
            }
            #[doc = "Checks if the value of the field is `_00011`"]
            #[inline(always)]
            pub fn is_00011(&self) -> bool {
                *self == OSRR::_00011
            }
            #[doc = "Checks if the value of the field is `_00100`"]
            #[inline(always)]
            pub fn is_00100(&self) -> bool {
                *self == OSRR::_00100
            }
            #[doc = "Checks if the value of the field is `_00101`"]
            #[inline(always)]
            pub fn is_00101(&self) -> bool {
                *self == OSRR::_00101
            }
            #[doc = "Checks if the value of the field is `_00110`"]
            #[inline(always)]
            pub fn is_00110(&self) -> bool {
                *self == OSRR::_00110
            }
            #[doc = "Checks if the value of the field is `_00111`"]
            #[inline(always)]
            pub fn is_00111(&self) -> bool {
                *self == OSRR::_00111
            }
            #[doc = "Checks if the value of the field is `_01000`"]
            #[inline(always)]
            pub fn is_01000(&self) -> bool {
                *self == OSRR::_01000
            }
            #[doc = "Checks if the value of the field is `_01001`"]
            #[inline(always)]
            pub fn is_01001(&self) -> bool {
                *self == OSRR::_01001
            }
            #[doc = "Checks if the value of the field is `_01010`"]
            #[inline(always)]
            pub fn is_01010(&self) -> bool {
                *self == OSRR::_01010
            }
            #[doc = "Checks if the value of the field is `_01011`"]
            #[inline(always)]
            pub fn is_01011(&self) -> bool {
                *self == OSRR::_01011
            }
            #[doc = "Checks if the value of the field is `_01100`"]
            #[inline(always)]
            pub fn is_01100(&self) -> bool {
                *self == OSRR::_01100
            }
            #[doc = "Checks if the value of the field is `_01101`"]
            #[inline(always)]
            pub fn is_01101(&self) -> bool {
                *self == OSRR::_01101
            }
            #[doc = "Checks if the value of the field is `_01110`"]
            #[inline(always)]
            pub fn is_01110(&self) -> bool {
                *self == OSRR::_01110
            }
            #[doc = "Checks if the value of the field is `_01111`"]
            #[inline(always)]
            pub fn is_01111(&self) -> bool {
                *self == OSRR::_01111
            }
            #[doc = "Checks if the value of the field is `_10000`"]
            #[inline(always)]
            pub fn is_10000(&self) -> bool {
                *self == OSRR::_10000
            }
            #[doc = "Checks if the value of the field is `_10001`"]
            #[inline(always)]
            pub fn is_10001(&self) -> bool {
                *self == OSRR::_10001
            }
            #[doc = "Checks if the value of the field is `_10010`"]
            #[inline(always)]
            pub fn is_10010(&self) -> bool {
                *self == OSRR::_10010
            }
            #[doc = "Checks if the value of the field is `_10011`"]
            #[inline(always)]
            pub fn is_10011(&self) -> bool {
                *self == OSRR::_10011
            }
            #[doc = "Checks if the value of the field is `_10100`"]
            #[inline(always)]
            pub fn is_10100(&self) -> bool {
                *self == OSRR::_10100
            }
            #[doc = "Checks if the value of the field is `_10101`"]
            #[inline(always)]
            pub fn is_10101(&self) -> bool {
                *self == OSRR::_10101
            }
            #[doc = "Checks if the value of the field is `_10110`"]
            #[inline(always)]
            pub fn is_10110(&self) -> bool {
                *self == OSRR::_10110
            }
            #[doc = "Checks if the value of the field is `_10111`"]
            #[inline(always)]
            pub fn is_10111(&self) -> bool {
                *self == OSRR::_10111
            }
            #[doc = "Checks if the value of the field is `_11000`"]
            #[inline(always)]
            pub fn is_11000(&self) -> bool {
                *self == OSRR::_11000
            }
            #[doc = "Checks if the value of the field is `_11001`"]
            #[inline(always)]
            pub fn is_11001(&self) -> bool {
                *self == OSRR::_11001
            }
            #[doc = "Checks if the value of the field is `_11010`"]
            #[inline(always)]
            pub fn is_11010(&self) -> bool {
                *self == OSRR::_11010
            }
            #[doc = "Checks if the value of the field is `_11011`"]
            #[inline(always)]
            pub fn is_11011(&self) -> bool {
                *self == OSRR::_11011
            }
            #[doc = "Checks if the value of the field is `_11100`"]
            #[inline(always)]
            pub fn is_11100(&self) -> bool {
                *self == OSRR::_11100
            }
            #[doc = "Checks if the value of the field is `_11101`"]
            #[inline(always)]
            pub fn is_11101(&self) -> bool {
                *self == OSRR::_11101
            }
            #[doc = "Checks if the value of the field is `_11110`"]
            #[inline(always)]
            pub fn is_11110(&self) -> bool {
                *self == OSRR::_11110
            }
            #[doc = "Checks if the value of the field is `_11111`"]
            #[inline(always)]
            pub fn is_11111(&self) -> bool {
                *self == OSRR::_11111
            }
        }
        #[doc = "Possible values of the field `M10`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum M10R {
            #[doc = "Receiver and transmitter use 7-bit to 9-bit data characters."]
            _0,
            #[doc = "Receiver and transmitter use 10-bit data characters."]
            _1,
        }
        impl M10R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    M10R::_0 => false,
                    M10R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> M10R {
                match value {
                    false => M10R::_0,
                    true => M10R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == M10R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == M10R::_1
            }
        }
        #[doc = "Possible values of the field `MAEN2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MAEN2R {
            #[doc = "Normal operation."]
            _0,
            #[doc = "Enables automatic address matching or data matching mode for MATCH[MA2]."]
            _1,
        }
        impl MAEN2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MAEN2R::_0 => false,
                    MAEN2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MAEN2R {
                match value {
                    false => MAEN2R::_0,
                    true => MAEN2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MAEN2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MAEN2R::_1
            }
        }
        #[doc = "Possible values of the field `MAEN1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MAEN1R {
            #[doc = "Normal operation."]
            _0,
            #[doc = "Enables automatic address matching or data matching mode for MATCH[MA1]."]
            _1,
        }
        impl MAEN1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MAEN1R::_0 => false,
                    MAEN1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MAEN1R {
                match value {
                    false => MAEN1R::_0,
                    true => MAEN1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MAEN1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MAEN1R::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _SBRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SBRW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 8191;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SBNS`"]
        pub enum SBNSW {
            #[doc = "One stop bit."]
            _0,
            #[doc = "Two stop bits."]
            _1,
        }
        impl SBNSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SBNSW::_0 => false,
                    SBNSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SBNSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SBNSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SBNSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "One stop bit."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SBNSW::_0)
            }
            #[doc = "Two stop bits."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SBNSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RXEDGIE`"]
        pub enum RXEDGIEW {
            #[doc = "Hardware interrupts from LPUART_STAT[RXEDGIF] disabled."]
            _0,
            #[doc = "Hardware interrupt requested when LPUART_STAT[RXEDGIF] flag is 1."]
            _1,
        }
        impl RXEDGIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RXEDGIEW::_0 => false,
                    RXEDGIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXEDGIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXEDGIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RXEDGIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Hardware interrupts from LPUART_STAT[RXEDGIF] disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RXEDGIEW::_0)
            }
            #[doc = "Hardware interrupt requested when LPUART_STAT[RXEDGIF] flag is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RXEDGIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LBKDIE`"]
        pub enum LBKDIEW {
            #[doc = "Hardware interrupts from LPUART_STAT[LBKDIF] disabled (use polling)."]
            _0,
            #[doc = "Hardware interrupt requested when LPUART_STAT[LBKDIF] flag is 1."]
            _1,
        }
        impl LBKDIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LBKDIEW::_0 => false,
                    LBKDIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LBKDIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LBKDIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LBKDIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Hardware interrupts from LPUART_STAT[LBKDIF] disabled (use polling)."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LBKDIEW::_0)
            }
            #[doc = "Hardware interrupt requested when LPUART_STAT[LBKDIF] flag is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LBKDIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RESYNCDIS`"]
        pub enum RESYNCDISW {
            #[doc = "Resynchronization during received data word is supported"]
            _0,
            #[doc = "Resynchronization during received data word is disabled"]
            _1,
        }
        impl RESYNCDISW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RESYNCDISW::_0 => false,
                    RESYNCDISW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RESYNCDISW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RESYNCDISW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RESYNCDISW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Resynchronization during received data word is supported"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RESYNCDISW::_0)
            }
            #[doc = "Resynchronization during received data word is disabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RESYNCDISW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BOTHEDGE`"]
        pub enum BOTHEDGEW {
            #[doc = "Receiver samples input data using the rising edge of the baud rate clock."]
            _0,
            #[doc = "Receiver samples input data using the rising and falling edge of the baud rate clock."]
            _1,
        }
        impl BOTHEDGEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    BOTHEDGEW::_0 => false,
                    BOTHEDGEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BOTHEDGEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BOTHEDGEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BOTHEDGEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Receiver samples input data using the rising edge of the baud rate clock."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BOTHEDGEW::_0)
            }
            #[doc = "Receiver samples input data using the rising and falling edge of the baud rate clock."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BOTHEDGEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MATCFG`"]
        pub enum MATCFGW {
            #[doc = "Address Match Wakeup"]
            _00,
            #[doc = "Idle Match Wakeup"]
            _01,
            #[doc = "Match On and Match Off"]
            _10,
        }
        impl MATCFGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MATCFGW::_00 => 0,
                    MATCFGW::_01 => 1,
                    MATCFGW::_10 => 2,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MATCFGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MATCFGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MATCFGW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Address Match Wakeup"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(MATCFGW::_00)
            }
            #[doc = "Idle Match Wakeup"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(MATCFGW::_01)
            }
            #[doc = "Match On and Match Off"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(MATCFGW::_10)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RIDMAE`"]
        pub enum RIDMAEW {
            #[doc = "DMA request disabled."]
            _0,
            #[doc = "DMA request enabled."]
            _1,
        }
        impl RIDMAEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RIDMAEW::_0 => false,
                    RIDMAEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RIDMAEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RIDMAEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RIDMAEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA request disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RIDMAEW::_0)
            }
            #[doc = "DMA request enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RIDMAEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RDMAE`"]
        pub enum RDMAEW {
            #[doc = "DMA request disabled."]
            _0,
            #[doc = "DMA request enabled."]
            _1,
        }
        impl RDMAEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RDMAEW::_0 => false,
                    RDMAEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RDMAEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RDMAEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RDMAEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA request disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RDMAEW::_0)
            }
            #[doc = "DMA request enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RDMAEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 21;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TDMAE`"]
        pub enum TDMAEW {
            #[doc = "DMA request disabled."]
            _0,
            #[doc = "DMA request enabled."]
            _1,
        }
        impl TDMAEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TDMAEW::_0 => false,
                    TDMAEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TDMAEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TDMAEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TDMAEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA request disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TDMAEW::_0)
            }
            #[doc = "DMA request enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TDMAEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 23;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `OSR`"]
        pub enum OSRW {
            #[doc = "Writing 0 to this field will result in an oversampling ratio of 16"]
            _00000,
            #[doc = "Oversampling ratio of 4, requires BOTHEDGE to be set."]
            _00011,
            #[doc = "Oversampling ratio of 5, requires BOTHEDGE to be set."]
            _00100,
            #[doc = "Oversampling ratio of 6, requires BOTHEDGE to be set."]
            _00101,
            #[doc = "Oversampling ratio of 7, requires BOTHEDGE to be set."]
            _00110,
            #[doc = "Oversampling ratio of 8."]
            _00111,
            #[doc = "Oversampling ratio of 9."]
            _01000,
            #[doc = "Oversampling ratio of 10."]
            _01001,
            #[doc = "Oversampling ratio of 11."]
            _01010,
            #[doc = "Oversampling ratio of 12."]
            _01011,
            #[doc = "Oversampling ratio of 13."]
            _01100,
            #[doc = "Oversampling ratio of 14."]
            _01101,
            #[doc = "Oversampling ratio of 15."]
            _01110,
            #[doc = "Oversampling ratio of 16."]
            _01111,
            #[doc = "Oversampling ratio of 17."]
            _10000,
            #[doc = "Oversampling ratio of 18."]
            _10001,
            #[doc = "Oversampling ratio of 19."]
            _10010,
            #[doc = "Oversampling ratio of 20."]
            _10011,
            #[doc = "Oversampling ratio of 21."]
            _10100,
            #[doc = "Oversampling ratio of 22."]
            _10101,
            #[doc = "Oversampling ratio of 23."]
            _10110,
            #[doc = "Oversampling ratio of 24."]
            _10111,
            #[doc = "Oversampling ratio of 25."]
            _11000,
            #[doc = "Oversampling ratio of 26."]
            _11001,
            #[doc = "Oversampling ratio of 27."]
            _11010,
            #[doc = "Oversampling ratio of 28."]
            _11011,
            #[doc = "Oversampling ratio of 29."]
            _11100,
            #[doc = "Oversampling ratio of 30."]
            _11101,
            #[doc = "Oversampling ratio of 31."]
            _11110,
            #[doc = "Oversampling ratio of 32."]
            _11111,
        }
        impl OSRW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    OSRW::_00000 => 0,
                    OSRW::_00011 => 3,
                    OSRW::_00100 => 4,
                    OSRW::_00101 => 5,
                    OSRW::_00110 => 6,
                    OSRW::_00111 => 7,
                    OSRW::_01000 => 8,
                    OSRW::_01001 => 9,
                    OSRW::_01010 => 10,
                    OSRW::_01011 => 11,
                    OSRW::_01100 => 12,
                    OSRW::_01101 => 13,
                    OSRW::_01110 => 14,
                    OSRW::_01111 => 15,
                    OSRW::_10000 => 16,
                    OSRW::_10001 => 17,
                    OSRW::_10010 => 18,
                    OSRW::_10011 => 19,
                    OSRW::_10100 => 20,
                    OSRW::_10101 => 21,
                    OSRW::_10110 => 22,
                    OSRW::_10111 => 23,
                    OSRW::_11000 => 24,
                    OSRW::_11001 => 25,
                    OSRW::_11010 => 26,
                    OSRW::_11011 => 27,
                    OSRW::_11100 => 28,
                    OSRW::_11101 => 29,
                    OSRW::_11110 => 30,
                    OSRW::_11111 => 31,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _OSRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _OSRW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: OSRW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Writing 0 to this field will result in an oversampling ratio of 16"]
            #[inline(always)]
            pub fn _00000(self) -> &'a mut W {
                self.variant(OSRW::_00000)
            }
            #[doc = "Oversampling ratio of 4, requires BOTHEDGE to be set."]
            #[inline(always)]
            pub fn _00011(self) -> &'a mut W {
                self.variant(OSRW::_00011)
            }
            #[doc = "Oversampling ratio of 5, requires BOTHEDGE to be set."]
            #[inline(always)]
            pub fn _00100(self) -> &'a mut W {
                self.variant(OSRW::_00100)
            }
            #[doc = "Oversampling ratio of 6, requires BOTHEDGE to be set."]
            #[inline(always)]
            pub fn _00101(self) -> &'a mut W {
                self.variant(OSRW::_00101)
            }
            #[doc = "Oversampling ratio of 7, requires BOTHEDGE to be set."]
            #[inline(always)]
            pub fn _00110(self) -> &'a mut W {
                self.variant(OSRW::_00110)
            }
            #[doc = "Oversampling ratio of 8."]
            #[inline(always)]
            pub fn _00111(self) -> &'a mut W {
                self.variant(OSRW::_00111)
            }
            #[doc = "Oversampling ratio of 9."]
            #[inline(always)]
            pub fn _01000(self) -> &'a mut W {
                self.variant(OSRW::_01000)
            }
            #[doc = "Oversampling ratio of 10."]
            #[inline(always)]
            pub fn _01001(self) -> &'a mut W {
                self.variant(OSRW::_01001)
            }
            #[doc = "Oversampling ratio of 11."]
            #[inline(always)]
            pub fn _01010(self) -> &'a mut W {
                self.variant(OSRW::_01010)
            }
            #[doc = "Oversampling ratio of 12."]
            #[inline(always)]
            pub fn _01011(self) -> &'a mut W {
                self.variant(OSRW::_01011)
            }
            #[doc = "Oversampling ratio of 13."]
            #[inline(always)]
            pub fn _01100(self) -> &'a mut W {
                self.variant(OSRW::_01100)
            }
            #[doc = "Oversampling ratio of 14."]
            #[inline(always)]
            pub fn _01101(self) -> &'a mut W {
                self.variant(OSRW::_01101)
            }
            #[doc = "Oversampling ratio of 15."]
            #[inline(always)]
            pub fn _01110(self) -> &'a mut W {
                self.variant(OSRW::_01110)
            }
            #[doc = "Oversampling ratio of 16."]
            #[inline(always)]
            pub fn _01111(self) -> &'a mut W {
                self.variant(OSRW::_01111)
            }
            #[doc = "Oversampling ratio of 17."]
            #[inline(always)]
            pub fn _10000(self) -> &'a mut W {
                self.variant(OSRW::_10000)
            }
            #[doc = "Oversampling ratio of 18."]
            #[inline(always)]
            pub fn _10001(self) -> &'a mut W {
                self.variant(OSRW::_10001)
            }
            #[doc = "Oversampling ratio of 19."]
            #[inline(always)]
            pub fn _10010(self) -> &'a mut W {
                self.variant(OSRW::_10010)
            }
            #[doc = "Oversampling ratio of 20."]
            #[inline(always)]
            pub fn _10011(self) -> &'a mut W {
                self.variant(OSRW::_10011)
            }
            #[doc = "Oversampling ratio of 21."]
            #[inline(always)]
            pub fn _10100(self) -> &'a mut W {
                self.variant(OSRW::_10100)
            }
            #[doc = "Oversampling ratio of 22."]
            #[inline(always)]
            pub fn _10101(self) -> &'a mut W {
                self.variant(OSRW::_10101)
            }
            #[doc = "Oversampling ratio of 23."]
            #[inline(always)]
            pub fn _10110(self) -> &'a mut W {
                self.variant(OSRW::_10110)
            }
            #[doc = "Oversampling ratio of 24."]
            #[inline(always)]
            pub fn _10111(self) -> &'a mut W {
                self.variant(OSRW::_10111)
            }
            #[doc = "Oversampling ratio of 25."]
            #[inline(always)]
            pub fn _11000(self) -> &'a mut W {
                self.variant(OSRW::_11000)
            }
            #[doc = "Oversampling ratio of 26."]
            #[inline(always)]
            pub fn _11001(self) -> &'a mut W {
                self.variant(OSRW::_11001)
            }
            #[doc = "Oversampling ratio of 27."]
            #[inline(always)]
            pub fn _11010(self) -> &'a mut W {
                self.variant(OSRW::_11010)
            }
            #[doc = "Oversampling ratio of 28."]
            #[inline(always)]
            pub fn _11011(self) -> &'a mut W {
                self.variant(OSRW::_11011)
            }
            #[doc = "Oversampling ratio of 29."]
            #[inline(always)]
            pub fn _11100(self) -> &'a mut W {
                self.variant(OSRW::_11100)
            }
            #[doc = "Oversampling ratio of 30."]
            #[inline(always)]
            pub fn _11101(self) -> &'a mut W {
                self.variant(OSRW::_11101)
            }
            #[doc = "Oversampling ratio of 31."]
            #[inline(always)]
            pub fn _11110(self) -> &'a mut W {
                self.variant(OSRW::_11110)
            }
            #[doc = "Oversampling ratio of 32."]
            #[inline(always)]
            pub fn _11111(self) -> &'a mut W {
                self.variant(OSRW::_11111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `M10`"]
        pub enum M10W {
            #[doc = "Receiver and transmitter use 7-bit to 9-bit data characters."]
            _0,
            #[doc = "Receiver and transmitter use 10-bit data characters."]
            _1,
        }
        impl M10W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    M10W::_0 => false,
                    M10W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _M10W<'a> {
            w: &'a mut W,
        }
        impl<'a> _M10W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: M10W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Receiver and transmitter use 7-bit to 9-bit data characters."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(M10W::_0)
            }
            #[doc = "Receiver and transmitter use 10-bit data characters."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(M10W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 29;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MAEN2`"]
        pub enum MAEN2W {
            #[doc = "Normal operation."]
            _0,
            #[doc = "Enables automatic address matching or data matching mode for MATCH[MA2]."]
            _1,
        }
        impl MAEN2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MAEN2W::_0 => false,
                    MAEN2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MAEN2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MAEN2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MAEN2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Normal operation."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MAEN2W::_0)
            }
            #[doc = "Enables automatic address matching or data matching mode for MATCH[MA2]."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MAEN2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MAEN1`"]
        pub enum MAEN1W {
            #[doc = "Normal operation."]
            _0,
            #[doc = "Enables automatic address matching or data matching mode for MATCH[MA1]."]
            _1,
        }
        impl MAEN1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MAEN1W::_0 => false,
                    MAEN1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MAEN1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MAEN1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MAEN1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Normal operation."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MAEN1W::_0)
            }
            #[doc = "Enables automatic address matching or data matching mode for MATCH[MA1]."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MAEN1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:12 - Baud Rate Modulo Divisor."]
            #[inline(always)]
            pub fn sbr(&self) -> SBRR {
                let bits = {
                    const MASK: u16 = 8191;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                SBRR { bits }
            }
            #[doc = "Bit 13 - Stop Bit Number Select"]
            #[inline(always)]
            pub fn sbns(&self) -> SBNSR {
                SBNSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - RX Input Active Edge Interrupt Enable"]
            #[inline(always)]
            pub fn rxedgie(&self) -> RXEDGIER {
                RXEDGIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - LIN Break Detect Interrupt Enable"]
            #[inline(always)]
            pub fn lbkdie(&self) -> LBKDIER {
                LBKDIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 16 - Resynchronization Disable"]
            #[inline(always)]
            pub fn resyncdis(&self) -> RESYNCDISR {
                RESYNCDISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - Both Edge Sampling"]
            #[inline(always)]
            pub fn bothedge(&self) -> BOTHEDGER {
                BOTHEDGER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 18:19 - Match Configuration"]
            #[inline(always)]
            pub fn matcfg(&self) -> MATCFGR {
                MATCFGR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 20 - Receiver Idle DMA Enable"]
            #[inline(always)]
            pub fn ridmae(&self) -> RIDMAER {
                RIDMAER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - Receiver Full DMA Enable"]
            #[inline(always)]
            pub fn rdmae(&self) -> RDMAER {
                RDMAER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 23 - Transmitter DMA Enable"]
            #[inline(always)]
            pub fn tdmae(&self) -> TDMAER {
                TDMAER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 24:28 - Oversampling Ratio"]
            #[inline(always)]
            pub fn osr(&self) -> OSRR {
                OSRR::_from({
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 29 - 10-bit Mode select"]
            #[inline(always)]
            pub fn m10(&self) -> M10R {
                M10R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 29;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 30 - Match Address Mode Enable 2"]
            #[inline(always)]
            pub fn maen2(&self) -> MAEN2R {
                MAEN2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Match Address Mode Enable 1"]
            #[inline(always)]
            pub fn maen1(&self) -> MAEN1R {
                MAEN1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 251658244 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:12 - Baud Rate Modulo Divisor."]
            #[inline(always)]
            pub fn sbr(&mut self) -> _SBRW {
                _SBRW { w: self }
            }
            #[doc = "Bit 13 - Stop Bit Number Select"]
            #[inline(always)]
            pub fn sbns(&mut self) -> _SBNSW {
                _SBNSW { w: self }
            }
            #[doc = "Bit 14 - RX Input Active Edge Interrupt Enable"]
            #[inline(always)]
            pub fn rxedgie(&mut self) -> _RXEDGIEW {
                _RXEDGIEW { w: self }
            }
            #[doc = "Bit 15 - LIN Break Detect Interrupt Enable"]
            #[inline(always)]
            pub fn lbkdie(&mut self) -> _LBKDIEW {
                _LBKDIEW { w: self }
            }
            #[doc = "Bit 16 - Resynchronization Disable"]
            #[inline(always)]
            pub fn resyncdis(&mut self) -> _RESYNCDISW {
                _RESYNCDISW { w: self }
            }
            #[doc = "Bit 17 - Both Edge Sampling"]
            #[inline(always)]
            pub fn bothedge(&mut self) -> _BOTHEDGEW {
                _BOTHEDGEW { w: self }
            }
            #[doc = "Bits 18:19 - Match Configuration"]
            #[inline(always)]
            pub fn matcfg(&mut self) -> _MATCFGW {
                _MATCFGW { w: self }
            }
            #[doc = "Bit 20 - Receiver Idle DMA Enable"]
            #[inline(always)]
            pub fn ridmae(&mut self) -> _RIDMAEW {
                _RIDMAEW { w: self }
            }
            #[doc = "Bit 21 - Receiver Full DMA Enable"]
            #[inline(always)]
            pub fn rdmae(&mut self) -> _RDMAEW {
                _RDMAEW { w: self }
            }
            #[doc = "Bit 23 - Transmitter DMA Enable"]
            #[inline(always)]
            pub fn tdmae(&mut self) -> _TDMAEW {
                _TDMAEW { w: self }
            }
            #[doc = "Bits 24:28 - Oversampling Ratio"]
            #[inline(always)]
            pub fn osr(&mut self) -> _OSRW {
                _OSRW { w: self }
            }
            #[doc = "Bit 29 - 10-bit Mode select"]
            #[inline(always)]
            pub fn m10(&mut self) -> _M10W {
                _M10W { w: self }
            }
            #[doc = "Bit 30 - Match Address Mode Enable 2"]
            #[inline(always)]
            pub fn maen2(&mut self) -> _MAEN2W {
                _MAEN2W { w: self }
            }
            #[doc = "Bit 31 - Match Address Mode Enable 1"]
            #[inline(always)]
            pub fn maen1(&mut self) -> _MAEN1W {
                _MAEN1W { w: self }
            }
        }
    }
    #[doc = "LPUART Status Register"]
    pub struct STAT {
        register: VolatileCell<u32>,
    }
    #[doc = "LPUART Status Register"]
    pub mod stat {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::STAT {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `MA2F`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MA2FR {
            #[doc = "Received data is not equal to MA2"]
            _0,
            #[doc = "Received data is equal to MA2"]
            _1,
        }
        impl MA2FR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MA2FR::_0 => false,
                    MA2FR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MA2FR {
                match value {
                    false => MA2FR::_0,
                    true => MA2FR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MA2FR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MA2FR::_1
            }
        }
        #[doc = "Possible values of the field `MA1F`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MA1FR {
            #[doc = "Received data is not equal to MA1"]
            _0,
            #[doc = "Received data is equal to MA1"]
            _1,
        }
        impl MA1FR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MA1FR::_0 => false,
                    MA1FR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MA1FR {
                match value {
                    false => MA1FR::_0,
                    true => MA1FR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MA1FR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MA1FR::_1
            }
        }
        #[doc = "Possible values of the field `PF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PFR {
            #[doc = "No parity error."]
            _0,
            #[doc = "Parity error."]
            _1,
        }
        impl PFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PFR::_0 => false,
                    PFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PFR {
                match value {
                    false => PFR::_0,
                    true => PFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PFR::_1
            }
        }
        #[doc = "Possible values of the field `FE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FER {
            #[doc = "No framing error detected. This does not guarantee the framing is correct."]
            _0,
            #[doc = "Framing error."]
            _1,
        }
        impl FER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FER::_0 => false,
                    FER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FER {
                match value {
                    false => FER::_0,
                    true => FER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FER::_1
            }
        }
        #[doc = "Possible values of the field `NF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum NFR {
            #[doc = "No noise detected."]
            _0,
            #[doc = "Noise detected in the received character in LPUART_DATA."]
            _1,
        }
        impl NFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    NFR::_0 => false,
                    NFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> NFR {
                match value {
                    false => NFR::_0,
                    true => NFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == NFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == NFR::_1
            }
        }
        #[doc = "Possible values of the field `OR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ORR {
            #[doc = "No overrun."]
            _0,
            #[doc = "Receive overrun (new LPUART data lost)."]
            _1,
        }
        impl ORR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ORR::_0 => false,
                    ORR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ORR {
                match value {
                    false => ORR::_0,
                    true => ORR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ORR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ORR::_1
            }
        }
        #[doc = "Possible values of the field `IDLE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IDLER {
            #[doc = "No idle line detected."]
            _0,
            #[doc = "Idle line was detected."]
            _1,
        }
        impl IDLER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    IDLER::_0 => false,
                    IDLER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> IDLER {
                match value {
                    false => IDLER::_0,
                    true => IDLER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == IDLER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == IDLER::_1
            }
        }
        #[doc = "Possible values of the field `RDRF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RDRFR {
            #[doc = "Receive data buffer empty."]
            _0,
            #[doc = "Receive data buffer full."]
            _1,
        }
        impl RDRFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RDRFR::_0 => false,
                    RDRFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RDRFR {
                match value {
                    false => RDRFR::_0,
                    true => RDRFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RDRFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RDRFR::_1
            }
        }
        #[doc = "Possible values of the field `TC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TCR {
            #[doc = "Transmitter active (sending data, a preamble, or a break)."]
            _0,
            #[doc = "Transmitter idle (transmission activity complete)."]
            _1,
        }
        impl TCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TCR::_0 => false,
                    TCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TCR {
                match value {
                    false => TCR::_0,
                    true => TCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TCR::_1
            }
        }
        #[doc = "Possible values of the field `TDRE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TDRER {
            #[doc = "Transmit data buffer full."]
            _0,
            #[doc = "Transmit data buffer empty."]
            _1,
        }
        impl TDRER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TDRER::_0 => false,
                    TDRER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TDRER {
                match value {
                    false => TDRER::_0,
                    true => TDRER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TDRER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TDRER::_1
            }
        }
        #[doc = "Possible values of the field `RAF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RAFR {
            #[doc = "LPUART receiver idle waiting for a start bit."]
            _0,
            #[doc = "LPUART receiver active (RXD input not idle)."]
            _1,
        }
        impl RAFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RAFR::_0 => false,
                    RAFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RAFR {
                match value {
                    false => RAFR::_0,
                    true => RAFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RAFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RAFR::_1
            }
        }
        #[doc = "Possible values of the field `LBKDE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LBKDER {
            #[doc = "LIN break detect is disabled, normal break character can be detected."]
            _0,
            #[doc = "LIN break detect is enabled. LIN break character is detected at length of 11 bit times (if M = 0) or 12 (if M = 1) or 13 (M10 = 1)."]
            _1,
        }
        impl LBKDER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LBKDER::_0 => false,
                    LBKDER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LBKDER {
                match value {
                    false => LBKDER::_0,
                    true => LBKDER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LBKDER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LBKDER::_1
            }
        }
        #[doc = "Possible values of the field `BRK13`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BRK13R {
            #[doc = "Break character is transmitted with length of 9 to 13 bit times."]
            _0,
            #[doc = "Break character is transmitted with length of 12 to 15 bit times."]
            _1,
        }
        impl BRK13R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BRK13R::_0 => false,
                    BRK13R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BRK13R {
                match value {
                    false => BRK13R::_0,
                    true => BRK13R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BRK13R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BRK13R::_1
            }
        }
        #[doc = "Possible values of the field `RWUID`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RWUIDR {
            #[doc = "During receive standby state (RWU = 1), the IDLE bit does not get set upon detection of an idle character. During address match wakeup, the IDLE bit does not set when an address does not match."]
            _0,
            #[doc = "During receive standby state (RWU = 1), the IDLE bit gets set upon detection of an idle character. During address match wakeup, the IDLE bit does set when an address does not match."]
            _1,
        }
        impl RWUIDR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RWUIDR::_0 => false,
                    RWUIDR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RWUIDR {
                match value {
                    false => RWUIDR::_0,
                    true => RWUIDR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RWUIDR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RWUIDR::_1
            }
        }
        #[doc = "Possible values of the field `RXINV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXINVR {
            #[doc = "Receive data not inverted."]
            _0,
            #[doc = "Receive data inverted."]
            _1,
        }
        impl RXINVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXINVR::_0 => false,
                    RXINVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXINVR {
                match value {
                    false => RXINVR::_0,
                    true => RXINVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXINVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RXINVR::_1
            }
        }
        #[doc = "Possible values of the field `MSBF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MSBFR {
            #[doc = "LSB (bit0) is the first bit that is transmitted following the start bit. Further, the first bit received after the start bit is identified as bit0."]
            _0,
            #[doc = "MSB (bit9, bit8, bit7 or bit6) is the first bit that is transmitted following the start bit depending on the setting of CTRL[M], CTRL[PE] and BAUD[M10]. Further, the first bit received after the start bit is identified as bit9, bit8, bit7 or bit6 depending on the setting of CTRL[M] and CTRL[PE]."]
            _1,
        }
        impl MSBFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MSBFR::_0 => false,
                    MSBFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MSBFR {
                match value {
                    false => MSBFR::_0,
                    true => MSBFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MSBFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MSBFR::_1
            }
        }
        #[doc = "Possible values of the field `RXEDGIF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXEDGIFR {
            #[doc = "No active edge on the receive pin has occurred."]
            _0,
            #[doc = "An active edge on the receive pin has occurred."]
            _1,
        }
        impl RXEDGIFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXEDGIFR::_0 => false,
                    RXEDGIFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXEDGIFR {
                match value {
                    false => RXEDGIFR::_0,
                    true => RXEDGIFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXEDGIFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RXEDGIFR::_1
            }
        }
        #[doc = "Possible values of the field `LBKDIF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LBKDIFR {
            #[doc = "No LIN break character has been detected."]
            _0,
            #[doc = "LIN break character has been detected."]
            _1,
        }
        impl LBKDIFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LBKDIFR::_0 => false,
                    LBKDIFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LBKDIFR {
                match value {
                    false => LBKDIFR::_0,
                    true => LBKDIFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LBKDIFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LBKDIFR::_1
            }
        }
        #[doc = "Values that can be written to the field `MA2F`"]
        pub enum MA2FW {
            #[doc = "Received data is not equal to MA2"]
            _0,
            #[doc = "Received data is equal to MA2"]
            _1,
        }
        impl MA2FW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MA2FW::_0 => false,
                    MA2FW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MA2FW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MA2FW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MA2FW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Received data is not equal to MA2"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MA2FW::_0)
            }
            #[doc = "Received data is equal to MA2"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MA2FW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MA1F`"]
        pub enum MA1FW {
            #[doc = "Received data is not equal to MA1"]
            _0,
            #[doc = "Received data is equal to MA1"]
            _1,
        }
        impl MA1FW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MA1FW::_0 => false,
                    MA1FW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MA1FW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MA1FW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MA1FW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Received data is not equal to MA1"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MA1FW::_0)
            }
            #[doc = "Received data is equal to MA1"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MA1FW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PF`"]
        pub enum PFW {
            #[doc = "No parity error."]
            _0,
            #[doc = "Parity error."]
            _1,
        }
        impl PFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PFW::_0 => false,
                    PFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No parity error."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PFW::_0)
            }
            #[doc = "Parity error."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FE`"]
        pub enum FEW {
            #[doc = "No framing error detected. This does not guarantee the framing is correct."]
            _0,
            #[doc = "Framing error."]
            _1,
        }
        impl FEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FEW::_0 => false,
                    FEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No framing error detected. This does not guarantee the framing is correct."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FEW::_0)
            }
            #[doc = "Framing error."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `NF`"]
        pub enum NFW {
            #[doc = "No noise detected."]
            _0,
            #[doc = "Noise detected in the received character in LPUART_DATA."]
            _1,
        }
        impl NFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    NFW::_0 => false,
                    NFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _NFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: NFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No noise detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(NFW::_0)
            }
            #[doc = "Noise detected in the received character in LPUART_DATA."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(NFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `OR`"]
        pub enum ORW {
            #[doc = "No overrun."]
            _0,
            #[doc = "Receive overrun (new LPUART data lost)."]
            _1,
        }
        impl ORW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ORW::_0 => false,
                    ORW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ORW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ORW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ORW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No overrun."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ORW::_0)
            }
            #[doc = "Receive overrun (new LPUART data lost)."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ORW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 19;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IDLE`"]
        pub enum IDLEW {
            #[doc = "No idle line detected."]
            _0,
            #[doc = "Idle line was detected."]
            _1,
        }
        impl IDLEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    IDLEW::_0 => false,
                    IDLEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IDLEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IDLEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IDLEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No idle line detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(IDLEW::_0)
            }
            #[doc = "Idle line was detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(IDLEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LBKDE`"]
        pub enum LBKDEW {
            #[doc = "LIN break detect is disabled, normal break character can be detected."]
            _0,
            #[doc = "LIN break detect is enabled. LIN break character is detected at length of 11 bit times (if M = 0) or 12 (if M = 1) or 13 (M10 = 1)."]
            _1,
        }
        impl LBKDEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LBKDEW::_0 => false,
                    LBKDEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LBKDEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LBKDEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LBKDEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "LIN break detect is disabled, normal break character can be detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LBKDEW::_0)
            }
            #[doc = "LIN break detect is enabled. LIN break character is detected at length of 11 bit times (if M = 0) or 12 (if M = 1) or 13 (M10 = 1)."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LBKDEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 25;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BRK13`"]
        pub enum BRK13W {
            #[doc = "Break character is transmitted with length of 9 to 13 bit times."]
            _0,
            #[doc = "Break character is transmitted with length of 12 to 15 bit times."]
            _1,
        }
        impl BRK13W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    BRK13W::_0 => false,
                    BRK13W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BRK13W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BRK13W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BRK13W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Break character is transmitted with length of 9 to 13 bit times."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BRK13W::_0)
            }
            #[doc = "Break character is transmitted with length of 12 to 15 bit times."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BRK13W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 26;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RWUID`"]
        pub enum RWUIDW {
            #[doc = "During receive standby state (RWU = 1), the IDLE bit does not get set upon detection of an idle character. During address match wakeup, the IDLE bit does not set when an address does not match."]
            _0,
            #[doc = "During receive standby state (RWU = 1), the IDLE bit gets set upon detection of an idle character. During address match wakeup, the IDLE bit does set when an address does not match."]
            _1,
        }
        impl RWUIDW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RWUIDW::_0 => false,
                    RWUIDW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RWUIDW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RWUIDW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RWUIDW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "During receive standby state (RWU = 1), the IDLE bit does not get set upon detection of an idle character. During address match wakeup, the IDLE bit does not set when an address does not match."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RWUIDW::_0)
            }
            #[doc = "During receive standby state (RWU = 1), the IDLE bit gets set upon detection of an idle character. During address match wakeup, the IDLE bit does set when an address does not match."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RWUIDW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 27;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RXINV`"]
        pub enum RXINVW {
            #[doc = "Receive data not inverted."]
            _0,
            #[doc = "Receive data inverted."]
            _1,
        }
        impl RXINVW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RXINVW::_0 => false,
                    RXINVW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXINVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXINVW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RXINVW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Receive data not inverted."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RXINVW::_0)
            }
            #[doc = "Receive data inverted."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RXINVW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 28;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MSBF`"]
        pub enum MSBFW {
            #[doc = "LSB (bit0) is the first bit that is transmitted following the start bit. Further, the first bit received after the start bit is identified as bit0."]
            _0,
            #[doc = "MSB (bit9, bit8, bit7 or bit6) is the first bit that is transmitted following the start bit depending on the setting of CTRL[M], CTRL[PE] and BAUD[M10]. Further, the first bit received after the start bit is identified as bit9, bit8, bit7 or bit6 depending on the setting of CTRL[M] and CTRL[PE]."]
            _1,
        }
        impl MSBFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MSBFW::_0 => false,
                    MSBFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSBFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSBFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MSBFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "LSB (bit0) is the first bit that is transmitted following the start bit. Further, the first bit received after the start bit is identified as bit0."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MSBFW::_0)
            }
            #[doc = "MSB (bit9, bit8, bit7 or bit6) is the first bit that is transmitted following the start bit depending on the setting of CTRL[M], CTRL[PE] and BAUD[M10]. Further, the first bit received after the start bit is identified as bit9, bit8, bit7 or bit6 depending on the setting of CTRL[M] and CTRL[PE]."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MSBFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 29;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RXEDGIF`"]
        pub enum RXEDGIFW {
            #[doc = "No active edge on the receive pin has occurred."]
            _0,
            #[doc = "An active edge on the receive pin has occurred."]
            _1,
        }
        impl RXEDGIFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RXEDGIFW::_0 => false,
                    RXEDGIFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXEDGIFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXEDGIFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RXEDGIFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No active edge on the receive pin has occurred."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RXEDGIFW::_0)
            }
            #[doc = "An active edge on the receive pin has occurred."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RXEDGIFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LBKDIF`"]
        pub enum LBKDIFW {
            #[doc = "No LIN break character has been detected."]
            _0,
            #[doc = "LIN break character has been detected."]
            _1,
        }
        impl LBKDIFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LBKDIFW::_0 => false,
                    LBKDIFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LBKDIFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LBKDIFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LBKDIFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No LIN break character has been detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LBKDIFW::_0)
            }
            #[doc = "LIN break character has been detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LBKDIFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 14 - Match 2 Flag"]
            #[inline(always)]
            pub fn ma2f(&self) -> MA2FR {
                MA2FR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - Match 1 Flag"]
            #[inline(always)]
            pub fn ma1f(&self) -> MA1FR {
                MA1FR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 16 - Parity Error Flag"]
            #[inline(always)]
            pub fn pf(&self) -> PFR {
                PFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - Framing Error Flag"]
            #[inline(always)]
            pub fn fe(&self) -> FER {
                FER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 18 - Noise Flag"]
            #[inline(always)]
            pub fn nf(&self) -> NFR {
                NFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 19 - Receiver Overrun Flag"]
            #[inline(always)]
            pub fn or(&self) -> ORR {
                ORR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 19;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 20 - Idle Line Flag"]
            #[inline(always)]
            pub fn idle(&self) -> IDLER {
                IDLER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - Receive Data Register Full Flag"]
            #[inline(always)]
            pub fn rdrf(&self) -> RDRFR {
                RDRFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 22 - Transmission Complete Flag"]
            #[inline(always)]
            pub fn tc(&self) -> TCR {
                TCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 23 - Transmit Data Register Empty Flag"]
            #[inline(always)]
            pub fn tdre(&self) -> TDRER {
                TDRER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 24 - Receiver Active Flag"]
            #[inline(always)]
            pub fn raf(&self) -> RAFR {
                RAFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 25 - LIN Break Detection Enable"]
            #[inline(always)]
            pub fn lbkde(&self) -> LBKDER {
                LBKDER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 25;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 26 - Break Character Generation Length"]
            #[inline(always)]
            pub fn brk13(&self) -> BRK13R {
                BRK13R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 26;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 27 - Receive Wake Up Idle Detect"]
            #[inline(always)]
            pub fn rwuid(&self) -> RWUIDR {
                RWUIDR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 27;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 28 - Receive Data Inversion"]
            #[inline(always)]
            pub fn rxinv(&self) -> RXINVR {
                RXINVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 28;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 29 - MSB First"]
            #[inline(always)]
            pub fn msbf(&self) -> MSBFR {
                MSBFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 29;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 30 - RXD Pin Active Edge Interrupt Flag"]
            #[inline(always)]
            pub fn rxedgif(&self) -> RXEDGIFR {
                RXEDGIFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - LIN Break Detect Interrupt Flag"]
            #[inline(always)]
            pub fn lbkdif(&self) -> LBKDIFR {
                LBKDIFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 12582912 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 14 - Match 2 Flag"]
            #[inline(always)]
            pub fn ma2f(&mut self) -> _MA2FW {
                _MA2FW { w: self }
            }
            #[doc = "Bit 15 - Match 1 Flag"]
            #[inline(always)]
            pub fn ma1f(&mut self) -> _MA1FW {
                _MA1FW { w: self }
            }
            #[doc = "Bit 16 - Parity Error Flag"]
            #[inline(always)]
            pub fn pf(&mut self) -> _PFW {
                _PFW { w: self }
            }
            #[doc = "Bit 17 - Framing Error Flag"]
            #[inline(always)]
            pub fn fe(&mut self) -> _FEW {
                _FEW { w: self }
            }
            #[doc = "Bit 18 - Noise Flag"]
            #[inline(always)]
            pub fn nf(&mut self) -> _NFW {
                _NFW { w: self }
            }
            #[doc = "Bit 19 - Receiver Overrun Flag"]
            #[inline(always)]
            pub fn or(&mut self) -> _ORW {
                _ORW { w: self }
            }
            #[doc = "Bit 20 - Idle Line Flag"]
            #[inline(always)]
            pub fn idle(&mut self) -> _IDLEW {
                _IDLEW { w: self }
            }
            #[doc = "Bit 25 - LIN Break Detection Enable"]
            #[inline(always)]
            pub fn lbkde(&mut self) -> _LBKDEW {
                _LBKDEW { w: self }
            }
            #[doc = "Bit 26 - Break Character Generation Length"]
            #[inline(always)]
            pub fn brk13(&mut self) -> _BRK13W {
                _BRK13W { w: self }
            }
            #[doc = "Bit 27 - Receive Wake Up Idle Detect"]
            #[inline(always)]
            pub fn rwuid(&mut self) -> _RWUIDW {
                _RWUIDW { w: self }
            }
            #[doc = "Bit 28 - Receive Data Inversion"]
            #[inline(always)]
            pub fn rxinv(&mut self) -> _RXINVW {
                _RXINVW { w: self }
            }
            #[doc = "Bit 29 - MSB First"]
            #[inline(always)]
            pub fn msbf(&mut self) -> _MSBFW {
                _MSBFW { w: self }
            }
            #[doc = "Bit 30 - RXD Pin Active Edge Interrupt Flag"]
            #[inline(always)]
            pub fn rxedgif(&mut self) -> _RXEDGIFW {
                _RXEDGIFW { w: self }
            }
            #[doc = "Bit 31 - LIN Break Detect Interrupt Flag"]
            #[inline(always)]
            pub fn lbkdif(&mut self) -> _LBKDIFW {
                _LBKDIFW { w: self }
            }
        }
    }
    #[doc = "LPUART Control Register"]
    pub struct CTRL {
        register: VolatileCell<u32>,
    }
    #[doc = "LPUART Control Register"]
    pub mod ctrl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CTRL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PTR {
            #[doc = "Even parity."]
            _0,
            #[doc = "Odd parity."]
            _1,
        }
        impl PTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PTR::_0 => false,
                    PTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PTR {
                match value {
                    false => PTR::_0,
                    true => PTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PTR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "No hardware parity generation or checking."]
            _0,
            #[doc = "Parity enabled."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `ILT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ILTR {
            #[doc = "Idle character bit count starts after start bit."]
            _0,
            #[doc = "Idle character bit count starts after stop bit."]
            _1,
        }
        impl ILTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ILTR::_0 => false,
                    ILTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ILTR {
                match value {
                    false => ILTR::_0,
                    true => ILTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ILTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ILTR::_1
            }
        }
        #[doc = "Possible values of the field `WAKE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WAKER {
            #[doc = "Configures RWU for idle-line wakeup."]
            _0,
            #[doc = "Configures RWU with address-mark wakeup."]
            _1,
        }
        impl WAKER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WAKER::_0 => false,
                    WAKER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WAKER {
                match value {
                    false => WAKER::_0,
                    true => WAKER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WAKER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WAKER::_1
            }
        }
        #[doc = "Possible values of the field `M`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MR {
            #[doc = "Receiver and transmitter use 8-bit data characters."]
            _0,
            #[doc = "Receiver and transmitter use 9-bit data characters."]
            _1,
        }
        impl MR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MR::_0 => false,
                    MR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MR {
                match value {
                    false => MR::_0,
                    true => MR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MR::_1
            }
        }
        #[doc = "Possible values of the field `RSRC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RSRCR {
            #[doc = "Provided LOOPS is set, RSRC is cleared, selects internal loop back mode and the LPUART does not use the RXD pin."]
            _0,
            #[doc = "Single-wire LPUART mode where the TXD pin is connected to the transmitter output and receiver input."]
            _1,
        }
        impl RSRCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RSRCR::_0 => false,
                    RSRCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RSRCR {
                match value {
                    false => RSRCR::_0,
                    true => RSRCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RSRCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RSRCR::_1
            }
        }
        #[doc = "Possible values of the field `DOZEEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DOZEENR {
            #[doc = "LPUART is enabled in Doze mode."]
            _0,
            #[doc = "LPUART is disabled in Doze mode."]
            _1,
        }
        impl DOZEENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DOZEENR::_0 => false,
                    DOZEENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DOZEENR {
                match value {
                    false => DOZEENR::_0,
                    true => DOZEENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DOZEENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DOZEENR::_1
            }
        }
        #[doc = "Possible values of the field `LOOPS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LOOPSR {
            #[doc = "Normal operation - RXD and TXD use separate pins."]
            _0,
            #[doc = "Loop mode or single-wire mode where transmitter outputs are internally connected to receiver input (see RSRC bit)."]
            _1,
        }
        impl LOOPSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LOOPSR::_0 => false,
                    LOOPSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LOOPSR {
                match value {
                    false => LOOPSR::_0,
                    true => LOOPSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LOOPSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LOOPSR::_1
            }
        }
        #[doc = "Possible values of the field `IDLECFG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IDLECFGR {
            #[doc = "1 idle character"]
            _000,
            #[doc = "2 idle characters"]
            _001,
            #[doc = "4 idle characters"]
            _010,
            #[doc = "8 idle characters"]
            _011,
            #[doc = "16 idle characters"]
            _100,
            #[doc = "32 idle characters"]
            _101,
            #[doc = "64 idle characters"]
            _110,
            #[doc = "128 idle characters"]
            _111,
        }
        impl IDLECFGR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IDLECFGR::_000 => 0,
                    IDLECFGR::_001 => 1,
                    IDLECFGR::_010 => 2,
                    IDLECFGR::_011 => 3,
                    IDLECFGR::_100 => 4,
                    IDLECFGR::_101 => 5,
                    IDLECFGR::_110 => 6,
                    IDLECFGR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IDLECFGR {
                match value {
                    0 => IDLECFGR::_000,
                    1 => IDLECFGR::_001,
                    2 => IDLECFGR::_010,
                    3 => IDLECFGR::_011,
                    4 => IDLECFGR::_100,
                    5 => IDLECFGR::_101,
                    6 => IDLECFGR::_110,
                    7 => IDLECFGR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == IDLECFGR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == IDLECFGR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == IDLECFGR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == IDLECFGR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == IDLECFGR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == IDLECFGR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == IDLECFGR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == IDLECFGR::_111
            }
        }
        #[doc = "Possible values of the field `M7`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum M7R {
            #[doc = "Receiver and transmitter use 8-bit to 10-bit data characters."]
            _0,
            #[doc = "Receiver and transmitter use 7-bit data characters."]
            _1,
        }
        impl M7R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    M7R::_0 => false,
                    M7R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> M7R {
                match value {
                    false => M7R::_0,
                    true => M7R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == M7R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == M7R::_1
            }
        }
        #[doc = "Possible values of the field `MA2IE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MA2IER {
            #[doc = "MA2F interrupt disabled"]
            _0,
            #[doc = "MA2F interrupt enabled"]
            _1,
        }
        impl MA2IER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MA2IER::_0 => false,
                    MA2IER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MA2IER {
                match value {
                    false => MA2IER::_0,
                    true => MA2IER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MA2IER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MA2IER::_1
            }
        }
        #[doc = "Possible values of the field `MA1IE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MA1IER {
            #[doc = "MA1F interrupt disabled"]
            _0,
            #[doc = "MA1F interrupt enabled"]
            _1,
        }
        impl MA1IER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MA1IER::_0 => false,
                    MA1IER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MA1IER {
                match value {
                    false => MA1IER::_0,
                    true => MA1IER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MA1IER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MA1IER::_1
            }
        }
        #[doc = "Possible values of the field `SBK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SBKR {
            #[doc = "Normal transmitter operation."]
            _0,
            #[doc = "Queue break character(s) to be sent."]
            _1,
        }
        impl SBKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SBKR::_0 => false,
                    SBKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SBKR {
                match value {
                    false => SBKR::_0,
                    true => SBKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SBKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SBKR::_1
            }
        }
        #[doc = "Possible values of the field `RWU`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RWUR {
            #[doc = "Normal receiver operation."]
            _0,
            #[doc = "LPUART receiver in standby waiting for wakeup condition."]
            _1,
        }
        impl RWUR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RWUR::_0 => false,
                    RWUR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RWUR {
                match value {
                    false => RWUR::_0,
                    true => RWUR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RWUR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RWUR::_1
            }
        }
        #[doc = "Possible values of the field `RE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RER {
            #[doc = "Receiver disabled."]
            _0,
            #[doc = "Receiver enabled."]
            _1,
        }
        impl RER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RER::_0 => false,
                    RER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RER {
                match value {
                    false => RER::_0,
                    true => RER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RER::_1
            }
        }
        #[doc = "Possible values of the field `TE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TER {
            #[doc = "Transmitter disabled."]
            _0,
            #[doc = "Transmitter enabled."]
            _1,
        }
        impl TER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TER::_0 => false,
                    TER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TER {
                match value {
                    false => TER::_0,
                    true => TER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TER::_1
            }
        }
        #[doc = "Possible values of the field `ILIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ILIER {
            #[doc = "Hardware interrupts from IDLE disabled; use polling."]
            _0,
            #[doc = "Hardware interrupt requested when IDLE flag is 1."]
            _1,
        }
        impl ILIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ILIER::_0 => false,
                    ILIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ILIER {
                match value {
                    false => ILIER::_0,
                    true => ILIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ILIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ILIER::_1
            }
        }
        #[doc = "Possible values of the field `RIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RIER {
            #[doc = "Hardware interrupts from RDRF disabled; use polling."]
            _0,
            #[doc = "Hardware interrupt requested when RDRF flag is 1."]
            _1,
        }
        impl RIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RIER::_0 => false,
                    RIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RIER {
                match value {
                    false => RIER::_0,
                    true => RIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RIER::_1
            }
        }
        #[doc = "Possible values of the field `TCIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TCIER {
            #[doc = "Hardware interrupts from TC disabled; use polling."]
            _0,
            #[doc = "Hardware interrupt requested when TC flag is 1."]
            _1,
        }
        impl TCIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TCIER::_0 => false,
                    TCIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TCIER {
                match value {
                    false => TCIER::_0,
                    true => TCIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TCIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TCIER::_1
            }
        }
        #[doc = "Possible values of the field `TIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIER {
            #[doc = "Hardware interrupts from TDRE disabled; use polling."]
            _0,
            #[doc = "Hardware interrupt requested when TDRE flag is 1."]
            _1,
        }
        impl TIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TIER::_0 => false,
                    TIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TIER {
                match value {
                    false => TIER::_0,
                    true => TIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TIER::_1
            }
        }
        #[doc = "Possible values of the field `PEIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PEIER {
            #[doc = "PF interrupts disabled; use polling)."]
            _0,
            #[doc = "Hardware interrupt requested when PF is set."]
            _1,
        }
        impl PEIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PEIER::_0 => false,
                    PEIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PEIER {
                match value {
                    false => PEIER::_0,
                    true => PEIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PEIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PEIER::_1
            }
        }
        #[doc = "Possible values of the field `FEIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FEIER {
            #[doc = "FE interrupts disabled; use polling."]
            _0,
            #[doc = "Hardware interrupt requested when FE is set."]
            _1,
        }
        impl FEIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FEIER::_0 => false,
                    FEIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FEIER {
                match value {
                    false => FEIER::_0,
                    true => FEIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FEIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FEIER::_1
            }
        }
        #[doc = "Possible values of the field `NEIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum NEIER {
            #[doc = "NF interrupts disabled; use polling."]
            _0,
            #[doc = "Hardware interrupt requested when NF is set."]
            _1,
        }
        impl NEIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    NEIER::_0 => false,
                    NEIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> NEIER {
                match value {
                    false => NEIER::_0,
                    true => NEIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == NEIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == NEIER::_1
            }
        }
        #[doc = "Possible values of the field `ORIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ORIER {
            #[doc = "OR interrupts disabled; use polling."]
            _0,
            #[doc = "Hardware interrupt requested when OR is set."]
            _1,
        }
        impl ORIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ORIER::_0 => false,
                    ORIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ORIER {
                match value {
                    false => ORIER::_0,
                    true => ORIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ORIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ORIER::_1
            }
        }
        #[doc = "Possible values of the field `TXINV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXINVR {
            #[doc = "Transmit data not inverted."]
            _0,
            #[doc = "Transmit data inverted."]
            _1,
        }
        impl TXINVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXINVR::_0 => false,
                    TXINVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXINVR {
                match value {
                    false => TXINVR::_0,
                    true => TXINVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXINVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXINVR::_1
            }
        }
        #[doc = "Possible values of the field `TXDIR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXDIRR {
            #[doc = "TXD pin is an input in single-wire mode."]
            _0,
            #[doc = "TXD pin is an output in single-wire mode."]
            _1,
        }
        impl TXDIRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXDIRR::_0 => false,
                    TXDIRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXDIRR {
                match value {
                    false => TXDIRR::_0,
                    true => TXDIRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXDIRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXDIRR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct R9T8R {
            bits: bool,
        }
        impl R9T8R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct R8T9R {
            bits: bool,
        }
        impl R8T9R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Values that can be written to the field `PT`"]
        pub enum PTW {
            #[doc = "Even parity."]
            _0,
            #[doc = "Odd parity."]
            _1,
        }
        impl PTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PTW::_0 => false,
                    PTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Even parity."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PTW::_0)
            }
            #[doc = "Odd parity."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "No hardware parity generation or checking."]
            _0,
            #[doc = "Parity enabled."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No hardware parity generation or checking."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Parity enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ILT`"]
        pub enum ILTW {
            #[doc = "Idle character bit count starts after start bit."]
            _0,
            #[doc = "Idle character bit count starts after stop bit."]
            _1,
        }
        impl ILTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ILTW::_0 => false,
                    ILTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ILTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ILTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ILTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Idle character bit count starts after start bit."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ILTW::_0)
            }
            #[doc = "Idle character bit count starts after stop bit."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ILTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WAKE`"]
        pub enum WAKEW {
            #[doc = "Configures RWU for idle-line wakeup."]
            _0,
            #[doc = "Configures RWU with address-mark wakeup."]
            _1,
        }
        impl WAKEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WAKEW::_0 => false,
                    WAKEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WAKEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WAKEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WAKEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configures RWU for idle-line wakeup."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WAKEW::_0)
            }
            #[doc = "Configures RWU with address-mark wakeup."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WAKEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `M`"]
        pub enum MW {
            #[doc = "Receiver and transmitter use 8-bit data characters."]
            _0,
            #[doc = "Receiver and transmitter use 9-bit data characters."]
            _1,
        }
        impl MW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MW::_0 => false,
                    MW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Receiver and transmitter use 8-bit data characters."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MW::_0)
            }
            #[doc = "Receiver and transmitter use 9-bit data characters."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RSRC`"]
        pub enum RSRCW {
            #[doc = "Provided LOOPS is set, RSRC is cleared, selects internal loop back mode and the LPUART does not use the RXD pin."]
            _0,
            #[doc = "Single-wire LPUART mode where the TXD pin is connected to the transmitter output and receiver input."]
            _1,
        }
        impl RSRCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RSRCW::_0 => false,
                    RSRCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RSRCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RSRCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RSRCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Provided LOOPS is set, RSRC is cleared, selects internal loop back mode and the LPUART does not use the RXD pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RSRCW::_0)
            }
            #[doc = "Single-wire LPUART mode where the TXD pin is connected to the transmitter output and receiver input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RSRCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DOZEEN`"]
        pub enum DOZEENW {
            #[doc = "LPUART is enabled in Doze mode."]
            _0,
            #[doc = "LPUART is disabled in Doze mode."]
            _1,
        }
        impl DOZEENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DOZEENW::_0 => false,
                    DOZEENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DOZEENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DOZEENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DOZEENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "LPUART is enabled in Doze mode."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DOZEENW::_0)
            }
            #[doc = "LPUART is disabled in Doze mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DOZEENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LOOPS`"]
        pub enum LOOPSW {
            #[doc = "Normal operation - RXD and TXD use separate pins."]
            _0,
            #[doc = "Loop mode or single-wire mode where transmitter outputs are internally connected to receiver input (see RSRC bit)."]
            _1,
        }
        impl LOOPSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LOOPSW::_0 => false,
                    LOOPSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LOOPSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LOOPSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LOOPSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Normal operation - RXD and TXD use separate pins."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LOOPSW::_0)
            }
            #[doc = "Loop mode or single-wire mode where transmitter outputs are internally connected to receiver input (see RSRC bit)."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LOOPSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IDLECFG`"]
        pub enum IDLECFGW {
            #[doc = "1 idle character"]
            _000,
            #[doc = "2 idle characters"]
            _001,
            #[doc = "4 idle characters"]
            _010,
            #[doc = "8 idle characters"]
            _011,
            #[doc = "16 idle characters"]
            _100,
            #[doc = "32 idle characters"]
            _101,
            #[doc = "64 idle characters"]
            _110,
            #[doc = "128 idle characters"]
            _111,
        }
        impl IDLECFGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IDLECFGW::_000 => 0,
                    IDLECFGW::_001 => 1,
                    IDLECFGW::_010 => 2,
                    IDLECFGW::_011 => 3,
                    IDLECFGW::_100 => 4,
                    IDLECFGW::_101 => 5,
                    IDLECFGW::_110 => 6,
                    IDLECFGW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IDLECFGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IDLECFGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IDLECFGW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "1 idle character"]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(IDLECFGW::_000)
            }
            #[doc = "2 idle characters"]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(IDLECFGW::_001)
            }
            #[doc = "4 idle characters"]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(IDLECFGW::_010)
            }
            #[doc = "8 idle characters"]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(IDLECFGW::_011)
            }
            #[doc = "16 idle characters"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(IDLECFGW::_100)
            }
            #[doc = "32 idle characters"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(IDLECFGW::_101)
            }
            #[doc = "64 idle characters"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(IDLECFGW::_110)
            }
            #[doc = "128 idle characters"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(IDLECFGW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `M7`"]
        pub enum M7W {
            #[doc = "Receiver and transmitter use 8-bit to 10-bit data characters."]
            _0,
            #[doc = "Receiver and transmitter use 7-bit data characters."]
            _1,
        }
        impl M7W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    M7W::_0 => false,
                    M7W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _M7W<'a> {
            w: &'a mut W,
        }
        impl<'a> _M7W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: M7W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Receiver and transmitter use 8-bit to 10-bit data characters."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(M7W::_0)
            }
            #[doc = "Receiver and transmitter use 7-bit data characters."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(M7W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MA2IE`"]
        pub enum MA2IEW {
            #[doc = "MA2F interrupt disabled"]
            _0,
            #[doc = "MA2F interrupt enabled"]
            _1,
        }
        impl MA2IEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MA2IEW::_0 => false,
                    MA2IEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MA2IEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MA2IEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MA2IEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "MA2F interrupt disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MA2IEW::_0)
            }
            #[doc = "MA2F interrupt enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MA2IEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MA1IE`"]
        pub enum MA1IEW {
            #[doc = "MA1F interrupt disabled"]
            _0,
            #[doc = "MA1F interrupt enabled"]
            _1,
        }
        impl MA1IEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MA1IEW::_0 => false,
                    MA1IEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MA1IEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MA1IEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MA1IEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "MA1F interrupt disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MA1IEW::_0)
            }
            #[doc = "MA1F interrupt enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MA1IEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SBK`"]
        pub enum SBKW {
            #[doc = "Normal transmitter operation."]
            _0,
            #[doc = "Queue break character(s) to be sent."]
            _1,
        }
        impl SBKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SBKW::_0 => false,
                    SBKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SBKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SBKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SBKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Normal transmitter operation."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SBKW::_0)
            }
            #[doc = "Queue break character(s) to be sent."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SBKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RWU`"]
        pub enum RWUW {
            #[doc = "Normal receiver operation."]
            _0,
            #[doc = "LPUART receiver in standby waiting for wakeup condition."]
            _1,
        }
        impl RWUW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RWUW::_0 => false,
                    RWUW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RWUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RWUW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RWUW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Normal receiver operation."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RWUW::_0)
            }
            #[doc = "LPUART receiver in standby waiting for wakeup condition."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RWUW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RE`"]
        pub enum REW {
            #[doc = "Receiver disabled."]
            _0,
            #[doc = "Receiver enabled."]
            _1,
        }
        impl REW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    REW::_0 => false,
                    REW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _REW<'a> {
            w: &'a mut W,
        }
        impl<'a> _REW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: REW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Receiver disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(REW::_0)
            }
            #[doc = "Receiver enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(REW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TE`"]
        pub enum TEW {
            #[doc = "Transmitter disabled."]
            _0,
            #[doc = "Transmitter enabled."]
            _1,
        }
        impl TEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TEW::_0 => false,
                    TEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Transmitter disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TEW::_0)
            }
            #[doc = "Transmitter enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 19;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ILIE`"]
        pub enum ILIEW {
            #[doc = "Hardware interrupts from IDLE disabled; use polling."]
            _0,
            #[doc = "Hardware interrupt requested when IDLE flag is 1."]
            _1,
        }
        impl ILIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ILIEW::_0 => false,
                    ILIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ILIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ILIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ILIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Hardware interrupts from IDLE disabled; use polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ILIEW::_0)
            }
            #[doc = "Hardware interrupt requested when IDLE flag is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ILIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RIE`"]
        pub enum RIEW {
            #[doc = "Hardware interrupts from RDRF disabled; use polling."]
            _0,
            #[doc = "Hardware interrupt requested when RDRF flag is 1."]
            _1,
        }
        impl RIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RIEW::_0 => false,
                    RIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Hardware interrupts from RDRF disabled; use polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RIEW::_0)
            }
            #[doc = "Hardware interrupt requested when RDRF flag is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 21;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TCIE`"]
        pub enum TCIEW {
            #[doc = "Hardware interrupts from TC disabled; use polling."]
            _0,
            #[doc = "Hardware interrupt requested when TC flag is 1."]
            _1,
        }
        impl TCIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TCIEW::_0 => false,
                    TCIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TCIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TCIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TCIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Hardware interrupts from TC disabled; use polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TCIEW::_0)
            }
            #[doc = "Hardware interrupt requested when TC flag is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TCIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 22;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TIE`"]
        pub enum TIEW {
            #[doc = "Hardware interrupts from TDRE disabled; use polling."]
            _0,
            #[doc = "Hardware interrupt requested when TDRE flag is 1."]
            _1,
        }
        impl TIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TIEW::_0 => false,
                    TIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Hardware interrupts from TDRE disabled; use polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIEW::_0)
            }
            #[doc = "Hardware interrupt requested when TDRE flag is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 23;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PEIE`"]
        pub enum PEIEW {
            #[doc = "PF interrupts disabled; use polling)."]
            _0,
            #[doc = "Hardware interrupt requested when PF is set."]
            _1,
        }
        impl PEIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEIEW::_0 => false,
                    PEIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "PF interrupts disabled; use polling)."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEIEW::_0)
            }
            #[doc = "Hardware interrupt requested when PF is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FEIE`"]
        pub enum FEIEW {
            #[doc = "FE interrupts disabled; use polling."]
            _0,
            #[doc = "Hardware interrupt requested when FE is set."]
            _1,
        }
        impl FEIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FEIEW::_0 => false,
                    FEIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FEIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FEIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FEIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FE interrupts disabled; use polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FEIEW::_0)
            }
            #[doc = "Hardware interrupt requested when FE is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FEIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 25;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `NEIE`"]
        pub enum NEIEW {
            #[doc = "NF interrupts disabled; use polling."]
            _0,
            #[doc = "Hardware interrupt requested when NF is set."]
            _1,
        }
        impl NEIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    NEIEW::_0 => false,
                    NEIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _NEIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NEIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: NEIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "NF interrupts disabled; use polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(NEIEW::_0)
            }
            #[doc = "Hardware interrupt requested when NF is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(NEIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 26;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ORIE`"]
        pub enum ORIEW {
            #[doc = "OR interrupts disabled; use polling."]
            _0,
            #[doc = "Hardware interrupt requested when OR is set."]
            _1,
        }
        impl ORIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ORIEW::_0 => false,
                    ORIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ORIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ORIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ORIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "OR interrupts disabled; use polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ORIEW::_0)
            }
            #[doc = "Hardware interrupt requested when OR is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ORIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 27;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TXINV`"]
        pub enum TXINVW {
            #[doc = "Transmit data not inverted."]
            _0,
            #[doc = "Transmit data inverted."]
            _1,
        }
        impl TXINVW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TXINVW::_0 => false,
                    TXINVW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXINVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXINVW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TXINVW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Transmit data not inverted."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TXINVW::_0)
            }
            #[doc = "Transmit data inverted."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TXINVW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 28;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TXDIR`"]
        pub enum TXDIRW {
            #[doc = "TXD pin is an input in single-wire mode."]
            _0,
            #[doc = "TXD pin is an output in single-wire mode."]
            _1,
        }
        impl TXDIRW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TXDIRW::_0 => false,
                    TXDIRW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXDIRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXDIRW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TXDIRW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "TXD pin is an input in single-wire mode."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TXDIRW::_0)
            }
            #[doc = "TXD pin is an output in single-wire mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TXDIRW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 29;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _R9T8W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R9T8W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _R8T9W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R8T9W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Parity Type"]
            #[inline(always)]
            pub fn pt(&self) -> PTR {
                PTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Parity Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Idle Line Type Select"]
            #[inline(always)]
            pub fn ilt(&self) -> ILTR {
                ILTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Receiver Wakeup Method Select"]
            #[inline(always)]
            pub fn wake(&self) -> WAKER {
                WAKER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - 9-Bit or 8-Bit Mode Select"]
            #[inline(always)]
            pub fn m(&self) -> MR {
                MR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Receiver Source Select"]
            #[inline(always)]
            pub fn rsrc(&self) -> RSRCR {
                RSRCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Doze Enable"]
            #[inline(always)]
            pub fn dozeen(&self) -> DOZEENR {
                DOZEENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Loop Mode Select"]
            #[inline(always)]
            pub fn loops(&self) -> LOOPSR {
                LOOPSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Idle Configuration"]
            #[inline(always)]
            pub fn idlecfg(&self) -> IDLECFGR {
                IDLECFGR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 11 - 7-Bit Mode Select"]
            #[inline(always)]
            pub fn m7(&self) -> M7R {
                M7R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - Match 2 Interrupt Enable"]
            #[inline(always)]
            pub fn ma2ie(&self) -> MA2IER {
                MA2IER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - Match 1 Interrupt Enable"]
            #[inline(always)]
            pub fn ma1ie(&self) -> MA1IER {
                MA1IER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 16 - Send Break"]
            #[inline(always)]
            pub fn sbk(&self) -> SBKR {
                SBKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - Receiver Wakeup Control"]
            #[inline(always)]
            pub fn rwu(&self) -> RWUR {
                RWUR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 18 - Receiver Enable"]
            #[inline(always)]
            pub fn re(&self) -> RER {
                RER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 19 - Transmitter Enable"]
            #[inline(always)]
            pub fn te(&self) -> TER {
                TER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 19;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 20 - Idle Line Interrupt Enable"]
            #[inline(always)]
            pub fn ilie(&self) -> ILIER {
                ILIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - Receiver Interrupt Enable"]
            #[inline(always)]
            pub fn rie(&self) -> RIER {
                RIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 22 - Transmission Complete Interrupt Enable for"]
            #[inline(always)]
            pub fn tcie(&self) -> TCIER {
                TCIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 23 - Transmit Interrupt Enable"]
            #[inline(always)]
            pub fn tie(&self) -> TIER {
                TIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 24 - Parity Error Interrupt Enable"]
            #[inline(always)]
            pub fn peie(&self) -> PEIER {
                PEIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 25 - Framing Error Interrupt Enable"]
            #[inline(always)]
            pub fn feie(&self) -> FEIER {
                FEIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 25;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 26 - Noise Error Interrupt Enable"]
            #[inline(always)]
            pub fn neie(&self) -> NEIER {
                NEIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 26;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 27 - Overrun Interrupt Enable"]
            #[inline(always)]
            pub fn orie(&self) -> ORIER {
                ORIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 27;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 28 - Transmit Data Inversion"]
            #[inline(always)]
            pub fn txinv(&self) -> TXINVR {
                TXINVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 28;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 29 - TXD Pin Direction in Single-Wire Mode"]
            #[inline(always)]
            pub fn txdir(&self) -> TXDIRR {
                TXDIRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 29;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 30 - Receive Bit 9 / Transmit Bit 8"]
            #[inline(always)]
            pub fn r9t8(&self) -> R9T8R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                R9T8R { bits }
            }
            #[doc = "Bit 31 - Receive Bit 8 / Transmit Bit 9"]
            #[inline(always)]
            pub fn r8t9(&self) -> R8T9R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                R8T9R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Parity Type"]
            #[inline(always)]
            pub fn pt(&mut self) -> _PTW {
                _PTW { w: self }
            }
            #[doc = "Bit 1 - Parity Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bit 2 - Idle Line Type Select"]
            #[inline(always)]
            pub fn ilt(&mut self) -> _ILTW {
                _ILTW { w: self }
            }
            #[doc = "Bit 3 - Receiver Wakeup Method Select"]
            #[inline(always)]
            pub fn wake(&mut self) -> _WAKEW {
                _WAKEW { w: self }
            }
            #[doc = "Bit 4 - 9-Bit or 8-Bit Mode Select"]
            #[inline(always)]
            pub fn m(&mut self) -> _MW {
                _MW { w: self }
            }
            #[doc = "Bit 5 - Receiver Source Select"]
            #[inline(always)]
            pub fn rsrc(&mut self) -> _RSRCW {
                _RSRCW { w: self }
            }
            #[doc = "Bit 6 - Doze Enable"]
            #[inline(always)]
            pub fn dozeen(&mut self) -> _DOZEENW {
                _DOZEENW { w: self }
            }
            #[doc = "Bit 7 - Loop Mode Select"]
            #[inline(always)]
            pub fn loops(&mut self) -> _LOOPSW {
                _LOOPSW { w: self }
            }
            #[doc = "Bits 8:10 - Idle Configuration"]
            #[inline(always)]
            pub fn idlecfg(&mut self) -> _IDLECFGW {
                _IDLECFGW { w: self }
            }
            #[doc = "Bit 11 - 7-Bit Mode Select"]
            #[inline(always)]
            pub fn m7(&mut self) -> _M7W {
                _M7W { w: self }
            }
            #[doc = "Bit 14 - Match 2 Interrupt Enable"]
            #[inline(always)]
            pub fn ma2ie(&mut self) -> _MA2IEW {
                _MA2IEW { w: self }
            }
            #[doc = "Bit 15 - Match 1 Interrupt Enable"]
            #[inline(always)]
            pub fn ma1ie(&mut self) -> _MA1IEW {
                _MA1IEW { w: self }
            }
            #[doc = "Bit 16 - Send Break"]
            #[inline(always)]
            pub fn sbk(&mut self) -> _SBKW {
                _SBKW { w: self }
            }
            #[doc = "Bit 17 - Receiver Wakeup Control"]
            #[inline(always)]
            pub fn rwu(&mut self) -> _RWUW {
                _RWUW { w: self }
            }
            #[doc = "Bit 18 - Receiver Enable"]
            #[inline(always)]
            pub fn re(&mut self) -> _REW {
                _REW { w: self }
            }
            #[doc = "Bit 19 - Transmitter Enable"]
            #[inline(always)]
            pub fn te(&mut self) -> _TEW {
                _TEW { w: self }
            }
            #[doc = "Bit 20 - Idle Line Interrupt Enable"]
            #[inline(always)]
            pub fn ilie(&mut self) -> _ILIEW {
                _ILIEW { w: self }
            }
            #[doc = "Bit 21 - Receiver Interrupt Enable"]
            #[inline(always)]
            pub fn rie(&mut self) -> _RIEW {
                _RIEW { w: self }
            }
            #[doc = "Bit 22 - Transmission Complete Interrupt Enable for"]
            #[inline(always)]
            pub fn tcie(&mut self) -> _TCIEW {
                _TCIEW { w: self }
            }
            #[doc = "Bit 23 - Transmit Interrupt Enable"]
            #[inline(always)]
            pub fn tie(&mut self) -> _TIEW {
                _TIEW { w: self }
            }
            #[doc = "Bit 24 - Parity Error Interrupt Enable"]
            #[inline(always)]
            pub fn peie(&mut self) -> _PEIEW {
                _PEIEW { w: self }
            }
            #[doc = "Bit 25 - Framing Error Interrupt Enable"]
            #[inline(always)]
            pub fn feie(&mut self) -> _FEIEW {
                _FEIEW { w: self }
            }
            #[doc = "Bit 26 - Noise Error Interrupt Enable"]
            #[inline(always)]
            pub fn neie(&mut self) -> _NEIEW {
                _NEIEW { w: self }
            }
            #[doc = "Bit 27 - Overrun Interrupt Enable"]
            #[inline(always)]
            pub fn orie(&mut self) -> _ORIEW {
                _ORIEW { w: self }
            }
            #[doc = "Bit 28 - Transmit Data Inversion"]
            #[inline(always)]
            pub fn txinv(&mut self) -> _TXINVW {
                _TXINVW { w: self }
            }
            #[doc = "Bit 29 - TXD Pin Direction in Single-Wire Mode"]
            #[inline(always)]
            pub fn txdir(&mut self) -> _TXDIRW {
                _TXDIRW { w: self }
            }
            #[doc = "Bit 30 - Receive Bit 9 / Transmit Bit 8"]
            #[inline(always)]
            pub fn r9t8(&mut self) -> _R9T8W {
                _R9T8W { w: self }
            }
            #[doc = "Bit 31 - Receive Bit 8 / Transmit Bit 9"]
            #[inline(always)]
            pub fn r8t9(&mut self) -> _R8T9W {
                _R8T9W { w: self }
            }
        }
    }
    #[doc = "LPUART Data Register"]
    pub struct DATA {
        register: VolatileCell<u32>,
    }
    #[doc = "LPUART Data Register"]
    pub mod data {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::DATA {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct R0T0R {
            bits: bool,
        }
        impl R0T0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct R1T1R {
            bits: bool,
        }
        impl R1T1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct R2T2R {
            bits: bool,
        }
        impl R2T2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct R3T3R {
            bits: bool,
        }
        impl R3T3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct R4T4R {
            bits: bool,
        }
        impl R4T4R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct R5T5R {
            bits: bool,
        }
        impl R5T5R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct R6T6R {
            bits: bool,
        }
        impl R6T6R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct R7T7R {
            bits: bool,
        }
        impl R7T7R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct R8T8R {
            bits: bool,
        }
        impl R8T8R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct R9T9R {
            bits: bool,
        }
        impl R9T9R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `IDLINE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IDLINER {
            #[doc = "Receiver was not idle before receiving this character."]
            _0,
            #[doc = "Receiver was idle before receiving this character."]
            _1,
        }
        impl IDLINER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    IDLINER::_0 => false,
                    IDLINER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> IDLINER {
                match value {
                    false => IDLINER::_0,
                    true => IDLINER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == IDLINER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == IDLINER::_1
            }
        }
        #[doc = "Possible values of the field `RXEMPT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXEMPTR {
            #[doc = "Receive buffer contains valid data."]
            _0,
            #[doc = "Receive buffer is empty, data returned on read is not valid."]
            _1,
        }
        impl RXEMPTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXEMPTR::_0 => false,
                    RXEMPTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXEMPTR {
                match value {
                    false => RXEMPTR::_0,
                    true => RXEMPTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXEMPTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RXEMPTR::_1
            }
        }
        #[doc = "Possible values of the field `FRETSC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FRETSCR {
            #[doc = "The dataword was received without a frame error on read, or transmit a normal character on write."]
            _0,
            #[doc = "The dataword was received with a frame error, or transmit an idle or break character on transmit."]
            _1,
        }
        impl FRETSCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FRETSCR::_0 => false,
                    FRETSCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FRETSCR {
                match value {
                    false => FRETSCR::_0,
                    true => FRETSCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FRETSCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FRETSCR::_1
            }
        }
        #[doc = "Possible values of the field `PARITYE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PARITYER {
            #[doc = "The dataword was received without a parity error."]
            _0,
            #[doc = "The dataword was received with a parity error."]
            _1,
        }
        impl PARITYER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PARITYER::_0 => false,
                    PARITYER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PARITYER {
                match value {
                    false => PARITYER::_0,
                    true => PARITYER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PARITYER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PARITYER::_1
            }
        }
        #[doc = "Possible values of the field `NOISY`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum NOISYR {
            #[doc = "The dataword was received without noise."]
            _0,
            #[doc = "The data was received with noise."]
            _1,
        }
        impl NOISYR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    NOISYR::_0 => false,
                    NOISYR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> NOISYR {
                match value {
                    false => NOISYR::_0,
                    true => NOISYR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == NOISYR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == NOISYR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _R0T0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R0T0W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _R1T1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R1T1W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _R2T2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R2T2W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _R3T3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R3T3W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _R4T4W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R4T4W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _R5T5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R5T5W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _R6T6W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R6T6W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _R7T7W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R7T7W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _R8T8W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R8T8W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _R9T9W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R9T9W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FRETSC`"]
        pub enum FRETSCW {
            #[doc = "The dataword was received without a frame error on read, or transmit a normal character on write."]
            _0,
            #[doc = "The dataword was received with a frame error, or transmit an idle or break character on transmit."]
            _1,
        }
        impl FRETSCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FRETSCW::_0 => false,
                    FRETSCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FRETSCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FRETSCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FRETSCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The dataword was received without a frame error on read, or transmit a normal character on write."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FRETSCW::_0)
            }
            #[doc = "The dataword was received with a frame error, or transmit an idle or break character on transmit."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FRETSCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - R0T0"]
            #[inline(always)]
            pub fn r0t0(&self) -> R0T0R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                R0T0R { bits }
            }
            #[doc = "Bit 1 - R1T1"]
            #[inline(always)]
            pub fn r1t1(&self) -> R1T1R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                R1T1R { bits }
            }
            #[doc = "Bit 2 - R2T2"]
            #[inline(always)]
            pub fn r2t2(&self) -> R2T2R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                R2T2R { bits }
            }
            #[doc = "Bit 3 - R3T3"]
            #[inline(always)]
            pub fn r3t3(&self) -> R3T3R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                R3T3R { bits }
            }
            #[doc = "Bit 4 - R4T4"]
            #[inline(always)]
            pub fn r4t4(&self) -> R4T4R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                R4T4R { bits }
            }
            #[doc = "Bit 5 - R5T5"]
            #[inline(always)]
            pub fn r5t5(&self) -> R5T5R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                R5T5R { bits }
            }
            #[doc = "Bit 6 - R6T6"]
            #[inline(always)]
            pub fn r6t6(&self) -> R6T6R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                R6T6R { bits }
            }
            #[doc = "Bit 7 - R7T7"]
            #[inline(always)]
            pub fn r7t7(&self) -> R7T7R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                R7T7R { bits }
            }
            #[doc = "Bit 8 - R8T8"]
            #[inline(always)]
            pub fn r8t8(&self) -> R8T8R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                R8T8R { bits }
            }
            #[doc = "Bit 9 - R9T9"]
            #[inline(always)]
            pub fn r9t9(&self) -> R9T9R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                R9T9R { bits }
            }
            #[doc = "Bit 11 - Idle Line"]
            #[inline(always)]
            pub fn idline(&self) -> IDLINER {
                IDLINER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Receive Buffer Empty"]
            #[inline(always)]
            pub fn rxempt(&self) -> RXEMPTR {
                RXEMPTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Frame Error / Transmit Special Character"]
            #[inline(always)]
            pub fn fretsc(&self) -> FRETSCR {
                FRETSCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - PARITYE"]
            #[inline(always)]
            pub fn paritye(&self) -> PARITYER {
                PARITYER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - NOISY"]
            #[inline(always)]
            pub fn noisy(&self) -> NOISYR {
                NOISYR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 4096 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - R0T0"]
            #[inline(always)]
            pub fn r0t0(&mut self) -> _R0T0W {
                _R0T0W { w: self }
            }
            #[doc = "Bit 1 - R1T1"]
            #[inline(always)]
            pub fn r1t1(&mut self) -> _R1T1W {
                _R1T1W { w: self }
            }
            #[doc = "Bit 2 - R2T2"]
            #[inline(always)]
            pub fn r2t2(&mut self) -> _R2T2W {
                _R2T2W { w: self }
            }
            #[doc = "Bit 3 - R3T3"]
            #[inline(always)]
            pub fn r3t3(&mut self) -> _R3T3W {
                _R3T3W { w: self }
            }
            #[doc = "Bit 4 - R4T4"]
            #[inline(always)]
            pub fn r4t4(&mut self) -> _R4T4W {
                _R4T4W { w: self }
            }
            #[doc = "Bit 5 - R5T5"]
            #[inline(always)]
            pub fn r5t5(&mut self) -> _R5T5W {
                _R5T5W { w: self }
            }
            #[doc = "Bit 6 - R6T6"]
            #[inline(always)]
            pub fn r6t6(&mut self) -> _R6T6W {
                _R6T6W { w: self }
            }
            #[doc = "Bit 7 - R7T7"]
            #[inline(always)]
            pub fn r7t7(&mut self) -> _R7T7W {
                _R7T7W { w: self }
            }
            #[doc = "Bit 8 - R8T8"]
            #[inline(always)]
            pub fn r8t8(&mut self) -> _R8T8W {
                _R8T8W { w: self }
            }
            #[doc = "Bit 9 - R9T9"]
            #[inline(always)]
            pub fn r9t9(&mut self) -> _R9T9W {
                _R9T9W { w: self }
            }
            #[doc = "Bit 13 - Frame Error / Transmit Special Character"]
            #[inline(always)]
            pub fn fretsc(&mut self) -> _FRETSCW {
                _FRETSCW { w: self }
            }
        }
    }
    #[doc = "LPUART Match Address Register"]
    pub struct MATCH {
        register: VolatileCell<u32>,
    }
    #[doc = "LPUART Match Address Register"]
    pub mod match_ {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::MATCH {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MA1R {
            bits: u16,
        }
        impl MA1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct MA2R {
            bits: u16,
        }
        impl MA2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MA1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MA1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 1023;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MA2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MA2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 1023;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:9 - Match Address 1"]
            #[inline(always)]
            pub fn ma1(&self) -> MA1R {
                let bits = {
                    const MASK: u16 = 1023;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                MA1R { bits }
            }
            #[doc = "Bits 16:25 - Match Address 2"]
            #[inline(always)]
            pub fn ma2(&self) -> MA2R {
                let bits = {
                    const MASK: u16 = 1023;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                MA2R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:9 - Match Address 1"]
            #[inline(always)]
            pub fn ma1(&mut self) -> _MA1W {
                _MA1W { w: self }
            }
            #[doc = "Bits 16:25 - Match Address 2"]
            #[inline(always)]
            pub fn ma2(&mut self) -> _MA2W {
                _MA2W { w: self }
            }
        }
    }
    #[doc = "LPUART Modem IrDA Register"]
    pub struct MODIR {
        register: VolatileCell<u32>,
    }
    #[doc = "LPUART Modem IrDA Register"]
    pub mod modir {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::MODIR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TXCTSE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXCTSER {
            #[doc = "CTS has no effect on the transmitter."]
            _0,
            #[doc = "Enables clear-to-send operation. The transmitter checks the state of CTS each time it is ready to send a character. If CTS is asserted, the character is sent. If CTS is deasserted, the signal TXD remains in the mark state and transmission is delayed until CTS is asserted. Changes in CTS as a character is being sent do not affect its transmission."]
            _1,
        }
        impl TXCTSER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXCTSER::_0 => false,
                    TXCTSER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXCTSER {
                match value {
                    false => TXCTSER::_0,
                    true => TXCTSER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXCTSER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXCTSER::_1
            }
        }
        #[doc = "Possible values of the field `TXRTSE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXRTSER {
            #[doc = "The transmitter has no effect on RTS."]
            _0,
            #[doc = "When a character is placed into an empty transmitter data buffer , RTS asserts one bit time before the start bit is transmitted. RTS deasserts one bit time after all characters in the transmitter data buffer and shift register are completely sent, including the last stop bit."]
            _1,
        }
        impl TXRTSER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXRTSER::_0 => false,
                    TXRTSER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXRTSER {
                match value {
                    false => TXRTSER::_0,
                    true => TXRTSER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXRTSER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXRTSER::_1
            }
        }
        #[doc = "Possible values of the field `TXRTSPOL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXRTSPOLR {
            #[doc = "Transmitter RTS is active low."]
            _0,
            #[doc = "Transmitter RTS is active high."]
            _1,
        }
        impl TXRTSPOLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXRTSPOLR::_0 => false,
                    TXRTSPOLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXRTSPOLR {
                match value {
                    false => TXRTSPOLR::_0,
                    true => TXRTSPOLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXRTSPOLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXRTSPOLR::_1
            }
        }
        #[doc = "Possible values of the field `RXRTSE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXRTSER {
            #[doc = "The receiver has no effect on RTS."]
            _0,
            #[doc = r" Reserved"]
            _Reserved(bool),
        }
        impl RXRTSER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXRTSER::_0 => false,
                    RXRTSER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXRTSER {
                match value {
                    false => RXRTSER::_0,
                    i => RXRTSER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXRTSER::_0
            }
        }
        #[doc = "Possible values of the field `TXCTSC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXCTSCR {
            #[doc = "CTS input is sampled at the start of each character."]
            _0,
            #[doc = "CTS input is sampled when the transmitter is idle."]
            _1,
        }
        impl TXCTSCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXCTSCR::_0 => false,
                    TXCTSCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXCTSCR {
                match value {
                    false => TXCTSCR::_0,
                    true => TXCTSCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXCTSCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXCTSCR::_1
            }
        }
        #[doc = "Possible values of the field `TXCTSSRC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXCTSSRCR {
            #[doc = "CTS input is the CTS_B pin."]
            _0,
            #[doc = "CTS input is the inverted Receiver Match result."]
            _1,
        }
        impl TXCTSSRCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXCTSSRCR::_0 => false,
                    TXCTSSRCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXCTSSRCR {
                match value {
                    false => TXCTSSRCR::_0,
                    true => TXCTSSRCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXCTSSRCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXCTSSRCR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct RTSWATERR {
            bits: u8,
        }
        impl RTSWATERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `TNP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TNPR {
            #[doc = "1/OSR."]
            _00,
            #[doc = "2/OSR."]
            _01,
            #[doc = "3/OSR."]
            _10,
            #[doc = "4/OSR."]
            _11,
        }
        impl TNPR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TNPR::_00 => 0,
                    TNPR::_01 => 1,
                    TNPR::_10 => 2,
                    TNPR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TNPR {
                match value {
                    0 => TNPR::_00,
                    1 => TNPR::_01,
                    2 => TNPR::_10,
                    3 => TNPR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == TNPR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == TNPR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == TNPR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == TNPR::_11
            }
        }
        #[doc = "Possible values of the field `IREN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRENR {
            #[doc = "IR disabled."]
            _0,
            #[doc = "IR enabled."]
            _1,
        }
        impl IRENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    IRENR::_0 => false,
                    IRENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> IRENR {
                match value {
                    false => IRENR::_0,
                    true => IRENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == IRENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == IRENR::_1
            }
        }
        #[doc = "Values that can be written to the field `TXCTSE`"]
        pub enum TXCTSEW {
            #[doc = "CTS has no effect on the transmitter."]
            _0,
            #[doc = "Enables clear-to-send operation. The transmitter checks the state of CTS each time it is ready to send a character. If CTS is asserted, the character is sent. If CTS is deasserted, the signal TXD remains in the mark state and transmission is delayed until CTS is asserted. Changes in CTS as a character is being sent do not affect its transmission."]
            _1,
        }
        impl TXCTSEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TXCTSEW::_0 => false,
                    TXCTSEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXCTSEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXCTSEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TXCTSEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "CTS has no effect on the transmitter."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TXCTSEW::_0)
            }
            #[doc = "Enables clear-to-send operation. The transmitter checks the state of CTS each time it is ready to send a character. If CTS is asserted, the character is sent. If CTS is deasserted, the signal TXD remains in the mark state and transmission is delayed until CTS is asserted. Changes in CTS as a character is being sent do not affect its transmission."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TXCTSEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TXRTSE`"]
        pub enum TXRTSEW {
            #[doc = "The transmitter has no effect on RTS."]
            _0,
            #[doc = "When a character is placed into an empty transmitter data buffer , RTS asserts one bit time before the start bit is transmitted. RTS deasserts one bit time after all characters in the transmitter data buffer and shift register are completely sent, including the last stop bit."]
            _1,
        }
        impl TXRTSEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TXRTSEW::_0 => false,
                    TXRTSEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXRTSEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXRTSEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TXRTSEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The transmitter has no effect on RTS."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TXRTSEW::_0)
            }
            #[doc = "When a character is placed into an empty transmitter data buffer , RTS asserts one bit time before the start bit is transmitted. RTS deasserts one bit time after all characters in the transmitter data buffer and shift register are completely sent, including the last stop bit."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TXRTSEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TXRTSPOL`"]
        pub enum TXRTSPOLW {
            #[doc = "Transmitter RTS is active low."]
            _0,
            #[doc = "Transmitter RTS is active high."]
            _1,
        }
        impl TXRTSPOLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TXRTSPOLW::_0 => false,
                    TXRTSPOLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXRTSPOLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXRTSPOLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TXRTSPOLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Transmitter RTS is active low."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TXRTSPOLW::_0)
            }
            #[doc = "Transmitter RTS is active high."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TXRTSPOLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RXRTSE`"]
        pub enum RXRTSEW {
            #[doc = "The receiver has no effect on RTS."]
            _0,
        }
        impl RXRTSEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RXRTSEW::_0 => false,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXRTSEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXRTSEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RXRTSEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The receiver has no effect on RTS."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RXRTSEW::_0)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TXCTSC`"]
        pub enum TXCTSCW {
            #[doc = "CTS input is sampled at the start of each character."]
            _0,
            #[doc = "CTS input is sampled when the transmitter is idle."]
            _1,
        }
        impl TXCTSCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TXCTSCW::_0 => false,
                    TXCTSCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXCTSCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXCTSCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TXCTSCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "CTS input is sampled at the start of each character."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TXCTSCW::_0)
            }
            #[doc = "CTS input is sampled when the transmitter is idle."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TXCTSCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TXCTSSRC`"]
        pub enum TXCTSSRCW {
            #[doc = "CTS input is the CTS_B pin."]
            _0,
            #[doc = "CTS input is the inverted Receiver Match result."]
            _1,
        }
        impl TXCTSSRCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TXCTSSRCW::_0 => false,
                    TXCTSSRCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXCTSSRCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXCTSSRCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TXCTSSRCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "CTS input is the CTS_B pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TXCTSSRCW::_0)
            }
            #[doc = "CTS input is the inverted Receiver Match result."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TXCTSSRCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _RTSWATERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RTSWATERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TNP`"]
        pub enum TNPW {
            #[doc = "1/OSR."]
            _00,
            #[doc = "2/OSR."]
            _01,
            #[doc = "3/OSR."]
            _10,
            #[doc = "4/OSR."]
            _11,
        }
        impl TNPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TNPW::_00 => 0,
                    TNPW::_01 => 1,
                    TNPW::_10 => 2,
                    TNPW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TNPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TNPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TNPW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "1/OSR."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(TNPW::_00)
            }
            #[doc = "2/OSR."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(TNPW::_01)
            }
            #[doc = "3/OSR."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(TNPW::_10)
            }
            #[doc = "4/OSR."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(TNPW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IREN`"]
        pub enum IRENW {
            #[doc = "IR disabled."]
            _0,
            #[doc = "IR enabled."]
            _1,
        }
        impl IRENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    IRENW::_0 => false,
                    IRENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "IR disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(IRENW::_0)
            }
            #[doc = "IR enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(IRENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Transmitter clear-to-send enable"]
            #[inline(always)]
            pub fn txctse(&self) -> TXCTSER {
                TXCTSER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Transmitter request-to-send enable"]
            #[inline(always)]
            pub fn txrtse(&self) -> TXRTSER {
                TXRTSER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Transmitter request-to-send polarity"]
            #[inline(always)]
            pub fn txrtspol(&self) -> TXRTSPOLR {
                TXRTSPOLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Receiver request-to-send enable"]
            #[inline(always)]
            pub fn rxrtse(&self) -> RXRTSER {
                RXRTSER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Transmit CTS Configuration"]
            #[inline(always)]
            pub fn txctsc(&self) -> TXCTSCR {
                TXCTSCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Transmit CTS Source"]
            #[inline(always)]
            pub fn txctssrc(&self) -> TXCTSSRCR {
                TXCTSSRCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:9 - Receive RTS Configuration"]
            #[inline(always)]
            pub fn rtswater(&self) -> RTSWATERR {
                let bits = {
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                RTSWATERR { bits }
            }
            #[doc = "Bits 16:17 - Transmitter narrow pulse"]
            #[inline(always)]
            pub fn tnp(&self) -> TNPR {
                TNPR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 18 - Infrared enable"]
            #[inline(always)]
            pub fn iren(&self) -> IRENR {
                IRENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Transmitter clear-to-send enable"]
            #[inline(always)]
            pub fn txctse(&mut self) -> _TXCTSEW {
                _TXCTSEW { w: self }
            }
            #[doc = "Bit 1 - Transmitter request-to-send enable"]
            #[inline(always)]
            pub fn txrtse(&mut self) -> _TXRTSEW {
                _TXRTSEW { w: self }
            }
            #[doc = "Bit 2 - Transmitter request-to-send polarity"]
            #[inline(always)]
            pub fn txrtspol(&mut self) -> _TXRTSPOLW {
                _TXRTSPOLW { w: self }
            }
            #[doc = "Bit 3 - Receiver request-to-send enable"]
            #[inline(always)]
            pub fn rxrtse(&mut self) -> _RXRTSEW {
                _RXRTSEW { w: self }
            }
            #[doc = "Bit 4 - Transmit CTS Configuration"]
            #[inline(always)]
            pub fn txctsc(&mut self) -> _TXCTSCW {
                _TXCTSCW { w: self }
            }
            #[doc = "Bit 5 - Transmit CTS Source"]
            #[inline(always)]
            pub fn txctssrc(&mut self) -> _TXCTSSRCW {
                _TXCTSSRCW { w: self }
            }
            #[doc = "Bits 8:9 - Receive RTS Configuration"]
            #[inline(always)]
            pub fn rtswater(&mut self) -> _RTSWATERW {
                _RTSWATERW { w: self }
            }
            #[doc = "Bits 16:17 - Transmitter narrow pulse"]
            #[inline(always)]
            pub fn tnp(&mut self) -> _TNPW {
                _TNPW { w: self }
            }
            #[doc = "Bit 18 - Infrared enable"]
            #[inline(always)]
            pub fn iren(&mut self) -> _IRENW {
                _IRENW { w: self }
            }
        }
    }
    #[doc = "LPUART FIFO Register"]
    pub struct FIFO {
        register: VolatileCell<u32>,
    }
    #[doc = "LPUART FIFO Register"]
    pub mod fifo {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FIFO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `RXFIFOSIZE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXFIFOSIZER {
            #[doc = "Receive FIFO/Buffer depth = 1 dataword."]
            _000,
            #[doc = "Receive FIFO/Buffer depth = 4 datawords."]
            _001,
            #[doc = "Receive FIFO/Buffer depth = 8 datawords."]
            _010,
            #[doc = "Receive FIFO/Buffer depth = 16 datawords."]
            _011,
            #[doc = "Receive FIFO/Buffer depth = 32 datawords."]
            _100,
            #[doc = "Receive FIFO/Buffer depth = 64 datawords."]
            _101,
            #[doc = "Receive FIFO/Buffer depth = 128 datawords."]
            _110,
            #[doc = "Receive FIFO/Buffer depth = 256 datawords."]
            _111,
        }
        impl RXFIFOSIZER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    RXFIFOSIZER::_000 => 0,
                    RXFIFOSIZER::_001 => 1,
                    RXFIFOSIZER::_010 => 2,
                    RXFIFOSIZER::_011 => 3,
                    RXFIFOSIZER::_100 => 4,
                    RXFIFOSIZER::_101 => 5,
                    RXFIFOSIZER::_110 => 6,
                    RXFIFOSIZER::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> RXFIFOSIZER {
                match value {
                    0 => RXFIFOSIZER::_000,
                    1 => RXFIFOSIZER::_001,
                    2 => RXFIFOSIZER::_010,
                    3 => RXFIFOSIZER::_011,
                    4 => RXFIFOSIZER::_100,
                    5 => RXFIFOSIZER::_101,
                    6 => RXFIFOSIZER::_110,
                    7 => RXFIFOSIZER::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == RXFIFOSIZER::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == RXFIFOSIZER::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == RXFIFOSIZER::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == RXFIFOSIZER::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == RXFIFOSIZER::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == RXFIFOSIZER::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == RXFIFOSIZER::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == RXFIFOSIZER::_111
            }
        }
        #[doc = "Possible values of the field `RXFE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXFER {
            #[doc = "Receive FIFO is not enabled. Buffer is depth 1. (Legacy support)"]
            _0,
            #[doc = "Receive FIFO is enabled. Buffer is depth indicted by RXFIFOSIZE."]
            _1,
        }
        impl RXFER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXFER::_0 => false,
                    RXFER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXFER {
                match value {
                    false => RXFER::_0,
                    true => RXFER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXFER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RXFER::_1
            }
        }
        #[doc = "Possible values of the field `TXFIFOSIZE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXFIFOSIZER {
            #[doc = "Transmit FIFO/Buffer depth = 1 dataword."]
            _000,
            #[doc = "Transmit FIFO/Buffer depth = 4 datawords."]
            _001,
            #[doc = "Transmit FIFO/Buffer depth = 8 datawords."]
            _010,
            #[doc = "Transmit FIFO/Buffer depth = 16 datawords."]
            _011,
            #[doc = "Transmit FIFO/Buffer depth = 32 datawords."]
            _100,
            #[doc = "Transmit FIFO/Buffer depth = 64 datawords."]
            _101,
            #[doc = "Transmit FIFO/Buffer depth = 128 datawords."]
            _110,
            #[doc = "Transmit FIFO/Buffer depth = 256 datawords"]
            _111,
        }
        impl TXFIFOSIZER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TXFIFOSIZER::_000 => 0,
                    TXFIFOSIZER::_001 => 1,
                    TXFIFOSIZER::_010 => 2,
                    TXFIFOSIZER::_011 => 3,
                    TXFIFOSIZER::_100 => 4,
                    TXFIFOSIZER::_101 => 5,
                    TXFIFOSIZER::_110 => 6,
                    TXFIFOSIZER::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TXFIFOSIZER {
                match value {
                    0 => TXFIFOSIZER::_000,
                    1 => TXFIFOSIZER::_001,
                    2 => TXFIFOSIZER::_010,
                    3 => TXFIFOSIZER::_011,
                    4 => TXFIFOSIZER::_100,
                    5 => TXFIFOSIZER::_101,
                    6 => TXFIFOSIZER::_110,
                    7 => TXFIFOSIZER::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == TXFIFOSIZER::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == TXFIFOSIZER::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == TXFIFOSIZER::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == TXFIFOSIZER::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == TXFIFOSIZER::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == TXFIFOSIZER::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == TXFIFOSIZER::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == TXFIFOSIZER::_111
            }
        }
        #[doc = "Possible values of the field `TXFE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXFER {
            #[doc = "Transmit FIFO is not enabled. Buffer is depth 1. (Legacy support)."]
            _0,
            #[doc = "Transmit FIFO is enabled. Buffer is depth indicated by TXFIFOSIZE."]
            _1,
        }
        impl TXFER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXFER::_0 => false,
                    TXFER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXFER {
                match value {
                    false => TXFER::_0,
                    true => TXFER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXFER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXFER::_1
            }
        }
        #[doc = "Possible values of the field `RXUFE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXUFER {
            #[doc = "RXUF flag does not generate an interrupt to the host."]
            _0,
            #[doc = "RXUF flag generates an interrupt to the host."]
            _1,
        }
        impl RXUFER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXUFER::_0 => false,
                    RXUFER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXUFER {
                match value {
                    false => RXUFER::_0,
                    true => RXUFER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXUFER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RXUFER::_1
            }
        }
        #[doc = "Possible values of the field `TXOFE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXOFER {
            #[doc = "TXOF flag does not generate an interrupt to the host."]
            _0,
            #[doc = "TXOF flag generates an interrupt to the host."]
            _1,
        }
        impl TXOFER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXOFER::_0 => false,
                    TXOFER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXOFER {
                match value {
                    false => TXOFER::_0,
                    true => TXOFER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXOFER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXOFER::_1
            }
        }
        #[doc = "Possible values of the field `RXIDEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXIDENR {
            #[doc = "Disable RDRF assertion due to partially filled FIFO when receiver is idle."]
            _000,
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 1 character."]
            _001,
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 2 characters."]
            _010,
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 4 characters."]
            _011,
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 8 characters."]
            _100,
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 16 characters."]
            _101,
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 32 characters."]
            _110,
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 64 characters."]
            _111,
        }
        impl RXIDENR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    RXIDENR::_000 => 0,
                    RXIDENR::_001 => 1,
                    RXIDENR::_010 => 2,
                    RXIDENR::_011 => 3,
                    RXIDENR::_100 => 4,
                    RXIDENR::_101 => 5,
                    RXIDENR::_110 => 6,
                    RXIDENR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> RXIDENR {
                match value {
                    0 => RXIDENR::_000,
                    1 => RXIDENR::_001,
                    2 => RXIDENR::_010,
                    3 => RXIDENR::_011,
                    4 => RXIDENR::_100,
                    5 => RXIDENR::_101,
                    6 => RXIDENR::_110,
                    7 => RXIDENR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == RXIDENR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == RXIDENR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == RXIDENR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == RXIDENR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == RXIDENR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == RXIDENR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == RXIDENR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == RXIDENR::_111
            }
        }
        #[doc = "Possible values of the field `RXUF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXUFR {
            #[doc = "No receive buffer underflow has occurred since the last time the flag was cleared."]
            _0,
            #[doc = "At least one receive buffer underflow has occurred since the last time the flag was cleared."]
            _1,
        }
        impl RXUFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXUFR::_0 => false,
                    RXUFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXUFR {
                match value {
                    false => RXUFR::_0,
                    true => RXUFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXUFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RXUFR::_1
            }
        }
        #[doc = "Possible values of the field `TXOF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXOFR {
            #[doc = "No transmit buffer overflow has occurred since the last time the flag was cleared."]
            _0,
            #[doc = "At least one transmit buffer overflow has occurred since the last time the flag was cleared."]
            _1,
        }
        impl TXOFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXOFR::_0 => false,
                    TXOFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXOFR {
                match value {
                    false => TXOFR::_0,
                    true => TXOFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXOFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXOFR::_1
            }
        }
        #[doc = "Possible values of the field `RXEMPT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXEMPTR {
            #[doc = "Receive buffer is not empty."]
            _0,
            #[doc = "Receive buffer is empty."]
            _1,
        }
        impl RXEMPTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXEMPTR::_0 => false,
                    RXEMPTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXEMPTR {
                match value {
                    false => RXEMPTR::_0,
                    true => RXEMPTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXEMPTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RXEMPTR::_1
            }
        }
        #[doc = "Possible values of the field `TXEMPT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXEMPTR {
            #[doc = "Transmit buffer is not empty."]
            _0,
            #[doc = "Transmit buffer is empty."]
            _1,
        }
        impl TXEMPTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXEMPTR::_0 => false,
                    TXEMPTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXEMPTR {
                match value {
                    false => TXEMPTR::_0,
                    true => TXEMPTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXEMPTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXEMPTR::_1
            }
        }
        #[doc = "Values that can be written to the field `RXFE`"]
        pub enum RXFEW {
            #[doc = "Receive FIFO is not enabled. Buffer is depth 1. (Legacy support)"]
            _0,
            #[doc = "Receive FIFO is enabled. Buffer is depth indicted by RXFIFOSIZE."]
            _1,
        }
        impl RXFEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RXFEW::_0 => false,
                    RXFEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXFEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXFEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RXFEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Receive FIFO is not enabled. Buffer is depth 1. (Legacy support)"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RXFEW::_0)
            }
            #[doc = "Receive FIFO is enabled. Buffer is depth indicted by RXFIFOSIZE."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RXFEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TXFE`"]
        pub enum TXFEW {
            #[doc = "Transmit FIFO is not enabled. Buffer is depth 1. (Legacy support)."]
            _0,
            #[doc = "Transmit FIFO is enabled. Buffer is depth indicated by TXFIFOSIZE."]
            _1,
        }
        impl TXFEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TXFEW::_0 => false,
                    TXFEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXFEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXFEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TXFEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Transmit FIFO is not enabled. Buffer is depth 1. (Legacy support)."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TXFEW::_0)
            }
            #[doc = "Transmit FIFO is enabled. Buffer is depth indicated by TXFIFOSIZE."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TXFEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RXUFE`"]
        pub enum RXUFEW {
            #[doc = "RXUF flag does not generate an interrupt to the host."]
            _0,
            #[doc = "RXUF flag generates an interrupt to the host."]
            _1,
        }
        impl RXUFEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RXUFEW::_0 => false,
                    RXUFEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXUFEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXUFEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RXUFEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "RXUF flag does not generate an interrupt to the host."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RXUFEW::_0)
            }
            #[doc = "RXUF flag generates an interrupt to the host."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RXUFEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TXOFE`"]
        pub enum TXOFEW {
            #[doc = "TXOF flag does not generate an interrupt to the host."]
            _0,
            #[doc = "TXOF flag generates an interrupt to the host."]
            _1,
        }
        impl TXOFEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TXOFEW::_0 => false,
                    TXOFEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXOFEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXOFEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TXOFEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "TXOF flag does not generate an interrupt to the host."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TXOFEW::_0)
            }
            #[doc = "TXOF flag generates an interrupt to the host."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TXOFEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RXIDEN`"]
        pub enum RXIDENW {
            #[doc = "Disable RDRF assertion due to partially filled FIFO when receiver is idle."]
            _000,
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 1 character."]
            _001,
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 2 characters."]
            _010,
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 4 characters."]
            _011,
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 8 characters."]
            _100,
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 16 characters."]
            _101,
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 32 characters."]
            _110,
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 64 characters."]
            _111,
        }
        impl RXIDENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    RXIDENW::_000 => 0,
                    RXIDENW::_001 => 1,
                    RXIDENW::_010 => 2,
                    RXIDENW::_011 => 3,
                    RXIDENW::_100 => 4,
                    RXIDENW::_101 => 5,
                    RXIDENW::_110 => 6,
                    RXIDENW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXIDENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXIDENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RXIDENW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Disable RDRF assertion due to partially filled FIFO when receiver is idle."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(RXIDENW::_000)
            }
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 1 character."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(RXIDENW::_001)
            }
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 2 characters."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(RXIDENW::_010)
            }
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 4 characters."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(RXIDENW::_011)
            }
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 8 characters."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(RXIDENW::_100)
            }
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 16 characters."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(RXIDENW::_101)
            }
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 32 characters."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(RXIDENW::_110)
            }
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 64 characters."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(RXIDENW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RXFLUSH`"]
        pub enum RXFLUSHW {
            #[doc = "No flush operation occurs."]
            _0,
            #[doc = "All data in the receive FIFO/buffer is cleared out."]
            _1,
        }
        impl RXFLUSHW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RXFLUSHW::_0 => false,
                    RXFLUSHW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXFLUSHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXFLUSHW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RXFLUSHW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No flush operation occurs."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RXFLUSHW::_0)
            }
            #[doc = "All data in the receive FIFO/buffer is cleared out."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RXFLUSHW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TXFLUSH`"]
        pub enum TXFLUSHW {
            #[doc = "No flush operation occurs."]
            _0,
            #[doc = "All data in the transmit FIFO/Buffer is cleared out."]
            _1,
        }
        impl TXFLUSHW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TXFLUSHW::_0 => false,
                    TXFLUSHW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXFLUSHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXFLUSHW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TXFLUSHW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No flush operation occurs."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TXFLUSHW::_0)
            }
            #[doc = "All data in the transmit FIFO/Buffer is cleared out."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TXFLUSHW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RXUF`"]
        pub enum RXUFW {
            #[doc = "No receive buffer underflow has occurred since the last time the flag was cleared."]
            _0,
            #[doc = "At least one receive buffer underflow has occurred since the last time the flag was cleared."]
            _1,
        }
        impl RXUFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RXUFW::_0 => false,
                    RXUFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXUFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXUFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RXUFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No receive buffer underflow has occurred since the last time the flag was cleared."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RXUFW::_0)
            }
            #[doc = "At least one receive buffer underflow has occurred since the last time the flag was cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RXUFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TXOF`"]
        pub enum TXOFW {
            #[doc = "No transmit buffer overflow has occurred since the last time the flag was cleared."]
            _0,
            #[doc = "At least one transmit buffer overflow has occurred since the last time the flag was cleared."]
            _1,
        }
        impl TXOFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TXOFW::_0 => false,
                    TXOFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXOFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXOFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TXOFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No transmit buffer overflow has occurred since the last time the flag was cleared."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TXOFW::_0)
            }
            #[doc = "At least one transmit buffer overflow has occurred since the last time the flag was cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TXOFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:2 - Receive FIFO. Buffer Depth"]
            #[inline(always)]
            pub fn rxfifosize(&self) -> RXFIFOSIZER {
                RXFIFOSIZER::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 3 - Receive FIFO Enable"]
            #[inline(always)]
            pub fn rxfe(&self) -> RXFER {
                RXFER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 4:6 - Transmit FIFO. Buffer Depth"]
            #[inline(always)]
            pub fn txfifosize(&self) -> TXFIFOSIZER {
                TXFIFOSIZER::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 7 - Transmit FIFO Enable"]
            #[inline(always)]
            pub fn txfe(&self) -> TXFER {
                TXFER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Receive FIFO Underflow Interrupt Enable"]
            #[inline(always)]
            pub fn rxufe(&self) -> RXUFER {
                RXUFER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Transmit FIFO Overflow Interrupt Enable"]
            #[inline(always)]
            pub fn txofe(&self) -> TXOFER {
                TXOFER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 10:12 - Receiver Idle Empty Enable"]
            #[inline(always)]
            pub fn rxiden(&self) -> RXIDENR {
                RXIDENR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 16 - Receiver Buffer Underflow Flag"]
            #[inline(always)]
            pub fn rxuf(&self) -> RXUFR {
                RXUFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - Transmitter Buffer Overflow Flag"]
            #[inline(always)]
            pub fn txof(&self) -> TXOFR {
                TXOFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 22 - Receive Buffer/FIFO Empty"]
            #[inline(always)]
            pub fn rxempt(&self) -> RXEMPTR {
                RXEMPTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 23 - Transmit Buffer/FIFO Empty"]
            #[inline(always)]
            pub fn txempt(&self) -> TXEMPTR {
                TXEMPTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 12582929 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 3 - Receive FIFO Enable"]
            #[inline(always)]
            pub fn rxfe(&mut self) -> _RXFEW {
                _RXFEW { w: self }
            }
            #[doc = "Bit 7 - Transmit FIFO Enable"]
            #[inline(always)]
            pub fn txfe(&mut self) -> _TXFEW {
                _TXFEW { w: self }
            }
            #[doc = "Bit 8 - Receive FIFO Underflow Interrupt Enable"]
            #[inline(always)]
            pub fn rxufe(&mut self) -> _RXUFEW {
                _RXUFEW { w: self }
            }
            #[doc = "Bit 9 - Transmit FIFO Overflow Interrupt Enable"]
            #[inline(always)]
            pub fn txofe(&mut self) -> _TXOFEW {
                _TXOFEW { w: self }
            }
            #[doc = "Bits 10:12 - Receiver Idle Empty Enable"]
            #[inline(always)]
            pub fn rxiden(&mut self) -> _RXIDENW {
                _RXIDENW { w: self }
            }
            #[doc = "Bit 14 - Receive FIFO/Buffer Flush"]
            #[inline(always)]
            pub fn rxflush(&mut self) -> _RXFLUSHW {
                _RXFLUSHW { w: self }
            }
            #[doc = "Bit 15 - Transmit FIFO/Buffer Flush"]
            #[inline(always)]
            pub fn txflush(&mut self) -> _TXFLUSHW {
                _TXFLUSHW { w: self }
            }
            #[doc = "Bit 16 - Receiver Buffer Underflow Flag"]
            #[inline(always)]
            pub fn rxuf(&mut self) -> _RXUFW {
                _RXUFW { w: self }
            }
            #[doc = "Bit 17 - Transmitter Buffer Overflow Flag"]
            #[inline(always)]
            pub fn txof(&mut self) -> _TXOFW {
                _TXOFW { w: self }
            }
        }
    }
    #[doc = "LPUART Watermark Register"]
    pub struct WATER {
        register: VolatileCell<u32>,
    }
    #[doc = "LPUART Watermark Register"]
    pub mod water {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::WATER {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct TXWATERR {
            bits: u8,
        }
        impl TXWATERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct TXCOUNTR {
            bits: u8,
        }
        impl TXCOUNTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct RXWATERR {
            bits: u8,
        }
        impl RXWATERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct RXCOUNTR {
            bits: u8,
        }
        impl RXCOUNTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXWATERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXWATERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXWATERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXWATERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:1 - Transmit Watermark"]
            #[inline(always)]
            pub fn txwater(&self) -> TXWATERR {
                let bits = {
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TXWATERR { bits }
            }
            #[doc = "Bits 8:10 - Transmit Counter"]
            #[inline(always)]
            pub fn txcount(&self) -> TXCOUNTR {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TXCOUNTR { bits }
            }
            #[doc = "Bits 16:17 - Receive Watermark"]
            #[inline(always)]
            pub fn rxwater(&self) -> RXWATERR {
                let bits = {
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                RXWATERR { bits }
            }
            #[doc = "Bits 24:26 - Receive Counter"]
            #[inline(always)]
            pub fn rxcount(&self) -> RXCOUNTR {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                RXCOUNTR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:1 - Transmit Watermark"]
            #[inline(always)]
            pub fn txwater(&mut self) -> _TXWATERW {
                _TXWATERW { w: self }
            }
            #[doc = "Bits 16:17 - Receive Watermark"]
            #[inline(always)]
            pub fn rxwater(&mut self) -> _RXWATERW {
                _RXWATERW { w: self }
            }
        }
    }
}
#[doc = "Universal Asynchronous Receiver/Transmitter"]
pub struct LPUART0 {
    register_block: lpuart0::RegisterBlock,
}
impl Deref for LPUART0 {
    type Target = lpuart0::RegisterBlock;
    fn deref(&self) -> &lpuart0::RegisterBlock {
        &self.register_block
    }
}
#[doc = "Universal Asynchronous Receiver/Transmitter"]
pub const LPUART1: Peripheral<LPUART1> = unsafe { Peripheral::new(1074180096) };
#[doc = "Universal Asynchronous Receiver/Transmitter"]
pub mod lpuart1 {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - Version ID Register"]
        pub verid: VERID,
        #[doc = "0x04 - Parameter Register"]
        pub param: PARAM,
        #[doc = "0x08 - LPUART Global Register"]
        pub global: GLOBAL,
        #[doc = "0x0c - LPUART Pin Configuration Register"]
        pub pincfg: PINCFG,
        #[doc = "0x10 - LPUART Baud Rate Register"]
        pub baud: BAUD,
        #[doc = "0x14 - LPUART Status Register"]
        pub stat: STAT,
        #[doc = "0x18 - LPUART Control Register"]
        pub ctrl: CTRL,
        #[doc = "0x1c - LPUART Data Register"]
        pub data: DATA,
        #[doc = "0x20 - LPUART Match Address Register"]
        pub match_: MATCH,
        #[doc = "0x24 - LPUART Modem IrDA Register"]
        pub modir: MODIR,
        #[doc = "0x28 - LPUART FIFO Register"]
        pub fifo: FIFO,
        #[doc = "0x2c - LPUART Watermark Register"]
        pub water: WATER,
    }
    #[doc = "Version ID Register"]
    pub struct VERID {
        register: VolatileCell<u32>,
    }
    #[doc = "Version ID Register"]
    pub mod verid {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::VERID {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = "Possible values of the field `FEATURE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FEATURER {
            #[doc = "Standard feature set."]
            _0000000000000001,
            #[doc = "Standard feature set with MODEM/IrDA support."]
            _0000000000000011,
            #[doc = r" Reserved"]
            _Reserved(u16),
        }
        impl FEATURER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                match *self {
                    FEATURER::_0000000000000001 => 1,
                    FEATURER::_0000000000000011 => 3,
                    FEATURER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u16) -> FEATURER {
                match value {
                    1 => FEATURER::_0000000000000001,
                    3 => FEATURER::_0000000000000011,
                    i => FEATURER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000000000000001`"]
            #[inline(always)]
            pub fn is_0000000000000001(&self) -> bool {
                *self == FEATURER::_0000000000000001
            }
            #[doc = "Checks if the value of the field is `_0000000000000011`"]
            #[inline(always)]
            pub fn is_0000000000000011(&self) -> bool {
                *self == FEATURER::_0000000000000011
            }
        }
        #[doc = r" Value of the field"]
        pub struct MINORR {
            bits: u8,
        }
        impl MINORR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct MAJORR {
            bits: u8,
        }
        impl MAJORR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Feature Identification Number"]
            #[inline(always)]
            pub fn feature(&self) -> FEATURER {
                FEATURER::_from({
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                })
            }
            #[doc = "Bits 16:23 - Minor Version Number"]
            #[inline(always)]
            pub fn minor(&self) -> MINORR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                MINORR { bits }
            }
            #[doc = "Bits 24:31 - Major Version Number"]
            #[inline(always)]
            pub fn major(&self) -> MAJORR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                MAJORR { bits }
            }
        }
    }
    #[doc = "Parameter Register"]
    pub struct PARAM {
        register: VolatileCell<u32>,
    }
    #[doc = "Parameter Register"]
    pub mod param {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::PARAM {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct TXFIFOR {
            bits: u8,
        }
        impl TXFIFOR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct RXFIFOR {
            bits: u8,
        }
        impl RXFIFOR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Transmit FIFO Size"]
            #[inline(always)]
            pub fn txfifo(&self) -> TXFIFOR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TXFIFOR { bits }
            }
            #[doc = "Bits 8:15 - Receive FIFO Size"]
            #[inline(always)]
            pub fn rxfifo(&self) -> RXFIFOR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                RXFIFOR { bits }
            }
        }
    }
    #[doc = "LPUART Global Register"]
    pub struct GLOBAL {
        register: VolatileCell<u32>,
    }
    #[doc = "LPUART Global Register"]
    pub mod global {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::GLOBAL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `RST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RSTR {
            #[doc = "Module is not reset."]
            _0,
            #[doc = "Module is reset."]
            _1,
        }
        impl RSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RSTR::_0 => false,
                    RSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RSTR {
                match value {
                    false => RSTR::_0,
                    true => RSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RSTR::_1
            }
        }
        #[doc = "Values that can be written to the field `RST`"]
        pub enum RSTW {
            #[doc = "Module is not reset."]
            _0,
            #[doc = "Module is reset."]
            _1,
        }
        impl RSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RSTW::_0 => false,
                    RSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Module is not reset."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RSTW::_0)
            }
            #[doc = "Module is reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 1 - Software Reset"]
            #[inline(always)]
            pub fn rst(&self) -> RSTR {
                RSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 1 - Software Reset"]
            #[inline(always)]
            pub fn rst(&mut self) -> _RSTW {
                _RSTW { w: self }
            }
        }
    }
    #[doc = "LPUART Pin Configuration Register"]
    pub struct PINCFG {
        register: VolatileCell<u32>,
    }
    #[doc = "LPUART Pin Configuration Register"]
    pub mod pincfg {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PINCFG {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TRGSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRGSELR {
            #[doc = "Input trigger is disabled."]
            _00,
            #[doc = "Input trigger is used instead of RXD pin input."]
            _01,
            #[doc = "Input trigger is used instead of CTS_B pin input."]
            _10,
            #[doc = "Input trigger is used to modulate the TXD pin output. The TXD pin output (after TXINV configuration) is ANDed with the input trigger."]
            _11,
        }
        impl TRGSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TRGSELR::_00 => 0,
                    TRGSELR::_01 => 1,
                    TRGSELR::_10 => 2,
                    TRGSELR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TRGSELR {
                match value {
                    0 => TRGSELR::_00,
                    1 => TRGSELR::_01,
                    2 => TRGSELR::_10,
                    3 => TRGSELR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == TRGSELR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == TRGSELR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == TRGSELR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == TRGSELR::_11
            }
        }
        #[doc = "Values that can be written to the field `TRGSEL`"]
        pub enum TRGSELW {
            #[doc = "Input trigger is disabled."]
            _00,
            #[doc = "Input trigger is used instead of RXD pin input."]
            _01,
            #[doc = "Input trigger is used instead of CTS_B pin input."]
            _10,
            #[doc = "Input trigger is used to modulate the TXD pin output. The TXD pin output (after TXINV configuration) is ANDed with the input trigger."]
            _11,
        }
        impl TRGSELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TRGSELW::_00 => 0,
                    TRGSELW::_01 => 1,
                    TRGSELW::_10 => 2,
                    TRGSELW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRGSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRGSELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRGSELW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Input trigger is disabled."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(TRGSELW::_00)
            }
            #[doc = "Input trigger is used instead of RXD pin input."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(TRGSELW::_01)
            }
            #[doc = "Input trigger is used instead of CTS_B pin input."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(TRGSELW::_10)
            }
            #[doc = "Input trigger is used to modulate the TXD pin output. The TXD pin output (after TXINV configuration) is ANDed with the input trigger."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(TRGSELW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:1 - Trigger Select"]
            #[inline(always)]
            pub fn trgsel(&self) -> TRGSELR {
                TRGSELR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:1 - Trigger Select"]
            #[inline(always)]
            pub fn trgsel(&mut self) -> _TRGSELW {
                _TRGSELW { w: self }
            }
        }
    }
    #[doc = "LPUART Baud Rate Register"]
    pub struct BAUD {
        register: VolatileCell<u32>,
    }
    #[doc = "LPUART Baud Rate Register"]
    pub mod baud {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::BAUD {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SBRR {
            bits: u16,
        }
        impl SBRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `SBNS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SBNSR {
            #[doc = "One stop bit."]
            _0,
            #[doc = "Two stop bits."]
            _1,
        }
        impl SBNSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SBNSR::_0 => false,
                    SBNSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SBNSR {
                match value {
                    false => SBNSR::_0,
                    true => SBNSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SBNSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SBNSR::_1
            }
        }
        #[doc = "Possible values of the field `RXEDGIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXEDGIER {
            #[doc = "Hardware interrupts from LPUART_STAT[RXEDGIF] disabled."]
            _0,
            #[doc = "Hardware interrupt requested when LPUART_STAT[RXEDGIF] flag is 1."]
            _1,
        }
        impl RXEDGIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXEDGIER::_0 => false,
                    RXEDGIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXEDGIER {
                match value {
                    false => RXEDGIER::_0,
                    true => RXEDGIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXEDGIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RXEDGIER::_1
            }
        }
        #[doc = "Possible values of the field `LBKDIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LBKDIER {
            #[doc = "Hardware interrupts from LPUART_STAT[LBKDIF] disabled (use polling)."]
            _0,
            #[doc = "Hardware interrupt requested when LPUART_STAT[LBKDIF] flag is 1."]
            _1,
        }
        impl LBKDIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LBKDIER::_0 => false,
                    LBKDIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LBKDIER {
                match value {
                    false => LBKDIER::_0,
                    true => LBKDIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LBKDIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LBKDIER::_1
            }
        }
        #[doc = "Possible values of the field `RESYNCDIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RESYNCDISR {
            #[doc = "Resynchronization during received data word is supported"]
            _0,
            #[doc = "Resynchronization during received data word is disabled"]
            _1,
        }
        impl RESYNCDISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RESYNCDISR::_0 => false,
                    RESYNCDISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RESYNCDISR {
                match value {
                    false => RESYNCDISR::_0,
                    true => RESYNCDISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RESYNCDISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RESYNCDISR::_1
            }
        }
        #[doc = "Possible values of the field `BOTHEDGE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BOTHEDGER {
            #[doc = "Receiver samples input data using the rising edge of the baud rate clock."]
            _0,
            #[doc = "Receiver samples input data using the rising and falling edge of the baud rate clock."]
            _1,
        }
        impl BOTHEDGER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BOTHEDGER::_0 => false,
                    BOTHEDGER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BOTHEDGER {
                match value {
                    false => BOTHEDGER::_0,
                    true => BOTHEDGER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BOTHEDGER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BOTHEDGER::_1
            }
        }
        #[doc = "Possible values of the field `MATCFG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MATCFGR {
            #[doc = "Address Match Wakeup"]
            _00,
            #[doc = "Idle Match Wakeup"]
            _01,
            #[doc = "Match On and Match Off"]
            _10,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl MATCFGR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MATCFGR::_00 => 0,
                    MATCFGR::_01 => 1,
                    MATCFGR::_10 => 2,
                    MATCFGR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MATCFGR {
                match value {
                    0 => MATCFGR::_00,
                    1 => MATCFGR::_01,
                    2 => MATCFGR::_10,
                    i => MATCFGR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == MATCFGR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == MATCFGR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == MATCFGR::_10
            }
        }
        #[doc = "Possible values of the field `RIDMAE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RIDMAER {
            #[doc = "DMA request disabled."]
            _0,
            #[doc = "DMA request enabled."]
            _1,
        }
        impl RIDMAER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RIDMAER::_0 => false,
                    RIDMAER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RIDMAER {
                match value {
                    false => RIDMAER::_0,
                    true => RIDMAER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RIDMAER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RIDMAER::_1
            }
        }
        #[doc = "Possible values of the field `RDMAE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RDMAER {
            #[doc = "DMA request disabled."]
            _0,
            #[doc = "DMA request enabled."]
            _1,
        }
        impl RDMAER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RDMAER::_0 => false,
                    RDMAER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RDMAER {
                match value {
                    false => RDMAER::_0,
                    true => RDMAER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RDMAER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RDMAER::_1
            }
        }
        #[doc = "Possible values of the field `TDMAE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TDMAER {
            #[doc = "DMA request disabled."]
            _0,
            #[doc = "DMA request enabled."]
            _1,
        }
        impl TDMAER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TDMAER::_0 => false,
                    TDMAER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TDMAER {
                match value {
                    false => TDMAER::_0,
                    true => TDMAER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TDMAER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TDMAER::_1
            }
        }
        #[doc = "Possible values of the field `OSR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum OSRR {
            #[doc = "Writing 0 to this field will result in an oversampling ratio of 16"]
            _00000,
            #[doc = "Oversampling ratio of 4, requires BOTHEDGE to be set."]
            _00011,
            #[doc = "Oversampling ratio of 5, requires BOTHEDGE to be set."]
            _00100,
            #[doc = "Oversampling ratio of 6, requires BOTHEDGE to be set."]
            _00101,
            #[doc = "Oversampling ratio of 7, requires BOTHEDGE to be set."]
            _00110,
            #[doc = "Oversampling ratio of 8."]
            _00111,
            #[doc = "Oversampling ratio of 9."]
            _01000,
            #[doc = "Oversampling ratio of 10."]
            _01001,
            #[doc = "Oversampling ratio of 11."]
            _01010,
            #[doc = "Oversampling ratio of 12."]
            _01011,
            #[doc = "Oversampling ratio of 13."]
            _01100,
            #[doc = "Oversampling ratio of 14."]
            _01101,
            #[doc = "Oversampling ratio of 15."]
            _01110,
            #[doc = "Oversampling ratio of 16."]
            _01111,
            #[doc = "Oversampling ratio of 17."]
            _10000,
            #[doc = "Oversampling ratio of 18."]
            _10001,
            #[doc = "Oversampling ratio of 19."]
            _10010,
            #[doc = "Oversampling ratio of 20."]
            _10011,
            #[doc = "Oversampling ratio of 21."]
            _10100,
            #[doc = "Oversampling ratio of 22."]
            _10101,
            #[doc = "Oversampling ratio of 23."]
            _10110,
            #[doc = "Oversampling ratio of 24."]
            _10111,
            #[doc = "Oversampling ratio of 25."]
            _11000,
            #[doc = "Oversampling ratio of 26."]
            _11001,
            #[doc = "Oversampling ratio of 27."]
            _11010,
            #[doc = "Oversampling ratio of 28."]
            _11011,
            #[doc = "Oversampling ratio of 29."]
            _11100,
            #[doc = "Oversampling ratio of 30."]
            _11101,
            #[doc = "Oversampling ratio of 31."]
            _11110,
            #[doc = "Oversampling ratio of 32."]
            _11111,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl OSRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    OSRR::_00000 => 0,
                    OSRR::_00011 => 3,
                    OSRR::_00100 => 4,
                    OSRR::_00101 => 5,
                    OSRR::_00110 => 6,
                    OSRR::_00111 => 7,
                    OSRR::_01000 => 8,
                    OSRR::_01001 => 9,
                    OSRR::_01010 => 10,
                    OSRR::_01011 => 11,
                    OSRR::_01100 => 12,
                    OSRR::_01101 => 13,
                    OSRR::_01110 => 14,
                    OSRR::_01111 => 15,
                    OSRR::_10000 => 16,
                    OSRR::_10001 => 17,
                    OSRR::_10010 => 18,
                    OSRR::_10011 => 19,
                    OSRR::_10100 => 20,
                    OSRR::_10101 => 21,
                    OSRR::_10110 => 22,
                    OSRR::_10111 => 23,
                    OSRR::_11000 => 24,
                    OSRR::_11001 => 25,
                    OSRR::_11010 => 26,
                    OSRR::_11011 => 27,
                    OSRR::_11100 => 28,
                    OSRR::_11101 => 29,
                    OSRR::_11110 => 30,
                    OSRR::_11111 => 31,
                    OSRR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> OSRR {
                match value {
                    0 => OSRR::_00000,
                    3 => OSRR::_00011,
                    4 => OSRR::_00100,
                    5 => OSRR::_00101,
                    6 => OSRR::_00110,
                    7 => OSRR::_00111,
                    8 => OSRR::_01000,
                    9 => OSRR::_01001,
                    10 => OSRR::_01010,
                    11 => OSRR::_01011,
                    12 => OSRR::_01100,
                    13 => OSRR::_01101,
                    14 => OSRR::_01110,
                    15 => OSRR::_01111,
                    16 => OSRR::_10000,
                    17 => OSRR::_10001,
                    18 => OSRR::_10010,
                    19 => OSRR::_10011,
                    20 => OSRR::_10100,
                    21 => OSRR::_10101,
                    22 => OSRR::_10110,
                    23 => OSRR::_10111,
                    24 => OSRR::_11000,
                    25 => OSRR::_11001,
                    26 => OSRR::_11010,
                    27 => OSRR::_11011,
                    28 => OSRR::_11100,
                    29 => OSRR::_11101,
                    30 => OSRR::_11110,
                    31 => OSRR::_11111,
                    i => OSRR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_00000`"]
            #[inline(always)]
            pub fn is_00000(&self) -> bool {
                *self == OSRR::_00000
            }
            #[doc = "Checks if the value of the field is `_00011`"]
            #[inline(always)]
            pub fn is_00011(&self) -> bool {
                *self == OSRR::_00011
            }
            #[doc = "Checks if the value of the field is `_00100`"]
            #[inline(always)]
            pub fn is_00100(&self) -> bool {
                *self == OSRR::_00100
            }
            #[doc = "Checks if the value of the field is `_00101`"]
            #[inline(always)]
            pub fn is_00101(&self) -> bool {
                *self == OSRR::_00101
            }
            #[doc = "Checks if the value of the field is `_00110`"]
            #[inline(always)]
            pub fn is_00110(&self) -> bool {
                *self == OSRR::_00110
            }
            #[doc = "Checks if the value of the field is `_00111`"]
            #[inline(always)]
            pub fn is_00111(&self) -> bool {
                *self == OSRR::_00111
            }
            #[doc = "Checks if the value of the field is `_01000`"]
            #[inline(always)]
            pub fn is_01000(&self) -> bool {
                *self == OSRR::_01000
            }
            #[doc = "Checks if the value of the field is `_01001`"]
            #[inline(always)]
            pub fn is_01001(&self) -> bool {
                *self == OSRR::_01001
            }
            #[doc = "Checks if the value of the field is `_01010`"]
            #[inline(always)]
            pub fn is_01010(&self) -> bool {
                *self == OSRR::_01010
            }
            #[doc = "Checks if the value of the field is `_01011`"]
            #[inline(always)]
            pub fn is_01011(&self) -> bool {
                *self == OSRR::_01011
            }
            #[doc = "Checks if the value of the field is `_01100`"]
            #[inline(always)]
            pub fn is_01100(&self) -> bool {
                *self == OSRR::_01100
            }
            #[doc = "Checks if the value of the field is `_01101`"]
            #[inline(always)]
            pub fn is_01101(&self) -> bool {
                *self == OSRR::_01101
            }
            #[doc = "Checks if the value of the field is `_01110`"]
            #[inline(always)]
            pub fn is_01110(&self) -> bool {
                *self == OSRR::_01110
            }
            #[doc = "Checks if the value of the field is `_01111`"]
            #[inline(always)]
            pub fn is_01111(&self) -> bool {
                *self == OSRR::_01111
            }
            #[doc = "Checks if the value of the field is `_10000`"]
            #[inline(always)]
            pub fn is_10000(&self) -> bool {
                *self == OSRR::_10000
            }
            #[doc = "Checks if the value of the field is `_10001`"]
            #[inline(always)]
            pub fn is_10001(&self) -> bool {
                *self == OSRR::_10001
            }
            #[doc = "Checks if the value of the field is `_10010`"]
            #[inline(always)]
            pub fn is_10010(&self) -> bool {
                *self == OSRR::_10010
            }
            #[doc = "Checks if the value of the field is `_10011`"]
            #[inline(always)]
            pub fn is_10011(&self) -> bool {
                *self == OSRR::_10011
            }
            #[doc = "Checks if the value of the field is `_10100`"]
            #[inline(always)]
            pub fn is_10100(&self) -> bool {
                *self == OSRR::_10100
            }
            #[doc = "Checks if the value of the field is `_10101`"]
            #[inline(always)]
            pub fn is_10101(&self) -> bool {
                *self == OSRR::_10101
            }
            #[doc = "Checks if the value of the field is `_10110`"]
            #[inline(always)]
            pub fn is_10110(&self) -> bool {
                *self == OSRR::_10110
            }
            #[doc = "Checks if the value of the field is `_10111`"]
            #[inline(always)]
            pub fn is_10111(&self) -> bool {
                *self == OSRR::_10111
            }
            #[doc = "Checks if the value of the field is `_11000`"]
            #[inline(always)]
            pub fn is_11000(&self) -> bool {
                *self == OSRR::_11000
            }
            #[doc = "Checks if the value of the field is `_11001`"]
            #[inline(always)]
            pub fn is_11001(&self) -> bool {
                *self == OSRR::_11001
            }
            #[doc = "Checks if the value of the field is `_11010`"]
            #[inline(always)]
            pub fn is_11010(&self) -> bool {
                *self == OSRR::_11010
            }
            #[doc = "Checks if the value of the field is `_11011`"]
            #[inline(always)]
            pub fn is_11011(&self) -> bool {
                *self == OSRR::_11011
            }
            #[doc = "Checks if the value of the field is `_11100`"]
            #[inline(always)]
            pub fn is_11100(&self) -> bool {
                *self == OSRR::_11100
            }
            #[doc = "Checks if the value of the field is `_11101`"]
            #[inline(always)]
            pub fn is_11101(&self) -> bool {
                *self == OSRR::_11101
            }
            #[doc = "Checks if the value of the field is `_11110`"]
            #[inline(always)]
            pub fn is_11110(&self) -> bool {
                *self == OSRR::_11110
            }
            #[doc = "Checks if the value of the field is `_11111`"]
            #[inline(always)]
            pub fn is_11111(&self) -> bool {
                *self == OSRR::_11111
            }
        }
        #[doc = "Possible values of the field `M10`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum M10R {
            #[doc = "Receiver and transmitter use 7-bit to 9-bit data characters."]
            _0,
            #[doc = "Receiver and transmitter use 10-bit data characters."]
            _1,
        }
        impl M10R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    M10R::_0 => false,
                    M10R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> M10R {
                match value {
                    false => M10R::_0,
                    true => M10R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == M10R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == M10R::_1
            }
        }
        #[doc = "Possible values of the field `MAEN2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MAEN2R {
            #[doc = "Normal operation."]
            _0,
            #[doc = "Enables automatic address matching or data matching mode for MATCH[MA2]."]
            _1,
        }
        impl MAEN2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MAEN2R::_0 => false,
                    MAEN2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MAEN2R {
                match value {
                    false => MAEN2R::_0,
                    true => MAEN2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MAEN2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MAEN2R::_1
            }
        }
        #[doc = "Possible values of the field `MAEN1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MAEN1R {
            #[doc = "Normal operation."]
            _0,
            #[doc = "Enables automatic address matching or data matching mode for MATCH[MA1]."]
            _1,
        }
        impl MAEN1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MAEN1R::_0 => false,
                    MAEN1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MAEN1R {
                match value {
                    false => MAEN1R::_0,
                    true => MAEN1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MAEN1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MAEN1R::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _SBRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SBRW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 8191;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SBNS`"]
        pub enum SBNSW {
            #[doc = "One stop bit."]
            _0,
            #[doc = "Two stop bits."]
            _1,
        }
        impl SBNSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SBNSW::_0 => false,
                    SBNSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SBNSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SBNSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SBNSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "One stop bit."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SBNSW::_0)
            }
            #[doc = "Two stop bits."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SBNSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RXEDGIE`"]
        pub enum RXEDGIEW {
            #[doc = "Hardware interrupts from LPUART_STAT[RXEDGIF] disabled."]
            _0,
            #[doc = "Hardware interrupt requested when LPUART_STAT[RXEDGIF] flag is 1."]
            _1,
        }
        impl RXEDGIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RXEDGIEW::_0 => false,
                    RXEDGIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXEDGIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXEDGIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RXEDGIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Hardware interrupts from LPUART_STAT[RXEDGIF] disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RXEDGIEW::_0)
            }
            #[doc = "Hardware interrupt requested when LPUART_STAT[RXEDGIF] flag is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RXEDGIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LBKDIE`"]
        pub enum LBKDIEW {
            #[doc = "Hardware interrupts from LPUART_STAT[LBKDIF] disabled (use polling)."]
            _0,
            #[doc = "Hardware interrupt requested when LPUART_STAT[LBKDIF] flag is 1."]
            _1,
        }
        impl LBKDIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LBKDIEW::_0 => false,
                    LBKDIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LBKDIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LBKDIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LBKDIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Hardware interrupts from LPUART_STAT[LBKDIF] disabled (use polling)."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LBKDIEW::_0)
            }
            #[doc = "Hardware interrupt requested when LPUART_STAT[LBKDIF] flag is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LBKDIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RESYNCDIS`"]
        pub enum RESYNCDISW {
            #[doc = "Resynchronization during received data word is supported"]
            _0,
            #[doc = "Resynchronization during received data word is disabled"]
            _1,
        }
        impl RESYNCDISW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RESYNCDISW::_0 => false,
                    RESYNCDISW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RESYNCDISW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RESYNCDISW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RESYNCDISW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Resynchronization during received data word is supported"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RESYNCDISW::_0)
            }
            #[doc = "Resynchronization during received data word is disabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RESYNCDISW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BOTHEDGE`"]
        pub enum BOTHEDGEW {
            #[doc = "Receiver samples input data using the rising edge of the baud rate clock."]
            _0,
            #[doc = "Receiver samples input data using the rising and falling edge of the baud rate clock."]
            _1,
        }
        impl BOTHEDGEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    BOTHEDGEW::_0 => false,
                    BOTHEDGEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BOTHEDGEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BOTHEDGEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BOTHEDGEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Receiver samples input data using the rising edge of the baud rate clock."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BOTHEDGEW::_0)
            }
            #[doc = "Receiver samples input data using the rising and falling edge of the baud rate clock."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BOTHEDGEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MATCFG`"]
        pub enum MATCFGW {
            #[doc = "Address Match Wakeup"]
            _00,
            #[doc = "Idle Match Wakeup"]
            _01,
            #[doc = "Match On and Match Off"]
            _10,
        }
        impl MATCFGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MATCFGW::_00 => 0,
                    MATCFGW::_01 => 1,
                    MATCFGW::_10 => 2,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MATCFGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MATCFGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MATCFGW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Address Match Wakeup"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(MATCFGW::_00)
            }
            #[doc = "Idle Match Wakeup"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(MATCFGW::_01)
            }
            #[doc = "Match On and Match Off"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(MATCFGW::_10)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RIDMAE`"]
        pub enum RIDMAEW {
            #[doc = "DMA request disabled."]
            _0,
            #[doc = "DMA request enabled."]
            _1,
        }
        impl RIDMAEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RIDMAEW::_0 => false,
                    RIDMAEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RIDMAEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RIDMAEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RIDMAEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA request disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RIDMAEW::_0)
            }
            #[doc = "DMA request enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RIDMAEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RDMAE`"]
        pub enum RDMAEW {
            #[doc = "DMA request disabled."]
            _0,
            #[doc = "DMA request enabled."]
            _1,
        }
        impl RDMAEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RDMAEW::_0 => false,
                    RDMAEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RDMAEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RDMAEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RDMAEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA request disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RDMAEW::_0)
            }
            #[doc = "DMA request enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RDMAEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 21;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TDMAE`"]
        pub enum TDMAEW {
            #[doc = "DMA request disabled."]
            _0,
            #[doc = "DMA request enabled."]
            _1,
        }
        impl TDMAEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TDMAEW::_0 => false,
                    TDMAEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TDMAEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TDMAEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TDMAEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA request disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TDMAEW::_0)
            }
            #[doc = "DMA request enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TDMAEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 23;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `OSR`"]
        pub enum OSRW {
            #[doc = "Writing 0 to this field will result in an oversampling ratio of 16"]
            _00000,
            #[doc = "Oversampling ratio of 4, requires BOTHEDGE to be set."]
            _00011,
            #[doc = "Oversampling ratio of 5, requires BOTHEDGE to be set."]
            _00100,
            #[doc = "Oversampling ratio of 6, requires BOTHEDGE to be set."]
            _00101,
            #[doc = "Oversampling ratio of 7, requires BOTHEDGE to be set."]
            _00110,
            #[doc = "Oversampling ratio of 8."]
            _00111,
            #[doc = "Oversampling ratio of 9."]
            _01000,
            #[doc = "Oversampling ratio of 10."]
            _01001,
            #[doc = "Oversampling ratio of 11."]
            _01010,
            #[doc = "Oversampling ratio of 12."]
            _01011,
            #[doc = "Oversampling ratio of 13."]
            _01100,
            #[doc = "Oversampling ratio of 14."]
            _01101,
            #[doc = "Oversampling ratio of 15."]
            _01110,
            #[doc = "Oversampling ratio of 16."]
            _01111,
            #[doc = "Oversampling ratio of 17."]
            _10000,
            #[doc = "Oversampling ratio of 18."]
            _10001,
            #[doc = "Oversampling ratio of 19."]
            _10010,
            #[doc = "Oversampling ratio of 20."]
            _10011,
            #[doc = "Oversampling ratio of 21."]
            _10100,
            #[doc = "Oversampling ratio of 22."]
            _10101,
            #[doc = "Oversampling ratio of 23."]
            _10110,
            #[doc = "Oversampling ratio of 24."]
            _10111,
            #[doc = "Oversampling ratio of 25."]
            _11000,
            #[doc = "Oversampling ratio of 26."]
            _11001,
            #[doc = "Oversampling ratio of 27."]
            _11010,
            #[doc = "Oversampling ratio of 28."]
            _11011,
            #[doc = "Oversampling ratio of 29."]
            _11100,
            #[doc = "Oversampling ratio of 30."]
            _11101,
            #[doc = "Oversampling ratio of 31."]
            _11110,
            #[doc = "Oversampling ratio of 32."]
            _11111,
        }
        impl OSRW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    OSRW::_00000 => 0,
                    OSRW::_00011 => 3,
                    OSRW::_00100 => 4,
                    OSRW::_00101 => 5,
                    OSRW::_00110 => 6,
                    OSRW::_00111 => 7,
                    OSRW::_01000 => 8,
                    OSRW::_01001 => 9,
                    OSRW::_01010 => 10,
                    OSRW::_01011 => 11,
                    OSRW::_01100 => 12,
                    OSRW::_01101 => 13,
                    OSRW::_01110 => 14,
                    OSRW::_01111 => 15,
                    OSRW::_10000 => 16,
                    OSRW::_10001 => 17,
                    OSRW::_10010 => 18,
                    OSRW::_10011 => 19,
                    OSRW::_10100 => 20,
                    OSRW::_10101 => 21,
                    OSRW::_10110 => 22,
                    OSRW::_10111 => 23,
                    OSRW::_11000 => 24,
                    OSRW::_11001 => 25,
                    OSRW::_11010 => 26,
                    OSRW::_11011 => 27,
                    OSRW::_11100 => 28,
                    OSRW::_11101 => 29,
                    OSRW::_11110 => 30,
                    OSRW::_11111 => 31,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _OSRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _OSRW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: OSRW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Writing 0 to this field will result in an oversampling ratio of 16"]
            #[inline(always)]
            pub fn _00000(self) -> &'a mut W {
                self.variant(OSRW::_00000)
            }
            #[doc = "Oversampling ratio of 4, requires BOTHEDGE to be set."]
            #[inline(always)]
            pub fn _00011(self) -> &'a mut W {
                self.variant(OSRW::_00011)
            }
            #[doc = "Oversampling ratio of 5, requires BOTHEDGE to be set."]
            #[inline(always)]
            pub fn _00100(self) -> &'a mut W {
                self.variant(OSRW::_00100)
            }
            #[doc = "Oversampling ratio of 6, requires BOTHEDGE to be set."]
            #[inline(always)]
            pub fn _00101(self) -> &'a mut W {
                self.variant(OSRW::_00101)
            }
            #[doc = "Oversampling ratio of 7, requires BOTHEDGE to be set."]
            #[inline(always)]
            pub fn _00110(self) -> &'a mut W {
                self.variant(OSRW::_00110)
            }
            #[doc = "Oversampling ratio of 8."]
            #[inline(always)]
            pub fn _00111(self) -> &'a mut W {
                self.variant(OSRW::_00111)
            }
            #[doc = "Oversampling ratio of 9."]
            #[inline(always)]
            pub fn _01000(self) -> &'a mut W {
                self.variant(OSRW::_01000)
            }
            #[doc = "Oversampling ratio of 10."]
            #[inline(always)]
            pub fn _01001(self) -> &'a mut W {
                self.variant(OSRW::_01001)
            }
            #[doc = "Oversampling ratio of 11."]
            #[inline(always)]
            pub fn _01010(self) -> &'a mut W {
                self.variant(OSRW::_01010)
            }
            #[doc = "Oversampling ratio of 12."]
            #[inline(always)]
            pub fn _01011(self) -> &'a mut W {
                self.variant(OSRW::_01011)
            }
            #[doc = "Oversampling ratio of 13."]
            #[inline(always)]
            pub fn _01100(self) -> &'a mut W {
                self.variant(OSRW::_01100)
            }
            #[doc = "Oversampling ratio of 14."]
            #[inline(always)]
            pub fn _01101(self) -> &'a mut W {
                self.variant(OSRW::_01101)
            }
            #[doc = "Oversampling ratio of 15."]
            #[inline(always)]
            pub fn _01110(self) -> &'a mut W {
                self.variant(OSRW::_01110)
            }
            #[doc = "Oversampling ratio of 16."]
            #[inline(always)]
            pub fn _01111(self) -> &'a mut W {
                self.variant(OSRW::_01111)
            }
            #[doc = "Oversampling ratio of 17."]
            #[inline(always)]
            pub fn _10000(self) -> &'a mut W {
                self.variant(OSRW::_10000)
            }
            #[doc = "Oversampling ratio of 18."]
            #[inline(always)]
            pub fn _10001(self) -> &'a mut W {
                self.variant(OSRW::_10001)
            }
            #[doc = "Oversampling ratio of 19."]
            #[inline(always)]
            pub fn _10010(self) -> &'a mut W {
                self.variant(OSRW::_10010)
            }
            #[doc = "Oversampling ratio of 20."]
            #[inline(always)]
            pub fn _10011(self) -> &'a mut W {
                self.variant(OSRW::_10011)
            }
            #[doc = "Oversampling ratio of 21."]
            #[inline(always)]
            pub fn _10100(self) -> &'a mut W {
                self.variant(OSRW::_10100)
            }
            #[doc = "Oversampling ratio of 22."]
            #[inline(always)]
            pub fn _10101(self) -> &'a mut W {
                self.variant(OSRW::_10101)
            }
            #[doc = "Oversampling ratio of 23."]
            #[inline(always)]
            pub fn _10110(self) -> &'a mut W {
                self.variant(OSRW::_10110)
            }
            #[doc = "Oversampling ratio of 24."]
            #[inline(always)]
            pub fn _10111(self) -> &'a mut W {
                self.variant(OSRW::_10111)
            }
            #[doc = "Oversampling ratio of 25."]
            #[inline(always)]
            pub fn _11000(self) -> &'a mut W {
                self.variant(OSRW::_11000)
            }
            #[doc = "Oversampling ratio of 26."]
            #[inline(always)]
            pub fn _11001(self) -> &'a mut W {
                self.variant(OSRW::_11001)
            }
            #[doc = "Oversampling ratio of 27."]
            #[inline(always)]
            pub fn _11010(self) -> &'a mut W {
                self.variant(OSRW::_11010)
            }
            #[doc = "Oversampling ratio of 28."]
            #[inline(always)]
            pub fn _11011(self) -> &'a mut W {
                self.variant(OSRW::_11011)
            }
            #[doc = "Oversampling ratio of 29."]
            #[inline(always)]
            pub fn _11100(self) -> &'a mut W {
                self.variant(OSRW::_11100)
            }
            #[doc = "Oversampling ratio of 30."]
            #[inline(always)]
            pub fn _11101(self) -> &'a mut W {
                self.variant(OSRW::_11101)
            }
            #[doc = "Oversampling ratio of 31."]
            #[inline(always)]
            pub fn _11110(self) -> &'a mut W {
                self.variant(OSRW::_11110)
            }
            #[doc = "Oversampling ratio of 32."]
            #[inline(always)]
            pub fn _11111(self) -> &'a mut W {
                self.variant(OSRW::_11111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `M10`"]
        pub enum M10W {
            #[doc = "Receiver and transmitter use 7-bit to 9-bit data characters."]
            _0,
            #[doc = "Receiver and transmitter use 10-bit data characters."]
            _1,
        }
        impl M10W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    M10W::_0 => false,
                    M10W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _M10W<'a> {
            w: &'a mut W,
        }
        impl<'a> _M10W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: M10W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Receiver and transmitter use 7-bit to 9-bit data characters."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(M10W::_0)
            }
            #[doc = "Receiver and transmitter use 10-bit data characters."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(M10W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 29;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MAEN2`"]
        pub enum MAEN2W {
            #[doc = "Normal operation."]
            _0,
            #[doc = "Enables automatic address matching or data matching mode for MATCH[MA2]."]
            _1,
        }
        impl MAEN2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MAEN2W::_0 => false,
                    MAEN2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MAEN2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MAEN2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MAEN2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Normal operation."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MAEN2W::_0)
            }
            #[doc = "Enables automatic address matching or data matching mode for MATCH[MA2]."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MAEN2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MAEN1`"]
        pub enum MAEN1W {
            #[doc = "Normal operation."]
            _0,
            #[doc = "Enables automatic address matching or data matching mode for MATCH[MA1]."]
            _1,
        }
        impl MAEN1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MAEN1W::_0 => false,
                    MAEN1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MAEN1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MAEN1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MAEN1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Normal operation."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MAEN1W::_0)
            }
            #[doc = "Enables automatic address matching or data matching mode for MATCH[MA1]."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MAEN1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:12 - Baud Rate Modulo Divisor."]
            #[inline(always)]
            pub fn sbr(&self) -> SBRR {
                let bits = {
                    const MASK: u16 = 8191;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                SBRR { bits }
            }
            #[doc = "Bit 13 - Stop Bit Number Select"]
            #[inline(always)]
            pub fn sbns(&self) -> SBNSR {
                SBNSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - RX Input Active Edge Interrupt Enable"]
            #[inline(always)]
            pub fn rxedgie(&self) -> RXEDGIER {
                RXEDGIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - LIN Break Detect Interrupt Enable"]
            #[inline(always)]
            pub fn lbkdie(&self) -> LBKDIER {
                LBKDIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 16 - Resynchronization Disable"]
            #[inline(always)]
            pub fn resyncdis(&self) -> RESYNCDISR {
                RESYNCDISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - Both Edge Sampling"]
            #[inline(always)]
            pub fn bothedge(&self) -> BOTHEDGER {
                BOTHEDGER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 18:19 - Match Configuration"]
            #[inline(always)]
            pub fn matcfg(&self) -> MATCFGR {
                MATCFGR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 20 - Receiver Idle DMA Enable"]
            #[inline(always)]
            pub fn ridmae(&self) -> RIDMAER {
                RIDMAER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - Receiver Full DMA Enable"]
            #[inline(always)]
            pub fn rdmae(&self) -> RDMAER {
                RDMAER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 23 - Transmitter DMA Enable"]
            #[inline(always)]
            pub fn tdmae(&self) -> TDMAER {
                TDMAER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 24:28 - Oversampling Ratio"]
            #[inline(always)]
            pub fn osr(&self) -> OSRR {
                OSRR::_from({
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 29 - 10-bit Mode select"]
            #[inline(always)]
            pub fn m10(&self) -> M10R {
                M10R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 29;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 30 - Match Address Mode Enable 2"]
            #[inline(always)]
            pub fn maen2(&self) -> MAEN2R {
                MAEN2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Match Address Mode Enable 1"]
            #[inline(always)]
            pub fn maen1(&self) -> MAEN1R {
                MAEN1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 251658244 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:12 - Baud Rate Modulo Divisor."]
            #[inline(always)]
            pub fn sbr(&mut self) -> _SBRW {
                _SBRW { w: self }
            }
            #[doc = "Bit 13 - Stop Bit Number Select"]
            #[inline(always)]
            pub fn sbns(&mut self) -> _SBNSW {
                _SBNSW { w: self }
            }
            #[doc = "Bit 14 - RX Input Active Edge Interrupt Enable"]
            #[inline(always)]
            pub fn rxedgie(&mut self) -> _RXEDGIEW {
                _RXEDGIEW { w: self }
            }
            #[doc = "Bit 15 - LIN Break Detect Interrupt Enable"]
            #[inline(always)]
            pub fn lbkdie(&mut self) -> _LBKDIEW {
                _LBKDIEW { w: self }
            }
            #[doc = "Bit 16 - Resynchronization Disable"]
            #[inline(always)]
            pub fn resyncdis(&mut self) -> _RESYNCDISW {
                _RESYNCDISW { w: self }
            }
            #[doc = "Bit 17 - Both Edge Sampling"]
            #[inline(always)]
            pub fn bothedge(&mut self) -> _BOTHEDGEW {
                _BOTHEDGEW { w: self }
            }
            #[doc = "Bits 18:19 - Match Configuration"]
            #[inline(always)]
            pub fn matcfg(&mut self) -> _MATCFGW {
                _MATCFGW { w: self }
            }
            #[doc = "Bit 20 - Receiver Idle DMA Enable"]
            #[inline(always)]
            pub fn ridmae(&mut self) -> _RIDMAEW {
                _RIDMAEW { w: self }
            }
            #[doc = "Bit 21 - Receiver Full DMA Enable"]
            #[inline(always)]
            pub fn rdmae(&mut self) -> _RDMAEW {
                _RDMAEW { w: self }
            }
            #[doc = "Bit 23 - Transmitter DMA Enable"]
            #[inline(always)]
            pub fn tdmae(&mut self) -> _TDMAEW {
                _TDMAEW { w: self }
            }
            #[doc = "Bits 24:28 - Oversampling Ratio"]
            #[inline(always)]
            pub fn osr(&mut self) -> _OSRW {
                _OSRW { w: self }
            }
            #[doc = "Bit 29 - 10-bit Mode select"]
            #[inline(always)]
            pub fn m10(&mut self) -> _M10W {
                _M10W { w: self }
            }
            #[doc = "Bit 30 - Match Address Mode Enable 2"]
            #[inline(always)]
            pub fn maen2(&mut self) -> _MAEN2W {
                _MAEN2W { w: self }
            }
            #[doc = "Bit 31 - Match Address Mode Enable 1"]
            #[inline(always)]
            pub fn maen1(&mut self) -> _MAEN1W {
                _MAEN1W { w: self }
            }
        }
    }
    #[doc = "LPUART Status Register"]
    pub struct STAT {
        register: VolatileCell<u32>,
    }
    #[doc = "LPUART Status Register"]
    pub mod stat {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::STAT {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `MA2F`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MA2FR {
            #[doc = "Received data is not equal to MA2"]
            _0,
            #[doc = "Received data is equal to MA2"]
            _1,
        }
        impl MA2FR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MA2FR::_0 => false,
                    MA2FR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MA2FR {
                match value {
                    false => MA2FR::_0,
                    true => MA2FR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MA2FR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MA2FR::_1
            }
        }
        #[doc = "Possible values of the field `MA1F`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MA1FR {
            #[doc = "Received data is not equal to MA1"]
            _0,
            #[doc = "Received data is equal to MA1"]
            _1,
        }
        impl MA1FR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MA1FR::_0 => false,
                    MA1FR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MA1FR {
                match value {
                    false => MA1FR::_0,
                    true => MA1FR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MA1FR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MA1FR::_1
            }
        }
        #[doc = "Possible values of the field `PF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PFR {
            #[doc = "No parity error."]
            _0,
            #[doc = "Parity error."]
            _1,
        }
        impl PFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PFR::_0 => false,
                    PFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PFR {
                match value {
                    false => PFR::_0,
                    true => PFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PFR::_1
            }
        }
        #[doc = "Possible values of the field `FE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FER {
            #[doc = "No framing error detected. This does not guarantee the framing is correct."]
            _0,
            #[doc = "Framing error."]
            _1,
        }
        impl FER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FER::_0 => false,
                    FER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FER {
                match value {
                    false => FER::_0,
                    true => FER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FER::_1
            }
        }
        #[doc = "Possible values of the field `NF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum NFR {
            #[doc = "No noise detected."]
            _0,
            #[doc = "Noise detected in the received character in LPUART_DATA."]
            _1,
        }
        impl NFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    NFR::_0 => false,
                    NFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> NFR {
                match value {
                    false => NFR::_0,
                    true => NFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == NFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == NFR::_1
            }
        }
        #[doc = "Possible values of the field `OR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ORR {
            #[doc = "No overrun."]
            _0,
            #[doc = "Receive overrun (new LPUART data lost)."]
            _1,
        }
        impl ORR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ORR::_0 => false,
                    ORR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ORR {
                match value {
                    false => ORR::_0,
                    true => ORR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ORR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ORR::_1
            }
        }
        #[doc = "Possible values of the field `IDLE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IDLER {
            #[doc = "No idle line detected."]
            _0,
            #[doc = "Idle line was detected."]
            _1,
        }
        impl IDLER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    IDLER::_0 => false,
                    IDLER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> IDLER {
                match value {
                    false => IDLER::_0,
                    true => IDLER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == IDLER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == IDLER::_1
            }
        }
        #[doc = "Possible values of the field `RDRF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RDRFR {
            #[doc = "Receive data buffer empty."]
            _0,
            #[doc = "Receive data buffer full."]
            _1,
        }
        impl RDRFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RDRFR::_0 => false,
                    RDRFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RDRFR {
                match value {
                    false => RDRFR::_0,
                    true => RDRFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RDRFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RDRFR::_1
            }
        }
        #[doc = "Possible values of the field `TC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TCR {
            #[doc = "Transmitter active (sending data, a preamble, or a break)."]
            _0,
            #[doc = "Transmitter idle (transmission activity complete)."]
            _1,
        }
        impl TCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TCR::_0 => false,
                    TCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TCR {
                match value {
                    false => TCR::_0,
                    true => TCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TCR::_1
            }
        }
        #[doc = "Possible values of the field `TDRE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TDRER {
            #[doc = "Transmit data buffer full."]
            _0,
            #[doc = "Transmit data buffer empty."]
            _1,
        }
        impl TDRER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TDRER::_0 => false,
                    TDRER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TDRER {
                match value {
                    false => TDRER::_0,
                    true => TDRER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TDRER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TDRER::_1
            }
        }
        #[doc = "Possible values of the field `RAF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RAFR {
            #[doc = "LPUART receiver idle waiting for a start bit."]
            _0,
            #[doc = "LPUART receiver active (RXD input not idle)."]
            _1,
        }
        impl RAFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RAFR::_0 => false,
                    RAFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RAFR {
                match value {
                    false => RAFR::_0,
                    true => RAFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RAFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RAFR::_1
            }
        }
        #[doc = "Possible values of the field `LBKDE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LBKDER {
            #[doc = "LIN break detect is disabled, normal break character can be detected."]
            _0,
            #[doc = "LIN break detect is enabled. LIN break character is detected at length of 11 bit times (if M = 0) or 12 (if M = 1) or 13 (M10 = 1)."]
            _1,
        }
        impl LBKDER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LBKDER::_0 => false,
                    LBKDER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LBKDER {
                match value {
                    false => LBKDER::_0,
                    true => LBKDER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LBKDER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LBKDER::_1
            }
        }
        #[doc = "Possible values of the field `BRK13`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BRK13R {
            #[doc = "Break character is transmitted with length of 9 to 13 bit times."]
            _0,
            #[doc = "Break character is transmitted with length of 12 to 15 bit times."]
            _1,
        }
        impl BRK13R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BRK13R::_0 => false,
                    BRK13R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BRK13R {
                match value {
                    false => BRK13R::_0,
                    true => BRK13R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BRK13R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BRK13R::_1
            }
        }
        #[doc = "Possible values of the field `RWUID`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RWUIDR {
            #[doc = "During receive standby state (RWU = 1), the IDLE bit does not get set upon detection of an idle character. During address match wakeup, the IDLE bit does not set when an address does not match."]
            _0,
            #[doc = "During receive standby state (RWU = 1), the IDLE bit gets set upon detection of an idle character. During address match wakeup, the IDLE bit does set when an address does not match."]
            _1,
        }
        impl RWUIDR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RWUIDR::_0 => false,
                    RWUIDR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RWUIDR {
                match value {
                    false => RWUIDR::_0,
                    true => RWUIDR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RWUIDR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RWUIDR::_1
            }
        }
        #[doc = "Possible values of the field `RXINV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXINVR {
            #[doc = "Receive data not inverted."]
            _0,
            #[doc = "Receive data inverted."]
            _1,
        }
        impl RXINVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXINVR::_0 => false,
                    RXINVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXINVR {
                match value {
                    false => RXINVR::_0,
                    true => RXINVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXINVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RXINVR::_1
            }
        }
        #[doc = "Possible values of the field `MSBF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MSBFR {
            #[doc = "LSB (bit0) is the first bit that is transmitted following the start bit. Further, the first bit received after the start bit is identified as bit0."]
            _0,
            #[doc = "MSB (bit9, bit8, bit7 or bit6) is the first bit that is transmitted following the start bit depending on the setting of CTRL[M], CTRL[PE] and BAUD[M10]. Further, the first bit received after the start bit is identified as bit9, bit8, bit7 or bit6 depending on the setting of CTRL[M] and CTRL[PE]."]
            _1,
        }
        impl MSBFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MSBFR::_0 => false,
                    MSBFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MSBFR {
                match value {
                    false => MSBFR::_0,
                    true => MSBFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MSBFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MSBFR::_1
            }
        }
        #[doc = "Possible values of the field `RXEDGIF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXEDGIFR {
            #[doc = "No active edge on the receive pin has occurred."]
            _0,
            #[doc = "An active edge on the receive pin has occurred."]
            _1,
        }
        impl RXEDGIFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXEDGIFR::_0 => false,
                    RXEDGIFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXEDGIFR {
                match value {
                    false => RXEDGIFR::_0,
                    true => RXEDGIFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXEDGIFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RXEDGIFR::_1
            }
        }
        #[doc = "Possible values of the field `LBKDIF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LBKDIFR {
            #[doc = "No LIN break character has been detected."]
            _0,
            #[doc = "LIN break character has been detected."]
            _1,
        }
        impl LBKDIFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LBKDIFR::_0 => false,
                    LBKDIFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LBKDIFR {
                match value {
                    false => LBKDIFR::_0,
                    true => LBKDIFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LBKDIFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LBKDIFR::_1
            }
        }
        #[doc = "Values that can be written to the field `MA2F`"]
        pub enum MA2FW {
            #[doc = "Received data is not equal to MA2"]
            _0,
            #[doc = "Received data is equal to MA2"]
            _1,
        }
        impl MA2FW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MA2FW::_0 => false,
                    MA2FW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MA2FW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MA2FW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MA2FW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Received data is not equal to MA2"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MA2FW::_0)
            }
            #[doc = "Received data is equal to MA2"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MA2FW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MA1F`"]
        pub enum MA1FW {
            #[doc = "Received data is not equal to MA1"]
            _0,
            #[doc = "Received data is equal to MA1"]
            _1,
        }
        impl MA1FW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MA1FW::_0 => false,
                    MA1FW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MA1FW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MA1FW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MA1FW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Received data is not equal to MA1"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MA1FW::_0)
            }
            #[doc = "Received data is equal to MA1"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MA1FW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PF`"]
        pub enum PFW {
            #[doc = "No parity error."]
            _0,
            #[doc = "Parity error."]
            _1,
        }
        impl PFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PFW::_0 => false,
                    PFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No parity error."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PFW::_0)
            }
            #[doc = "Parity error."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FE`"]
        pub enum FEW {
            #[doc = "No framing error detected. This does not guarantee the framing is correct."]
            _0,
            #[doc = "Framing error."]
            _1,
        }
        impl FEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FEW::_0 => false,
                    FEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No framing error detected. This does not guarantee the framing is correct."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FEW::_0)
            }
            #[doc = "Framing error."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `NF`"]
        pub enum NFW {
            #[doc = "No noise detected."]
            _0,
            #[doc = "Noise detected in the received character in LPUART_DATA."]
            _1,
        }
        impl NFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    NFW::_0 => false,
                    NFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _NFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: NFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No noise detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(NFW::_0)
            }
            #[doc = "Noise detected in the received character in LPUART_DATA."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(NFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `OR`"]
        pub enum ORW {
            #[doc = "No overrun."]
            _0,
            #[doc = "Receive overrun (new LPUART data lost)."]
            _1,
        }
        impl ORW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ORW::_0 => false,
                    ORW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ORW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ORW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ORW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No overrun."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ORW::_0)
            }
            #[doc = "Receive overrun (new LPUART data lost)."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ORW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 19;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IDLE`"]
        pub enum IDLEW {
            #[doc = "No idle line detected."]
            _0,
            #[doc = "Idle line was detected."]
            _1,
        }
        impl IDLEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    IDLEW::_0 => false,
                    IDLEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IDLEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IDLEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IDLEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No idle line detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(IDLEW::_0)
            }
            #[doc = "Idle line was detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(IDLEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LBKDE`"]
        pub enum LBKDEW {
            #[doc = "LIN break detect is disabled, normal break character can be detected."]
            _0,
            #[doc = "LIN break detect is enabled. LIN break character is detected at length of 11 bit times (if M = 0) or 12 (if M = 1) or 13 (M10 = 1)."]
            _1,
        }
        impl LBKDEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LBKDEW::_0 => false,
                    LBKDEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LBKDEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LBKDEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LBKDEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "LIN break detect is disabled, normal break character can be detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LBKDEW::_0)
            }
            #[doc = "LIN break detect is enabled. LIN break character is detected at length of 11 bit times (if M = 0) or 12 (if M = 1) or 13 (M10 = 1)."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LBKDEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 25;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BRK13`"]
        pub enum BRK13W {
            #[doc = "Break character is transmitted with length of 9 to 13 bit times."]
            _0,
            #[doc = "Break character is transmitted with length of 12 to 15 bit times."]
            _1,
        }
        impl BRK13W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    BRK13W::_0 => false,
                    BRK13W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BRK13W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BRK13W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BRK13W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Break character is transmitted with length of 9 to 13 bit times."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BRK13W::_0)
            }
            #[doc = "Break character is transmitted with length of 12 to 15 bit times."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BRK13W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 26;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RWUID`"]
        pub enum RWUIDW {
            #[doc = "During receive standby state (RWU = 1), the IDLE bit does not get set upon detection of an idle character. During address match wakeup, the IDLE bit does not set when an address does not match."]
            _0,
            #[doc = "During receive standby state (RWU = 1), the IDLE bit gets set upon detection of an idle character. During address match wakeup, the IDLE bit does set when an address does not match."]
            _1,
        }
        impl RWUIDW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RWUIDW::_0 => false,
                    RWUIDW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RWUIDW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RWUIDW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RWUIDW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "During receive standby state (RWU = 1), the IDLE bit does not get set upon detection of an idle character. During address match wakeup, the IDLE bit does not set when an address does not match."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RWUIDW::_0)
            }
            #[doc = "During receive standby state (RWU = 1), the IDLE bit gets set upon detection of an idle character. During address match wakeup, the IDLE bit does set when an address does not match."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RWUIDW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 27;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RXINV`"]
        pub enum RXINVW {
            #[doc = "Receive data not inverted."]
            _0,
            #[doc = "Receive data inverted."]
            _1,
        }
        impl RXINVW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RXINVW::_0 => false,
                    RXINVW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXINVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXINVW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RXINVW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Receive data not inverted."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RXINVW::_0)
            }
            #[doc = "Receive data inverted."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RXINVW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 28;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MSBF`"]
        pub enum MSBFW {
            #[doc = "LSB (bit0) is the first bit that is transmitted following the start bit. Further, the first bit received after the start bit is identified as bit0."]
            _0,
            #[doc = "MSB (bit9, bit8, bit7 or bit6) is the first bit that is transmitted following the start bit depending on the setting of CTRL[M], CTRL[PE] and BAUD[M10]. Further, the first bit received after the start bit is identified as bit9, bit8, bit7 or bit6 depending on the setting of CTRL[M] and CTRL[PE]."]
            _1,
        }
        impl MSBFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MSBFW::_0 => false,
                    MSBFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSBFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSBFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MSBFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "LSB (bit0) is the first bit that is transmitted following the start bit. Further, the first bit received after the start bit is identified as bit0."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MSBFW::_0)
            }
            #[doc = "MSB (bit9, bit8, bit7 or bit6) is the first bit that is transmitted following the start bit depending on the setting of CTRL[M], CTRL[PE] and BAUD[M10]. Further, the first bit received after the start bit is identified as bit9, bit8, bit7 or bit6 depending on the setting of CTRL[M] and CTRL[PE]."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MSBFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 29;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RXEDGIF`"]
        pub enum RXEDGIFW {
            #[doc = "No active edge on the receive pin has occurred."]
            _0,
            #[doc = "An active edge on the receive pin has occurred."]
            _1,
        }
        impl RXEDGIFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RXEDGIFW::_0 => false,
                    RXEDGIFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXEDGIFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXEDGIFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RXEDGIFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No active edge on the receive pin has occurred."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RXEDGIFW::_0)
            }
            #[doc = "An active edge on the receive pin has occurred."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RXEDGIFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LBKDIF`"]
        pub enum LBKDIFW {
            #[doc = "No LIN break character has been detected."]
            _0,
            #[doc = "LIN break character has been detected."]
            _1,
        }
        impl LBKDIFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LBKDIFW::_0 => false,
                    LBKDIFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LBKDIFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LBKDIFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LBKDIFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No LIN break character has been detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LBKDIFW::_0)
            }
            #[doc = "LIN break character has been detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LBKDIFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 14 - Match 2 Flag"]
            #[inline(always)]
            pub fn ma2f(&self) -> MA2FR {
                MA2FR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - Match 1 Flag"]
            #[inline(always)]
            pub fn ma1f(&self) -> MA1FR {
                MA1FR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 16 - Parity Error Flag"]
            #[inline(always)]
            pub fn pf(&self) -> PFR {
                PFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - Framing Error Flag"]
            #[inline(always)]
            pub fn fe(&self) -> FER {
                FER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 18 - Noise Flag"]
            #[inline(always)]
            pub fn nf(&self) -> NFR {
                NFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 19 - Receiver Overrun Flag"]
            #[inline(always)]
            pub fn or(&self) -> ORR {
                ORR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 19;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 20 - Idle Line Flag"]
            #[inline(always)]
            pub fn idle(&self) -> IDLER {
                IDLER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - Receive Data Register Full Flag"]
            #[inline(always)]
            pub fn rdrf(&self) -> RDRFR {
                RDRFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 22 - Transmission Complete Flag"]
            #[inline(always)]
            pub fn tc(&self) -> TCR {
                TCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 23 - Transmit Data Register Empty Flag"]
            #[inline(always)]
            pub fn tdre(&self) -> TDRER {
                TDRER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 24 - Receiver Active Flag"]
            #[inline(always)]
            pub fn raf(&self) -> RAFR {
                RAFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 25 - LIN Break Detection Enable"]
            #[inline(always)]
            pub fn lbkde(&self) -> LBKDER {
                LBKDER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 25;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 26 - Break Character Generation Length"]
            #[inline(always)]
            pub fn brk13(&self) -> BRK13R {
                BRK13R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 26;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 27 - Receive Wake Up Idle Detect"]
            #[inline(always)]
            pub fn rwuid(&self) -> RWUIDR {
                RWUIDR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 27;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 28 - Receive Data Inversion"]
            #[inline(always)]
            pub fn rxinv(&self) -> RXINVR {
                RXINVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 28;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 29 - MSB First"]
            #[inline(always)]
            pub fn msbf(&self) -> MSBFR {
                MSBFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 29;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 30 - RXD Pin Active Edge Interrupt Flag"]
            #[inline(always)]
            pub fn rxedgif(&self) -> RXEDGIFR {
                RXEDGIFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - LIN Break Detect Interrupt Flag"]
            #[inline(always)]
            pub fn lbkdif(&self) -> LBKDIFR {
                LBKDIFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 12582912 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 14 - Match 2 Flag"]
            #[inline(always)]
            pub fn ma2f(&mut self) -> _MA2FW {
                _MA2FW { w: self }
            }
            #[doc = "Bit 15 - Match 1 Flag"]
            #[inline(always)]
            pub fn ma1f(&mut self) -> _MA1FW {
                _MA1FW { w: self }
            }
            #[doc = "Bit 16 - Parity Error Flag"]
            #[inline(always)]
            pub fn pf(&mut self) -> _PFW {
                _PFW { w: self }
            }
            #[doc = "Bit 17 - Framing Error Flag"]
            #[inline(always)]
            pub fn fe(&mut self) -> _FEW {
                _FEW { w: self }
            }
            #[doc = "Bit 18 - Noise Flag"]
            #[inline(always)]
            pub fn nf(&mut self) -> _NFW {
                _NFW { w: self }
            }
            #[doc = "Bit 19 - Receiver Overrun Flag"]
            #[inline(always)]
            pub fn or(&mut self) -> _ORW {
                _ORW { w: self }
            }
            #[doc = "Bit 20 - Idle Line Flag"]
            #[inline(always)]
            pub fn idle(&mut self) -> _IDLEW {
                _IDLEW { w: self }
            }
            #[doc = "Bit 25 - LIN Break Detection Enable"]
            #[inline(always)]
            pub fn lbkde(&mut self) -> _LBKDEW {
                _LBKDEW { w: self }
            }
            #[doc = "Bit 26 - Break Character Generation Length"]
            #[inline(always)]
            pub fn brk13(&mut self) -> _BRK13W {
                _BRK13W { w: self }
            }
            #[doc = "Bit 27 - Receive Wake Up Idle Detect"]
            #[inline(always)]
            pub fn rwuid(&mut self) -> _RWUIDW {
                _RWUIDW { w: self }
            }
            #[doc = "Bit 28 - Receive Data Inversion"]
            #[inline(always)]
            pub fn rxinv(&mut self) -> _RXINVW {
                _RXINVW { w: self }
            }
            #[doc = "Bit 29 - MSB First"]
            #[inline(always)]
            pub fn msbf(&mut self) -> _MSBFW {
                _MSBFW { w: self }
            }
            #[doc = "Bit 30 - RXD Pin Active Edge Interrupt Flag"]
            #[inline(always)]
            pub fn rxedgif(&mut self) -> _RXEDGIFW {
                _RXEDGIFW { w: self }
            }
            #[doc = "Bit 31 - LIN Break Detect Interrupt Flag"]
            #[inline(always)]
            pub fn lbkdif(&mut self) -> _LBKDIFW {
                _LBKDIFW { w: self }
            }
        }
    }
    #[doc = "LPUART Control Register"]
    pub struct CTRL {
        register: VolatileCell<u32>,
    }
    #[doc = "LPUART Control Register"]
    pub mod ctrl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CTRL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PTR {
            #[doc = "Even parity."]
            _0,
            #[doc = "Odd parity."]
            _1,
        }
        impl PTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PTR::_0 => false,
                    PTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PTR {
                match value {
                    false => PTR::_0,
                    true => PTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PTR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "No hardware parity generation or checking."]
            _0,
            #[doc = "Parity enabled."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `ILT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ILTR {
            #[doc = "Idle character bit count starts after start bit."]
            _0,
            #[doc = "Idle character bit count starts after stop bit."]
            _1,
        }
        impl ILTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ILTR::_0 => false,
                    ILTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ILTR {
                match value {
                    false => ILTR::_0,
                    true => ILTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ILTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ILTR::_1
            }
        }
        #[doc = "Possible values of the field `WAKE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WAKER {
            #[doc = "Configures RWU for idle-line wakeup."]
            _0,
            #[doc = "Configures RWU with address-mark wakeup."]
            _1,
        }
        impl WAKER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WAKER::_0 => false,
                    WAKER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WAKER {
                match value {
                    false => WAKER::_0,
                    true => WAKER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WAKER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WAKER::_1
            }
        }
        #[doc = "Possible values of the field `M`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MR {
            #[doc = "Receiver and transmitter use 8-bit data characters."]
            _0,
            #[doc = "Receiver and transmitter use 9-bit data characters."]
            _1,
        }
        impl MR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MR::_0 => false,
                    MR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MR {
                match value {
                    false => MR::_0,
                    true => MR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MR::_1
            }
        }
        #[doc = "Possible values of the field `RSRC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RSRCR {
            #[doc = "Provided LOOPS is set, RSRC is cleared, selects internal loop back mode and the LPUART does not use the RXD pin."]
            _0,
            #[doc = "Single-wire LPUART mode where the TXD pin is connected to the transmitter output and receiver input."]
            _1,
        }
        impl RSRCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RSRCR::_0 => false,
                    RSRCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RSRCR {
                match value {
                    false => RSRCR::_0,
                    true => RSRCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RSRCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RSRCR::_1
            }
        }
        #[doc = "Possible values of the field `DOZEEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DOZEENR {
            #[doc = "LPUART is enabled in Doze mode."]
            _0,
            #[doc = "LPUART is disabled in Doze mode."]
            _1,
        }
        impl DOZEENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DOZEENR::_0 => false,
                    DOZEENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DOZEENR {
                match value {
                    false => DOZEENR::_0,
                    true => DOZEENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DOZEENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DOZEENR::_1
            }
        }
        #[doc = "Possible values of the field `LOOPS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LOOPSR {
            #[doc = "Normal operation - RXD and TXD use separate pins."]
            _0,
            #[doc = "Loop mode or single-wire mode where transmitter outputs are internally connected to receiver input (see RSRC bit)."]
            _1,
        }
        impl LOOPSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LOOPSR::_0 => false,
                    LOOPSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LOOPSR {
                match value {
                    false => LOOPSR::_0,
                    true => LOOPSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LOOPSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LOOPSR::_1
            }
        }
        #[doc = "Possible values of the field `IDLECFG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IDLECFGR {
            #[doc = "1 idle character"]
            _000,
            #[doc = "2 idle characters"]
            _001,
            #[doc = "4 idle characters"]
            _010,
            #[doc = "8 idle characters"]
            _011,
            #[doc = "16 idle characters"]
            _100,
            #[doc = "32 idle characters"]
            _101,
            #[doc = "64 idle characters"]
            _110,
            #[doc = "128 idle characters"]
            _111,
        }
        impl IDLECFGR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IDLECFGR::_000 => 0,
                    IDLECFGR::_001 => 1,
                    IDLECFGR::_010 => 2,
                    IDLECFGR::_011 => 3,
                    IDLECFGR::_100 => 4,
                    IDLECFGR::_101 => 5,
                    IDLECFGR::_110 => 6,
                    IDLECFGR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IDLECFGR {
                match value {
                    0 => IDLECFGR::_000,
                    1 => IDLECFGR::_001,
                    2 => IDLECFGR::_010,
                    3 => IDLECFGR::_011,
                    4 => IDLECFGR::_100,
                    5 => IDLECFGR::_101,
                    6 => IDLECFGR::_110,
                    7 => IDLECFGR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == IDLECFGR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == IDLECFGR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == IDLECFGR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == IDLECFGR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == IDLECFGR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == IDLECFGR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == IDLECFGR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == IDLECFGR::_111
            }
        }
        #[doc = "Possible values of the field `M7`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum M7R {
            #[doc = "Receiver and transmitter use 8-bit to 10-bit data characters."]
            _0,
            #[doc = "Receiver and transmitter use 7-bit data characters."]
            _1,
        }
        impl M7R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    M7R::_0 => false,
                    M7R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> M7R {
                match value {
                    false => M7R::_0,
                    true => M7R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == M7R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == M7R::_1
            }
        }
        #[doc = "Possible values of the field `MA2IE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MA2IER {
            #[doc = "MA2F interrupt disabled"]
            _0,
            #[doc = "MA2F interrupt enabled"]
            _1,
        }
        impl MA2IER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MA2IER::_0 => false,
                    MA2IER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MA2IER {
                match value {
                    false => MA2IER::_0,
                    true => MA2IER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MA2IER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MA2IER::_1
            }
        }
        #[doc = "Possible values of the field `MA1IE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MA1IER {
            #[doc = "MA1F interrupt disabled"]
            _0,
            #[doc = "MA1F interrupt enabled"]
            _1,
        }
        impl MA1IER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MA1IER::_0 => false,
                    MA1IER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MA1IER {
                match value {
                    false => MA1IER::_0,
                    true => MA1IER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MA1IER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MA1IER::_1
            }
        }
        #[doc = "Possible values of the field `SBK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SBKR {
            #[doc = "Normal transmitter operation."]
            _0,
            #[doc = "Queue break character(s) to be sent."]
            _1,
        }
        impl SBKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SBKR::_0 => false,
                    SBKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SBKR {
                match value {
                    false => SBKR::_0,
                    true => SBKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SBKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SBKR::_1
            }
        }
        #[doc = "Possible values of the field `RWU`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RWUR {
            #[doc = "Normal receiver operation."]
            _0,
            #[doc = "LPUART receiver in standby waiting for wakeup condition."]
            _1,
        }
        impl RWUR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RWUR::_0 => false,
                    RWUR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RWUR {
                match value {
                    false => RWUR::_0,
                    true => RWUR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RWUR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RWUR::_1
            }
        }
        #[doc = "Possible values of the field `RE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RER {
            #[doc = "Receiver disabled."]
            _0,
            #[doc = "Receiver enabled."]
            _1,
        }
        impl RER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RER::_0 => false,
                    RER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RER {
                match value {
                    false => RER::_0,
                    true => RER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RER::_1
            }
        }
        #[doc = "Possible values of the field `TE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TER {
            #[doc = "Transmitter disabled."]
            _0,
            #[doc = "Transmitter enabled."]
            _1,
        }
        impl TER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TER::_0 => false,
                    TER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TER {
                match value {
                    false => TER::_0,
                    true => TER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TER::_1
            }
        }
        #[doc = "Possible values of the field `ILIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ILIER {
            #[doc = "Hardware interrupts from IDLE disabled; use polling."]
            _0,
            #[doc = "Hardware interrupt requested when IDLE flag is 1."]
            _1,
        }
        impl ILIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ILIER::_0 => false,
                    ILIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ILIER {
                match value {
                    false => ILIER::_0,
                    true => ILIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ILIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ILIER::_1
            }
        }
        #[doc = "Possible values of the field `RIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RIER {
            #[doc = "Hardware interrupts from RDRF disabled; use polling."]
            _0,
            #[doc = "Hardware interrupt requested when RDRF flag is 1."]
            _1,
        }
        impl RIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RIER::_0 => false,
                    RIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RIER {
                match value {
                    false => RIER::_0,
                    true => RIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RIER::_1
            }
        }
        #[doc = "Possible values of the field `TCIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TCIER {
            #[doc = "Hardware interrupts from TC disabled; use polling."]
            _0,
            #[doc = "Hardware interrupt requested when TC flag is 1."]
            _1,
        }
        impl TCIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TCIER::_0 => false,
                    TCIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TCIER {
                match value {
                    false => TCIER::_0,
                    true => TCIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TCIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TCIER::_1
            }
        }
        #[doc = "Possible values of the field `TIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIER {
            #[doc = "Hardware interrupts from TDRE disabled; use polling."]
            _0,
            #[doc = "Hardware interrupt requested when TDRE flag is 1."]
            _1,
        }
        impl TIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TIER::_0 => false,
                    TIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TIER {
                match value {
                    false => TIER::_0,
                    true => TIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TIER::_1
            }
        }
        #[doc = "Possible values of the field `PEIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PEIER {
            #[doc = "PF interrupts disabled; use polling)."]
            _0,
            #[doc = "Hardware interrupt requested when PF is set."]
            _1,
        }
        impl PEIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PEIER::_0 => false,
                    PEIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PEIER {
                match value {
                    false => PEIER::_0,
                    true => PEIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PEIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PEIER::_1
            }
        }
        #[doc = "Possible values of the field `FEIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FEIER {
            #[doc = "FE interrupts disabled; use polling."]
            _0,
            #[doc = "Hardware interrupt requested when FE is set."]
            _1,
        }
        impl FEIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FEIER::_0 => false,
                    FEIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FEIER {
                match value {
                    false => FEIER::_0,
                    true => FEIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FEIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FEIER::_1
            }
        }
        #[doc = "Possible values of the field `NEIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum NEIER {
            #[doc = "NF interrupts disabled; use polling."]
            _0,
            #[doc = "Hardware interrupt requested when NF is set."]
            _1,
        }
        impl NEIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    NEIER::_0 => false,
                    NEIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> NEIER {
                match value {
                    false => NEIER::_0,
                    true => NEIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == NEIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == NEIER::_1
            }
        }
        #[doc = "Possible values of the field `ORIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ORIER {
            #[doc = "OR interrupts disabled; use polling."]
            _0,
            #[doc = "Hardware interrupt requested when OR is set."]
            _1,
        }
        impl ORIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ORIER::_0 => false,
                    ORIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ORIER {
                match value {
                    false => ORIER::_0,
                    true => ORIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ORIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ORIER::_1
            }
        }
        #[doc = "Possible values of the field `TXINV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXINVR {
            #[doc = "Transmit data not inverted."]
            _0,
            #[doc = "Transmit data inverted."]
            _1,
        }
        impl TXINVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXINVR::_0 => false,
                    TXINVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXINVR {
                match value {
                    false => TXINVR::_0,
                    true => TXINVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXINVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXINVR::_1
            }
        }
        #[doc = "Possible values of the field `TXDIR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXDIRR {
            #[doc = "TXD pin is an input in single-wire mode."]
            _0,
            #[doc = "TXD pin is an output in single-wire mode."]
            _1,
        }
        impl TXDIRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXDIRR::_0 => false,
                    TXDIRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXDIRR {
                match value {
                    false => TXDIRR::_0,
                    true => TXDIRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXDIRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXDIRR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct R9T8R {
            bits: bool,
        }
        impl R9T8R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct R8T9R {
            bits: bool,
        }
        impl R8T9R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Values that can be written to the field `PT`"]
        pub enum PTW {
            #[doc = "Even parity."]
            _0,
            #[doc = "Odd parity."]
            _1,
        }
        impl PTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PTW::_0 => false,
                    PTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Even parity."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PTW::_0)
            }
            #[doc = "Odd parity."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "No hardware parity generation or checking."]
            _0,
            #[doc = "Parity enabled."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No hardware parity generation or checking."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Parity enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ILT`"]
        pub enum ILTW {
            #[doc = "Idle character bit count starts after start bit."]
            _0,
            #[doc = "Idle character bit count starts after stop bit."]
            _1,
        }
        impl ILTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ILTW::_0 => false,
                    ILTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ILTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ILTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ILTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Idle character bit count starts after start bit."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ILTW::_0)
            }
            #[doc = "Idle character bit count starts after stop bit."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ILTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WAKE`"]
        pub enum WAKEW {
            #[doc = "Configures RWU for idle-line wakeup."]
            _0,
            #[doc = "Configures RWU with address-mark wakeup."]
            _1,
        }
        impl WAKEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WAKEW::_0 => false,
                    WAKEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WAKEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WAKEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WAKEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configures RWU for idle-line wakeup."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WAKEW::_0)
            }
            #[doc = "Configures RWU with address-mark wakeup."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WAKEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `M`"]
        pub enum MW {
            #[doc = "Receiver and transmitter use 8-bit data characters."]
            _0,
            #[doc = "Receiver and transmitter use 9-bit data characters."]
            _1,
        }
        impl MW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MW::_0 => false,
                    MW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Receiver and transmitter use 8-bit data characters."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MW::_0)
            }
            #[doc = "Receiver and transmitter use 9-bit data characters."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RSRC`"]
        pub enum RSRCW {
            #[doc = "Provided LOOPS is set, RSRC is cleared, selects internal loop back mode and the LPUART does not use the RXD pin."]
            _0,
            #[doc = "Single-wire LPUART mode where the TXD pin is connected to the transmitter output and receiver input."]
            _1,
        }
        impl RSRCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RSRCW::_0 => false,
                    RSRCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RSRCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RSRCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RSRCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Provided LOOPS is set, RSRC is cleared, selects internal loop back mode and the LPUART does not use the RXD pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RSRCW::_0)
            }
            #[doc = "Single-wire LPUART mode where the TXD pin is connected to the transmitter output and receiver input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RSRCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DOZEEN`"]
        pub enum DOZEENW {
            #[doc = "LPUART is enabled in Doze mode."]
            _0,
            #[doc = "LPUART is disabled in Doze mode."]
            _1,
        }
        impl DOZEENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DOZEENW::_0 => false,
                    DOZEENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DOZEENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DOZEENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DOZEENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "LPUART is enabled in Doze mode."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DOZEENW::_0)
            }
            #[doc = "LPUART is disabled in Doze mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DOZEENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LOOPS`"]
        pub enum LOOPSW {
            #[doc = "Normal operation - RXD and TXD use separate pins."]
            _0,
            #[doc = "Loop mode or single-wire mode where transmitter outputs are internally connected to receiver input (see RSRC bit)."]
            _1,
        }
        impl LOOPSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LOOPSW::_0 => false,
                    LOOPSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LOOPSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LOOPSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LOOPSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Normal operation - RXD and TXD use separate pins."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LOOPSW::_0)
            }
            #[doc = "Loop mode or single-wire mode where transmitter outputs are internally connected to receiver input (see RSRC bit)."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LOOPSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IDLECFG`"]
        pub enum IDLECFGW {
            #[doc = "1 idle character"]
            _000,
            #[doc = "2 idle characters"]
            _001,
            #[doc = "4 idle characters"]
            _010,
            #[doc = "8 idle characters"]
            _011,
            #[doc = "16 idle characters"]
            _100,
            #[doc = "32 idle characters"]
            _101,
            #[doc = "64 idle characters"]
            _110,
            #[doc = "128 idle characters"]
            _111,
        }
        impl IDLECFGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IDLECFGW::_000 => 0,
                    IDLECFGW::_001 => 1,
                    IDLECFGW::_010 => 2,
                    IDLECFGW::_011 => 3,
                    IDLECFGW::_100 => 4,
                    IDLECFGW::_101 => 5,
                    IDLECFGW::_110 => 6,
                    IDLECFGW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IDLECFGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IDLECFGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IDLECFGW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "1 idle character"]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(IDLECFGW::_000)
            }
            #[doc = "2 idle characters"]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(IDLECFGW::_001)
            }
            #[doc = "4 idle characters"]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(IDLECFGW::_010)
            }
            #[doc = "8 idle characters"]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(IDLECFGW::_011)
            }
            #[doc = "16 idle characters"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(IDLECFGW::_100)
            }
            #[doc = "32 idle characters"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(IDLECFGW::_101)
            }
            #[doc = "64 idle characters"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(IDLECFGW::_110)
            }
            #[doc = "128 idle characters"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(IDLECFGW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `M7`"]
        pub enum M7W {
            #[doc = "Receiver and transmitter use 8-bit to 10-bit data characters."]
            _0,
            #[doc = "Receiver and transmitter use 7-bit data characters."]
            _1,
        }
        impl M7W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    M7W::_0 => false,
                    M7W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _M7W<'a> {
            w: &'a mut W,
        }
        impl<'a> _M7W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: M7W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Receiver and transmitter use 8-bit to 10-bit data characters."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(M7W::_0)
            }
            #[doc = "Receiver and transmitter use 7-bit data characters."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(M7W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MA2IE`"]
        pub enum MA2IEW {
            #[doc = "MA2F interrupt disabled"]
            _0,
            #[doc = "MA2F interrupt enabled"]
            _1,
        }
        impl MA2IEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MA2IEW::_0 => false,
                    MA2IEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MA2IEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MA2IEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MA2IEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "MA2F interrupt disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MA2IEW::_0)
            }
            #[doc = "MA2F interrupt enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MA2IEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MA1IE`"]
        pub enum MA1IEW {
            #[doc = "MA1F interrupt disabled"]
            _0,
            #[doc = "MA1F interrupt enabled"]
            _1,
        }
        impl MA1IEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MA1IEW::_0 => false,
                    MA1IEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MA1IEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MA1IEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MA1IEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "MA1F interrupt disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MA1IEW::_0)
            }
            #[doc = "MA1F interrupt enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MA1IEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SBK`"]
        pub enum SBKW {
            #[doc = "Normal transmitter operation."]
            _0,
            #[doc = "Queue break character(s) to be sent."]
            _1,
        }
        impl SBKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SBKW::_0 => false,
                    SBKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SBKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SBKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SBKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Normal transmitter operation."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SBKW::_0)
            }
            #[doc = "Queue break character(s) to be sent."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SBKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RWU`"]
        pub enum RWUW {
            #[doc = "Normal receiver operation."]
            _0,
            #[doc = "LPUART receiver in standby waiting for wakeup condition."]
            _1,
        }
        impl RWUW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RWUW::_0 => false,
                    RWUW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RWUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RWUW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RWUW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Normal receiver operation."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RWUW::_0)
            }
            #[doc = "LPUART receiver in standby waiting for wakeup condition."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RWUW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RE`"]
        pub enum REW {
            #[doc = "Receiver disabled."]
            _0,
            #[doc = "Receiver enabled."]
            _1,
        }
        impl REW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    REW::_0 => false,
                    REW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _REW<'a> {
            w: &'a mut W,
        }
        impl<'a> _REW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: REW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Receiver disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(REW::_0)
            }
            #[doc = "Receiver enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(REW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TE`"]
        pub enum TEW {
            #[doc = "Transmitter disabled."]
            _0,
            #[doc = "Transmitter enabled."]
            _1,
        }
        impl TEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TEW::_0 => false,
                    TEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Transmitter disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TEW::_0)
            }
            #[doc = "Transmitter enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 19;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ILIE`"]
        pub enum ILIEW {
            #[doc = "Hardware interrupts from IDLE disabled; use polling."]
            _0,
            #[doc = "Hardware interrupt requested when IDLE flag is 1."]
            _1,
        }
        impl ILIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ILIEW::_0 => false,
                    ILIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ILIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ILIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ILIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Hardware interrupts from IDLE disabled; use polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ILIEW::_0)
            }
            #[doc = "Hardware interrupt requested when IDLE flag is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ILIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RIE`"]
        pub enum RIEW {
            #[doc = "Hardware interrupts from RDRF disabled; use polling."]
            _0,
            #[doc = "Hardware interrupt requested when RDRF flag is 1."]
            _1,
        }
        impl RIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RIEW::_0 => false,
                    RIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Hardware interrupts from RDRF disabled; use polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RIEW::_0)
            }
            #[doc = "Hardware interrupt requested when RDRF flag is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 21;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TCIE`"]
        pub enum TCIEW {
            #[doc = "Hardware interrupts from TC disabled; use polling."]
            _0,
            #[doc = "Hardware interrupt requested when TC flag is 1."]
            _1,
        }
        impl TCIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TCIEW::_0 => false,
                    TCIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TCIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TCIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TCIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Hardware interrupts from TC disabled; use polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TCIEW::_0)
            }
            #[doc = "Hardware interrupt requested when TC flag is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TCIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 22;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TIE`"]
        pub enum TIEW {
            #[doc = "Hardware interrupts from TDRE disabled; use polling."]
            _0,
            #[doc = "Hardware interrupt requested when TDRE flag is 1."]
            _1,
        }
        impl TIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TIEW::_0 => false,
                    TIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Hardware interrupts from TDRE disabled; use polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIEW::_0)
            }
            #[doc = "Hardware interrupt requested when TDRE flag is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 23;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PEIE`"]
        pub enum PEIEW {
            #[doc = "PF interrupts disabled; use polling)."]
            _0,
            #[doc = "Hardware interrupt requested when PF is set."]
            _1,
        }
        impl PEIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEIEW::_0 => false,
                    PEIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "PF interrupts disabled; use polling)."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEIEW::_0)
            }
            #[doc = "Hardware interrupt requested when PF is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FEIE`"]
        pub enum FEIEW {
            #[doc = "FE interrupts disabled; use polling."]
            _0,
            #[doc = "Hardware interrupt requested when FE is set."]
            _1,
        }
        impl FEIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FEIEW::_0 => false,
                    FEIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FEIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FEIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FEIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FE interrupts disabled; use polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FEIEW::_0)
            }
            #[doc = "Hardware interrupt requested when FE is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FEIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 25;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `NEIE`"]
        pub enum NEIEW {
            #[doc = "NF interrupts disabled; use polling."]
            _0,
            #[doc = "Hardware interrupt requested when NF is set."]
            _1,
        }
        impl NEIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    NEIEW::_0 => false,
                    NEIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _NEIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NEIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: NEIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "NF interrupts disabled; use polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(NEIEW::_0)
            }
            #[doc = "Hardware interrupt requested when NF is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(NEIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 26;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ORIE`"]
        pub enum ORIEW {
            #[doc = "OR interrupts disabled; use polling."]
            _0,
            #[doc = "Hardware interrupt requested when OR is set."]
            _1,
        }
        impl ORIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ORIEW::_0 => false,
                    ORIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ORIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ORIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ORIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "OR interrupts disabled; use polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ORIEW::_0)
            }
            #[doc = "Hardware interrupt requested when OR is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ORIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 27;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TXINV`"]
        pub enum TXINVW {
            #[doc = "Transmit data not inverted."]
            _0,
            #[doc = "Transmit data inverted."]
            _1,
        }
        impl TXINVW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TXINVW::_0 => false,
                    TXINVW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXINVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXINVW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TXINVW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Transmit data not inverted."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TXINVW::_0)
            }
            #[doc = "Transmit data inverted."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TXINVW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 28;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TXDIR`"]
        pub enum TXDIRW {
            #[doc = "TXD pin is an input in single-wire mode."]
            _0,
            #[doc = "TXD pin is an output in single-wire mode."]
            _1,
        }
        impl TXDIRW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TXDIRW::_0 => false,
                    TXDIRW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXDIRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXDIRW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TXDIRW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "TXD pin is an input in single-wire mode."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TXDIRW::_0)
            }
            #[doc = "TXD pin is an output in single-wire mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TXDIRW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 29;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _R9T8W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R9T8W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _R8T9W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R8T9W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Parity Type"]
            #[inline(always)]
            pub fn pt(&self) -> PTR {
                PTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Parity Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Idle Line Type Select"]
            #[inline(always)]
            pub fn ilt(&self) -> ILTR {
                ILTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Receiver Wakeup Method Select"]
            #[inline(always)]
            pub fn wake(&self) -> WAKER {
                WAKER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - 9-Bit or 8-Bit Mode Select"]
            #[inline(always)]
            pub fn m(&self) -> MR {
                MR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Receiver Source Select"]
            #[inline(always)]
            pub fn rsrc(&self) -> RSRCR {
                RSRCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Doze Enable"]
            #[inline(always)]
            pub fn dozeen(&self) -> DOZEENR {
                DOZEENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Loop Mode Select"]
            #[inline(always)]
            pub fn loops(&self) -> LOOPSR {
                LOOPSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Idle Configuration"]
            #[inline(always)]
            pub fn idlecfg(&self) -> IDLECFGR {
                IDLECFGR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 11 - 7-Bit Mode Select"]
            #[inline(always)]
            pub fn m7(&self) -> M7R {
                M7R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - Match 2 Interrupt Enable"]
            #[inline(always)]
            pub fn ma2ie(&self) -> MA2IER {
                MA2IER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - Match 1 Interrupt Enable"]
            #[inline(always)]
            pub fn ma1ie(&self) -> MA1IER {
                MA1IER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 16 - Send Break"]
            #[inline(always)]
            pub fn sbk(&self) -> SBKR {
                SBKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - Receiver Wakeup Control"]
            #[inline(always)]
            pub fn rwu(&self) -> RWUR {
                RWUR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 18 - Receiver Enable"]
            #[inline(always)]
            pub fn re(&self) -> RER {
                RER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 19 - Transmitter Enable"]
            #[inline(always)]
            pub fn te(&self) -> TER {
                TER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 19;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 20 - Idle Line Interrupt Enable"]
            #[inline(always)]
            pub fn ilie(&self) -> ILIER {
                ILIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - Receiver Interrupt Enable"]
            #[inline(always)]
            pub fn rie(&self) -> RIER {
                RIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 22 - Transmission Complete Interrupt Enable for"]
            #[inline(always)]
            pub fn tcie(&self) -> TCIER {
                TCIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 23 - Transmit Interrupt Enable"]
            #[inline(always)]
            pub fn tie(&self) -> TIER {
                TIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 24 - Parity Error Interrupt Enable"]
            #[inline(always)]
            pub fn peie(&self) -> PEIER {
                PEIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 25 - Framing Error Interrupt Enable"]
            #[inline(always)]
            pub fn feie(&self) -> FEIER {
                FEIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 25;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 26 - Noise Error Interrupt Enable"]
            #[inline(always)]
            pub fn neie(&self) -> NEIER {
                NEIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 26;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 27 - Overrun Interrupt Enable"]
            #[inline(always)]
            pub fn orie(&self) -> ORIER {
                ORIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 27;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 28 - Transmit Data Inversion"]
            #[inline(always)]
            pub fn txinv(&self) -> TXINVR {
                TXINVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 28;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 29 - TXD Pin Direction in Single-Wire Mode"]
            #[inline(always)]
            pub fn txdir(&self) -> TXDIRR {
                TXDIRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 29;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 30 - Receive Bit 9 / Transmit Bit 8"]
            #[inline(always)]
            pub fn r9t8(&self) -> R9T8R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                R9T8R { bits }
            }
            #[doc = "Bit 31 - Receive Bit 8 / Transmit Bit 9"]
            #[inline(always)]
            pub fn r8t9(&self) -> R8T9R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                R8T9R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Parity Type"]
            #[inline(always)]
            pub fn pt(&mut self) -> _PTW {
                _PTW { w: self }
            }
            #[doc = "Bit 1 - Parity Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bit 2 - Idle Line Type Select"]
            #[inline(always)]
            pub fn ilt(&mut self) -> _ILTW {
                _ILTW { w: self }
            }
            #[doc = "Bit 3 - Receiver Wakeup Method Select"]
            #[inline(always)]
            pub fn wake(&mut self) -> _WAKEW {
                _WAKEW { w: self }
            }
            #[doc = "Bit 4 - 9-Bit or 8-Bit Mode Select"]
            #[inline(always)]
            pub fn m(&mut self) -> _MW {
                _MW { w: self }
            }
            #[doc = "Bit 5 - Receiver Source Select"]
            #[inline(always)]
            pub fn rsrc(&mut self) -> _RSRCW {
                _RSRCW { w: self }
            }
            #[doc = "Bit 6 - Doze Enable"]
            #[inline(always)]
            pub fn dozeen(&mut self) -> _DOZEENW {
                _DOZEENW { w: self }
            }
            #[doc = "Bit 7 - Loop Mode Select"]
            #[inline(always)]
            pub fn loops(&mut self) -> _LOOPSW {
                _LOOPSW { w: self }
            }
            #[doc = "Bits 8:10 - Idle Configuration"]
            #[inline(always)]
            pub fn idlecfg(&mut self) -> _IDLECFGW {
                _IDLECFGW { w: self }
            }
            #[doc = "Bit 11 - 7-Bit Mode Select"]
            #[inline(always)]
            pub fn m7(&mut self) -> _M7W {
                _M7W { w: self }
            }
            #[doc = "Bit 14 - Match 2 Interrupt Enable"]
            #[inline(always)]
            pub fn ma2ie(&mut self) -> _MA2IEW {
                _MA2IEW { w: self }
            }
            #[doc = "Bit 15 - Match 1 Interrupt Enable"]
            #[inline(always)]
            pub fn ma1ie(&mut self) -> _MA1IEW {
                _MA1IEW { w: self }
            }
            #[doc = "Bit 16 - Send Break"]
            #[inline(always)]
            pub fn sbk(&mut self) -> _SBKW {
                _SBKW { w: self }
            }
            #[doc = "Bit 17 - Receiver Wakeup Control"]
            #[inline(always)]
            pub fn rwu(&mut self) -> _RWUW {
                _RWUW { w: self }
            }
            #[doc = "Bit 18 - Receiver Enable"]
            #[inline(always)]
            pub fn re(&mut self) -> _REW {
                _REW { w: self }
            }
            #[doc = "Bit 19 - Transmitter Enable"]
            #[inline(always)]
            pub fn te(&mut self) -> _TEW {
                _TEW { w: self }
            }
            #[doc = "Bit 20 - Idle Line Interrupt Enable"]
            #[inline(always)]
            pub fn ilie(&mut self) -> _ILIEW {
                _ILIEW { w: self }
            }
            #[doc = "Bit 21 - Receiver Interrupt Enable"]
            #[inline(always)]
            pub fn rie(&mut self) -> _RIEW {
                _RIEW { w: self }
            }
            #[doc = "Bit 22 - Transmission Complete Interrupt Enable for"]
            #[inline(always)]
            pub fn tcie(&mut self) -> _TCIEW {
                _TCIEW { w: self }
            }
            #[doc = "Bit 23 - Transmit Interrupt Enable"]
            #[inline(always)]
            pub fn tie(&mut self) -> _TIEW {
                _TIEW { w: self }
            }
            #[doc = "Bit 24 - Parity Error Interrupt Enable"]
            #[inline(always)]
            pub fn peie(&mut self) -> _PEIEW {
                _PEIEW { w: self }
            }
            #[doc = "Bit 25 - Framing Error Interrupt Enable"]
            #[inline(always)]
            pub fn feie(&mut self) -> _FEIEW {
                _FEIEW { w: self }
            }
            #[doc = "Bit 26 - Noise Error Interrupt Enable"]
            #[inline(always)]
            pub fn neie(&mut self) -> _NEIEW {
                _NEIEW { w: self }
            }
            #[doc = "Bit 27 - Overrun Interrupt Enable"]
            #[inline(always)]
            pub fn orie(&mut self) -> _ORIEW {
                _ORIEW { w: self }
            }
            #[doc = "Bit 28 - Transmit Data Inversion"]
            #[inline(always)]
            pub fn txinv(&mut self) -> _TXINVW {
                _TXINVW { w: self }
            }
            #[doc = "Bit 29 - TXD Pin Direction in Single-Wire Mode"]
            #[inline(always)]
            pub fn txdir(&mut self) -> _TXDIRW {
                _TXDIRW { w: self }
            }
            #[doc = "Bit 30 - Receive Bit 9 / Transmit Bit 8"]
            #[inline(always)]
            pub fn r9t8(&mut self) -> _R9T8W {
                _R9T8W { w: self }
            }
            #[doc = "Bit 31 - Receive Bit 8 / Transmit Bit 9"]
            #[inline(always)]
            pub fn r8t9(&mut self) -> _R8T9W {
                _R8T9W { w: self }
            }
        }
    }
    #[doc = "LPUART Data Register"]
    pub struct DATA {
        register: VolatileCell<u32>,
    }
    #[doc = "LPUART Data Register"]
    pub mod data {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::DATA {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct R0T0R {
            bits: bool,
        }
        impl R0T0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct R1T1R {
            bits: bool,
        }
        impl R1T1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct R2T2R {
            bits: bool,
        }
        impl R2T2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct R3T3R {
            bits: bool,
        }
        impl R3T3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct R4T4R {
            bits: bool,
        }
        impl R4T4R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct R5T5R {
            bits: bool,
        }
        impl R5T5R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct R6T6R {
            bits: bool,
        }
        impl R6T6R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct R7T7R {
            bits: bool,
        }
        impl R7T7R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct R8T8R {
            bits: bool,
        }
        impl R8T8R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct R9T9R {
            bits: bool,
        }
        impl R9T9R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `IDLINE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IDLINER {
            #[doc = "Receiver was not idle before receiving this character."]
            _0,
            #[doc = "Receiver was idle before receiving this character."]
            _1,
        }
        impl IDLINER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    IDLINER::_0 => false,
                    IDLINER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> IDLINER {
                match value {
                    false => IDLINER::_0,
                    true => IDLINER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == IDLINER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == IDLINER::_1
            }
        }
        #[doc = "Possible values of the field `RXEMPT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXEMPTR {
            #[doc = "Receive buffer contains valid data."]
            _0,
            #[doc = "Receive buffer is empty, data returned on read is not valid."]
            _1,
        }
        impl RXEMPTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXEMPTR::_0 => false,
                    RXEMPTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXEMPTR {
                match value {
                    false => RXEMPTR::_0,
                    true => RXEMPTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXEMPTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RXEMPTR::_1
            }
        }
        #[doc = "Possible values of the field `FRETSC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FRETSCR {
            #[doc = "The dataword was received without a frame error on read, or transmit a normal character on write."]
            _0,
            #[doc = "The dataword was received with a frame error, or transmit an idle or break character on transmit."]
            _1,
        }
        impl FRETSCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FRETSCR::_0 => false,
                    FRETSCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FRETSCR {
                match value {
                    false => FRETSCR::_0,
                    true => FRETSCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FRETSCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FRETSCR::_1
            }
        }
        #[doc = "Possible values of the field `PARITYE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PARITYER {
            #[doc = "The dataword was received without a parity error."]
            _0,
            #[doc = "The dataword was received with a parity error."]
            _1,
        }
        impl PARITYER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PARITYER::_0 => false,
                    PARITYER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PARITYER {
                match value {
                    false => PARITYER::_0,
                    true => PARITYER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PARITYER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PARITYER::_1
            }
        }
        #[doc = "Possible values of the field `NOISY`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum NOISYR {
            #[doc = "The dataword was received without noise."]
            _0,
            #[doc = "The data was received with noise."]
            _1,
        }
        impl NOISYR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    NOISYR::_0 => false,
                    NOISYR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> NOISYR {
                match value {
                    false => NOISYR::_0,
                    true => NOISYR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == NOISYR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == NOISYR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _R0T0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R0T0W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _R1T1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R1T1W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _R2T2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R2T2W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _R3T3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R3T3W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _R4T4W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R4T4W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _R5T5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R5T5W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _R6T6W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R6T6W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _R7T7W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R7T7W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _R8T8W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R8T8W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _R9T9W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R9T9W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FRETSC`"]
        pub enum FRETSCW {
            #[doc = "The dataword was received without a frame error on read, or transmit a normal character on write."]
            _0,
            #[doc = "The dataword was received with a frame error, or transmit an idle or break character on transmit."]
            _1,
        }
        impl FRETSCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FRETSCW::_0 => false,
                    FRETSCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FRETSCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FRETSCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FRETSCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The dataword was received without a frame error on read, or transmit a normal character on write."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FRETSCW::_0)
            }
            #[doc = "The dataword was received with a frame error, or transmit an idle or break character on transmit."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FRETSCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - R0T0"]
            #[inline(always)]
            pub fn r0t0(&self) -> R0T0R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                R0T0R { bits }
            }
            #[doc = "Bit 1 - R1T1"]
            #[inline(always)]
            pub fn r1t1(&self) -> R1T1R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                R1T1R { bits }
            }
            #[doc = "Bit 2 - R2T2"]
            #[inline(always)]
            pub fn r2t2(&self) -> R2T2R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                R2T2R { bits }
            }
            #[doc = "Bit 3 - R3T3"]
            #[inline(always)]
            pub fn r3t3(&self) -> R3T3R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                R3T3R { bits }
            }
            #[doc = "Bit 4 - R4T4"]
            #[inline(always)]
            pub fn r4t4(&self) -> R4T4R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                R4T4R { bits }
            }
            #[doc = "Bit 5 - R5T5"]
            #[inline(always)]
            pub fn r5t5(&self) -> R5T5R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                R5T5R { bits }
            }
            #[doc = "Bit 6 - R6T6"]
            #[inline(always)]
            pub fn r6t6(&self) -> R6T6R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                R6T6R { bits }
            }
            #[doc = "Bit 7 - R7T7"]
            #[inline(always)]
            pub fn r7t7(&self) -> R7T7R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                R7T7R { bits }
            }
            #[doc = "Bit 8 - R8T8"]
            #[inline(always)]
            pub fn r8t8(&self) -> R8T8R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                R8T8R { bits }
            }
            #[doc = "Bit 9 - R9T9"]
            #[inline(always)]
            pub fn r9t9(&self) -> R9T9R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                R9T9R { bits }
            }
            #[doc = "Bit 11 - Idle Line"]
            #[inline(always)]
            pub fn idline(&self) -> IDLINER {
                IDLINER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Receive Buffer Empty"]
            #[inline(always)]
            pub fn rxempt(&self) -> RXEMPTR {
                RXEMPTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Frame Error / Transmit Special Character"]
            #[inline(always)]
            pub fn fretsc(&self) -> FRETSCR {
                FRETSCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - PARITYE"]
            #[inline(always)]
            pub fn paritye(&self) -> PARITYER {
                PARITYER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - NOISY"]
            #[inline(always)]
            pub fn noisy(&self) -> NOISYR {
                NOISYR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 4096 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - R0T0"]
            #[inline(always)]
            pub fn r0t0(&mut self) -> _R0T0W {
                _R0T0W { w: self }
            }
            #[doc = "Bit 1 - R1T1"]
            #[inline(always)]
            pub fn r1t1(&mut self) -> _R1T1W {
                _R1T1W { w: self }
            }
            #[doc = "Bit 2 - R2T2"]
            #[inline(always)]
            pub fn r2t2(&mut self) -> _R2T2W {
                _R2T2W { w: self }
            }
            #[doc = "Bit 3 - R3T3"]
            #[inline(always)]
            pub fn r3t3(&mut self) -> _R3T3W {
                _R3T3W { w: self }
            }
            #[doc = "Bit 4 - R4T4"]
            #[inline(always)]
            pub fn r4t4(&mut self) -> _R4T4W {
                _R4T4W { w: self }
            }
            #[doc = "Bit 5 - R5T5"]
            #[inline(always)]
            pub fn r5t5(&mut self) -> _R5T5W {
                _R5T5W { w: self }
            }
            #[doc = "Bit 6 - R6T6"]
            #[inline(always)]
            pub fn r6t6(&mut self) -> _R6T6W {
                _R6T6W { w: self }
            }
            #[doc = "Bit 7 - R7T7"]
            #[inline(always)]
            pub fn r7t7(&mut self) -> _R7T7W {
                _R7T7W { w: self }
            }
            #[doc = "Bit 8 - R8T8"]
            #[inline(always)]
            pub fn r8t8(&mut self) -> _R8T8W {
                _R8T8W { w: self }
            }
            #[doc = "Bit 9 - R9T9"]
            #[inline(always)]
            pub fn r9t9(&mut self) -> _R9T9W {
                _R9T9W { w: self }
            }
            #[doc = "Bit 13 - Frame Error / Transmit Special Character"]
            #[inline(always)]
            pub fn fretsc(&mut self) -> _FRETSCW {
                _FRETSCW { w: self }
            }
        }
    }
    #[doc = "LPUART Match Address Register"]
    pub struct MATCH {
        register: VolatileCell<u32>,
    }
    #[doc = "LPUART Match Address Register"]
    pub mod match_ {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::MATCH {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MA1R {
            bits: u16,
        }
        impl MA1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct MA2R {
            bits: u16,
        }
        impl MA2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MA1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MA1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 1023;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MA2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MA2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 1023;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:9 - Match Address 1"]
            #[inline(always)]
            pub fn ma1(&self) -> MA1R {
                let bits = {
                    const MASK: u16 = 1023;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                MA1R { bits }
            }
            #[doc = "Bits 16:25 - Match Address 2"]
            #[inline(always)]
            pub fn ma2(&self) -> MA2R {
                let bits = {
                    const MASK: u16 = 1023;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                MA2R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:9 - Match Address 1"]
            #[inline(always)]
            pub fn ma1(&mut self) -> _MA1W {
                _MA1W { w: self }
            }
            #[doc = "Bits 16:25 - Match Address 2"]
            #[inline(always)]
            pub fn ma2(&mut self) -> _MA2W {
                _MA2W { w: self }
            }
        }
    }
    #[doc = "LPUART Modem IrDA Register"]
    pub struct MODIR {
        register: VolatileCell<u32>,
    }
    #[doc = "LPUART Modem IrDA Register"]
    pub mod modir {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::MODIR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TXCTSE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXCTSER {
            #[doc = "CTS has no effect on the transmitter."]
            _0,
            #[doc = "Enables clear-to-send operation. The transmitter checks the state of CTS each time it is ready to send a character. If CTS is asserted, the character is sent. If CTS is deasserted, the signal TXD remains in the mark state and transmission is delayed until CTS is asserted. Changes in CTS as a character is being sent do not affect its transmission."]
            _1,
        }
        impl TXCTSER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXCTSER::_0 => false,
                    TXCTSER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXCTSER {
                match value {
                    false => TXCTSER::_0,
                    true => TXCTSER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXCTSER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXCTSER::_1
            }
        }
        #[doc = "Possible values of the field `TXRTSE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXRTSER {
            #[doc = "The transmitter has no effect on RTS."]
            _0,
            #[doc = "When a character is placed into an empty transmitter data buffer , RTS asserts one bit time before the start bit is transmitted. RTS deasserts one bit time after all characters in the transmitter data buffer and shift register are completely sent, including the last stop bit."]
            _1,
        }
        impl TXRTSER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXRTSER::_0 => false,
                    TXRTSER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXRTSER {
                match value {
                    false => TXRTSER::_0,
                    true => TXRTSER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXRTSER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXRTSER::_1
            }
        }
        #[doc = "Possible values of the field `TXRTSPOL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXRTSPOLR {
            #[doc = "Transmitter RTS is active low."]
            _0,
            #[doc = "Transmitter RTS is active high."]
            _1,
        }
        impl TXRTSPOLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXRTSPOLR::_0 => false,
                    TXRTSPOLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXRTSPOLR {
                match value {
                    false => TXRTSPOLR::_0,
                    true => TXRTSPOLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXRTSPOLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXRTSPOLR::_1
            }
        }
        #[doc = "Possible values of the field `RXRTSE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXRTSER {
            #[doc = "The receiver has no effect on RTS."]
            _0,
            #[doc = r" Reserved"]
            _Reserved(bool),
        }
        impl RXRTSER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXRTSER::_0 => false,
                    RXRTSER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXRTSER {
                match value {
                    false => RXRTSER::_0,
                    i => RXRTSER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXRTSER::_0
            }
        }
        #[doc = "Possible values of the field `TXCTSC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXCTSCR {
            #[doc = "CTS input is sampled at the start of each character."]
            _0,
            #[doc = "CTS input is sampled when the transmitter is idle."]
            _1,
        }
        impl TXCTSCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXCTSCR::_0 => false,
                    TXCTSCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXCTSCR {
                match value {
                    false => TXCTSCR::_0,
                    true => TXCTSCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXCTSCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXCTSCR::_1
            }
        }
        #[doc = "Possible values of the field `TXCTSSRC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXCTSSRCR {
            #[doc = "CTS input is the CTS_B pin."]
            _0,
            #[doc = "CTS input is the inverted Receiver Match result."]
            _1,
        }
        impl TXCTSSRCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXCTSSRCR::_0 => false,
                    TXCTSSRCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXCTSSRCR {
                match value {
                    false => TXCTSSRCR::_0,
                    true => TXCTSSRCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXCTSSRCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXCTSSRCR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct RTSWATERR {
            bits: u8,
        }
        impl RTSWATERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `TNP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TNPR {
            #[doc = "1/OSR."]
            _00,
            #[doc = "2/OSR."]
            _01,
            #[doc = "3/OSR."]
            _10,
            #[doc = "4/OSR."]
            _11,
        }
        impl TNPR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TNPR::_00 => 0,
                    TNPR::_01 => 1,
                    TNPR::_10 => 2,
                    TNPR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TNPR {
                match value {
                    0 => TNPR::_00,
                    1 => TNPR::_01,
                    2 => TNPR::_10,
                    3 => TNPR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == TNPR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == TNPR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == TNPR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == TNPR::_11
            }
        }
        #[doc = "Possible values of the field `IREN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRENR {
            #[doc = "IR disabled."]
            _0,
            #[doc = "IR enabled."]
            _1,
        }
        impl IRENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    IRENR::_0 => false,
                    IRENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> IRENR {
                match value {
                    false => IRENR::_0,
                    true => IRENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == IRENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == IRENR::_1
            }
        }
        #[doc = "Values that can be written to the field `TXCTSE`"]
        pub enum TXCTSEW {
            #[doc = "CTS has no effect on the transmitter."]
            _0,
            #[doc = "Enables clear-to-send operation. The transmitter checks the state of CTS each time it is ready to send a character. If CTS is asserted, the character is sent. If CTS is deasserted, the signal TXD remains in the mark state and transmission is delayed until CTS is asserted. Changes in CTS as a character is being sent do not affect its transmission."]
            _1,
        }
        impl TXCTSEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TXCTSEW::_0 => false,
                    TXCTSEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXCTSEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXCTSEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TXCTSEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "CTS has no effect on the transmitter."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TXCTSEW::_0)
            }
            #[doc = "Enables clear-to-send operation. The transmitter checks the state of CTS each time it is ready to send a character. If CTS is asserted, the character is sent. If CTS is deasserted, the signal TXD remains in the mark state and transmission is delayed until CTS is asserted. Changes in CTS as a character is being sent do not affect its transmission."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TXCTSEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TXRTSE`"]
        pub enum TXRTSEW {
            #[doc = "The transmitter has no effect on RTS."]
            _0,
            #[doc = "When a character is placed into an empty transmitter data buffer , RTS asserts one bit time before the start bit is transmitted. RTS deasserts one bit time after all characters in the transmitter data buffer and shift register are completely sent, including the last stop bit."]
            _1,
        }
        impl TXRTSEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TXRTSEW::_0 => false,
                    TXRTSEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXRTSEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXRTSEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TXRTSEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The transmitter has no effect on RTS."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TXRTSEW::_0)
            }
            #[doc = "When a character is placed into an empty transmitter data buffer , RTS asserts one bit time before the start bit is transmitted. RTS deasserts one bit time after all characters in the transmitter data buffer and shift register are completely sent, including the last stop bit."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TXRTSEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TXRTSPOL`"]
        pub enum TXRTSPOLW {
            #[doc = "Transmitter RTS is active low."]
            _0,
            #[doc = "Transmitter RTS is active high."]
            _1,
        }
        impl TXRTSPOLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TXRTSPOLW::_0 => false,
                    TXRTSPOLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXRTSPOLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXRTSPOLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TXRTSPOLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Transmitter RTS is active low."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TXRTSPOLW::_0)
            }
            #[doc = "Transmitter RTS is active high."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TXRTSPOLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RXRTSE`"]
        pub enum RXRTSEW {
            #[doc = "The receiver has no effect on RTS."]
            _0,
        }
        impl RXRTSEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RXRTSEW::_0 => false,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXRTSEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXRTSEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RXRTSEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The receiver has no effect on RTS."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RXRTSEW::_0)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TXCTSC`"]
        pub enum TXCTSCW {
            #[doc = "CTS input is sampled at the start of each character."]
            _0,
            #[doc = "CTS input is sampled when the transmitter is idle."]
            _1,
        }
        impl TXCTSCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TXCTSCW::_0 => false,
                    TXCTSCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXCTSCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXCTSCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TXCTSCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "CTS input is sampled at the start of each character."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TXCTSCW::_0)
            }
            #[doc = "CTS input is sampled when the transmitter is idle."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TXCTSCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TXCTSSRC`"]
        pub enum TXCTSSRCW {
            #[doc = "CTS input is the CTS_B pin."]
            _0,
            #[doc = "CTS input is the inverted Receiver Match result."]
            _1,
        }
        impl TXCTSSRCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TXCTSSRCW::_0 => false,
                    TXCTSSRCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXCTSSRCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXCTSSRCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TXCTSSRCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "CTS input is the CTS_B pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TXCTSSRCW::_0)
            }
            #[doc = "CTS input is the inverted Receiver Match result."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TXCTSSRCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _RTSWATERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RTSWATERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TNP`"]
        pub enum TNPW {
            #[doc = "1/OSR."]
            _00,
            #[doc = "2/OSR."]
            _01,
            #[doc = "3/OSR."]
            _10,
            #[doc = "4/OSR."]
            _11,
        }
        impl TNPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TNPW::_00 => 0,
                    TNPW::_01 => 1,
                    TNPW::_10 => 2,
                    TNPW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TNPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TNPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TNPW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "1/OSR."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(TNPW::_00)
            }
            #[doc = "2/OSR."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(TNPW::_01)
            }
            #[doc = "3/OSR."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(TNPW::_10)
            }
            #[doc = "4/OSR."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(TNPW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IREN`"]
        pub enum IRENW {
            #[doc = "IR disabled."]
            _0,
            #[doc = "IR enabled."]
            _1,
        }
        impl IRENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    IRENW::_0 => false,
                    IRENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "IR disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(IRENW::_0)
            }
            #[doc = "IR enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(IRENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Transmitter clear-to-send enable"]
            #[inline(always)]
            pub fn txctse(&self) -> TXCTSER {
                TXCTSER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Transmitter request-to-send enable"]
            #[inline(always)]
            pub fn txrtse(&self) -> TXRTSER {
                TXRTSER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Transmitter request-to-send polarity"]
            #[inline(always)]
            pub fn txrtspol(&self) -> TXRTSPOLR {
                TXRTSPOLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Receiver request-to-send enable"]
            #[inline(always)]
            pub fn rxrtse(&self) -> RXRTSER {
                RXRTSER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Transmit CTS Configuration"]
            #[inline(always)]
            pub fn txctsc(&self) -> TXCTSCR {
                TXCTSCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Transmit CTS Source"]
            #[inline(always)]
            pub fn txctssrc(&self) -> TXCTSSRCR {
                TXCTSSRCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:9 - Receive RTS Configuration"]
            #[inline(always)]
            pub fn rtswater(&self) -> RTSWATERR {
                let bits = {
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                RTSWATERR { bits }
            }
            #[doc = "Bits 16:17 - Transmitter narrow pulse"]
            #[inline(always)]
            pub fn tnp(&self) -> TNPR {
                TNPR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 18 - Infrared enable"]
            #[inline(always)]
            pub fn iren(&self) -> IRENR {
                IRENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Transmitter clear-to-send enable"]
            #[inline(always)]
            pub fn txctse(&mut self) -> _TXCTSEW {
                _TXCTSEW { w: self }
            }
            #[doc = "Bit 1 - Transmitter request-to-send enable"]
            #[inline(always)]
            pub fn txrtse(&mut self) -> _TXRTSEW {
                _TXRTSEW { w: self }
            }
            #[doc = "Bit 2 - Transmitter request-to-send polarity"]
            #[inline(always)]
            pub fn txrtspol(&mut self) -> _TXRTSPOLW {
                _TXRTSPOLW { w: self }
            }
            #[doc = "Bit 3 - Receiver request-to-send enable"]
            #[inline(always)]
            pub fn rxrtse(&mut self) -> _RXRTSEW {
                _RXRTSEW { w: self }
            }
            #[doc = "Bit 4 - Transmit CTS Configuration"]
            #[inline(always)]
            pub fn txctsc(&mut self) -> _TXCTSCW {
                _TXCTSCW { w: self }
            }
            #[doc = "Bit 5 - Transmit CTS Source"]
            #[inline(always)]
            pub fn txctssrc(&mut self) -> _TXCTSSRCW {
                _TXCTSSRCW { w: self }
            }
            #[doc = "Bits 8:9 - Receive RTS Configuration"]
            #[inline(always)]
            pub fn rtswater(&mut self) -> _RTSWATERW {
                _RTSWATERW { w: self }
            }
            #[doc = "Bits 16:17 - Transmitter narrow pulse"]
            #[inline(always)]
            pub fn tnp(&mut self) -> _TNPW {
                _TNPW { w: self }
            }
            #[doc = "Bit 18 - Infrared enable"]
            #[inline(always)]
            pub fn iren(&mut self) -> _IRENW {
                _IRENW { w: self }
            }
        }
    }
    #[doc = "LPUART FIFO Register"]
    pub struct FIFO {
        register: VolatileCell<u32>,
    }
    #[doc = "LPUART FIFO Register"]
    pub mod fifo {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FIFO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `RXFIFOSIZE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXFIFOSIZER {
            #[doc = "Receive FIFO/Buffer depth = 1 dataword."]
            _000,
            #[doc = "Receive FIFO/Buffer depth = 4 datawords."]
            _001,
            #[doc = "Receive FIFO/Buffer depth = 8 datawords."]
            _010,
            #[doc = "Receive FIFO/Buffer depth = 16 datawords."]
            _011,
            #[doc = "Receive FIFO/Buffer depth = 32 datawords."]
            _100,
            #[doc = "Receive FIFO/Buffer depth = 64 datawords."]
            _101,
            #[doc = "Receive FIFO/Buffer depth = 128 datawords."]
            _110,
            #[doc = "Receive FIFO/Buffer depth = 256 datawords."]
            _111,
        }
        impl RXFIFOSIZER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    RXFIFOSIZER::_000 => 0,
                    RXFIFOSIZER::_001 => 1,
                    RXFIFOSIZER::_010 => 2,
                    RXFIFOSIZER::_011 => 3,
                    RXFIFOSIZER::_100 => 4,
                    RXFIFOSIZER::_101 => 5,
                    RXFIFOSIZER::_110 => 6,
                    RXFIFOSIZER::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> RXFIFOSIZER {
                match value {
                    0 => RXFIFOSIZER::_000,
                    1 => RXFIFOSIZER::_001,
                    2 => RXFIFOSIZER::_010,
                    3 => RXFIFOSIZER::_011,
                    4 => RXFIFOSIZER::_100,
                    5 => RXFIFOSIZER::_101,
                    6 => RXFIFOSIZER::_110,
                    7 => RXFIFOSIZER::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == RXFIFOSIZER::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == RXFIFOSIZER::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == RXFIFOSIZER::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == RXFIFOSIZER::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == RXFIFOSIZER::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == RXFIFOSIZER::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == RXFIFOSIZER::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == RXFIFOSIZER::_111
            }
        }
        #[doc = "Possible values of the field `RXFE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXFER {
            #[doc = "Receive FIFO is not enabled. Buffer is depth 1. (Legacy support)"]
            _0,
            #[doc = "Receive FIFO is enabled. Buffer is depth indicted by RXFIFOSIZE."]
            _1,
        }
        impl RXFER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXFER::_0 => false,
                    RXFER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXFER {
                match value {
                    false => RXFER::_0,
                    true => RXFER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXFER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RXFER::_1
            }
        }
        #[doc = "Possible values of the field `TXFIFOSIZE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXFIFOSIZER {
            #[doc = "Transmit FIFO/Buffer depth = 1 dataword."]
            _000,
            #[doc = "Transmit FIFO/Buffer depth = 4 datawords."]
            _001,
            #[doc = "Transmit FIFO/Buffer depth = 8 datawords."]
            _010,
            #[doc = "Transmit FIFO/Buffer depth = 16 datawords."]
            _011,
            #[doc = "Transmit FIFO/Buffer depth = 32 datawords."]
            _100,
            #[doc = "Transmit FIFO/Buffer depth = 64 datawords."]
            _101,
            #[doc = "Transmit FIFO/Buffer depth = 128 datawords."]
            _110,
            #[doc = "Transmit FIFO/Buffer depth = 256 datawords"]
            _111,
        }
        impl TXFIFOSIZER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TXFIFOSIZER::_000 => 0,
                    TXFIFOSIZER::_001 => 1,
                    TXFIFOSIZER::_010 => 2,
                    TXFIFOSIZER::_011 => 3,
                    TXFIFOSIZER::_100 => 4,
                    TXFIFOSIZER::_101 => 5,
                    TXFIFOSIZER::_110 => 6,
                    TXFIFOSIZER::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TXFIFOSIZER {
                match value {
                    0 => TXFIFOSIZER::_000,
                    1 => TXFIFOSIZER::_001,
                    2 => TXFIFOSIZER::_010,
                    3 => TXFIFOSIZER::_011,
                    4 => TXFIFOSIZER::_100,
                    5 => TXFIFOSIZER::_101,
                    6 => TXFIFOSIZER::_110,
                    7 => TXFIFOSIZER::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == TXFIFOSIZER::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == TXFIFOSIZER::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == TXFIFOSIZER::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == TXFIFOSIZER::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == TXFIFOSIZER::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == TXFIFOSIZER::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == TXFIFOSIZER::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == TXFIFOSIZER::_111
            }
        }
        #[doc = "Possible values of the field `TXFE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXFER {
            #[doc = "Transmit FIFO is not enabled. Buffer is depth 1. (Legacy support)."]
            _0,
            #[doc = "Transmit FIFO is enabled. Buffer is depth indicated by TXFIFOSIZE."]
            _1,
        }
        impl TXFER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXFER::_0 => false,
                    TXFER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXFER {
                match value {
                    false => TXFER::_0,
                    true => TXFER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXFER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXFER::_1
            }
        }
        #[doc = "Possible values of the field `RXUFE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXUFER {
            #[doc = "RXUF flag does not generate an interrupt to the host."]
            _0,
            #[doc = "RXUF flag generates an interrupt to the host."]
            _1,
        }
        impl RXUFER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXUFER::_0 => false,
                    RXUFER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXUFER {
                match value {
                    false => RXUFER::_0,
                    true => RXUFER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXUFER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RXUFER::_1
            }
        }
        #[doc = "Possible values of the field `TXOFE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXOFER {
            #[doc = "TXOF flag does not generate an interrupt to the host."]
            _0,
            #[doc = "TXOF flag generates an interrupt to the host."]
            _1,
        }
        impl TXOFER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXOFER::_0 => false,
                    TXOFER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXOFER {
                match value {
                    false => TXOFER::_0,
                    true => TXOFER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXOFER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXOFER::_1
            }
        }
        #[doc = "Possible values of the field `RXIDEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXIDENR {
            #[doc = "Disable RDRF assertion due to partially filled FIFO when receiver is idle."]
            _000,
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 1 character."]
            _001,
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 2 characters."]
            _010,
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 4 characters."]
            _011,
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 8 characters."]
            _100,
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 16 characters."]
            _101,
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 32 characters."]
            _110,
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 64 characters."]
            _111,
        }
        impl RXIDENR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    RXIDENR::_000 => 0,
                    RXIDENR::_001 => 1,
                    RXIDENR::_010 => 2,
                    RXIDENR::_011 => 3,
                    RXIDENR::_100 => 4,
                    RXIDENR::_101 => 5,
                    RXIDENR::_110 => 6,
                    RXIDENR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> RXIDENR {
                match value {
                    0 => RXIDENR::_000,
                    1 => RXIDENR::_001,
                    2 => RXIDENR::_010,
                    3 => RXIDENR::_011,
                    4 => RXIDENR::_100,
                    5 => RXIDENR::_101,
                    6 => RXIDENR::_110,
                    7 => RXIDENR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == RXIDENR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == RXIDENR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == RXIDENR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == RXIDENR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == RXIDENR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == RXIDENR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == RXIDENR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == RXIDENR::_111
            }
        }
        #[doc = "Possible values of the field `RXUF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXUFR {
            #[doc = "No receive buffer underflow has occurred since the last time the flag was cleared."]
            _0,
            #[doc = "At least one receive buffer underflow has occurred since the last time the flag was cleared."]
            _1,
        }
        impl RXUFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXUFR::_0 => false,
                    RXUFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXUFR {
                match value {
                    false => RXUFR::_0,
                    true => RXUFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXUFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RXUFR::_1
            }
        }
        #[doc = "Possible values of the field `TXOF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXOFR {
            #[doc = "No transmit buffer overflow has occurred since the last time the flag was cleared."]
            _0,
            #[doc = "At least one transmit buffer overflow has occurred since the last time the flag was cleared."]
            _1,
        }
        impl TXOFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXOFR::_0 => false,
                    TXOFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXOFR {
                match value {
                    false => TXOFR::_0,
                    true => TXOFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXOFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXOFR::_1
            }
        }
        #[doc = "Possible values of the field `RXEMPT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXEMPTR {
            #[doc = "Receive buffer is not empty."]
            _0,
            #[doc = "Receive buffer is empty."]
            _1,
        }
        impl RXEMPTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXEMPTR::_0 => false,
                    RXEMPTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXEMPTR {
                match value {
                    false => RXEMPTR::_0,
                    true => RXEMPTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXEMPTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RXEMPTR::_1
            }
        }
        #[doc = "Possible values of the field `TXEMPT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXEMPTR {
            #[doc = "Transmit buffer is not empty."]
            _0,
            #[doc = "Transmit buffer is empty."]
            _1,
        }
        impl TXEMPTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXEMPTR::_0 => false,
                    TXEMPTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXEMPTR {
                match value {
                    false => TXEMPTR::_0,
                    true => TXEMPTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXEMPTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXEMPTR::_1
            }
        }
        #[doc = "Values that can be written to the field `RXFE`"]
        pub enum RXFEW {
            #[doc = "Receive FIFO is not enabled. Buffer is depth 1. (Legacy support)"]
            _0,
            #[doc = "Receive FIFO is enabled. Buffer is depth indicted by RXFIFOSIZE."]
            _1,
        }
        impl RXFEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RXFEW::_0 => false,
                    RXFEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXFEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXFEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RXFEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Receive FIFO is not enabled. Buffer is depth 1. (Legacy support)"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RXFEW::_0)
            }
            #[doc = "Receive FIFO is enabled. Buffer is depth indicted by RXFIFOSIZE."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RXFEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TXFE`"]
        pub enum TXFEW {
            #[doc = "Transmit FIFO is not enabled. Buffer is depth 1. (Legacy support)."]
            _0,
            #[doc = "Transmit FIFO is enabled. Buffer is depth indicated by TXFIFOSIZE."]
            _1,
        }
        impl TXFEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TXFEW::_0 => false,
                    TXFEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXFEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXFEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TXFEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Transmit FIFO is not enabled. Buffer is depth 1. (Legacy support)."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TXFEW::_0)
            }
            #[doc = "Transmit FIFO is enabled. Buffer is depth indicated by TXFIFOSIZE."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TXFEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RXUFE`"]
        pub enum RXUFEW {
            #[doc = "RXUF flag does not generate an interrupt to the host."]
            _0,
            #[doc = "RXUF flag generates an interrupt to the host."]
            _1,
        }
        impl RXUFEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RXUFEW::_0 => false,
                    RXUFEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXUFEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXUFEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RXUFEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "RXUF flag does not generate an interrupt to the host."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RXUFEW::_0)
            }
            #[doc = "RXUF flag generates an interrupt to the host."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RXUFEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TXOFE`"]
        pub enum TXOFEW {
            #[doc = "TXOF flag does not generate an interrupt to the host."]
            _0,
            #[doc = "TXOF flag generates an interrupt to the host."]
            _1,
        }
        impl TXOFEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TXOFEW::_0 => false,
                    TXOFEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXOFEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXOFEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TXOFEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "TXOF flag does not generate an interrupt to the host."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TXOFEW::_0)
            }
            #[doc = "TXOF flag generates an interrupt to the host."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TXOFEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RXIDEN`"]
        pub enum RXIDENW {
            #[doc = "Disable RDRF assertion due to partially filled FIFO when receiver is idle."]
            _000,
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 1 character."]
            _001,
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 2 characters."]
            _010,
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 4 characters."]
            _011,
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 8 characters."]
            _100,
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 16 characters."]
            _101,
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 32 characters."]
            _110,
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 64 characters."]
            _111,
        }
        impl RXIDENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    RXIDENW::_000 => 0,
                    RXIDENW::_001 => 1,
                    RXIDENW::_010 => 2,
                    RXIDENW::_011 => 3,
                    RXIDENW::_100 => 4,
                    RXIDENW::_101 => 5,
                    RXIDENW::_110 => 6,
                    RXIDENW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXIDENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXIDENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RXIDENW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Disable RDRF assertion due to partially filled FIFO when receiver is idle."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(RXIDENW::_000)
            }
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 1 character."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(RXIDENW::_001)
            }
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 2 characters."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(RXIDENW::_010)
            }
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 4 characters."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(RXIDENW::_011)
            }
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 8 characters."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(RXIDENW::_100)
            }
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 16 characters."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(RXIDENW::_101)
            }
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 32 characters."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(RXIDENW::_110)
            }
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 64 characters."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(RXIDENW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RXFLUSH`"]
        pub enum RXFLUSHW {
            #[doc = "No flush operation occurs."]
            _0,
            #[doc = "All data in the receive FIFO/buffer is cleared out."]
            _1,
        }
        impl RXFLUSHW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RXFLUSHW::_0 => false,
                    RXFLUSHW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXFLUSHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXFLUSHW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RXFLUSHW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No flush operation occurs."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RXFLUSHW::_0)
            }
            #[doc = "All data in the receive FIFO/buffer is cleared out."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RXFLUSHW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TXFLUSH`"]
        pub enum TXFLUSHW {
            #[doc = "No flush operation occurs."]
            _0,
            #[doc = "All data in the transmit FIFO/Buffer is cleared out."]
            _1,
        }
        impl TXFLUSHW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TXFLUSHW::_0 => false,
                    TXFLUSHW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXFLUSHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXFLUSHW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TXFLUSHW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No flush operation occurs."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TXFLUSHW::_0)
            }
            #[doc = "All data in the transmit FIFO/Buffer is cleared out."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TXFLUSHW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RXUF`"]
        pub enum RXUFW {
            #[doc = "No receive buffer underflow has occurred since the last time the flag was cleared."]
            _0,
            #[doc = "At least one receive buffer underflow has occurred since the last time the flag was cleared."]
            _1,
        }
        impl RXUFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RXUFW::_0 => false,
                    RXUFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXUFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXUFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RXUFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No receive buffer underflow has occurred since the last time the flag was cleared."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RXUFW::_0)
            }
            #[doc = "At least one receive buffer underflow has occurred since the last time the flag was cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RXUFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TXOF`"]
        pub enum TXOFW {
            #[doc = "No transmit buffer overflow has occurred since the last time the flag was cleared."]
            _0,
            #[doc = "At least one transmit buffer overflow has occurred since the last time the flag was cleared."]
            _1,
        }
        impl TXOFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TXOFW::_0 => false,
                    TXOFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXOFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXOFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TXOFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No transmit buffer overflow has occurred since the last time the flag was cleared."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TXOFW::_0)
            }
            #[doc = "At least one transmit buffer overflow has occurred since the last time the flag was cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TXOFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:2 - Receive FIFO. Buffer Depth"]
            #[inline(always)]
            pub fn rxfifosize(&self) -> RXFIFOSIZER {
                RXFIFOSIZER::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 3 - Receive FIFO Enable"]
            #[inline(always)]
            pub fn rxfe(&self) -> RXFER {
                RXFER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 4:6 - Transmit FIFO. Buffer Depth"]
            #[inline(always)]
            pub fn txfifosize(&self) -> TXFIFOSIZER {
                TXFIFOSIZER::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 7 - Transmit FIFO Enable"]
            #[inline(always)]
            pub fn txfe(&self) -> TXFER {
                TXFER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Receive FIFO Underflow Interrupt Enable"]
            #[inline(always)]
            pub fn rxufe(&self) -> RXUFER {
                RXUFER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Transmit FIFO Overflow Interrupt Enable"]
            #[inline(always)]
            pub fn txofe(&self) -> TXOFER {
                TXOFER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 10:12 - Receiver Idle Empty Enable"]
            #[inline(always)]
            pub fn rxiden(&self) -> RXIDENR {
                RXIDENR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 16 - Receiver Buffer Underflow Flag"]
            #[inline(always)]
            pub fn rxuf(&self) -> RXUFR {
                RXUFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - Transmitter Buffer Overflow Flag"]
            #[inline(always)]
            pub fn txof(&self) -> TXOFR {
                TXOFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 22 - Receive Buffer/FIFO Empty"]
            #[inline(always)]
            pub fn rxempt(&self) -> RXEMPTR {
                RXEMPTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 23 - Transmit Buffer/FIFO Empty"]
            #[inline(always)]
            pub fn txempt(&self) -> TXEMPTR {
                TXEMPTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 12582929 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 3 - Receive FIFO Enable"]
            #[inline(always)]
            pub fn rxfe(&mut self) -> _RXFEW {
                _RXFEW { w: self }
            }
            #[doc = "Bit 7 - Transmit FIFO Enable"]
            #[inline(always)]
            pub fn txfe(&mut self) -> _TXFEW {
                _TXFEW { w: self }
            }
            #[doc = "Bit 8 - Receive FIFO Underflow Interrupt Enable"]
            #[inline(always)]
            pub fn rxufe(&mut self) -> _RXUFEW {
                _RXUFEW { w: self }
            }
            #[doc = "Bit 9 - Transmit FIFO Overflow Interrupt Enable"]
            #[inline(always)]
            pub fn txofe(&mut self) -> _TXOFEW {
                _TXOFEW { w: self }
            }
            #[doc = "Bits 10:12 - Receiver Idle Empty Enable"]
            #[inline(always)]
            pub fn rxiden(&mut self) -> _RXIDENW {
                _RXIDENW { w: self }
            }
            #[doc = "Bit 14 - Receive FIFO/Buffer Flush"]
            #[inline(always)]
            pub fn rxflush(&mut self) -> _RXFLUSHW {
                _RXFLUSHW { w: self }
            }
            #[doc = "Bit 15 - Transmit FIFO/Buffer Flush"]
            #[inline(always)]
            pub fn txflush(&mut self) -> _TXFLUSHW {
                _TXFLUSHW { w: self }
            }
            #[doc = "Bit 16 - Receiver Buffer Underflow Flag"]
            #[inline(always)]
            pub fn rxuf(&mut self) -> _RXUFW {
                _RXUFW { w: self }
            }
            #[doc = "Bit 17 - Transmitter Buffer Overflow Flag"]
            #[inline(always)]
            pub fn txof(&mut self) -> _TXOFW {
                _TXOFW { w: self }
            }
        }
    }
    #[doc = "LPUART Watermark Register"]
    pub struct WATER {
        register: VolatileCell<u32>,
    }
    #[doc = "LPUART Watermark Register"]
    pub mod water {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::WATER {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct TXWATERR {
            bits: u8,
        }
        impl TXWATERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct TXCOUNTR {
            bits: u8,
        }
        impl TXCOUNTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct RXWATERR {
            bits: u8,
        }
        impl RXWATERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct RXCOUNTR {
            bits: u8,
        }
        impl RXCOUNTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXWATERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXWATERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXWATERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXWATERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:1 - Transmit Watermark"]
            #[inline(always)]
            pub fn txwater(&self) -> TXWATERR {
                let bits = {
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TXWATERR { bits }
            }
            #[doc = "Bits 8:10 - Transmit Counter"]
            #[inline(always)]
            pub fn txcount(&self) -> TXCOUNTR {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TXCOUNTR { bits }
            }
            #[doc = "Bits 16:17 - Receive Watermark"]
            #[inline(always)]
            pub fn rxwater(&self) -> RXWATERR {
                let bits = {
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                RXWATERR { bits }
            }
            #[doc = "Bits 24:26 - Receive Counter"]
            #[inline(always)]
            pub fn rxcount(&self) -> RXCOUNTR {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                RXCOUNTR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:1 - Transmit Watermark"]
            #[inline(always)]
            pub fn txwater(&mut self) -> _TXWATERW {
                _TXWATERW { w: self }
            }
            #[doc = "Bits 16:17 - Receive Watermark"]
            #[inline(always)]
            pub fn rxwater(&mut self) -> _RXWATERW {
                _RXWATERW { w: self }
            }
        }
    }
}
#[doc = "Universal Asynchronous Receiver/Transmitter"]
pub struct LPUART1 {
    register_block: lpuart1::RegisterBlock,
}
impl Deref for LPUART1 {
    type Target = lpuart1::RegisterBlock;
    fn deref(&self) -> &lpuart1::RegisterBlock {
        &self.register_block
    }
}
#[doc = "Universal Asynchronous Receiver/Transmitter"]
pub const LPUART2: Peripheral<LPUART2> = unsafe { Peripheral::new(1074184192) };
#[doc = "Universal Asynchronous Receiver/Transmitter"]
pub mod lpuart2 {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - Version ID Register"]
        pub verid: VERID,
        #[doc = "0x04 - Parameter Register"]
        pub param: PARAM,
        #[doc = "0x08 - LPUART Global Register"]
        pub global: GLOBAL,
        #[doc = "0x0c - LPUART Pin Configuration Register"]
        pub pincfg: PINCFG,
        #[doc = "0x10 - LPUART Baud Rate Register"]
        pub baud: BAUD,
        #[doc = "0x14 - LPUART Status Register"]
        pub stat: STAT,
        #[doc = "0x18 - LPUART Control Register"]
        pub ctrl: CTRL,
        #[doc = "0x1c - LPUART Data Register"]
        pub data: DATA,
        #[doc = "0x20 - LPUART Match Address Register"]
        pub match_: MATCH,
        #[doc = "0x24 - LPUART Modem IrDA Register"]
        pub modir: MODIR,
        #[doc = "0x28 - LPUART FIFO Register"]
        pub fifo: FIFO,
        #[doc = "0x2c - LPUART Watermark Register"]
        pub water: WATER,
    }
    #[doc = "Version ID Register"]
    pub struct VERID {
        register: VolatileCell<u32>,
    }
    #[doc = "Version ID Register"]
    pub mod verid {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::VERID {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = "Possible values of the field `FEATURE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FEATURER {
            #[doc = "Standard feature set."]
            _0000000000000001,
            #[doc = "Standard feature set with MODEM/IrDA support."]
            _0000000000000011,
            #[doc = r" Reserved"]
            _Reserved(u16),
        }
        impl FEATURER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                match *self {
                    FEATURER::_0000000000000001 => 1,
                    FEATURER::_0000000000000011 => 3,
                    FEATURER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u16) -> FEATURER {
                match value {
                    1 => FEATURER::_0000000000000001,
                    3 => FEATURER::_0000000000000011,
                    i => FEATURER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000000000000001`"]
            #[inline(always)]
            pub fn is_0000000000000001(&self) -> bool {
                *self == FEATURER::_0000000000000001
            }
            #[doc = "Checks if the value of the field is `_0000000000000011`"]
            #[inline(always)]
            pub fn is_0000000000000011(&self) -> bool {
                *self == FEATURER::_0000000000000011
            }
        }
        #[doc = r" Value of the field"]
        pub struct MINORR {
            bits: u8,
        }
        impl MINORR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct MAJORR {
            bits: u8,
        }
        impl MAJORR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Feature Identification Number"]
            #[inline(always)]
            pub fn feature(&self) -> FEATURER {
                FEATURER::_from({
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                })
            }
            #[doc = "Bits 16:23 - Minor Version Number"]
            #[inline(always)]
            pub fn minor(&self) -> MINORR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                MINORR { bits }
            }
            #[doc = "Bits 24:31 - Major Version Number"]
            #[inline(always)]
            pub fn major(&self) -> MAJORR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                MAJORR { bits }
            }
        }
    }
    #[doc = "Parameter Register"]
    pub struct PARAM {
        register: VolatileCell<u32>,
    }
    #[doc = "Parameter Register"]
    pub mod param {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::PARAM {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct TXFIFOR {
            bits: u8,
        }
        impl TXFIFOR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct RXFIFOR {
            bits: u8,
        }
        impl RXFIFOR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Transmit FIFO Size"]
            #[inline(always)]
            pub fn txfifo(&self) -> TXFIFOR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TXFIFOR { bits }
            }
            #[doc = "Bits 8:15 - Receive FIFO Size"]
            #[inline(always)]
            pub fn rxfifo(&self) -> RXFIFOR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                RXFIFOR { bits }
            }
        }
    }
    #[doc = "LPUART Global Register"]
    pub struct GLOBAL {
        register: VolatileCell<u32>,
    }
    #[doc = "LPUART Global Register"]
    pub mod global {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::GLOBAL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `RST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RSTR {
            #[doc = "Module is not reset."]
            _0,
            #[doc = "Module is reset."]
            _1,
        }
        impl RSTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RSTR::_0 => false,
                    RSTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RSTR {
                match value {
                    false => RSTR::_0,
                    true => RSTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RSTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RSTR::_1
            }
        }
        #[doc = "Values that can be written to the field `RST`"]
        pub enum RSTW {
            #[doc = "Module is not reset."]
            _0,
            #[doc = "Module is reset."]
            _1,
        }
        impl RSTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RSTW::_0 => false,
                    RSTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RSTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RSTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RSTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Module is not reset."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RSTW::_0)
            }
            #[doc = "Module is reset."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RSTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 1 - Software Reset"]
            #[inline(always)]
            pub fn rst(&self) -> RSTR {
                RSTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 1 - Software Reset"]
            #[inline(always)]
            pub fn rst(&mut self) -> _RSTW {
                _RSTW { w: self }
            }
        }
    }
    #[doc = "LPUART Pin Configuration Register"]
    pub struct PINCFG {
        register: VolatileCell<u32>,
    }
    #[doc = "LPUART Pin Configuration Register"]
    pub mod pincfg {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PINCFG {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TRGSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TRGSELR {
            #[doc = "Input trigger is disabled."]
            _00,
            #[doc = "Input trigger is used instead of RXD pin input."]
            _01,
            #[doc = "Input trigger is used instead of CTS_B pin input."]
            _10,
            #[doc = "Input trigger is used to modulate the TXD pin output. The TXD pin output (after TXINV configuration) is ANDed with the input trigger."]
            _11,
        }
        impl TRGSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TRGSELR::_00 => 0,
                    TRGSELR::_01 => 1,
                    TRGSELR::_10 => 2,
                    TRGSELR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TRGSELR {
                match value {
                    0 => TRGSELR::_00,
                    1 => TRGSELR::_01,
                    2 => TRGSELR::_10,
                    3 => TRGSELR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == TRGSELR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == TRGSELR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == TRGSELR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == TRGSELR::_11
            }
        }
        #[doc = "Values that can be written to the field `TRGSEL`"]
        pub enum TRGSELW {
            #[doc = "Input trigger is disabled."]
            _00,
            #[doc = "Input trigger is used instead of RXD pin input."]
            _01,
            #[doc = "Input trigger is used instead of CTS_B pin input."]
            _10,
            #[doc = "Input trigger is used to modulate the TXD pin output. The TXD pin output (after TXINV configuration) is ANDed with the input trigger."]
            _11,
        }
        impl TRGSELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TRGSELW::_00 => 0,
                    TRGSELW::_01 => 1,
                    TRGSELW::_10 => 2,
                    TRGSELW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TRGSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TRGSELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TRGSELW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Input trigger is disabled."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(TRGSELW::_00)
            }
            #[doc = "Input trigger is used instead of RXD pin input."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(TRGSELW::_01)
            }
            #[doc = "Input trigger is used instead of CTS_B pin input."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(TRGSELW::_10)
            }
            #[doc = "Input trigger is used to modulate the TXD pin output. The TXD pin output (after TXINV configuration) is ANDed with the input trigger."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(TRGSELW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:1 - Trigger Select"]
            #[inline(always)]
            pub fn trgsel(&self) -> TRGSELR {
                TRGSELR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:1 - Trigger Select"]
            #[inline(always)]
            pub fn trgsel(&mut self) -> _TRGSELW {
                _TRGSELW { w: self }
            }
        }
    }
    #[doc = "LPUART Baud Rate Register"]
    pub struct BAUD {
        register: VolatileCell<u32>,
    }
    #[doc = "LPUART Baud Rate Register"]
    pub mod baud {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::BAUD {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct SBRR {
            bits: u16,
        }
        impl SBRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `SBNS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SBNSR {
            #[doc = "One stop bit."]
            _0,
            #[doc = "Two stop bits."]
            _1,
        }
        impl SBNSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SBNSR::_0 => false,
                    SBNSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SBNSR {
                match value {
                    false => SBNSR::_0,
                    true => SBNSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SBNSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SBNSR::_1
            }
        }
        #[doc = "Possible values of the field `RXEDGIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXEDGIER {
            #[doc = "Hardware interrupts from LPUART_STAT[RXEDGIF] disabled."]
            _0,
            #[doc = "Hardware interrupt requested when LPUART_STAT[RXEDGIF] flag is 1."]
            _1,
        }
        impl RXEDGIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXEDGIER::_0 => false,
                    RXEDGIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXEDGIER {
                match value {
                    false => RXEDGIER::_0,
                    true => RXEDGIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXEDGIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RXEDGIER::_1
            }
        }
        #[doc = "Possible values of the field `LBKDIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LBKDIER {
            #[doc = "Hardware interrupts from LPUART_STAT[LBKDIF] disabled (use polling)."]
            _0,
            #[doc = "Hardware interrupt requested when LPUART_STAT[LBKDIF] flag is 1."]
            _1,
        }
        impl LBKDIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LBKDIER::_0 => false,
                    LBKDIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LBKDIER {
                match value {
                    false => LBKDIER::_0,
                    true => LBKDIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LBKDIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LBKDIER::_1
            }
        }
        #[doc = "Possible values of the field `RESYNCDIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RESYNCDISR {
            #[doc = "Resynchronization during received data word is supported"]
            _0,
            #[doc = "Resynchronization during received data word is disabled"]
            _1,
        }
        impl RESYNCDISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RESYNCDISR::_0 => false,
                    RESYNCDISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RESYNCDISR {
                match value {
                    false => RESYNCDISR::_0,
                    true => RESYNCDISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RESYNCDISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RESYNCDISR::_1
            }
        }
        #[doc = "Possible values of the field `BOTHEDGE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BOTHEDGER {
            #[doc = "Receiver samples input data using the rising edge of the baud rate clock."]
            _0,
            #[doc = "Receiver samples input data using the rising and falling edge of the baud rate clock."]
            _1,
        }
        impl BOTHEDGER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BOTHEDGER::_0 => false,
                    BOTHEDGER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BOTHEDGER {
                match value {
                    false => BOTHEDGER::_0,
                    true => BOTHEDGER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BOTHEDGER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BOTHEDGER::_1
            }
        }
        #[doc = "Possible values of the field `MATCFG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MATCFGR {
            #[doc = "Address Match Wakeup"]
            _00,
            #[doc = "Idle Match Wakeup"]
            _01,
            #[doc = "Match On and Match Off"]
            _10,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl MATCFGR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MATCFGR::_00 => 0,
                    MATCFGR::_01 => 1,
                    MATCFGR::_10 => 2,
                    MATCFGR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MATCFGR {
                match value {
                    0 => MATCFGR::_00,
                    1 => MATCFGR::_01,
                    2 => MATCFGR::_10,
                    i => MATCFGR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == MATCFGR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == MATCFGR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == MATCFGR::_10
            }
        }
        #[doc = "Possible values of the field `RIDMAE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RIDMAER {
            #[doc = "DMA request disabled."]
            _0,
            #[doc = "DMA request enabled."]
            _1,
        }
        impl RIDMAER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RIDMAER::_0 => false,
                    RIDMAER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RIDMAER {
                match value {
                    false => RIDMAER::_0,
                    true => RIDMAER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RIDMAER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RIDMAER::_1
            }
        }
        #[doc = "Possible values of the field `RDMAE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RDMAER {
            #[doc = "DMA request disabled."]
            _0,
            #[doc = "DMA request enabled."]
            _1,
        }
        impl RDMAER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RDMAER::_0 => false,
                    RDMAER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RDMAER {
                match value {
                    false => RDMAER::_0,
                    true => RDMAER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RDMAER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RDMAER::_1
            }
        }
        #[doc = "Possible values of the field `TDMAE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TDMAER {
            #[doc = "DMA request disabled."]
            _0,
            #[doc = "DMA request enabled."]
            _1,
        }
        impl TDMAER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TDMAER::_0 => false,
                    TDMAER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TDMAER {
                match value {
                    false => TDMAER::_0,
                    true => TDMAER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TDMAER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TDMAER::_1
            }
        }
        #[doc = "Possible values of the field `OSR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum OSRR {
            #[doc = "Writing 0 to this field will result in an oversampling ratio of 16"]
            _00000,
            #[doc = "Oversampling ratio of 4, requires BOTHEDGE to be set."]
            _00011,
            #[doc = "Oversampling ratio of 5, requires BOTHEDGE to be set."]
            _00100,
            #[doc = "Oversampling ratio of 6, requires BOTHEDGE to be set."]
            _00101,
            #[doc = "Oversampling ratio of 7, requires BOTHEDGE to be set."]
            _00110,
            #[doc = "Oversampling ratio of 8."]
            _00111,
            #[doc = "Oversampling ratio of 9."]
            _01000,
            #[doc = "Oversampling ratio of 10."]
            _01001,
            #[doc = "Oversampling ratio of 11."]
            _01010,
            #[doc = "Oversampling ratio of 12."]
            _01011,
            #[doc = "Oversampling ratio of 13."]
            _01100,
            #[doc = "Oversampling ratio of 14."]
            _01101,
            #[doc = "Oversampling ratio of 15."]
            _01110,
            #[doc = "Oversampling ratio of 16."]
            _01111,
            #[doc = "Oversampling ratio of 17."]
            _10000,
            #[doc = "Oversampling ratio of 18."]
            _10001,
            #[doc = "Oversampling ratio of 19."]
            _10010,
            #[doc = "Oversampling ratio of 20."]
            _10011,
            #[doc = "Oversampling ratio of 21."]
            _10100,
            #[doc = "Oversampling ratio of 22."]
            _10101,
            #[doc = "Oversampling ratio of 23."]
            _10110,
            #[doc = "Oversampling ratio of 24."]
            _10111,
            #[doc = "Oversampling ratio of 25."]
            _11000,
            #[doc = "Oversampling ratio of 26."]
            _11001,
            #[doc = "Oversampling ratio of 27."]
            _11010,
            #[doc = "Oversampling ratio of 28."]
            _11011,
            #[doc = "Oversampling ratio of 29."]
            _11100,
            #[doc = "Oversampling ratio of 30."]
            _11101,
            #[doc = "Oversampling ratio of 31."]
            _11110,
            #[doc = "Oversampling ratio of 32."]
            _11111,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl OSRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    OSRR::_00000 => 0,
                    OSRR::_00011 => 3,
                    OSRR::_00100 => 4,
                    OSRR::_00101 => 5,
                    OSRR::_00110 => 6,
                    OSRR::_00111 => 7,
                    OSRR::_01000 => 8,
                    OSRR::_01001 => 9,
                    OSRR::_01010 => 10,
                    OSRR::_01011 => 11,
                    OSRR::_01100 => 12,
                    OSRR::_01101 => 13,
                    OSRR::_01110 => 14,
                    OSRR::_01111 => 15,
                    OSRR::_10000 => 16,
                    OSRR::_10001 => 17,
                    OSRR::_10010 => 18,
                    OSRR::_10011 => 19,
                    OSRR::_10100 => 20,
                    OSRR::_10101 => 21,
                    OSRR::_10110 => 22,
                    OSRR::_10111 => 23,
                    OSRR::_11000 => 24,
                    OSRR::_11001 => 25,
                    OSRR::_11010 => 26,
                    OSRR::_11011 => 27,
                    OSRR::_11100 => 28,
                    OSRR::_11101 => 29,
                    OSRR::_11110 => 30,
                    OSRR::_11111 => 31,
                    OSRR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> OSRR {
                match value {
                    0 => OSRR::_00000,
                    3 => OSRR::_00011,
                    4 => OSRR::_00100,
                    5 => OSRR::_00101,
                    6 => OSRR::_00110,
                    7 => OSRR::_00111,
                    8 => OSRR::_01000,
                    9 => OSRR::_01001,
                    10 => OSRR::_01010,
                    11 => OSRR::_01011,
                    12 => OSRR::_01100,
                    13 => OSRR::_01101,
                    14 => OSRR::_01110,
                    15 => OSRR::_01111,
                    16 => OSRR::_10000,
                    17 => OSRR::_10001,
                    18 => OSRR::_10010,
                    19 => OSRR::_10011,
                    20 => OSRR::_10100,
                    21 => OSRR::_10101,
                    22 => OSRR::_10110,
                    23 => OSRR::_10111,
                    24 => OSRR::_11000,
                    25 => OSRR::_11001,
                    26 => OSRR::_11010,
                    27 => OSRR::_11011,
                    28 => OSRR::_11100,
                    29 => OSRR::_11101,
                    30 => OSRR::_11110,
                    31 => OSRR::_11111,
                    i => OSRR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_00000`"]
            #[inline(always)]
            pub fn is_00000(&self) -> bool {
                *self == OSRR::_00000
            }
            #[doc = "Checks if the value of the field is `_00011`"]
            #[inline(always)]
            pub fn is_00011(&self) -> bool {
                *self == OSRR::_00011
            }
            #[doc = "Checks if the value of the field is `_00100`"]
            #[inline(always)]
            pub fn is_00100(&self) -> bool {
                *self == OSRR::_00100
            }
            #[doc = "Checks if the value of the field is `_00101`"]
            #[inline(always)]
            pub fn is_00101(&self) -> bool {
                *self == OSRR::_00101
            }
            #[doc = "Checks if the value of the field is `_00110`"]
            #[inline(always)]
            pub fn is_00110(&self) -> bool {
                *self == OSRR::_00110
            }
            #[doc = "Checks if the value of the field is `_00111`"]
            #[inline(always)]
            pub fn is_00111(&self) -> bool {
                *self == OSRR::_00111
            }
            #[doc = "Checks if the value of the field is `_01000`"]
            #[inline(always)]
            pub fn is_01000(&self) -> bool {
                *self == OSRR::_01000
            }
            #[doc = "Checks if the value of the field is `_01001`"]
            #[inline(always)]
            pub fn is_01001(&self) -> bool {
                *self == OSRR::_01001
            }
            #[doc = "Checks if the value of the field is `_01010`"]
            #[inline(always)]
            pub fn is_01010(&self) -> bool {
                *self == OSRR::_01010
            }
            #[doc = "Checks if the value of the field is `_01011`"]
            #[inline(always)]
            pub fn is_01011(&self) -> bool {
                *self == OSRR::_01011
            }
            #[doc = "Checks if the value of the field is `_01100`"]
            #[inline(always)]
            pub fn is_01100(&self) -> bool {
                *self == OSRR::_01100
            }
            #[doc = "Checks if the value of the field is `_01101`"]
            #[inline(always)]
            pub fn is_01101(&self) -> bool {
                *self == OSRR::_01101
            }
            #[doc = "Checks if the value of the field is `_01110`"]
            #[inline(always)]
            pub fn is_01110(&self) -> bool {
                *self == OSRR::_01110
            }
            #[doc = "Checks if the value of the field is `_01111`"]
            #[inline(always)]
            pub fn is_01111(&self) -> bool {
                *self == OSRR::_01111
            }
            #[doc = "Checks if the value of the field is `_10000`"]
            #[inline(always)]
            pub fn is_10000(&self) -> bool {
                *self == OSRR::_10000
            }
            #[doc = "Checks if the value of the field is `_10001`"]
            #[inline(always)]
            pub fn is_10001(&self) -> bool {
                *self == OSRR::_10001
            }
            #[doc = "Checks if the value of the field is `_10010`"]
            #[inline(always)]
            pub fn is_10010(&self) -> bool {
                *self == OSRR::_10010
            }
            #[doc = "Checks if the value of the field is `_10011`"]
            #[inline(always)]
            pub fn is_10011(&self) -> bool {
                *self == OSRR::_10011
            }
            #[doc = "Checks if the value of the field is `_10100`"]
            #[inline(always)]
            pub fn is_10100(&self) -> bool {
                *self == OSRR::_10100
            }
            #[doc = "Checks if the value of the field is `_10101`"]
            #[inline(always)]
            pub fn is_10101(&self) -> bool {
                *self == OSRR::_10101
            }
            #[doc = "Checks if the value of the field is `_10110`"]
            #[inline(always)]
            pub fn is_10110(&self) -> bool {
                *self == OSRR::_10110
            }
            #[doc = "Checks if the value of the field is `_10111`"]
            #[inline(always)]
            pub fn is_10111(&self) -> bool {
                *self == OSRR::_10111
            }
            #[doc = "Checks if the value of the field is `_11000`"]
            #[inline(always)]
            pub fn is_11000(&self) -> bool {
                *self == OSRR::_11000
            }
            #[doc = "Checks if the value of the field is `_11001`"]
            #[inline(always)]
            pub fn is_11001(&self) -> bool {
                *self == OSRR::_11001
            }
            #[doc = "Checks if the value of the field is `_11010`"]
            #[inline(always)]
            pub fn is_11010(&self) -> bool {
                *self == OSRR::_11010
            }
            #[doc = "Checks if the value of the field is `_11011`"]
            #[inline(always)]
            pub fn is_11011(&self) -> bool {
                *self == OSRR::_11011
            }
            #[doc = "Checks if the value of the field is `_11100`"]
            #[inline(always)]
            pub fn is_11100(&self) -> bool {
                *self == OSRR::_11100
            }
            #[doc = "Checks if the value of the field is `_11101`"]
            #[inline(always)]
            pub fn is_11101(&self) -> bool {
                *self == OSRR::_11101
            }
            #[doc = "Checks if the value of the field is `_11110`"]
            #[inline(always)]
            pub fn is_11110(&self) -> bool {
                *self == OSRR::_11110
            }
            #[doc = "Checks if the value of the field is `_11111`"]
            #[inline(always)]
            pub fn is_11111(&self) -> bool {
                *self == OSRR::_11111
            }
        }
        #[doc = "Possible values of the field `M10`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum M10R {
            #[doc = "Receiver and transmitter use 7-bit to 9-bit data characters."]
            _0,
            #[doc = "Receiver and transmitter use 10-bit data characters."]
            _1,
        }
        impl M10R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    M10R::_0 => false,
                    M10R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> M10R {
                match value {
                    false => M10R::_0,
                    true => M10R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == M10R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == M10R::_1
            }
        }
        #[doc = "Possible values of the field `MAEN2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MAEN2R {
            #[doc = "Normal operation."]
            _0,
            #[doc = "Enables automatic address matching or data matching mode for MATCH[MA2]."]
            _1,
        }
        impl MAEN2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MAEN2R::_0 => false,
                    MAEN2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MAEN2R {
                match value {
                    false => MAEN2R::_0,
                    true => MAEN2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MAEN2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MAEN2R::_1
            }
        }
        #[doc = "Possible values of the field `MAEN1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MAEN1R {
            #[doc = "Normal operation."]
            _0,
            #[doc = "Enables automatic address matching or data matching mode for MATCH[MA1]."]
            _1,
        }
        impl MAEN1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MAEN1R::_0 => false,
                    MAEN1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MAEN1R {
                match value {
                    false => MAEN1R::_0,
                    true => MAEN1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MAEN1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MAEN1R::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _SBRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SBRW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 8191;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SBNS`"]
        pub enum SBNSW {
            #[doc = "One stop bit."]
            _0,
            #[doc = "Two stop bits."]
            _1,
        }
        impl SBNSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SBNSW::_0 => false,
                    SBNSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SBNSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SBNSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SBNSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "One stop bit."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SBNSW::_0)
            }
            #[doc = "Two stop bits."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SBNSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RXEDGIE`"]
        pub enum RXEDGIEW {
            #[doc = "Hardware interrupts from LPUART_STAT[RXEDGIF] disabled."]
            _0,
            #[doc = "Hardware interrupt requested when LPUART_STAT[RXEDGIF] flag is 1."]
            _1,
        }
        impl RXEDGIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RXEDGIEW::_0 => false,
                    RXEDGIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXEDGIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXEDGIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RXEDGIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Hardware interrupts from LPUART_STAT[RXEDGIF] disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RXEDGIEW::_0)
            }
            #[doc = "Hardware interrupt requested when LPUART_STAT[RXEDGIF] flag is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RXEDGIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LBKDIE`"]
        pub enum LBKDIEW {
            #[doc = "Hardware interrupts from LPUART_STAT[LBKDIF] disabled (use polling)."]
            _0,
            #[doc = "Hardware interrupt requested when LPUART_STAT[LBKDIF] flag is 1."]
            _1,
        }
        impl LBKDIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LBKDIEW::_0 => false,
                    LBKDIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LBKDIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LBKDIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LBKDIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Hardware interrupts from LPUART_STAT[LBKDIF] disabled (use polling)."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LBKDIEW::_0)
            }
            #[doc = "Hardware interrupt requested when LPUART_STAT[LBKDIF] flag is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LBKDIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RESYNCDIS`"]
        pub enum RESYNCDISW {
            #[doc = "Resynchronization during received data word is supported"]
            _0,
            #[doc = "Resynchronization during received data word is disabled"]
            _1,
        }
        impl RESYNCDISW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RESYNCDISW::_0 => false,
                    RESYNCDISW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RESYNCDISW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RESYNCDISW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RESYNCDISW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Resynchronization during received data word is supported"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RESYNCDISW::_0)
            }
            #[doc = "Resynchronization during received data word is disabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RESYNCDISW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BOTHEDGE`"]
        pub enum BOTHEDGEW {
            #[doc = "Receiver samples input data using the rising edge of the baud rate clock."]
            _0,
            #[doc = "Receiver samples input data using the rising and falling edge of the baud rate clock."]
            _1,
        }
        impl BOTHEDGEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    BOTHEDGEW::_0 => false,
                    BOTHEDGEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BOTHEDGEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BOTHEDGEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BOTHEDGEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Receiver samples input data using the rising edge of the baud rate clock."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BOTHEDGEW::_0)
            }
            #[doc = "Receiver samples input data using the rising and falling edge of the baud rate clock."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BOTHEDGEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MATCFG`"]
        pub enum MATCFGW {
            #[doc = "Address Match Wakeup"]
            _00,
            #[doc = "Idle Match Wakeup"]
            _01,
            #[doc = "Match On and Match Off"]
            _10,
        }
        impl MATCFGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MATCFGW::_00 => 0,
                    MATCFGW::_01 => 1,
                    MATCFGW::_10 => 2,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MATCFGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MATCFGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MATCFGW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Address Match Wakeup"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(MATCFGW::_00)
            }
            #[doc = "Idle Match Wakeup"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(MATCFGW::_01)
            }
            #[doc = "Match On and Match Off"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(MATCFGW::_10)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RIDMAE`"]
        pub enum RIDMAEW {
            #[doc = "DMA request disabled."]
            _0,
            #[doc = "DMA request enabled."]
            _1,
        }
        impl RIDMAEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RIDMAEW::_0 => false,
                    RIDMAEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RIDMAEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RIDMAEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RIDMAEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA request disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RIDMAEW::_0)
            }
            #[doc = "DMA request enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RIDMAEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RDMAE`"]
        pub enum RDMAEW {
            #[doc = "DMA request disabled."]
            _0,
            #[doc = "DMA request enabled."]
            _1,
        }
        impl RDMAEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RDMAEW::_0 => false,
                    RDMAEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RDMAEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RDMAEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RDMAEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA request disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RDMAEW::_0)
            }
            #[doc = "DMA request enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RDMAEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 21;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TDMAE`"]
        pub enum TDMAEW {
            #[doc = "DMA request disabled."]
            _0,
            #[doc = "DMA request enabled."]
            _1,
        }
        impl TDMAEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TDMAEW::_0 => false,
                    TDMAEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TDMAEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TDMAEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TDMAEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA request disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TDMAEW::_0)
            }
            #[doc = "DMA request enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TDMAEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 23;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `OSR`"]
        pub enum OSRW {
            #[doc = "Writing 0 to this field will result in an oversampling ratio of 16"]
            _00000,
            #[doc = "Oversampling ratio of 4, requires BOTHEDGE to be set."]
            _00011,
            #[doc = "Oversampling ratio of 5, requires BOTHEDGE to be set."]
            _00100,
            #[doc = "Oversampling ratio of 6, requires BOTHEDGE to be set."]
            _00101,
            #[doc = "Oversampling ratio of 7, requires BOTHEDGE to be set."]
            _00110,
            #[doc = "Oversampling ratio of 8."]
            _00111,
            #[doc = "Oversampling ratio of 9."]
            _01000,
            #[doc = "Oversampling ratio of 10."]
            _01001,
            #[doc = "Oversampling ratio of 11."]
            _01010,
            #[doc = "Oversampling ratio of 12."]
            _01011,
            #[doc = "Oversampling ratio of 13."]
            _01100,
            #[doc = "Oversampling ratio of 14."]
            _01101,
            #[doc = "Oversampling ratio of 15."]
            _01110,
            #[doc = "Oversampling ratio of 16."]
            _01111,
            #[doc = "Oversampling ratio of 17."]
            _10000,
            #[doc = "Oversampling ratio of 18."]
            _10001,
            #[doc = "Oversampling ratio of 19."]
            _10010,
            #[doc = "Oversampling ratio of 20."]
            _10011,
            #[doc = "Oversampling ratio of 21."]
            _10100,
            #[doc = "Oversampling ratio of 22."]
            _10101,
            #[doc = "Oversampling ratio of 23."]
            _10110,
            #[doc = "Oversampling ratio of 24."]
            _10111,
            #[doc = "Oversampling ratio of 25."]
            _11000,
            #[doc = "Oversampling ratio of 26."]
            _11001,
            #[doc = "Oversampling ratio of 27."]
            _11010,
            #[doc = "Oversampling ratio of 28."]
            _11011,
            #[doc = "Oversampling ratio of 29."]
            _11100,
            #[doc = "Oversampling ratio of 30."]
            _11101,
            #[doc = "Oversampling ratio of 31."]
            _11110,
            #[doc = "Oversampling ratio of 32."]
            _11111,
        }
        impl OSRW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    OSRW::_00000 => 0,
                    OSRW::_00011 => 3,
                    OSRW::_00100 => 4,
                    OSRW::_00101 => 5,
                    OSRW::_00110 => 6,
                    OSRW::_00111 => 7,
                    OSRW::_01000 => 8,
                    OSRW::_01001 => 9,
                    OSRW::_01010 => 10,
                    OSRW::_01011 => 11,
                    OSRW::_01100 => 12,
                    OSRW::_01101 => 13,
                    OSRW::_01110 => 14,
                    OSRW::_01111 => 15,
                    OSRW::_10000 => 16,
                    OSRW::_10001 => 17,
                    OSRW::_10010 => 18,
                    OSRW::_10011 => 19,
                    OSRW::_10100 => 20,
                    OSRW::_10101 => 21,
                    OSRW::_10110 => 22,
                    OSRW::_10111 => 23,
                    OSRW::_11000 => 24,
                    OSRW::_11001 => 25,
                    OSRW::_11010 => 26,
                    OSRW::_11011 => 27,
                    OSRW::_11100 => 28,
                    OSRW::_11101 => 29,
                    OSRW::_11110 => 30,
                    OSRW::_11111 => 31,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _OSRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _OSRW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: OSRW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Writing 0 to this field will result in an oversampling ratio of 16"]
            #[inline(always)]
            pub fn _00000(self) -> &'a mut W {
                self.variant(OSRW::_00000)
            }
            #[doc = "Oversampling ratio of 4, requires BOTHEDGE to be set."]
            #[inline(always)]
            pub fn _00011(self) -> &'a mut W {
                self.variant(OSRW::_00011)
            }
            #[doc = "Oversampling ratio of 5, requires BOTHEDGE to be set."]
            #[inline(always)]
            pub fn _00100(self) -> &'a mut W {
                self.variant(OSRW::_00100)
            }
            #[doc = "Oversampling ratio of 6, requires BOTHEDGE to be set."]
            #[inline(always)]
            pub fn _00101(self) -> &'a mut W {
                self.variant(OSRW::_00101)
            }
            #[doc = "Oversampling ratio of 7, requires BOTHEDGE to be set."]
            #[inline(always)]
            pub fn _00110(self) -> &'a mut W {
                self.variant(OSRW::_00110)
            }
            #[doc = "Oversampling ratio of 8."]
            #[inline(always)]
            pub fn _00111(self) -> &'a mut W {
                self.variant(OSRW::_00111)
            }
            #[doc = "Oversampling ratio of 9."]
            #[inline(always)]
            pub fn _01000(self) -> &'a mut W {
                self.variant(OSRW::_01000)
            }
            #[doc = "Oversampling ratio of 10."]
            #[inline(always)]
            pub fn _01001(self) -> &'a mut W {
                self.variant(OSRW::_01001)
            }
            #[doc = "Oversampling ratio of 11."]
            #[inline(always)]
            pub fn _01010(self) -> &'a mut W {
                self.variant(OSRW::_01010)
            }
            #[doc = "Oversampling ratio of 12."]
            #[inline(always)]
            pub fn _01011(self) -> &'a mut W {
                self.variant(OSRW::_01011)
            }
            #[doc = "Oversampling ratio of 13."]
            #[inline(always)]
            pub fn _01100(self) -> &'a mut W {
                self.variant(OSRW::_01100)
            }
            #[doc = "Oversampling ratio of 14."]
            #[inline(always)]
            pub fn _01101(self) -> &'a mut W {
                self.variant(OSRW::_01101)
            }
            #[doc = "Oversampling ratio of 15."]
            #[inline(always)]
            pub fn _01110(self) -> &'a mut W {
                self.variant(OSRW::_01110)
            }
            #[doc = "Oversampling ratio of 16."]
            #[inline(always)]
            pub fn _01111(self) -> &'a mut W {
                self.variant(OSRW::_01111)
            }
            #[doc = "Oversampling ratio of 17."]
            #[inline(always)]
            pub fn _10000(self) -> &'a mut W {
                self.variant(OSRW::_10000)
            }
            #[doc = "Oversampling ratio of 18."]
            #[inline(always)]
            pub fn _10001(self) -> &'a mut W {
                self.variant(OSRW::_10001)
            }
            #[doc = "Oversampling ratio of 19."]
            #[inline(always)]
            pub fn _10010(self) -> &'a mut W {
                self.variant(OSRW::_10010)
            }
            #[doc = "Oversampling ratio of 20."]
            #[inline(always)]
            pub fn _10011(self) -> &'a mut W {
                self.variant(OSRW::_10011)
            }
            #[doc = "Oversampling ratio of 21."]
            #[inline(always)]
            pub fn _10100(self) -> &'a mut W {
                self.variant(OSRW::_10100)
            }
            #[doc = "Oversampling ratio of 22."]
            #[inline(always)]
            pub fn _10101(self) -> &'a mut W {
                self.variant(OSRW::_10101)
            }
            #[doc = "Oversampling ratio of 23."]
            #[inline(always)]
            pub fn _10110(self) -> &'a mut W {
                self.variant(OSRW::_10110)
            }
            #[doc = "Oversampling ratio of 24."]
            #[inline(always)]
            pub fn _10111(self) -> &'a mut W {
                self.variant(OSRW::_10111)
            }
            #[doc = "Oversampling ratio of 25."]
            #[inline(always)]
            pub fn _11000(self) -> &'a mut W {
                self.variant(OSRW::_11000)
            }
            #[doc = "Oversampling ratio of 26."]
            #[inline(always)]
            pub fn _11001(self) -> &'a mut W {
                self.variant(OSRW::_11001)
            }
            #[doc = "Oversampling ratio of 27."]
            #[inline(always)]
            pub fn _11010(self) -> &'a mut W {
                self.variant(OSRW::_11010)
            }
            #[doc = "Oversampling ratio of 28."]
            #[inline(always)]
            pub fn _11011(self) -> &'a mut W {
                self.variant(OSRW::_11011)
            }
            #[doc = "Oversampling ratio of 29."]
            #[inline(always)]
            pub fn _11100(self) -> &'a mut W {
                self.variant(OSRW::_11100)
            }
            #[doc = "Oversampling ratio of 30."]
            #[inline(always)]
            pub fn _11101(self) -> &'a mut W {
                self.variant(OSRW::_11101)
            }
            #[doc = "Oversampling ratio of 31."]
            #[inline(always)]
            pub fn _11110(self) -> &'a mut W {
                self.variant(OSRW::_11110)
            }
            #[doc = "Oversampling ratio of 32."]
            #[inline(always)]
            pub fn _11111(self) -> &'a mut W {
                self.variant(OSRW::_11111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `M10`"]
        pub enum M10W {
            #[doc = "Receiver and transmitter use 7-bit to 9-bit data characters."]
            _0,
            #[doc = "Receiver and transmitter use 10-bit data characters."]
            _1,
        }
        impl M10W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    M10W::_0 => false,
                    M10W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _M10W<'a> {
            w: &'a mut W,
        }
        impl<'a> _M10W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: M10W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Receiver and transmitter use 7-bit to 9-bit data characters."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(M10W::_0)
            }
            #[doc = "Receiver and transmitter use 10-bit data characters."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(M10W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 29;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MAEN2`"]
        pub enum MAEN2W {
            #[doc = "Normal operation."]
            _0,
            #[doc = "Enables automatic address matching or data matching mode for MATCH[MA2]."]
            _1,
        }
        impl MAEN2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MAEN2W::_0 => false,
                    MAEN2W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MAEN2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MAEN2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MAEN2W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Normal operation."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MAEN2W::_0)
            }
            #[doc = "Enables automatic address matching or data matching mode for MATCH[MA2]."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MAEN2W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MAEN1`"]
        pub enum MAEN1W {
            #[doc = "Normal operation."]
            _0,
            #[doc = "Enables automatic address matching or data matching mode for MATCH[MA1]."]
            _1,
        }
        impl MAEN1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MAEN1W::_0 => false,
                    MAEN1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MAEN1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MAEN1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MAEN1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Normal operation."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MAEN1W::_0)
            }
            #[doc = "Enables automatic address matching or data matching mode for MATCH[MA1]."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MAEN1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:12 - Baud Rate Modulo Divisor."]
            #[inline(always)]
            pub fn sbr(&self) -> SBRR {
                let bits = {
                    const MASK: u16 = 8191;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                SBRR { bits }
            }
            #[doc = "Bit 13 - Stop Bit Number Select"]
            #[inline(always)]
            pub fn sbns(&self) -> SBNSR {
                SBNSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - RX Input Active Edge Interrupt Enable"]
            #[inline(always)]
            pub fn rxedgie(&self) -> RXEDGIER {
                RXEDGIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - LIN Break Detect Interrupt Enable"]
            #[inline(always)]
            pub fn lbkdie(&self) -> LBKDIER {
                LBKDIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 16 - Resynchronization Disable"]
            #[inline(always)]
            pub fn resyncdis(&self) -> RESYNCDISR {
                RESYNCDISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - Both Edge Sampling"]
            #[inline(always)]
            pub fn bothedge(&self) -> BOTHEDGER {
                BOTHEDGER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 18:19 - Match Configuration"]
            #[inline(always)]
            pub fn matcfg(&self) -> MATCFGR {
                MATCFGR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 20 - Receiver Idle DMA Enable"]
            #[inline(always)]
            pub fn ridmae(&self) -> RIDMAER {
                RIDMAER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - Receiver Full DMA Enable"]
            #[inline(always)]
            pub fn rdmae(&self) -> RDMAER {
                RDMAER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 23 - Transmitter DMA Enable"]
            #[inline(always)]
            pub fn tdmae(&self) -> TDMAER {
                TDMAER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 24:28 - Oversampling Ratio"]
            #[inline(always)]
            pub fn osr(&self) -> OSRR {
                OSRR::_from({
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 29 - 10-bit Mode select"]
            #[inline(always)]
            pub fn m10(&self) -> M10R {
                M10R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 29;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 30 - Match Address Mode Enable 2"]
            #[inline(always)]
            pub fn maen2(&self) -> MAEN2R {
                MAEN2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Match Address Mode Enable 1"]
            #[inline(always)]
            pub fn maen1(&self) -> MAEN1R {
                MAEN1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 251658244 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:12 - Baud Rate Modulo Divisor."]
            #[inline(always)]
            pub fn sbr(&mut self) -> _SBRW {
                _SBRW { w: self }
            }
            #[doc = "Bit 13 - Stop Bit Number Select"]
            #[inline(always)]
            pub fn sbns(&mut self) -> _SBNSW {
                _SBNSW { w: self }
            }
            #[doc = "Bit 14 - RX Input Active Edge Interrupt Enable"]
            #[inline(always)]
            pub fn rxedgie(&mut self) -> _RXEDGIEW {
                _RXEDGIEW { w: self }
            }
            #[doc = "Bit 15 - LIN Break Detect Interrupt Enable"]
            #[inline(always)]
            pub fn lbkdie(&mut self) -> _LBKDIEW {
                _LBKDIEW { w: self }
            }
            #[doc = "Bit 16 - Resynchronization Disable"]
            #[inline(always)]
            pub fn resyncdis(&mut self) -> _RESYNCDISW {
                _RESYNCDISW { w: self }
            }
            #[doc = "Bit 17 - Both Edge Sampling"]
            #[inline(always)]
            pub fn bothedge(&mut self) -> _BOTHEDGEW {
                _BOTHEDGEW { w: self }
            }
            #[doc = "Bits 18:19 - Match Configuration"]
            #[inline(always)]
            pub fn matcfg(&mut self) -> _MATCFGW {
                _MATCFGW { w: self }
            }
            #[doc = "Bit 20 - Receiver Idle DMA Enable"]
            #[inline(always)]
            pub fn ridmae(&mut self) -> _RIDMAEW {
                _RIDMAEW { w: self }
            }
            #[doc = "Bit 21 - Receiver Full DMA Enable"]
            #[inline(always)]
            pub fn rdmae(&mut self) -> _RDMAEW {
                _RDMAEW { w: self }
            }
            #[doc = "Bit 23 - Transmitter DMA Enable"]
            #[inline(always)]
            pub fn tdmae(&mut self) -> _TDMAEW {
                _TDMAEW { w: self }
            }
            #[doc = "Bits 24:28 - Oversampling Ratio"]
            #[inline(always)]
            pub fn osr(&mut self) -> _OSRW {
                _OSRW { w: self }
            }
            #[doc = "Bit 29 - 10-bit Mode select"]
            #[inline(always)]
            pub fn m10(&mut self) -> _M10W {
                _M10W { w: self }
            }
            #[doc = "Bit 30 - Match Address Mode Enable 2"]
            #[inline(always)]
            pub fn maen2(&mut self) -> _MAEN2W {
                _MAEN2W { w: self }
            }
            #[doc = "Bit 31 - Match Address Mode Enable 1"]
            #[inline(always)]
            pub fn maen1(&mut self) -> _MAEN1W {
                _MAEN1W { w: self }
            }
        }
    }
    #[doc = "LPUART Status Register"]
    pub struct STAT {
        register: VolatileCell<u32>,
    }
    #[doc = "LPUART Status Register"]
    pub mod stat {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::STAT {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `MA2F`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MA2FR {
            #[doc = "Received data is not equal to MA2"]
            _0,
            #[doc = "Received data is equal to MA2"]
            _1,
        }
        impl MA2FR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MA2FR::_0 => false,
                    MA2FR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MA2FR {
                match value {
                    false => MA2FR::_0,
                    true => MA2FR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MA2FR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MA2FR::_1
            }
        }
        #[doc = "Possible values of the field `MA1F`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MA1FR {
            #[doc = "Received data is not equal to MA1"]
            _0,
            #[doc = "Received data is equal to MA1"]
            _1,
        }
        impl MA1FR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MA1FR::_0 => false,
                    MA1FR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MA1FR {
                match value {
                    false => MA1FR::_0,
                    true => MA1FR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MA1FR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MA1FR::_1
            }
        }
        #[doc = "Possible values of the field `PF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PFR {
            #[doc = "No parity error."]
            _0,
            #[doc = "Parity error."]
            _1,
        }
        impl PFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PFR::_0 => false,
                    PFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PFR {
                match value {
                    false => PFR::_0,
                    true => PFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PFR::_1
            }
        }
        #[doc = "Possible values of the field `FE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FER {
            #[doc = "No framing error detected. This does not guarantee the framing is correct."]
            _0,
            #[doc = "Framing error."]
            _1,
        }
        impl FER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FER::_0 => false,
                    FER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FER {
                match value {
                    false => FER::_0,
                    true => FER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FER::_1
            }
        }
        #[doc = "Possible values of the field `NF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum NFR {
            #[doc = "No noise detected."]
            _0,
            #[doc = "Noise detected in the received character in LPUART_DATA."]
            _1,
        }
        impl NFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    NFR::_0 => false,
                    NFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> NFR {
                match value {
                    false => NFR::_0,
                    true => NFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == NFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == NFR::_1
            }
        }
        #[doc = "Possible values of the field `OR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ORR {
            #[doc = "No overrun."]
            _0,
            #[doc = "Receive overrun (new LPUART data lost)."]
            _1,
        }
        impl ORR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ORR::_0 => false,
                    ORR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ORR {
                match value {
                    false => ORR::_0,
                    true => ORR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ORR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ORR::_1
            }
        }
        #[doc = "Possible values of the field `IDLE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IDLER {
            #[doc = "No idle line detected."]
            _0,
            #[doc = "Idle line was detected."]
            _1,
        }
        impl IDLER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    IDLER::_0 => false,
                    IDLER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> IDLER {
                match value {
                    false => IDLER::_0,
                    true => IDLER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == IDLER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == IDLER::_1
            }
        }
        #[doc = "Possible values of the field `RDRF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RDRFR {
            #[doc = "Receive data buffer empty."]
            _0,
            #[doc = "Receive data buffer full."]
            _1,
        }
        impl RDRFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RDRFR::_0 => false,
                    RDRFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RDRFR {
                match value {
                    false => RDRFR::_0,
                    true => RDRFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RDRFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RDRFR::_1
            }
        }
        #[doc = "Possible values of the field `TC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TCR {
            #[doc = "Transmitter active (sending data, a preamble, or a break)."]
            _0,
            #[doc = "Transmitter idle (transmission activity complete)."]
            _1,
        }
        impl TCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TCR::_0 => false,
                    TCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TCR {
                match value {
                    false => TCR::_0,
                    true => TCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TCR::_1
            }
        }
        #[doc = "Possible values of the field `TDRE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TDRER {
            #[doc = "Transmit data buffer full."]
            _0,
            #[doc = "Transmit data buffer empty."]
            _1,
        }
        impl TDRER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TDRER::_0 => false,
                    TDRER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TDRER {
                match value {
                    false => TDRER::_0,
                    true => TDRER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TDRER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TDRER::_1
            }
        }
        #[doc = "Possible values of the field `RAF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RAFR {
            #[doc = "LPUART receiver idle waiting for a start bit."]
            _0,
            #[doc = "LPUART receiver active (RXD input not idle)."]
            _1,
        }
        impl RAFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RAFR::_0 => false,
                    RAFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RAFR {
                match value {
                    false => RAFR::_0,
                    true => RAFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RAFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RAFR::_1
            }
        }
        #[doc = "Possible values of the field `LBKDE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LBKDER {
            #[doc = "LIN break detect is disabled, normal break character can be detected."]
            _0,
            #[doc = "LIN break detect is enabled. LIN break character is detected at length of 11 bit times (if M = 0) or 12 (if M = 1) or 13 (M10 = 1)."]
            _1,
        }
        impl LBKDER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LBKDER::_0 => false,
                    LBKDER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LBKDER {
                match value {
                    false => LBKDER::_0,
                    true => LBKDER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LBKDER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LBKDER::_1
            }
        }
        #[doc = "Possible values of the field `BRK13`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BRK13R {
            #[doc = "Break character is transmitted with length of 9 to 13 bit times."]
            _0,
            #[doc = "Break character is transmitted with length of 12 to 15 bit times."]
            _1,
        }
        impl BRK13R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BRK13R::_0 => false,
                    BRK13R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BRK13R {
                match value {
                    false => BRK13R::_0,
                    true => BRK13R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BRK13R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BRK13R::_1
            }
        }
        #[doc = "Possible values of the field `RWUID`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RWUIDR {
            #[doc = "During receive standby state (RWU = 1), the IDLE bit does not get set upon detection of an idle character. During address match wakeup, the IDLE bit does not set when an address does not match."]
            _0,
            #[doc = "During receive standby state (RWU = 1), the IDLE bit gets set upon detection of an idle character. During address match wakeup, the IDLE bit does set when an address does not match."]
            _1,
        }
        impl RWUIDR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RWUIDR::_0 => false,
                    RWUIDR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RWUIDR {
                match value {
                    false => RWUIDR::_0,
                    true => RWUIDR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RWUIDR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RWUIDR::_1
            }
        }
        #[doc = "Possible values of the field `RXINV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXINVR {
            #[doc = "Receive data not inverted."]
            _0,
            #[doc = "Receive data inverted."]
            _1,
        }
        impl RXINVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXINVR::_0 => false,
                    RXINVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXINVR {
                match value {
                    false => RXINVR::_0,
                    true => RXINVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXINVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RXINVR::_1
            }
        }
        #[doc = "Possible values of the field `MSBF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MSBFR {
            #[doc = "LSB (bit0) is the first bit that is transmitted following the start bit. Further, the first bit received after the start bit is identified as bit0."]
            _0,
            #[doc = "MSB (bit9, bit8, bit7 or bit6) is the first bit that is transmitted following the start bit depending on the setting of CTRL[M], CTRL[PE] and BAUD[M10]. Further, the first bit received after the start bit is identified as bit9, bit8, bit7 or bit6 depending on the setting of CTRL[M] and CTRL[PE]."]
            _1,
        }
        impl MSBFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MSBFR::_0 => false,
                    MSBFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MSBFR {
                match value {
                    false => MSBFR::_0,
                    true => MSBFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MSBFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MSBFR::_1
            }
        }
        #[doc = "Possible values of the field `RXEDGIF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXEDGIFR {
            #[doc = "No active edge on the receive pin has occurred."]
            _0,
            #[doc = "An active edge on the receive pin has occurred."]
            _1,
        }
        impl RXEDGIFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXEDGIFR::_0 => false,
                    RXEDGIFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXEDGIFR {
                match value {
                    false => RXEDGIFR::_0,
                    true => RXEDGIFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXEDGIFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RXEDGIFR::_1
            }
        }
        #[doc = "Possible values of the field `LBKDIF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LBKDIFR {
            #[doc = "No LIN break character has been detected."]
            _0,
            #[doc = "LIN break character has been detected."]
            _1,
        }
        impl LBKDIFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LBKDIFR::_0 => false,
                    LBKDIFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LBKDIFR {
                match value {
                    false => LBKDIFR::_0,
                    true => LBKDIFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LBKDIFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LBKDIFR::_1
            }
        }
        #[doc = "Values that can be written to the field `MA2F`"]
        pub enum MA2FW {
            #[doc = "Received data is not equal to MA2"]
            _0,
            #[doc = "Received data is equal to MA2"]
            _1,
        }
        impl MA2FW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MA2FW::_0 => false,
                    MA2FW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MA2FW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MA2FW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MA2FW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Received data is not equal to MA2"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MA2FW::_0)
            }
            #[doc = "Received data is equal to MA2"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MA2FW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MA1F`"]
        pub enum MA1FW {
            #[doc = "Received data is not equal to MA1"]
            _0,
            #[doc = "Received data is equal to MA1"]
            _1,
        }
        impl MA1FW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MA1FW::_0 => false,
                    MA1FW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MA1FW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MA1FW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MA1FW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Received data is not equal to MA1"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MA1FW::_0)
            }
            #[doc = "Received data is equal to MA1"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MA1FW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PF`"]
        pub enum PFW {
            #[doc = "No parity error."]
            _0,
            #[doc = "Parity error."]
            _1,
        }
        impl PFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PFW::_0 => false,
                    PFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No parity error."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PFW::_0)
            }
            #[doc = "Parity error."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FE`"]
        pub enum FEW {
            #[doc = "No framing error detected. This does not guarantee the framing is correct."]
            _0,
            #[doc = "Framing error."]
            _1,
        }
        impl FEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FEW::_0 => false,
                    FEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No framing error detected. This does not guarantee the framing is correct."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FEW::_0)
            }
            #[doc = "Framing error."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `NF`"]
        pub enum NFW {
            #[doc = "No noise detected."]
            _0,
            #[doc = "Noise detected in the received character in LPUART_DATA."]
            _1,
        }
        impl NFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    NFW::_0 => false,
                    NFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _NFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: NFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No noise detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(NFW::_0)
            }
            #[doc = "Noise detected in the received character in LPUART_DATA."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(NFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `OR`"]
        pub enum ORW {
            #[doc = "No overrun."]
            _0,
            #[doc = "Receive overrun (new LPUART data lost)."]
            _1,
        }
        impl ORW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ORW::_0 => false,
                    ORW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ORW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ORW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ORW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No overrun."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ORW::_0)
            }
            #[doc = "Receive overrun (new LPUART data lost)."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ORW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 19;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IDLE`"]
        pub enum IDLEW {
            #[doc = "No idle line detected."]
            _0,
            #[doc = "Idle line was detected."]
            _1,
        }
        impl IDLEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    IDLEW::_0 => false,
                    IDLEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IDLEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IDLEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IDLEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No idle line detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(IDLEW::_0)
            }
            #[doc = "Idle line was detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(IDLEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LBKDE`"]
        pub enum LBKDEW {
            #[doc = "LIN break detect is disabled, normal break character can be detected."]
            _0,
            #[doc = "LIN break detect is enabled. LIN break character is detected at length of 11 bit times (if M = 0) or 12 (if M = 1) or 13 (M10 = 1)."]
            _1,
        }
        impl LBKDEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LBKDEW::_0 => false,
                    LBKDEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LBKDEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LBKDEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LBKDEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "LIN break detect is disabled, normal break character can be detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LBKDEW::_0)
            }
            #[doc = "LIN break detect is enabled. LIN break character is detected at length of 11 bit times (if M = 0) or 12 (if M = 1) or 13 (M10 = 1)."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LBKDEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 25;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `BRK13`"]
        pub enum BRK13W {
            #[doc = "Break character is transmitted with length of 9 to 13 bit times."]
            _0,
            #[doc = "Break character is transmitted with length of 12 to 15 bit times."]
            _1,
        }
        impl BRK13W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    BRK13W::_0 => false,
                    BRK13W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BRK13W<'a> {
            w: &'a mut W,
        }
        impl<'a> _BRK13W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BRK13W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Break character is transmitted with length of 9 to 13 bit times."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BRK13W::_0)
            }
            #[doc = "Break character is transmitted with length of 12 to 15 bit times."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BRK13W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 26;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RWUID`"]
        pub enum RWUIDW {
            #[doc = "During receive standby state (RWU = 1), the IDLE bit does not get set upon detection of an idle character. During address match wakeup, the IDLE bit does not set when an address does not match."]
            _0,
            #[doc = "During receive standby state (RWU = 1), the IDLE bit gets set upon detection of an idle character. During address match wakeup, the IDLE bit does set when an address does not match."]
            _1,
        }
        impl RWUIDW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RWUIDW::_0 => false,
                    RWUIDW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RWUIDW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RWUIDW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RWUIDW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "During receive standby state (RWU = 1), the IDLE bit does not get set upon detection of an idle character. During address match wakeup, the IDLE bit does not set when an address does not match."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RWUIDW::_0)
            }
            #[doc = "During receive standby state (RWU = 1), the IDLE bit gets set upon detection of an idle character. During address match wakeup, the IDLE bit does set when an address does not match."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RWUIDW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 27;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RXINV`"]
        pub enum RXINVW {
            #[doc = "Receive data not inverted."]
            _0,
            #[doc = "Receive data inverted."]
            _1,
        }
        impl RXINVW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RXINVW::_0 => false,
                    RXINVW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXINVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXINVW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RXINVW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Receive data not inverted."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RXINVW::_0)
            }
            #[doc = "Receive data inverted."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RXINVW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 28;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MSBF`"]
        pub enum MSBFW {
            #[doc = "LSB (bit0) is the first bit that is transmitted following the start bit. Further, the first bit received after the start bit is identified as bit0."]
            _0,
            #[doc = "MSB (bit9, bit8, bit7 or bit6) is the first bit that is transmitted following the start bit depending on the setting of CTRL[M], CTRL[PE] and BAUD[M10]. Further, the first bit received after the start bit is identified as bit9, bit8, bit7 or bit6 depending on the setting of CTRL[M] and CTRL[PE]."]
            _1,
        }
        impl MSBFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MSBFW::_0 => false,
                    MSBFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSBFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSBFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MSBFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "LSB (bit0) is the first bit that is transmitted following the start bit. Further, the first bit received after the start bit is identified as bit0."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MSBFW::_0)
            }
            #[doc = "MSB (bit9, bit8, bit7 or bit6) is the first bit that is transmitted following the start bit depending on the setting of CTRL[M], CTRL[PE] and BAUD[M10]. Further, the first bit received after the start bit is identified as bit9, bit8, bit7 or bit6 depending on the setting of CTRL[M] and CTRL[PE]."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MSBFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 29;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RXEDGIF`"]
        pub enum RXEDGIFW {
            #[doc = "No active edge on the receive pin has occurred."]
            _0,
            #[doc = "An active edge on the receive pin has occurred."]
            _1,
        }
        impl RXEDGIFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RXEDGIFW::_0 => false,
                    RXEDGIFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXEDGIFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXEDGIFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RXEDGIFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No active edge on the receive pin has occurred."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RXEDGIFW::_0)
            }
            #[doc = "An active edge on the receive pin has occurred."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RXEDGIFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LBKDIF`"]
        pub enum LBKDIFW {
            #[doc = "No LIN break character has been detected."]
            _0,
            #[doc = "LIN break character has been detected."]
            _1,
        }
        impl LBKDIFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LBKDIFW::_0 => false,
                    LBKDIFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LBKDIFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LBKDIFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LBKDIFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No LIN break character has been detected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LBKDIFW::_0)
            }
            #[doc = "LIN break character has been detected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LBKDIFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 14 - Match 2 Flag"]
            #[inline(always)]
            pub fn ma2f(&self) -> MA2FR {
                MA2FR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - Match 1 Flag"]
            #[inline(always)]
            pub fn ma1f(&self) -> MA1FR {
                MA1FR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 16 - Parity Error Flag"]
            #[inline(always)]
            pub fn pf(&self) -> PFR {
                PFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - Framing Error Flag"]
            #[inline(always)]
            pub fn fe(&self) -> FER {
                FER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 18 - Noise Flag"]
            #[inline(always)]
            pub fn nf(&self) -> NFR {
                NFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 19 - Receiver Overrun Flag"]
            #[inline(always)]
            pub fn or(&self) -> ORR {
                ORR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 19;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 20 - Idle Line Flag"]
            #[inline(always)]
            pub fn idle(&self) -> IDLER {
                IDLER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - Receive Data Register Full Flag"]
            #[inline(always)]
            pub fn rdrf(&self) -> RDRFR {
                RDRFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 22 - Transmission Complete Flag"]
            #[inline(always)]
            pub fn tc(&self) -> TCR {
                TCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 23 - Transmit Data Register Empty Flag"]
            #[inline(always)]
            pub fn tdre(&self) -> TDRER {
                TDRER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 24 - Receiver Active Flag"]
            #[inline(always)]
            pub fn raf(&self) -> RAFR {
                RAFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 25 - LIN Break Detection Enable"]
            #[inline(always)]
            pub fn lbkde(&self) -> LBKDER {
                LBKDER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 25;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 26 - Break Character Generation Length"]
            #[inline(always)]
            pub fn brk13(&self) -> BRK13R {
                BRK13R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 26;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 27 - Receive Wake Up Idle Detect"]
            #[inline(always)]
            pub fn rwuid(&self) -> RWUIDR {
                RWUIDR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 27;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 28 - Receive Data Inversion"]
            #[inline(always)]
            pub fn rxinv(&self) -> RXINVR {
                RXINVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 28;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 29 - MSB First"]
            #[inline(always)]
            pub fn msbf(&self) -> MSBFR {
                MSBFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 29;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 30 - RXD Pin Active Edge Interrupt Flag"]
            #[inline(always)]
            pub fn rxedgif(&self) -> RXEDGIFR {
                RXEDGIFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - LIN Break Detect Interrupt Flag"]
            #[inline(always)]
            pub fn lbkdif(&self) -> LBKDIFR {
                LBKDIFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 12582912 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 14 - Match 2 Flag"]
            #[inline(always)]
            pub fn ma2f(&mut self) -> _MA2FW {
                _MA2FW { w: self }
            }
            #[doc = "Bit 15 - Match 1 Flag"]
            #[inline(always)]
            pub fn ma1f(&mut self) -> _MA1FW {
                _MA1FW { w: self }
            }
            #[doc = "Bit 16 - Parity Error Flag"]
            #[inline(always)]
            pub fn pf(&mut self) -> _PFW {
                _PFW { w: self }
            }
            #[doc = "Bit 17 - Framing Error Flag"]
            #[inline(always)]
            pub fn fe(&mut self) -> _FEW {
                _FEW { w: self }
            }
            #[doc = "Bit 18 - Noise Flag"]
            #[inline(always)]
            pub fn nf(&mut self) -> _NFW {
                _NFW { w: self }
            }
            #[doc = "Bit 19 - Receiver Overrun Flag"]
            #[inline(always)]
            pub fn or(&mut self) -> _ORW {
                _ORW { w: self }
            }
            #[doc = "Bit 20 - Idle Line Flag"]
            #[inline(always)]
            pub fn idle(&mut self) -> _IDLEW {
                _IDLEW { w: self }
            }
            #[doc = "Bit 25 - LIN Break Detection Enable"]
            #[inline(always)]
            pub fn lbkde(&mut self) -> _LBKDEW {
                _LBKDEW { w: self }
            }
            #[doc = "Bit 26 - Break Character Generation Length"]
            #[inline(always)]
            pub fn brk13(&mut self) -> _BRK13W {
                _BRK13W { w: self }
            }
            #[doc = "Bit 27 - Receive Wake Up Idle Detect"]
            #[inline(always)]
            pub fn rwuid(&mut self) -> _RWUIDW {
                _RWUIDW { w: self }
            }
            #[doc = "Bit 28 - Receive Data Inversion"]
            #[inline(always)]
            pub fn rxinv(&mut self) -> _RXINVW {
                _RXINVW { w: self }
            }
            #[doc = "Bit 29 - MSB First"]
            #[inline(always)]
            pub fn msbf(&mut self) -> _MSBFW {
                _MSBFW { w: self }
            }
            #[doc = "Bit 30 - RXD Pin Active Edge Interrupt Flag"]
            #[inline(always)]
            pub fn rxedgif(&mut self) -> _RXEDGIFW {
                _RXEDGIFW { w: self }
            }
            #[doc = "Bit 31 - LIN Break Detect Interrupt Flag"]
            #[inline(always)]
            pub fn lbkdif(&mut self) -> _LBKDIFW {
                _LBKDIFW { w: self }
            }
        }
    }
    #[doc = "LPUART Control Register"]
    pub struct CTRL {
        register: VolatileCell<u32>,
    }
    #[doc = "LPUART Control Register"]
    pub mod ctrl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CTRL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `PT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PTR {
            #[doc = "Even parity."]
            _0,
            #[doc = "Odd parity."]
            _1,
        }
        impl PTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PTR::_0 => false,
                    PTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PTR {
                match value {
                    false => PTR::_0,
                    true => PTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PTR::_1
            }
        }
        #[doc = "Possible values of the field `PE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PER {
            #[doc = "No hardware parity generation or checking."]
            _0,
            #[doc = "Parity enabled."]
            _1,
        }
        impl PER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PER::_0 => false,
                    PER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PER {
                match value {
                    false => PER::_0,
                    true => PER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PER::_1
            }
        }
        #[doc = "Possible values of the field `ILT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ILTR {
            #[doc = "Idle character bit count starts after start bit."]
            _0,
            #[doc = "Idle character bit count starts after stop bit."]
            _1,
        }
        impl ILTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ILTR::_0 => false,
                    ILTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ILTR {
                match value {
                    false => ILTR::_0,
                    true => ILTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ILTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ILTR::_1
            }
        }
        #[doc = "Possible values of the field `WAKE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WAKER {
            #[doc = "Configures RWU for idle-line wakeup."]
            _0,
            #[doc = "Configures RWU with address-mark wakeup."]
            _1,
        }
        impl WAKER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WAKER::_0 => false,
                    WAKER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WAKER {
                match value {
                    false => WAKER::_0,
                    true => WAKER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WAKER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WAKER::_1
            }
        }
        #[doc = "Possible values of the field `M`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MR {
            #[doc = "Receiver and transmitter use 8-bit data characters."]
            _0,
            #[doc = "Receiver and transmitter use 9-bit data characters."]
            _1,
        }
        impl MR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MR::_0 => false,
                    MR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MR {
                match value {
                    false => MR::_0,
                    true => MR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MR::_1
            }
        }
        #[doc = "Possible values of the field `RSRC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RSRCR {
            #[doc = "Provided LOOPS is set, RSRC is cleared, selects internal loop back mode and the LPUART does not use the RXD pin."]
            _0,
            #[doc = "Single-wire LPUART mode where the TXD pin is connected to the transmitter output and receiver input."]
            _1,
        }
        impl RSRCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RSRCR::_0 => false,
                    RSRCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RSRCR {
                match value {
                    false => RSRCR::_0,
                    true => RSRCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RSRCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RSRCR::_1
            }
        }
        #[doc = "Possible values of the field `DOZEEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DOZEENR {
            #[doc = "LPUART is enabled in Doze mode."]
            _0,
            #[doc = "LPUART is disabled in Doze mode."]
            _1,
        }
        impl DOZEENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DOZEENR::_0 => false,
                    DOZEENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DOZEENR {
                match value {
                    false => DOZEENR::_0,
                    true => DOZEENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DOZEENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DOZEENR::_1
            }
        }
        #[doc = "Possible values of the field `LOOPS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LOOPSR {
            #[doc = "Normal operation - RXD and TXD use separate pins."]
            _0,
            #[doc = "Loop mode or single-wire mode where transmitter outputs are internally connected to receiver input (see RSRC bit)."]
            _1,
        }
        impl LOOPSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LOOPSR::_0 => false,
                    LOOPSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LOOPSR {
                match value {
                    false => LOOPSR::_0,
                    true => LOOPSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LOOPSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LOOPSR::_1
            }
        }
        #[doc = "Possible values of the field `IDLECFG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IDLECFGR {
            #[doc = "1 idle character"]
            _000,
            #[doc = "2 idle characters"]
            _001,
            #[doc = "4 idle characters"]
            _010,
            #[doc = "8 idle characters"]
            _011,
            #[doc = "16 idle characters"]
            _100,
            #[doc = "32 idle characters"]
            _101,
            #[doc = "64 idle characters"]
            _110,
            #[doc = "128 idle characters"]
            _111,
        }
        impl IDLECFGR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    IDLECFGR::_000 => 0,
                    IDLECFGR::_001 => 1,
                    IDLECFGR::_010 => 2,
                    IDLECFGR::_011 => 3,
                    IDLECFGR::_100 => 4,
                    IDLECFGR::_101 => 5,
                    IDLECFGR::_110 => 6,
                    IDLECFGR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> IDLECFGR {
                match value {
                    0 => IDLECFGR::_000,
                    1 => IDLECFGR::_001,
                    2 => IDLECFGR::_010,
                    3 => IDLECFGR::_011,
                    4 => IDLECFGR::_100,
                    5 => IDLECFGR::_101,
                    6 => IDLECFGR::_110,
                    7 => IDLECFGR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == IDLECFGR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == IDLECFGR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == IDLECFGR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == IDLECFGR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == IDLECFGR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == IDLECFGR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == IDLECFGR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == IDLECFGR::_111
            }
        }
        #[doc = "Possible values of the field `M7`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum M7R {
            #[doc = "Receiver and transmitter use 8-bit to 10-bit data characters."]
            _0,
            #[doc = "Receiver and transmitter use 7-bit data characters."]
            _1,
        }
        impl M7R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    M7R::_0 => false,
                    M7R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> M7R {
                match value {
                    false => M7R::_0,
                    true => M7R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == M7R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == M7R::_1
            }
        }
        #[doc = "Possible values of the field `MA2IE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MA2IER {
            #[doc = "MA2F interrupt disabled"]
            _0,
            #[doc = "MA2F interrupt enabled"]
            _1,
        }
        impl MA2IER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MA2IER::_0 => false,
                    MA2IER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MA2IER {
                match value {
                    false => MA2IER::_0,
                    true => MA2IER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MA2IER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MA2IER::_1
            }
        }
        #[doc = "Possible values of the field `MA1IE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MA1IER {
            #[doc = "MA1F interrupt disabled"]
            _0,
            #[doc = "MA1F interrupt enabled"]
            _1,
        }
        impl MA1IER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MA1IER::_0 => false,
                    MA1IER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MA1IER {
                match value {
                    false => MA1IER::_0,
                    true => MA1IER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MA1IER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MA1IER::_1
            }
        }
        #[doc = "Possible values of the field `SBK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SBKR {
            #[doc = "Normal transmitter operation."]
            _0,
            #[doc = "Queue break character(s) to be sent."]
            _1,
        }
        impl SBKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SBKR::_0 => false,
                    SBKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SBKR {
                match value {
                    false => SBKR::_0,
                    true => SBKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SBKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SBKR::_1
            }
        }
        #[doc = "Possible values of the field `RWU`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RWUR {
            #[doc = "Normal receiver operation."]
            _0,
            #[doc = "LPUART receiver in standby waiting for wakeup condition."]
            _1,
        }
        impl RWUR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RWUR::_0 => false,
                    RWUR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RWUR {
                match value {
                    false => RWUR::_0,
                    true => RWUR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RWUR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RWUR::_1
            }
        }
        #[doc = "Possible values of the field `RE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RER {
            #[doc = "Receiver disabled."]
            _0,
            #[doc = "Receiver enabled."]
            _1,
        }
        impl RER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RER::_0 => false,
                    RER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RER {
                match value {
                    false => RER::_0,
                    true => RER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RER::_1
            }
        }
        #[doc = "Possible values of the field `TE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TER {
            #[doc = "Transmitter disabled."]
            _0,
            #[doc = "Transmitter enabled."]
            _1,
        }
        impl TER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TER::_0 => false,
                    TER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TER {
                match value {
                    false => TER::_0,
                    true => TER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TER::_1
            }
        }
        #[doc = "Possible values of the field `ILIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ILIER {
            #[doc = "Hardware interrupts from IDLE disabled; use polling."]
            _0,
            #[doc = "Hardware interrupt requested when IDLE flag is 1."]
            _1,
        }
        impl ILIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ILIER::_0 => false,
                    ILIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ILIER {
                match value {
                    false => ILIER::_0,
                    true => ILIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ILIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ILIER::_1
            }
        }
        #[doc = "Possible values of the field `RIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RIER {
            #[doc = "Hardware interrupts from RDRF disabled; use polling."]
            _0,
            #[doc = "Hardware interrupt requested when RDRF flag is 1."]
            _1,
        }
        impl RIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RIER::_0 => false,
                    RIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RIER {
                match value {
                    false => RIER::_0,
                    true => RIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RIER::_1
            }
        }
        #[doc = "Possible values of the field `TCIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TCIER {
            #[doc = "Hardware interrupts from TC disabled; use polling."]
            _0,
            #[doc = "Hardware interrupt requested when TC flag is 1."]
            _1,
        }
        impl TCIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TCIER::_0 => false,
                    TCIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TCIER {
                match value {
                    false => TCIER::_0,
                    true => TCIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TCIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TCIER::_1
            }
        }
        #[doc = "Possible values of the field `TIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TIER {
            #[doc = "Hardware interrupts from TDRE disabled; use polling."]
            _0,
            #[doc = "Hardware interrupt requested when TDRE flag is 1."]
            _1,
        }
        impl TIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TIER::_0 => false,
                    TIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TIER {
                match value {
                    false => TIER::_0,
                    true => TIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TIER::_1
            }
        }
        #[doc = "Possible values of the field `PEIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PEIER {
            #[doc = "PF interrupts disabled; use polling)."]
            _0,
            #[doc = "Hardware interrupt requested when PF is set."]
            _1,
        }
        impl PEIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PEIER::_0 => false,
                    PEIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PEIER {
                match value {
                    false => PEIER::_0,
                    true => PEIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PEIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PEIER::_1
            }
        }
        #[doc = "Possible values of the field `FEIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FEIER {
            #[doc = "FE interrupts disabled; use polling."]
            _0,
            #[doc = "Hardware interrupt requested when FE is set."]
            _1,
        }
        impl FEIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FEIER::_0 => false,
                    FEIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FEIER {
                match value {
                    false => FEIER::_0,
                    true => FEIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FEIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FEIER::_1
            }
        }
        #[doc = "Possible values of the field `NEIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum NEIER {
            #[doc = "NF interrupts disabled; use polling."]
            _0,
            #[doc = "Hardware interrupt requested when NF is set."]
            _1,
        }
        impl NEIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    NEIER::_0 => false,
                    NEIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> NEIER {
                match value {
                    false => NEIER::_0,
                    true => NEIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == NEIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == NEIER::_1
            }
        }
        #[doc = "Possible values of the field `ORIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ORIER {
            #[doc = "OR interrupts disabled; use polling."]
            _0,
            #[doc = "Hardware interrupt requested when OR is set."]
            _1,
        }
        impl ORIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ORIER::_0 => false,
                    ORIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ORIER {
                match value {
                    false => ORIER::_0,
                    true => ORIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ORIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ORIER::_1
            }
        }
        #[doc = "Possible values of the field `TXINV`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXINVR {
            #[doc = "Transmit data not inverted."]
            _0,
            #[doc = "Transmit data inverted."]
            _1,
        }
        impl TXINVR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXINVR::_0 => false,
                    TXINVR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXINVR {
                match value {
                    false => TXINVR::_0,
                    true => TXINVR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXINVR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXINVR::_1
            }
        }
        #[doc = "Possible values of the field `TXDIR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXDIRR {
            #[doc = "TXD pin is an input in single-wire mode."]
            _0,
            #[doc = "TXD pin is an output in single-wire mode."]
            _1,
        }
        impl TXDIRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXDIRR::_0 => false,
                    TXDIRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXDIRR {
                match value {
                    false => TXDIRR::_0,
                    true => TXDIRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXDIRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXDIRR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct R9T8R {
            bits: bool,
        }
        impl R9T8R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct R8T9R {
            bits: bool,
        }
        impl R8T9R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Values that can be written to the field `PT`"]
        pub enum PTW {
            #[doc = "Even parity."]
            _0,
            #[doc = "Odd parity."]
            _1,
        }
        impl PTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PTW::_0 => false,
                    PTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Even parity."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PTW::_0)
            }
            #[doc = "Odd parity."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PE`"]
        pub enum PEW {
            #[doc = "No hardware parity generation or checking."]
            _0,
            #[doc = "Parity enabled."]
            _1,
        }
        impl PEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEW::_0 => false,
                    PEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No hardware parity generation or checking."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEW::_0)
            }
            #[doc = "Parity enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ILT`"]
        pub enum ILTW {
            #[doc = "Idle character bit count starts after start bit."]
            _0,
            #[doc = "Idle character bit count starts after stop bit."]
            _1,
        }
        impl ILTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ILTW::_0 => false,
                    ILTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ILTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ILTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ILTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Idle character bit count starts after start bit."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ILTW::_0)
            }
            #[doc = "Idle character bit count starts after stop bit."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ILTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WAKE`"]
        pub enum WAKEW {
            #[doc = "Configures RWU for idle-line wakeup."]
            _0,
            #[doc = "Configures RWU with address-mark wakeup."]
            _1,
        }
        impl WAKEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WAKEW::_0 => false,
                    WAKEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WAKEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WAKEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WAKEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Configures RWU for idle-line wakeup."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WAKEW::_0)
            }
            #[doc = "Configures RWU with address-mark wakeup."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WAKEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `M`"]
        pub enum MW {
            #[doc = "Receiver and transmitter use 8-bit data characters."]
            _0,
            #[doc = "Receiver and transmitter use 9-bit data characters."]
            _1,
        }
        impl MW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MW::_0 => false,
                    MW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Receiver and transmitter use 8-bit data characters."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MW::_0)
            }
            #[doc = "Receiver and transmitter use 9-bit data characters."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RSRC`"]
        pub enum RSRCW {
            #[doc = "Provided LOOPS is set, RSRC is cleared, selects internal loop back mode and the LPUART does not use the RXD pin."]
            _0,
            #[doc = "Single-wire LPUART mode where the TXD pin is connected to the transmitter output and receiver input."]
            _1,
        }
        impl RSRCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RSRCW::_0 => false,
                    RSRCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RSRCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RSRCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RSRCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Provided LOOPS is set, RSRC is cleared, selects internal loop back mode and the LPUART does not use the RXD pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RSRCW::_0)
            }
            #[doc = "Single-wire LPUART mode where the TXD pin is connected to the transmitter output and receiver input."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RSRCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DOZEEN`"]
        pub enum DOZEENW {
            #[doc = "LPUART is enabled in Doze mode."]
            _0,
            #[doc = "LPUART is disabled in Doze mode."]
            _1,
        }
        impl DOZEENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DOZEENW::_0 => false,
                    DOZEENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DOZEENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DOZEENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DOZEENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "LPUART is enabled in Doze mode."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DOZEENW::_0)
            }
            #[doc = "LPUART is disabled in Doze mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DOZEENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LOOPS`"]
        pub enum LOOPSW {
            #[doc = "Normal operation - RXD and TXD use separate pins."]
            _0,
            #[doc = "Loop mode or single-wire mode where transmitter outputs are internally connected to receiver input (see RSRC bit)."]
            _1,
        }
        impl LOOPSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LOOPSW::_0 => false,
                    LOOPSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LOOPSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LOOPSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LOOPSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Normal operation - RXD and TXD use separate pins."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LOOPSW::_0)
            }
            #[doc = "Loop mode or single-wire mode where transmitter outputs are internally connected to receiver input (see RSRC bit)."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LOOPSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IDLECFG`"]
        pub enum IDLECFGW {
            #[doc = "1 idle character"]
            _000,
            #[doc = "2 idle characters"]
            _001,
            #[doc = "4 idle characters"]
            _010,
            #[doc = "8 idle characters"]
            _011,
            #[doc = "16 idle characters"]
            _100,
            #[doc = "32 idle characters"]
            _101,
            #[doc = "64 idle characters"]
            _110,
            #[doc = "128 idle characters"]
            _111,
        }
        impl IDLECFGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    IDLECFGW::_000 => 0,
                    IDLECFGW::_001 => 1,
                    IDLECFGW::_010 => 2,
                    IDLECFGW::_011 => 3,
                    IDLECFGW::_100 => 4,
                    IDLECFGW::_101 => 5,
                    IDLECFGW::_110 => 6,
                    IDLECFGW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IDLECFGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IDLECFGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IDLECFGW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "1 idle character"]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(IDLECFGW::_000)
            }
            #[doc = "2 idle characters"]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(IDLECFGW::_001)
            }
            #[doc = "4 idle characters"]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(IDLECFGW::_010)
            }
            #[doc = "8 idle characters"]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(IDLECFGW::_011)
            }
            #[doc = "16 idle characters"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(IDLECFGW::_100)
            }
            #[doc = "32 idle characters"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(IDLECFGW::_101)
            }
            #[doc = "64 idle characters"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(IDLECFGW::_110)
            }
            #[doc = "128 idle characters"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(IDLECFGW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `M7`"]
        pub enum M7W {
            #[doc = "Receiver and transmitter use 8-bit to 10-bit data characters."]
            _0,
            #[doc = "Receiver and transmitter use 7-bit data characters."]
            _1,
        }
        impl M7W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    M7W::_0 => false,
                    M7W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _M7W<'a> {
            w: &'a mut W,
        }
        impl<'a> _M7W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: M7W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Receiver and transmitter use 8-bit to 10-bit data characters."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(M7W::_0)
            }
            #[doc = "Receiver and transmitter use 7-bit data characters."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(M7W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MA2IE`"]
        pub enum MA2IEW {
            #[doc = "MA2F interrupt disabled"]
            _0,
            #[doc = "MA2F interrupt enabled"]
            _1,
        }
        impl MA2IEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MA2IEW::_0 => false,
                    MA2IEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MA2IEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MA2IEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MA2IEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "MA2F interrupt disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MA2IEW::_0)
            }
            #[doc = "MA2F interrupt enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MA2IEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MA1IE`"]
        pub enum MA1IEW {
            #[doc = "MA1F interrupt disabled"]
            _0,
            #[doc = "MA1F interrupt enabled"]
            _1,
        }
        impl MA1IEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MA1IEW::_0 => false,
                    MA1IEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MA1IEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MA1IEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MA1IEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "MA1F interrupt disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MA1IEW::_0)
            }
            #[doc = "MA1F interrupt enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MA1IEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SBK`"]
        pub enum SBKW {
            #[doc = "Normal transmitter operation."]
            _0,
            #[doc = "Queue break character(s) to be sent."]
            _1,
        }
        impl SBKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SBKW::_0 => false,
                    SBKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SBKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SBKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SBKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Normal transmitter operation."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SBKW::_0)
            }
            #[doc = "Queue break character(s) to be sent."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SBKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RWU`"]
        pub enum RWUW {
            #[doc = "Normal receiver operation."]
            _0,
            #[doc = "LPUART receiver in standby waiting for wakeup condition."]
            _1,
        }
        impl RWUW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RWUW::_0 => false,
                    RWUW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RWUW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RWUW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RWUW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Normal receiver operation."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RWUW::_0)
            }
            #[doc = "LPUART receiver in standby waiting for wakeup condition."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RWUW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RE`"]
        pub enum REW {
            #[doc = "Receiver disabled."]
            _0,
            #[doc = "Receiver enabled."]
            _1,
        }
        impl REW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    REW::_0 => false,
                    REW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _REW<'a> {
            w: &'a mut W,
        }
        impl<'a> _REW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: REW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Receiver disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(REW::_0)
            }
            #[doc = "Receiver enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(REW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TE`"]
        pub enum TEW {
            #[doc = "Transmitter disabled."]
            _0,
            #[doc = "Transmitter enabled."]
            _1,
        }
        impl TEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TEW::_0 => false,
                    TEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Transmitter disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TEW::_0)
            }
            #[doc = "Transmitter enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 19;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ILIE`"]
        pub enum ILIEW {
            #[doc = "Hardware interrupts from IDLE disabled; use polling."]
            _0,
            #[doc = "Hardware interrupt requested when IDLE flag is 1."]
            _1,
        }
        impl ILIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ILIEW::_0 => false,
                    ILIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ILIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ILIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ILIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Hardware interrupts from IDLE disabled; use polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ILIEW::_0)
            }
            #[doc = "Hardware interrupt requested when IDLE flag is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ILIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RIE`"]
        pub enum RIEW {
            #[doc = "Hardware interrupts from RDRF disabled; use polling."]
            _0,
            #[doc = "Hardware interrupt requested when RDRF flag is 1."]
            _1,
        }
        impl RIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RIEW::_0 => false,
                    RIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Hardware interrupts from RDRF disabled; use polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RIEW::_0)
            }
            #[doc = "Hardware interrupt requested when RDRF flag is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 21;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TCIE`"]
        pub enum TCIEW {
            #[doc = "Hardware interrupts from TC disabled; use polling."]
            _0,
            #[doc = "Hardware interrupt requested when TC flag is 1."]
            _1,
        }
        impl TCIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TCIEW::_0 => false,
                    TCIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TCIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TCIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TCIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Hardware interrupts from TC disabled; use polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TCIEW::_0)
            }
            #[doc = "Hardware interrupt requested when TC flag is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TCIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 22;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TIE`"]
        pub enum TIEW {
            #[doc = "Hardware interrupts from TDRE disabled; use polling."]
            _0,
            #[doc = "Hardware interrupt requested when TDRE flag is 1."]
            _1,
        }
        impl TIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TIEW::_0 => false,
                    TIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Hardware interrupts from TDRE disabled; use polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TIEW::_0)
            }
            #[doc = "Hardware interrupt requested when TDRE flag is 1."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 23;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PEIE`"]
        pub enum PEIEW {
            #[doc = "PF interrupts disabled; use polling)."]
            _0,
            #[doc = "Hardware interrupt requested when PF is set."]
            _1,
        }
        impl PEIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PEIEW::_0 => false,
                    PEIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PEIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "PF interrupts disabled; use polling)."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PEIEW::_0)
            }
            #[doc = "Hardware interrupt requested when PF is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PEIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FEIE`"]
        pub enum FEIEW {
            #[doc = "FE interrupts disabled; use polling."]
            _0,
            #[doc = "Hardware interrupt requested when FE is set."]
            _1,
        }
        impl FEIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FEIEW::_0 => false,
                    FEIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FEIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FEIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FEIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "FE interrupts disabled; use polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FEIEW::_0)
            }
            #[doc = "Hardware interrupt requested when FE is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FEIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 25;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `NEIE`"]
        pub enum NEIEW {
            #[doc = "NF interrupts disabled; use polling."]
            _0,
            #[doc = "Hardware interrupt requested when NF is set."]
            _1,
        }
        impl NEIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    NEIEW::_0 => false,
                    NEIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _NEIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NEIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: NEIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "NF interrupts disabled; use polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(NEIEW::_0)
            }
            #[doc = "Hardware interrupt requested when NF is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(NEIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 26;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ORIE`"]
        pub enum ORIEW {
            #[doc = "OR interrupts disabled; use polling."]
            _0,
            #[doc = "Hardware interrupt requested when OR is set."]
            _1,
        }
        impl ORIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ORIEW::_0 => false,
                    ORIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ORIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ORIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ORIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "OR interrupts disabled; use polling."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ORIEW::_0)
            }
            #[doc = "Hardware interrupt requested when OR is set."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ORIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 27;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TXINV`"]
        pub enum TXINVW {
            #[doc = "Transmit data not inverted."]
            _0,
            #[doc = "Transmit data inverted."]
            _1,
        }
        impl TXINVW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TXINVW::_0 => false,
                    TXINVW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXINVW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXINVW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TXINVW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Transmit data not inverted."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TXINVW::_0)
            }
            #[doc = "Transmit data inverted."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TXINVW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 28;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TXDIR`"]
        pub enum TXDIRW {
            #[doc = "TXD pin is an input in single-wire mode."]
            _0,
            #[doc = "TXD pin is an output in single-wire mode."]
            _1,
        }
        impl TXDIRW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TXDIRW::_0 => false,
                    TXDIRW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXDIRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXDIRW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TXDIRW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "TXD pin is an input in single-wire mode."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TXDIRW::_0)
            }
            #[doc = "TXD pin is an output in single-wire mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TXDIRW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 29;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _R9T8W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R9T8W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _R8T9W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R8T9W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Parity Type"]
            #[inline(always)]
            pub fn pt(&self) -> PTR {
                PTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Parity Enable"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                PER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Idle Line Type Select"]
            #[inline(always)]
            pub fn ilt(&self) -> ILTR {
                ILTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Receiver Wakeup Method Select"]
            #[inline(always)]
            pub fn wake(&self) -> WAKER {
                WAKER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - 9-Bit or 8-Bit Mode Select"]
            #[inline(always)]
            pub fn m(&self) -> MR {
                MR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Receiver Source Select"]
            #[inline(always)]
            pub fn rsrc(&self) -> RSRCR {
                RSRCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Doze Enable"]
            #[inline(always)]
            pub fn dozeen(&self) -> DOZEENR {
                DOZEENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Loop Mode Select"]
            #[inline(always)]
            pub fn loops(&self) -> LOOPSR {
                LOOPSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:10 - Idle Configuration"]
            #[inline(always)]
            pub fn idlecfg(&self) -> IDLECFGR {
                IDLECFGR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 11 - 7-Bit Mode Select"]
            #[inline(always)]
            pub fn m7(&self) -> M7R {
                M7R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - Match 2 Interrupt Enable"]
            #[inline(always)]
            pub fn ma2ie(&self) -> MA2IER {
                MA2IER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - Match 1 Interrupt Enable"]
            #[inline(always)]
            pub fn ma1ie(&self) -> MA1IER {
                MA1IER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 16 - Send Break"]
            #[inline(always)]
            pub fn sbk(&self) -> SBKR {
                SBKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - Receiver Wakeup Control"]
            #[inline(always)]
            pub fn rwu(&self) -> RWUR {
                RWUR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 18 - Receiver Enable"]
            #[inline(always)]
            pub fn re(&self) -> RER {
                RER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 19 - Transmitter Enable"]
            #[inline(always)]
            pub fn te(&self) -> TER {
                TER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 19;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 20 - Idle Line Interrupt Enable"]
            #[inline(always)]
            pub fn ilie(&self) -> ILIER {
                ILIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 21 - Receiver Interrupt Enable"]
            #[inline(always)]
            pub fn rie(&self) -> RIER {
                RIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 22 - Transmission Complete Interrupt Enable for"]
            #[inline(always)]
            pub fn tcie(&self) -> TCIER {
                TCIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 23 - Transmit Interrupt Enable"]
            #[inline(always)]
            pub fn tie(&self) -> TIER {
                TIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 24 - Parity Error Interrupt Enable"]
            #[inline(always)]
            pub fn peie(&self) -> PEIER {
                PEIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 25 - Framing Error Interrupt Enable"]
            #[inline(always)]
            pub fn feie(&self) -> FEIER {
                FEIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 25;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 26 - Noise Error Interrupt Enable"]
            #[inline(always)]
            pub fn neie(&self) -> NEIER {
                NEIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 26;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 27 - Overrun Interrupt Enable"]
            #[inline(always)]
            pub fn orie(&self) -> ORIER {
                ORIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 27;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 28 - Transmit Data Inversion"]
            #[inline(always)]
            pub fn txinv(&self) -> TXINVR {
                TXINVR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 28;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 29 - TXD Pin Direction in Single-Wire Mode"]
            #[inline(always)]
            pub fn txdir(&self) -> TXDIRR {
                TXDIRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 29;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 30 - Receive Bit 9 / Transmit Bit 8"]
            #[inline(always)]
            pub fn r9t8(&self) -> R9T8R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                R9T8R { bits }
            }
            #[doc = "Bit 31 - Receive Bit 8 / Transmit Bit 9"]
            #[inline(always)]
            pub fn r8t9(&self) -> R8T9R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                R8T9R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Parity Type"]
            #[inline(always)]
            pub fn pt(&mut self) -> _PTW {
                _PTW { w: self }
            }
            #[doc = "Bit 1 - Parity Enable"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
            #[doc = "Bit 2 - Idle Line Type Select"]
            #[inline(always)]
            pub fn ilt(&mut self) -> _ILTW {
                _ILTW { w: self }
            }
            #[doc = "Bit 3 - Receiver Wakeup Method Select"]
            #[inline(always)]
            pub fn wake(&mut self) -> _WAKEW {
                _WAKEW { w: self }
            }
            #[doc = "Bit 4 - 9-Bit or 8-Bit Mode Select"]
            #[inline(always)]
            pub fn m(&mut self) -> _MW {
                _MW { w: self }
            }
            #[doc = "Bit 5 - Receiver Source Select"]
            #[inline(always)]
            pub fn rsrc(&mut self) -> _RSRCW {
                _RSRCW { w: self }
            }
            #[doc = "Bit 6 - Doze Enable"]
            #[inline(always)]
            pub fn dozeen(&mut self) -> _DOZEENW {
                _DOZEENW { w: self }
            }
            #[doc = "Bit 7 - Loop Mode Select"]
            #[inline(always)]
            pub fn loops(&mut self) -> _LOOPSW {
                _LOOPSW { w: self }
            }
            #[doc = "Bits 8:10 - Idle Configuration"]
            #[inline(always)]
            pub fn idlecfg(&mut self) -> _IDLECFGW {
                _IDLECFGW { w: self }
            }
            #[doc = "Bit 11 - 7-Bit Mode Select"]
            #[inline(always)]
            pub fn m7(&mut self) -> _M7W {
                _M7W { w: self }
            }
            #[doc = "Bit 14 - Match 2 Interrupt Enable"]
            #[inline(always)]
            pub fn ma2ie(&mut self) -> _MA2IEW {
                _MA2IEW { w: self }
            }
            #[doc = "Bit 15 - Match 1 Interrupt Enable"]
            #[inline(always)]
            pub fn ma1ie(&mut self) -> _MA1IEW {
                _MA1IEW { w: self }
            }
            #[doc = "Bit 16 - Send Break"]
            #[inline(always)]
            pub fn sbk(&mut self) -> _SBKW {
                _SBKW { w: self }
            }
            #[doc = "Bit 17 - Receiver Wakeup Control"]
            #[inline(always)]
            pub fn rwu(&mut self) -> _RWUW {
                _RWUW { w: self }
            }
            #[doc = "Bit 18 - Receiver Enable"]
            #[inline(always)]
            pub fn re(&mut self) -> _REW {
                _REW { w: self }
            }
            #[doc = "Bit 19 - Transmitter Enable"]
            #[inline(always)]
            pub fn te(&mut self) -> _TEW {
                _TEW { w: self }
            }
            #[doc = "Bit 20 - Idle Line Interrupt Enable"]
            #[inline(always)]
            pub fn ilie(&mut self) -> _ILIEW {
                _ILIEW { w: self }
            }
            #[doc = "Bit 21 - Receiver Interrupt Enable"]
            #[inline(always)]
            pub fn rie(&mut self) -> _RIEW {
                _RIEW { w: self }
            }
            #[doc = "Bit 22 - Transmission Complete Interrupt Enable for"]
            #[inline(always)]
            pub fn tcie(&mut self) -> _TCIEW {
                _TCIEW { w: self }
            }
            #[doc = "Bit 23 - Transmit Interrupt Enable"]
            #[inline(always)]
            pub fn tie(&mut self) -> _TIEW {
                _TIEW { w: self }
            }
            #[doc = "Bit 24 - Parity Error Interrupt Enable"]
            #[inline(always)]
            pub fn peie(&mut self) -> _PEIEW {
                _PEIEW { w: self }
            }
            #[doc = "Bit 25 - Framing Error Interrupt Enable"]
            #[inline(always)]
            pub fn feie(&mut self) -> _FEIEW {
                _FEIEW { w: self }
            }
            #[doc = "Bit 26 - Noise Error Interrupt Enable"]
            #[inline(always)]
            pub fn neie(&mut self) -> _NEIEW {
                _NEIEW { w: self }
            }
            #[doc = "Bit 27 - Overrun Interrupt Enable"]
            #[inline(always)]
            pub fn orie(&mut self) -> _ORIEW {
                _ORIEW { w: self }
            }
            #[doc = "Bit 28 - Transmit Data Inversion"]
            #[inline(always)]
            pub fn txinv(&mut self) -> _TXINVW {
                _TXINVW { w: self }
            }
            #[doc = "Bit 29 - TXD Pin Direction in Single-Wire Mode"]
            #[inline(always)]
            pub fn txdir(&mut self) -> _TXDIRW {
                _TXDIRW { w: self }
            }
            #[doc = "Bit 30 - Receive Bit 9 / Transmit Bit 8"]
            #[inline(always)]
            pub fn r9t8(&mut self) -> _R9T8W {
                _R9T8W { w: self }
            }
            #[doc = "Bit 31 - Receive Bit 8 / Transmit Bit 9"]
            #[inline(always)]
            pub fn r8t9(&mut self) -> _R8T9W {
                _R8T9W { w: self }
            }
        }
    }
    #[doc = "LPUART Data Register"]
    pub struct DATA {
        register: VolatileCell<u32>,
    }
    #[doc = "LPUART Data Register"]
    pub mod data {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::DATA {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct R0T0R {
            bits: bool,
        }
        impl R0T0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct R1T1R {
            bits: bool,
        }
        impl R1T1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct R2T2R {
            bits: bool,
        }
        impl R2T2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct R3T3R {
            bits: bool,
        }
        impl R3T3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct R4T4R {
            bits: bool,
        }
        impl R4T4R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct R5T5R {
            bits: bool,
        }
        impl R5T5R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct R6T6R {
            bits: bool,
        }
        impl R6T6R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct R7T7R {
            bits: bool,
        }
        impl R7T7R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct R8T8R {
            bits: bool,
        }
        impl R8T8R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct R9T9R {
            bits: bool,
        }
        impl R9T9R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `IDLINE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IDLINER {
            #[doc = "Receiver was not idle before receiving this character."]
            _0,
            #[doc = "Receiver was idle before receiving this character."]
            _1,
        }
        impl IDLINER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    IDLINER::_0 => false,
                    IDLINER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> IDLINER {
                match value {
                    false => IDLINER::_0,
                    true => IDLINER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == IDLINER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == IDLINER::_1
            }
        }
        #[doc = "Possible values of the field `RXEMPT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXEMPTR {
            #[doc = "Receive buffer contains valid data."]
            _0,
            #[doc = "Receive buffer is empty, data returned on read is not valid."]
            _1,
        }
        impl RXEMPTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXEMPTR::_0 => false,
                    RXEMPTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXEMPTR {
                match value {
                    false => RXEMPTR::_0,
                    true => RXEMPTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXEMPTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RXEMPTR::_1
            }
        }
        #[doc = "Possible values of the field `FRETSC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FRETSCR {
            #[doc = "The dataword was received without a frame error on read, or transmit a normal character on write."]
            _0,
            #[doc = "The dataword was received with a frame error, or transmit an idle or break character on transmit."]
            _1,
        }
        impl FRETSCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FRETSCR::_0 => false,
                    FRETSCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FRETSCR {
                match value {
                    false => FRETSCR::_0,
                    true => FRETSCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FRETSCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FRETSCR::_1
            }
        }
        #[doc = "Possible values of the field `PARITYE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PARITYER {
            #[doc = "The dataword was received without a parity error."]
            _0,
            #[doc = "The dataword was received with a parity error."]
            _1,
        }
        impl PARITYER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PARITYER::_0 => false,
                    PARITYER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PARITYER {
                match value {
                    false => PARITYER::_0,
                    true => PARITYER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PARITYER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PARITYER::_1
            }
        }
        #[doc = "Possible values of the field `NOISY`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum NOISYR {
            #[doc = "The dataword was received without noise."]
            _0,
            #[doc = "The data was received with noise."]
            _1,
        }
        impl NOISYR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    NOISYR::_0 => false,
                    NOISYR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> NOISYR {
                match value {
                    false => NOISYR::_0,
                    true => NOISYR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == NOISYR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == NOISYR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _R0T0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R0T0W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _R1T1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R1T1W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _R2T2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R2T2W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _R3T3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R3T3W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _R4T4W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R4T4W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _R5T5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R5T5W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _R6T6W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R6T6W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _R7T7W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R7T7W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _R8T8W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R8T8W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _R9T9W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R9T9W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FRETSC`"]
        pub enum FRETSCW {
            #[doc = "The dataword was received without a frame error on read, or transmit a normal character on write."]
            _0,
            #[doc = "The dataword was received with a frame error, or transmit an idle or break character on transmit."]
            _1,
        }
        impl FRETSCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FRETSCW::_0 => false,
                    FRETSCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FRETSCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FRETSCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FRETSCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The dataword was received without a frame error on read, or transmit a normal character on write."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FRETSCW::_0)
            }
            #[doc = "The dataword was received with a frame error, or transmit an idle or break character on transmit."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FRETSCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - R0T0"]
            #[inline(always)]
            pub fn r0t0(&self) -> R0T0R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                R0T0R { bits }
            }
            #[doc = "Bit 1 - R1T1"]
            #[inline(always)]
            pub fn r1t1(&self) -> R1T1R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                R1T1R { bits }
            }
            #[doc = "Bit 2 - R2T2"]
            #[inline(always)]
            pub fn r2t2(&self) -> R2T2R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                R2T2R { bits }
            }
            #[doc = "Bit 3 - R3T3"]
            #[inline(always)]
            pub fn r3t3(&self) -> R3T3R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                R3T3R { bits }
            }
            #[doc = "Bit 4 - R4T4"]
            #[inline(always)]
            pub fn r4t4(&self) -> R4T4R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                R4T4R { bits }
            }
            #[doc = "Bit 5 - R5T5"]
            #[inline(always)]
            pub fn r5t5(&self) -> R5T5R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                R5T5R { bits }
            }
            #[doc = "Bit 6 - R6T6"]
            #[inline(always)]
            pub fn r6t6(&self) -> R6T6R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                R6T6R { bits }
            }
            #[doc = "Bit 7 - R7T7"]
            #[inline(always)]
            pub fn r7t7(&self) -> R7T7R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                R7T7R { bits }
            }
            #[doc = "Bit 8 - R8T8"]
            #[inline(always)]
            pub fn r8t8(&self) -> R8T8R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                R8T8R { bits }
            }
            #[doc = "Bit 9 - R9T9"]
            #[inline(always)]
            pub fn r9t9(&self) -> R9T9R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                R9T9R { bits }
            }
            #[doc = "Bit 11 - Idle Line"]
            #[inline(always)]
            pub fn idline(&self) -> IDLINER {
                IDLINER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Receive Buffer Empty"]
            #[inline(always)]
            pub fn rxempt(&self) -> RXEMPTR {
                RXEMPTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Frame Error / Transmit Special Character"]
            #[inline(always)]
            pub fn fretsc(&self) -> FRETSCR {
                FRETSCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - PARITYE"]
            #[inline(always)]
            pub fn paritye(&self) -> PARITYER {
                PARITYER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - NOISY"]
            #[inline(always)]
            pub fn noisy(&self) -> NOISYR {
                NOISYR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 4096 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - R0T0"]
            #[inline(always)]
            pub fn r0t0(&mut self) -> _R0T0W {
                _R0T0W { w: self }
            }
            #[doc = "Bit 1 - R1T1"]
            #[inline(always)]
            pub fn r1t1(&mut self) -> _R1T1W {
                _R1T1W { w: self }
            }
            #[doc = "Bit 2 - R2T2"]
            #[inline(always)]
            pub fn r2t2(&mut self) -> _R2T2W {
                _R2T2W { w: self }
            }
            #[doc = "Bit 3 - R3T3"]
            #[inline(always)]
            pub fn r3t3(&mut self) -> _R3T3W {
                _R3T3W { w: self }
            }
            #[doc = "Bit 4 - R4T4"]
            #[inline(always)]
            pub fn r4t4(&mut self) -> _R4T4W {
                _R4T4W { w: self }
            }
            #[doc = "Bit 5 - R5T5"]
            #[inline(always)]
            pub fn r5t5(&mut self) -> _R5T5W {
                _R5T5W { w: self }
            }
            #[doc = "Bit 6 - R6T6"]
            #[inline(always)]
            pub fn r6t6(&mut self) -> _R6T6W {
                _R6T6W { w: self }
            }
            #[doc = "Bit 7 - R7T7"]
            #[inline(always)]
            pub fn r7t7(&mut self) -> _R7T7W {
                _R7T7W { w: self }
            }
            #[doc = "Bit 8 - R8T8"]
            #[inline(always)]
            pub fn r8t8(&mut self) -> _R8T8W {
                _R8T8W { w: self }
            }
            #[doc = "Bit 9 - R9T9"]
            #[inline(always)]
            pub fn r9t9(&mut self) -> _R9T9W {
                _R9T9W { w: self }
            }
            #[doc = "Bit 13 - Frame Error / Transmit Special Character"]
            #[inline(always)]
            pub fn fretsc(&mut self) -> _FRETSCW {
                _FRETSCW { w: self }
            }
        }
    }
    #[doc = "LPUART Match Address Register"]
    pub struct MATCH {
        register: VolatileCell<u32>,
    }
    #[doc = "LPUART Match Address Register"]
    pub mod match_ {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::MATCH {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct MA1R {
            bits: u16,
        }
        impl MA1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct MA2R {
            bits: u16,
        }
        impl MA2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _MA1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MA1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 1023;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _MA2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _MA2W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 1023;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:9 - Match Address 1"]
            #[inline(always)]
            pub fn ma1(&self) -> MA1R {
                let bits = {
                    const MASK: u16 = 1023;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                MA1R { bits }
            }
            #[doc = "Bits 16:25 - Match Address 2"]
            #[inline(always)]
            pub fn ma2(&self) -> MA2R {
                let bits = {
                    const MASK: u16 = 1023;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                MA2R { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:9 - Match Address 1"]
            #[inline(always)]
            pub fn ma1(&mut self) -> _MA1W {
                _MA1W { w: self }
            }
            #[doc = "Bits 16:25 - Match Address 2"]
            #[inline(always)]
            pub fn ma2(&mut self) -> _MA2W {
                _MA2W { w: self }
            }
        }
    }
    #[doc = "LPUART Modem IrDA Register"]
    pub struct MODIR {
        register: VolatileCell<u32>,
    }
    #[doc = "LPUART Modem IrDA Register"]
    pub mod modir {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::MODIR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `TXCTSE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXCTSER {
            #[doc = "CTS has no effect on the transmitter."]
            _0,
            #[doc = "Enables clear-to-send operation. The transmitter checks the state of CTS each time it is ready to send a character. If CTS is asserted, the character is sent. If CTS is deasserted, the signal TXD remains in the mark state and transmission is delayed until CTS is asserted. Changes in CTS as a character is being sent do not affect its transmission."]
            _1,
        }
        impl TXCTSER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXCTSER::_0 => false,
                    TXCTSER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXCTSER {
                match value {
                    false => TXCTSER::_0,
                    true => TXCTSER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXCTSER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXCTSER::_1
            }
        }
        #[doc = "Possible values of the field `TXRTSE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXRTSER {
            #[doc = "The transmitter has no effect on RTS."]
            _0,
            #[doc = "When a character is placed into an empty transmitter data buffer , RTS asserts one bit time before the start bit is transmitted. RTS deasserts one bit time after all characters in the transmitter data buffer and shift register are completely sent, including the last stop bit."]
            _1,
        }
        impl TXRTSER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXRTSER::_0 => false,
                    TXRTSER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXRTSER {
                match value {
                    false => TXRTSER::_0,
                    true => TXRTSER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXRTSER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXRTSER::_1
            }
        }
        #[doc = "Possible values of the field `TXRTSPOL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXRTSPOLR {
            #[doc = "Transmitter RTS is active low."]
            _0,
            #[doc = "Transmitter RTS is active high."]
            _1,
        }
        impl TXRTSPOLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXRTSPOLR::_0 => false,
                    TXRTSPOLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXRTSPOLR {
                match value {
                    false => TXRTSPOLR::_0,
                    true => TXRTSPOLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXRTSPOLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXRTSPOLR::_1
            }
        }
        #[doc = "Possible values of the field `RXRTSE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXRTSER {
            #[doc = "The receiver has no effect on RTS."]
            _0,
            #[doc = r" Reserved"]
            _Reserved(bool),
        }
        impl RXRTSER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXRTSER::_0 => false,
                    RXRTSER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXRTSER {
                match value {
                    false => RXRTSER::_0,
                    i => RXRTSER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXRTSER::_0
            }
        }
        #[doc = "Possible values of the field `TXCTSC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXCTSCR {
            #[doc = "CTS input is sampled at the start of each character."]
            _0,
            #[doc = "CTS input is sampled when the transmitter is idle."]
            _1,
        }
        impl TXCTSCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXCTSCR::_0 => false,
                    TXCTSCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXCTSCR {
                match value {
                    false => TXCTSCR::_0,
                    true => TXCTSCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXCTSCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXCTSCR::_1
            }
        }
        #[doc = "Possible values of the field `TXCTSSRC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXCTSSRCR {
            #[doc = "CTS input is the CTS_B pin."]
            _0,
            #[doc = "CTS input is the inverted Receiver Match result."]
            _1,
        }
        impl TXCTSSRCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXCTSSRCR::_0 => false,
                    TXCTSSRCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXCTSSRCR {
                match value {
                    false => TXCTSSRCR::_0,
                    true => TXCTSSRCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXCTSSRCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXCTSSRCR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct RTSWATERR {
            bits: u8,
        }
        impl RTSWATERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `TNP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TNPR {
            #[doc = "1/OSR."]
            _00,
            #[doc = "2/OSR."]
            _01,
            #[doc = "3/OSR."]
            _10,
            #[doc = "4/OSR."]
            _11,
        }
        impl TNPR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TNPR::_00 => 0,
                    TNPR::_01 => 1,
                    TNPR::_10 => 2,
                    TNPR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TNPR {
                match value {
                    0 => TNPR::_00,
                    1 => TNPR::_01,
                    2 => TNPR::_10,
                    3 => TNPR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == TNPR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == TNPR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == TNPR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == TNPR::_11
            }
        }
        #[doc = "Possible values of the field `IREN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IRENR {
            #[doc = "IR disabled."]
            _0,
            #[doc = "IR enabled."]
            _1,
        }
        impl IRENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    IRENR::_0 => false,
                    IRENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> IRENR {
                match value {
                    false => IRENR::_0,
                    true => IRENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == IRENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == IRENR::_1
            }
        }
        #[doc = "Values that can be written to the field `TXCTSE`"]
        pub enum TXCTSEW {
            #[doc = "CTS has no effect on the transmitter."]
            _0,
            #[doc = "Enables clear-to-send operation. The transmitter checks the state of CTS each time it is ready to send a character. If CTS is asserted, the character is sent. If CTS is deasserted, the signal TXD remains in the mark state and transmission is delayed until CTS is asserted. Changes in CTS as a character is being sent do not affect its transmission."]
            _1,
        }
        impl TXCTSEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TXCTSEW::_0 => false,
                    TXCTSEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXCTSEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXCTSEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TXCTSEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "CTS has no effect on the transmitter."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TXCTSEW::_0)
            }
            #[doc = "Enables clear-to-send operation. The transmitter checks the state of CTS each time it is ready to send a character. If CTS is asserted, the character is sent. If CTS is deasserted, the signal TXD remains in the mark state and transmission is delayed until CTS is asserted. Changes in CTS as a character is being sent do not affect its transmission."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TXCTSEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TXRTSE`"]
        pub enum TXRTSEW {
            #[doc = "The transmitter has no effect on RTS."]
            _0,
            #[doc = "When a character is placed into an empty transmitter data buffer , RTS asserts one bit time before the start bit is transmitted. RTS deasserts one bit time after all characters in the transmitter data buffer and shift register are completely sent, including the last stop bit."]
            _1,
        }
        impl TXRTSEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TXRTSEW::_0 => false,
                    TXRTSEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXRTSEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXRTSEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TXRTSEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The transmitter has no effect on RTS."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TXRTSEW::_0)
            }
            #[doc = "When a character is placed into an empty transmitter data buffer , RTS asserts one bit time before the start bit is transmitted. RTS deasserts one bit time after all characters in the transmitter data buffer and shift register are completely sent, including the last stop bit."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TXRTSEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TXRTSPOL`"]
        pub enum TXRTSPOLW {
            #[doc = "Transmitter RTS is active low."]
            _0,
            #[doc = "Transmitter RTS is active high."]
            _1,
        }
        impl TXRTSPOLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TXRTSPOLW::_0 => false,
                    TXRTSPOLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXRTSPOLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXRTSPOLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TXRTSPOLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Transmitter RTS is active low."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TXRTSPOLW::_0)
            }
            #[doc = "Transmitter RTS is active high."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TXRTSPOLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RXRTSE`"]
        pub enum RXRTSEW {
            #[doc = "The receiver has no effect on RTS."]
            _0,
        }
        impl RXRTSEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RXRTSEW::_0 => false,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXRTSEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXRTSEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RXRTSEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The receiver has no effect on RTS."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RXRTSEW::_0)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TXCTSC`"]
        pub enum TXCTSCW {
            #[doc = "CTS input is sampled at the start of each character."]
            _0,
            #[doc = "CTS input is sampled when the transmitter is idle."]
            _1,
        }
        impl TXCTSCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TXCTSCW::_0 => false,
                    TXCTSCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXCTSCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXCTSCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TXCTSCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "CTS input is sampled at the start of each character."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TXCTSCW::_0)
            }
            #[doc = "CTS input is sampled when the transmitter is idle."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TXCTSCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TXCTSSRC`"]
        pub enum TXCTSSRCW {
            #[doc = "CTS input is the CTS_B pin."]
            _0,
            #[doc = "CTS input is the inverted Receiver Match result."]
            _1,
        }
        impl TXCTSSRCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TXCTSSRCW::_0 => false,
                    TXCTSSRCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXCTSSRCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXCTSSRCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TXCTSSRCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "CTS input is the CTS_B pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TXCTSSRCW::_0)
            }
            #[doc = "CTS input is the inverted Receiver Match result."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TXCTSSRCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _RTSWATERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RTSWATERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TNP`"]
        pub enum TNPW {
            #[doc = "1/OSR."]
            _00,
            #[doc = "2/OSR."]
            _01,
            #[doc = "3/OSR."]
            _10,
            #[doc = "4/OSR."]
            _11,
        }
        impl TNPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    TNPW::_00 => 0,
                    TNPW::_01 => 1,
                    TNPW::_10 => 2,
                    TNPW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TNPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TNPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TNPW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "1/OSR."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(TNPW::_00)
            }
            #[doc = "2/OSR."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(TNPW::_01)
            }
            #[doc = "3/OSR."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(TNPW::_10)
            }
            #[doc = "4/OSR."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(TNPW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IREN`"]
        pub enum IRENW {
            #[doc = "IR disabled."]
            _0,
            #[doc = "IR enabled."]
            _1,
        }
        impl IRENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    IRENW::_0 => false,
                    IRENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IRENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IRENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IRENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "IR disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(IRENW::_0)
            }
            #[doc = "IR enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(IRENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Transmitter clear-to-send enable"]
            #[inline(always)]
            pub fn txctse(&self) -> TXCTSER {
                TXCTSER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Transmitter request-to-send enable"]
            #[inline(always)]
            pub fn txrtse(&self) -> TXRTSER {
                TXRTSER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Transmitter request-to-send polarity"]
            #[inline(always)]
            pub fn txrtspol(&self) -> TXRTSPOLR {
                TXRTSPOLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Receiver request-to-send enable"]
            #[inline(always)]
            pub fn rxrtse(&self) -> RXRTSER {
                RXRTSER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Transmit CTS Configuration"]
            #[inline(always)]
            pub fn txctsc(&self) -> TXCTSCR {
                TXCTSCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Transmit CTS Source"]
            #[inline(always)]
            pub fn txctssrc(&self) -> TXCTSSRCR {
                TXCTSSRCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:9 - Receive RTS Configuration"]
            #[inline(always)]
            pub fn rtswater(&self) -> RTSWATERR {
                let bits = {
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                RTSWATERR { bits }
            }
            #[doc = "Bits 16:17 - Transmitter narrow pulse"]
            #[inline(always)]
            pub fn tnp(&self) -> TNPR {
                TNPR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 18 - Infrared enable"]
            #[inline(always)]
            pub fn iren(&self) -> IRENR {
                IRENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Transmitter clear-to-send enable"]
            #[inline(always)]
            pub fn txctse(&mut self) -> _TXCTSEW {
                _TXCTSEW { w: self }
            }
            #[doc = "Bit 1 - Transmitter request-to-send enable"]
            #[inline(always)]
            pub fn txrtse(&mut self) -> _TXRTSEW {
                _TXRTSEW { w: self }
            }
            #[doc = "Bit 2 - Transmitter request-to-send polarity"]
            #[inline(always)]
            pub fn txrtspol(&mut self) -> _TXRTSPOLW {
                _TXRTSPOLW { w: self }
            }
            #[doc = "Bit 3 - Receiver request-to-send enable"]
            #[inline(always)]
            pub fn rxrtse(&mut self) -> _RXRTSEW {
                _RXRTSEW { w: self }
            }
            #[doc = "Bit 4 - Transmit CTS Configuration"]
            #[inline(always)]
            pub fn txctsc(&mut self) -> _TXCTSCW {
                _TXCTSCW { w: self }
            }
            #[doc = "Bit 5 - Transmit CTS Source"]
            #[inline(always)]
            pub fn txctssrc(&mut self) -> _TXCTSSRCW {
                _TXCTSSRCW { w: self }
            }
            #[doc = "Bits 8:9 - Receive RTS Configuration"]
            #[inline(always)]
            pub fn rtswater(&mut self) -> _RTSWATERW {
                _RTSWATERW { w: self }
            }
            #[doc = "Bits 16:17 - Transmitter narrow pulse"]
            #[inline(always)]
            pub fn tnp(&mut self) -> _TNPW {
                _TNPW { w: self }
            }
            #[doc = "Bit 18 - Infrared enable"]
            #[inline(always)]
            pub fn iren(&mut self) -> _IRENW {
                _IRENW { w: self }
            }
        }
    }
    #[doc = "LPUART FIFO Register"]
    pub struct FIFO {
        register: VolatileCell<u32>,
    }
    #[doc = "LPUART FIFO Register"]
    pub mod fifo {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::FIFO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `RXFIFOSIZE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXFIFOSIZER {
            #[doc = "Receive FIFO/Buffer depth = 1 dataword."]
            _000,
            #[doc = "Receive FIFO/Buffer depth = 4 datawords."]
            _001,
            #[doc = "Receive FIFO/Buffer depth = 8 datawords."]
            _010,
            #[doc = "Receive FIFO/Buffer depth = 16 datawords."]
            _011,
            #[doc = "Receive FIFO/Buffer depth = 32 datawords."]
            _100,
            #[doc = "Receive FIFO/Buffer depth = 64 datawords."]
            _101,
            #[doc = "Receive FIFO/Buffer depth = 128 datawords."]
            _110,
            #[doc = "Receive FIFO/Buffer depth = 256 datawords."]
            _111,
        }
        impl RXFIFOSIZER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    RXFIFOSIZER::_000 => 0,
                    RXFIFOSIZER::_001 => 1,
                    RXFIFOSIZER::_010 => 2,
                    RXFIFOSIZER::_011 => 3,
                    RXFIFOSIZER::_100 => 4,
                    RXFIFOSIZER::_101 => 5,
                    RXFIFOSIZER::_110 => 6,
                    RXFIFOSIZER::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> RXFIFOSIZER {
                match value {
                    0 => RXFIFOSIZER::_000,
                    1 => RXFIFOSIZER::_001,
                    2 => RXFIFOSIZER::_010,
                    3 => RXFIFOSIZER::_011,
                    4 => RXFIFOSIZER::_100,
                    5 => RXFIFOSIZER::_101,
                    6 => RXFIFOSIZER::_110,
                    7 => RXFIFOSIZER::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == RXFIFOSIZER::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == RXFIFOSIZER::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == RXFIFOSIZER::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == RXFIFOSIZER::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == RXFIFOSIZER::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == RXFIFOSIZER::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == RXFIFOSIZER::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == RXFIFOSIZER::_111
            }
        }
        #[doc = "Possible values of the field `RXFE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXFER {
            #[doc = "Receive FIFO is not enabled. Buffer is depth 1. (Legacy support)"]
            _0,
            #[doc = "Receive FIFO is enabled. Buffer is depth indicted by RXFIFOSIZE."]
            _1,
        }
        impl RXFER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXFER::_0 => false,
                    RXFER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXFER {
                match value {
                    false => RXFER::_0,
                    true => RXFER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXFER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RXFER::_1
            }
        }
        #[doc = "Possible values of the field `TXFIFOSIZE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXFIFOSIZER {
            #[doc = "Transmit FIFO/Buffer depth = 1 dataword."]
            _000,
            #[doc = "Transmit FIFO/Buffer depth = 4 datawords."]
            _001,
            #[doc = "Transmit FIFO/Buffer depth = 8 datawords."]
            _010,
            #[doc = "Transmit FIFO/Buffer depth = 16 datawords."]
            _011,
            #[doc = "Transmit FIFO/Buffer depth = 32 datawords."]
            _100,
            #[doc = "Transmit FIFO/Buffer depth = 64 datawords."]
            _101,
            #[doc = "Transmit FIFO/Buffer depth = 128 datawords."]
            _110,
            #[doc = "Transmit FIFO/Buffer depth = 256 datawords"]
            _111,
        }
        impl TXFIFOSIZER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    TXFIFOSIZER::_000 => 0,
                    TXFIFOSIZER::_001 => 1,
                    TXFIFOSIZER::_010 => 2,
                    TXFIFOSIZER::_011 => 3,
                    TXFIFOSIZER::_100 => 4,
                    TXFIFOSIZER::_101 => 5,
                    TXFIFOSIZER::_110 => 6,
                    TXFIFOSIZER::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> TXFIFOSIZER {
                match value {
                    0 => TXFIFOSIZER::_000,
                    1 => TXFIFOSIZER::_001,
                    2 => TXFIFOSIZER::_010,
                    3 => TXFIFOSIZER::_011,
                    4 => TXFIFOSIZER::_100,
                    5 => TXFIFOSIZER::_101,
                    6 => TXFIFOSIZER::_110,
                    7 => TXFIFOSIZER::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == TXFIFOSIZER::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == TXFIFOSIZER::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == TXFIFOSIZER::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == TXFIFOSIZER::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == TXFIFOSIZER::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == TXFIFOSIZER::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == TXFIFOSIZER::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == TXFIFOSIZER::_111
            }
        }
        #[doc = "Possible values of the field `TXFE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXFER {
            #[doc = "Transmit FIFO is not enabled. Buffer is depth 1. (Legacy support)."]
            _0,
            #[doc = "Transmit FIFO is enabled. Buffer is depth indicated by TXFIFOSIZE."]
            _1,
        }
        impl TXFER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXFER::_0 => false,
                    TXFER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXFER {
                match value {
                    false => TXFER::_0,
                    true => TXFER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXFER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXFER::_1
            }
        }
        #[doc = "Possible values of the field `RXUFE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXUFER {
            #[doc = "RXUF flag does not generate an interrupt to the host."]
            _0,
            #[doc = "RXUF flag generates an interrupt to the host."]
            _1,
        }
        impl RXUFER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXUFER::_0 => false,
                    RXUFER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXUFER {
                match value {
                    false => RXUFER::_0,
                    true => RXUFER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXUFER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RXUFER::_1
            }
        }
        #[doc = "Possible values of the field `TXOFE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXOFER {
            #[doc = "TXOF flag does not generate an interrupt to the host."]
            _0,
            #[doc = "TXOF flag generates an interrupt to the host."]
            _1,
        }
        impl TXOFER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXOFER::_0 => false,
                    TXOFER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXOFER {
                match value {
                    false => TXOFER::_0,
                    true => TXOFER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXOFER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXOFER::_1
            }
        }
        #[doc = "Possible values of the field `RXIDEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXIDENR {
            #[doc = "Disable RDRF assertion due to partially filled FIFO when receiver is idle."]
            _000,
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 1 character."]
            _001,
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 2 characters."]
            _010,
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 4 characters."]
            _011,
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 8 characters."]
            _100,
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 16 characters."]
            _101,
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 32 characters."]
            _110,
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 64 characters."]
            _111,
        }
        impl RXIDENR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    RXIDENR::_000 => 0,
                    RXIDENR::_001 => 1,
                    RXIDENR::_010 => 2,
                    RXIDENR::_011 => 3,
                    RXIDENR::_100 => 4,
                    RXIDENR::_101 => 5,
                    RXIDENR::_110 => 6,
                    RXIDENR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> RXIDENR {
                match value {
                    0 => RXIDENR::_000,
                    1 => RXIDENR::_001,
                    2 => RXIDENR::_010,
                    3 => RXIDENR::_011,
                    4 => RXIDENR::_100,
                    5 => RXIDENR::_101,
                    6 => RXIDENR::_110,
                    7 => RXIDENR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == RXIDENR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == RXIDENR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == RXIDENR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == RXIDENR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == RXIDENR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == RXIDENR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == RXIDENR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == RXIDENR::_111
            }
        }
        #[doc = "Possible values of the field `RXUF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXUFR {
            #[doc = "No receive buffer underflow has occurred since the last time the flag was cleared."]
            _0,
            #[doc = "At least one receive buffer underflow has occurred since the last time the flag was cleared."]
            _1,
        }
        impl RXUFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXUFR::_0 => false,
                    RXUFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXUFR {
                match value {
                    false => RXUFR::_0,
                    true => RXUFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXUFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RXUFR::_1
            }
        }
        #[doc = "Possible values of the field `TXOF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXOFR {
            #[doc = "No transmit buffer overflow has occurred since the last time the flag was cleared."]
            _0,
            #[doc = "At least one transmit buffer overflow has occurred since the last time the flag was cleared."]
            _1,
        }
        impl TXOFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXOFR::_0 => false,
                    TXOFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXOFR {
                match value {
                    false => TXOFR::_0,
                    true => TXOFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXOFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXOFR::_1
            }
        }
        #[doc = "Possible values of the field `RXEMPT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RXEMPTR {
            #[doc = "Receive buffer is not empty."]
            _0,
            #[doc = "Receive buffer is empty."]
            _1,
        }
        impl RXEMPTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RXEMPTR::_0 => false,
                    RXEMPTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RXEMPTR {
                match value {
                    false => RXEMPTR::_0,
                    true => RXEMPTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RXEMPTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RXEMPTR::_1
            }
        }
        #[doc = "Possible values of the field `TXEMPT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TXEMPTR {
            #[doc = "Transmit buffer is not empty."]
            _0,
            #[doc = "Transmit buffer is empty."]
            _1,
        }
        impl TXEMPTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TXEMPTR::_0 => false,
                    TXEMPTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TXEMPTR {
                match value {
                    false => TXEMPTR::_0,
                    true => TXEMPTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TXEMPTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TXEMPTR::_1
            }
        }
        #[doc = "Values that can be written to the field `RXFE`"]
        pub enum RXFEW {
            #[doc = "Receive FIFO is not enabled. Buffer is depth 1. (Legacy support)"]
            _0,
            #[doc = "Receive FIFO is enabled. Buffer is depth indicted by RXFIFOSIZE."]
            _1,
        }
        impl RXFEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RXFEW::_0 => false,
                    RXFEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXFEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXFEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RXFEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Receive FIFO is not enabled. Buffer is depth 1. (Legacy support)"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RXFEW::_0)
            }
            #[doc = "Receive FIFO is enabled. Buffer is depth indicted by RXFIFOSIZE."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RXFEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TXFE`"]
        pub enum TXFEW {
            #[doc = "Transmit FIFO is not enabled. Buffer is depth 1. (Legacy support)."]
            _0,
            #[doc = "Transmit FIFO is enabled. Buffer is depth indicated by TXFIFOSIZE."]
            _1,
        }
        impl TXFEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TXFEW::_0 => false,
                    TXFEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXFEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXFEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TXFEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Transmit FIFO is not enabled. Buffer is depth 1. (Legacy support)."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TXFEW::_0)
            }
            #[doc = "Transmit FIFO is enabled. Buffer is depth indicated by TXFIFOSIZE."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TXFEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RXUFE`"]
        pub enum RXUFEW {
            #[doc = "RXUF flag does not generate an interrupt to the host."]
            _0,
            #[doc = "RXUF flag generates an interrupt to the host."]
            _1,
        }
        impl RXUFEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RXUFEW::_0 => false,
                    RXUFEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXUFEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXUFEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RXUFEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "RXUF flag does not generate an interrupt to the host."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RXUFEW::_0)
            }
            #[doc = "RXUF flag generates an interrupt to the host."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RXUFEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TXOFE`"]
        pub enum TXOFEW {
            #[doc = "TXOF flag does not generate an interrupt to the host."]
            _0,
            #[doc = "TXOF flag generates an interrupt to the host."]
            _1,
        }
        impl TXOFEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TXOFEW::_0 => false,
                    TXOFEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXOFEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXOFEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TXOFEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "TXOF flag does not generate an interrupt to the host."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TXOFEW::_0)
            }
            #[doc = "TXOF flag generates an interrupt to the host."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TXOFEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RXIDEN`"]
        pub enum RXIDENW {
            #[doc = "Disable RDRF assertion due to partially filled FIFO when receiver is idle."]
            _000,
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 1 character."]
            _001,
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 2 characters."]
            _010,
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 4 characters."]
            _011,
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 8 characters."]
            _100,
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 16 characters."]
            _101,
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 32 characters."]
            _110,
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 64 characters."]
            _111,
        }
        impl RXIDENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    RXIDENW::_000 => 0,
                    RXIDENW::_001 => 1,
                    RXIDENW::_010 => 2,
                    RXIDENW::_011 => 3,
                    RXIDENW::_100 => 4,
                    RXIDENW::_101 => 5,
                    RXIDENW::_110 => 6,
                    RXIDENW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXIDENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXIDENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RXIDENW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Disable RDRF assertion due to partially filled FIFO when receiver is idle."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(RXIDENW::_000)
            }
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 1 character."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(RXIDENW::_001)
            }
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 2 characters."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(RXIDENW::_010)
            }
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 4 characters."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(RXIDENW::_011)
            }
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 8 characters."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(RXIDENW::_100)
            }
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 16 characters."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(RXIDENW::_101)
            }
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 32 characters."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(RXIDENW::_110)
            }
            #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 64 characters."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(RXIDENW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RXFLUSH`"]
        pub enum RXFLUSHW {
            #[doc = "No flush operation occurs."]
            _0,
            #[doc = "All data in the receive FIFO/buffer is cleared out."]
            _1,
        }
        impl RXFLUSHW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RXFLUSHW::_0 => false,
                    RXFLUSHW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXFLUSHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXFLUSHW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RXFLUSHW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No flush operation occurs."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RXFLUSHW::_0)
            }
            #[doc = "All data in the receive FIFO/buffer is cleared out."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RXFLUSHW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TXFLUSH`"]
        pub enum TXFLUSHW {
            #[doc = "No flush operation occurs."]
            _0,
            #[doc = "All data in the transmit FIFO/Buffer is cleared out."]
            _1,
        }
        impl TXFLUSHW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TXFLUSHW::_0 => false,
                    TXFLUSHW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXFLUSHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXFLUSHW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TXFLUSHW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No flush operation occurs."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TXFLUSHW::_0)
            }
            #[doc = "All data in the transmit FIFO/Buffer is cleared out."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TXFLUSHW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RXUF`"]
        pub enum RXUFW {
            #[doc = "No receive buffer underflow has occurred since the last time the flag was cleared."]
            _0,
            #[doc = "At least one receive buffer underflow has occurred since the last time the flag was cleared."]
            _1,
        }
        impl RXUFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RXUFW::_0 => false,
                    RXUFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXUFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXUFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RXUFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No receive buffer underflow has occurred since the last time the flag was cleared."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RXUFW::_0)
            }
            #[doc = "At least one receive buffer underflow has occurred since the last time the flag was cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RXUFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TXOF`"]
        pub enum TXOFW {
            #[doc = "No transmit buffer overflow has occurred since the last time the flag was cleared."]
            _0,
            #[doc = "At least one transmit buffer overflow has occurred since the last time the flag was cleared."]
            _1,
        }
        impl TXOFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TXOFW::_0 => false,
                    TXOFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXOFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXOFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TXOFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No transmit buffer overflow has occurred since the last time the flag was cleared."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TXOFW::_0)
            }
            #[doc = "At least one transmit buffer overflow has occurred since the last time the flag was cleared."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TXOFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:2 - Receive FIFO. Buffer Depth"]
            #[inline(always)]
            pub fn rxfifosize(&self) -> RXFIFOSIZER {
                RXFIFOSIZER::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 3 - Receive FIFO Enable"]
            #[inline(always)]
            pub fn rxfe(&self) -> RXFER {
                RXFER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 4:6 - Transmit FIFO. Buffer Depth"]
            #[inline(always)]
            pub fn txfifosize(&self) -> TXFIFOSIZER {
                TXFIFOSIZER::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 7 - Transmit FIFO Enable"]
            #[inline(always)]
            pub fn txfe(&self) -> TXFER {
                TXFER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Receive FIFO Underflow Interrupt Enable"]
            #[inline(always)]
            pub fn rxufe(&self) -> RXUFER {
                RXUFER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Transmit FIFO Overflow Interrupt Enable"]
            #[inline(always)]
            pub fn txofe(&self) -> TXOFER {
                TXOFER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 10:12 - Receiver Idle Empty Enable"]
            #[inline(always)]
            pub fn rxiden(&self) -> RXIDENR {
                RXIDENR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 16 - Receiver Buffer Underflow Flag"]
            #[inline(always)]
            pub fn rxuf(&self) -> RXUFR {
                RXUFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 17 - Transmitter Buffer Overflow Flag"]
            #[inline(always)]
            pub fn txof(&self) -> TXOFR {
                TXOFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 22 - Receive Buffer/FIFO Empty"]
            #[inline(always)]
            pub fn rxempt(&self) -> RXEMPTR {
                RXEMPTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 23 - Transmit Buffer/FIFO Empty"]
            #[inline(always)]
            pub fn txempt(&self) -> TXEMPTR {
                TXEMPTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 12582929 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 3 - Receive FIFO Enable"]
            #[inline(always)]
            pub fn rxfe(&mut self) -> _RXFEW {
                _RXFEW { w: self }
            }
            #[doc = "Bit 7 - Transmit FIFO Enable"]
            #[inline(always)]
            pub fn txfe(&mut self) -> _TXFEW {
                _TXFEW { w: self }
            }
            #[doc = "Bit 8 - Receive FIFO Underflow Interrupt Enable"]
            #[inline(always)]
            pub fn rxufe(&mut self) -> _RXUFEW {
                _RXUFEW { w: self }
            }
            #[doc = "Bit 9 - Transmit FIFO Overflow Interrupt Enable"]
            #[inline(always)]
            pub fn txofe(&mut self) -> _TXOFEW {
                _TXOFEW { w: self }
            }
            #[doc = "Bits 10:12 - Receiver Idle Empty Enable"]
            #[inline(always)]
            pub fn rxiden(&mut self) -> _RXIDENW {
                _RXIDENW { w: self }
            }
            #[doc = "Bit 14 - Receive FIFO/Buffer Flush"]
            #[inline(always)]
            pub fn rxflush(&mut self) -> _RXFLUSHW {
                _RXFLUSHW { w: self }
            }
            #[doc = "Bit 15 - Transmit FIFO/Buffer Flush"]
            #[inline(always)]
            pub fn txflush(&mut self) -> _TXFLUSHW {
                _TXFLUSHW { w: self }
            }
            #[doc = "Bit 16 - Receiver Buffer Underflow Flag"]
            #[inline(always)]
            pub fn rxuf(&mut self) -> _RXUFW {
                _RXUFW { w: self }
            }
            #[doc = "Bit 17 - Transmitter Buffer Overflow Flag"]
            #[inline(always)]
            pub fn txof(&mut self) -> _TXOFW {
                _TXOFW { w: self }
            }
        }
    }
    #[doc = "LPUART Watermark Register"]
    pub struct WATER {
        register: VolatileCell<u32>,
    }
    #[doc = "LPUART Watermark Register"]
    pub mod water {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::WATER {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct TXWATERR {
            bits: u8,
        }
        impl TXWATERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct TXCOUNTR {
            bits: u8,
        }
        impl TXCOUNTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct RXWATERR {
            bits: u8,
        }
        impl RXWATERR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct RXCOUNTR {
            bits: u8,
        }
        impl RXCOUNTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _TXWATERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TXWATERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _RXWATERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RXWATERW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:1 - Transmit Watermark"]
            #[inline(always)]
            pub fn txwater(&self) -> TXWATERR {
                let bits = {
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TXWATERR { bits }
            }
            #[doc = "Bits 8:10 - Transmit Counter"]
            #[inline(always)]
            pub fn txcount(&self) -> TXCOUNTR {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                TXCOUNTR { bits }
            }
            #[doc = "Bits 16:17 - Receive Watermark"]
            #[inline(always)]
            pub fn rxwater(&self) -> RXWATERR {
                let bits = {
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                RXWATERR { bits }
            }
            #[doc = "Bits 24:26 - Receive Counter"]
            #[inline(always)]
            pub fn rxcount(&self) -> RXCOUNTR {
                let bits = {
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                RXCOUNTR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:1 - Transmit Watermark"]
            #[inline(always)]
            pub fn txwater(&mut self) -> _TXWATERW {
                _TXWATERW { w: self }
            }
            #[doc = "Bits 16:17 - Receive Watermark"]
            #[inline(always)]
            pub fn rxwater(&mut self) -> _RXWATERW {
                _RXWATERW { w: self }
            }
        }
    }
}
#[doc = "Universal Asynchronous Receiver/Transmitter"]
pub struct LPUART2 {
    register_block: lpuart2::RegisterBlock,
}
impl Deref for LPUART2 {
    type Target = lpuart2::RegisterBlock;
    fn deref(&self) -> &lpuart2::RegisterBlock {
        &self.register_block
    }
}
#[doc = "High-Speed Comparator (CMP), Voltage Reference (VREF) Digital-to-Analog Converter (DAC), and Analog Mux (ANMUX)"]
pub const CMP0: Peripheral<CMP0> = unsafe { Peripheral::new(1074212864) };
#[doc = "High-Speed Comparator (CMP), Voltage Reference (VREF) Digital-to-Analog Converter (DAC), and Analog Mux (ANMUX)"]
pub mod cmp0 {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - CMP Control Register 0"]
        pub c0: C0,
        #[doc = "0x04 - CMP Control Register 1"]
        pub c1: C1,
        #[doc = "0x08 - CMP Control Register 2"]
        pub c2: C2,
    }
    #[doc = "CMP Control Register 0"]
    pub struct C0 {
        register: VolatileCell<u32>,
    }
    #[doc = "CMP Control Register 0"]
    pub mod c0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `HYSTCTR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HYSTCTRR {
            #[doc = "The hard block output has level 0 hysteresis internally."]
            _00,
            #[doc = "The hard block output has level 1 hysteresis internally."]
            _01,
            #[doc = "The hard block output has level 2 hysteresis internally."]
            _10,
            #[doc = "The hard block output has level 3 hysteresis internally."]
            _11,
        }
        impl HYSTCTRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    HYSTCTRR::_00 => 0,
                    HYSTCTRR::_01 => 1,
                    HYSTCTRR::_10 => 2,
                    HYSTCTRR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> HYSTCTRR {
                match value {
                    0 => HYSTCTRR::_00,
                    1 => HYSTCTRR::_01,
                    2 => HYSTCTRR::_10,
                    3 => HYSTCTRR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == HYSTCTRR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == HYSTCTRR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == HYSTCTRR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == HYSTCTRR::_11
            }
        }
        #[doc = "Possible values of the field `OFFSET`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum OFFSETR {
            #[doc = "The comparator hard block output has level 0 offset internally."]
            _0,
            #[doc = "The comparator hard block output has level 1 offset internally."]
            _1,
        }
        impl OFFSETR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    OFFSETR::_0 => false,
                    OFFSETR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> OFFSETR {
                match value {
                    false => OFFSETR::_0,
                    true => OFFSETR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == OFFSETR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == OFFSETR::_1
            }
        }
        #[doc = "Possible values of the field `FILTER_CNT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FILTER_CNTR {
            #[doc = "Filter is disabled. If SE = 1, then COUT is a logic zero (this is not a legal state, and is not recommended). If SE = 0, COUT = COUTA."]
            _000,
            #[doc = "1 consecutive sample must agree (comparator output is simply sampled)."]
            _001,
            #[doc = "2 consecutive samples must agree."]
            _010,
            #[doc = "3 consecutive samples must agree."]
            _011,
            #[doc = "4 consecutive samples must agree."]
            _100,
            #[doc = "5 consecutive samples must agree."]
            _101,
            #[doc = "6 consecutive samples must agree."]
            _110,
            #[doc = "7 consecutive samples must agree."]
            _111,
        }
        impl FILTER_CNTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    FILTER_CNTR::_000 => 0,
                    FILTER_CNTR::_001 => 1,
                    FILTER_CNTR::_010 => 2,
                    FILTER_CNTR::_011 => 3,
                    FILTER_CNTR::_100 => 4,
                    FILTER_CNTR::_101 => 5,
                    FILTER_CNTR::_110 => 6,
                    FILTER_CNTR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> FILTER_CNTR {
                match value {
                    0 => FILTER_CNTR::_000,
                    1 => FILTER_CNTR::_001,
                    2 => FILTER_CNTR::_010,
                    3 => FILTER_CNTR::_011,
                    4 => FILTER_CNTR::_100,
                    5 => FILTER_CNTR::_101,
                    6 => FILTER_CNTR::_110,
                    7 => FILTER_CNTR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == FILTER_CNTR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == FILTER_CNTR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == FILTER_CNTR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == FILTER_CNTR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == FILTER_CNTR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == FILTER_CNTR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == FILTER_CNTR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == FILTER_CNTR::_111
            }
        }
        #[doc = "Possible values of the field `EN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ENR {
            #[doc = "Analog Comparator is disabled."]
            _0,
            #[doc = "Analog Comparator is enabled."]
            _1,
        }
        impl ENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ENR::_0 => false,
                    ENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ENR {
                match value {
                    false => ENR::_0,
                    true => ENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ENR::_1
            }
        }
        #[doc = "Possible values of the field `OPE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum OPER {
            #[doc = "When OPE is 0, the comparator output (after window/filter settings dependent on software configuration) is not available to a packaged pin."]
            _0,
            #[doc = "When OPE is 1, and if the software has configured the comparator to own a packaged pin, the comparator is available in a packaged pin."]
            _1,
        }
        impl OPER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    OPER::_0 => false,
                    OPER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> OPER {
                match value {
                    false => OPER::_0,
                    true => OPER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == OPER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == OPER::_1
            }
        }
        #[doc = "Possible values of the field `COS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum COSR {
            #[doc = "Set CMPO to equal COUT (filtered comparator output)."]
            _0,
            #[doc = "Set CMPO to equal COUTA (unfiltered comparator output)."]
            _1,
        }
        impl COSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    COSR::_0 => false,
                    COSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> COSR {
                match value {
                    false => COSR::_0,
                    true => COSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == COSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == COSR::_1
            }
        }
        #[doc = "Possible values of the field `INVT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INVTR {
            #[doc = "Does not invert the comparator output."]
            _0,
            #[doc = "Inverts the comparator output."]
            _1,
        }
        impl INVTR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INVTR::_0 => false,
                    INVTR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INVTR {
                match value {
                    false => INVTR::_0,
                    true => INVTR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INVTR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INVTR::_1
            }
        }
        #[doc = "Possible values of the field `PMODE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PMODER {
            #[doc = "Low Speed (LS) comparison mode is selected."]
            _0,
            #[doc = "High Speed (HS) comparison mode is selected, in VLPx mode, or Stop mode switched to Low Speed (LS) mode."]
            _1,
        }
        impl PMODER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PMODER::_0 => false,
                    PMODER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PMODER {
                match value {
                    false => PMODER::_0,
                    true => PMODER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PMODER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PMODER::_1
            }
        }
        #[doc = "Possible values of the field `WE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WER {
            #[doc = "Windowing mode is not selected."]
            _0,
            #[doc = "Windowing mode is selected."]
            _1,
        }
        impl WER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WER::_0 => false,
                    WER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WER {
                match value {
                    false => WER::_0,
                    true => WER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WER::_1
            }
        }
        #[doc = "Possible values of the field `SE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SER {
            #[doc = "Sampling mode is not selected."]
            _0,
            #[doc = "Sampling mode is selected."]
            _1,
        }
        impl SER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SER::_0 => false,
                    SER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SER {
                match value {
                    false => SER::_0,
                    true => SER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SER::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct FPRR {
            bits: u8,
        }
        impl FPRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct COUTR {
            bits: bool,
        }
        impl COUTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `CFF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CFFR {
            #[doc = "A falling edge has not been detected on COUT."]
            _0,
            #[doc = "A falling edge on COUT has occurred."]
            _1,
        }
        impl CFFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CFFR::_0 => false,
                    CFFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CFFR {
                match value {
                    false => CFFR::_0,
                    true => CFFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CFFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CFFR::_1
            }
        }
        #[doc = "Possible values of the field `CFR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CFRR {
            #[doc = "A rising edge has not been detected on COUT."]
            _0,
            #[doc = "A rising edge on COUT has occurred."]
            _1,
        }
        impl CFRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CFRR::_0 => false,
                    CFRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CFRR {
                match value {
                    false => CFRR::_0,
                    true => CFRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CFRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CFRR::_1
            }
        }
        #[doc = "Possible values of the field `IEF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IEFR {
            #[doc = "Interrupt is disabled."]
            _0,
            #[doc = "Interrupt is enabled."]
            _1,
        }
        impl IEFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    IEFR::_0 => false,
                    IEFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> IEFR {
                match value {
                    false => IEFR::_0,
                    true => IEFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == IEFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == IEFR::_1
            }
        }
        #[doc = "Possible values of the field `IER`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum IERR {
            #[doc = "Interrupt is disabled."]
            _0,
            #[doc = "Interrupt is enabled."]
            _1,
        }
        impl IERR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    IERR::_0 => false,
                    IERR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> IERR {
                match value {
                    false => IERR::_0,
                    true => IERR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == IERR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == IERR::_1
            }
        }
        #[doc = "Possible values of the field `DMAEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DMAENR {
            #[doc = "DMA is disabled."]
            _0,
            #[doc = "DMA is enabled."]
            _1,
        }
        impl DMAENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DMAENR::_0 => false,
                    DMAENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DMAENR {
                match value {
                    false => DMAENR::_0,
                    true => DMAENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DMAENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DMAENR::_1
            }
        }
        #[doc = "Values that can be written to the field `HYSTCTR`"]
        pub enum HYSTCTRW {
            #[doc = "The hard block output has level 0 hysteresis internally."]
            _00,
            #[doc = "The hard block output has level 1 hysteresis internally."]
            _01,
            #[doc = "The hard block output has level 2 hysteresis internally."]
            _10,
            #[doc = "The hard block output has level 3 hysteresis internally."]
            _11,
        }
        impl HYSTCTRW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    HYSTCTRW::_00 => 0,
                    HYSTCTRW::_01 => 1,
                    HYSTCTRW::_10 => 2,
                    HYSTCTRW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _HYSTCTRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _HYSTCTRW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: HYSTCTRW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "The hard block output has level 0 hysteresis internally."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(HYSTCTRW::_00)
            }
            #[doc = "The hard block output has level 1 hysteresis internally."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(HYSTCTRW::_01)
            }
            #[doc = "The hard block output has level 2 hysteresis internally."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(HYSTCTRW::_10)
            }
            #[doc = "The hard block output has level 3 hysteresis internally."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(HYSTCTRW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `OFFSET`"]
        pub enum OFFSETW {
            #[doc = "The comparator hard block output has level 0 offset internally."]
            _0,
            #[doc = "The comparator hard block output has level 1 offset internally."]
            _1,
        }
        impl OFFSETW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    OFFSETW::_0 => false,
                    OFFSETW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _OFFSETW<'a> {
            w: &'a mut W,
        }
        impl<'a> _OFFSETW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: OFFSETW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The comparator hard block output has level 0 offset internally."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(OFFSETW::_0)
            }
            #[doc = "The comparator hard block output has level 1 offset internally."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(OFFSETW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FILTER_CNT`"]
        pub enum FILTER_CNTW {
            #[doc = "Filter is disabled. If SE = 1, then COUT is a logic zero (this is not a legal state, and is not recommended). If SE = 0, COUT = COUTA."]
            _000,
            #[doc = "1 consecutive sample must agree (comparator output is simply sampled)."]
            _001,
            #[doc = "2 consecutive samples must agree."]
            _010,
            #[doc = "3 consecutive samples must agree."]
            _011,
            #[doc = "4 consecutive samples must agree."]
            _100,
            #[doc = "5 consecutive samples must agree."]
            _101,
            #[doc = "6 consecutive samples must agree."]
            _110,
            #[doc = "7 consecutive samples must agree."]
            _111,
        }
        impl FILTER_CNTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    FILTER_CNTW::_000 => 0,
                    FILTER_CNTW::_001 => 1,
                    FILTER_CNTW::_010 => 2,
                    FILTER_CNTW::_011 => 3,
                    FILTER_CNTW::_100 => 4,
                    FILTER_CNTW::_101 => 5,
                    FILTER_CNTW::_110 => 6,
                    FILTER_CNTW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FILTER_CNTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FILTER_CNTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FILTER_CNTW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Filter is disabled. If SE = 1, then COUT is a logic zero (this is not a legal state, and is not recommended). If SE = 0, COUT = COUTA."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(FILTER_CNTW::_000)
            }
            #[doc = "1 consecutive sample must agree (comparator output is simply sampled)."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(FILTER_CNTW::_001)
            }
            #[doc = "2 consecutive samples must agree."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(FILTER_CNTW::_010)
            }
            #[doc = "3 consecutive samples must agree."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(FILTER_CNTW::_011)
            }
            #[doc = "4 consecutive samples must agree."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(FILTER_CNTW::_100)
            }
            #[doc = "5 consecutive samples must agree."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(FILTER_CNTW::_101)
            }
            #[doc = "6 consecutive samples must agree."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(FILTER_CNTW::_110)
            }
            #[doc = "7 consecutive samples must agree."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(FILTER_CNTW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `EN`"]
        pub enum ENW {
            #[doc = "Analog Comparator is disabled."]
            _0,
            #[doc = "Analog Comparator is enabled."]
            _1,
        }
        impl ENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ENW::_0 => false,
                    ENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Analog Comparator is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ENW::_0)
            }
            #[doc = "Analog Comparator is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `OPE`"]
        pub enum OPEW {
            #[doc = "When OPE is 0, the comparator output (after window/filter settings dependent on software configuration) is not available to a packaged pin."]
            _0,
            #[doc = "When OPE is 1, and if the software has configured the comparator to own a packaged pin, the comparator is available in a packaged pin."]
            _1,
        }
        impl OPEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    OPEW::_0 => false,
                    OPEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _OPEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _OPEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: OPEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "When OPE is 0, the comparator output (after window/filter settings dependent on software configuration) is not available to a packaged pin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(OPEW::_0)
            }
            #[doc = "When OPE is 1, and if the software has configured the comparator to own a packaged pin, the comparator is available in a packaged pin."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(OPEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `COS`"]
        pub enum COSW {
            #[doc = "Set CMPO to equal COUT (filtered comparator output)."]
            _0,
            #[doc = "Set CMPO to equal COUTA (unfiltered comparator output)."]
            _1,
        }
        impl COSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    COSW::_0 => false,
                    COSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _COSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _COSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: COSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Set CMPO to equal COUT (filtered comparator output)."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(COSW::_0)
            }
            #[doc = "Set CMPO to equal COUTA (unfiltered comparator output)."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(COSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INVT`"]
        pub enum INVTW {
            #[doc = "Does not invert the comparator output."]
            _0,
            #[doc = "Inverts the comparator output."]
            _1,
        }
        impl INVTW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INVTW::_0 => false,
                    INVTW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INVTW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INVTW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INVTW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Does not invert the comparator output."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INVTW::_0)
            }
            #[doc = "Inverts the comparator output."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INVTW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PMODE`"]
        pub enum PMODEW {
            #[doc = "Low Speed (LS) comparison mode is selected."]
            _0,
            #[doc = "High Speed (HS) comparison mode is selected, in VLPx mode, or Stop mode switched to Low Speed (LS) mode."]
            _1,
        }
        impl PMODEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PMODEW::_0 => false,
                    PMODEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PMODEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PMODEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PMODEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Low Speed (LS) comparison mode is selected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PMODEW::_0)
            }
            #[doc = "High Speed (HS) comparison mode is selected, in VLPx mode, or Stop mode switched to Low Speed (LS) mode."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PMODEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WE`"]
        pub enum WEW {
            #[doc = "Windowing mode is not selected."]
            _0,
            #[doc = "Windowing mode is selected."]
            _1,
        }
        impl WEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WEW::_0 => false,
                    WEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Windowing mode is not selected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WEW::_0)
            }
            #[doc = "Windowing mode is selected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SE`"]
        pub enum SEW {
            #[doc = "Sampling mode is not selected."]
            _0,
            #[doc = "Sampling mode is selected."]
            _1,
        }
        impl SEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SEW::_0 => false,
                    SEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Sampling mode is not selected."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SEW::_0)
            }
            #[doc = "Sampling mode is selected."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _FPRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FPRW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CFF`"]
        pub enum CFFW {
            #[doc = "A falling edge has not been detected on COUT."]
            _0,
            #[doc = "A falling edge on COUT has occurred."]
            _1,
        }
        impl CFFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CFFW::_0 => false,
                    CFFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CFFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CFFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CFFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "A falling edge has not been detected on COUT."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CFFW::_0)
            }
            #[doc = "A falling edge on COUT has occurred."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CFFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 25;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CFR`"]
        pub enum CFRW {
            #[doc = "A rising edge has not been detected on COUT."]
            _0,
            #[doc = "A rising edge on COUT has occurred."]
            _1,
        }
        impl CFRW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CFRW::_0 => false,
                    CFRW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CFRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CFRW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CFRW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "A rising edge has not been detected on COUT."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CFRW::_0)
            }
            #[doc = "A rising edge on COUT has occurred."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CFRW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 26;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IEF`"]
        pub enum IEFW {
            #[doc = "Interrupt is disabled."]
            _0,
            #[doc = "Interrupt is enabled."]
            _1,
        }
        impl IEFW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    IEFW::_0 => false,
                    IEFW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IEFW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IEFW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IEFW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(IEFW::_0)
            }
            #[doc = "Interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(IEFW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 27;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `IER`"]
        pub enum IERW {
            #[doc = "Interrupt is disabled."]
            _0,
            #[doc = "Interrupt is enabled."]
            _1,
        }
        impl IERW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    IERW::_0 => false,
                    IERW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _IERW<'a> {
            w: &'a mut W,
        }
        impl<'a> _IERW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: IERW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(IERW::_0)
            }
            #[doc = "Interrupt is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(IERW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 28;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DMAEN`"]
        pub enum DMAENW {
            #[doc = "DMA is disabled."]
            _0,
            #[doc = "DMA is enabled."]
            _1,
        }
        impl DMAENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DMAENW::_0 => false,
                    DMAENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DMAENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DMAENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DMAENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DMA is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DMAENW::_0)
            }
            #[doc = "DMA is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DMAENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:1 - Comparator hard block hysteresis control. See chip data sheet to get the actual hystersis value with each level"]
            #[inline(always)]
            pub fn hystctr(&self) -> HYSTCTRR {
                HYSTCTRR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 2 - Comparator hard block offset control. See chip data sheet to get the actual offset value with each level"]
            #[inline(always)]
            pub fn offset(&self) -> OFFSETR {
                OFFSETR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 4:6 - Filter Sample Count"]
            #[inline(always)]
            pub fn filter_cnt(&self) -> FILTER_CNTR {
                FILTER_CNTR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 8 - Comparator Module Enable"]
            #[inline(always)]
            pub fn en(&self) -> ENR {
                ENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Comparator Output Pin Enable"]
            #[inline(always)]
            pub fn ope(&self) -> OPER {
                OPER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Comparator Output Select"]
            #[inline(always)]
            pub fn cos(&self) -> COSR {
                COSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 11 - Comparator invert"]
            #[inline(always)]
            pub fn invt(&self) -> INVTR {
                INVTR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - Power Mode Select"]
            #[inline(always)]
            pub fn pmode(&self) -> PMODER {
                PMODER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 14 - Windowing Enable"]
            #[inline(always)]
            pub fn we(&self) -> WER {
                WER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - Sample Enable"]
            #[inline(always)]
            pub fn se(&self) -> SER {
                SER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 16:23 - Filter Sample Period"]
            #[inline(always)]
            pub fn fpr(&self) -> FPRR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                FPRR { bits }
            }
            #[doc = "Bit 24 - Analog Comparator Output"]
            #[inline(always)]
            pub fn cout(&self) -> COUTR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                COUTR { bits }
            }
            #[doc = "Bit 25 - Analog Comparator Flag Falling"]
            #[inline(always)]
            pub fn cff(&self) -> CFFR {
                CFFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 25;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 26 - Analog Comparator Flag Rising"]
            #[inline(always)]
            pub fn cfr(&self) -> CFRR {
                CFRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 26;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 27 - Comparator Interrupt Enable Falling"]
            #[inline(always)]
            pub fn ief(&self) -> IEFR {
                IEFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 27;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 28 - Comparator Interrupt Enable Rising"]
            #[inline(always)]
            pub fn ier(&self) -> IERR {
                IERR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 28;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 30 - DMA Enable"]
            #[inline(always)]
            pub fn dmaen(&self) -> DMAENR {
                DMAENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:1 - Comparator hard block hysteresis control. See chip data sheet to get the actual hystersis value with each level"]
            #[inline(always)]
            pub fn hystctr(&mut self) -> _HYSTCTRW {
                _HYSTCTRW { w: self }
            }
            #[doc = "Bit 2 - Comparator hard block offset control. See chip data sheet to get the actual offset value with each level"]
            #[inline(always)]
            pub fn offset(&mut self) -> _OFFSETW {
                _OFFSETW { w: self }
            }
            #[doc = "Bits 4:6 - Filter Sample Count"]
            #[inline(always)]
            pub fn filter_cnt(&mut self) -> _FILTER_CNTW {
                _FILTER_CNTW { w: self }
            }
            #[doc = "Bit 8 - Comparator Module Enable"]
            #[inline(always)]
            pub fn en(&mut self) -> _ENW {
                _ENW { w: self }
            }
            #[doc = "Bit 9 - Comparator Output Pin Enable"]
            #[inline(always)]
            pub fn ope(&mut self) -> _OPEW {
                _OPEW { w: self }
            }
            #[doc = "Bit 10 - Comparator Output Select"]
            #[inline(always)]
            pub fn cos(&mut self) -> _COSW {
                _COSW { w: self }
            }
            #[doc = "Bit 11 - Comparator invert"]
            #[inline(always)]
            pub fn invt(&mut self) -> _INVTW {
                _INVTW { w: self }
            }
            #[doc = "Bit 12 - Power Mode Select"]
            #[inline(always)]
            pub fn pmode(&mut self) -> _PMODEW {
                _PMODEW { w: self }
            }
            #[doc = "Bit 14 - Windowing Enable"]
            #[inline(always)]
            pub fn we(&mut self) -> _WEW {
                _WEW { w: self }
            }
            #[doc = "Bit 15 - Sample Enable"]
            #[inline(always)]
            pub fn se(&mut self) -> _SEW {
                _SEW { w: self }
            }
            #[doc = "Bits 16:23 - Filter Sample Period"]
            #[inline(always)]
            pub fn fpr(&mut self) -> _FPRW {
                _FPRW { w: self }
            }
            #[doc = "Bit 25 - Analog Comparator Flag Falling"]
            #[inline(always)]
            pub fn cff(&mut self) -> _CFFW {
                _CFFW { w: self }
            }
            #[doc = "Bit 26 - Analog Comparator Flag Rising"]
            #[inline(always)]
            pub fn cfr(&mut self) -> _CFRW {
                _CFRW { w: self }
            }
            #[doc = "Bit 27 - Comparator Interrupt Enable Falling"]
            #[inline(always)]
            pub fn ief(&mut self) -> _IEFW {
                _IEFW { w: self }
            }
            #[doc = "Bit 28 - Comparator Interrupt Enable Rising"]
            #[inline(always)]
            pub fn ier(&mut self) -> _IERW {
                _IERW { w: self }
            }
            #[doc = "Bit 30 - DMA Enable"]
            #[inline(always)]
            pub fn dmaen(&mut self) -> _DMAENW {
                _DMAENW { w: self }
            }
        }
    }
    #[doc = "CMP Control Register 1"]
    pub struct C1 {
        register: VolatileCell<u32>,
    }
    #[doc = "CMP Control Register 1"]
    pub mod c1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct VOSELR {
            bits: u8,
        }
        impl VOSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `MSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MSELR {
            #[doc = "IN0"]
            _000,
            #[doc = "IN1"]
            _001,
            #[doc = "IN2"]
            _010,
            #[doc = "IN3"]
            _011,
            #[doc = "IN4"]
            _100,
            #[doc = "IN5"]
            _101,
            #[doc = "IN6"]
            _110,
            #[doc = "IN7"]
            _111,
        }
        impl MSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MSELR::_000 => 0,
                    MSELR::_001 => 1,
                    MSELR::_010 => 2,
                    MSELR::_011 => 3,
                    MSELR::_100 => 4,
                    MSELR::_101 => 5,
                    MSELR::_110 => 6,
                    MSELR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MSELR {
                match value {
                    0 => MSELR::_000,
                    1 => MSELR::_001,
                    2 => MSELR::_010,
                    3 => MSELR::_011,
                    4 => MSELR::_100,
                    5 => MSELR::_101,
                    6 => MSELR::_110,
                    7 => MSELR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MSELR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MSELR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MSELR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == MSELR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == MSELR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == MSELR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == MSELR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == MSELR::_111
            }
        }
        #[doc = "Possible values of the field `PSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PSELR {
            #[doc = "IN0"]
            _000,
            #[doc = "IN1"]
            _001,
            #[doc = "IN2"]
            _010,
            #[doc = "IN3"]
            _011,
            #[doc = "IN4"]
            _100,
            #[doc = "IN5"]
            _101,
            #[doc = "IN6"]
            _110,
            #[doc = "IN7"]
            _111,
        }
        impl PSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PSELR::_000 => 0,
                    PSELR::_001 => 1,
                    PSELR::_010 => 2,
                    PSELR::_011 => 3,
                    PSELR::_100 => 4,
                    PSELR::_101 => 5,
                    PSELR::_110 => 6,
                    PSELR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PSELR {
                match value {
                    0 => PSELR::_000,
                    1 => PSELR::_001,
                    2 => PSELR::_010,
                    3 => PSELR::_011,
                    4 => PSELR::_100,
                    5 => PSELR::_101,
                    6 => PSELR::_110,
                    7 => PSELR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == PSELR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == PSELR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == PSELR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == PSELR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == PSELR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == PSELR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == PSELR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == PSELR::_111
            }
        }
        #[doc = "Possible values of the field `VRSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum VRSELR {
            #[doc = "Vin1 is selected as resistor ladder network supply reference Vin."]
            _0,
            #[doc = "Vin2 is selected as resistor ladder network supply reference Vin."]
            _1,
        }
        impl VRSELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    VRSELR::_0 => false,
                    VRSELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> VRSELR {
                match value {
                    false => VRSELR::_0,
                    true => VRSELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == VRSELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == VRSELR::_1
            }
        }
        #[doc = "Possible values of the field `DACEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DACENR {
            #[doc = "DAC is disabled."]
            _0,
            #[doc = "DAC is enabled."]
            _1,
        }
        impl DACENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    DACENR::_0 => false,
                    DACENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> DACENR {
                match value {
                    false => DACENR::_0,
                    true => DACENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == DACENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == DACENR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct CHN0R {
            bits: bool,
        }
        impl CHN0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct CHN1R {
            bits: bool,
        }
        impl CHN1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct CHN2R {
            bits: bool,
        }
        impl CHN2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct CHN3R {
            bits: bool,
        }
        impl CHN3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct CHN4R {
            bits: bool,
        }
        impl CHN4R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct CHN5R {
            bits: bool,
        }
        impl CHN5R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct CHN6R {
            bits: bool,
        }
        impl CHN6R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct CHN7R {
            bits: bool,
        }
        impl CHN7R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `INNSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INNSELR {
            #[doc = "IN0, from the 8-bit DAC output"]
            _00,
            #[doc = "IN1, from the analog 8-1 mux"]
            _01,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl INNSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    INNSELR::_00 => 0,
                    INNSELR::_01 => 1,
                    INNSELR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> INNSELR {
                match value {
                    0 => INNSELR::_00,
                    1 => INNSELR::_01,
                    i => INNSELR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == INNSELR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == INNSELR::_01
            }
        }
        #[doc = "Possible values of the field `INPSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INPSELR {
            #[doc = "IN0, from the 8-bit DAC output"]
            _00,
            #[doc = "IN1, from the analog 8-1 mux"]
            _01,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl INPSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    INPSELR::_00 => 0,
                    INPSELR::_01 => 1,
                    INPSELR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> INPSELR {
                match value {
                    0 => INPSELR::_00,
                    1 => INPSELR::_01,
                    i => INPSELR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == INPSELR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == INPSELR::_01
            }
        }
        #[doc = r" Proxy"]
        pub struct _VOSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _VOSELW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MSEL`"]
        pub enum MSELW {
            #[doc = "IN0"]
            _000,
            #[doc = "IN1"]
            _001,
            #[doc = "IN2"]
            _010,
            #[doc = "IN3"]
            _011,
            #[doc = "IN4"]
            _100,
            #[doc = "IN5"]
            _101,
            #[doc = "IN6"]
            _110,
            #[doc = "IN7"]
            _111,
        }
        impl MSELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    MSELW::_000 => 0,
                    MSELW::_001 => 1,
                    MSELW::_010 => 2,
                    MSELW::_011 => 3,
                    MSELW::_100 => 4,
                    MSELW::_101 => 5,
                    MSELW::_110 => 6,
                    MSELW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MSELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MSELW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "IN0"]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(MSELW::_000)
            }
            #[doc = "IN1"]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(MSELW::_001)
            }
            #[doc = "IN2"]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(MSELW::_010)
            }
            #[doc = "IN3"]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(MSELW::_011)
            }
            #[doc = "IN4"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(MSELW::_100)
            }
            #[doc = "IN5"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(MSELW::_101)
            }
            #[doc = "IN6"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(MSELW::_110)
            }
            #[doc = "IN7"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(MSELW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PSEL`"]
        pub enum PSELW {
            #[doc = "IN0"]
            _000,
            #[doc = "IN1"]
            _001,
            #[doc = "IN2"]
            _010,
            #[doc = "IN3"]
            _011,
            #[doc = "IN4"]
            _100,
            #[doc = "IN5"]
            _101,
            #[doc = "IN6"]
            _110,
            #[doc = "IN7"]
            _111,
        }
        impl PSELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    PSELW::_000 => 0,
                    PSELW::_001 => 1,
                    PSELW::_010 => 2,
                    PSELW::_011 => 3,
                    PSELW::_100 => 4,
                    PSELW::_101 => 5,
                    PSELW::_110 => 6,
                    PSELW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PSELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PSELW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "IN0"]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(PSELW::_000)
            }
            #[doc = "IN1"]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(PSELW::_001)
            }
            #[doc = "IN2"]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(PSELW::_010)
            }
            #[doc = "IN3"]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(PSELW::_011)
            }
            #[doc = "IN4"]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(PSELW::_100)
            }
            #[doc = "IN5"]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(PSELW::_101)
            }
            #[doc = "IN6"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(PSELW::_110)
            }
            #[doc = "IN7"]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(PSELW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `VRSEL`"]
        pub enum VRSELW {
            #[doc = "Vin1 is selected as resistor ladder network supply reference Vin."]
            _0,
            #[doc = "Vin2 is selected as resistor ladder network supply reference Vin."]
            _1,
        }
        impl VRSELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    VRSELW::_0 => false,
                    VRSELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _VRSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _VRSELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: VRSELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Vin1 is selected as resistor ladder network supply reference Vin."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(VRSELW::_0)
            }
            #[doc = "Vin2 is selected as resistor ladder network supply reference Vin."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(VRSELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `DACEN`"]
        pub enum DACENW {
            #[doc = "DAC is disabled."]
            _0,
            #[doc = "DAC is enabled."]
            _1,
        }
        impl DACENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    DACENW::_0 => false,
                    DACENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DACENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DACENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DACENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "DAC is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(DACENW::_0)
            }
            #[doc = "DAC is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(DACENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 15;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHN0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHN0W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHN1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHN1W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHN2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHN2W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHN3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHN3W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 19;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHN4W<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHN4W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHN5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHN5W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 21;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHN6W<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHN6W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 22;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CHN7W<'a> {
            w: &'a mut W,
        }
        impl<'a> _CHN7W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 23;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INNSEL`"]
        pub enum INNSELW {
            #[doc = "IN0, from the 8-bit DAC output"]
            _00,
            #[doc = "IN1, from the analog 8-1 mux"]
            _01,
        }
        impl INNSELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    INNSELW::_00 => 0,
                    INNSELW::_01 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INNSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INNSELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INNSELW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "IN0, from the 8-bit DAC output"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(INNSELW::_00)
            }
            #[doc = "IN1, from the analog 8-1 mux"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(INNSELW::_01)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INPSEL`"]
        pub enum INPSELW {
            #[doc = "IN0, from the 8-bit DAC output"]
            _00,
            #[doc = "IN1, from the analog 8-1 mux"]
            _01,
        }
        impl INPSELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    INPSELW::_00 => 0,
                    INPSELW::_01 => 1,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INPSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INPSELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INPSELW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "IN0, from the 8-bit DAC output"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(INPSELW::_00)
            }
            #[doc = "IN1, from the analog 8-1 mux"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(INPSELW::_01)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 27;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - DAC Output Voltage Select"]
            #[inline(always)]
            pub fn vosel(&self) -> VOSELR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                VOSELR { bits }
            }
            #[doc = "Bits 8:10 - Minus Input MUX Control"]
            #[inline(always)]
            pub fn msel(&self) -> MSELR {
                MSELR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 11:13 - Plus Input MUX Control"]
            #[inline(always)]
            pub fn psel(&self) -> PSELR {
                PSELR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 14 - Supply Voltage Reference Source Select"]
            #[inline(always)]
            pub fn vrsel(&self) -> VRSELR {
                VRSELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - DAC Enable"]
            #[inline(always)]
            pub fn dacen(&self) -> DACENR {
                DACENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 16 - Channel 0 input enable"]
            #[inline(always)]
            pub fn chn0(&self) -> CHN0R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                CHN0R { bits }
            }
            #[doc = "Bit 17 - Channel 1 input enable"]
            #[inline(always)]
            pub fn chn1(&self) -> CHN1R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                CHN1R { bits }
            }
            #[doc = "Bit 18 - Channel 2 input enable"]
            #[inline(always)]
            pub fn chn2(&self) -> CHN2R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                CHN2R { bits }
            }
            #[doc = "Bit 19 - Channel 3 input enable"]
            #[inline(always)]
            pub fn chn3(&self) -> CHN3R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 19;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                CHN3R { bits }
            }
            #[doc = "Bit 20 - Channel 4 input enable"]
            #[inline(always)]
            pub fn chn4(&self) -> CHN4R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                CHN4R { bits }
            }
            #[doc = "Bit 21 - Channel 5 input enable"]
            #[inline(always)]
            pub fn chn5(&self) -> CHN5R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                CHN5R { bits }
            }
            #[doc = "Bit 22 - Channel 6 input enable"]
            #[inline(always)]
            pub fn chn6(&self) -> CHN6R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                CHN6R { bits }
            }
            #[doc = "Bit 23 - Channel 7 input enable"]
            #[inline(always)]
            pub fn chn7(&self) -> CHN7R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                CHN7R { bits }
            }
            #[doc = "Bits 24:25 - Selection of the input to the negative port of the comparator"]
            #[inline(always)]
            pub fn innsel(&self) -> INNSELR {
                INNSELR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 27:28 - Selection of the input to the positive port of the comparator"]
            #[inline(always)]
            pub fn inpsel(&self) -> INPSELR {
                INPSELR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 27;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - DAC Output Voltage Select"]
            #[inline(always)]
            pub fn vosel(&mut self) -> _VOSELW {
                _VOSELW { w: self }
            }
            #[doc = "Bits 8:10 - Minus Input MUX Control"]
            #[inline(always)]
            pub fn msel(&mut self) -> _MSELW {
                _MSELW { w: self }
            }
            #[doc = "Bits 11:13 - Plus Input MUX Control"]
            #[inline(always)]
            pub fn psel(&mut self) -> _PSELW {
                _PSELW { w: self }
            }
            #[doc = "Bit 14 - Supply Voltage Reference Source Select"]
            #[inline(always)]
            pub fn vrsel(&mut self) -> _VRSELW {
                _VRSELW { w: self }
            }
            #[doc = "Bit 15 - DAC Enable"]
            #[inline(always)]
            pub fn dacen(&mut self) -> _DACENW {
                _DACENW { w: self }
            }
            #[doc = "Bit 16 - Channel 0 input enable"]
            #[inline(always)]
            pub fn chn0(&mut self) -> _CHN0W {
                _CHN0W { w: self }
            }
            #[doc = "Bit 17 - Channel 1 input enable"]
            #[inline(always)]
            pub fn chn1(&mut self) -> _CHN1W {
                _CHN1W { w: self }
            }
            #[doc = "Bit 18 - Channel 2 input enable"]
            #[inline(always)]
            pub fn chn2(&mut self) -> _CHN2W {
                _CHN2W { w: self }
            }
            #[doc = "Bit 19 - Channel 3 input enable"]
            #[inline(always)]
            pub fn chn3(&mut self) -> _CHN3W {
                _CHN3W { w: self }
            }
            #[doc = "Bit 20 - Channel 4 input enable"]
            #[inline(always)]
            pub fn chn4(&mut self) -> _CHN4W {
                _CHN4W { w: self }
            }
            #[doc = "Bit 21 - Channel 5 input enable"]
            #[inline(always)]
            pub fn chn5(&mut self) -> _CHN5W {
                _CHN5W { w: self }
            }
            #[doc = "Bit 22 - Channel 6 input enable"]
            #[inline(always)]
            pub fn chn6(&mut self) -> _CHN6W {
                _CHN6W { w: self }
            }
            #[doc = "Bit 23 - Channel 7 input enable"]
            #[inline(always)]
            pub fn chn7(&mut self) -> _CHN7W {
                _CHN7W { w: self }
            }
            #[doc = "Bits 24:25 - Selection of the input to the negative port of the comparator"]
            #[inline(always)]
            pub fn innsel(&mut self) -> _INNSELW {
                _INNSELW { w: self }
            }
            #[doc = "Bits 27:28 - Selection of the input to the positive port of the comparator"]
            #[inline(always)]
            pub fn inpsel(&mut self) -> _INPSELW {
                _INPSELW { w: self }
            }
        }
    }
    #[doc = "CMP Control Register 2"]
    pub struct C2 {
        register: VolatileCell<u32>,
    }
    #[doc = "CMP Control Register 2"]
    pub mod c2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::C2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct ACONR {
            bits: u8,
        }
        impl ACONR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `INITMOD`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INITMODR {
            #[doc = "The modulus is set to 64(same with 111111)."]
            _000000,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl INITMODR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    INITMODR::_000000 => 0,
                    INITMODR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> INITMODR {
                match value {
                    0 => INITMODR::_000000,
                    i => INITMODR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_000000`"]
            #[inline(always)]
            pub fn is_000000(&self) -> bool {
                *self == INITMODR::_000000
            }
        }
        #[doc = "Possible values of the field `NSAM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum NSAMR {
            #[doc = "The comparison result is sampled as soon as the active channel is scanned in one round-robin clock."]
            _00,
            #[doc = "The sampling takes place 1 round-robin clock cycle after the next cycle of the round-robin clock."]
            _01,
            #[doc = "The sampling takes place 2 round-robin clock cycles after the next cycle of the round-robin clock."]
            _10,
            #[doc = "The sampling takes place 3 round-robin clock cycles after the next cycle of the round-robin clock."]
            _11,
        }
        impl NSAMR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    NSAMR::_00 => 0,
                    NSAMR::_01 => 1,
                    NSAMR::_10 => 2,
                    NSAMR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> NSAMR {
                match value {
                    0 => NSAMR::_00,
                    1 => NSAMR::_01,
                    2 => NSAMR::_10,
                    3 => NSAMR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == NSAMR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == NSAMR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == NSAMR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == NSAMR::_11
            }
        }
        #[doc = r" Value of the field"]
        pub struct CH0FR {
            bits: bool,
        }
        impl CH0FR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct CH1FR {
            bits: bool,
        }
        impl CH1FR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct CH2FR {
            bits: bool,
        }
        impl CH2FR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct CH3FR {
            bits: bool,
        }
        impl CH3FR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct CH4FR {
            bits: bool,
        }
        impl CH4FR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct CH5FR {
            bits: bool,
        }
        impl CH5FR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct CH6FR {
            bits: bool,
        }
        impl CH6FR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct CH7FR {
            bits: bool,
        }
        impl CH7FR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `FXMXCH`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FXMXCHR {
            #[doc = "Channel 0 is selected as the fixed reference input for the fixed mux port."]
            _000,
            #[doc = "Channel 1 is selected as the fixed reference input for the fixed mux port."]
            _001,
            #[doc = "Channel 2 is selected as the fixed reference input for the fixed mux port."]
            _010,
            #[doc = "Channel 3 is selected as the fixed reference input for the fixed mux port."]
            _011,
            #[doc = "Channel 4 is selected as the fixed reference input for the fixed mux port."]
            _100,
            #[doc = "Channel 5 is selected as the fixed reference input for the fixed mux port."]
            _101,
            #[doc = "Channel 6 is selected as the fixed reference input for the fixed mux port."]
            _110,
            #[doc = "Channel 7 is selected as the fixed reference input for the fixed mux port."]
            _111,
        }
        impl FXMXCHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    FXMXCHR::_000 => 0,
                    FXMXCHR::_001 => 1,
                    FXMXCHR::_010 => 2,
                    FXMXCHR::_011 => 3,
                    FXMXCHR::_100 => 4,
                    FXMXCHR::_101 => 5,
                    FXMXCHR::_110 => 6,
                    FXMXCHR::_111 => 7,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> FXMXCHR {
                match value {
                    0 => FXMXCHR::_000,
                    1 => FXMXCHR::_001,
                    2 => FXMXCHR::_010,
                    3 => FXMXCHR::_011,
                    4 => FXMXCHR::_100,
                    5 => FXMXCHR::_101,
                    6 => FXMXCHR::_110,
                    7 => FXMXCHR::_111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == FXMXCHR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == FXMXCHR::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == FXMXCHR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == FXMXCHR::_011
            }
            #[doc = "Checks if the value of the field is `_100`"]
            #[inline(always)]
            pub fn is_100(&self) -> bool {
                *self == FXMXCHR::_100
            }
            #[doc = "Checks if the value of the field is `_101`"]
            #[inline(always)]
            pub fn is_101(&self) -> bool {
                *self == FXMXCHR::_101
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == FXMXCHR::_110
            }
            #[doc = "Checks if the value of the field is `_111`"]
            #[inline(always)]
            pub fn is_111(&self) -> bool {
                *self == FXMXCHR::_111
            }
        }
        #[doc = "Possible values of the field `FXMP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FXMPR {
            #[doc = "The Plus port is fixed. Only the inputs to the Minus port are swept in each round."]
            _0,
            #[doc = "The Minus port is fixed. Only the inputs to the Plus port are swept in each round."]
            _1,
        }
        impl FXMPR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FXMPR::_0 => false,
                    FXMPR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FXMPR {
                match value {
                    false => FXMPR::_0,
                    true => FXMPR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FXMPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FXMPR::_1
            }
        }
        #[doc = "Possible values of the field `RRIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RRIER {
            #[doc = "The round-robin interrupt is disabled."]
            _0,
            #[doc = "The round-robin interrupt is enabled when a comparison result changes from the last sample."]
            _1,
        }
        impl RRIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RRIER::_0 => false,
                    RRIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RRIER {
                match value {
                    false => RRIER::_0,
                    true => RRIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RRIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RRIER::_1
            }
        }
        #[doc = "Possible values of the field `RRE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RRER {
            #[doc = "Round-robin operation is disabled."]
            _0,
            #[doc = "Round-robin operation is enabled."]
            _1,
        }
        impl RRER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RRER::_0 => false,
                    RRER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RRER {
                match value {
                    false => RRER::_0,
                    true => RRER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RRER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RRER::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _ACONW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ACONW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INITMOD`"]
        pub enum INITMODW {
            #[doc = "The modulus is set to 64(same with 111111)."]
            _000000,
        }
        impl INITMODW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    INITMODW::_000000 => 0,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INITMODW<'a> {
            w: &'a mut W,
        }
        impl<'a> _INITMODW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INITMODW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "The modulus is set to 64(same with 111111)."]
            #[inline(always)]
            pub fn _000000(self) -> &'a mut W {
                self.variant(INITMODW::_000000)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 63;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `NSAM`"]
        pub enum NSAMW {
            #[doc = "The comparison result is sampled as soon as the active channel is scanned in one round-robin clock."]
            _00,
            #[doc = "The sampling takes place 1 round-robin clock cycle after the next cycle of the round-robin clock."]
            _01,
            #[doc = "The sampling takes place 2 round-robin clock cycles after the next cycle of the round-robin clock."]
            _10,
            #[doc = "The sampling takes place 3 round-robin clock cycles after the next cycle of the round-robin clock."]
            _11,
        }
        impl NSAMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    NSAMW::_00 => 0,
                    NSAMW::_01 => 1,
                    NSAMW::_10 => 2,
                    NSAMW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _NSAMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _NSAMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: NSAMW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "The comparison result is sampled as soon as the active channel is scanned in one round-robin clock."]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(NSAMW::_00)
            }
            #[doc = "The sampling takes place 1 round-robin clock cycle after the next cycle of the round-robin clock."]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(NSAMW::_01)
            }
            #[doc = "The sampling takes place 2 round-robin clock cycles after the next cycle of the round-robin clock."]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(NSAMW::_10)
            }
            #[doc = "The sampling takes place 3 round-robin clock cycles after the next cycle of the round-robin clock."]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(NSAMW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH0FW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH0FW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH1FW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH1FW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 17;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH2FW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH2FW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH3FW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH3FW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 19;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH4FW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH4FW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH5FW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH5FW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 21;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH6FW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH6FW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 22;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CH7FW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CH7FW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 23;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FXMXCH`"]
        pub enum FXMXCHW {
            #[doc = "Channel 0 is selected as the fixed reference input for the fixed mux port."]
            _000,
            #[doc = "Channel 1 is selected as the fixed reference input for the fixed mux port."]
            _001,
            #[doc = "Channel 2 is selected as the fixed reference input for the fixed mux port."]
            _010,
            #[doc = "Channel 3 is selected as the fixed reference input for the fixed mux port."]
            _011,
            #[doc = "Channel 4 is selected as the fixed reference input for the fixed mux port."]
            _100,
            #[doc = "Channel 5 is selected as the fixed reference input for the fixed mux port."]
            _101,
            #[doc = "Channel 6 is selected as the fixed reference input for the fixed mux port."]
            _110,
            #[doc = "Channel 7 is selected as the fixed reference input for the fixed mux port."]
            _111,
        }
        impl FXMXCHW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    FXMXCHW::_000 => 0,
                    FXMXCHW::_001 => 1,
                    FXMXCHW::_010 => 2,
                    FXMXCHW::_011 => 3,
                    FXMXCHW::_100 => 4,
                    FXMXCHW::_101 => 5,
                    FXMXCHW::_110 => 6,
                    FXMXCHW::_111 => 7,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FXMXCHW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FXMXCHW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FXMXCHW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Channel 0 is selected as the fixed reference input for the fixed mux port."]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(FXMXCHW::_000)
            }
            #[doc = "Channel 1 is selected as the fixed reference input for the fixed mux port."]
            #[inline(always)]
            pub fn _001(self) -> &'a mut W {
                self.variant(FXMXCHW::_001)
            }
            #[doc = "Channel 2 is selected as the fixed reference input for the fixed mux port."]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(FXMXCHW::_010)
            }
            #[doc = "Channel 3 is selected as the fixed reference input for the fixed mux port."]
            #[inline(always)]
            pub fn _011(self) -> &'a mut W {
                self.variant(FXMXCHW::_011)
            }
            #[doc = "Channel 4 is selected as the fixed reference input for the fixed mux port."]
            #[inline(always)]
            pub fn _100(self) -> &'a mut W {
                self.variant(FXMXCHW::_100)
            }
            #[doc = "Channel 5 is selected as the fixed reference input for the fixed mux port."]
            #[inline(always)]
            pub fn _101(self) -> &'a mut W {
                self.variant(FXMXCHW::_101)
            }
            #[doc = "Channel 6 is selected as the fixed reference input for the fixed mux port."]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(FXMXCHW::_110)
            }
            #[doc = "Channel 7 is selected as the fixed reference input for the fixed mux port."]
            #[inline(always)]
            pub fn _111(self) -> &'a mut W {
                self.variant(FXMXCHW::_111)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 25;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FXMP`"]
        pub enum FXMPW {
            #[doc = "The Plus port is fixed. Only the inputs to the Minus port are swept in each round."]
            _0,
            #[doc = "The Minus port is fixed. Only the inputs to the Plus port are swept in each round."]
            _1,
        }
        impl FXMPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FXMPW::_0 => false,
                    FXMPW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FXMPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FXMPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FXMPW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The Plus port is fixed. Only the inputs to the Minus port are swept in each round."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FXMPW::_0)
            }
            #[doc = "The Minus port is fixed. Only the inputs to the Plus port are swept in each round."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FXMPW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 29;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RRIE`"]
        pub enum RRIEW {
            #[doc = "The round-robin interrupt is disabled."]
            _0,
            #[doc = "The round-robin interrupt is enabled when a comparison result changes from the last sample."]
            _1,
        }
        impl RRIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RRIEW::_0 => false,
                    RRIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RRIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RRIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RRIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "The round-robin interrupt is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RRIEW::_0)
            }
            #[doc = "The round-robin interrupt is enabled when a comparison result changes from the last sample."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RRIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RRE`"]
        pub enum RREW {
            #[doc = "Round-robin operation is disabled."]
            _0,
            #[doc = "Round-robin operation is enabled."]
            _1,
        }
        impl RREW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RREW::_0 => false,
                    RREW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RREW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RREW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RREW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Round-robin operation is disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RREW::_0)
            }
            #[doc = "Round-robin operation is enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RREW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - The result of the input comparison for channel n"]
            #[inline(always)]
            pub fn acon(&self) -> ACONR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                ACONR { bits }
            }
            #[doc = "Bits 8:13 - Comparator and DAC initialization delay modulus."]
            #[inline(always)]
            pub fn initmod(&self) -> INITMODR {
                INITMODR::_from({
                    const MASK: u8 = 63;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 14:15 - Number of sample clocks"]
            #[inline(always)]
            pub fn nsam(&self) -> NSAMR {
                NSAMR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 16 - Channel 0 input changed flag"]
            #[inline(always)]
            pub fn ch0f(&self) -> CH0FR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                CH0FR { bits }
            }
            #[doc = "Bit 17 - Channel 1 input changed flag"]
            #[inline(always)]
            pub fn ch1f(&self) -> CH1FR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                CH1FR { bits }
            }
            #[doc = "Bit 18 - Channel 2 input changed flag"]
            #[inline(always)]
            pub fn ch2f(&self) -> CH2FR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                CH2FR { bits }
            }
            #[doc = "Bit 19 - Channel 3 input changed flag"]
            #[inline(always)]
            pub fn ch3f(&self) -> CH3FR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 19;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                CH3FR { bits }
            }
            #[doc = "Bit 20 - Channel 4 input changed flag"]
            #[inline(always)]
            pub fn ch4f(&self) -> CH4FR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                CH4FR { bits }
            }
            #[doc = "Bit 21 - Channel 5 input changed flag"]
            #[inline(always)]
            pub fn ch5f(&self) -> CH5FR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                CH5FR { bits }
            }
            #[doc = "Bit 22 - Channel 6 input changed flag"]
            #[inline(always)]
            pub fn ch6f(&self) -> CH6FR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                CH6FR { bits }
            }
            #[doc = "Bit 23 - Channel 7 input changed flag"]
            #[inline(always)]
            pub fn ch7f(&self) -> CH7FR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 23;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                CH7FR { bits }
            }
            #[doc = "Bits 25:27 - Fixed channel selection"]
            #[inline(always)]
            pub fn fxmxch(&self) -> FXMXCHR {
                FXMXCHR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 25;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 29 - Fixed MUX Port"]
            #[inline(always)]
            pub fn fxmp(&self) -> FXMPR {
                FXMPR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 29;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 30 - Round-Robin interrupt enable"]
            #[inline(always)]
            pub fn rrie(&self) -> RRIER {
                RRIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Round-Robin Enable"]
            #[inline(always)]
            pub fn rre(&self) -> RRER {
                RRER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - The result of the input comparison for channel n"]
            #[inline(always)]
            pub fn acon(&mut self) -> _ACONW {
                _ACONW { w: self }
            }
            #[doc = "Bits 8:13 - Comparator and DAC initialization delay modulus."]
            #[inline(always)]
            pub fn initmod(&mut self) -> _INITMODW {
                _INITMODW { w: self }
            }
            #[doc = "Bits 14:15 - Number of sample clocks"]
            #[inline(always)]
            pub fn nsam(&mut self) -> _NSAMW {
                _NSAMW { w: self }
            }
            #[doc = "Bit 16 - Channel 0 input changed flag"]
            #[inline(always)]
            pub fn ch0f(&mut self) -> _CH0FW {
                _CH0FW { w: self }
            }
            #[doc = "Bit 17 - Channel 1 input changed flag"]
            #[inline(always)]
            pub fn ch1f(&mut self) -> _CH1FW {
                _CH1FW { w: self }
            }
            #[doc = "Bit 18 - Channel 2 input changed flag"]
            #[inline(always)]
            pub fn ch2f(&mut self) -> _CH2FW {
                _CH2FW { w: self }
            }
            #[doc = "Bit 19 - Channel 3 input changed flag"]
            #[inline(always)]
            pub fn ch3f(&mut self) -> _CH3FW {
                _CH3FW { w: self }
            }
            #[doc = "Bit 20 - Channel 4 input changed flag"]
            #[inline(always)]
            pub fn ch4f(&mut self) -> _CH4FW {
                _CH4FW { w: self }
            }
            #[doc = "Bit 21 - Channel 5 input changed flag"]
            #[inline(always)]
            pub fn ch5f(&mut self) -> _CH5FW {
                _CH5FW { w: self }
            }
            #[doc = "Bit 22 - Channel 6 input changed flag"]
            #[inline(always)]
            pub fn ch6f(&mut self) -> _CH6FW {
                _CH6FW { w: self }
            }
            #[doc = "Bit 23 - Channel 7 input changed flag"]
            #[inline(always)]
            pub fn ch7f(&mut self) -> _CH7FW {
                _CH7FW { w: self }
            }
            #[doc = "Bits 25:27 - Fixed channel selection"]
            #[inline(always)]
            pub fn fxmxch(&mut self) -> _FXMXCHW {
                _FXMXCHW { w: self }
            }
            #[doc = "Bit 29 - Fixed MUX Port"]
            #[inline(always)]
            pub fn fxmp(&mut self) -> _FXMPW {
                _FXMPW { w: self }
            }
            #[doc = "Bit 30 - Round-Robin interrupt enable"]
            #[inline(always)]
            pub fn rrie(&mut self) -> _RRIEW {
                _RRIEW { w: self }
            }
            #[doc = "Bit 31 - Round-Robin Enable"]
            #[inline(always)]
            pub fn rre(&mut self) -> _RREW {
                _RREW { w: self }
            }
        }
    }
}
#[doc = "High-Speed Comparator (CMP), Voltage Reference (VREF) Digital-to-Analog Converter (DAC), and Analog Mux (ANMUX)"]
pub struct CMP0 {
    register_block: cmp0::RegisterBlock,
}
impl Deref for CMP0 {
    type Target = cmp0::RegisterBlock;
    fn deref(&self) -> &cmp0::RegisterBlock {
        &self.register_block
    }
}
#[doc = "PMC"]
pub const PMC: Peripheral<PMC> = unsafe { Peripheral::new(1074253824) };
#[doc = "PMC"]
pub mod pmc {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - Low Voltage Detect Status and Control 1 Register"]
        pub lvdsc1: LVDSC1,
        #[doc = "0x01 - Low Voltage Detect Status and Control 2 Register"]
        pub lvdsc2: LVDSC2,
        #[doc = "0x02 - Regulator Status and Control Register"]
        pub regsc: REGSC,
        _reserved0: [u8; 1usize],
        #[doc = "0x04 - Low Power Oscillator Trim Register"]
        pub lpotrim: LPOTRIM,
    }
    #[doc = "Low Voltage Detect Status and Control 1 Register"]
    pub struct LVDSC1 {
        register: VolatileCell<u8>,
    }
    #[doc = "Low Voltage Detect Status and Control 1 Register"]
    pub mod lvdsc1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::LVDSC1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `LVDRE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LVDRER {
            #[doc = "No system resets on low voltage detect events."]
            _0,
            #[doc = r" Reserved"]
            _Reserved(bool),
        }
        impl LVDRER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LVDRER::_0 => false,
                    LVDRER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LVDRER {
                match value {
                    false => LVDRER::_0,
                    i => LVDRER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LVDRER::_0
            }
        }
        #[doc = "Possible values of the field `LVDIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LVDIER {
            #[doc = "Hardware interrupt disabled (use polling)"]
            _0,
            #[doc = "Request a hardware interrupt when LVDF = 1"]
            _1,
        }
        impl LVDIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LVDIER::_0 => false,
                    LVDIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LVDIER {
                match value {
                    false => LVDIER::_0,
                    true => LVDIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LVDIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LVDIER::_1
            }
        }
        #[doc = "Possible values of the field `LVDF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LVDFR {
            #[doc = "Low-voltage event not detected"]
            _0,
            #[doc = "Low-voltage event detected"]
            _1,
        }
        impl LVDFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LVDFR::_0 => false,
                    LVDFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LVDFR {
                match value {
                    false => LVDFR::_0,
                    true => LVDFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LVDFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LVDFR::_1
            }
        }
        #[doc = "Values that can be written to the field `LVDRE`"]
        pub enum LVDREW {
            #[doc = "No system resets on low voltage detect events."]
            _0,
        }
        impl LVDREW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LVDREW::_0 => false,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LVDREW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LVDREW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LVDREW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No system resets on low voltage detect events."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LVDREW::_0)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LVDIE`"]
        pub enum LVDIEW {
            #[doc = "Hardware interrupt disabled (use polling)"]
            _0,
            #[doc = "Request a hardware interrupt when LVDF = 1"]
            _1,
        }
        impl LVDIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LVDIEW::_0 => false,
                    LVDIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LVDIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LVDIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LVDIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Hardware interrupt disabled (use polling)"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LVDIEW::_0)
            }
            #[doc = "Request a hardware interrupt when LVDF = 1"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LVDIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _LVDACKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LVDACKW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bit 4 - Low Voltage Detect Reset Enable"]
            #[inline(always)]
            pub fn lvdre(&self) -> LVDRER {
                LVDRER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 5 - Low Voltage Detect Interrupt Enable"]
            #[inline(always)]
            pub fn lvdie(&self) -> LVDIER {
                LVDIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 7 - Low Voltage Detect Flag"]
            #[inline(always)]
            pub fn lvdf(&self) -> LVDFR {
                LVDFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 4 - Low Voltage Detect Reset Enable"]
            #[inline(always)]
            pub fn lvdre(&mut self) -> _LVDREW {
                _LVDREW { w: self }
            }
            #[doc = "Bit 5 - Low Voltage Detect Interrupt Enable"]
            #[inline(always)]
            pub fn lvdie(&mut self) -> _LVDIEW {
                _LVDIEW { w: self }
            }
            #[doc = "Bit 6 - Low Voltage Detect Acknowledge"]
            #[inline(always)]
            pub fn lvdack(&mut self) -> _LVDACKW {
                _LVDACKW { w: self }
            }
        }
    }
    #[doc = "Low Voltage Detect Status and Control 2 Register"]
    pub struct LVDSC2 {
        register: VolatileCell<u8>,
    }
    #[doc = "Low Voltage Detect Status and Control 2 Register"]
    pub mod lvdsc2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::LVDSC2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `LVWIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LVWIER {
            #[doc = "Hardware interrupt disabled (use polling)"]
            _0,
            #[doc = "Request a hardware interrupt when LVWF=1"]
            _1,
        }
        impl LVWIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LVWIER::_0 => false,
                    LVWIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LVWIER {
                match value {
                    false => LVWIER::_0,
                    true => LVWIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LVWIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LVWIER::_1
            }
        }
        #[doc = "Possible values of the field `LVWF`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LVWFR {
            #[doc = "Low-voltage warning event not detected"]
            _0,
            #[doc = "Low-voltage warning event detected"]
            _1,
        }
        impl LVWFR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LVWFR::_0 => false,
                    LVWFR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LVWFR {
                match value {
                    false => LVWFR::_0,
                    true => LVWFR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LVWFR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LVWFR::_1
            }
        }
        #[doc = "Values that can be written to the field `LVWIE`"]
        pub enum LVWIEW {
            #[doc = "Hardware interrupt disabled (use polling)"]
            _0,
            #[doc = "Request a hardware interrupt when LVWF=1"]
            _1,
        }
        impl LVWIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LVWIEW::_0 => false,
                    LVWIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LVWIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LVWIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LVWIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Hardware interrupt disabled (use polling)"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LVWIEW::_0)
            }
            #[doc = "Request a hardware interrupt when LVWF=1"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LVWIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _LVWACKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LVWACKW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bit 5 - Low-Voltage Warning Interrupt Enable"]
            #[inline(always)]
            pub fn lvwie(&self) -> LVWIER {
                LVWIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 7 - Low-Voltage Warning Flag"]
            #[inline(always)]
            pub fn lvwf(&self) -> LVWFR {
                LVWFR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 5 - Low-Voltage Warning Interrupt Enable"]
            #[inline(always)]
            pub fn lvwie(&mut self) -> _LVWIEW {
                _LVWIEW { w: self }
            }
            #[doc = "Bit 6 - Low-Voltage Warning Acknowledge"]
            #[inline(always)]
            pub fn lvwack(&mut self) -> _LVWACKW {
                _LVWACKW { w: self }
            }
        }
    }
    #[doc = "Regulator Status and Control Register"]
    pub struct REGSC {
        register: VolatileCell<u8>,
    }
    #[doc = "Regulator Status and Control Register"]
    pub mod regsc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::REGSC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `BIASEN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum BIASENR {
            #[doc = "Biasing disabled, core logic can run in full performance"]
            _0,
            #[doc = "Biasing enabled, core logic is slower and there are restrictions in allowed system clock speed (see Data Sheet for details)"]
            _1,
        }
        impl BIASENR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    BIASENR::_0 => false,
                    BIASENR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> BIASENR {
                match value {
                    false => BIASENR::_0,
                    true => BIASENR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == BIASENR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == BIASENR::_1
            }
        }
        #[doc = "Possible values of the field `CLKBIASDIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CLKBIASDISR {
            #[doc = "No effect"]
            _0,
            #[doc = "In VLPS mode, the bias currents and reference voltages for the following clock modules are disabled: SIRC, FIRC, PLL. (if available on device)"]
            _1,
        }
        impl CLKBIASDISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CLKBIASDISR::_0 => false,
                    CLKBIASDISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CLKBIASDISR {
                match value {
                    false => CLKBIASDISR::_0,
                    true => CLKBIASDISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CLKBIASDISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CLKBIASDISR::_1
            }
        }
        #[doc = "Possible values of the field `REGFPM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum REGFPMR {
            #[doc = "Regulator is in low power mode or transition to/from"]
            _0,
            #[doc = "Regulator is in full performance mode"]
            _1,
        }
        impl REGFPMR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    REGFPMR::_0 => false,
                    REGFPMR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> REGFPMR {
                match value {
                    false => REGFPMR::_0,
                    true => REGFPMR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == REGFPMR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == REGFPMR::_1
            }
        }
        #[doc = "Possible values of the field `LPOSTAT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LPOSTATR {
            #[doc = "Low power oscillator in low phase"]
            _0,
            #[doc = "Low power oscillator in high phase"]
            _1,
        }
        impl LPOSTATR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LPOSTATR::_0 => false,
                    LPOSTATR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LPOSTATR {
                match value {
                    false => LPOSTATR::_0,
                    true => LPOSTATR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LPOSTATR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LPOSTATR::_1
            }
        }
        #[doc = "Possible values of the field `LPODIS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LPODISR {
            #[doc = "Low power oscillator enabled"]
            _0,
            #[doc = "Low power oscillator disabled"]
            _1,
        }
        impl LPODISR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LPODISR::_0 => false,
                    LPODISR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LPODISR {
                match value {
                    false => LPODISR::_0,
                    true => LPODISR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LPODISR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LPODISR::_1
            }
        }
        #[doc = "Values that can be written to the field `BIASEN`"]
        pub enum BIASENW {
            #[doc = "Biasing disabled, core logic can run in full performance"]
            _0,
            #[doc = "Biasing enabled, core logic is slower and there are restrictions in allowed system clock speed (see Data Sheet for details)"]
            _1,
        }
        impl BIASENW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    BIASENW::_0 => false,
                    BIASENW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _BIASENW<'a> {
            w: &'a mut W,
        }
        impl<'a> _BIASENW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: BIASENW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Biasing disabled, core logic can run in full performance"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(BIASENW::_0)
            }
            #[doc = "Biasing enabled, core logic is slower and there are restrictions in allowed system clock speed (see Data Sheet for details)"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(BIASENW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CLKBIASDIS`"]
        pub enum CLKBIASDISW {
            #[doc = "No effect"]
            _0,
            #[doc = "In VLPS mode, the bias currents and reference voltages for the following clock modules are disabled: SIRC, FIRC, PLL. (if available on device)"]
            _1,
        }
        impl CLKBIASDISW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CLKBIASDISW::_0 => false,
                    CLKBIASDISW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CLKBIASDISW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CLKBIASDISW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CLKBIASDISW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No effect"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CLKBIASDISW::_0)
            }
            #[doc = "In VLPS mode, the bias currents and reference voltages for the following clock modules are disabled: SIRC, FIRC, PLL. (if available on device)"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CLKBIASDISW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LPODIS`"]
        pub enum LPODISW {
            #[doc = "Low power oscillator enabled"]
            _0,
            #[doc = "Low power oscillator disabled"]
            _1,
        }
        impl LPODISW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LPODISW::_0 => false,
                    LPODISW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LPODISW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LPODISW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LPODISW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Low power oscillator enabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LPODISW::_0)
            }
            #[doc = "Low power oscillator disabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LPODISW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bit 0 - Bias Enable Bit"]
            #[inline(always)]
            pub fn biasen(&self) -> BIASENR {
                BIASENR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 1 - Clock Bias Disable Bit"]
            #[inline(always)]
            pub fn clkbiasdis(&self) -> CLKBIASDISR {
                CLKBIASDISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 2 - Regulator in Full Performance Mode Status Bit"]
            #[inline(always)]
            pub fn regfpm(&self) -> REGFPMR {
                REGFPMR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 6 - LPO Status Bit"]
            #[inline(always)]
            pub fn lpostat(&self) -> LPOSTATR {
                LPOSTATR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
            #[doc = "Bit 7 - LPO Disable Bit"]
            #[inline(always)]
            pub fn lpodis(&self) -> LPODISR {
                LPODISR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u8) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 4 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Bias Enable Bit"]
            #[inline(always)]
            pub fn biasen(&mut self) -> _BIASENW {
                _BIASENW { w: self }
            }
            #[doc = "Bit 1 - Clock Bias Disable Bit"]
            #[inline(always)]
            pub fn clkbiasdis(&mut self) -> _CLKBIASDISW {
                _CLKBIASDISW { w: self }
            }
            #[doc = "Bit 7 - LPO Disable Bit"]
            #[inline(always)]
            pub fn lpodis(&mut self) -> _LPODISW {
                _LPODISW { w: self }
            }
        }
    }
    #[doc = "Low Power Oscillator Trim Register"]
    pub struct LPOTRIM {
        register: VolatileCell<u8>,
    }
    #[doc = "Low Power Oscillator Trim Register"]
    pub mod lpotrim {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u8,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u8,
        }
        impl super::LPOTRIM {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct LPOTRIMR {
            bits: u8,
        }
        impl LPOTRIMR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _LPOTRIMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LPOTRIMW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u8) << OFFSET);
                self.w.bits |= ((value & MASK) as u8) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
            #[doc = "Bits 0:4 - LPO trimming bits"]
            #[inline(always)]
            pub fn lpotrim(&self) -> LPOTRIMR {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u8) as u8
                };
                LPOTRIMR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:4 - LPO trimming bits"]
            #[inline(always)]
            pub fn lpotrim(&mut self) -> _LPOTRIMW {
                _LPOTRIMW { w: self }
            }
        }
    }
}
#[doc = "PMC"]
pub struct PMC {
    register_block: pmc::RegisterBlock,
}
impl Deref for PMC {
    type Target = pmc::RegisterBlock;
    fn deref(&self) -> &pmc::RegisterBlock {
        &self.register_block
    }
}
#[doc = "System Mode Controller"]
pub const SMC: Peripheral<SMC> = unsafe { Peripheral::new(1074257920) };
#[doc = "System Mode Controller"]
pub mod smc {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - SMC Version ID Register"]
        pub verid: VERID,
        #[doc = "0x04 - SMC Parameter Register"]
        pub param: PARAM,
        #[doc = "0x08 - Power Mode Protection register"]
        pub pmprot: PMPROT,
        #[doc = "0x0c - Power Mode Control register"]
        pub pmctrl: PMCTRL,
        #[doc = "0x10 - Stop Control Register"]
        pub stopctrl: STOPCTRL,
        #[doc = "0x14 - Power Mode Status register"]
        pub pmstat: PMSTAT,
    }
    #[doc = "SMC Version ID Register"]
    pub struct VERID {
        register: VolatileCell<u32>,
    }
    #[doc = "SMC Version ID Register"]
    pub mod verid {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::VERID {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = "Possible values of the field `FEATURE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FEATURER {
            #[doc = "Standard features implemented"]
            _0,
            #[doc = r" Reserved"]
            _Reserved(u16),
        }
        impl FEATURER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                match *self {
                    FEATURER::_0 => 0,
                    FEATURER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u16) -> FEATURER {
                match value {
                    0 => FEATURER::_0,
                    i => FEATURER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FEATURER::_0
            }
        }
        #[doc = r" Value of the field"]
        pub struct MINORR {
            bits: u8,
        }
        impl MINORR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct MAJORR {
            bits: u8,
        }
        impl MAJORR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Feature Specification Number"]
            #[inline(always)]
            pub fn feature(&self) -> FEATURER {
                FEATURER::_from({
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                })
            }
            #[doc = "Bits 16:23 - Minor Version Number"]
            #[inline(always)]
            pub fn minor(&self) -> MINORR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                MINORR { bits }
            }
            #[doc = "Bits 24:31 - Major Version Number"]
            #[inline(always)]
            pub fn major(&self) -> MAJORR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                MAJORR { bits }
            }
        }
    }
    #[doc = "SMC Parameter Register"]
    pub struct PARAM {
        register: VolatileCell<u32>,
    }
    #[doc = "SMC Parameter Register"]
    pub mod param {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::PARAM {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = "Possible values of the field `EHSRUN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EHSRUNR {
            #[doc = "The feature is not available."]
            _0,
            #[doc = "The feature is available."]
            _1,
        }
        impl EHSRUNR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EHSRUNR::_0 => false,
                    EHSRUNR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EHSRUNR {
                match value {
                    false => EHSRUNR::_0,
                    true => EHSRUNR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EHSRUNR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EHSRUNR::_1
            }
        }
        #[doc = "Possible values of the field `ELLS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELLSR {
            #[doc = "The feature is not available."]
            _0,
            #[doc = "The feature is available."]
            _1,
        }
        impl ELLSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELLSR::_0 => false,
                    ELLSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELLSR {
                match value {
                    false => ELLSR::_0,
                    true => ELLSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELLSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELLSR::_1
            }
        }
        #[doc = "Possible values of the field `ELLS2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELLS2R {
            #[doc = "The feature is not available."]
            _0,
            #[doc = "The feature is available."]
            _1,
        }
        impl ELLS2R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELLS2R::_0 => false,
                    ELLS2R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELLS2R {
                match value {
                    false => ELLS2R::_0,
                    true => ELLS2R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELLS2R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELLS2R::_1
            }
        }
        #[doc = "Possible values of the field `EVLLS0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EVLLS0R {
            #[doc = "The feature is not available."]
            _0,
            #[doc = "The feature is available."]
            _1,
        }
        impl EVLLS0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EVLLS0R::_0 => false,
                    EVLLS0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EVLLS0R {
                match value {
                    false => EVLLS0R::_0,
                    true => EVLLS0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EVLLS0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EVLLS0R::_1
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Existence of HSRUN feature"]
            #[inline(always)]
            pub fn ehsrun(&self) -> EHSRUNR {
                EHSRUNR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Existence of LLS feature"]
            #[inline(always)]
            pub fn ells(&self) -> ELLSR {
                ELLSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Existence of LLS2 feature"]
            #[inline(always)]
            pub fn ells2(&self) -> ELLS2R {
                ELLS2R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Existence of VLLS0 feature"]
            #[inline(always)]
            pub fn evlls0(&self) -> EVLLS0R {
                EVLLS0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
    }
    #[doc = "Power Mode Protection register"]
    pub struct PMPROT {
        register: VolatileCell<u32>,
    }
    #[doc = "Power Mode Protection register"]
    pub mod pmprot {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PMPROT {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `AVLP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum AVLPR {
            #[doc = "VLPR and VLPS are not allowed."]
            _0,
            #[doc = "VLPR and VLPS are allowed."]
            _1,
        }
        impl AVLPR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    AVLPR::_0 => false,
                    AVLPR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> AVLPR {
                match value {
                    false => AVLPR::_0,
                    true => AVLPR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == AVLPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == AVLPR::_1
            }
        }
        #[doc = "Possible values of the field `AHSRUN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum AHSRUNR {
            #[doc = "HSRUN is not allowed"]
            _0,
            #[doc = "HSRUN is allowed"]
            _1,
        }
        impl AHSRUNR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    AHSRUNR::_0 => false,
                    AHSRUNR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> AHSRUNR {
                match value {
                    false => AHSRUNR::_0,
                    true => AHSRUNR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == AHSRUNR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == AHSRUNR::_1
            }
        }
        #[doc = "Values that can be written to the field `AVLP`"]
        pub enum AVLPW {
            #[doc = "VLPR and VLPS are not allowed."]
            _0,
            #[doc = "VLPR and VLPS are allowed."]
            _1,
        }
        impl AVLPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    AVLPW::_0 => false,
                    AVLPW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _AVLPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _AVLPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: AVLPW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "VLPR and VLPS are not allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(AVLPW::_0)
            }
            #[doc = "VLPR and VLPS are allowed."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(AVLPW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `AHSRUN`"]
        pub enum AHSRUNW {
            #[doc = "HSRUN is not allowed"]
            _0,
            #[doc = "HSRUN is allowed"]
            _1,
        }
        impl AHSRUNW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    AHSRUNW::_0 => false,
                    AHSRUNW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _AHSRUNW<'a> {
            w: &'a mut W,
        }
        impl<'a> _AHSRUNW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: AHSRUNW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "HSRUN is not allowed"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(AHSRUNW::_0)
            }
            #[doc = "HSRUN is allowed"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(AHSRUNW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 5 - Allow Very-Low-Power Modes"]
            #[inline(always)]
            pub fn avlp(&self) -> AVLPR {
                AVLPR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Allow High Speed Run mode"]
            #[inline(always)]
            pub fn ahsrun(&self) -> AHSRUNR {
                AHSRUNR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 5 - Allow Very-Low-Power Modes"]
            #[inline(always)]
            pub fn avlp(&mut self) -> _AVLPW {
                _AVLPW { w: self }
            }
            #[doc = "Bit 7 - Allow High Speed Run mode"]
            #[inline(always)]
            pub fn ahsrun(&mut self) -> _AHSRUNW {
                _AHSRUNW { w: self }
            }
        }
    }
    #[doc = "Power Mode Control register"]
    pub struct PMCTRL {
        register: VolatileCell<u32>,
    }
    #[doc = "Power Mode Control register"]
    pub mod pmctrl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PMCTRL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `STOPM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum STOPMR {
            #[doc = "Normal Stop (STOP)"]
            _000,
            #[doc = "Very-Low-Power Stop (VLPS)"]
            _010,
            #[doc = "Reseved"]
            _110,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl STOPMR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    STOPMR::_000 => 0,
                    STOPMR::_010 => 2,
                    STOPMR::_110 => 6,
                    STOPMR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> STOPMR {
                match value {
                    0 => STOPMR::_000,
                    2 => STOPMR::_010,
                    6 => STOPMR::_110,
                    i => STOPMR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == STOPMR::_000
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == STOPMR::_010
            }
            #[doc = "Checks if the value of the field is `_110`"]
            #[inline(always)]
            pub fn is_110(&self) -> bool {
                *self == STOPMR::_110
            }
        }
        #[doc = "Possible values of the field `VLPSA`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum VLPSAR {
            #[doc = "The previous stop mode entry was successful."]
            _0,
            #[doc = "The previous stop mode entry was aborted."]
            _1,
        }
        impl VLPSAR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    VLPSAR::_0 => false,
                    VLPSAR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> VLPSAR {
                match value {
                    false => VLPSAR::_0,
                    true => VLPSAR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == VLPSAR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == VLPSAR::_1
            }
        }
        #[doc = "Possible values of the field `RUNM`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RUNMR {
            #[doc = "Normal Run mode (RUN)"]
            _00,
            #[doc = "Very-Low-Power Run mode (VLPR)"]
            _10,
            #[doc = "High Speed Run mode (HSRUN)"]
            _11,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl RUNMR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    RUNMR::_00 => 0,
                    RUNMR::_10 => 2,
                    RUNMR::_11 => 3,
                    RUNMR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> RUNMR {
                match value {
                    0 => RUNMR::_00,
                    2 => RUNMR::_10,
                    3 => RUNMR::_11,
                    i => RUNMR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == RUNMR::_00
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == RUNMR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == RUNMR::_11
            }
        }
        #[doc = "Values that can be written to the field `STOPM`"]
        pub enum STOPMW {
            #[doc = "Normal Stop (STOP)"]
            _000,
            #[doc = "Very-Low-Power Stop (VLPS)"]
            _010,
            #[doc = "Reseved"]
            _110,
        }
        impl STOPMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    STOPMW::_000 => 0,
                    STOPMW::_010 => 2,
                    STOPMW::_110 => 6,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _STOPMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _STOPMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: STOPMW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Normal Stop (STOP)"]
            #[inline(always)]
            pub fn _000(self) -> &'a mut W {
                self.variant(STOPMW::_000)
            }
            #[doc = "Very-Low-Power Stop (VLPS)"]
            #[inline(always)]
            pub fn _010(self) -> &'a mut W {
                self.variant(STOPMW::_010)
            }
            #[doc = "Reseved"]
            #[inline(always)]
            pub fn _110(self) -> &'a mut W {
                self.variant(STOPMW::_110)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 7;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RUNM`"]
        pub enum RUNMW {
            #[doc = "Normal Run mode (RUN)"]
            _00,
            #[doc = "Very-Low-Power Run mode (VLPR)"]
            _10,
            #[doc = "High Speed Run mode (HSRUN)"]
            _11,
        }
        impl RUNMW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    RUNMW::_00 => 0,
                    RUNMW::_10 => 2,
                    RUNMW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RUNMW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RUNMW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RUNMW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "Normal Run mode (RUN)"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(RUNMW::_00)
            }
            #[doc = "Very-Low-Power Run mode (VLPR)"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(RUNMW::_10)
            }
            #[doc = "High Speed Run mode (HSRUN)"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(RUNMW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:2 - Stop Mode Control"]
            #[inline(always)]
            pub fn stopm(&self) -> STOPMR {
                STOPMR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 3 - Very Low Power Stop Aborted"]
            #[inline(always)]
            pub fn vlpsa(&self) -> VLPSAR {
                VLPSAR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 5:6 - Run Mode Control"]
            #[inline(always)]
            pub fn runm(&self) -> RUNMR {
                RUNMR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:2 - Stop Mode Control"]
            #[inline(always)]
            pub fn stopm(&mut self) -> _STOPMW {
                _STOPMW { w: self }
            }
            #[doc = "Bits 5:6 - Run Mode Control"]
            #[inline(always)]
            pub fn runm(&mut self) -> _RUNMW {
                _RUNMW { w: self }
            }
        }
    }
    #[doc = "Stop Control Register"]
    pub struct STOPCTRL {
        register: VolatileCell<u32>,
    }
    #[doc = "Stop Control Register"]
    pub mod stopctrl {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::STOPCTRL {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `STOPO`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum STOPOR {
            #[doc = "STOP1 - Stop with both system and bus clocks disabled"]
            _01,
            #[doc = "STOP2 - Stop with system clock disabled and bus clock enabled"]
            _10,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl STOPOR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    STOPOR::_01 => 1,
                    STOPOR::_10 => 2,
                    STOPOR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> STOPOR {
                match value {
                    1 => STOPOR::_01,
                    2 => STOPOR::_10,
                    i => STOPOR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == STOPOR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == STOPOR::_10
            }
        }
        #[doc = "Values that can be written to the field `STOPO`"]
        pub enum STOPOW {
            #[doc = "STOP1 - Stop with both system and bus clocks disabled"]
            _01,
            #[doc = "STOP2 - Stop with system clock disabled and bus clock enabled"]
            _10,
        }
        impl STOPOW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    STOPOW::_01 => 1,
                    STOPOW::_10 => 2,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _STOPOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _STOPOW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: STOPOW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "STOP1 - Stop with both system and bus clocks disabled"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(STOPOW::_01)
            }
            #[doc = "STOP2 - Stop with system clock disabled and bus clock enabled"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(STOPOW::_10)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 6:7 - Stop Option"]
            #[inline(always)]
            pub fn stopo(&self) -> STOPOR {
                STOPOR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 3 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 6:7 - Stop Option"]
            #[inline(always)]
            pub fn stopo(&mut self) -> _STOPOW {
                _STOPOW { w: self }
            }
        }
    }
    #[doc = "Power Mode Status register"]
    pub struct PMSTAT {
        register: VolatileCell<u32>,
    }
    #[doc = "Power Mode Status register"]
    pub mod pmstat {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::PMSTAT {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct PMSTATR {
            bits: u8,
        }
        impl PMSTATR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - Power Mode Status"]
            #[inline(always)]
            pub fn pmstat(&self) -> PMSTATR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                PMSTATR { bits }
            }
        }
    }
}
#[doc = "System Mode Controller"]
pub struct SMC {
    register_block: smc::RegisterBlock,
}
impl Deref for SMC {
    type Target = smc::RegisterBlock;
    fn deref(&self) -> &smc::RegisterBlock {
        &self.register_block
    }
}
#[doc = "Reset Control Module"]
pub const RCM: Peripheral<RCM> = unsafe { Peripheral::new(1074262016) };
#[doc = "Reset Control Module"]
pub mod rcm {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - Version ID Register"]
        pub verid: VERID,
        #[doc = "0x04 - Parameter Register"]
        pub param: PARAM,
        #[doc = "0x08 - System Reset Status Register"]
        pub srs: SRS,
        #[doc = "0x0c - Reset Pin Control register"]
        pub rpc: RPC,
        _reserved0: [u8; 8usize],
        #[doc = "0x18 - Sticky System Reset Status Register"]
        pub ssrs: SSRS,
        #[doc = "0x1c - System Reset Interrupt Enable Register"]
        pub srie: SRIE,
    }
    #[doc = "Version ID Register"]
    pub struct VERID {
        register: VolatileCell<u32>,
    }
    #[doc = "Version ID Register"]
    pub mod verid {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::VERID {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = "Possible values of the field `FEATURE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FEATURER {
            #[doc = "Standard feature set."]
            _11,
            #[doc = r" Reserved"]
            _Reserved(u16),
        }
        impl FEATURER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                match *self {
                    FEATURER::_11 => 3,
                    FEATURER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u16) -> FEATURER {
                match value {
                    3 => FEATURER::_11,
                    i => FEATURER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == FEATURER::_11
            }
        }
        #[doc = r" Value of the field"]
        pub struct MINORR {
            bits: u8,
        }
        impl MINORR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct MAJORR {
            bits: u8,
        }
        impl MAJORR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:15 - Feature Specification Number"]
            #[inline(always)]
            pub fn feature(&self) -> FEATURER {
                FEATURER::_from({
                    const MASK: u16 = 65535;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                })
            }
            #[doc = "Bits 16:23 - Minor Version Number"]
            #[inline(always)]
            pub fn minor(&self) -> MINORR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                MINORR { bits }
            }
            #[doc = "Bits 24:31 - Major Version Number"]
            #[inline(always)]
            pub fn major(&self) -> MAJORR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                MAJORR { bits }
            }
        }
    }
    #[doc = "Parameter Register"]
    pub struct PARAM {
        register: VolatileCell<u32>,
    }
    #[doc = "Parameter Register"]
    pub mod param {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::PARAM {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = "Possible values of the field `EWAKEUP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EWAKEUPR {
            #[doc = "The feature is not available."]
            _0,
            #[doc = "The feature is available."]
            _1,
        }
        impl EWAKEUPR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EWAKEUPR::_0 => false,
                    EWAKEUPR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EWAKEUPR {
                match value {
                    false => EWAKEUPR::_0,
                    true => EWAKEUPR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EWAKEUPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EWAKEUPR::_1
            }
        }
        #[doc = "Possible values of the field `ELVD`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELVDR {
            #[doc = "The feature is not available."]
            _0,
            #[doc = "The feature is available."]
            _1,
        }
        impl ELVDR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELVDR::_0 => false,
                    ELVDR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELVDR {
                match value {
                    false => ELVDR::_0,
                    true => ELVDR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELVDR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELVDR::_1
            }
        }
        #[doc = "Possible values of the field `ELOC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELOCR {
            #[doc = "The feature is not available."]
            _0,
            #[doc = "The feature is available."]
            _1,
        }
        impl ELOCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELOCR::_0 => false,
                    ELOCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELOCR {
                match value {
                    false => ELOCR::_0,
                    true => ELOCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELOCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELOCR::_1
            }
        }
        #[doc = "Possible values of the field `ELOL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELOLR {
            #[doc = "The feature is not available."]
            _0,
            #[doc = "The feature is available."]
            _1,
        }
        impl ELOLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELOLR::_0 => false,
                    ELOLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELOLR {
                match value {
                    false => ELOLR::_0,
                    true => ELOLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELOLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELOLR::_1
            }
        }
        #[doc = "Possible values of the field `EWDOG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EWDOGR {
            #[doc = "The feature is not available."]
            _0,
            #[doc = "The feature is available."]
            _1,
        }
        impl EWDOGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EWDOGR::_0 => false,
                    EWDOGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EWDOGR {
                match value {
                    false => EWDOGR::_0,
                    true => EWDOGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EWDOGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EWDOGR::_1
            }
        }
        #[doc = "Possible values of the field `EPIN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EPINR {
            #[doc = "The feature is not available."]
            _0,
            #[doc = "The feature is available."]
            _1,
        }
        impl EPINR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EPINR::_0 => false,
                    EPINR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EPINR {
                match value {
                    false => EPINR::_0,
                    true => EPINR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EPINR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EPINR::_1
            }
        }
        #[doc = "Possible values of the field `EPOR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EPORR {
            #[doc = "The feature is not available."]
            _0,
            #[doc = "The feature is available."]
            _1,
        }
        impl EPORR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EPORR::_0 => false,
                    EPORR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EPORR {
                match value {
                    false => EPORR::_0,
                    true => EPORR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EPORR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EPORR::_1
            }
        }
        #[doc = "Possible values of the field `EJTAG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EJTAGR {
            #[doc = "The feature is not available."]
            _0,
            #[doc = "The feature is available."]
            _1,
        }
        impl EJTAGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EJTAGR::_0 => false,
                    EJTAGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EJTAGR {
                match value {
                    false => EJTAGR::_0,
                    true => EJTAGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EJTAGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EJTAGR::_1
            }
        }
        #[doc = "Possible values of the field `ELOCKUP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ELOCKUPR {
            #[doc = "The feature is not available."]
            _0,
            #[doc = "The feature is available."]
            _1,
        }
        impl ELOCKUPR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ELOCKUPR::_0 => false,
                    ELOCKUPR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ELOCKUPR {
                match value {
                    false => ELOCKUPR::_0,
                    true => ELOCKUPR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ELOCKUPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ELOCKUPR::_1
            }
        }
        #[doc = "Possible values of the field `ESW`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ESWR {
            #[doc = "The feature is not available."]
            _0,
            #[doc = "The feature is available."]
            _1,
        }
        impl ESWR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ESWR::_0 => false,
                    ESWR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ESWR {
                match value {
                    false => ESWR::_0,
                    true => ESWR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ESWR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ESWR::_1
            }
        }
        #[doc = "Possible values of the field `EMDM_AP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum EMDM_APR {
            #[doc = "The feature is not available."]
            _0,
            #[doc = "The feature is available."]
            _1,
        }
        impl EMDM_APR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    EMDM_APR::_0 => false,
                    EMDM_APR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> EMDM_APR {
                match value {
                    false => EMDM_APR::_0,
                    true => EMDM_APR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == EMDM_APR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == EMDM_APR::_1
            }
        }
        #[doc = "Possible values of the field `ESACKERR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ESACKERRR {
            #[doc = "The feature is not available."]
            _0,
            #[doc = "The feature is available."]
            _1,
        }
        impl ESACKERRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ESACKERRR::_0 => false,
                    ESACKERRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ESACKERRR {
                match value {
                    false => ESACKERRR::_0,
                    true => ESACKERRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ESACKERRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ESACKERRR::_1
            }
        }
        #[doc = "Possible values of the field `ETAMPER`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ETAMPERR {
            #[doc = "The feature is not available."]
            _0,
            #[doc = "The feature is available."]
            _1,
        }
        impl ETAMPERR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ETAMPERR::_0 => false,
                    ETAMPERR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ETAMPERR {
                match value {
                    false => ETAMPERR::_0,
                    true => ETAMPERR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ETAMPERR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ETAMPERR::_1
            }
        }
        #[doc = "Possible values of the field `ECORE1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ECORE1R {
            #[doc = "The feature is not available."]
            _0,
            #[doc = "The feature is available."]
            _1,
        }
        impl ECORE1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ECORE1R::_0 => false,
                    ECORE1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ECORE1R {
                match value {
                    false => ECORE1R::_0,
                    true => ECORE1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ECORE1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ECORE1R::_1
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Existence of SRS[WAKEUP] status indication feature"]
            #[inline(always)]
            pub fn ewakeup(&self) -> EWAKEUPR {
                EWAKEUPR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Existence of SRS[LVD] status indication feature"]
            #[inline(always)]
            pub fn elvd(&self) -> ELVDR {
                ELVDR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Existence of SRS[LOC] status indication feature"]
            #[inline(always)]
            pub fn eloc(&self) -> ELOCR {
                ELOCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Existence of SRS[LOL] status indication feature"]
            #[inline(always)]
            pub fn elol(&self) -> ELOLR {
                ELOLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Existence of SRS[WDOG] status indication feature"]
            #[inline(always)]
            pub fn ewdog(&self) -> EWDOGR {
                EWDOGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Existence of SRS[PIN] status indication feature"]
            #[inline(always)]
            pub fn epin(&self) -> EPINR {
                EPINR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Existence of SRS[POR] status indication feature"]
            #[inline(always)]
            pub fn epor(&self) -> EPORR {
                EPORR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Existence of SRS[JTAG] status indication feature"]
            #[inline(always)]
            pub fn ejtag(&self) -> EJTAGR {
                EJTAGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Existence of SRS[LOCKUP] status indication feature"]
            #[inline(always)]
            pub fn elockup(&self) -> ELOCKUPR {
                ELOCKUPR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Existence of SRS[SW] status indication feature"]
            #[inline(always)]
            pub fn esw(&self) -> ESWR {
                ESWR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 11 - Existence of SRS[MDM_AP] status indication feature"]
            #[inline(always)]
            pub fn emdm_ap(&self) -> EMDM_APR {
                EMDM_APR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Existence of SRS[SACKERR] status indication feature"]
            #[inline(always)]
            pub fn esackerr(&self) -> ESACKERRR {
                ESACKERRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - Existence of SRS[TAMPER] status indication feature"]
            #[inline(always)]
            pub fn etamper(&self) -> ETAMPERR {
                ETAMPERR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 16 - Existence of SRS[CORE1] status indication feature"]
            #[inline(always)]
            pub fn ecore1(&self) -> ECORE1R {
                ECORE1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
    }
    #[doc = "System Reset Status Register"]
    pub struct SRS {
        register: VolatileCell<u32>,
    }
    #[doc = "System Reset Status Register"]
    pub mod srs {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::SRS {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = "Possible values of the field `LVD`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LVDR {
            #[doc = "Reset not caused by LVD trip, HVD trip or POR"]
            _0,
            #[doc = "Reset caused by LVD trip, HVD trip or POR"]
            _1,
        }
        impl LVDR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LVDR::_0 => false,
                    LVDR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LVDR {
                match value {
                    false => LVDR::_0,
                    true => LVDR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LVDR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LVDR::_1
            }
        }
        #[doc = "Possible values of the field `LOC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LOCR {
            #[doc = "Reset not caused by a loss of external clock."]
            _0,
            #[doc = "Reset caused by a loss of external clock."]
            _1,
        }
        impl LOCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LOCR::_0 => false,
                    LOCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LOCR {
                match value {
                    false => LOCR::_0,
                    true => LOCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LOCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LOCR::_1
            }
        }
        #[doc = "Possible values of the field `LOL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LOLR {
            #[doc = "Reset not caused by a loss of lock in the PLL/FLL"]
            _0,
            #[doc = "Reset caused by a loss of lock in the PLL/FLL"]
            _1,
        }
        impl LOLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LOLR::_0 => false,
                    LOLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LOLR {
                match value {
                    false => LOLR::_0,
                    true => LOLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LOLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LOLR::_1
            }
        }
        #[doc = "Possible values of the field `WDOG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WDOGR {
            #[doc = "Reset not caused by watchdog timeout"]
            _0,
            #[doc = "Reset caused by watchdog timeout"]
            _1,
        }
        impl WDOGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WDOGR::_0 => false,
                    WDOGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WDOGR {
                match value {
                    false => WDOGR::_0,
                    true => WDOGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WDOGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WDOGR::_1
            }
        }
        #[doc = "Possible values of the field `PIN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PINR {
            #[doc = "Reset not caused by external reset pin"]
            _0,
            #[doc = "Reset caused by external reset pin"]
            _1,
        }
        impl PINR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PINR::_0 => false,
                    PINR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PINR {
                match value {
                    false => PINR::_0,
                    true => PINR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PINR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PINR::_1
            }
        }
        #[doc = "Possible values of the field `POR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PORR {
            #[doc = "Reset not caused by POR"]
            _0,
            #[doc = "Reset caused by POR"]
            _1,
        }
        impl PORR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PORR::_0 => false,
                    PORR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PORR {
                match value {
                    false => PORR::_0,
                    true => PORR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PORR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PORR::_1
            }
        }
        #[doc = "Possible values of the field `JTAG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum JTAGR {
            #[doc = "Reset not caused by JTAG"]
            _0,
            #[doc = "Reset caused by JTAG"]
            _1,
        }
        impl JTAGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    JTAGR::_0 => false,
                    JTAGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> JTAGR {
                match value {
                    false => JTAGR::_0,
                    true => JTAGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == JTAGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == JTAGR::_1
            }
        }
        #[doc = "Possible values of the field `LOCKUP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LOCKUPR {
            #[doc = "Reset not caused by core LOCKUP event"]
            _0,
            #[doc = "Reset caused by core LOCKUP event"]
            _1,
        }
        impl LOCKUPR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LOCKUPR::_0 => false,
                    LOCKUPR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LOCKUPR {
                match value {
                    false => LOCKUPR::_0,
                    true => LOCKUPR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LOCKUPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LOCKUPR::_1
            }
        }
        #[doc = "Possible values of the field `SW`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SWR {
            #[doc = "Reset not caused by software setting of SYSRESETREQ bit"]
            _0,
            #[doc = "Reset caused by software setting of SYSRESETREQ bit"]
            _1,
        }
        impl SWR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SWR::_0 => false,
                    SWR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SWR {
                match value {
                    false => SWR::_0,
                    true => SWR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SWR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SWR::_1
            }
        }
        #[doc = "Possible values of the field `MDM_AP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MDM_APR {
            #[doc = "Reset was not caused by host debugger system setting of the System Reset Request bit"]
            _0,
            #[doc = "Reset was caused by host debugger system setting of the System Reset Request bit"]
            _1,
        }
        impl MDM_APR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MDM_APR::_0 => false,
                    MDM_APR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MDM_APR {
                match value {
                    false => MDM_APR::_0,
                    true => MDM_APR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MDM_APR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MDM_APR::_1
            }
        }
        #[doc = "Possible values of the field `SACKERR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SACKERRR {
            #[doc = "Reset not caused by peripheral failure to acknowledge attempt to enter stop mode"]
            _0,
            #[doc = "Reset caused by peripheral failure to acknowledge attempt to enter stop mode"]
            _1,
        }
        impl SACKERRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SACKERRR::_0 => false,
                    SACKERRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SACKERRR {
                match value {
                    false => SACKERRR::_0,
                    true => SACKERRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SACKERRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SACKERRR::_1
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 1 - Low-Voltage Detect Reset or High-Voltage Detect Reset"]
            #[inline(always)]
            pub fn lvd(&self) -> LVDR {
                LVDR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Loss-of-Clock Reset"]
            #[inline(always)]
            pub fn loc(&self) -> LOCR {
                LOCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Loss-of-Lock Reset"]
            #[inline(always)]
            pub fn lol(&self) -> LOLR {
                LOLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Watchdog"]
            #[inline(always)]
            pub fn wdog(&self) -> WDOGR {
                WDOGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - External Reset Pin"]
            #[inline(always)]
            pub fn pin(&self) -> PINR {
                PINR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Power-On Reset"]
            #[inline(always)]
            pub fn por(&self) -> PORR {
                PORR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - JTAG generated reset"]
            #[inline(always)]
            pub fn jtag(&self) -> JTAGR {
                JTAGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Core Lockup"]
            #[inline(always)]
            pub fn lockup(&self) -> LOCKUPR {
                LOCKUPR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Software"]
            #[inline(always)]
            pub fn sw(&self) -> SWR {
                SWR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 11 - MDM-AP System Reset Request"]
            #[inline(always)]
            pub fn mdm_ap(&self) -> MDM_APR {
                MDM_APR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Stop Acknowledge Error"]
            #[inline(always)]
            pub fn sackerr(&self) -> SACKERRR {
                SACKERRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
    }
    #[doc = "Reset Pin Control register"]
    pub struct RPC {
        register: VolatileCell<u32>,
    }
    #[doc = "Reset Pin Control register"]
    pub mod rpc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::RPC {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `RSTFLTSRW`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RSTFLTSRWR {
            #[doc = "All filtering disabled"]
            _00,
            #[doc = "Bus clock filter enabled for normal operation"]
            _01,
            #[doc = "LPO clock filter enabled for normal operation"]
            _10,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl RSTFLTSRWR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    RSTFLTSRWR::_00 => 0,
                    RSTFLTSRWR::_01 => 1,
                    RSTFLTSRWR::_10 => 2,
                    RSTFLTSRWR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> RSTFLTSRWR {
                match value {
                    0 => RSTFLTSRWR::_00,
                    1 => RSTFLTSRWR::_01,
                    2 => RSTFLTSRWR::_10,
                    i => RSTFLTSRWR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == RSTFLTSRWR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == RSTFLTSRWR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == RSTFLTSRWR::_10
            }
        }
        #[doc = "Possible values of the field `RSTFLTSS`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum RSTFLTSSR {
            #[doc = "All filtering disabled"]
            _0,
            #[doc = "LPO clock filter enabled"]
            _1,
        }
        impl RSTFLTSSR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    RSTFLTSSR::_0 => false,
                    RSTFLTSSR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> RSTFLTSSR {
                match value {
                    false => RSTFLTSSR::_0,
                    true => RSTFLTSSR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == RSTFLTSSR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == RSTFLTSSR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct RSTFLTSELR {
            bits: u8,
        }
        impl RSTFLTSELR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Values that can be written to the field `RSTFLTSRW`"]
        pub enum RSTFLTSRWW {
            #[doc = "All filtering disabled"]
            _00,
            #[doc = "Bus clock filter enabled for normal operation"]
            _01,
            #[doc = "LPO clock filter enabled for normal operation"]
            _10,
        }
        impl RSTFLTSRWW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    RSTFLTSRWW::_00 => 0,
                    RSTFLTSRWW::_01 => 1,
                    RSTFLTSRWW::_10 => 2,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RSTFLTSRWW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RSTFLTSRWW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RSTFLTSRWW) -> &'a mut W {
                unsafe { self.bits(variant._bits()) }
            }
            #[doc = "All filtering disabled"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(RSTFLTSRWW::_00)
            }
            #[doc = "Bus clock filter enabled for normal operation"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(RSTFLTSRWW::_01)
            }
            #[doc = "LPO clock filter enabled for normal operation"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(RSTFLTSRWW::_10)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `RSTFLTSS`"]
        pub enum RSTFLTSSW {
            #[doc = "All filtering disabled"]
            _0,
            #[doc = "LPO clock filter enabled"]
            _1,
        }
        impl RSTFLTSSW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    RSTFLTSSW::_0 => false,
                    RSTFLTSSW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _RSTFLTSSW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RSTFLTSSW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: RSTFLTSSW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "All filtering disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(RSTFLTSSW::_0)
            }
            #[doc = "LPO clock filter enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(RSTFLTSSW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _RSTFLTSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _RSTFLTSELW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 31;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:1 - Reset Pin Filter Select in Run and Wait Modes"]
            #[inline(always)]
            pub fn rstfltsrw(&self) -> RSTFLTSRWR {
                RSTFLTSRWR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 2 - Reset Pin Filter Select in Stop Mode"]
            #[inline(always)]
            pub fn rstfltss(&self) -> RSTFLTSSR {
                RSTFLTSSR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 8:12 - Reset Pin Filter Bus Clock Select"]
            #[inline(always)]
            pub fn rstfltsel(&self) -> RSTFLTSELR {
                let bits = {
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                RSTFLTSELR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:1 - Reset Pin Filter Select in Run and Wait Modes"]
            #[inline(always)]
            pub fn rstfltsrw(&mut self) -> _RSTFLTSRWW {
                _RSTFLTSRWW { w: self }
            }
            #[doc = "Bit 2 - Reset Pin Filter Select in Stop Mode"]
            #[inline(always)]
            pub fn rstfltss(&mut self) -> _RSTFLTSSW {
                _RSTFLTSSW { w: self }
            }
            #[doc = "Bits 8:12 - Reset Pin Filter Bus Clock Select"]
            #[inline(always)]
            pub fn rstfltsel(&mut self) -> _RSTFLTSELW {
                _RSTFLTSELW { w: self }
            }
        }
    }
    #[doc = "Sticky System Reset Status Register"]
    pub struct SSRS {
        register: VolatileCell<u32>,
    }
    #[doc = "Sticky System Reset Status Register"]
    pub mod ssrs {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SSRS {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `SLVD`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SLVDR {
            #[doc = "Reset not caused by LVD trip or POR"]
            _0,
            #[doc = "Reset caused by LVD trip or POR"]
            _1,
        }
        impl SLVDR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SLVDR::_0 => false,
                    SLVDR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SLVDR {
                match value {
                    false => SLVDR::_0,
                    true => SLVDR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SLVDR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SLVDR::_1
            }
        }
        #[doc = "Possible values of the field `SLOC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SLOCR {
            #[doc = "Reset not caused by a loss of external clock."]
            _0,
            #[doc = "Reset caused by a loss of external clock."]
            _1,
        }
        impl SLOCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SLOCR::_0 => false,
                    SLOCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SLOCR {
                match value {
                    false => SLOCR::_0,
                    true => SLOCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SLOCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SLOCR::_1
            }
        }
        #[doc = "Possible values of the field `SLOL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SLOLR {
            #[doc = "Reset not caused by a loss of lock in the PLL/FLL"]
            _0,
            #[doc = "Reset caused by a loss of lock in the PLL/FLL"]
            _1,
        }
        impl SLOLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SLOLR::_0 => false,
                    SLOLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SLOLR {
                match value {
                    false => SLOLR::_0,
                    true => SLOLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SLOLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SLOLR::_1
            }
        }
        #[doc = "Possible values of the field `SWDOG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SWDOGR {
            #[doc = "Reset not caused by watchdog timeout"]
            _0,
            #[doc = "Reset caused by watchdog timeout"]
            _1,
        }
        impl SWDOGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SWDOGR::_0 => false,
                    SWDOGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SWDOGR {
                match value {
                    false => SWDOGR::_0,
                    true => SWDOGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SWDOGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SWDOGR::_1
            }
        }
        #[doc = "Possible values of the field `SPIN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SPINR {
            #[doc = "Reset not caused by external reset pin"]
            _0,
            #[doc = "Reset caused by external reset pin"]
            _1,
        }
        impl SPINR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SPINR::_0 => false,
                    SPINR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SPINR {
                match value {
                    false => SPINR::_0,
                    true => SPINR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SPINR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SPINR::_1
            }
        }
        #[doc = "Possible values of the field `SPOR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SPORR {
            #[doc = "Reset not caused by POR"]
            _0,
            #[doc = "Reset caused by POR"]
            _1,
        }
        impl SPORR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SPORR::_0 => false,
                    SPORR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SPORR {
                match value {
                    false => SPORR::_0,
                    true => SPORR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SPORR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SPORR::_1
            }
        }
        #[doc = "Possible values of the field `SJTAG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SJTAGR {
            #[doc = "Reset not caused by JTAG"]
            _0,
            #[doc = "Reset caused by JTAG"]
            _1,
        }
        impl SJTAGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SJTAGR::_0 => false,
                    SJTAGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SJTAGR {
                match value {
                    false => SJTAGR::_0,
                    true => SJTAGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SJTAGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SJTAGR::_1
            }
        }
        #[doc = "Possible values of the field `SLOCKUP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SLOCKUPR {
            #[doc = "Reset not caused by core LOCKUP event"]
            _0,
            #[doc = "Reset caused by core LOCKUP event"]
            _1,
        }
        impl SLOCKUPR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SLOCKUPR::_0 => false,
                    SLOCKUPR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SLOCKUPR {
                match value {
                    false => SLOCKUPR::_0,
                    true => SLOCKUPR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SLOCKUPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SLOCKUPR::_1
            }
        }
        #[doc = "Possible values of the field `SSW`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SSWR {
            #[doc = "Reset not caused by software setting of SYSRESETREQ bit"]
            _0,
            #[doc = "Reset caused by software setting of SYSRESETREQ bit"]
            _1,
        }
        impl SSWR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SSWR::_0 => false,
                    SSWR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SSWR {
                match value {
                    false => SSWR::_0,
                    true => SSWR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SSWR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SSWR::_1
            }
        }
        #[doc = "Possible values of the field `SMDM_AP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SMDM_APR {
            #[doc = "Reset was not caused by host debugger system setting of the System Reset Request bit"]
            _0,
            #[doc = "Reset was caused by host debugger system setting of the System Reset Request bit"]
            _1,
        }
        impl SMDM_APR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SMDM_APR::_0 => false,
                    SMDM_APR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SMDM_APR {
                match value {
                    false => SMDM_APR::_0,
                    true => SMDM_APR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SMDM_APR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SMDM_APR::_1
            }
        }
        #[doc = "Possible values of the field `SSACKERR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SSACKERRR {
            #[doc = "Reset not caused by peripheral failure to acknowledge attempt to enter stop mode"]
            _0,
            #[doc = "Reset caused by peripheral failure to acknowledge attempt to enter stop mode"]
            _1,
        }
        impl SSACKERRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SSACKERRR::_0 => false,
                    SSACKERRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SSACKERRR {
                match value {
                    false => SSACKERRR::_0,
                    true => SSACKERRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SSACKERRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SSACKERRR::_1
            }
        }
        #[doc = "Values that can be written to the field `SLVD`"]
        pub enum SLVDW {
            #[doc = "Reset not caused by LVD trip or POR"]
            _0,
            #[doc = "Reset caused by LVD trip or POR"]
            _1,
        }
        impl SLVDW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SLVDW::_0 => false,
                    SLVDW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SLVDW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SLVDW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SLVDW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Reset not caused by LVD trip or POR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SLVDW::_0)
            }
            #[doc = "Reset caused by LVD trip or POR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SLVDW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 1;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SLOC`"]
        pub enum SLOCW {
            #[doc = "Reset not caused by a loss of external clock."]
            _0,
            #[doc = "Reset caused by a loss of external clock."]
            _1,
        }
        impl SLOCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SLOCW::_0 => false,
                    SLOCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SLOCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SLOCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SLOCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Reset not caused by a loss of external clock."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SLOCW::_0)
            }
            #[doc = "Reset caused by a loss of external clock."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SLOCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SLOL`"]
        pub enum SLOLW {
            #[doc = "Reset not caused by a loss of lock in the PLL/FLL"]
            _0,
            #[doc = "Reset caused by a loss of lock in the PLL/FLL"]
            _1,
        }
        impl SLOLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SLOLW::_0 => false,
                    SLOLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SLOLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SLOLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SLOLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Reset not caused by a loss of lock in the PLL/FLL"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SLOLW::_0)
            }
            #[doc = "Reset caused by a loss of lock in the PLL/FLL"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SLOLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SWDOG`"]
        pub enum SWDOGW {
            #[doc = "Reset not caused by watchdog timeout"]
            _0,
            #[doc = "Reset caused by watchdog timeout"]
            _1,
        }
        impl SWDOGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SWDOGW::_0 => false,
                    SWDOGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SWDOGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SWDOGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SWDOGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Reset not caused by watchdog timeout"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SWDOGW::_0)
            }
            #[doc = "Reset caused by watchdog timeout"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SWDOGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SPIN`"]
        pub enum SPINW {
            #[doc = "Reset not caused by external reset pin"]
            _0,
            #[doc = "Reset caused by external reset pin"]
            _1,
        }
        impl SPINW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SPINW::_0 => false,
                    SPINW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SPINW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SPINW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SPINW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Reset not caused by external reset pin"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SPINW::_0)
            }
            #[doc = "Reset caused by external reset pin"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SPINW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SPOR`"]
        pub enum SPORW {
            #[doc = "Reset not caused by POR"]
            _0,
            #[doc = "Reset caused by POR"]
            _1,
        }
        impl SPORW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SPORW::_0 => false,
                    SPORW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SPORW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SPORW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SPORW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Reset not caused by POR"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SPORW::_0)
            }
            #[doc = "Reset caused by POR"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SPORW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SJTAG`"]
        pub enum SJTAGW {
            #[doc = "Reset not caused by JTAG"]
            _0,
            #[doc = "Reset caused by JTAG"]
            _1,
        }
        impl SJTAGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SJTAGW::_0 => false,
                    SJTAGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SJTAGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SJTAGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SJTAGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Reset not caused by JTAG"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SJTAGW::_0)
            }
            #[doc = "Reset caused by JTAG"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SJTAGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SLOCKUP`"]
        pub enum SLOCKUPW {
            #[doc = "Reset not caused by core LOCKUP event"]
            _0,
            #[doc = "Reset caused by core LOCKUP event"]
            _1,
        }
        impl SLOCKUPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SLOCKUPW::_0 => false,
                    SLOCKUPW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SLOCKUPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SLOCKUPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SLOCKUPW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Reset not caused by core LOCKUP event"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SLOCKUPW::_0)
            }
            #[doc = "Reset caused by core LOCKUP event"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SLOCKUPW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SSW`"]
        pub enum SSWW {
            #[doc = "Reset not caused by software setting of SYSRESETREQ bit"]
            _0,
            #[doc = "Reset caused by software setting of SYSRESETREQ bit"]
            _1,
        }
        impl SSWW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SSWW::_0 => false,
                    SSWW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SSWW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SSWW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SSWW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Reset not caused by software setting of SYSRESETREQ bit"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SSWW::_0)
            }
            #[doc = "Reset caused by software setting of SYSRESETREQ bit"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SSWW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SMDM_AP`"]
        pub enum SMDM_APW {
            #[doc = "Reset was not caused by host debugger system setting of the System Reset Request bit"]
            _0,
            #[doc = "Reset was caused by host debugger system setting of the System Reset Request bit"]
            _1,
        }
        impl SMDM_APW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SMDM_APW::_0 => false,
                    SMDM_APW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SMDM_APW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SMDM_APW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SMDM_APW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Reset was not caused by host debugger system setting of the System Reset Request bit"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SMDM_APW::_0)
            }
            #[doc = "Reset was caused by host debugger system setting of the System Reset Request bit"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SMDM_APW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SSACKERR`"]
        pub enum SSACKERRW {
            #[doc = "Reset not caused by peripheral failure to acknowledge attempt to enter stop mode"]
            _0,
            #[doc = "Reset caused by peripheral failure to acknowledge attempt to enter stop mode"]
            _1,
        }
        impl SSACKERRW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SSACKERRW::_0 => false,
                    SSACKERRW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SSACKERRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SSACKERRW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SSACKERRW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Reset not caused by peripheral failure to acknowledge attempt to enter stop mode"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SSACKERRW::_0)
            }
            #[doc = "Reset caused by peripheral failure to acknowledge attempt to enter stop mode"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SSACKERRW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 1 - Sticky Low-Voltage Detect Reset"]
            #[inline(always)]
            pub fn slvd(&self) -> SLVDR {
                SLVDR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Sticky Loss-of-Clock Reset"]
            #[inline(always)]
            pub fn sloc(&self) -> SLOCR {
                SLOCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Sticky Loss-of-Lock Reset"]
            #[inline(always)]
            pub fn slol(&self) -> SLOLR {
                SLOLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Sticky Watchdog"]
            #[inline(always)]
            pub fn swdog(&self) -> SWDOGR {
                SWDOGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Sticky External Reset Pin"]
            #[inline(always)]
            pub fn spin(&self) -> SPINR {
                SPINR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Sticky Power-On Reset"]
            #[inline(always)]
            pub fn spor(&self) -> SPORR {
                SPORR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Sticky JTAG generated reset"]
            #[inline(always)]
            pub fn sjtag(&self) -> SJTAGR {
                SJTAGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Sticky Core Lockup"]
            #[inline(always)]
            pub fn slockup(&self) -> SLOCKUPR {
                SLOCKUPR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Sticky Software"]
            #[inline(always)]
            pub fn ssw(&self) -> SSWR {
                SSWR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 11 - Sticky MDM-AP System Reset Request"]
            #[inline(always)]
            pub fn smdm_ap(&self) -> SMDM_APR {
                SMDM_APR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Sticky Stop Acknowledge Error"]
            #[inline(always)]
            pub fn ssackerr(&self) -> SSACKERRR {
                SSACKERRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 130 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 1 - Sticky Low-Voltage Detect Reset"]
            #[inline(always)]
            pub fn slvd(&mut self) -> _SLVDW {
                _SLVDW { w: self }
            }
            #[doc = "Bit 2 - Sticky Loss-of-Clock Reset"]
            #[inline(always)]
            pub fn sloc(&mut self) -> _SLOCW {
                _SLOCW { w: self }
            }
            #[doc = "Bit 3 - Sticky Loss-of-Lock Reset"]
            #[inline(always)]
            pub fn slol(&mut self) -> _SLOLW {
                _SLOLW { w: self }
            }
            #[doc = "Bit 5 - Sticky Watchdog"]
            #[inline(always)]
            pub fn swdog(&mut self) -> _SWDOGW {
                _SWDOGW { w: self }
            }
            #[doc = "Bit 6 - Sticky External Reset Pin"]
            #[inline(always)]
            pub fn spin(&mut self) -> _SPINW {
                _SPINW { w: self }
            }
            #[doc = "Bit 7 - Sticky Power-On Reset"]
            #[inline(always)]
            pub fn spor(&mut self) -> _SPORW {
                _SPORW { w: self }
            }
            #[doc = "Bit 8 - Sticky JTAG generated reset"]
            #[inline(always)]
            pub fn sjtag(&mut self) -> _SJTAGW {
                _SJTAGW { w: self }
            }
            #[doc = "Bit 9 - Sticky Core Lockup"]
            #[inline(always)]
            pub fn slockup(&mut self) -> _SLOCKUPW {
                _SLOCKUPW { w: self }
            }
            #[doc = "Bit 10 - Sticky Software"]
            #[inline(always)]
            pub fn ssw(&mut self) -> _SSWW {
                _SSWW { w: self }
            }
            #[doc = "Bit 11 - Sticky MDM-AP System Reset Request"]
            #[inline(always)]
            pub fn smdm_ap(&mut self) -> _SMDM_APW {
                _SMDM_APW { w: self }
            }
            #[doc = "Bit 13 - Sticky Stop Acknowledge Error"]
            #[inline(always)]
            pub fn ssackerr(&mut self) -> _SSACKERRW {
                _SSACKERRW { w: self }
            }
        }
    }
    #[doc = "System Reset Interrupt Enable Register"]
    pub struct SRIE {
        register: VolatileCell<u32>,
    }
    #[doc = "System Reset Interrupt Enable Register"]
    pub mod srie {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::SRIE {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `DELAY`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DELAYR {
            #[doc = "10 LPO cycles"]
            _00,
            #[doc = "34 LPO cycles"]
            _01,
            #[doc = "130 LPO cycles"]
            _10,
            #[doc = "514 LPO cycles"]
            _11,
        }
        impl DELAYR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    DELAYR::_00 => 0,
                    DELAYR::_01 => 1,
                    DELAYR::_10 => 2,
                    DELAYR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> DELAYR {
                match value {
                    0 => DELAYR::_00,
                    1 => DELAYR::_01,
                    2 => DELAYR::_10,
                    3 => DELAYR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == DELAYR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == DELAYR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == DELAYR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == DELAYR::_11
            }
        }
        #[doc = "Possible values of the field `LOC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LOCR {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl LOCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LOCR::_0 => false,
                    LOCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LOCR {
                match value {
                    false => LOCR::_0,
                    true => LOCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LOCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LOCR::_1
            }
        }
        #[doc = "Possible values of the field `LOL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LOLR {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl LOLR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LOLR::_0 => false,
                    LOLR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LOLR {
                match value {
                    false => LOLR::_0,
                    true => LOLR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LOLR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LOLR::_1
            }
        }
        #[doc = "Possible values of the field `WDOG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WDOGR {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl WDOGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WDOGR::_0 => false,
                    WDOGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WDOGR {
                match value {
                    false => WDOGR::_0,
                    true => WDOGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WDOGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WDOGR::_1
            }
        }
        #[doc = "Possible values of the field `PIN`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PINR {
            #[doc = "Reset not caused by external reset pin"]
            _0,
            #[doc = "Reset caused by external reset pin"]
            _1,
        }
        impl PINR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PINR::_0 => false,
                    PINR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PINR {
                match value {
                    false => PINR::_0,
                    true => PINR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PINR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PINR::_1
            }
        }
        #[doc = "Possible values of the field `GIE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum GIER {
            #[doc = "All interrupt sources disabled."]
            _0,
            #[doc = "All interrupt sources enabled. Note that the individual interrupt-enable bits still need to be set to generate interrupts."]
            _1,
        }
        impl GIER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    GIER::_0 => false,
                    GIER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> GIER {
                match value {
                    false => GIER::_0,
                    true => GIER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == GIER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == GIER::_1
            }
        }
        #[doc = "Possible values of the field `JTAG`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum JTAGR {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl JTAGR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    JTAGR::_0 => false,
                    JTAGR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> JTAGR {
                match value {
                    false => JTAGR::_0,
                    true => JTAGR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == JTAGR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == JTAGR::_1
            }
        }
        #[doc = "Possible values of the field `LOCKUP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LOCKUPR {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl LOCKUPR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LOCKUPR::_0 => false,
                    LOCKUPR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LOCKUPR {
                match value {
                    false => LOCKUPR::_0,
                    true => LOCKUPR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LOCKUPR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LOCKUPR::_1
            }
        }
        #[doc = "Possible values of the field `SW`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SWR {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl SWR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SWR::_0 => false,
                    SWR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SWR {
                match value {
                    false => SWR::_0,
                    true => SWR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SWR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SWR::_1
            }
        }
        #[doc = "Possible values of the field `MDM_AP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MDM_APR {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl MDM_APR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    MDM_APR::_0 => false,
                    MDM_APR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> MDM_APR {
                match value {
                    false => MDM_APR::_0,
                    true => MDM_APR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == MDM_APR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == MDM_APR::_1
            }
        }
        #[doc = "Possible values of the field `SACKERR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SACKERRR {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl SACKERRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    SACKERRR::_0 => false,
                    SACKERRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> SACKERRR {
                match value {
                    false => SACKERRR::_0,
                    true => SACKERRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == SACKERRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == SACKERRR::_1
            }
        }
        #[doc = "Values that can be written to the field `DELAY`"]
        pub enum DELAYW {
            #[doc = "10 LPO cycles"]
            _00,
            #[doc = "34 LPO cycles"]
            _01,
            #[doc = "130 LPO cycles"]
            _10,
            #[doc = "514 LPO cycles"]
            _11,
        }
        impl DELAYW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    DELAYW::_00 => 0,
                    DELAYW::_01 => 1,
                    DELAYW::_10 => 2,
                    DELAYW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _DELAYW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DELAYW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: DELAYW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "10 LPO cycles"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(DELAYW::_00)
            }
            #[doc = "34 LPO cycles"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(DELAYW::_01)
            }
            #[doc = "130 LPO cycles"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(DELAYW::_10)
            }
            #[doc = "514 LPO cycles"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(DELAYW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LOC`"]
        pub enum LOCW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl LOCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LOCW::_0 => false,
                    LOCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LOCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LOCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LOCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LOCW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LOCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LOL`"]
        pub enum LOLW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl LOLW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LOLW::_0 => false,
                    LOLW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LOLW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LOLW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LOLW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LOLW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LOLW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WDOG`"]
        pub enum WDOGW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl WDOGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WDOGW::_0 => false,
                    WDOGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WDOGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WDOGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WDOGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WDOGW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WDOGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 5;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PIN`"]
        pub enum PINW {
            #[doc = "Reset not caused by external reset pin"]
            _0,
            #[doc = "Reset caused by external reset pin"]
            _1,
        }
        impl PINW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PINW::_0 => false,
                    PINW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PINW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PINW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PINW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Reset not caused by external reset pin"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PINW::_0)
            }
            #[doc = "Reset caused by external reset pin"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PINW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `GIE`"]
        pub enum GIEW {
            #[doc = "All interrupt sources disabled."]
            _0,
            #[doc = "All interrupt sources enabled. Note that the individual interrupt-enable bits still need to be set to generate interrupts."]
            _1,
        }
        impl GIEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    GIEW::_0 => false,
                    GIEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _GIEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GIEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: GIEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "All interrupt sources disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(GIEW::_0)
            }
            #[doc = "All interrupt sources enabled. Note that the individual interrupt-enable bits still need to be set to generate interrupts."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(GIEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 7;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `JTAG`"]
        pub enum JTAGW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl JTAGW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    JTAGW::_0 => false,
                    JTAGW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _JTAGW<'a> {
            w: &'a mut W,
        }
        impl<'a> _JTAGW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: JTAGW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(JTAGW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(JTAGW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LOCKUP`"]
        pub enum LOCKUPW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl LOCKUPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LOCKUPW::_0 => false,
                    LOCKUPW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LOCKUPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LOCKUPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LOCKUPW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LOCKUPW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LOCKUPW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SW`"]
        pub enum SWW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl SWW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SWW::_0 => false,
                    SWW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SWW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SWW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SWW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SWW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SWW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `MDM_AP`"]
        pub enum MDM_APW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl MDM_APW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    MDM_APW::_0 => false,
                    MDM_APW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _MDM_APW<'a> {
            w: &'a mut W,
        }
        impl<'a> _MDM_APW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: MDM_APW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(MDM_APW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(MDM_APW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 11;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SACKERR`"]
        pub enum SACKERRW {
            #[doc = "Interrupt disabled."]
            _0,
            #[doc = "Interrupt enabled."]
            _1,
        }
        impl SACKERRW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    SACKERRW::_0 => false,
                    SACKERRW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SACKERRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SACKERRW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SACKERRW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Interrupt disabled."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(SACKERRW::_0)
            }
            #[doc = "Interrupt enabled."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(SACKERRW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 13;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:1 - Reset Delay Time"]
            #[inline(always)]
            pub fn delay(&self) -> DELAYR {
                DELAYR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 2 - Loss-of-Clock Interrupt"]
            #[inline(always)]
            pub fn loc(&self) -> LOCR {
                LOCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - Loss-of-Lock Interrupt"]
            #[inline(always)]
            pub fn lol(&self) -> LOLR {
                LOLR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 5 - Watchdog Interrupt"]
            #[inline(always)]
            pub fn wdog(&self) -> WDOGR {
                WDOGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 5;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - External Reset Pin Interrupt"]
            #[inline(always)]
            pub fn pin(&self) -> PINR {
                PINR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 7 - Global Interrupt Enable"]
            #[inline(always)]
            pub fn gie(&self) -> GIER {
                GIER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - JTAG generated reset"]
            #[inline(always)]
            pub fn jtag(&self) -> JTAGR {
                JTAGR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Core Lockup Interrupt"]
            #[inline(always)]
            pub fn lockup(&self) -> LOCKUPR {
                LOCKUPR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - Software Interrupt"]
            #[inline(always)]
            pub fn sw(&self) -> SWR {
                SWR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 11 - MDM-AP System Reset Request"]
            #[inline(always)]
            pub fn mdm_ap(&self) -> MDM_APR {
                MDM_APR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 13 - Stop Acknowledge Error Interrupt"]
            #[inline(always)]
            pub fn sackerr(&self) -> SACKERRR {
                SACKERRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:1 - Reset Delay Time"]
            #[inline(always)]
            pub fn delay(&mut self) -> _DELAYW {
                _DELAYW { w: self }
            }
            #[doc = "Bit 2 - Loss-of-Clock Interrupt"]
            #[inline(always)]
            pub fn loc(&mut self) -> _LOCW {
                _LOCW { w: self }
            }
            #[doc = "Bit 3 - Loss-of-Lock Interrupt"]
            #[inline(always)]
            pub fn lol(&mut self) -> _LOLW {
                _LOLW { w: self }
            }
            #[doc = "Bit 5 - Watchdog Interrupt"]
            #[inline(always)]
            pub fn wdog(&mut self) -> _WDOGW {
                _WDOGW { w: self }
            }
            #[doc = "Bit 6 - External Reset Pin Interrupt"]
            #[inline(always)]
            pub fn pin(&mut self) -> _PINW {
                _PINW { w: self }
            }
            #[doc = "Bit 7 - Global Interrupt Enable"]
            #[inline(always)]
            pub fn gie(&mut self) -> _GIEW {
                _GIEW { w: self }
            }
            #[doc = "Bit 8 - JTAG generated reset"]
            #[inline(always)]
            pub fn jtag(&mut self) -> _JTAGW {
                _JTAGW { w: self }
            }
            #[doc = "Bit 9 - Core Lockup Interrupt"]
            #[inline(always)]
            pub fn lockup(&mut self) -> _LOCKUPW {
                _LOCKUPW { w: self }
            }
            #[doc = "Bit 10 - Software Interrupt"]
            #[inline(always)]
            pub fn sw(&mut self) -> _SWW {
                _SWW { w: self }
            }
            #[doc = "Bit 11 - MDM-AP System Reset Request"]
            #[inline(always)]
            pub fn mdm_ap(&mut self) -> _MDM_APW {
                _MDM_APW { w: self }
            }
            #[doc = "Bit 13 - Stop Acknowledge Error Interrupt"]
            #[inline(always)]
            pub fn sackerr(&mut self) -> _SACKERRW {
                _SACKERRW { w: self }
            }
        }
    }
}
#[doc = "Reset Control Module"]
pub struct RCM {
    register_block: rcm::RegisterBlock,
}
impl Deref for RCM {
    type Target = rcm::RegisterBlock;
    fn deref(&self) -> &rcm::RegisterBlock {
        &self.register_block
    }
}
#[doc = "General Purpose Input/Output"]
pub const PTA: Peripheral<PTA> = unsafe { Peripheral::new(1074786304) };
#[doc = "General Purpose Input/Output"]
pub mod pta {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - Port Data Output Register"]
        pub pdor: PDOR,
        #[doc = "0x04 - Port Set Output Register"]
        pub psor: PSOR,
        #[doc = "0x08 - Port Clear Output Register"]
        pub pcor: PCOR,
        #[doc = "0x0c - Port Toggle Output Register"]
        pub ptor: PTOR,
        #[doc = "0x10 - Port Data Input Register"]
        pub pdir: PDIR,
        #[doc = "0x14 - Port Data Direction Register"]
        pub pddr: PDDR,
        #[doc = "0x18 - Port Input Disable Register"]
        pub pidr: PIDR,
    }
    #[doc = "Port Data Output Register"]
    pub struct PDOR {
        register: VolatileCell<u32>,
    }
    #[doc = "Port Data Output Register"]
    pub mod pdor {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PDOR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct PDOR {
            bits: u32,
        }
        impl PDOR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _PDOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PDOW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Port Data Output"]
            #[inline(always)]
            pub fn pdo(&self) -> PDOR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                PDOR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Port Data Output"]
            #[inline(always)]
            pub fn pdo(&mut self) -> _PDOW {
                _PDOW { w: self }
            }
        }
    }
    #[doc = "Port Set Output Register"]
    pub struct PSOR {
        register: VolatileCell<u32>,
    }
    #[doc = "Port Set Output Register"]
    pub mod psor {
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PSOR {
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
        }
        #[doc = r" Proxy"]
        pub struct _PTSOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PTSOW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Port Set Output"]
            #[inline(always)]
            pub fn ptso(&mut self) -> _PTSOW {
                _PTSOW { w: self }
            }
        }
    }
    #[doc = "Port Clear Output Register"]
    pub struct PCOR {
        register: VolatileCell<u32>,
    }
    #[doc = "Port Clear Output Register"]
    pub mod pcor {
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCOR {
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
        }
        #[doc = r" Proxy"]
        pub struct _PTCOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PTCOW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Port Clear Output"]
            #[inline(always)]
            pub fn ptco(&mut self) -> _PTCOW {
                _PTCOW { w: self }
            }
        }
    }
    #[doc = "Port Toggle Output Register"]
    pub struct PTOR {
        register: VolatileCell<u32>,
    }
    #[doc = "Port Toggle Output Register"]
    pub mod ptor {
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PTOR {
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
        }
        #[doc = r" Proxy"]
        pub struct _PTTOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PTTOW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Port Toggle Output"]
            #[inline(always)]
            pub fn ptto(&mut self) -> _PTTOW {
                _PTTOW { w: self }
            }
        }
    }
    #[doc = "Port Data Input Register"]
    pub struct PDIR {
        register: VolatileCell<u32>,
    }
    #[doc = "Port Data Input Register"]
    pub mod pdir {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::PDIR {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct PDIR {
            bits: u32,
        }
        impl PDIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Port Data Input"]
            #[inline(always)]
            pub fn pdi(&self) -> PDIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                PDIR { bits }
            }
        }
    }
    #[doc = "Port Data Direction Register"]
    pub struct PDDR {
        register: VolatileCell<u32>,
    }
    #[doc = "Port Data Direction Register"]
    pub mod pddr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PDDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct PDDR {
            bits: u32,
        }
        impl PDDR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _PDDW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PDDW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Port Data Direction"]
            #[inline(always)]
            pub fn pdd(&self) -> PDDR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                PDDR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Port Data Direction"]
            #[inline(always)]
            pub fn pdd(&mut self) -> _PDDW {
                _PDDW { w: self }
            }
        }
    }
    #[doc = "Port Input Disable Register"]
    pub struct PIDR {
        register: VolatileCell<u32>,
    }
    #[doc = "Port Input Disable Register"]
    pub mod pidr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PIDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct PIDR {
            bits: u32,
        }
        impl PIDR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _PIDW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PIDW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Port Input Disable"]
            #[inline(always)]
            pub fn pid(&self) -> PIDR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                PIDR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Port Input Disable"]
            #[inline(always)]
            pub fn pid(&mut self) -> _PIDW {
                _PIDW { w: self }
            }
        }
    }
}
#[doc = "General Purpose Input/Output"]
pub struct PTA {
    register_block: pta::RegisterBlock,
}
impl Deref for PTA {
    type Target = pta::RegisterBlock;
    fn deref(&self) -> &pta::RegisterBlock {
        &self.register_block
    }
}
#[doc = "General Purpose Input/Output"]
pub const PTB: Peripheral<PTB> = unsafe { Peripheral::new(1074786368) };
#[doc = "General Purpose Input/Output"]
pub mod ptb {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - Port Data Output Register"]
        pub pdor: PDOR,
        #[doc = "0x04 - Port Set Output Register"]
        pub psor: PSOR,
        #[doc = "0x08 - Port Clear Output Register"]
        pub pcor: PCOR,
        #[doc = "0x0c - Port Toggle Output Register"]
        pub ptor: PTOR,
        #[doc = "0x10 - Port Data Input Register"]
        pub pdir: PDIR,
        #[doc = "0x14 - Port Data Direction Register"]
        pub pddr: PDDR,
        #[doc = "0x18 - Port Input Disable Register"]
        pub pidr: PIDR,
    }
    #[doc = "Port Data Output Register"]
    pub struct PDOR {
        register: VolatileCell<u32>,
    }
    #[doc = "Port Data Output Register"]
    pub mod pdor {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PDOR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct PDOR {
            bits: u32,
        }
        impl PDOR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _PDOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PDOW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Port Data Output"]
            #[inline(always)]
            pub fn pdo(&self) -> PDOR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                PDOR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Port Data Output"]
            #[inline(always)]
            pub fn pdo(&mut self) -> _PDOW {
                _PDOW { w: self }
            }
        }
    }
    #[doc = "Port Set Output Register"]
    pub struct PSOR {
        register: VolatileCell<u32>,
    }
    #[doc = "Port Set Output Register"]
    pub mod psor {
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PSOR {
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
        }
        #[doc = r" Proxy"]
        pub struct _PTSOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PTSOW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Port Set Output"]
            #[inline(always)]
            pub fn ptso(&mut self) -> _PTSOW {
                _PTSOW { w: self }
            }
        }
    }
    #[doc = "Port Clear Output Register"]
    pub struct PCOR {
        register: VolatileCell<u32>,
    }
    #[doc = "Port Clear Output Register"]
    pub mod pcor {
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCOR {
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
        }
        #[doc = r" Proxy"]
        pub struct _PTCOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PTCOW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Port Clear Output"]
            #[inline(always)]
            pub fn ptco(&mut self) -> _PTCOW {
                _PTCOW { w: self }
            }
        }
    }
    #[doc = "Port Toggle Output Register"]
    pub struct PTOR {
        register: VolatileCell<u32>,
    }
    #[doc = "Port Toggle Output Register"]
    pub mod ptor {
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PTOR {
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
        }
        #[doc = r" Proxy"]
        pub struct _PTTOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PTTOW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Port Toggle Output"]
            #[inline(always)]
            pub fn ptto(&mut self) -> _PTTOW {
                _PTTOW { w: self }
            }
        }
    }
    #[doc = "Port Data Input Register"]
    pub struct PDIR {
        register: VolatileCell<u32>,
    }
    #[doc = "Port Data Input Register"]
    pub mod pdir {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::PDIR {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct PDIR {
            bits: u32,
        }
        impl PDIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Port Data Input"]
            #[inline(always)]
            pub fn pdi(&self) -> PDIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                PDIR { bits }
            }
        }
    }
    #[doc = "Port Data Direction Register"]
    pub struct PDDR {
        register: VolatileCell<u32>,
    }
    #[doc = "Port Data Direction Register"]
    pub mod pddr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PDDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct PDDR {
            bits: u32,
        }
        impl PDDR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _PDDW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PDDW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Port Data Direction"]
            #[inline(always)]
            pub fn pdd(&self) -> PDDR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                PDDR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Port Data Direction"]
            #[inline(always)]
            pub fn pdd(&mut self) -> _PDDW {
                _PDDW { w: self }
            }
        }
    }
    #[doc = "Port Input Disable Register"]
    pub struct PIDR {
        register: VolatileCell<u32>,
    }
    #[doc = "Port Input Disable Register"]
    pub mod pidr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PIDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct PIDR {
            bits: u32,
        }
        impl PIDR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _PIDW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PIDW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Port Input Disable"]
            #[inline(always)]
            pub fn pid(&self) -> PIDR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                PIDR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Port Input Disable"]
            #[inline(always)]
            pub fn pid(&mut self) -> _PIDW {
                _PIDW { w: self }
            }
        }
    }
}
#[doc = "General Purpose Input/Output"]
pub struct PTB {
    register_block: ptb::RegisterBlock,
}
impl Deref for PTB {
    type Target = ptb::RegisterBlock;
    fn deref(&self) -> &ptb::RegisterBlock {
        &self.register_block
    }
}
#[doc = "General Purpose Input/Output"]
pub const PTC: Peripheral<PTC> = unsafe { Peripheral::new(1074786432) };
#[doc = "General Purpose Input/Output"]
pub mod ptc {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - Port Data Output Register"]
        pub pdor: PDOR,
        #[doc = "0x04 - Port Set Output Register"]
        pub psor: PSOR,
        #[doc = "0x08 - Port Clear Output Register"]
        pub pcor: PCOR,
        #[doc = "0x0c - Port Toggle Output Register"]
        pub ptor: PTOR,
        #[doc = "0x10 - Port Data Input Register"]
        pub pdir: PDIR,
        #[doc = "0x14 - Port Data Direction Register"]
        pub pddr: PDDR,
        #[doc = "0x18 - Port Input Disable Register"]
        pub pidr: PIDR,
    }
    #[doc = "Port Data Output Register"]
    pub struct PDOR {
        register: VolatileCell<u32>,
    }
    #[doc = "Port Data Output Register"]
    pub mod pdor {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PDOR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct PDOR {
            bits: u32,
        }
        impl PDOR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _PDOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PDOW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Port Data Output"]
            #[inline(always)]
            pub fn pdo(&self) -> PDOR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                PDOR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Port Data Output"]
            #[inline(always)]
            pub fn pdo(&mut self) -> _PDOW {
                _PDOW { w: self }
            }
        }
    }
    #[doc = "Port Set Output Register"]
    pub struct PSOR {
        register: VolatileCell<u32>,
    }
    #[doc = "Port Set Output Register"]
    pub mod psor {
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PSOR {
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
        }
        #[doc = r" Proxy"]
        pub struct _PTSOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PTSOW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Port Set Output"]
            #[inline(always)]
            pub fn ptso(&mut self) -> _PTSOW {
                _PTSOW { w: self }
            }
        }
    }
    #[doc = "Port Clear Output Register"]
    pub struct PCOR {
        register: VolatileCell<u32>,
    }
    #[doc = "Port Clear Output Register"]
    pub mod pcor {
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCOR {
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
        }
        #[doc = r" Proxy"]
        pub struct _PTCOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PTCOW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Port Clear Output"]
            #[inline(always)]
            pub fn ptco(&mut self) -> _PTCOW {
                _PTCOW { w: self }
            }
        }
    }
    #[doc = "Port Toggle Output Register"]
    pub struct PTOR {
        register: VolatileCell<u32>,
    }
    #[doc = "Port Toggle Output Register"]
    pub mod ptor {
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PTOR {
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
        }
        #[doc = r" Proxy"]
        pub struct _PTTOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PTTOW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Port Toggle Output"]
            #[inline(always)]
            pub fn ptto(&mut self) -> _PTTOW {
                _PTTOW { w: self }
            }
        }
    }
    #[doc = "Port Data Input Register"]
    pub struct PDIR {
        register: VolatileCell<u32>,
    }
    #[doc = "Port Data Input Register"]
    pub mod pdir {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::PDIR {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct PDIR {
            bits: u32,
        }
        impl PDIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Port Data Input"]
            #[inline(always)]
            pub fn pdi(&self) -> PDIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                PDIR { bits }
            }
        }
    }
    #[doc = "Port Data Direction Register"]
    pub struct PDDR {
        register: VolatileCell<u32>,
    }
    #[doc = "Port Data Direction Register"]
    pub mod pddr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PDDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct PDDR {
            bits: u32,
        }
        impl PDDR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _PDDW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PDDW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Port Data Direction"]
            #[inline(always)]
            pub fn pdd(&self) -> PDDR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                PDDR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Port Data Direction"]
            #[inline(always)]
            pub fn pdd(&mut self) -> _PDDW {
                _PDDW { w: self }
            }
        }
    }
    #[doc = "Port Input Disable Register"]
    pub struct PIDR {
        register: VolatileCell<u32>,
    }
    #[doc = "Port Input Disable Register"]
    pub mod pidr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PIDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct PIDR {
            bits: u32,
        }
        impl PIDR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _PIDW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PIDW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Port Input Disable"]
            #[inline(always)]
            pub fn pid(&self) -> PIDR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                PIDR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Port Input Disable"]
            #[inline(always)]
            pub fn pid(&mut self) -> _PIDW {
                _PIDW { w: self }
            }
        }
    }
}
#[doc = "General Purpose Input/Output"]
pub struct PTC {
    register_block: ptc::RegisterBlock,
}
impl Deref for PTC {
    type Target = ptc::RegisterBlock;
    fn deref(&self) -> &ptc::RegisterBlock {
        &self.register_block
    }
}
#[doc = "General Purpose Input/Output"]
pub const PTD: Peripheral<PTD> = unsafe { Peripheral::new(1074786496) };
#[doc = "General Purpose Input/Output"]
pub mod ptd {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - Port Data Output Register"]
        pub pdor: PDOR,
        #[doc = "0x04 - Port Set Output Register"]
        pub psor: PSOR,
        #[doc = "0x08 - Port Clear Output Register"]
        pub pcor: PCOR,
        #[doc = "0x0c - Port Toggle Output Register"]
        pub ptor: PTOR,
        #[doc = "0x10 - Port Data Input Register"]
        pub pdir: PDIR,
        #[doc = "0x14 - Port Data Direction Register"]
        pub pddr: PDDR,
        #[doc = "0x18 - Port Input Disable Register"]
        pub pidr: PIDR,
    }
    #[doc = "Port Data Output Register"]
    pub struct PDOR {
        register: VolatileCell<u32>,
    }
    #[doc = "Port Data Output Register"]
    pub mod pdor {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PDOR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct PDOR {
            bits: u32,
        }
        impl PDOR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _PDOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PDOW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Port Data Output"]
            #[inline(always)]
            pub fn pdo(&self) -> PDOR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                PDOR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Port Data Output"]
            #[inline(always)]
            pub fn pdo(&mut self) -> _PDOW {
                _PDOW { w: self }
            }
        }
    }
    #[doc = "Port Set Output Register"]
    pub struct PSOR {
        register: VolatileCell<u32>,
    }
    #[doc = "Port Set Output Register"]
    pub mod psor {
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PSOR {
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
        }
        #[doc = r" Proxy"]
        pub struct _PTSOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PTSOW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Port Set Output"]
            #[inline(always)]
            pub fn ptso(&mut self) -> _PTSOW {
                _PTSOW { w: self }
            }
        }
    }
    #[doc = "Port Clear Output Register"]
    pub struct PCOR {
        register: VolatileCell<u32>,
    }
    #[doc = "Port Clear Output Register"]
    pub mod pcor {
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCOR {
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
        }
        #[doc = r" Proxy"]
        pub struct _PTCOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PTCOW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Port Clear Output"]
            #[inline(always)]
            pub fn ptco(&mut self) -> _PTCOW {
                _PTCOW { w: self }
            }
        }
    }
    #[doc = "Port Toggle Output Register"]
    pub struct PTOR {
        register: VolatileCell<u32>,
    }
    #[doc = "Port Toggle Output Register"]
    pub mod ptor {
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PTOR {
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
        }
        #[doc = r" Proxy"]
        pub struct _PTTOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PTTOW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Port Toggle Output"]
            #[inline(always)]
            pub fn ptto(&mut self) -> _PTTOW {
                _PTTOW { w: self }
            }
        }
    }
    #[doc = "Port Data Input Register"]
    pub struct PDIR {
        register: VolatileCell<u32>,
    }
    #[doc = "Port Data Input Register"]
    pub mod pdir {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::PDIR {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct PDIR {
            bits: u32,
        }
        impl PDIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Port Data Input"]
            #[inline(always)]
            pub fn pdi(&self) -> PDIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                PDIR { bits }
            }
        }
    }
    #[doc = "Port Data Direction Register"]
    pub struct PDDR {
        register: VolatileCell<u32>,
    }
    #[doc = "Port Data Direction Register"]
    pub mod pddr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PDDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct PDDR {
            bits: u32,
        }
        impl PDDR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _PDDW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PDDW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Port Data Direction"]
            #[inline(always)]
            pub fn pdd(&self) -> PDDR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                PDDR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Port Data Direction"]
            #[inline(always)]
            pub fn pdd(&mut self) -> _PDDW {
                _PDDW { w: self }
            }
        }
    }
    #[doc = "Port Input Disable Register"]
    pub struct PIDR {
        register: VolatileCell<u32>,
    }
    #[doc = "Port Input Disable Register"]
    pub mod pidr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PIDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct PIDR {
            bits: u32,
        }
        impl PIDR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _PIDW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PIDW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Port Input Disable"]
            #[inline(always)]
            pub fn pid(&self) -> PIDR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                PIDR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Port Input Disable"]
            #[inline(always)]
            pub fn pid(&mut self) -> _PIDW {
                _PIDW { w: self }
            }
        }
    }
}
#[doc = "General Purpose Input/Output"]
pub struct PTD {
    register_block: ptd::RegisterBlock,
}
impl Deref for PTD {
    type Target = ptd::RegisterBlock;
    fn deref(&self) -> &ptd::RegisterBlock {
        &self.register_block
    }
}
#[doc = "General Purpose Input/Output"]
pub const PTE: Peripheral<PTE> = unsafe { Peripheral::new(1074786560) };
#[doc = "General Purpose Input/Output"]
pub mod pte {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - Port Data Output Register"]
        pub pdor: PDOR,
        #[doc = "0x04 - Port Set Output Register"]
        pub psor: PSOR,
        #[doc = "0x08 - Port Clear Output Register"]
        pub pcor: PCOR,
        #[doc = "0x0c - Port Toggle Output Register"]
        pub ptor: PTOR,
        #[doc = "0x10 - Port Data Input Register"]
        pub pdir: PDIR,
        #[doc = "0x14 - Port Data Direction Register"]
        pub pddr: PDDR,
        #[doc = "0x18 - Port Input Disable Register"]
        pub pidr: PIDR,
    }
    #[doc = "Port Data Output Register"]
    pub struct PDOR {
        register: VolatileCell<u32>,
    }
    #[doc = "Port Data Output Register"]
    pub mod pdor {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PDOR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct PDOR {
            bits: u32,
        }
        impl PDOR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _PDOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PDOW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Port Data Output"]
            #[inline(always)]
            pub fn pdo(&self) -> PDOR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                PDOR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Port Data Output"]
            #[inline(always)]
            pub fn pdo(&mut self) -> _PDOW {
                _PDOW { w: self }
            }
        }
    }
    #[doc = "Port Set Output Register"]
    pub struct PSOR {
        register: VolatileCell<u32>,
    }
    #[doc = "Port Set Output Register"]
    pub mod psor {
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PSOR {
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
        }
        #[doc = r" Proxy"]
        pub struct _PTSOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PTSOW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Port Set Output"]
            #[inline(always)]
            pub fn ptso(&mut self) -> _PTSOW {
                _PTSOW { w: self }
            }
        }
    }
    #[doc = "Port Clear Output Register"]
    pub struct PCOR {
        register: VolatileCell<u32>,
    }
    #[doc = "Port Clear Output Register"]
    pub mod pcor {
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCOR {
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
        }
        #[doc = r" Proxy"]
        pub struct _PTCOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PTCOW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Port Clear Output"]
            #[inline(always)]
            pub fn ptco(&mut self) -> _PTCOW {
                _PTCOW { w: self }
            }
        }
    }
    #[doc = "Port Toggle Output Register"]
    pub struct PTOR {
        register: VolatileCell<u32>,
    }
    #[doc = "Port Toggle Output Register"]
    pub mod ptor {
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PTOR {
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
        }
        #[doc = r" Proxy"]
        pub struct _PTTOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PTTOW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Port Toggle Output"]
            #[inline(always)]
            pub fn ptto(&mut self) -> _PTTOW {
                _PTTOW { w: self }
            }
        }
    }
    #[doc = "Port Data Input Register"]
    pub struct PDIR {
        register: VolatileCell<u32>,
    }
    #[doc = "Port Data Input Register"]
    pub mod pdir {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::PDIR {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct PDIR {
            bits: u32,
        }
        impl PDIR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Port Data Input"]
            #[inline(always)]
            pub fn pdi(&self) -> PDIR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                PDIR { bits }
            }
        }
    }
    #[doc = "Port Data Direction Register"]
    pub struct PDDR {
        register: VolatileCell<u32>,
    }
    #[doc = "Port Data Direction Register"]
    pub mod pddr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PDDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct PDDR {
            bits: u32,
        }
        impl PDDR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _PDDW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PDDW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Port Data Direction"]
            #[inline(always)]
            pub fn pdd(&self) -> PDDR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                PDDR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Port Data Direction"]
            #[inline(always)]
            pub fn pdd(&mut self) -> _PDDW {
                _PDDW { w: self }
            }
        }
    }
    #[doc = "Port Input Disable Register"]
    pub struct PIDR {
        register: VolatileCell<u32>,
    }
    #[doc = "Port Input Disable Register"]
    pub mod pidr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PIDR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct PIDR {
            bits: u32,
        }
        impl PIDR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _PIDW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PIDW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Port Input Disable"]
            #[inline(always)]
            pub fn pid(&self) -> PIDR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                PIDR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Port Input Disable"]
            #[inline(always)]
            pub fn pid(&mut self) -> _PIDW {
                _PIDW { w: self }
            }
        }
    }
}
#[doc = "General Purpose Input/Output"]
pub struct PTE {
    register_block: pte::RegisterBlock,
}
impl Deref for PTE {
    type Target = pte::RegisterBlock;
    fn deref(&self) -> &pte::RegisterBlock {
        &self.register_block
    }
}
#[doc = "Core Platform Miscellaneous Control Module"]
pub const MCM: Peripheral<MCM> = unsafe { Peripheral::new(3758620672) };
#[doc = "Core Platform Miscellaneous Control Module"]
pub mod mcm {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        _reserved0: [u8; 8usize],
        #[doc = "0x08 - Crossbar Switch (AXBS) Slave Configuration"]
        pub plasc: PLASC,
        #[doc = "0x0a - Crossbar Switch (AXBS) Master Configuration"]
        pub plamc: PLAMC,
        #[doc = "0x0c - Core Platform Control Register"]
        pub cpcr: CPCR,
        #[doc = "0x10 - Interrupt Status and Control Register"]
        pub iscr: ISCR,
        _reserved1: [u8; 28usize],
        #[doc = "0x30 - Process ID Register"]
        pub pid: PID,
        _reserved2: [u8; 12usize],
        #[doc = "0x40 - Compute Operation Control Register"]
        pub cpo: CPO,
        _reserved3: [u8; 956usize],
        #[doc = "0x400 - Local Memory Descriptor Register"]
        pub lmdr0: LMDR0,
        #[doc = "0x404 - Local Memory Descriptor Register"]
        pub lmdr1: LMDR1,
        #[doc = "0x408 - Local Memory Descriptor Register2"]
        pub lmdr2: LMDR2,
        _reserved4: [u8; 116usize],
        #[doc = "0x480 - LMEM Parity and ECC Control Register"]
        pub lmpecr: LMPECR,
        _reserved5: [u8; 4usize],
        #[doc = "0x488 - LMEM Parity and ECC Interrupt Register"]
        pub lmpeir: LMPEIR,
        _reserved6: [u8; 4usize],
        #[doc = "0x490 - LMEM Fault Address Register"]
        pub lmfar: LMFAR,
        #[doc = "0x494 - LMEM Fault Attribute Register"]
        pub lmfatr: LMFATR,
        _reserved7: [u8; 8usize],
        #[doc = "0x4a0 - LMEM Fault Data High Register"]
        pub lmfdhr: LMFDHR,
        #[doc = "0x4a4 - LMEM Fault Data Low Register"]
        pub lmfdlr: LMFDLR,
    }
    #[doc = "Crossbar Switch (AXBS) Slave Configuration"]
    pub struct PLASC {
        register: VolatileCell<u16>,
    }
    #[doc = "Crossbar Switch (AXBS) Slave Configuration"]
    pub mod plasc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        impl super::PLASC {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = "Possible values of the field `ASC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ASCR {
            #[doc = "A bus slave connection to AXBS input port n is absent"]
            _0,
            #[doc = "A bus slave connection to AXBS input port n is present"]
            _1,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl ASCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    ASCR::_0 => 0,
                    ASCR::_1 => 1,
                    ASCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> ASCR {
                match value {
                    0 => ASCR::_0,
                    1 => ASCR::_1,
                    i => ASCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ASCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ASCR::_1
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:7 - Each bit in the ASC field indicates whether there is a corresponding connection to the crossbar switch's slave input port."]
            #[inline(always)]
            pub fn asc(&self) -> ASCR {
                ASCR::_from({
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
        }
    }
    #[doc = "Crossbar Switch (AXBS) Master Configuration"]
    pub struct PLAMC {
        register: VolatileCell<u16>,
    }
    #[doc = "Crossbar Switch (AXBS) Master Configuration"]
    pub mod plamc {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u16,
        }
        impl super::PLAMC {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = "Possible values of the field `AMC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum AMCR {
            #[doc = "A bus master connection to AXBS input port n is absent"]
            _0,
            #[doc = "A bus master connection to AXBS input port n is present"]
            _1,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl AMCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    AMCR::_0 => 0,
                    AMCR::_1 => 1,
                    AMCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> AMCR {
                match value {
                    0 => AMCR::_0,
                    1 => AMCR::_1,
                    i => AMCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == AMCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == AMCR::_1
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
            #[doc = "Bits 0:7 - Each bit in the AMC field indicates whether there is a corresponding connection to the AXBS master input port."]
            #[inline(always)]
            pub fn amc(&self) -> AMCR {
                AMCR::_from({
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u16) as u8
                })
            }
        }
    }
    #[doc = "Core Platform Control Register"]
    pub struct CPCR {
        register: VolatileCell<u32>,
    }
    #[doc = "Core Platform Control Register"]
    pub mod cpcr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CPCR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `HLT_FSM_ST`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum HLT_FSM_STR {
            #[doc = "Waiting for request"]
            _00,
            #[doc = "Waiting for platform idle"]
            _01,
            #[doc = "Platform stalled"]
            _11,
            #[doc = "Unused state"]
            _10,
        }
        impl HLT_FSM_STR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    HLT_FSM_STR::_00 => 0,
                    HLT_FSM_STR::_01 => 1,
                    HLT_FSM_STR::_11 => 3,
                    HLT_FSM_STR::_10 => 2,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> HLT_FSM_STR {
                match value {
                    0 => HLT_FSM_STR::_00,
                    1 => HLT_FSM_STR::_01,
                    3 => HLT_FSM_STR::_11,
                    2 => HLT_FSM_STR::_10,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == HLT_FSM_STR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == HLT_FSM_STR::_01
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == HLT_FSM_STR::_11
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == HLT_FSM_STR::_10
            }
        }
        #[doc = "Possible values of the field `AXBS_HLT_REQ`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum AXBS_HLT_REQR {
            #[doc = "AXBS is not receiving halt request"]
            _0,
            #[doc = "AXBS is receiving halt request"]
            _1,
        }
        impl AXBS_HLT_REQR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    AXBS_HLT_REQR::_0 => false,
                    AXBS_HLT_REQR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> AXBS_HLT_REQR {
                match value {
                    false => AXBS_HLT_REQR::_0,
                    true => AXBS_HLT_REQR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == AXBS_HLT_REQR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == AXBS_HLT_REQR::_1
            }
        }
        #[doc = "Possible values of the field `AXBS_HLTD`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum AXBS_HLTDR {
            #[doc = "AXBS is not currently halted"]
            _0,
            #[doc = "AXBS is currently halted"]
            _1,
        }
        impl AXBS_HLTDR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    AXBS_HLTDR::_0 => false,
                    AXBS_HLTDR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> AXBS_HLTDR {
                match value {
                    false => AXBS_HLTDR::_0,
                    true => AXBS_HLTDR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == AXBS_HLTDR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == AXBS_HLTDR::_1
            }
        }
        #[doc = "Possible values of the field `FMC_PF_IDLE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FMC_PF_IDLER {
            #[doc = "FMC program flash is not idle"]
            _0,
            #[doc = "FMC program flash is currently idle"]
            _1,
        }
        impl FMC_PF_IDLER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FMC_PF_IDLER::_0 => false,
                    FMC_PF_IDLER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FMC_PF_IDLER {
                match value {
                    false => FMC_PF_IDLER::_0,
                    true => FMC_PF_IDLER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FMC_PF_IDLER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FMC_PF_IDLER::_1
            }
        }
        #[doc = "Possible values of the field `PBRIDGE_IDLE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PBRIDGE_IDLER {
            #[doc = "PBRIDGE is not idle"]
            _0,
            #[doc = "PBRIDGE is currently idle"]
            _1,
        }
        impl PBRIDGE_IDLER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PBRIDGE_IDLER::_0 => false,
                    PBRIDGE_IDLER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PBRIDGE_IDLER {
                match value {
                    false => PBRIDGE_IDLER::_0,
                    true => PBRIDGE_IDLER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PBRIDGE_IDLER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PBRIDGE_IDLER::_1
            }
        }
        #[doc = "Possible values of the field `CBRR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CBRRR {
            #[doc = "Fixed-priority arbitration"]
            _0,
            #[doc = "Round-robin arbitration"]
            _1,
        }
        impl CBRRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CBRRR::_0 => false,
                    CBRRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CBRRR {
                match value {
                    false => CBRRR::_0,
                    true => CBRRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CBRRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CBRRR::_1
            }
        }
        #[doc = "Possible values of the field `SRAMUAP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SRAMUAPR {
            #[doc = "Round robin"]
            _00,
            #[doc = "Special round robin (favors SRAM backdoor accesses over the processor)"]
            _01,
            #[doc = "Fixed priority. Processor has highest, backdoor has lowest"]
            _10,
            #[doc = "Fixed priority. Backdoor has highest, processor has lowest"]
            _11,
        }
        impl SRAMUAPR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SRAMUAPR::_00 => 0,
                    SRAMUAPR::_01 => 1,
                    SRAMUAPR::_10 => 2,
                    SRAMUAPR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SRAMUAPR {
                match value {
                    0 => SRAMUAPR::_00,
                    1 => SRAMUAPR::_01,
                    2 => SRAMUAPR::_10,
                    3 => SRAMUAPR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == SRAMUAPR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == SRAMUAPR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == SRAMUAPR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == SRAMUAPR::_11
            }
        }
        #[doc = r" Value of the field"]
        pub struct SRAMUWPR {
            bits: bool,
        }
        impl SRAMUWPR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `SRAMLAP`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum SRAMLAPR {
            #[doc = "Round robin"]
            _00,
            #[doc = "Special round robin (favors SRAM backdoor accesses over the processor)"]
            _01,
            #[doc = "Fixed priority. Processor has highest, backdoor has lowest"]
            _10,
            #[doc = "Fixed priority. Backdoor has highest, processor has lowest"]
            _11,
        }
        impl SRAMLAPR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    SRAMLAPR::_00 => 0,
                    SRAMLAPR::_01 => 1,
                    SRAMLAPR::_10 => 2,
                    SRAMLAPR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> SRAMLAPR {
                match value {
                    0 => SRAMLAPR::_00,
                    1 => SRAMLAPR::_01,
                    2 => SRAMLAPR::_10,
                    3 => SRAMLAPR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == SRAMLAPR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == SRAMLAPR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == SRAMLAPR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == SRAMLAPR::_11
            }
        }
        #[doc = r" Value of the field"]
        pub struct SRAMLWPR {
            bits: bool,
        }
        impl SRAMLWPR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Values that can be written to the field `CBRR`"]
        pub enum CBRRW {
            #[doc = "Fixed-priority arbitration"]
            _0,
            #[doc = "Round-robin arbitration"]
            _1,
        }
        impl CBRRW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CBRRW::_0 => false,
                    CBRRW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CBRRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CBRRW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CBRRW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Fixed-priority arbitration"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CBRRW::_0)
            }
            #[doc = "Round-robin arbitration"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CBRRW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 9;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SRAMUAP`"]
        pub enum SRAMUAPW {
            #[doc = "Round robin"]
            _00,
            #[doc = "Special round robin (favors SRAM backdoor accesses over the processor)"]
            _01,
            #[doc = "Fixed priority. Processor has highest, backdoor has lowest"]
            _10,
            #[doc = "Fixed priority. Backdoor has highest, processor has lowest"]
            _11,
        }
        impl SRAMUAPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SRAMUAPW::_00 => 0,
                    SRAMUAPW::_01 => 1,
                    SRAMUAPW::_10 => 2,
                    SRAMUAPW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SRAMUAPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SRAMUAPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SRAMUAPW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Round robin"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(SRAMUAPW::_00)
            }
            #[doc = "Special round robin (favors SRAM backdoor accesses over the processor)"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(SRAMUAPW::_01)
            }
            #[doc = "Fixed priority. Processor has highest, backdoor has lowest"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(SRAMUAPW::_10)
            }
            #[doc = "Fixed priority. Backdoor has highest, processor has lowest"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(SRAMUAPW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SRAMUWPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SRAMUWPW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 26;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `SRAMLAP`"]
        pub enum SRAMLAPW {
            #[doc = "Round robin"]
            _00,
            #[doc = "Special round robin (favors SRAM backdoor accesses over the processor)"]
            _01,
            #[doc = "Fixed priority. Processor has highest, backdoor has lowest"]
            _10,
            #[doc = "Fixed priority. Backdoor has highest, processor has lowest"]
            _11,
        }
        impl SRAMLAPW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    SRAMLAPW::_00 => 0,
                    SRAMLAPW::_01 => 1,
                    SRAMLAPW::_10 => 2,
                    SRAMLAPW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _SRAMLAPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SRAMLAPW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: SRAMLAPW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Round robin"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(SRAMLAPW::_00)
            }
            #[doc = "Special round robin (favors SRAM backdoor accesses over the processor)"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(SRAMLAPW::_01)
            }
            #[doc = "Fixed priority. Processor has highest, backdoor has lowest"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(SRAMLAPW::_10)
            }
            #[doc = "Fixed priority. Backdoor has highest, processor has lowest"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(SRAMLAPW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 28;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _SRAMLWPW<'a> {
            w: &'a mut W,
        }
        impl<'a> _SRAMLWPW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:1 - AXBS Halt State Machine Status"]
            #[inline(always)]
            pub fn hlt_fsm_st(&self) -> HLT_FSM_STR {
                HLT_FSM_STR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 2 - AXBS Halt Request"]
            #[inline(always)]
            pub fn axbs_hlt_req(&self) -> AXBS_HLT_REQR {
                AXBS_HLT_REQR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 3 - AXBS Halted"]
            #[inline(always)]
            pub fn axbs_hltd(&self) -> AXBS_HLTDR {
                AXBS_HLTDR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 4 - Flash Memory Controller Program Flash Idle"]
            #[inline(always)]
            pub fn fmc_pf_idle(&self) -> FMC_PF_IDLER {
                FMC_PF_IDLER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 6 - Peripheral Bridge Idle"]
            #[inline(always)]
            pub fn pbridge_idle(&self) -> PBRIDGE_IDLER {
                PBRIDGE_IDLER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - Crossbar Round-robin Arbitration Enable"]
            #[inline(always)]
            pub fn cbrr(&self) -> CBRRR {
                CBRRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 24:25 - SRAM_U Arbitration Priority"]
            #[inline(always)]
            pub fn sramuap(&self) -> SRAMUAPR {
                SRAMUAPR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 26 - SRAM_U Write Protect"]
            #[inline(always)]
            pub fn sramuwp(&self) -> SRAMUWPR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 26;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                SRAMUWPR { bits }
            }
            #[doc = "Bits 28:29 - SRAM_L Arbitration Priority"]
            #[inline(always)]
            pub fn sramlap(&self) -> SRAMLAPR {
                SRAMLAPR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 28;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 30 - SRAM_L Write Protect"]
            #[inline(always)]
            pub fn sramlwp(&self) -> SRAMLWPR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                SRAMLWPR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 9 - Crossbar Round-robin Arbitration Enable"]
            #[inline(always)]
            pub fn cbrr(&mut self) -> _CBRRW {
                _CBRRW { w: self }
            }
            #[doc = "Bits 24:25 - SRAM_U Arbitration Priority"]
            #[inline(always)]
            pub fn sramuap(&mut self) -> _SRAMUAPW {
                _SRAMUAPW { w: self }
            }
            #[doc = "Bit 26 - SRAM_U Write Protect"]
            #[inline(always)]
            pub fn sramuwp(&mut self) -> _SRAMUWPW {
                _SRAMUWPW { w: self }
            }
            #[doc = "Bits 28:29 - SRAM_L Arbitration Priority"]
            #[inline(always)]
            pub fn sramlap(&mut self) -> _SRAMLAPW {
                _SRAMLAPW { w: self }
            }
            #[doc = "Bit 30 - SRAM_L Write Protect"]
            #[inline(always)]
            pub fn sramlwp(&mut self) -> _SRAMLWPW {
                _SRAMLWPW { w: self }
            }
        }
    }
    #[doc = "Interrupt Status and Control Register"]
    pub struct ISCR {
        register: VolatileCell<u32>,
    }
    #[doc = "Interrupt Status and Control Register"]
    pub mod iscr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::ISCR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `FIOC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FIOCR {
            #[doc = "No interrupt"]
            _0,
            #[doc = "Interrupt occurred"]
            _1,
        }
        impl FIOCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FIOCR::_0 => false,
                    FIOCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FIOCR {
                match value {
                    false => FIOCR::_0,
                    true => FIOCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FIOCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FIOCR::_1
            }
        }
        #[doc = "Possible values of the field `FDZC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FDZCR {
            #[doc = "No interrupt"]
            _0,
            #[doc = "Interrupt occurred"]
            _1,
        }
        impl FDZCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FDZCR::_0 => false,
                    FDZCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FDZCR {
                match value {
                    false => FDZCR::_0,
                    true => FDZCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FDZCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FDZCR::_1
            }
        }
        #[doc = "Possible values of the field `FOFC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FOFCR {
            #[doc = "No interrupt"]
            _0,
            #[doc = "Interrupt occurred"]
            _1,
        }
        impl FOFCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FOFCR::_0 => false,
                    FOFCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FOFCR {
                match value {
                    false => FOFCR::_0,
                    true => FOFCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FOFCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FOFCR::_1
            }
        }
        #[doc = "Possible values of the field `FUFC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FUFCR {
            #[doc = "No interrupt"]
            _0,
            #[doc = "Interrupt occurred"]
            _1,
        }
        impl FUFCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FUFCR::_0 => false,
                    FUFCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FUFCR {
                match value {
                    false => FUFCR::_0,
                    true => FUFCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FUFCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FUFCR::_1
            }
        }
        #[doc = "Possible values of the field `FIXC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FIXCR {
            #[doc = "No interrupt"]
            _0,
            #[doc = "Interrupt occurred"]
            _1,
        }
        impl FIXCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FIXCR::_0 => false,
                    FIXCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FIXCR {
                match value {
                    false => FIXCR::_0,
                    true => FIXCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FIXCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FIXCR::_1
            }
        }
        #[doc = "Possible values of the field `FIDC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FIDCR {
            #[doc = "No interrupt"]
            _0,
            #[doc = "Interrupt occurred"]
            _1,
        }
        impl FIDCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FIDCR::_0 => false,
                    FIDCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FIDCR {
                match value {
                    false => FIDCR::_0,
                    true => FIDCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FIDCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FIDCR::_1
            }
        }
        #[doc = "Possible values of the field `FIOCE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FIOCER {
            #[doc = "Disable interrupt"]
            _0,
            #[doc = "Enable interrupt"]
            _1,
        }
        impl FIOCER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FIOCER::_0 => false,
                    FIOCER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FIOCER {
                match value {
                    false => FIOCER::_0,
                    true => FIOCER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FIOCER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FIOCER::_1
            }
        }
        #[doc = "Possible values of the field `FDZCE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FDZCER {
            #[doc = "Disable interrupt"]
            _0,
            #[doc = "Enable interrupt"]
            _1,
        }
        impl FDZCER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FDZCER::_0 => false,
                    FDZCER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FDZCER {
                match value {
                    false => FDZCER::_0,
                    true => FDZCER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FDZCER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FDZCER::_1
            }
        }
        #[doc = "Possible values of the field `FOFCE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FOFCER {
            #[doc = "Disable interrupt"]
            _0,
            #[doc = "Enable interrupt"]
            _1,
        }
        impl FOFCER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FOFCER::_0 => false,
                    FOFCER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FOFCER {
                match value {
                    false => FOFCER::_0,
                    true => FOFCER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FOFCER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FOFCER::_1
            }
        }
        #[doc = "Possible values of the field `FUFCE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FUFCER {
            #[doc = "Disable interrupt"]
            _0,
            #[doc = "Enable interrupt"]
            _1,
        }
        impl FUFCER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FUFCER::_0 => false,
                    FUFCER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FUFCER {
                match value {
                    false => FUFCER::_0,
                    true => FUFCER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FUFCER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FUFCER::_1
            }
        }
        #[doc = "Possible values of the field `FIXCE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FIXCER {
            #[doc = "Disable interrupt"]
            _0,
            #[doc = "Enable interrupt"]
            _1,
        }
        impl FIXCER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FIXCER::_0 => false,
                    FIXCER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FIXCER {
                match value {
                    false => FIXCER::_0,
                    true => FIXCER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FIXCER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FIXCER::_1
            }
        }
        #[doc = "Possible values of the field `FIDCE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum FIDCER {
            #[doc = "Disable interrupt"]
            _0,
            #[doc = "Enable interrupt"]
            _1,
        }
        impl FIDCER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    FIDCER::_0 => false,
                    FIDCER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> FIDCER {
                match value {
                    false => FIDCER::_0,
                    true => FIDCER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == FIDCER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == FIDCER::_1
            }
        }
        #[doc = "Values that can be written to the field `FIOCE`"]
        pub enum FIOCEW {
            #[doc = "Disable interrupt"]
            _0,
            #[doc = "Enable interrupt"]
            _1,
        }
        impl FIOCEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FIOCEW::_0 => false,
                    FIOCEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FIOCEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FIOCEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FIOCEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable interrupt"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FIOCEW::_0)
            }
            #[doc = "Enable interrupt"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FIOCEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FDZCE`"]
        pub enum FDZCEW {
            #[doc = "Disable interrupt"]
            _0,
            #[doc = "Enable interrupt"]
            _1,
        }
        impl FDZCEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FDZCEW::_0 => false,
                    FDZCEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FDZCEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FDZCEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FDZCEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable interrupt"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FDZCEW::_0)
            }
            #[doc = "Enable interrupt"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FDZCEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 25;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FOFCE`"]
        pub enum FOFCEW {
            #[doc = "Disable interrupt"]
            _0,
            #[doc = "Enable interrupt"]
            _1,
        }
        impl FOFCEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FOFCEW::_0 => false,
                    FOFCEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FOFCEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FOFCEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FOFCEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable interrupt"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FOFCEW::_0)
            }
            #[doc = "Enable interrupt"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FOFCEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 26;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FUFCE`"]
        pub enum FUFCEW {
            #[doc = "Disable interrupt"]
            _0,
            #[doc = "Enable interrupt"]
            _1,
        }
        impl FUFCEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FUFCEW::_0 => false,
                    FUFCEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FUFCEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FUFCEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FUFCEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable interrupt"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FUFCEW::_0)
            }
            #[doc = "Enable interrupt"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FUFCEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 27;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FIXCE`"]
        pub enum FIXCEW {
            #[doc = "Disable interrupt"]
            _0,
            #[doc = "Enable interrupt"]
            _1,
        }
        impl FIXCEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FIXCEW::_0 => false,
                    FIXCEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FIXCEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FIXCEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FIXCEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable interrupt"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FIXCEW::_0)
            }
            #[doc = "Enable interrupt"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FIXCEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 28;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `FIDCE`"]
        pub enum FIDCEW {
            #[doc = "Disable interrupt"]
            _0,
            #[doc = "Enable interrupt"]
            _1,
        }
        impl FIDCEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    FIDCEW::_0 => false,
                    FIDCEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _FIDCEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _FIDCEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: FIDCEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Disable interrupt"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(FIDCEW::_0)
            }
            #[doc = "Enable interrupt"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(FIDCEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 8 - FPU Invalid Operation Interrupt Status"]
            #[inline(always)]
            pub fn fioc(&self) -> FIOCR {
                FIOCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 9 - FPU Divide-by-Zero Interrupt Status"]
            #[inline(always)]
            pub fn fdzc(&self) -> FDZCR {
                FDZCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 9;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 10 - FPU Overflow Interrupt Status"]
            #[inline(always)]
            pub fn fofc(&self) -> FOFCR {
                FOFCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 11 - FPU Underflow Interrupt Status"]
            #[inline(always)]
            pub fn fufc(&self) -> FUFCR {
                FUFCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 11;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 12 - FPU Inexact Interrupt Status"]
            #[inline(always)]
            pub fn fixc(&self) -> FIXCR {
                FIXCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 15 - FPU Input Denormal Interrupt Status"]
            #[inline(always)]
            pub fn fidc(&self) -> FIDCR {
                FIDCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 15;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 24 - FPU Invalid Operation Interrupt Enable"]
            #[inline(always)]
            pub fn fioce(&self) -> FIOCER {
                FIOCER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 25 - FPU Divide-by-Zero Interrupt Enable"]
            #[inline(always)]
            pub fn fdzce(&self) -> FDZCER {
                FDZCER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 25;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 26 - FPU Overflow Interrupt Enable"]
            #[inline(always)]
            pub fn fofce(&self) -> FOFCER {
                FOFCER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 26;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 27 - FPU Underflow Interrupt Enable"]
            #[inline(always)]
            pub fn fufce(&self) -> FUFCER {
                FUFCER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 27;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 28 - FPU Inexact Interrupt Enable"]
            #[inline(always)]
            pub fn fixce(&self) -> FIXCER {
                FIXCER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 28;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - FPU Input Denormal Interrupt Enable"]
            #[inline(always)]
            pub fn fidce(&self) -> FIDCER {
                FIDCER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 131072 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 24 - FPU Invalid Operation Interrupt Enable"]
            #[inline(always)]
            pub fn fioce(&mut self) -> _FIOCEW {
                _FIOCEW { w: self }
            }
            #[doc = "Bit 25 - FPU Divide-by-Zero Interrupt Enable"]
            #[inline(always)]
            pub fn fdzce(&mut self) -> _FDZCEW {
                _FDZCEW { w: self }
            }
            #[doc = "Bit 26 - FPU Overflow Interrupt Enable"]
            #[inline(always)]
            pub fn fofce(&mut self) -> _FOFCEW {
                _FOFCEW { w: self }
            }
            #[doc = "Bit 27 - FPU Underflow Interrupt Enable"]
            #[inline(always)]
            pub fn fufce(&mut self) -> _FUFCEW {
                _FUFCEW { w: self }
            }
            #[doc = "Bit 28 - FPU Inexact Interrupt Enable"]
            #[inline(always)]
            pub fn fixce(&mut self) -> _FIXCEW {
                _FIXCEW { w: self }
            }
            #[doc = "Bit 31 - FPU Input Denormal Interrupt Enable"]
            #[inline(always)]
            pub fn fidce(&mut self) -> _FIDCEW {
                _FIDCEW { w: self }
            }
        }
    }
    #[doc = "Process ID Register"]
    pub struct PID {
        register: VolatileCell<u32>,
    }
    #[doc = "Process ID Register"]
    pub mod pid {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PID {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct PIDR {
            bits: u8,
        }
        impl PIDR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _PIDW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PIDW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - M0_PID and M1_PID for MPU"]
            #[inline(always)]
            pub fn pid(&self) -> PIDR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                PIDR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - M0_PID and M1_PID for MPU"]
            #[inline(always)]
            pub fn pid(&mut self) -> _PIDW {
                _PIDW { w: self }
            }
        }
    }
    #[doc = "Compute Operation Control Register"]
    pub struct CPO {
        register: VolatileCell<u32>,
    }
    #[doc = "Compute Operation Control Register"]
    pub mod cpo {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::CPO {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `CPOREQ`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CPOREQR {
            #[doc = "Request is cleared."]
            _0,
            #[doc = "Request Compute Operation."]
            _1,
        }
        impl CPOREQR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CPOREQR::_0 => false,
                    CPOREQR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CPOREQR {
                match value {
                    false => CPOREQR::_0,
                    true => CPOREQR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CPOREQR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CPOREQR::_1
            }
        }
        #[doc = "Possible values of the field `CPOACK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CPOACKR {
            #[doc = "Compute operation entry has not completed or compute operation exit has completed."]
            _0,
            #[doc = "Compute operation entry has completed or compute operation exit has not completed."]
            _1,
        }
        impl CPOACKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CPOACKR::_0 => false,
                    CPOACKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CPOACKR {
                match value {
                    false => CPOACKR::_0,
                    true => CPOACKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CPOACKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CPOACKR::_1
            }
        }
        #[doc = "Possible values of the field `CPOWOI`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum CPOWOIR {
            #[doc = "No effect."]
            _0,
            #[doc = "When set, the CPOREQ is cleared on any interrupt or exception vector fetch."]
            _1,
        }
        impl CPOWOIR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    CPOWOIR::_0 => false,
                    CPOWOIR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> CPOWOIR {
                match value {
                    false => CPOWOIR::_0,
                    true => CPOWOIR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == CPOWOIR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == CPOWOIR::_1
            }
        }
        #[doc = "Values that can be written to the field `CPOREQ`"]
        pub enum CPOREQW {
            #[doc = "Request is cleared."]
            _0,
            #[doc = "Request Compute Operation."]
            _1,
        }
        impl CPOREQW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CPOREQW::_0 => false,
                    CPOREQW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CPOREQW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CPOREQW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CPOREQW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Request is cleared."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CPOREQW::_0)
            }
            #[doc = "Request Compute Operation."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CPOREQW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `CPOWOI`"]
        pub enum CPOWOIW {
            #[doc = "No effect."]
            _0,
            #[doc = "When set, the CPOREQ is cleared on any interrupt or exception vector fetch."]
            _1,
        }
        impl CPOWOIW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    CPOWOIW::_0 => false,
                    CPOWOIW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _CPOWOIW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CPOWOIW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: CPOWOIW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No effect."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(CPOWOIW::_0)
            }
            #[doc = "When set, the CPOREQ is cleared on any interrupt or exception vector fetch."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(CPOWOIW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Compute Operation Request"]
            #[inline(always)]
            pub fn cporeq(&self) -> CPOREQR {
                CPOREQR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 1 - Compute Operation Acknowledge"]
            #[inline(always)]
            pub fn cpoack(&self) -> CPOACKR {
                CPOACKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 1;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Compute Operation Wakeup On Interrupt"]
            #[inline(always)]
            pub fn cpowoi(&self) -> CPOWOIR {
                CPOWOIR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Compute Operation Request"]
            #[inline(always)]
            pub fn cporeq(&mut self) -> _CPOREQW {
                _CPOREQW { w: self }
            }
            #[doc = "Bit 2 - Compute Operation Wakeup On Interrupt"]
            #[inline(always)]
            pub fn cpowoi(&mut self) -> _CPOWOIW {
                _CPOWOIW { w: self }
            }
        }
    }
    #[doc = "Local Memory Descriptor Register"]
    pub struct LMDR0 {
        register: VolatileCell<u32>,
    }
    #[doc = "Local Memory Descriptor Register"]
    pub mod lmdr0 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::LMDR0 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CF0R {
            bits: u8,
        }
        impl CF0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct CF1R {
            bits: u8,
        }
        impl CF1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `MT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MTR {
            #[doc = "SRAM_L"]
            _000,
            #[doc = "SRAM_U"]
            _001,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl MTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MTR::_000 => 0,
                    MTR::_001 => 1,
                    MTR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MTR {
                match value {
                    0 => MTR::_000,
                    1 => MTR::_001,
                    i => MTR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MTR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MTR::_001
            }
        }
        #[doc = "Possible values of the field `LOCK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LOCKR {
            #[doc = "Writes to the LMDRn[7:0] are allowed."]
            _0,
            #[doc = "Writes to the LMDRn[7:0] are ignored."]
            _1,
        }
        impl LOCKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LOCKR::_0 => false,
                    LOCKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LOCKR {
                match value {
                    false => LOCKR::_0,
                    true => LOCKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LOCKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LOCKR::_1
            }
        }
        #[doc = "Possible values of the field `DPW`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DPWR {
            #[doc = "LMEMn 32-bits wide"]
            _010,
            #[doc = "LMEMn 64-bits wide"]
            _011,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl DPWR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    DPWR::_010 => 2,
                    DPWR::_011 => 3,
                    DPWR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> DPWR {
                match value {
                    2 => DPWR::_010,
                    3 => DPWR::_011,
                    i => DPWR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == DPWR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == DPWR::_011
            }
        }
        #[doc = "Possible values of the field `WY`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WYR {
            #[doc = "No Cache"]
            _0000,
            #[doc = "2-Way Set Associative"]
            _0010,
            #[doc = "4-Way Set Associative"]
            _0100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl WYR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    WYR::_0000 => 0,
                    WYR::_0010 => 2,
                    WYR::_0100 => 4,
                    WYR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> WYR {
                match value {
                    0 => WYR::_0000,
                    2 => WYR::_0010,
                    4 => WYR::_0100,
                    i => WYR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == WYR::_0000
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == WYR::_0010
            }
            #[doc = "Checks if the value of the field is `_0100`"]
            #[inline(always)]
            pub fn is_0100(&self) -> bool {
                *self == WYR::_0100
            }
        }
        #[doc = "Possible values of the field `LMSZ`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LMSZR {
            #[doc = "no LMEMn (0 KB)"]
            _0000,
            #[doc = "1 KB LMEMn"]
            _0001,
            #[doc = "2 KB LMEMn"]
            _0010,
            #[doc = "4 KB LMEMn"]
            _0011,
            #[doc = "8 KB LMEMn"]
            _0100,
            #[doc = "16 KB LMEMn"]
            _0101,
            #[doc = "32 KB LMEMn"]
            _0110,
            #[doc = "64 KB LMEMn"]
            _0111,
            #[doc = "128 KB LMEMn"]
            _1000,
            #[doc = "256 KB LMEMn"]
            _1001,
            #[doc = "512 KB LMEMn"]
            _1010,
            #[doc = "1024 KB LMEMn"]
            _1011,
            #[doc = "2048 KB LMEMn"]
            _1100,
            #[doc = "4096 KB LMEMn"]
            _1101,
            #[doc = "8192 KB LMEMn"]
            _1110,
            #[doc = "16384 KB LMEMn"]
            _1111,
        }
        impl LMSZR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    LMSZR::_0000 => 0,
                    LMSZR::_0001 => 1,
                    LMSZR::_0010 => 2,
                    LMSZR::_0011 => 3,
                    LMSZR::_0100 => 4,
                    LMSZR::_0101 => 5,
                    LMSZR::_0110 => 6,
                    LMSZR::_0111 => 7,
                    LMSZR::_1000 => 8,
                    LMSZR::_1001 => 9,
                    LMSZR::_1010 => 10,
                    LMSZR::_1011 => 11,
                    LMSZR::_1100 => 12,
                    LMSZR::_1101 => 13,
                    LMSZR::_1110 => 14,
                    LMSZR::_1111 => 15,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> LMSZR {
                match value {
                    0 => LMSZR::_0000,
                    1 => LMSZR::_0001,
                    2 => LMSZR::_0010,
                    3 => LMSZR::_0011,
                    4 => LMSZR::_0100,
                    5 => LMSZR::_0101,
                    6 => LMSZR::_0110,
                    7 => LMSZR::_0111,
                    8 => LMSZR::_1000,
                    9 => LMSZR::_1001,
                    10 => LMSZR::_1010,
                    11 => LMSZR::_1011,
                    12 => LMSZR::_1100,
                    13 => LMSZR::_1101,
                    14 => LMSZR::_1110,
                    15 => LMSZR::_1111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == LMSZR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == LMSZR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == LMSZR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == LMSZR::_0011
            }
            #[doc = "Checks if the value of the field is `_0100`"]
            #[inline(always)]
            pub fn is_0100(&self) -> bool {
                *self == LMSZR::_0100
            }
            #[doc = "Checks if the value of the field is `_0101`"]
            #[inline(always)]
            pub fn is_0101(&self) -> bool {
                *self == LMSZR::_0101
            }
            #[doc = "Checks if the value of the field is `_0110`"]
            #[inline(always)]
            pub fn is_0110(&self) -> bool {
                *self == LMSZR::_0110
            }
            #[doc = "Checks if the value of the field is `_0111`"]
            #[inline(always)]
            pub fn is_0111(&self) -> bool {
                *self == LMSZR::_0111
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == LMSZR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == LMSZR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == LMSZR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == LMSZR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == LMSZR::_1100
            }
            #[doc = "Checks if the value of the field is `_1101`"]
            #[inline(always)]
            pub fn is_1101(&self) -> bool {
                *self == LMSZR::_1101
            }
            #[doc = "Checks if the value of the field is `_1110`"]
            #[inline(always)]
            pub fn is_1110(&self) -> bool {
                *self == LMSZR::_1110
            }
            #[doc = "Checks if the value of the field is `_1111`"]
            #[inline(always)]
            pub fn is_1111(&self) -> bool {
                *self == LMSZR::_1111
            }
        }
        #[doc = "Possible values of the field `LMSZH`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LMSZHR {
            #[doc = "LMEMn is a power-of-2 capacity."]
            _0,
            #[doc = "LMEMn is not a power-of-2, with a capacity is 0.75 * LMSZ."]
            _1,
        }
        impl LMSZHR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LMSZHR::_0 => false,
                    LMSZHR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LMSZHR {
                match value {
                    false => LMSZHR::_0,
                    true => LMSZHR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LMSZHR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LMSZHR::_1
            }
        }
        #[doc = "Possible values of the field `V`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum VR {
            #[doc = "LMEMn is not present."]
            _0,
            #[doc = "LMEMn is present."]
            _1,
        }
        impl VR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    VR::_0 => false,
                    VR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> VR {
                match value {
                    false => VR::_0,
                    true => VR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == VR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == VR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CF0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _CF0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CF1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _CF1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LOCK`"]
        pub enum LOCKW {
            #[doc = "Writes to the LMDRn[7:0] are allowed."]
            _0,
            #[doc = "Writes to the LMDRn[7:0] are ignored."]
            _1,
        }
        impl LOCKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LOCKW::_0 => false,
                    LOCKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LOCKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LOCKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LOCKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Writes to the LMDRn[7:0] are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LOCKW::_0)
            }
            #[doc = "Writes to the LMDRn[7:0] are ignored."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LOCKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:3 - Control Field 0"]
            #[inline(always)]
            pub fn cf0(&self) -> CF0R {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CF0R { bits }
            }
            #[doc = "Bits 4:7 - Control Field 1"]
            #[inline(always)]
            pub fn cf1(&self) -> CF1R {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CF1R { bits }
            }
            #[doc = "Bits 13:15 - Memory Type"]
            #[inline(always)]
            pub fn mt(&self) -> MTR {
                MTR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 16 - LOCK"]
            #[inline(always)]
            pub fn lock(&self) -> LOCKR {
                LOCKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 17:19 - LMEM Data Path Width. This field defines the width of the local memory."]
            #[inline(always)]
            pub fn dpw(&self) -> DPWR {
                DPWR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 20:23 - Level 1 Cache Ways"]
            #[inline(always)]
            pub fn wy(&self) -> WYR {
                WYR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 24:27 - LMEM Size"]
            #[inline(always)]
            pub fn lmsz(&self) -> LMSZR {
                LMSZR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 28 - LMEM Size Hole"]
            #[inline(always)]
            pub fn lmszh(&self) -> LMSZHR {
                LMSZHR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 28;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Local Memory Valid"]
            #[inline(always)]
            pub fn v(&self) -> VR {
                VR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Control Field 0"]
            #[inline(always)]
            pub fn cf0(&mut self) -> _CF0W {
                _CF0W { w: self }
            }
            #[doc = "Bits 4:7 - Control Field 1"]
            #[inline(always)]
            pub fn cf1(&mut self) -> _CF1W {
                _CF1W { w: self }
            }
            #[doc = "Bit 16 - LOCK"]
            #[inline(always)]
            pub fn lock(&mut self) -> _LOCKW {
                _LOCKW { w: self }
            }
        }
    }
    #[doc = "Local Memory Descriptor Register"]
    pub struct LMDR1 {
        register: VolatileCell<u32>,
    }
    #[doc = "Local Memory Descriptor Register"]
    pub mod lmdr1 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::LMDR1 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CF0R {
            bits: u8,
        }
        impl CF0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct CF1R {
            bits: u8,
        }
        impl CF1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `MT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MTR {
            #[doc = "SRAM_L"]
            _000,
            #[doc = "SRAM_U"]
            _001,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl MTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MTR::_000 => 0,
                    MTR::_001 => 1,
                    MTR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MTR {
                match value {
                    0 => MTR::_000,
                    1 => MTR::_001,
                    i => MTR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == MTR::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == MTR::_001
            }
        }
        #[doc = "Possible values of the field `LOCK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LOCKR {
            #[doc = "Writes to the LMDRn[7:0] are allowed."]
            _0,
            #[doc = "Writes to the LMDRn[7:0] are ignored."]
            _1,
        }
        impl LOCKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LOCKR::_0 => false,
                    LOCKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LOCKR {
                match value {
                    false => LOCKR::_0,
                    true => LOCKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LOCKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LOCKR::_1
            }
        }
        #[doc = "Possible values of the field `DPW`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DPWR {
            #[doc = "LMEMn 32-bits wide"]
            _010,
            #[doc = "LMEMn 64-bits wide"]
            _011,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl DPWR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    DPWR::_010 => 2,
                    DPWR::_011 => 3,
                    DPWR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> DPWR {
                match value {
                    2 => DPWR::_010,
                    3 => DPWR::_011,
                    i => DPWR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == DPWR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == DPWR::_011
            }
        }
        #[doc = "Possible values of the field `WY`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WYR {
            #[doc = "No Cache"]
            _0000,
            #[doc = "2-Way Set Associative"]
            _0010,
            #[doc = "4-Way Set Associative"]
            _0100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl WYR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    WYR::_0000 => 0,
                    WYR::_0010 => 2,
                    WYR::_0100 => 4,
                    WYR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> WYR {
                match value {
                    0 => WYR::_0000,
                    2 => WYR::_0010,
                    4 => WYR::_0100,
                    i => WYR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == WYR::_0000
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == WYR::_0010
            }
            #[doc = "Checks if the value of the field is `_0100`"]
            #[inline(always)]
            pub fn is_0100(&self) -> bool {
                *self == WYR::_0100
            }
        }
        #[doc = "Possible values of the field `LMSZ`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LMSZR {
            #[doc = "no LMEMn (0 KB)"]
            _0000,
            #[doc = "1 KB LMEMn"]
            _0001,
            #[doc = "2 KB LMEMn"]
            _0010,
            #[doc = "4 KB LMEMn"]
            _0011,
            #[doc = "8 KB LMEMn"]
            _0100,
            #[doc = "16 KB LMEMn"]
            _0101,
            #[doc = "32 KB LMEMn"]
            _0110,
            #[doc = "64 KB LMEMn"]
            _0111,
            #[doc = "128 KB LMEMn"]
            _1000,
            #[doc = "256 KB LMEMn"]
            _1001,
            #[doc = "512 KB LMEMn"]
            _1010,
            #[doc = "1024 KB LMEMn"]
            _1011,
            #[doc = "2048 KB LMEMn"]
            _1100,
            #[doc = "4096 KB LMEMn"]
            _1101,
            #[doc = "8192 KB LMEMn"]
            _1110,
            #[doc = "16384 KB LMEMn"]
            _1111,
        }
        impl LMSZR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    LMSZR::_0000 => 0,
                    LMSZR::_0001 => 1,
                    LMSZR::_0010 => 2,
                    LMSZR::_0011 => 3,
                    LMSZR::_0100 => 4,
                    LMSZR::_0101 => 5,
                    LMSZR::_0110 => 6,
                    LMSZR::_0111 => 7,
                    LMSZR::_1000 => 8,
                    LMSZR::_1001 => 9,
                    LMSZR::_1010 => 10,
                    LMSZR::_1011 => 11,
                    LMSZR::_1100 => 12,
                    LMSZR::_1101 => 13,
                    LMSZR::_1110 => 14,
                    LMSZR::_1111 => 15,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> LMSZR {
                match value {
                    0 => LMSZR::_0000,
                    1 => LMSZR::_0001,
                    2 => LMSZR::_0010,
                    3 => LMSZR::_0011,
                    4 => LMSZR::_0100,
                    5 => LMSZR::_0101,
                    6 => LMSZR::_0110,
                    7 => LMSZR::_0111,
                    8 => LMSZR::_1000,
                    9 => LMSZR::_1001,
                    10 => LMSZR::_1010,
                    11 => LMSZR::_1011,
                    12 => LMSZR::_1100,
                    13 => LMSZR::_1101,
                    14 => LMSZR::_1110,
                    15 => LMSZR::_1111,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == LMSZR::_0000
            }
            #[doc = "Checks if the value of the field is `_0001`"]
            #[inline(always)]
            pub fn is_0001(&self) -> bool {
                *self == LMSZR::_0001
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == LMSZR::_0010
            }
            #[doc = "Checks if the value of the field is `_0011`"]
            #[inline(always)]
            pub fn is_0011(&self) -> bool {
                *self == LMSZR::_0011
            }
            #[doc = "Checks if the value of the field is `_0100`"]
            #[inline(always)]
            pub fn is_0100(&self) -> bool {
                *self == LMSZR::_0100
            }
            #[doc = "Checks if the value of the field is `_0101`"]
            #[inline(always)]
            pub fn is_0101(&self) -> bool {
                *self == LMSZR::_0101
            }
            #[doc = "Checks if the value of the field is `_0110`"]
            #[inline(always)]
            pub fn is_0110(&self) -> bool {
                *self == LMSZR::_0110
            }
            #[doc = "Checks if the value of the field is `_0111`"]
            #[inline(always)]
            pub fn is_0111(&self) -> bool {
                *self == LMSZR::_0111
            }
            #[doc = "Checks if the value of the field is `_1000`"]
            #[inline(always)]
            pub fn is_1000(&self) -> bool {
                *self == LMSZR::_1000
            }
            #[doc = "Checks if the value of the field is `_1001`"]
            #[inline(always)]
            pub fn is_1001(&self) -> bool {
                *self == LMSZR::_1001
            }
            #[doc = "Checks if the value of the field is `_1010`"]
            #[inline(always)]
            pub fn is_1010(&self) -> bool {
                *self == LMSZR::_1010
            }
            #[doc = "Checks if the value of the field is `_1011`"]
            #[inline(always)]
            pub fn is_1011(&self) -> bool {
                *self == LMSZR::_1011
            }
            #[doc = "Checks if the value of the field is `_1100`"]
            #[inline(always)]
            pub fn is_1100(&self) -> bool {
                *self == LMSZR::_1100
            }
            #[doc = "Checks if the value of the field is `_1101`"]
            #[inline(always)]
            pub fn is_1101(&self) -> bool {
                *self == LMSZR::_1101
            }
            #[doc = "Checks if the value of the field is `_1110`"]
            #[inline(always)]
            pub fn is_1110(&self) -> bool {
                *self == LMSZR::_1110
            }
            #[doc = "Checks if the value of the field is `_1111`"]
            #[inline(always)]
            pub fn is_1111(&self) -> bool {
                *self == LMSZR::_1111
            }
        }
        #[doc = "Possible values of the field `LMSZH`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LMSZHR {
            #[doc = "LMEMn is a power-of-2 capacity."]
            _0,
            #[doc = "LMEMn is not a power-of-2, with a capacity is 0.75 * LMSZ."]
            _1,
        }
        impl LMSZHR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LMSZHR::_0 => false,
                    LMSZHR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LMSZHR {
                match value {
                    false => LMSZHR::_0,
                    true => LMSZHR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LMSZHR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LMSZHR::_1
            }
        }
        #[doc = "Possible values of the field `V`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum VR {
            #[doc = "LMEMn is not present."]
            _0,
            #[doc = "LMEMn is present."]
            _1,
        }
        impl VR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    VR::_0 => false,
                    VR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> VR {
                match value {
                    false => VR::_0,
                    true => VR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == VR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == VR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CF0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _CF0W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CF1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _CF1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LOCK`"]
        pub enum LOCKW {
            #[doc = "Writes to the LMDRn[7:0] are allowed."]
            _0,
            #[doc = "Writes to the LMDRn[7:0] are ignored."]
            _1,
        }
        impl LOCKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LOCKW::_0 => false,
                    LOCKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LOCKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LOCKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LOCKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Writes to the LMDRn[7:0] are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LOCKW::_0)
            }
            #[doc = "Writes to the LMDRn[7:0] are ignored."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LOCKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:3 - Control Field 0"]
            #[inline(always)]
            pub fn cf0(&self) -> CF0R {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CF0R { bits }
            }
            #[doc = "Bits 4:7 - Control Field 1"]
            #[inline(always)]
            pub fn cf1(&self) -> CF1R {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CF1R { bits }
            }
            #[doc = "Bits 13:15 - Memory Type"]
            #[inline(always)]
            pub fn mt(&self) -> MTR {
                MTR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 16 - LOCK"]
            #[inline(always)]
            pub fn lock(&self) -> LOCKR {
                LOCKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 17:19 - LMEM Data Path Width. This field defines the width of the local memory."]
            #[inline(always)]
            pub fn dpw(&self) -> DPWR {
                DPWR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 20:23 - Level 1 Cache Ways"]
            #[inline(always)]
            pub fn wy(&self) -> WYR {
                WYR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 24:27 - LMEM Size"]
            #[inline(always)]
            pub fn lmsz(&self) -> LMSZR {
                LMSZR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 28 - LMEM Size Hole"]
            #[inline(always)]
            pub fn lmszh(&self) -> LMSZHR {
                LMSZHR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 28;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Local Memory Valid"]
            #[inline(always)]
            pub fn v(&self) -> VR {
                VR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:3 - Control Field 0"]
            #[inline(always)]
            pub fn cf0(&mut self) -> _CF0W {
                _CF0W { w: self }
            }
            #[doc = "Bits 4:7 - Control Field 1"]
            #[inline(always)]
            pub fn cf1(&mut self) -> _CF1W {
                _CF1W { w: self }
            }
            #[doc = "Bit 16 - LOCK"]
            #[inline(always)]
            pub fn lock(&mut self) -> _LOCKW {
                _LOCKW { w: self }
            }
        }
    }
    #[doc = "Local Memory Descriptor Register2"]
    pub struct LMDR2 {
        register: VolatileCell<u32>,
    }
    #[doc = "Local Memory Descriptor Register2"]
    pub mod lmdr2 {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::LMDR2 {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct CF1R {
            bits: u8,
        }
        impl CF1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `MT`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum MTR {
            #[doc = "PC Cache"]
            _010,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl MTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    MTR::_010 => 2,
                    MTR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> MTR {
                match value {
                    2 => MTR::_010,
                    i => MTR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == MTR::_010
            }
        }
        #[doc = "Possible values of the field `LOCK`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LOCKR {
            #[doc = "Writes to the LMDRn[7:0] are allowed."]
            _0,
            #[doc = "Writes to the LMDRn[7:0] are ignored."]
            _1,
        }
        impl LOCKR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LOCKR::_0 => false,
                    LOCKR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LOCKR {
                match value {
                    false => LOCKR::_0,
                    true => LOCKR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LOCKR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LOCKR::_1
            }
        }
        #[doc = "Possible values of the field `DPW`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum DPWR {
            #[doc = "LMEMn 32-bits wide"]
            _010,
            #[doc = "LMEMn 64-bits wide"]
            _011,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl DPWR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    DPWR::_010 => 2,
                    DPWR::_011 => 3,
                    DPWR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> DPWR {
                match value {
                    2 => DPWR::_010,
                    3 => DPWR::_011,
                    i => DPWR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == DPWR::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == DPWR::_011
            }
        }
        #[doc = "Possible values of the field `WY`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WYR {
            #[doc = "No Cache"]
            _0000,
            #[doc = "2-Way Set Associative"]
            _0010,
            #[doc = "4-Way Set Associative"]
            _0100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl WYR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    WYR::_0000 => 0,
                    WYR::_0010 => 2,
                    WYR::_0100 => 4,
                    WYR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> WYR {
                match value {
                    0 => WYR::_0000,
                    2 => WYR::_0010,
                    4 => WYR::_0100,
                    i => WYR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0000`"]
            #[inline(always)]
            pub fn is_0000(&self) -> bool {
                *self == WYR::_0000
            }
            #[doc = "Checks if the value of the field is `_0010`"]
            #[inline(always)]
            pub fn is_0010(&self) -> bool {
                *self == WYR::_0010
            }
            #[doc = "Checks if the value of the field is `_0100`"]
            #[inline(always)]
            pub fn is_0100(&self) -> bool {
                *self == WYR::_0100
            }
        }
        #[doc = "Possible values of the field `LMSZ`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LMSZR {
            #[doc = "4 KB LMEMn"]
            _0100,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl LMSZR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    LMSZR::_0100 => 4,
                    LMSZR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> LMSZR {
                match value {
                    4 => LMSZR::_0100,
                    i => LMSZR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_0100`"]
            #[inline(always)]
            pub fn is_0100(&self) -> bool {
                *self == LMSZR::_0100
            }
        }
        #[doc = "Possible values of the field `LMSZH`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LMSZHR {
            #[doc = "LMEMn is a power-of-2 capacity."]
            _0,
            #[doc = "LMEMn is not a power-of-2, with a capacity is 0.75 * LMSZ."]
            _1,
        }
        impl LMSZHR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LMSZHR::_0 => false,
                    LMSZHR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LMSZHR {
                match value {
                    false => LMSZHR::_0,
                    true => LMSZHR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LMSZHR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LMSZHR::_1
            }
        }
        #[doc = "Possible values of the field `V`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum VR {
            #[doc = "LMEMn is not present."]
            _0,
            #[doc = "LMEMn is present."]
            _1,
        }
        impl VR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    VR::_0 => false,
                    VR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> VR {
                match value {
                    false => VR::_0,
                    true => VR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == VR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == VR::_1
            }
        }
        #[doc = r" Proxy"]
        pub struct _CF1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _CF1W<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 15;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LOCK`"]
        pub enum LOCKW {
            #[doc = "Writes to the LMDRn[7:0] are allowed."]
            _0,
            #[doc = "Writes to the LMDRn[7:0] are ignored."]
            _1,
        }
        impl LOCKW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LOCKW::_0 => false,
                    LOCKW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LOCKW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LOCKW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LOCKW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Writes to the LMDRn[7:0] are allowed."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LOCKW::_0)
            }
            #[doc = "Writes to the LMDRn[7:0] are ignored."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LOCKW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 4:7 - Control Field 1"]
            #[inline(always)]
            pub fn cf1(&self) -> CF1R {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                CF1R { bits }
            }
            #[doc = "Bits 13:15 - Memory Type"]
            #[inline(always)]
            pub fn mt(&self) -> MTR {
                MTR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 13;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 16 - LOCK"]
            #[inline(always)]
            pub fn lock(&self) -> LOCKR {
                LOCKR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 17:19 - LMEM Data Path Width. This field defines the width of the local memory."]
            #[inline(always)]
            pub fn dpw(&self) -> DPWR {
                DPWR::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 17;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 20:23 - Level 1 Cache Ways"]
            #[inline(always)]
            pub fn wy(&self) -> WYR {
                WYR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 24:27 - LMEM Size"]
            #[inline(always)]
            pub fn lmsz(&self) -> LMSZR {
                LMSZR::_from({
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 28 - LMEM Size Hole"]
            #[inline(always)]
            pub fn lmszh(&self) -> LMSZHR {
                LMSZHR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 28;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Local Memory Valid"]
            #[inline(always)]
            pub fn v(&self) -> VR {
                VR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 2216968352 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 4:7 - Control Field 1"]
            #[inline(always)]
            pub fn cf1(&mut self) -> _CF1W {
                _CF1W { w: self }
            }
            #[doc = "Bit 16 - LOCK"]
            #[inline(always)]
            pub fn lock(&mut self) -> _LOCKW {
                _LOCKW { w: self }
            }
        }
    }
    #[doc = "LMEM Parity and ECC Control Register"]
    pub struct LMPECR {
        register: VolatileCell<u32>,
    }
    #[doc = "LMEM Parity and ECC Control Register"]
    pub mod lmpecr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::LMPECR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `ERNCR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ERNCRR {
            #[doc = "Reporting disabled"]
            _0,
            #[doc = "Reporting enabled"]
            _1,
        }
        impl ERNCRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ERNCRR::_0 => false,
                    ERNCRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ERNCRR {
                match value {
                    false => ERNCRR::_0,
                    true => ERNCRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ERNCRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ERNCRR::_1
            }
        }
        #[doc = "Possible values of the field `ER1BR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ER1BRR {
            #[doc = "Reporting disabled"]
            _0,
            #[doc = "Reporting enabled"]
            _1,
        }
        impl ER1BRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ER1BRR::_0 => false,
                    ER1BRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ER1BRR {
                match value {
                    false => ER1BRR::_0,
                    true => ER1BRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ER1BRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ER1BRR::_1
            }
        }
        #[doc = "Possible values of the field `ECPR`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ECPRR {
            #[doc = "Reporting disabled"]
            _0,
            #[doc = "Reporting enabled"]
            _1,
        }
        impl ECPRR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ECPRR::_0 => false,
                    ECPRR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ECPRR {
                match value {
                    false => ECPRR::_0,
                    true => ECPRR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ECPRR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ECPRR::_1
            }
        }
        #[doc = "Values that can be written to the field `ERNCR`"]
        pub enum ERNCRW {
            #[doc = "Reporting disabled"]
            _0,
            #[doc = "Reporting enabled"]
            _1,
        }
        impl ERNCRW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ERNCRW::_0 => false,
                    ERNCRW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ERNCRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ERNCRW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ERNCRW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Reporting disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ERNCRW::_0)
            }
            #[doc = "Reporting enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ERNCRW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ER1BR`"]
        pub enum ER1BRW {
            #[doc = "Reporting disabled"]
            _0,
            #[doc = "Reporting enabled"]
            _1,
        }
        impl ER1BRW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ER1BRW::_0 => false,
                    ER1BRW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ER1BRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ER1BRW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ER1BRW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Reporting disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ER1BRW::_0)
            }
            #[doc = "Reporting enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ER1BRW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `ECPR`"]
        pub enum ECPRW {
            #[doc = "Reporting disabled"]
            _0,
            #[doc = "Reporting enabled"]
            _1,
        }
        impl ECPRW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ECPRW::_0 => false,
                    ECPRW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ECPRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ECPRW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ECPRW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Reporting disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ECPRW::_0)
            }
            #[doc = "Reporting enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ECPRW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Enable RAM ECC Noncorrectable Reporting"]
            #[inline(always)]
            pub fn erncr(&self) -> ERNCRR {
                ERNCRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 8 - Enable RAM ECC 1 Bit Reporting"]
            #[inline(always)]
            pub fn er1br(&self) -> ER1BRR {
                ER1BRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 20 - Enable Cache Parity Reporting"]
            #[inline(always)]
            pub fn ecpr(&self) -> ECPRR {
                ECPRR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Enable RAM ECC Noncorrectable Reporting"]
            #[inline(always)]
            pub fn erncr(&mut self) -> _ERNCRW {
                _ERNCRW { w: self }
            }
            #[doc = "Bit 8 - Enable RAM ECC 1 Bit Reporting"]
            #[inline(always)]
            pub fn er1br(&mut self) -> _ER1BRW {
                _ER1BRW { w: self }
            }
            #[doc = "Bit 20 - Enable Cache Parity Reporting"]
            #[inline(always)]
            pub fn ecpr(&mut self) -> _ECPRW {
                _ECPRW { w: self }
            }
        }
    }
    #[doc = "LMEM Parity and ECC Interrupt Register"]
    pub struct LMPEIR {
        register: VolatileCell<u32>,
    }
    #[doc = "LMEM Parity and ECC Interrupt Register"]
    pub mod lmpeir {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::LMPEIR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct ENCR {
            bits: u8,
        }
        impl ENCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct E1BR {
            bits: u8,
        }
        impl E1BR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct PER {
            bits: u8,
        }
        impl PER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `PEELOC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PEELOCR {
            #[doc = "Non-correctable ECC event from SRAM_L"]
            _00,
            #[doc = "Non-correctable ECC event from SRAM_U"]
            _01,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl PEELOCR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PEELOCR::_00 => 0,
                    PEELOCR::_01 => 1,
                    PEELOCR::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PEELOCR {
                match value {
                    0 => PEELOCR::_00,
                    1 => PEELOCR::_01,
                    i => PEELOCR::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == PEELOCR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == PEELOCR::_01
            }
        }
        #[doc = r" Value of the field"]
        pub struct VR {
            bits: bool,
        }
        impl VR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Proxy"]
        pub struct _ENCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ENCW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _E1BW<'a> {
            w: &'a mut W,
        }
        impl<'a> _E1BW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _PEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PEW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 255;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:7 - ENCn = ECC Noncorrectable Error n"]
            #[inline(always)]
            pub fn enc(&self) -> ENCR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                ENCR { bits }
            }
            #[doc = "Bits 8:15 - E1Bn = ECC 1-bit Error n"]
            #[inline(always)]
            pub fn e1b(&self) -> E1BR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                E1BR { bits }
            }
            #[doc = "Bits 16:23 - Cache Parity Error"]
            #[inline(always)]
            pub fn pe(&self) -> PER {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                PER { bits }
            }
            #[doc = "Bits 24:28 - Parity or ECC Error Location"]
            #[inline(always)]
            pub fn peeloc(&self) -> PEELOCR {
                PEELOCR::_from({
                    const MASK: u8 = 31;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 31 - Valid Bit"]
            #[inline(always)]
            pub fn v(&self) -> VR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                VR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:7 - ENCn = ECC Noncorrectable Error n"]
            #[inline(always)]
            pub fn enc(&mut self) -> _ENCW {
                _ENCW { w: self }
            }
            #[doc = "Bits 8:15 - E1Bn = ECC 1-bit Error n"]
            #[inline(always)]
            pub fn e1b(&mut self) -> _E1BW {
                _E1BW { w: self }
            }
            #[doc = "Bits 16:23 - Cache Parity Error"]
            #[inline(always)]
            pub fn pe(&mut self) -> _PEW {
                _PEW { w: self }
            }
        }
    }
    #[doc = "LMEM Fault Address Register"]
    pub struct LMFAR {
        register: VolatileCell<u32>,
    }
    #[doc = "LMEM Fault Address Register"]
    pub mod lmfar {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::LMFAR {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct EFADDR {
            bits: u32,
        }
        impl EFADDR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - ECC Fault Address"]
            #[inline(always)]
            pub fn efadd(&self) -> EFADDR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                EFADDR { bits }
            }
        }
    }
    #[doc = "LMEM Fault Attribute Register"]
    pub struct LMFATR {
        register: VolatileCell<u32>,
    }
    #[doc = "LMEM Fault Attribute Register"]
    pub mod lmfatr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::LMFATR {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct PEFPRTR {
            bits: u8,
        }
        impl PEFPRTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `PEFSIZE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PEFSIZER {
            #[doc = "8-bit access"]
            _000,
            #[doc = "16-bit access"]
            _001,
            #[doc = "32-bit access"]
            _010,
            #[doc = "64-bit access"]
            _011,
            #[doc = r" Reserved"]
            _Reserved(u8),
        }
        impl PEFSIZER {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    PEFSIZER::_000 => 0,
                    PEFSIZER::_001 => 1,
                    PEFSIZER::_010 => 2,
                    PEFSIZER::_011 => 3,
                    PEFSIZER::_Reserved(bits) => bits,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> PEFSIZER {
                match value {
                    0 => PEFSIZER::_000,
                    1 => PEFSIZER::_001,
                    2 => PEFSIZER::_010,
                    3 => PEFSIZER::_011,
                    i => PEFSIZER::_Reserved(i),
                }
            }
            #[doc = "Checks if the value of the field is `_000`"]
            #[inline(always)]
            pub fn is_000(&self) -> bool {
                *self == PEFSIZER::_000
            }
            #[doc = "Checks if the value of the field is `_001`"]
            #[inline(always)]
            pub fn is_001(&self) -> bool {
                *self == PEFSIZER::_001
            }
            #[doc = "Checks if the value of the field is `_010`"]
            #[inline(always)]
            pub fn is_010(&self) -> bool {
                *self == PEFSIZER::_010
            }
            #[doc = "Checks if the value of the field is `_011`"]
            #[inline(always)]
            pub fn is_011(&self) -> bool {
                *self == PEFSIZER::_011
            }
        }
        #[doc = r" Value of the field"]
        pub struct PEFWR {
            bits: bool,
        }
        impl PEFWR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct PEFMSTR {
            bits: u8,
        }
        impl PEFMSTR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                self.bits
            }
        }
        #[doc = r" Value of the field"]
        pub struct OVRR {
            bits: bool,
        }
        impl OVRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:3 - Parity/ECC Fault Protection"]
            #[inline(always)]
            pub fn pefprt(&self) -> PEFPRTR {
                let bits = {
                    const MASK: u8 = 15;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                PEFPRTR { bits }
            }
            #[doc = "Bits 4:6 - Parity/ECC Fault Master Size"]
            #[inline(always)]
            pub fn pefsize(&self) -> PEFSIZER {
                PEFSIZER::_from({
                    const MASK: u8 = 7;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 7 - Parity/ECC Fault Write"]
            #[inline(always)]
            pub fn pefw(&self) -> PEFWR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 7;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                PEFWR { bits }
            }
            #[doc = "Bits 8:15 - Parity/ECC Fault Master Number"]
            #[inline(always)]
            pub fn pefmst(&self) -> PEFMSTR {
                let bits = {
                    const MASK: u8 = 255;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                };
                PEFMSTR { bits }
            }
            #[doc = "Bit 31 - Overrun"]
            #[inline(always)]
            pub fn ovr(&self) -> OVRR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                OVRR { bits }
            }
        }
    }
    #[doc = "LMEM Fault Data High Register"]
    pub struct LMFDHR {
        register: VolatileCell<u32>,
    }
    #[doc = "LMEM Fault Data High Register"]
    pub mod lmfdhr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::LMFDHR {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct PEFDHR {
            bits: u32,
        }
        impl PEFDHR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Parity or ECC Fault Data High"]
            #[inline(always)]
            pub fn pefdh(&self) -> PEFDHR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                PEFDHR { bits }
            }
        }
    }
    #[doc = "LMEM Fault Data Low Register"]
    pub struct LMFDLR {
        register: VolatileCell<u32>,
    }
    #[doc = "LMEM Fault Data Low Register"]
    pub mod lmfdlr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        impl super::LMFDLR {
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
        }
        #[doc = r" Value of the field"]
        pub struct PEFDLR {
            bits: u32,
        }
        impl PEFDLR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Parity or ECC Fault Data Low"]
            #[inline(always)]
            pub fn pefdl(&self) -> PEFDLR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                PEFDLR { bits }
            }
        }
    }
}
#[doc = "Core Platform Miscellaneous Control Module"]
pub struct MCM {
    register_block: mcm::RegisterBlock,
}
impl Deref for MCM {
    type Target = mcm::RegisterBlock;
    fn deref(&self) -> &mcm::RegisterBlock {
        &self.register_block
    }
}
#[doc = "Local Memory Controller"]
pub const LMEM: Peripheral<LMEM> = unsafe { Peripheral::new(3758628864) };
#[doc = "Local Memory Controller"]
pub mod lmem {
    use vcell::VolatileCell;
    #[doc = r" Register block"]
    #[repr(C)]
    pub struct RegisterBlock {
        #[doc = "0x00 - Cache control register"]
        pub lmem_pcccr: LMEM_PCCCR,
        #[doc = "0x04 - Cache line control register"]
        pub lmem_pcclcr: LMEM_PCCLCR,
        #[doc = "0x08 - Cache search address register"]
        pub lmem_pccsar: LMEM_PCCSAR,
        #[doc = "0x0c - Cache read/write value register"]
        pub lmem_pcccvr: LMEM_PCCCVR,
        _reserved0: [u8; 16usize],
        #[doc = "0x20 - Cache regions mode register"]
        pub pccrmr: PCCRMR,
    }
    #[doc = "Cache control register"]
    pub struct LMEM_PCCCR {
        register: VolatileCell<u32>,
    }
    #[doc = "Cache control register"]
    pub mod lmem_pcccr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::LMEM_PCCCR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `ENCACHE`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum ENCACHER {
            #[doc = "Cache disabled"]
            _0,
            #[doc = "Cache enabled"]
            _1,
        }
        impl ENCACHER {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    ENCACHER::_0 => false,
                    ENCACHER::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> ENCACHER {
                match value {
                    false => ENCACHER::_0,
                    true => ENCACHER::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == ENCACHER::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == ENCACHER::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct PCCR2R {
            bits: bool,
        }
        impl PCCR2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct PCCR3R {
            bits: bool,
        }
        impl PCCR3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `INVW0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INVW0R {
            #[doc = "No operation"]
            _0,
            #[doc = "When setting the GO bit, invalidate all lines in way 0."]
            _1,
        }
        impl INVW0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INVW0R::_0 => false,
                    INVW0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INVW0R {
                match value {
                    false => INVW0R::_0,
                    true => INVW0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INVW0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INVW0R::_1
            }
        }
        #[doc = "Possible values of the field `PUSHW0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PUSHW0R {
            #[doc = "No operation"]
            _0,
            #[doc = "When setting the GO bit, push all modified lines in way 0"]
            _1,
        }
        impl PUSHW0R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PUSHW0R::_0 => false,
                    PUSHW0R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PUSHW0R {
                match value {
                    false => PUSHW0R::_0,
                    true => PUSHW0R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PUSHW0R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PUSHW0R::_1
            }
        }
        #[doc = "Possible values of the field `INVW1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum INVW1R {
            #[doc = "No operation"]
            _0,
            #[doc = "When setting the GO bit, invalidate all lines in way 1"]
            _1,
        }
        impl INVW1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    INVW1R::_0 => false,
                    INVW1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> INVW1R {
                match value {
                    false => INVW1R::_0,
                    true => INVW1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == INVW1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == INVW1R::_1
            }
        }
        #[doc = "Possible values of the field `PUSHW1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum PUSHW1R {
            #[doc = "No operation"]
            _0,
            #[doc = "When setting the GO bit, push all modified lines in way 1"]
            _1,
        }
        impl PUSHW1R {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    PUSHW1R::_0 => false,
                    PUSHW1R::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> PUSHW1R {
                match value {
                    false => PUSHW1R::_0,
                    true => PUSHW1R::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == PUSHW1R::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == PUSHW1R::_1
            }
        }
        #[doc = "Possible values of the field `GO`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum GOR {
            #[doc = "Write: no effect. Read: no cache command active."]
            _0,
            #[doc = "Write: initiate command indicated by bits 27-24. Read: cache command active."]
            _1,
        }
        impl GOR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    GOR::_0 => false,
                    GOR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> GOR {
                match value {
                    false => GOR::_0,
                    true => GOR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == GOR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == GOR::_1
            }
        }
        #[doc = "Values that can be written to the field `ENCACHE`"]
        pub enum ENCACHEW {
            #[doc = "Cache disabled"]
            _0,
            #[doc = "Cache enabled"]
            _1,
        }
        impl ENCACHEW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    ENCACHEW::_0 => false,
                    ENCACHEW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _ENCACHEW<'a> {
            w: &'a mut W,
        }
        impl<'a> _ENCACHEW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: ENCACHEW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Cache disabled"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(ENCACHEW::_0)
            }
            #[doc = "Cache enabled"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(ENCACHEW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _PCCR2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _PCCR2W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _PCCR3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _PCCR3W<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 3;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INVW0`"]
        pub enum INVW0W {
            #[doc = "No operation"]
            _0,
            #[doc = "When setting the GO bit, invalidate all lines in way 0."]
            _1,
        }
        impl INVW0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INVW0W::_0 => false,
                    INVW0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INVW0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _INVW0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INVW0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No operation"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INVW0W::_0)
            }
            #[doc = "When setting the GO bit, invalidate all lines in way 0."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INVW0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PUSHW0`"]
        pub enum PUSHW0W {
            #[doc = "No operation"]
            _0,
            #[doc = "When setting the GO bit, push all modified lines in way 0"]
            _1,
        }
        impl PUSHW0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PUSHW0W::_0 => false,
                    PUSHW0W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PUSHW0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _PUSHW0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PUSHW0W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No operation"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PUSHW0W::_0)
            }
            #[doc = "When setting the GO bit, push all modified lines in way 0"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PUSHW0W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 25;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `INVW1`"]
        pub enum INVW1W {
            #[doc = "No operation"]
            _0,
            #[doc = "When setting the GO bit, invalidate all lines in way 1"]
            _1,
        }
        impl INVW1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    INVW1W::_0 => false,
                    INVW1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _INVW1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _INVW1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: INVW1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No operation"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(INVW1W::_0)
            }
            #[doc = "When setting the GO bit, invalidate all lines in way 1"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(INVW1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 26;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `PUSHW1`"]
        pub enum PUSHW1W {
            #[doc = "No operation"]
            _0,
            #[doc = "When setting the GO bit, push all modified lines in way 1"]
            _1,
        }
        impl PUSHW1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    PUSHW1W::_0 => false,
                    PUSHW1W::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _PUSHW1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _PUSHW1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: PUSHW1W) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "No operation"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(PUSHW1W::_0)
            }
            #[doc = "When setting the GO bit, push all modified lines in way 1"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(PUSHW1W::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 27;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `GO`"]
        pub enum GOW {
            #[doc = "Write: no effect. Read: no cache command active."]
            _0,
            #[doc = "Write: initiate command indicated by bits 27-24. Read: cache command active."]
            _1,
        }
        impl GOW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    GOW::_0 => false,
                    GOW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _GOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _GOW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: GOW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Write: no effect. Read: no cache command active."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(GOW::_0)
            }
            #[doc = "Write: initiate command indicated by bits 27-24. Read: cache command active."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(GOW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 31;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Cache enable"]
            #[inline(always)]
            pub fn encache(&self) -> ENCACHER {
                ENCACHER::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 2 - Forces all cacheable spaces to write through"]
            #[inline(always)]
            pub fn pccr2(&self) -> PCCR2R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                PCCR2R { bits }
            }
            #[doc = "Bit 3 - Forces no allocation on cache misses (must also have PCCR2 asserted)"]
            #[inline(always)]
            pub fn pccr3(&self) -> PCCR3R {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 3;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                PCCR3R { bits }
            }
            #[doc = "Bit 24 - Invalidate Way 0"]
            #[inline(always)]
            pub fn invw0(&self) -> INVW0R {
                INVW0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 25 - Push Way 0"]
            #[inline(always)]
            pub fn pushw0(&self) -> PUSHW0R {
                PUSHW0R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 25;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 26 - Invalidate Way 1"]
            #[inline(always)]
            pub fn invw1(&self) -> INVW1R {
                INVW1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 26;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 27 - Push Way 1"]
            #[inline(always)]
            pub fn pushw1(&self) -> PUSHW1R {
                PUSHW1R::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 27;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 31 - Initiate Cache Command"]
            #[inline(always)]
            pub fn go(&self) -> GOR {
                GOR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 31;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Cache enable"]
            #[inline(always)]
            pub fn encache(&mut self) -> _ENCACHEW {
                _ENCACHEW { w: self }
            }
            #[doc = "Bit 2 - Forces all cacheable spaces to write through"]
            #[inline(always)]
            pub fn pccr2(&mut self) -> _PCCR2W {
                _PCCR2W { w: self }
            }
            #[doc = "Bit 3 - Forces no allocation on cache misses (must also have PCCR2 asserted)"]
            #[inline(always)]
            pub fn pccr3(&mut self) -> _PCCR3W {
                _PCCR3W { w: self }
            }
            #[doc = "Bit 24 - Invalidate Way 0"]
            #[inline(always)]
            pub fn invw0(&mut self) -> _INVW0W {
                _INVW0W { w: self }
            }
            #[doc = "Bit 25 - Push Way 0"]
            #[inline(always)]
            pub fn pushw0(&mut self) -> _PUSHW0W {
                _PUSHW0W { w: self }
            }
            #[doc = "Bit 26 - Invalidate Way 1"]
            #[inline(always)]
            pub fn invw1(&mut self) -> _INVW1W {
                _INVW1W { w: self }
            }
            #[doc = "Bit 27 - Push Way 1"]
            #[inline(always)]
            pub fn pushw1(&mut self) -> _PUSHW1W {
                _PUSHW1W { w: self }
            }
            #[doc = "Bit 31 - Initiate Cache Command"]
            #[inline(always)]
            pub fn go(&mut self) -> _GOW {
                _GOW { w: self }
            }
        }
    }
    #[doc = "Cache line control register"]
    pub struct LMEM_PCCLCR {
        register: VolatileCell<u32>,
    }
    #[doc = "Cache line control register"]
    pub mod lmem_pcclcr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::LMEM_PCCLCR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `LGO`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LGOR {
            #[doc = "Write: no effect. Read: no line command active."]
            _0,
            #[doc = "Write: initiate line command indicated by bits 27-24. Read: line command active."]
            _1,
        }
        impl LGOR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LGOR::_0 => false,
                    LGOR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LGOR {
                match value {
                    false => LGOR::_0,
                    true => LGOR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LGOR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LGOR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct CACHEADDRR {
            bits: u16,
        }
        impl CACHEADDRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u16 {
                self.bits
            }
        }
        #[doc = "Possible values of the field `WSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum WSELR {
            #[doc = "Way 0"]
            _0,
            #[doc = "Way 1"]
            _1,
        }
        impl WSELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    WSELR::_0 => false,
                    WSELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> WSELR {
                match value {
                    false => WSELR::_0,
                    true => WSELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == WSELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == WSELR::_1
            }
        }
        #[doc = "Possible values of the field `TDSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum TDSELR {
            #[doc = "Data"]
            _0,
            #[doc = "Tag"]
            _1,
        }
        impl TDSELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    TDSELR::_0 => false,
                    TDSELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> TDSELR {
                match value {
                    false => TDSELR::_0,
                    true => TDSELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == TDSELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == TDSELR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct LCIVBR {
            bits: bool,
        }
        impl LCIVBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct LCIMBR {
            bits: bool,
        }
        impl LCIMBR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = r" Value of the field"]
        pub struct LCWAYR {
            bits: bool,
        }
        impl LCWAYR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                self.bits
            }
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
        }
        #[doc = "Possible values of the field `LCMD`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LCMDR {
            #[doc = "Search and read or write"]
            _00,
            #[doc = "Invalidate"]
            _01,
            #[doc = "Push"]
            _10,
            #[doc = "Clear"]
            _11,
        }
        impl LCMDR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    LCMDR::_00 => 0,
                    LCMDR::_01 => 1,
                    LCMDR::_10 => 2,
                    LCMDR::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> LCMDR {
                match value {
                    0 => LCMDR::_00,
                    1 => LCMDR::_01,
                    2 => LCMDR::_10,
                    3 => LCMDR::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == LCMDR::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == LCMDR::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == LCMDR::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == LCMDR::_11
            }
        }
        #[doc = "Possible values of the field `LADSEL`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LADSELR {
            #[doc = "Cache address"]
            _0,
            #[doc = "Physical address"]
            _1,
        }
        impl LADSELR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LADSELR::_0 => false,
                    LADSELR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LADSELR {
                match value {
                    false => LADSELR::_0,
                    true => LADSELR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LADSELR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LADSELR::_1
            }
        }
        #[doc = "Possible values of the field `LACC`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LACCR {
            #[doc = "Read"]
            _0,
            #[doc = "Write"]
            _1,
        }
        impl LACCR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LACCR::_0 => false,
                    LACCR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LACCR {
                match value {
                    false => LACCR::_0,
                    true => LACCR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LACCR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LACCR::_1
            }
        }
        #[doc = "Values that can be written to the field `LGO`"]
        pub enum LGOW {
            #[doc = "Write: no effect. Read: no line command active."]
            _0,
            #[doc = "Write: initiate line command indicated by bits 27-24. Read: line command active."]
            _1,
        }
        impl LGOW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LGOW::_0 => false,
                    LGOW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LGOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LGOW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LGOW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Write: no effect. Read: no line command active."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LGOW::_0)
            }
            #[doc = "Write: initiate line command indicated by bits 27-24. Read: line command active."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LGOW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _CACHEADDRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _CACHEADDRW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u16) -> &'a mut W {
                const MASK: u16 = 4095;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `WSEL`"]
        pub enum WSELW {
            #[doc = "Way 0"]
            _0,
            #[doc = "Way 1"]
            _1,
        }
        impl WSELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    WSELW::_0 => false,
                    WSELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _WSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _WSELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: WSELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Way 0"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(WSELW::_0)
            }
            #[doc = "Way 1"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(WSELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `TDSEL`"]
        pub enum TDSELW {
            #[doc = "Data"]
            _0,
            #[doc = "Tag"]
            _1,
        }
        impl TDSELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    TDSELW::_0 => false,
                    TDSELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _TDSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _TDSELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: TDSELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Data"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(TDSELW::_0)
            }
            #[doc = "Tag"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(TDSELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _LCIVBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LCIVBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _LCIMBW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LCIMBW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 21;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _LCWAYW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LCWAYW<'a> {
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 22;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LCMD`"]
        pub enum LCMDW {
            #[doc = "Search and read or write"]
            _00,
            #[doc = "Invalidate"]
            _01,
            #[doc = "Push"]
            _10,
            #[doc = "Clear"]
            _11,
        }
        impl LCMDW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    LCMDW::_00 => 0,
                    LCMDW::_01 => 1,
                    LCMDW::_10 => 2,
                    LCMDW::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LCMDW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LCMDW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LCMDW) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Search and read or write"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(LCMDW::_00)
            }
            #[doc = "Invalidate"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(LCMDW::_01)
            }
            #[doc = "Push"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(LCMDW::_10)
            }
            #[doc = "Clear"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(LCMDW::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LADSEL`"]
        pub enum LADSELW {
            #[doc = "Cache address"]
            _0,
            #[doc = "Physical address"]
            _1,
        }
        impl LADSELW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LADSELW::_0 => false,
                    LADSELW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LADSELW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LADSELW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LADSELW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Cache address"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LADSELW::_0)
            }
            #[doc = "Physical address"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LADSELW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 26;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `LACC`"]
        pub enum LACCW {
            #[doc = "Read"]
            _0,
            #[doc = "Write"]
            _1,
        }
        impl LACCW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LACCW::_0 => false,
                    LACCW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LACCW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LACCW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LACCW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Read"]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LACCW::_0)
            }
            #[doc = "Write"]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LACCW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 27;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Initiate Cache Line Command"]
            #[inline(always)]
            pub fn lgo(&self) -> LGOR {
                LGOR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 2:13 - Cache address"]
            #[inline(always)]
            pub fn cacheaddr(&self) -> CACHEADDRR {
                let bits = {
                    const MASK: u16 = 4095;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) as u16
                };
                CACHEADDRR { bits }
            }
            #[doc = "Bit 14 - Way select"]
            #[inline(always)]
            pub fn wsel(&self) -> WSELR {
                WSELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 16 - Tag/Data Select"]
            #[inline(always)]
            pub fn tdsel(&self) -> TDSELR {
                TDSELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 20 - Line Command Initial Valid Bit"]
            #[inline(always)]
            pub fn lcivb(&self) -> LCIVBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                LCIVBR { bits }
            }
            #[doc = "Bit 21 - Line Command Initial Modified Bit"]
            #[inline(always)]
            pub fn lcimb(&self) -> LCIMBR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 21;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                LCIMBR { bits }
            }
            #[doc = "Bit 22 - Line Command Way"]
            #[inline(always)]
            pub fn lcway(&self) -> LCWAYR {
                let bits = {
                    const MASK: bool = true;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                };
                LCWAYR { bits }
            }
            #[doc = "Bits 24:25 - Line Command"]
            #[inline(always)]
            pub fn lcmd(&self) -> LCMDR {
                LCMDR::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bit 26 - Line Address Select"]
            #[inline(always)]
            pub fn ladsel(&self) -> LADSELR {
                LADSELR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 26;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bit 27 - Line access type"]
            #[inline(always)]
            pub fn lacc(&self) -> LACCR {
                LACCR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 27;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Initiate Cache Line Command"]
            #[inline(always)]
            pub fn lgo(&mut self) -> _LGOW {
                _LGOW { w: self }
            }
            #[doc = "Bits 2:13 - Cache address"]
            #[inline(always)]
            pub fn cacheaddr(&mut self) -> _CACHEADDRW {
                _CACHEADDRW { w: self }
            }
            #[doc = "Bit 14 - Way select"]
            #[inline(always)]
            pub fn wsel(&mut self) -> _WSELW {
                _WSELW { w: self }
            }
            #[doc = "Bit 16 - Tag/Data Select"]
            #[inline(always)]
            pub fn tdsel(&mut self) -> _TDSELW {
                _TDSELW { w: self }
            }
            #[doc = "Bit 20 - Line Command Initial Valid Bit"]
            #[inline(always)]
            pub fn lcivb(&mut self) -> _LCIVBW {
                _LCIVBW { w: self }
            }
            #[doc = "Bit 21 - Line Command Initial Modified Bit"]
            #[inline(always)]
            pub fn lcimb(&mut self) -> _LCIMBW {
                _LCIMBW { w: self }
            }
            #[doc = "Bit 22 - Line Command Way"]
            #[inline(always)]
            pub fn lcway(&mut self) -> _LCWAYW {
                _LCWAYW { w: self }
            }
            #[doc = "Bits 24:25 - Line Command"]
            #[inline(always)]
            pub fn lcmd(&mut self) -> _LCMDW {
                _LCMDW { w: self }
            }
            #[doc = "Bit 26 - Line Address Select"]
            #[inline(always)]
            pub fn ladsel(&mut self) -> _LADSELW {
                _LADSELW { w: self }
            }
            #[doc = "Bit 27 - Line access type"]
            #[inline(always)]
            pub fn lacc(&mut self) -> _LACCW {
                _LACCW { w: self }
            }
        }
    }
    #[doc = "Cache search address register"]
    pub struct LMEM_PCCSAR {
        register: VolatileCell<u32>,
    }
    #[doc = "Cache search address register"]
    pub mod lmem_pccsar {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::LMEM_PCCSAR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `LGO`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum LGOR {
            #[doc = "Write: no effect. Read: no line command active."]
            _0,
            #[doc = "Write: initiate line command indicated by bits CLCR[27:24]. Read: line command active."]
            _1,
        }
        impl LGOR {
            #[doc = r" Returns `true` if the bit is clear (0)"]
            #[inline(always)]
            pub fn bit_is_clear(&self) -> bool {
                !self.bit()
            }
            #[doc = r" Returns `true` if the bit is set (1)"]
            #[inline(always)]
            pub fn bit_is_set(&self) -> bool {
                self.bit()
            }
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bit(&self) -> bool {
                match *self {
                    LGOR::_0 => false,
                    LGOR::_1 => true,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: bool) -> LGOR {
                match value {
                    false => LGOR::_0,
                    true => LGOR::_1,
                }
            }
            #[doc = "Checks if the value of the field is `_0`"]
            #[inline(always)]
            pub fn is_0(&self) -> bool {
                *self == LGOR::_0
            }
            #[doc = "Checks if the value of the field is `_1`"]
            #[inline(always)]
            pub fn is_1(&self) -> bool {
                *self == LGOR::_1
            }
        }
        #[doc = r" Value of the field"]
        pub struct PHYADDRR {
            bits: u32,
        }
        impl PHYADDRR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = "Values that can be written to the field `LGO`"]
        pub enum LGOW {
            #[doc = "Write: no effect. Read: no line command active."]
            _0,
            #[doc = "Write: initiate line command indicated by bits CLCR[27:24]. Read: line command active."]
            _1,
        }
        impl LGOW {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> bool {
                match *self {
                    LGOW::_0 => false,
                    LGOW::_1 => true,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _LGOW<'a> {
            w: &'a mut W,
        }
        impl<'a> _LGOW<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: LGOW) -> &'a mut W {
                {
                    self.bit(variant._bits())
                }
            }
            #[doc = "Write: no effect. Read: no line command active."]
            #[inline(always)]
            pub fn _0(self) -> &'a mut W {
                self.variant(LGOW::_0)
            }
            #[doc = "Write: initiate line command indicated by bits CLCR[27:24]. Read: line command active."]
            #[inline(always)]
            pub fn _1(self) -> &'a mut W {
                self.variant(LGOW::_1)
            }
            #[doc = r" Sets the field bit"]
            pub fn set_bit(self) -> &'a mut W {
                self.bit(true)
            }
            #[doc = r" Clears the field bit"]
            pub fn clear_bit(self) -> &'a mut W {
                self.bit(false)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bit(self, value: bool) -> &'a mut W {
                const MASK: bool = true;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = r" Proxy"]
        pub struct _PHYADDRW<'a> {
            w: &'a mut W,
        }
        impl<'a> _PHYADDRW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 1073741823;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bit 0 - Initiate Cache Line Command"]
            #[inline(always)]
            pub fn lgo(&self) -> LGOR {
                LGOR::_from({
                    const MASK: bool = true;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) != 0
                })
            }
            #[doc = "Bits 2:31 - Physical Address"]
            #[inline(always)]
            pub fn phyaddr(&self) -> PHYADDRR {
                let bits = {
                    const MASK: u32 = 1073741823;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                PHYADDRR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bit 0 - Initiate Cache Line Command"]
            #[inline(always)]
            pub fn lgo(&mut self) -> _LGOW {
                _LGOW { w: self }
            }
            #[doc = "Bits 2:31 - Physical Address"]
            #[inline(always)]
            pub fn phyaddr(&mut self) -> _PHYADDRW {
                _PHYADDRW { w: self }
            }
        }
    }
    #[doc = "Cache read/write value register"]
    pub struct LMEM_PCCCVR {
        register: VolatileCell<u32>,
    }
    #[doc = "Cache read/write value register"]
    pub mod lmem_pcccvr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::LMEM_PCCCVR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = r" Value of the field"]
        pub struct DATAR {
            bits: u32,
        }
        impl DATAR {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
        }
        #[doc = r" Proxy"]
        pub struct _DATAW<'a> {
            w: &'a mut W,
        }
        impl<'a> _DATAW<'a> {
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub unsafe fn bits(self, value: u32) -> &'a mut W {
                const MASK: u32 = 4294967295;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:31 - Cache read/write Data"]
            #[inline(always)]
            pub fn data(&self) -> DATAR {
                let bits = {
                    const MASK: u32 = 4294967295;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u32
                };
                DATAR { bits }
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 0 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:31 - Cache read/write Data"]
            #[inline(always)]
            pub fn data(&mut self) -> _DATAW {
                _DATAW { w: self }
            }
        }
    }
    #[doc = "Cache regions mode register"]
    pub struct PCCRMR {
        register: VolatileCell<u32>,
    }
    #[doc = "Cache regions mode register"]
    pub mod pccrmr {
        #[doc = r" Value read from the register"]
        pub struct R {
            bits: u32,
        }
        #[doc = r" Value to write to the register"]
        pub struct W {
            bits: u32,
        }
        impl super::PCCRMR {
            #[doc = r" Modifies the contents of the register"]
            #[inline(always)]
            pub fn modify<F>(&self, f: F)
            where
                for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
            {
                let bits = self.register.get();
                let r = R { bits: bits };
                let mut w = W { bits: bits };
                f(&r, &mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Reads the contents of the register"]
            #[inline(always)]
            pub fn read(&self) -> R {
                R { bits: self.register.get() }
            }
            #[doc = r" Writes to the register"]
            #[inline(always)]
            pub fn write<F>(&self, f: F)
            where
                F: FnOnce(&mut W) -> &mut W,
            {
                let mut w = W::reset_value();
                f(&mut w);
                self.register.set(w.bits);
            }
            #[doc = r" Writes the reset value to the register"]
            #[inline(always)]
            pub fn reset(&self) {
                self.write(|w| w)
            }
        }
        #[doc = "Possible values of the field `R15`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum R15R {
            #[doc = "Non-cacheable"]
            _00,
            #[doc = "Non-cacheable"]
            _01,
            #[doc = "Write-through"]
            _10,
            #[doc = "Write-back"]
            _11,
        }
        impl R15R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    R15R::_00 => 0,
                    R15R::_01 => 1,
                    R15R::_10 => 2,
                    R15R::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> R15R {
                match value {
                    0 => R15R::_00,
                    1 => R15R::_01,
                    2 => R15R::_10,
                    3 => R15R::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == R15R::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == R15R::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == R15R::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == R15R::_11
            }
        }
        #[doc = "Possible values of the field `R14`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum R14R {
            #[doc = "Non-cacheable"]
            _00,
            #[doc = "Non-cacheable"]
            _01,
            #[doc = "Write-through"]
            _10,
            #[doc = "Write-back"]
            _11,
        }
        impl R14R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    R14R::_00 => 0,
                    R14R::_01 => 1,
                    R14R::_10 => 2,
                    R14R::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> R14R {
                match value {
                    0 => R14R::_00,
                    1 => R14R::_01,
                    2 => R14R::_10,
                    3 => R14R::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == R14R::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == R14R::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == R14R::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == R14R::_11
            }
        }
        #[doc = "Possible values of the field `R13`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum R13R {
            #[doc = "Non-cacheable"]
            _00,
            #[doc = "Non-cacheable"]
            _01,
            #[doc = "Write-through"]
            _10,
            #[doc = "Write-back"]
            _11,
        }
        impl R13R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    R13R::_00 => 0,
                    R13R::_01 => 1,
                    R13R::_10 => 2,
                    R13R::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> R13R {
                match value {
                    0 => R13R::_00,
                    1 => R13R::_01,
                    2 => R13R::_10,
                    3 => R13R::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == R13R::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == R13R::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == R13R::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == R13R::_11
            }
        }
        #[doc = "Possible values of the field `R12`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum R12R {
            #[doc = "Non-cacheable"]
            _00,
            #[doc = "Non-cacheable"]
            _01,
            #[doc = "Write-through"]
            _10,
            #[doc = "Write-back"]
            _11,
        }
        impl R12R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    R12R::_00 => 0,
                    R12R::_01 => 1,
                    R12R::_10 => 2,
                    R12R::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> R12R {
                match value {
                    0 => R12R::_00,
                    1 => R12R::_01,
                    2 => R12R::_10,
                    3 => R12R::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == R12R::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == R12R::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == R12R::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == R12R::_11
            }
        }
        #[doc = "Possible values of the field `R11`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum R11R {
            #[doc = "Non-cacheable"]
            _00,
            #[doc = "Non-cacheable"]
            _01,
            #[doc = "Write-through"]
            _10,
            #[doc = "Write-back"]
            _11,
        }
        impl R11R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    R11R::_00 => 0,
                    R11R::_01 => 1,
                    R11R::_10 => 2,
                    R11R::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> R11R {
                match value {
                    0 => R11R::_00,
                    1 => R11R::_01,
                    2 => R11R::_10,
                    3 => R11R::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == R11R::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == R11R::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == R11R::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == R11R::_11
            }
        }
        #[doc = "Possible values of the field `R10`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum R10R {
            #[doc = "Non-cacheable"]
            _00,
            #[doc = "Non-cacheable"]
            _01,
            #[doc = "Write-through"]
            _10,
            #[doc = "Write-back"]
            _11,
        }
        impl R10R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    R10R::_00 => 0,
                    R10R::_01 => 1,
                    R10R::_10 => 2,
                    R10R::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> R10R {
                match value {
                    0 => R10R::_00,
                    1 => R10R::_01,
                    2 => R10R::_10,
                    3 => R10R::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == R10R::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == R10R::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == R10R::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == R10R::_11
            }
        }
        #[doc = "Possible values of the field `R9`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum R9R {
            #[doc = "Non-cacheable"]
            _00,
            #[doc = "Non-cacheable"]
            _01,
            #[doc = "Write-through"]
            _10,
            #[doc = "Write-back"]
            _11,
        }
        impl R9R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    R9R::_00 => 0,
                    R9R::_01 => 1,
                    R9R::_10 => 2,
                    R9R::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> R9R {
                match value {
                    0 => R9R::_00,
                    1 => R9R::_01,
                    2 => R9R::_10,
                    3 => R9R::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == R9R::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == R9R::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == R9R::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == R9R::_11
            }
        }
        #[doc = "Possible values of the field `R8`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum R8R {
            #[doc = "Non-cacheable"]
            _00,
            #[doc = "Non-cacheable"]
            _01,
            #[doc = "Write-through"]
            _10,
            #[doc = "Write-back"]
            _11,
        }
        impl R8R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    R8R::_00 => 0,
                    R8R::_01 => 1,
                    R8R::_10 => 2,
                    R8R::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> R8R {
                match value {
                    0 => R8R::_00,
                    1 => R8R::_01,
                    2 => R8R::_10,
                    3 => R8R::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == R8R::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == R8R::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == R8R::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == R8R::_11
            }
        }
        #[doc = "Possible values of the field `R7`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum R7R {
            #[doc = "Non-cacheable"]
            _00,
            #[doc = "Non-cacheable"]
            _01,
            #[doc = "Write-through"]
            _10,
            #[doc = "Write-back"]
            _11,
        }
        impl R7R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    R7R::_00 => 0,
                    R7R::_01 => 1,
                    R7R::_10 => 2,
                    R7R::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> R7R {
                match value {
                    0 => R7R::_00,
                    1 => R7R::_01,
                    2 => R7R::_10,
                    3 => R7R::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == R7R::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == R7R::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == R7R::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == R7R::_11
            }
        }
        #[doc = "Possible values of the field `R6`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum R6R {
            #[doc = "Non-cacheable"]
            _00,
            #[doc = "Non-cacheable"]
            _01,
            #[doc = "Write-through"]
            _10,
            #[doc = "Write-back"]
            _11,
        }
        impl R6R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    R6R::_00 => 0,
                    R6R::_01 => 1,
                    R6R::_10 => 2,
                    R6R::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> R6R {
                match value {
                    0 => R6R::_00,
                    1 => R6R::_01,
                    2 => R6R::_10,
                    3 => R6R::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == R6R::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == R6R::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == R6R::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == R6R::_11
            }
        }
        #[doc = "Possible values of the field `R5`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum R5R {
            #[doc = "Non-cacheable"]
            _00,
            #[doc = "Non-cacheable"]
            _01,
            #[doc = "Write-through"]
            _10,
            #[doc = "Write-back"]
            _11,
        }
        impl R5R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    R5R::_00 => 0,
                    R5R::_01 => 1,
                    R5R::_10 => 2,
                    R5R::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> R5R {
                match value {
                    0 => R5R::_00,
                    1 => R5R::_01,
                    2 => R5R::_10,
                    3 => R5R::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == R5R::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == R5R::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == R5R::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == R5R::_11
            }
        }
        #[doc = "Possible values of the field `R4`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum R4R {
            #[doc = "Non-cacheable"]
            _00,
            #[doc = "Non-cacheable"]
            _01,
            #[doc = "Write-through"]
            _10,
            #[doc = "Write-back"]
            _11,
        }
        impl R4R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    R4R::_00 => 0,
                    R4R::_01 => 1,
                    R4R::_10 => 2,
                    R4R::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> R4R {
                match value {
                    0 => R4R::_00,
                    1 => R4R::_01,
                    2 => R4R::_10,
                    3 => R4R::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == R4R::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == R4R::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == R4R::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == R4R::_11
            }
        }
        #[doc = "Possible values of the field `R3`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum R3R {
            #[doc = "Non-cacheable"]
            _00,
            #[doc = "Non-cacheable"]
            _01,
            #[doc = "Write-through"]
            _10,
            #[doc = "Write-back"]
            _11,
        }
        impl R3R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    R3R::_00 => 0,
                    R3R::_01 => 1,
                    R3R::_10 => 2,
                    R3R::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> R3R {
                match value {
                    0 => R3R::_00,
                    1 => R3R::_01,
                    2 => R3R::_10,
                    3 => R3R::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == R3R::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == R3R::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == R3R::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == R3R::_11
            }
        }
        #[doc = "Possible values of the field `R2`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum R2R {
            #[doc = "Non-cacheable"]
            _00,
            #[doc = "Non-cacheable"]
            _01,
            #[doc = "Write-through"]
            _10,
            #[doc = "Write-back"]
            _11,
        }
        impl R2R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    R2R::_00 => 0,
                    R2R::_01 => 1,
                    R2R::_10 => 2,
                    R2R::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> R2R {
                match value {
                    0 => R2R::_00,
                    1 => R2R::_01,
                    2 => R2R::_10,
                    3 => R2R::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == R2R::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == R2R::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == R2R::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == R2R::_11
            }
        }
        #[doc = "Possible values of the field `R1`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum R1R {
            #[doc = "Non-cacheable"]
            _00,
            #[doc = "Non-cacheable"]
            _01,
            #[doc = "Write-through"]
            _10,
            #[doc = "Write-back"]
            _11,
        }
        impl R1R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    R1R::_00 => 0,
                    R1R::_01 => 1,
                    R1R::_10 => 2,
                    R1R::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> R1R {
                match value {
                    0 => R1R::_00,
                    1 => R1R::_01,
                    2 => R1R::_10,
                    3 => R1R::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == R1R::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == R1R::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == R1R::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == R1R::_11
            }
        }
        #[doc = "Possible values of the field `R0`"]
        #[derive(Clone, Copy, Debug, PartialEq)]
        pub enum R0R {
            #[doc = "Non-cacheable"]
            _00,
            #[doc = "Non-cacheable"]
            _01,
            #[doc = "Write-through"]
            _10,
            #[doc = "Write-back"]
            _11,
        }
        impl R0R {
            #[doc = r" Value of the field as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u8 {
                match *self {
                    R0R::_00 => 0,
                    R0R::_01 => 1,
                    R0R::_10 => 2,
                    R0R::_11 => 3,
                }
            }
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _from(value: u8) -> R0R {
                match value {
                    0 => R0R::_00,
                    1 => R0R::_01,
                    2 => R0R::_10,
                    3 => R0R::_11,
                    _ => unreachable!(),
                }
            }
            #[doc = "Checks if the value of the field is `_00`"]
            #[inline(always)]
            pub fn is_00(&self) -> bool {
                *self == R0R::_00
            }
            #[doc = "Checks if the value of the field is `_01`"]
            #[inline(always)]
            pub fn is_01(&self) -> bool {
                *self == R0R::_01
            }
            #[doc = "Checks if the value of the field is `_10`"]
            #[inline(always)]
            pub fn is_10(&self) -> bool {
                *self == R0R::_10
            }
            #[doc = "Checks if the value of the field is `_11`"]
            #[inline(always)]
            pub fn is_11(&self) -> bool {
                *self == R0R::_11
            }
        }
        #[doc = "Values that can be written to the field `R15`"]
        pub enum R15W {
            #[doc = "Non-cacheable"]
            _00,
            #[doc = "Non-cacheable"]
            _01,
            #[doc = "Write-through"]
            _10,
            #[doc = "Write-back"]
            _11,
        }
        impl R15W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    R15W::_00 => 0,
                    R15W::_01 => 1,
                    R15W::_10 => 2,
                    R15W::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _R15W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R15W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: R15W) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Non-cacheable"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(R15W::_00)
            }
            #[doc = "Non-cacheable"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(R15W::_01)
            }
            #[doc = "Write-through"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(R15W::_10)
            }
            #[doc = "Write-back"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(R15W::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 0;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `R14`"]
        pub enum R14W {
            #[doc = "Non-cacheable"]
            _00,
            #[doc = "Non-cacheable"]
            _01,
            #[doc = "Write-through"]
            _10,
            #[doc = "Write-back"]
            _11,
        }
        impl R14W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    R14W::_00 => 0,
                    R14W::_01 => 1,
                    R14W::_10 => 2,
                    R14W::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _R14W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R14W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: R14W) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Non-cacheable"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(R14W::_00)
            }
            #[doc = "Non-cacheable"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(R14W::_01)
            }
            #[doc = "Write-through"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(R14W::_10)
            }
            #[doc = "Write-back"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(R14W::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 2;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `R13`"]
        pub enum R13W {
            #[doc = "Non-cacheable"]
            _00,
            #[doc = "Non-cacheable"]
            _01,
            #[doc = "Write-through"]
            _10,
            #[doc = "Write-back"]
            _11,
        }
        impl R13W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    R13W::_00 => 0,
                    R13W::_01 => 1,
                    R13W::_10 => 2,
                    R13W::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _R13W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R13W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: R13W) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Non-cacheable"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(R13W::_00)
            }
            #[doc = "Non-cacheable"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(R13W::_01)
            }
            #[doc = "Write-through"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(R13W::_10)
            }
            #[doc = "Write-back"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(R13W::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 4;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `R12`"]
        pub enum R12W {
            #[doc = "Non-cacheable"]
            _00,
            #[doc = "Non-cacheable"]
            _01,
            #[doc = "Write-through"]
            _10,
            #[doc = "Write-back"]
            _11,
        }
        impl R12W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    R12W::_00 => 0,
                    R12W::_01 => 1,
                    R12W::_10 => 2,
                    R12W::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _R12W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R12W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: R12W) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Non-cacheable"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(R12W::_00)
            }
            #[doc = "Non-cacheable"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(R12W::_01)
            }
            #[doc = "Write-through"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(R12W::_10)
            }
            #[doc = "Write-back"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(R12W::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 6;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `R11`"]
        pub enum R11W {
            #[doc = "Non-cacheable"]
            _00,
            #[doc = "Non-cacheable"]
            _01,
            #[doc = "Write-through"]
            _10,
            #[doc = "Write-back"]
            _11,
        }
        impl R11W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    R11W::_00 => 0,
                    R11W::_01 => 1,
                    R11W::_10 => 2,
                    R11W::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _R11W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R11W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: R11W) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Non-cacheable"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(R11W::_00)
            }
            #[doc = "Non-cacheable"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(R11W::_01)
            }
            #[doc = "Write-through"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(R11W::_10)
            }
            #[doc = "Write-back"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(R11W::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 8;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `R10`"]
        pub enum R10W {
            #[doc = "Non-cacheable"]
            _00,
            #[doc = "Non-cacheable"]
            _01,
            #[doc = "Write-through"]
            _10,
            #[doc = "Write-back"]
            _11,
        }
        impl R10W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    R10W::_00 => 0,
                    R10W::_01 => 1,
                    R10W::_10 => 2,
                    R10W::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _R10W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R10W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: R10W) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Non-cacheable"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(R10W::_00)
            }
            #[doc = "Non-cacheable"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(R10W::_01)
            }
            #[doc = "Write-through"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(R10W::_10)
            }
            #[doc = "Write-back"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(R10W::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 10;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `R9`"]
        pub enum R9W {
            #[doc = "Non-cacheable"]
            _00,
            #[doc = "Non-cacheable"]
            _01,
            #[doc = "Write-through"]
            _10,
            #[doc = "Write-back"]
            _11,
        }
        impl R9W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    R9W::_00 => 0,
                    R9W::_01 => 1,
                    R9W::_10 => 2,
                    R9W::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _R9W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R9W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: R9W) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Non-cacheable"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(R9W::_00)
            }
            #[doc = "Non-cacheable"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(R9W::_01)
            }
            #[doc = "Write-through"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(R9W::_10)
            }
            #[doc = "Write-back"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(R9W::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 12;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `R8`"]
        pub enum R8W {
            #[doc = "Non-cacheable"]
            _00,
            #[doc = "Non-cacheable"]
            _01,
            #[doc = "Write-through"]
            _10,
            #[doc = "Write-back"]
            _11,
        }
        impl R8W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    R8W::_00 => 0,
                    R8W::_01 => 1,
                    R8W::_10 => 2,
                    R8W::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _R8W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R8W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: R8W) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Non-cacheable"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(R8W::_00)
            }
            #[doc = "Non-cacheable"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(R8W::_01)
            }
            #[doc = "Write-through"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(R8W::_10)
            }
            #[doc = "Write-back"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(R8W::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 14;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `R7`"]
        pub enum R7W {
            #[doc = "Non-cacheable"]
            _00,
            #[doc = "Non-cacheable"]
            _01,
            #[doc = "Write-through"]
            _10,
            #[doc = "Write-back"]
            _11,
        }
        impl R7W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    R7W::_00 => 0,
                    R7W::_01 => 1,
                    R7W::_10 => 2,
                    R7W::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _R7W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R7W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: R7W) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Non-cacheable"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(R7W::_00)
            }
            #[doc = "Non-cacheable"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(R7W::_01)
            }
            #[doc = "Write-through"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(R7W::_10)
            }
            #[doc = "Write-back"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(R7W::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 16;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `R6`"]
        pub enum R6W {
            #[doc = "Non-cacheable"]
            _00,
            #[doc = "Non-cacheable"]
            _01,
            #[doc = "Write-through"]
            _10,
            #[doc = "Write-back"]
            _11,
        }
        impl R6W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    R6W::_00 => 0,
                    R6W::_01 => 1,
                    R6W::_10 => 2,
                    R6W::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _R6W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R6W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: R6W) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Non-cacheable"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(R6W::_00)
            }
            #[doc = "Non-cacheable"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(R6W::_01)
            }
            #[doc = "Write-through"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(R6W::_10)
            }
            #[doc = "Write-back"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(R6W::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 18;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `R5`"]
        pub enum R5W {
            #[doc = "Non-cacheable"]
            _00,
            #[doc = "Non-cacheable"]
            _01,
            #[doc = "Write-through"]
            _10,
            #[doc = "Write-back"]
            _11,
        }
        impl R5W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    R5W::_00 => 0,
                    R5W::_01 => 1,
                    R5W::_10 => 2,
                    R5W::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _R5W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R5W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: R5W) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Non-cacheable"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(R5W::_00)
            }
            #[doc = "Non-cacheable"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(R5W::_01)
            }
            #[doc = "Write-through"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(R5W::_10)
            }
            #[doc = "Write-back"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(R5W::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 20;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `R4`"]
        pub enum R4W {
            #[doc = "Non-cacheable"]
            _00,
            #[doc = "Non-cacheable"]
            _01,
            #[doc = "Write-through"]
            _10,
            #[doc = "Write-back"]
            _11,
        }
        impl R4W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    R4W::_00 => 0,
                    R4W::_01 => 1,
                    R4W::_10 => 2,
                    R4W::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _R4W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R4W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: R4W) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Non-cacheable"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(R4W::_00)
            }
            #[doc = "Non-cacheable"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(R4W::_01)
            }
            #[doc = "Write-through"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(R4W::_10)
            }
            #[doc = "Write-back"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(R4W::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 22;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `R3`"]
        pub enum R3W {
            #[doc = "Non-cacheable"]
            _00,
            #[doc = "Non-cacheable"]
            _01,
            #[doc = "Write-through"]
            _10,
            #[doc = "Write-back"]
            _11,
        }
        impl R3W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    R3W::_00 => 0,
                    R3W::_01 => 1,
                    R3W::_10 => 2,
                    R3W::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _R3W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R3W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: R3W) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Non-cacheable"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(R3W::_00)
            }
            #[doc = "Non-cacheable"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(R3W::_01)
            }
            #[doc = "Write-through"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(R3W::_10)
            }
            #[doc = "Write-back"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(R3W::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 24;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `R2`"]
        pub enum R2W {
            #[doc = "Non-cacheable"]
            _00,
            #[doc = "Non-cacheable"]
            _01,
            #[doc = "Write-through"]
            _10,
            #[doc = "Write-back"]
            _11,
        }
        impl R2W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    R2W::_00 => 0,
                    R2W::_01 => 1,
                    R2W::_10 => 2,
                    R2W::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _R2W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R2W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: R2W) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Non-cacheable"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(R2W::_00)
            }
            #[doc = "Non-cacheable"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(R2W::_01)
            }
            #[doc = "Write-through"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(R2W::_10)
            }
            #[doc = "Write-back"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(R2W::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 26;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `R1`"]
        pub enum R1W {
            #[doc = "Non-cacheable"]
            _00,
            #[doc = "Non-cacheable"]
            _01,
            #[doc = "Write-through"]
            _10,
            #[doc = "Write-back"]
            _11,
        }
        impl R1W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    R1W::_00 => 0,
                    R1W::_01 => 1,
                    R1W::_10 => 2,
                    R1W::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _R1W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R1W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: R1W) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Non-cacheable"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(R1W::_00)
            }
            #[doc = "Non-cacheable"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(R1W::_01)
            }
            #[doc = "Write-through"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(R1W::_10)
            }
            #[doc = "Write-back"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(R1W::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 28;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        #[doc = "Values that can be written to the field `R0`"]
        pub enum R0W {
            #[doc = "Non-cacheable"]
            _00,
            #[doc = "Non-cacheable"]
            _01,
            #[doc = "Write-through"]
            _10,
            #[doc = "Write-back"]
            _11,
        }
        impl R0W {
            #[allow(missing_docs)]
            #[doc(hidden)]
            #[inline(always)]
            pub fn _bits(&self) -> u8 {
                match *self {
                    R0W::_00 => 0,
                    R0W::_01 => 1,
                    R0W::_10 => 2,
                    R0W::_11 => 3,
                }
            }
        }
        #[doc = r" Proxy"]
        pub struct _R0W<'a> {
            w: &'a mut W,
        }
        impl<'a> _R0W<'a> {
            #[doc = r" Writes `variant` to the field"]
            #[inline(always)]
            pub fn variant(self, variant: R0W) -> &'a mut W {
                {
                    self.bits(variant._bits())
                }
            }
            #[doc = "Non-cacheable"]
            #[inline(always)]
            pub fn _00(self) -> &'a mut W {
                self.variant(R0W::_00)
            }
            #[doc = "Non-cacheable"]
            #[inline(always)]
            pub fn _01(self) -> &'a mut W {
                self.variant(R0W::_01)
            }
            #[doc = "Write-through"]
            #[inline(always)]
            pub fn _10(self) -> &'a mut W {
                self.variant(R0W::_10)
            }
            #[doc = "Write-back"]
            #[inline(always)]
            pub fn _11(self) -> &'a mut W {
                self.variant(R0W::_11)
            }
            #[doc = r" Writes raw bits to the field"]
            #[inline(always)]
            pub fn bits(self, value: u8) -> &'a mut W {
                const MASK: u8 = 3;
                const OFFSET: u8 = 30;
                self.w.bits &= !((MASK as u32) << OFFSET);
                self.w.bits |= ((value & MASK) as u32) << OFFSET;
                self.w
            }
        }
        impl R {
            #[doc = r" Value of the register as raw bits"]
            #[inline(always)]
            pub fn bits(&self) -> u32 {
                self.bits
            }
            #[doc = "Bits 0:1 - Region 15 mode"]
            #[inline(always)]
            pub fn r15(&self) -> R15R {
                R15R::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 0;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 2:3 - Region 14 mode"]
            #[inline(always)]
            pub fn r14(&self) -> R14R {
                R14R::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 2;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 4:5 - Region 13 mode"]
            #[inline(always)]
            pub fn r13(&self) -> R13R {
                R13R::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 4;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 6:7 - Region 12 mode"]
            #[inline(always)]
            pub fn r12(&self) -> R12R {
                R12R::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 6;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 8:9 - Region 11 mode"]
            #[inline(always)]
            pub fn r11(&self) -> R11R {
                R11R::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 8;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 10:11 - Region 10 mode"]
            #[inline(always)]
            pub fn r10(&self) -> R10R {
                R10R::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 10;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 12:13 - Region 9 mode"]
            #[inline(always)]
            pub fn r9(&self) -> R9R {
                R9R::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 12;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 14:15 - Region 8 mode"]
            #[inline(always)]
            pub fn r8(&self) -> R8R {
                R8R::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 14;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 16:17 - Region 7 mode"]
            #[inline(always)]
            pub fn r7(&self) -> R7R {
                R7R::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 16;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 18:19 - Region 6 mode"]
            #[inline(always)]
            pub fn r6(&self) -> R6R {
                R6R::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 18;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 20:21 - Region 5 mode"]
            #[inline(always)]
            pub fn r5(&self) -> R5R {
                R5R::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 20;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 22:23 - Region 4 mode"]
            #[inline(always)]
            pub fn r4(&self) -> R4R {
                R4R::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 22;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 24:25 - Region 3 mode"]
            #[inline(always)]
            pub fn r3(&self) -> R3R {
                R3R::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 24;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 26:27 - Region 2 mode"]
            #[inline(always)]
            pub fn r2(&self) -> R2R {
                R2R::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 26;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 28:29 - Region 1 mode"]
            #[inline(always)]
            pub fn r1(&self) -> R1R {
                R1R::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 28;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
            #[doc = "Bits 30:31 - Region 0 mode"]
            #[inline(always)]
            pub fn r0(&self) -> R0R {
                R0R::_from({
                    const MASK: u8 = 3;
                    const OFFSET: u8 = 30;
                    ((self.bits >> OFFSET) & MASK as u32) as u8
                })
            }
        }
        impl W {
            #[doc = r" Reset value of the register"]
            #[inline(always)]
            pub fn reset_value() -> W {
                W { bits: 2853150720 }
            }
            #[doc = r" Writes raw bits to the register"]
            #[inline(always)]
            pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
                self.bits = bits;
                self
            }
            #[doc = "Bits 0:1 - Region 15 mode"]
            #[inline(always)]
            pub fn r15(&mut self) -> _R15W {
                _R15W { w: self }
            }
            #[doc = "Bits 2:3 - Region 14 mode"]
            #[inline(always)]
            pub fn r14(&mut self) -> _R14W {
                _R14W { w: self }
            }
            #[doc = "Bits 4:5 - Region 13 mode"]
            #[inline(always)]
            pub fn r13(&mut self) -> _R13W {
                _R13W { w: self }
            }
            #[doc = "Bits 6:7 - Region 12 mode"]
            #[inline(always)]
            pub fn r12(&mut self) -> _R12W {
                _R12W { w: self }
            }
            #[doc = "Bits 8:9 - Region 11 mode"]
            #[inline(always)]
            pub fn r11(&mut self) -> _R11W {
                _R11W { w: self }
            }
            #[doc = "Bits 10:11 - Region 10 mode"]
            #[inline(always)]
            pub fn r10(&mut self) -> _R10W {
                _R10W { w: self }
            }
            #[doc = "Bits 12:13 - Region 9 mode"]
            #[inline(always)]
            pub fn r9(&mut self) -> _R9W {
                _R9W { w: self }
            }
            #[doc = "Bits 14:15 - Region 8 mode"]
            #[inline(always)]
            pub fn r8(&mut self) -> _R8W {
                _R8W { w: self }
            }
            #[doc = "Bits 16:17 - Region 7 mode"]
            #[inline(always)]
            pub fn r7(&mut self) -> _R7W {
                _R7W { w: self }
            }
            #[doc = "Bits 18:19 - Region 6 mode"]
            #[inline(always)]
            pub fn r6(&mut self) -> _R6W {
                _R6W { w: self }
            }
            #[doc = "Bits 20:21 - Region 5 mode"]
            #[inline(always)]
            pub fn r5(&mut self) -> _R5W {
                _R5W { w: self }
            }
            #[doc = "Bits 22:23 - Region 4 mode"]
            #[inline(always)]
            pub fn r4(&mut self) -> _R4W {
                _R4W { w: self }
            }
            #[doc = "Bits 24:25 - Region 3 mode"]
            #[inline(always)]
            pub fn r3(&mut self) -> _R3W {
                _R3W { w: self }
            }
            #[doc = "Bits 26:27 - Region 2 mode"]
            #[inline(always)]
            pub fn r2(&mut self) -> _R2W {
                _R2W { w: self }
            }
            #[doc = "Bits 28:29 - Region 1 mode"]
            #[inline(always)]
            pub fn r1(&mut self) -> _R1W {
                _R1W { w: self }
            }
            #[doc = "Bits 30:31 - Region 0 mode"]
            #[inline(always)]
            pub fn r0(&mut self) -> _R0W {
                _R0W { w: self }
            }
        }
    }
}
#[doc = "Local Memory Controller"]
pub struct LMEM {
    register_block: lmem::RegisterBlock,
}
impl Deref for LMEM {
    type Target = lmem::RegisterBlock;
    fn deref(&self) -> &lmem::RegisterBlock {
        &self.register_block
    }
}
#[doc = r" All the peripherals"]
#[allow(non_snake_case)]
pub struct Peripherals<'a> {
    #[doc = "CPUID"]
    pub CPUID: &'a CPUID,
    #[doc = "DCB"]
    pub DCB: &'a DCB,
    #[doc = "DWT"]
    pub DWT: &'a DWT,
    #[doc = "FPB"]
    pub FPB: &'a FPB,
    #[doc = "FPU"]
    pub FPU: &'a FPU,
    #[doc = "ITM"]
    pub ITM: &'a ITM,
    #[doc = "MPU"]
    pub MPU: &'a MPU,
    #[doc = "NVIC"]
    pub NVIC: &'a NVIC,
    #[doc = "SCB"]
    pub SCB: &'a SCB,
    #[doc = "SYST"]
    pub SYST: &'a SYST,
    #[doc = "TPIU"]
    pub TPIU: &'a TPIU,
    #[doc = "CSE_PRAM"]
    pub CSE_PRAM: &'a CSE_PRAM,
    #[doc = "AIPS"]
    pub AIPS: &'a AIPS,
    #[doc = "MSCM"]
    pub MSCM: &'a MSCM,
    #[doc = "DMA"]
    pub DMA: &'a DMA,
    #[doc = "ERM"]
    pub ERM: &'a ERM,
    #[doc = "EIM"]
    pub EIM: &'a EIM,
    #[doc = "FTFC"]
    pub FTFC: &'a FTFC,
    #[doc = "DMAMUX"]
    pub DMAMUX: &'a DMAMUX,
    #[doc = "CAN0"]
    pub CAN0: &'a CAN0,
    #[doc = "CAN1"]
    pub CAN1: &'a CAN1,
    #[doc = "CAN2"]
    pub CAN2: &'a CAN2,
    #[doc = "FTM0"]
    pub FTM0: &'a FTM0,
    #[doc = "FTM1"]
    pub FTM1: &'a FTM1,
    #[doc = "FTM2"]
    pub FTM2: &'a FTM2,
    #[doc = "FTM3"]
    pub FTM3: &'a FTM3,
    #[doc = "ADC0"]
    pub ADC0: &'a ADC0,
    #[doc = "ADC1"]
    pub ADC1: &'a ADC1,
    #[doc = "LPSPI0"]
    pub LPSPI0: &'a LPSPI0,
    #[doc = "LPSPI1"]
    pub LPSPI1: &'a LPSPI1,
    #[doc = "LPSPI2"]
    pub LPSPI2: &'a LPSPI2,
    #[doc = "PDB0"]
    pub PDB0: &'a PDB0,
    #[doc = "PDB1"]
    pub PDB1: &'a PDB1,
    #[doc = "CRC"]
    pub CRC: &'a CRC,
    #[doc = "LPIT0"]
    pub LPIT0: &'a LPIT0,
    #[doc = "RTC"]
    pub RTC: &'a RTC,
    #[doc = "LPTMR0"]
    pub LPTMR0: &'a LPTMR0,
    #[doc = "SIM"]
    pub SIM: &'a SIM,
    #[doc = "PORTA"]
    pub PORTA: &'a PORTA,
    #[doc = "PORTB"]
    pub PORTB: &'a PORTB,
    #[doc = "PORTC"]
    pub PORTC: &'a PORTC,
    #[doc = "PORTD"]
    pub PORTD: &'a PORTD,
    #[doc = "PORTE"]
    pub PORTE: &'a PORTE,
    #[doc = "WDOG"]
    pub WDOG: &'a WDOG,
    #[doc = "FLEXIO"]
    pub FLEXIO: &'a FLEXIO,
    #[doc = "EWM"]
    pub EWM: &'a EWM,
    #[doc = "TRGMUX"]
    pub TRGMUX: &'a TRGMUX,
    #[doc = "SCG"]
    pub SCG: &'a SCG,
    #[doc = "PCC"]
    pub PCC: &'a PCC,
    #[doc = "LPI2C0"]
    pub LPI2C0: &'a LPI2C0,
    #[doc = "LPUART0"]
    pub LPUART0: &'a LPUART0,
    #[doc = "LPUART1"]
    pub LPUART1: &'a LPUART1,
    #[doc = "LPUART2"]
    pub LPUART2: &'a LPUART2,
    #[doc = "CMP0"]
    pub CMP0: &'a CMP0,
    #[doc = "PMC"]
    pub PMC: &'a PMC,
    #[doc = "SMC"]
    pub SMC: &'a SMC,
    #[doc = "RCM"]
    pub RCM: &'a RCM,
    #[doc = "PTA"]
    pub PTA: &'a PTA,
    #[doc = "PTB"]
    pub PTB: &'a PTB,
    #[doc = "PTC"]
    pub PTC: &'a PTC,
    #[doc = "PTD"]
    pub PTD: &'a PTD,
    #[doc = "PTE"]
    pub PTE: &'a PTE,
    #[doc = "MCM"]
    pub MCM: &'a MCM,
    #[doc = "LMEM"]
    pub LMEM: &'a LMEM,
}
impl<'a> Peripherals<'a> {
    #[doc = r" Grants access to all the peripherals"]
    pub unsafe fn all() -> Self {
        Peripherals {
            CPUID: &*CPUID.get(),
            DCB: &*DCB.get(),
            DWT: &*DWT.get(),
            FPB: &*FPB.get(),
            FPU: &*FPU.get(),
            ITM: &*ITM.get(),
            MPU: &*MPU.get(),
            NVIC: &*NVIC.get(),
            SCB: &*SCB.get(),
            SYST: &*SYST.get(),
            TPIU: &*TPIU.get(),
            CSE_PRAM: &*CSE_PRAM.get(),
            AIPS: &*AIPS.get(),
            MSCM: &*MSCM.get(),
            DMA: &*DMA.get(),
            ERM: &*ERM.get(),
            EIM: &*EIM.get(),
            FTFC: &*FTFC.get(),
            DMAMUX: &*DMAMUX.get(),
            CAN0: &*CAN0.get(),
            CAN1: &*CAN1.get(),
            CAN2: &*CAN2.get(),
            FTM0: &*FTM0.get(),
            FTM1: &*FTM1.get(),
            FTM2: &*FTM2.get(),
            FTM3: &*FTM3.get(),
            ADC0: &*ADC0.get(),
            ADC1: &*ADC1.get(),
            LPSPI0: &*LPSPI0.get(),
            LPSPI1: &*LPSPI1.get(),
            LPSPI2: &*LPSPI2.get(),
            PDB0: &*PDB0.get(),
            PDB1: &*PDB1.get(),
            CRC: &*CRC.get(),
            LPIT0: &*LPIT0.get(),
            RTC: &*RTC.get(),
            LPTMR0: &*LPTMR0.get(),
            SIM: &*SIM.get(),
            PORTA: &*PORTA.get(),
            PORTB: &*PORTB.get(),
            PORTC: &*PORTC.get(),
            PORTD: &*PORTD.get(),
            PORTE: &*PORTE.get(),
            WDOG: &*WDOG.get(),
            FLEXIO: &*FLEXIO.get(),
            EWM: &*EWM.get(),
            TRGMUX: &*TRGMUX.get(),
            SCG: &*SCG.get(),
            PCC: &*PCC.get(),
            LPI2C0: &*LPI2C0.get(),
            LPUART0: &*LPUART0.get(),
            LPUART1: &*LPUART1.get(),
            LPUART2: &*LPUART2.get(),
            CMP0: &*CMP0.get(),
            PMC: &*PMC.get(),
            SMC: &*SMC.get(),
            RCM: &*RCM.get(),
            PTA: &*PTA.get(),
            PTB: &*PTB.get(),
            PTC: &*PTC.get(),
            PTD: &*PTD.get(),
            PTE: &*PTE.get(),
            MCM: &*MCM.get(),
            LMEM: &*LMEM.get(),
        }
    }
}
